Searched refs:DG1_MSTR_TILE_INTR (Results 1 – 2 of 2) sorted by relevance
600 raw_reg_write(regs, DG1_MSTR_TILE_INTR, 0); in dg1_master_intr_disable()603 val = raw_reg_read(regs, DG1_MSTR_TILE_INTR); in dg1_master_intr_disable()607 raw_reg_write(regs, DG1_MSTR_TILE_INTR, val); in dg1_master_intr_disable()614 raw_reg_write(regs, DG1_MSTR_TILE_INTR, DG1_MSTR_IRQ); in dg1_master_intr_enable()832 intel_uncore_posting_read(uncore, DG1_MSTR_TILE_INTR); in dg1_irq_postinstall()
2608 #define DG1_MSTR_TILE_INTR _MMIO(0x190008) macro