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Searched refs:DPLL_CTRL1_LINK_RATE (Results 1 – 4 of 4) sorted by relevance

/openbsd/src/sys/dev/pci/drm/i915/display/
Dintel_cdclk.c946 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, SKL_DPLL0): in skl_dpll0_update()
947 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1350, SKL_DPLL0): in skl_dpll0_update()
948 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1620, SKL_DPLL0): in skl_dpll0_update()
949 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2700, SKL_DPLL0): in skl_dpll0_update()
952 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080, SKL_DPLL0): in skl_dpll0_update()
953 case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2160, SKL_DPLL0): in skl_dpll0_update()
1053 return DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080, SKL_DPLL0); in skl_dpll0_link_rate()
1055 return DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, SKL_DPLL0); in skl_dpll0_link_rate()
Dintel_dpll_mgr.c1855 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, 0); in skl_ddi_dp_set_dpll_hw_state()
1858 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1350, 0); in skl_ddi_dp_set_dpll_hw_state()
1861 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2700, 0); in skl_ddi_dp_set_dpll_hw_state()
1865 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1620, 0); in skl_ddi_dp_set_dpll_hw_state()
1868 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080, 0); in skl_ddi_dp_set_dpll_hw_state()
1871 ctrl1 |= DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2160, 0); in skl_ddi_dp_set_dpll_hw_state()
/openbsd/src/sys/dev/pci/drm/i915/gvt/
Ddisplay.c391 DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1620, DPLL_ID_SKL_DPLL0); in emulate_monitor_status_change()
/openbsd/src/sys/dev/pci/drm/i915/
Di915_reg.h4103 #define DPLL_CTRL1_LINK_RATE(linkrate, id) ((linkrate) << ((id) * 6 + 1)) macro