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Searched refs:FPU (Results 1 – 25 of 182) sorted by relevance

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/openbsd/src/gnu/llvm/clang/lib/Driver/ToolChains/Arch/
DLoongArch.cpp46 StringRef FPU = A->getValue(); in getLoongArchABI() local
47 if (FPU == "64") in getLoongArchABI()
49 if (FPU == "32") in getLoongArchABI()
51 if (FPU == "0" || FPU == "none") in getLoongArchABI()
53 D.Diag(diag::err_drv_loongarch_invalid_mfpu_EQ) << FPU; in getLoongArchABI()
101 StringRef FPU = A->getValue(); in getLoongArchTargetFeatures() local
102 if (FPU == "64") { in getLoongArchTargetFeatures()
105 } else if (FPU == "32") { in getLoongArchTargetFeatures()
108 } else if (FPU == "0" || FPU == "none") { in getLoongArchTargetFeatures()
112 D.Diag(diag::err_drv_loongarch_invalid_mfpu_EQ) << FPU; in getLoongArchTargetFeatures()
/openbsd/src/gnu/llvm/clang/lib/Basic/Targets/
DAArch64.cpp57 FPU |= NeonMode; in setArchFeatures()
85 FPU |= NeonMode; in setArchFeatures()
103 FPU |= SveMode; in setArchFeatures()
116 FPU |= NeonMode; in setArchFeatures()
392 if (FPU & NeonMode) { in getTargetDefines()
398 if (FPU & SveMode) in getTargetDefines()
401 if ((FPU & NeonMode) && (FPU & SveMode)) in getTargetDefines()
455 if ((FPU & NeonMode) && HasFullFP16) in getTargetDefines()
482 if ((FPU & SveMode) && HasBFloat16) { in getTargetDefines()
486 if ((FPU & SveMode) && HasMatmulFP64) in getTargetDefines()
[all …]
DARM.cpp498 FPU = 0; in handleTargetFeatures()
524 FPU |= VFP2FPU; in handleTargetFeatures()
530 FPU |= VFP3FPU; in handleTargetFeatures()
536 FPU |= VFP4FPU; in handleTargetFeatures()
542 FPU |= FPARMV8; in handleTargetFeatures()
547 FPU |= NeonFPU; in handleTargetFeatures()
582 FPU |= FPARMV8; in handleTargetFeatures()
623 if (!(FPU & NeonFPU) && FPMath == FP_Neon) { in handleTargetFeatures()
642 .Case("neon", (FPU & NeonFPU) && !SoftFloat) in hasFeature()
643 .Case("vfp", FPU && !SoftFloat) in hasFeature()
[all …]
/openbsd/src/regress/sys/arch/amd64/fpu/
DREADME2 the Intel and AMD FPU using the libm function fegetenv(3). Implement
5 Load the FPU enviroment directy after exec with an assembly program.
6 Get the FPU default FPU status from libm.
7 Load the FPU enviroment with fegetenv(3).
8 Read the FPU storage area from proc0 via /dev/mem.
/openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/
DSystemZScheduleZ196.td83 def : WriteRes<FPU, [Z196_FPUnit]>;
88 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>;
718 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
719 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
744 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
748 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
749 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
754 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
756 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
757 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
[all …]
DSystemZScheduleZEC12.td84 def : WriteRes<FPU, [ZEC12_FPUnit]>;
89 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [ZEC12_FPUnit]>;
756 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
757 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
782 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
786 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
787 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
792 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
794 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
795 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
[all …]
/openbsd/src/gnu/llvm/lldb/source/Plugins/Process/Utility/
DRegisterInfoPOSIX_arm.cpp25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \
29 sizeof(RegisterInfoPOSIX_arm::FPU))
32 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
43 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
163 return sizeof(struct RegisterInfoPOSIX_arm::FPU); in GetFPRSize()
DRegisterContextDarwin_x86_64.h80 struct FPU { struct
112 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument
119 FPU fpu;
190 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
196 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextDarwin_arm64.h80 struct FPU { struct
114 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
123 FPU fpu;
204 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
212 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextDarwin_i386.h75 struct FPU { struct
107 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument
114 FPU fpu;
185 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
191 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextMach_x86_64.cpp31 FPU &fpu) { in DoReadFPU()
50 const FPU &fpu) { in DoWriteFPU()
52 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_i386.cpp29 int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
47 const FPU &fpu) { in DoWriteFPU()
49 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextDarwin_arm.h98 struct FPU { struct
148 FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
156 FPU fpu;
237 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
245 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextMach_arm.cpp31 int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
54 const FPU &fpu) { in DoWriteFPU()
56 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_i386.h24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
30 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextMach_x86_64.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextMach_arm.h24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
32 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
/openbsd/src/gnu/gcc/gcc/config/sh/
Dsh.opt25 ;; Set if the default precision of th FPU is single.
57 Generate SH2a FPU-less code
93 Generate SH4 FPU-less code
97 Generate code for SH4 400 series (MMU/FPU-less)
102 Generate code for SH4 500 series (FPU-less).
135 Generate SH4a FPU-less code
155 Generate 32-bit FPU-less SHmedia code
163 Generate 64-bit FPU-less SHmedia code
171 Generate FPU-less SHcompact code
/openbsd/src/gnu/llvm/lldb/source/Plugins/Process/MacOSX-Kernel/
DRegisterContextKDP_x86_64.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextKDP_i386.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextKDP_arm64.h26 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
34 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextKDP_arm.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
33 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextKDP_i386.cpp38 int RegisterContextKDP_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
85 const FPU &fpu) { in DoWriteFPU()
DRegisterContextKDP_x86_64.cpp40 FPU &fpu) { in DoReadFPU()
88 const FPU &fpu) { in DoWriteFPU()
/openbsd/src/gnu/gcc/gcc/config/sparc/
Dsparc.opt23 Target Report Mask(FPU)
27 Target RejectNegative Mask(FPU) MaskExists
31 Target RejectNegative InverseMask(FPU)

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