| /openbsd/src/gnu/usr.bin/binutils-2.17/opcodes/ |
| D | v850-opc.c | 457 #define IMM5 (IMM32 + 1) macro
461 #define R2DISPOSE (IMM5 + 1)
556 { "prepare", two (0x0780, 0x0003), two (0xffc0, 0x001f), {LIST12, IMM5, SP}, 0, PROCESSOR_NOT_…
557 { "prepare", two (0x0780, 0x000b), two (0xffc0, 0x001f), {LIST12, IMM5, IMM16}, 0, PROCESSOR_N…
558 { "prepare", two (0x0780, 0x0013), two (0xffc0, 0x001f), {LIST12, IMM5, IMM16}, 0, PROCESSOR_N…
559 { "prepare", two (0x0780, 0x001b), two (0xffc0, 0x001f), {LIST12, IMM5, IMM32}, 0, PROCESSOR_N…
560 { "prepare", two (0x0780, 0x0001), two (0xffc0, 0x001f), {LIST12, IMM5}, 0, PROCESSOR_NOT_V850…
561 { "dispose", one (0x0640), one (0xffc0), {IMM5, LIST12, R2DISPOSE},0, PROCESSOR_…
562 { "dispose", two (0x0640, 0x0000), two (0xffc0, 0x001f), {IMM5, LIST12}, 0, PROCESSOR_NOT_V850 …
|
| D | d30v-opc.c | 364 #define IMM5 (Ab + 1) macro
366 #define IMM5U (IMM5 + 1)
457 { SHORT_T, 2, { IMM5 } }, /* imm5s3 (trap) */
459 { SHORT_A5, 2, { Ra, Rb, IMM5 } }, /* Ra,Rb,imm5 (sat*) */
470 { SHORT_MODINC, 1, { Rb2, IMM5 } }, /* Rb2,imm5 (modinc) */
471 { SHORT_MODDEC, 3, { Rb2, IMM5 } }, /* Rb2,imm5 (moddec) */
|
| D | ChangeLog-9297 | 273 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
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| /openbsd/src/gnu/usr.bin/binutils/opcodes/ |
| D | v850-opc.c | 532 #define IMM5 (IMM32 + 1) macro
536 #define R2DISPOSE (IMM5 + 1)
631 { "prepare", two (0x0780, 0x0003), two (0xffc0, 0x001f), {LIST12, IMM5, SP}, 0, PROCESSOR_NOT_…
632 { "prepare", two (0x0780, 0x000b), two (0xffc0, 0x001f), {LIST12, IMM5, IMM16}, 0, PROCESSOR_N…
633 { "prepare", two (0x0780, 0x0013), two (0xffc0, 0x001f), {LIST12, IMM5, IMM16}, 0, PROCESSOR_N…
634 { "prepare", two (0x0780, 0x001b), two (0xffc0, 0x001f), {LIST12, IMM5, IMM32}, 0, PROCESSOR_N…
635 { "prepare", two (0x0780, 0x0001), two (0xffc0, 0x001f), {LIST12, IMM5}, 0, PROCESSOR_NOT_V850…
636 { "dispose", one (0x0640), one (0xffc0), {IMM5, LIST12, R2DISPOSE},0, PROCESSOR_…
637 { "dispose", two (0x0640, 0x0000), two (0xffc0, 0x001f), {IMM5, LIST12}, 0, PROCESSOR_NOT_V850 …
|
| D | d30v-opc.c | 360 #define IMM5 (Ab + 1) macro
362 #define IMM5U (IMM5 + 1)
452 { SHORT_T, 2, { IMM5 } }, /* imm5s3 (trap) */
454 { SHORT_A5, 2, { Ra, Rb, IMM5 } }, /* Ra,Rb,imm5 (sat*) */
465 { SHORT_MODINC, 1, { Rb2, IMM5 } }, /* Rb2,imm5 (modinc) */
466 { SHORT_MODDEC, 3, { Rb2, IMM5 } }, /* Rb2,imm5 (moddec) */
|
| D | ChangeLog-9297 | 273 Make IMM5 unsigned. Create IMM6U and IMM12S3U operand
|
| /openbsd/src/gnu/usr.bin/binutils/include/opcode/ |
| D | h8300.h | 124 IMM5 = IMM | L_5, enumerator
1751 …{O (O_SHLL, SB), AV_H8SX, 0, "shll.b", {{IMM5, RD8, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x0, …
1760 …{O (O_SHLL, SW), AV_H8SX, 0, "shll.w", {{IMM5, RD16, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x0, …
1770 …{O (O_SHLL, SL), AV_H8SX, 0, "shll.l", {{IMM5, RD32, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x0, …
1778 …{O (O_SHLR, SB), AV_H8SX, 0, "shlr.b", {{IMM5, RD8, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x1, …
1787 …{O (O_SHLR, SW), AV_H8SX, 0, "shlr.w", {{IMM5, RD16, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x1, …
1797 …{O (O_SHLR, SL), AV_H8SX, 0, "shlr.l", {{IMM5, RD32, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x1, …
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| /openbsd/src/gnu/usr.bin/binutils-2.17/include/opcode/ |
| D | h8300.h | 125 IMM5 = IMM | L_5, enumerator
1752 …{O (O_SHLL, SB), AV_H8SX, 0, "shll.b", {{IMM5, RD8, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x0, …
1761 …{O (O_SHLL, SW), AV_H8SX, 0, "shll.w", {{IMM5, RD16, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x0, …
1771 …{O (O_SHLL, SL), AV_H8SX, 0, "shll.l", {{IMM5, RD32, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x0, …
1779 …{O (O_SHLR, SB), AV_H8SX, 0, "shlr.b", {{IMM5, RD8, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x1, …
1788 …{O (O_SHLR, SW), AV_H8SX, 0, "shlr.w", {{IMM5, RD16, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x1, …
1798 …{O (O_SHLR, SL), AV_H8SX, 0, "shlr.l", {{IMM5, RD32, E}}, {{0x0, 0x3, B31 | IMM5, DATA, 0x1, 0x1, …
|