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Searched refs:IXGB_WRITE_REG (Results 1 – 4 of 4) sorted by relevance

/openbsd/src/sys/dev/pci/
Dixgb_ee.c77 IXGB_WRITE_REG(hw, EECD, *eecd_reg); in ixgb_raise_clock()
94 IXGB_WRITE_REG(hw, EECD, *eecd_reg); in ixgb_lower_clock()
129 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_shift_out_bits()
142 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_shift_out_bits()
202 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_setup_eeprom()
206 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_setup_eeprom()
224 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_standby_eeprom()
229 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_standby_eeprom()
234 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_standby_eeprom()
239 IXGB_WRITE_REG(hw, EECD, eecd_reg); in ixgb_standby_eeprom()
[all …]
Dixgb_hw.c94 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg); in ixgb_mac_reset()
112 IXGB_WRITE_REG(hw, CTRL1, ctrl_reg); in ixgb_mac_reset()
148 IXGB_WRITE_REG(hw, IMC, 0xFFFFFFFF); in ixgb_adapter_stop()
153 IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN); in ixgb_adapter_stop()
154 IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN); in ixgb_adapter_stop()
167 IXGB_WRITE_REG(hw, IMC, 0xffffffff); in ixgb_adapter_stop()
322 IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST); in ixgb_init_hw()
702 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg); in ixgb_setup_fc()
705 IXGB_WRITE_REG(hw, PAP, pap_reg); in ixgb_setup_fc()
714 IXGB_WRITE_REG(hw, FCRTL, 0); in ixgb_setup_fc()
[all …]
Dif_ixgb.c319 IXGB_WRITE_REG(&sc->hw, TDT, sc->next_avail_tx_desc); in ixgb_start()
492 IXGB_WRITE_REG(&sc->hw, MFRMS, in ixgb_init()
496 IXGB_WRITE_REG(&sc->hw, CTRL0, temp_reg); in ixgb_init()
546 IXGB_WRITE_REG(&sc->hw, IMC, IXGB_INT_RXDMT0); in ixgb_intr()
547 IXGB_WRITE_REG(&sc->hw, IMS, IXGB_INT_RXDMT0); in ixgb_intr()
729 IXGB_WRITE_REG(&sc->hw, RCTL, reg_rctl); in ixgb_set_promisc()
772 IXGB_WRITE_REG(&sc->hw, RCTL, reg_rctl); in ixgb_set_multi()
1207 IXGB_WRITE_REG(&sc->hw, TDBAL, (u_int32_t)bus_addr); in ixgb_initialize_transmit_unit()
1208 IXGB_WRITE_REG(&sc->hw, TDBAH, (u_int32_t)(bus_addr >> 32)); in ixgb_initialize_transmit_unit()
1209 IXGB_WRITE_REG(&sc->hw, TDLEN, in ixgb_initialize_transmit_unit()
[all …]
Dif_ixgb_osdep.h83 #define IXGB_WRITE_REG(a, reg, value) \ macro