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Searched refs:IssueWidth (Results 1 – 25 of 92) sorted by relevance

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/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DScoreboardHazardRecognizer.cpp73 IssueWidth = ItinData->SchedModel.IssueWidth; in ScoreboardHazardRecognizer()
105 if (IssueWidth == 0) in atIssueLimit()
108 return IssueCount == IssueWidth; in atIssueLimit()
DTargetSchedule.cpp55 ResourceLCM = SchedModel.IssueWidth; in init()
61 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth; in init()
/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/
DMachinePipeliner.h469 int IssueWidth; variable
499 IssueWidth(SM.IssueWidth) { in ResourceManager()
501 if (IssueWidth <= 0) in ResourceManager()
503 IssueWidth = 100; in ResourceManager()
505 IssueWidth = SwpForceIssueWidth; in ResourceManager()
DScoreboardHazardRecognizer.h99 unsigned IssueWidth = 0; variable
DTargetSchedule.h98 unsigned getIssueWidth() const { return SchedModel.IssueWidth; } in getIssueWidth()
/openbsd/src/gnu/llvm/llvm/lib/MC/
DMCSchedule.cpp107 return ((double)SCDesc.NumMicroOps) / SM.IssueWidth; in getReciprocalThroughput()
120 return 1.0 / IssueWidth; in getReciprocalThroughput()
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86PadShortFunction.cpp221 unsigned IssueWidth = TSM.getIssueWidth(); in addPadding() local
223 for (unsigned i = 0, e = IssueWidth * NOOPsToAdd; i != e; ++i) in addPadding()
/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonScheduleV69.td31 let IssueWidth = 4;
DHexagonScheduleV71.td30 let IssueWidth = 4;
DHexagonScheduleV73.td30 let IssueWidth = 4;
DHexagonScheduleV62.td28 let IssueWidth = 4;
DHexagonScheduleV65.td31 let IssueWidth = 4;
DHexagonScheduleV55.td39 let IssueWidth = 4;
DHexagonScheduleV68.td30 let IssueWidth = 4;
DHexagonScheduleV5.td37 let IssueWidth = 4;
DHexagonScheduleV67.td31 let IssueWidth = 4;
DHexagonScheduleV66.td31 let IssueWidth = 4;
DHexagonScheduleV71T.td51 let IssueWidth = 3;
DHexagonScheduleV67T.td53 let IssueWidth = 3;
DHexagonScheduleV60.td72 let IssueWidth = 4;
/openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/
DLanaiSchedule.td39 let IssueWidth = 1;
/openbsd/src/gnu/llvm/llvm/tools/llvm-mca/Views/
DSummaryView.cpp27 : SM(Model), Source(S), DispatchWidth(Width ? Width : Model.IssueWidth), in SummaryView()
/openbsd/src/gnu/llvm/llvm/include/llvm/MC/
DMCSchedule.h256 unsigned IssueWidth; member
/openbsd/src/gnu/llvm/llvm/lib/MCA/Stages/
DDispatchStage.cpp35 DispatchWidth = Subtarget.getSchedModel().IssueWidth; in DispatchStage()
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCScheduleA2.td159 let IssueWidth = 1; // 1 instruction is dispatched per cycle.

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