| /openbsd/src/gnu/llvm/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.h | 128 MRM4r = 52, MRM5r = 53, MRM6r = 54, MRM7r = 55, enumerator
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| D | X86RecognizableInstr.cpp | 697 case X86Local::MRM6r: in emitInstructionSpecifier()
837 case X86Local::MRM6r: case X86Local::MRM7r: in emitDecodePath()
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| D | X86FoldTablesEmitter.cpp | 372 (MemForm == X86Local::MRM6m && RegForm == X86Local::MRM6r) || in areOppositeForms()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 730 MRM4r = 52, MRM5r = 53, MRM6r = 54, MRM7r = 55, // Format /4 /5 /6 /7 enumerator
1148 case X86II::MRM6r: case X86II::MRM7r: in getMemoryOperandNo()
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| D | X86MCCodeEmitter.cpp | 1053 case X86II::MRM6r: in emitVEXOpcodePrefix()
1226 case X86II::MRM6r: in emitREXPrefix()
1608 case X86II::MRM6r: in encodeInstruction()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86InstrMMX.td | 403 defm MMX_PSLLW : MMXI_binop_rmi_int<0xF1, 0x71, MRM6r, "psllw",
407 defm MMX_PSLLD : MMXI_binop_rmi_int<0xF2, 0x72, MRM6r, "pslld",
411 defm MMX_PSLLQ : MMXI_binop_rmi_int<0xF3, 0x73, MRM6r, "psllq",
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| D | X86InstrFPStack.td | 359 def DIV_FST0r : FPST0rInst <MRM6r, "fdiv\t{$op, %st|st, $op}">;
360 def DIVR_FrST0 : FPrST0Inst <MRM6r, "fdiv{|r}\t{%st, $op|$op, st}">;
361 def DIVR_FPrST0 : FPrST0PInst<MRM6r, "fdiv{|r}p\t{%st, $op|$op, st}">;
715 def COM_FIr : FPI<0xDB, MRM6r, (outs), (ins RSTi:$reg),
717 def COM_FIPr : FPI<0xDF, MRM6r, (outs), (ins RSTi:$reg),
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| D | X86InstrInfo.td | 1356 def PUSH16rmr: I<0xFF, MRM6r, (outs), (ins GR16:$reg), "push{w}\t$reg",[]>,
1358 def PUSH32rmr: I<0xFF, MRM6r, (outs), (ins GR32:$reg), "push{l}\t$reg",[]>,
1442 def PUSH64rmr: I<0xFF, MRM6r, (outs), (ins GR64:$reg), "push{q}\t$reg", []>,
2029 def BTR16ri8 : Ii8<0xBA, MRM6r, (outs GR16:$dst), (ins GR16:$src1, i16u8imm:$src2),
2032 def BTR32ri8 : Ii8<0xBA, MRM6r, (outs GR32:$dst), (ins GR32:$src1, i32u8imm:$src2),
2035 def BTR64ri8 : RIi8<0xBA, MRM6r, (outs GR64:$dst), (ins GR64:$src1, i64u8imm:$src2),
2420 def RDRAND16r : I<0xC7, MRM6r, (outs GR16:$dst), (ins),
2423 def RDRAND32r : I<0xC7, MRM6r, (outs GR32:$dst), (ins),
2426 def RDRAND64r : RI<0xC7, MRM6r, (outs GR64:$dst), (ins),
2751 defm BLCI : tbm_binary_intr<0x02, "blci", WriteALU, MRM6r, MRM6m>;
[all …]
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| D | X86InstrArithmetic.td | 284 def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
287 def DIV16r : I<0xF7, MRM6r, (outs), (ins GR16:$src), // DX:AX/r16 = AX,DX
290 def DIV32r : I<0xF7, MRM6r, (outs), (ins GR32:$src), // EDX:EAX/r32 = EAX,EDX
294 def DIV64r : RI<0xF7, MRM6r, (outs), (ins GR64:$src),
1198 defm XOR : ArithBinOp_RF<0x30, 0x32, 0x34, "xor", MRM6r, MRM6m,
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| D | X86InstrSystem.td | 453 def LMSW16r : I<0x01, MRM6r, (outs), (ins GR16:$src),
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| D | X86InstrFormats.td | 54 def MRM6r : Format<54>; def MRM7r : Format<55>;
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| D | X86InstrSSE.td | 3652 defm PSLLW : PDI_binop_rmi_all<0xF1, 0x71, MRM6r, "psllw", X86vshl, X86vshli,
3655 defm PSLLD : PDI_binop_rmi_all<0xF2, 0x72, MRM6r, "pslld", X86vshl, X86vshli,
3658 defm PSLLQ : PDI_binop_rmi_all<0xF3, 0x73, MRM6r, "psllq", X86vshl, X86vshli,
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| D | X86InstrAVX512.td | 6299 defm VPSLL : avx512_shift_rmi_dq<0x72, 0x73, MRM6r, MRM6m, "vpsll", X86vshli,
6301 avx512_shift_rmi_w<0x71, MRM6r, MRM6m, "vpsllw", X86vshli,
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| /openbsd/src/gnu/llvm/llvm/tools/llvm-exegesis/lib/X86/ |
| D | Target.cpp | 86 case X86II::MRM6r: in isInvalidMemoryInstr()
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| /openbsd/src/gnu/llvm/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1905 case X86II::MRM6r: case X86II::MRM7r: // to hold extended opcode data
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