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Searched refs:SETLT (Results 1 – 25 of 55) sorted by relevance

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/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/
DISDOpcodes.h1451 SETLT, // 1 X 1 0 0 True if less than enumerator
1462 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/openbsd/src/gnu/llvm/llvm/lib/Target/VE/
DVE.h216 case ISD::SETLT: in intCondCode2Icc()
248 case ISD::SETLT: in fpCondCode2Fcc()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DAnalysis.cpp213 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT; in getFCmpCodeWithoutNaN()
229 case ICmpInst::ICMP_SLT: return ISD::SETLT; in getICmpCondCode()
252 case ISD::SETLT: in getICmpCondCode()
DTargetLoweringBase.cpp682 CCs[RTLIB::OLT_F32] = ISD::SETLT; in InitCmpLibcallCCs()
683 CCs[RTLIB::OLT_F64] = ISD::SETLT; in InitCmpLibcallCCs()
684 CCs[RTLIB::OLT_F128] = ISD::SETLT; in InitCmpLibcallCCs()
685 CCs[RTLIB::OLT_PPCF128] = ISD::SETLT; in InitCmpLibcallCCs()
/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/
DRISCVISelDAGToDAG.h122 case ISD::SETLT: in getRISCVCCForIntCC()
DRISCVInstrInfoD.td310 // FIXME: SETEQ/SETLT/SETLE imply nonans, can we pick better instructions for
316 def : PatSetCC<FPR64, strict_fsetcc, SETLT, PseudoQuietFLT_D>;
334 def : PatSetCC<FPR64, any_fsetccs, SETLT, FLT_D>;
DRISCVInstrInfoZfh.td310 // FIXME: SETEQ/SETLT/SETLE imply nonans, can we pick better instructions for
316 def : PatSetCC<FPR16, strict_fsetcc, SETLT, PseudoQuietFLT_H>;
334 def : PatSetCC<FPR16, any_fsetccs, SETLT, FLT_H>;
DRISCVInstrInfoVSDPatterns.td683 defm : VPatIntegerSetCCSDNode_VV_Swappable<"PseudoVMSLT", SETLT, SETGT>;
690 defm : VPatIntegerSetCCSDNode_VX_Swappable<"PseudoVMSLT", SETLT, SETGT>;
694 defm : VPatIntegerSetCCSDNode_VX_Swappable<"PseudoVMSGT", SETGT, SETLT>;
705 defm : VPatIntegerSetCCSDNode_VIPlus1<"PseudoVMSLE", SETLT,
959 defm : VPatFPSetCCSDNode_VV_VF_FV<SETLT, "PseudoVMFLT", "PseudoVMFGT">;
DRISCVInstrInfoF.td559 // FIXME: SETEQ/SETLT/SETLE imply nonans, can we pick better instructions for
565 def : PatSetCC<FPR32, strict_fsetcc, SETLT, PseudoQuietFLT_S>;
583 def : PatSetCC<FPR32, any_fsetccs, SETLT, FLT_S>;
DRISCVInstrInfoVVLPatterns.td1445 defm : VPatIntegerSetCCVL_VV_Swappable<vti, "PseudoVMSLT", SETLT, SETGT>;
1452 defm : VPatIntegerSetCCVL_VX_Swappable<vti, "PseudoVMSLT", SETLT, SETGT>;
1456 defm : VPatIntegerSetCCVL_VX_Swappable<vti, "PseudoVMSGT", SETGT, SETLT>;
1464 defm : VPatIntegerSetCCVL_VI_Swappable<vti, "PseudoVMSGT", SETGT, SETLT>;
1467 defm : VPatIntegerSetCCVL_VIPlus1_Swappable<vti, "PseudoVMSLE", SETLT, SETGT,
1651 defm : VPatFPSetCCVL_VV_VF_FV<SETLT, "PseudoVMFLT", "PseudoVMFGT">;
/openbsd/src/gnu/llvm/llvm/lib/Target/BPF/
DBPFISelLowering.cpp582 case ISD::SETLT: in NegateCC()
791 SET_NEWCC(SETLT, JSLT); in EmitInstrWithCustomInserter()
802 CC == ISD::SETLT || in EmitInstrWithCustomInserter()
DBPFInstrInfo.td99 [{return (N->getZExtValue() == ISD::SETLT);}]>;
119 [{return (N->getZExtValue() == ISD::SETLT);}]>;
/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp262 setCondCodeAction(ISD::SETLT, T, Expand); in initializeHVXLowering()
342 setCondCodeAction(ISD::SETLT, MVT::v64f16, Expand); in initializeHVXLowering()
355 setCondCodeAction(ISD::SETLT, MVT::v32f32, Expand); in initializeHVXLowering()
2424 DAG.getSetCC(dl, PredTy, And, getZero(dl, ResTy, DAG), ISD::SETLT); in emitHvxAddWithOverflow()
2590 SDValue Q0 = DAG.getSetCC(dl, PredTy, A, Zero, ISD::SETLT); in emitHvxMulLoHiV60()
2591 SDValue Q1 = DAG.getSetCC(dl, PredTy, B, Zero, ISD::SETLT); in emitHvxMulLoHiV60()
2600 SDValue Q1 = DAG.getSetCC(dl, PredTy, B, Zero, ISD::SETLT); in emitHvxMulLoHiV60()
2642 SDValue Q0 = DAG.getSetCC(dl, PredTy, A, Zero, ISD::SETLT); in emitHvxMulLoHiV62()
2643 SDValue Q1 = DAG.getSetCC(dl, PredTy, B, Zero, ISD::SETLT); in emitHvxMulLoHiV62()
2656 SDValue Q0 = DAG.getSetCC(dl, PredTy, A, Zero, ISD::SETLT); in emitHvxMulLoHiV62()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp335 case ISD::SETLT: in softenSetCCOperands()
797 if (CC == ISD::SETLT && Op1.getValueType().isInteger() && in SimplifyMultipleUseDemandedBits()
1672 if (CC == ISD::SETLT && Op1.getValueType().isInteger() && in SimplifyDemandedBits()
3761 Cond == ISD::SETEQ ? ISD::SETGE : ISD::SETLT); in foldSetCCWithAnd()
4466 case ISD::SETLT: in SimplifySetCC()
4633 Cond == ISD::SETEQ ? ISD::SETLT : ISD::SETGE); in SimplifySetCC()
4685 ISD::CondCode NewCC = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; in SimplifySetCC()
4697 if (Cond == ISD::SETLT || Cond == ISD::SETULT) { in SimplifySetCC()
4812 ISD::SETLT); in SimplifySetCC()
5093 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X in SimplifySetCC()
[all …]
DLegalizeIntegerTypes.cpp2868 return std::make_pair(ISD::SETLT, ISD::UMIN); in getExpandedMinMaxOps()
3339 DAG.getConstant(0, dl, NVT), ISD::SETLT); in ExpandIntRes_ABS()
3845 SDValue ProdNeg = DAG.getSetCC(dl, BoolVT, Xor, Zero, ISD::SETLT); in ExpandIntRes_MULFIX()
3986 SDValue HHLT = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTNeg1, ISD::SETLT); in ExpandIntRes_MULFIX()
3995 SDValue HLNeg = DAG.getSetCC(dl, BoolNVT, ResultHL, NVTZero, ISD::SETLT); in ExpandIntRes_MULFIX()
3999 SDValue HHLT = DAG.getSetCC(dl, BoolNVT, ResultHH, NVTNeg1, ISD::SETLT); in ExpandIntRes_MULFIX()
4013 SatMin = DAG.getSetCC(dl, BoolNVT, ResultHH, HHHiMask, ISD::SETLT); in ExpandIntRes_MULFIX()
4108 Ovf = DAG.getSetCC(dl, OType, Ovf, DAG.getConstant(0, dl, VT), ISD::SETLT); in ExpandIntRes_SADDSUBO()
4910 if ((CCCode == ISD::SETLT && CST->isZero()) || // X < 0 in IntegerExpandSetCCOperands()
4921 case ISD::SETLT: in IntegerExpandSetCCOperands()
[all …]
DSelectionDAGDumper.cpp470 case ISD::SETLT: return "setlt"; in getOperationName()
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp3265 case ISD::SETLT: { in get32BitZExtCompare()
3444 case ISD::SETLT: { in get32BitSExtCompare()
3599 case ISD::SETLT: { in get64BitZExtCompare()
3759 case ISD::SETLT: { in get64BitSExtCompare()
4072 case ISD::SETLT: in SelectCC()
4099 case ISD::SETLT: in SelectCC()
4150 case ISD::SETLT: in getPredicateForSetCC()
4177 case ISD::SETLT: return 0; // Bit #0 = SETOLT in getCRIdxForSetCC()
4214 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
4260 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break; in getVCmpInst()
[all …]
DPPCInstrInfo.td3377 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETLT)),
3517 defm : ExtSetCCPat<SETLT,
3549 defm : ExtSetCCPat<SETLT,
3624 def : Pat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETLT)),
3652 def : Pat<(i1 (setcc i32:$s1, i32:$s2, SETLT)),
3664 def : Pat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETLT)),
3692 def : Pat<(i1 (setcc i64:$s1, i64:$s2, SETLT)),
3779 def : Pat<(i1 (SetCC Ty:$s1, Ty:$s2, SETLT)),
3823 def : Pat<(i1 (any_fsetccs f32:$s1, f32:$s2, SETLT)),
3850 def : Pat<(i1 (any_fsetccs f64:$s1, f64:$s2, SETLT)),
[all …]
DPPCInstrSPE.td838 def : Pat<(f32 (selectcc i1:$lhs, i1:$rhs, f32:$tval, f32:$fval, SETLT)),
859 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLT)),
/openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td76 defm LT_S : ComparisonInt<SETLT, "lt_s", 0x48, 0x53>;
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h1252 X86_INTRINSIC_DATA(sse_comilt_ss, COMI, X86ISD::COMI, ISD::SETLT),
1269 X86_INTRINSIC_DATA(sse_ucomilt_ss, COMI, X86ISD::UCOMI, ISD::SETLT),
1277 X86_INTRINSIC_DATA(sse2_comilt_sd, COMI, X86ISD::COMI, ISD::SETLT),
1324 X86_INTRINSIC_DATA(sse2_ucomilt_sd, COMI, X86ISD::UCOMI, ISD::SETLT),
/openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp202 { RTLIB::OLT_F64, "__mspabi_cmpd", ISD::SETLT }, in MSP430TargetLowering()
208 { RTLIB::OLT_F32, "__mspabi_cmpf", ISD::SETLT }, in MSP430TargetLowering()
1109 case ISD::SETLT: in EmitCMP()
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DAMDGPUInstructions.td329 def COND_OLT : PatFrags<(ops), [(OtherVT SETOLT), (OtherVT SETLT)]>;
355 def COND_SLT : PatFrag<(ops), (OtherVT SETLT)>;
/openbsd/src/gnu/llvm/llvm/lib/Target/AVR/
DAVRISelLowering.cpp616 case ISD::SETLT: in intCCToAVRCC()
689 CC = ISD::SETLT; in getAVRCmp()
704 CC = ISD::SETLT; in getAVRCmp()
707 case ISD::SETLT: { in getAVRCmp()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARC/
DARCISelLowering.cpp60 case ISD::SETLT: in ISDCCtoARCCC()

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