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Searched refs:SRegs (Results 1 – 2 of 2) sorted by relevance

/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonFrameLowering.cpp1560 BitVector SRegs(Hexagon::NUM_TARGET_REGS); in assignCalleeSavedSpillSlots() local
1573 SRegs[*SR] = true; in assignCalleeSavedSpillSlots()
1576 LLVM_DEBUG(dbgs() << "SRegs.1: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()
1605 SRegs[*SR] = false; in assignCalleeSavedSpillSlots()
1609 LLVM_DEBUG(dbgs() << "SRegs.2: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()
1617 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()
1635 SRegs |= TmpSup; in assignCalleeSavedSpillSlots()
1636 LLVM_DEBUG(dbgs() << "SRegs.4: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()
1641 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()
1644 if (!SRegs[*SR]) in assignCalleeSavedSpillSlots()
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/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp5408 SmallVector<Register, 8> SRegs; in readlaneVGPRToSGPR() local
5414 SRegs.push_back(SGPR); in readlaneVGPRToSGPR()
5421 MIB.addReg(SRegs[i]); in readlaneVGPRToSGPR()