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Searched refs:ScratchReg (Results 1 – 23 of 23) sorted by relevance

/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/
DRISCVExpandAtomicPseudoInsts.cpp222 Register ScratchReg = MI.getOperand(1).getReg(); in doAtomicBinOpExpansion() local
239 BuildMI(LoopMBB, DL, TII->get(RISCV::AND), ScratchReg) in doAtomicBinOpExpansion()
242 BuildMI(LoopMBB, DL, TII->get(RISCV::XORI), ScratchReg) in doAtomicBinOpExpansion()
243 .addReg(ScratchReg) in doAtomicBinOpExpansion()
247 BuildMI(LoopMBB, DL, TII->get(getSCForRMW(Ordering, Width)), ScratchReg) in doAtomicBinOpExpansion()
249 .addReg(ScratchReg); in doAtomicBinOpExpansion()
251 .addReg(ScratchReg) in doAtomicBinOpExpansion()
259 Register MaskReg, Register ScratchReg) { in insertMaskedMerge() argument
260 assert(OldValReg != ScratchReg && "OldValReg and ScratchReg must be unique"); in insertMaskedMerge()
262 assert(ScratchReg != MaskReg && "ScratchReg and MaskReg must be unique"); in insertMaskedMerge()
[all …]
DRISCVRegisterInfo.cpp189 Register ScratchReg = DestReg; in adjustReg() local
191 ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in adjustReg()
192 TII->getVLENFactoredAmount(MF, MBB, II, DL, ScratchReg, ScalableValue, Flag); in adjustReg()
194 .addReg(SrcReg).addReg(ScratchReg, RegState::Kill) in adjustReg()
242 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in adjustReg() local
243 TII->movImm(MBB, II, DL, ScratchReg, Val, Flag); in adjustReg()
246 .addReg(ScratchReg, RegState::Kill) in adjustReg()
DRISCVExpandPseudoInsts.cpp325 Register ScratchReg = in expandAuipcInstPair() local
333 BuildMI(MBB, MBBI, DL, TII->get(RISCV::AUIPC), ScratchReg).add(Symbol); in expandAuipcInstPair()
338 .addReg(ScratchReg) in expandAuipcInstPair()
DRISCVInstrInfo.cpp967 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in insertIndirectBranch() local
971 .addReg(ScratchReg, RegState::Define | RegState::Dead) in insertIndirectBranch()
1004 MRI.replaceRegWith(ScratchReg, TmpGPR); in insertIndirectBranch()
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp656 Register ScratchReg; in emitPrologue() local
689 &MBB, false, twoUniqueScratchRegsRequired(&MBB), &ScratchReg, &TempReg); in emitPrologue()
693 SingleScratchReg = ScratchReg == TempReg; in emitPrologue()
817 BuildMI(MBB, MBBI, dl, MFLRInst, ScratchReg); in emitPrologue()
846 .addReg(ScratchReg, getKillRegState(!HasROPProtect)) in emitPrologue()
864 .addReg(ScratchReg, getKillRegState(true)) in emitPrologue()
924 .addDef(ScratchReg) // ScratchReg stores the old sp. in emitPrologue()
930 BuildMI(MBB, MBBI, dl, TII.get(PPC::SUBF), ScratchReg) in emitPrologue()
931 .addReg(ScratchReg) in emitPrologue()
938 BuildMI(MBB, MBBI, dl, TII.get(PPC::RLDICL), ScratchReg) in emitPrologue()
[all …]
DPPCAsmPrinter.cpp474 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); in LowerPATCHPOINT() local
478 .addReg(ScratchReg) in LowerPATCHPOINT()
482 .addReg(ScratchReg) in LowerPATCHPOINT()
483 .addReg(ScratchReg) in LowerPATCHPOINT()
487 .addReg(ScratchReg) in LowerPATCHPOINT()
488 .addReg(ScratchReg) in LowerPATCHPOINT()
492 .addReg(ScratchReg) in LowerPATCHPOINT()
493 .addReg(ScratchReg) in LowerPATCHPOINT()
513 .addReg(ScratchReg)); in LowerPATCHPOINT()
516 .addReg(ScratchReg) in LowerPATCHPOINT()
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DPPCISelLowering.cpp12275 Register ScratchReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca() local
12281 ScratchReg) in emitProbedAlloca()
12285 BuildMI(*MBB, {MI}, DL, TII->get(isPPC64 ? PPC::LI8 : PPC::LI), ScratchReg) in emitProbedAlloca()
12293 .addReg(ScratchReg); in emitProbedAlloca()
12297 .addReg(ScratchReg); in emitProbedAlloca()
12328 .addReg(ScratchReg); in emitProbedAlloca()
/openbsd/src/gnu/llvm/llvm/lib/Target/BPF/
DBPFInstrInfo.cpp50 Register ScratchReg = MI->getOperand(4).getReg(); in expandMEMCPY() local
79 .addReg(ScratchReg, RegState::Define).addReg(SrcReg) in expandMEMCPY()
82 .addReg(ScratchReg, RegState::Kill).addReg(DstReg) in expandMEMCPY()
93 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
95 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
100 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
102 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
107 .addReg(ScratchReg, RegState::Define).addReg(SrcReg).addImm(Offset); in expandMEMCPY()
109 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
DBPFISelLowering.cpp690 unsigned ScratchReg; in EmitInstrWithCustomInserterMemcpy() local
707 ScratchReg = MRI.createVirtualRegister(&BPF::GPRRegClass); in EmitInstrWithCustomInserterMemcpy()
708 MIB.addReg(ScratchReg, in EmitInstrWithCustomInserterMemcpy()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.cpp773 Register ScratchReg; in createScratchRegisterForInstruction() local
780 ScratchReg = MI.getOperand(1).getReg(); in createScratchRegisterForInstruction()
781 MI.getOperand(3).ChangeToRegister(ScratchReg, false, false, true); in createScratchRegisterForInstruction()
785 ScratchReg = in createScratchRegisterForInstruction()
788 .ChangeToRegister(ScratchReg, false, false, true); in createScratchRegisterForInstruction()
790 return ScratchReg; in createScratchRegisterForInstruction()
877 Register ScratchReg = in eliminateFrameIndex() local
879 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, in eliminateFrameIndex()
881 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(AArch64::LDG), ScratchReg) in eliminateFrameIndex()
882 .addReg(ScratchReg) in eliminateFrameIndex()
[all …]
DAArch64FalkorHWPFFix.cpp750 for (unsigned ScratchReg : AArch64::GPR64RegClass) { in runOnLoop() local
751 if (!LR.available(ScratchReg) || MRI.isReserved(ScratchReg)) in runOnLoop()
755 NewLdI.BaseReg = ScratchReg; in runOnLoop()
762 << printReg(ScratchReg, TRI) << '\n'); in runOnLoop()
770 BuildMI(*MBB, &MI, DL, TII->get(AArch64::ORRXrs), ScratchReg) in runOnLoop()
775 BaseOpnd.setReg(ScratchReg); in runOnLoop()
781 << printReg(ScratchReg, TRI) << '\n'); in runOnLoop()
783 ScratchReg); // Change tied operand pre/post update dest. in runOnLoop()
787 .addReg(ScratchReg) in runOnLoop()
DAArch64AsmPrinter.cpp995 Register ScratchReg = MI.getOperand(1).getReg(); in LowerJumpTableDest() local
997 STI->getRegisterInfo()->getSubReg(ScratchReg, AArch64::sub_32); in LowerJumpTableDest()
1032 .addReg(Size == 4 ? ScratchReg : ScratchRegW) in LowerJumpTableDest()
1043 .addReg(ScratchReg) in LowerJumpTableDest()
1130 Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg(); in LowerPATCHPOINT() local
1134 .addReg(ScratchReg) in LowerPATCHPOINT()
1138 .addReg(ScratchReg) in LowerPATCHPOINT()
1139 .addReg(ScratchReg) in LowerPATCHPOINT()
1143 .addReg(ScratchReg) in LowerPATCHPOINT()
1144 .addReg(ScratchReg) in LowerPATCHPOINT()
[all …]
DAArch64FrameLowering.cpp3438 Register ScratchReg = MRI->createVirtualRegister(&AArch64::GPR64RegClass); in emitUnrolled() local
3439 emitFrameOffset(*MBB, InsertI, DL, ScratchReg, BaseReg, in emitUnrolled()
3441 BaseReg = ScratchReg; in emitUnrolled()
DAArch64FastISel.cpp5034 const Register ScratchReg = createResultReg(&AArch64::GPR32RegClass); in selectAtomicCmpXchg() local
5039 .addDef(ScratchReg) in selectAtomicCmpXchg()
/openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/
DSystemZRegisterInfo.cpp343 Register ScratchReg = in eliminateFrameIndex() local
351 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); in eliminateFrameIndex()
353 MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg, in eliminateFrameIndex()
359 BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg) in eliminateFrameIndex()
364 TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); in eliminateFrameIndex()
365 BuildMI(MBB, MI, DL, TII->get(SystemZ::LA), ScratchReg) in eliminateFrameIndex()
366 .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg); in eliminateFrameIndex()
370 MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg, in eliminateFrameIndex()
DSystemZAsmPrinter.cpp715 unsigned ScratchReg = 0; in LowerPATCHPOINT() local
718 ScratchReg = MI.getOperand(ScratchIdx).getReg(); in LowerPATCHPOINT()
719 } while (ScratchReg == SystemZ::R0D); in LowerPATCHPOINT()
723 .addReg(ScratchReg) in LowerPATCHPOINT()
728 .addReg(ScratchReg) in LowerPATCHPOINT()
735 .addReg(ScratchReg)); in LowerPATCHPOINT()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMBaseRegisterInfo.cpp848 unsigned ScratchReg = 0; in eliminateFrameIndex() local
862 ScratchReg = MF.getRegInfo().createVirtualRegister(RegClass); in eliminateFrameIndex()
864 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex()
868 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, in eliminateFrameIndex()
872 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false,true); in eliminateFrameIndex()
DARMAsmPrinter.cpp2070 Register ScratchReg = MI->getOperand(1).getReg(); in emitInstruction() local
2080 .addReg(ScratchReg) in emitInstruction()
2120 .addReg(ScratchReg) in emitInstruction()
2133 Register ScratchReg = MI->getOperand(1).getReg(); in emitInstruction() local
2139 .addReg(ScratchReg) in emitInstruction()
2150 .addReg(ScratchReg) in emitInstruction()
2156 .addReg(ScratchReg) in emitInstruction()
2192 .addReg(ScratchReg) in emitInstruction()
DThumb1FrameLowering.cpp71 unsigned ScratchReg, unsigned MIFlags) { in emitPrologueEpilogueSPUpdate() argument
79 if (ScratchReg == ARM::NoRegister) in emitPrologueEpilogueSPUpdate()
84 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), ScratchReg) in emitPrologueEpilogueSPUpdate()
87 MRI.emitLoadConstPool(MBB, MBBI, dl, ScratchReg, 0, NumBytes, ARMCC::AL, in emitPrologueEpilogueSPUpdate()
92 .addReg(ScratchReg, RegState::Kill) in emitPrologueEpilogueSPUpdate()
DARMExpandPseudoInsts.cpp1539 unsigned ScratchReg = ARM::NoRegister; in CMSERestoreFPRegsV8() local
1541 ScratchReg = AvailableRegs.pop_back_val(); in CMSERestoreFPRegsV8()
1614 .addReg(ScratchReg, RegState::Define) in CMSERestoreFPRegsV8()
1619 .addReg(ScratchReg) in CMSERestoreFPRegsV8()
2246 unsigned ScratchReg = ClearRegs.front(); in ExpandMI() local
2259 BuildMI(MBB, MBBI, DL, TII->get(ARM::tMOVi8), ScratchReg) in ExpandMI()
2266 .addReg(ScratchReg) in ExpandMI()
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86FrameLowering.cpp3001 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true); in adjustForSegmentedStacks() local
3002 assert(!MF.getRegInfo().isLiveIn(ScratchReg) && in adjustForSegmentedStacks()
3069 ScratchReg = IsLP64 ? X86::RSP : X86::ESP; in adjustForSegmentedStacks()
3071 … BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP) in adjustForSegmentedStacks()
3074 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks()
3096 ScratchReg = X86::ESP; in adjustForSegmentedStacks()
3098 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP) in adjustForSegmentedStacks()
3103 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg) in adjustForSegmentedStacks()
3134 .addReg(ScratchReg) in adjustForSegmentedStacks()
3360 unsigned ScratchReg, SPReg, PReg, SPLimitOffset; in adjustForHiPEPrologue() local
[all …]
DX86MCInstLower.cpp1536 Register ScratchReg = MI.getOperand(ScratchIdx).getReg(); in LowerPATCHPOINT() local
1537 if (X86II::isX86_64ExtendedReg(ScratchReg)) in LowerPATCHPOINT()
1543 MCInstBuilder(X86::MOV64ri).addReg(ScratchReg).addOperand(CalleeMCOp)); in LowerPATCHPOINT()
1548 EmitAndCountInstruction(MCInstBuilder(X86::CALL64r).addReg(ScratchReg)); in LowerPATCHPOINT()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
DAArch64InstructionSelector.cpp3636 Register ScratchReg = MRI.createVirtualRegister(&AArch64::GPR64spRegClass); in selectBrJT() local
3640 {TargetReg, ScratchReg}, {JTAddr, Index}) in selectBrJT()