Home
last modified time | relevance | path

Searched refs:ShiftAmt (Results 1 – 25 of 60) sorted by relevance

123

/openbsd/src/gnu/llvm/llvm/lib/Support/
DKnownBits.cpp201 for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(), in shl() local
203 ShiftAmt <= MaxShiftAmt; ++ShiftAmt) { in shl()
205 if ((ShiftAmtZeroMask & ShiftAmt) != ShiftAmt || in shl()
206 (ShiftAmtOneMask | ShiftAmt) != ShiftAmt) in shl()
209 SpecificShift.Zero = LHS.Zero << ShiftAmt; in shl()
210 SpecificShift.One = LHS.One << ShiftAmt; in shl()
254 for (uint64_t ShiftAmt = MinShiftAmount.getZExtValue(), in lshr() local
256 ShiftAmt <= MaxShiftAmt; ++ShiftAmt) { in lshr()
258 if ((ShiftAmtZeroMask & ShiftAmt) != ShiftAmt || in lshr()
259 (ShiftAmtOneMask | ShiftAmt) != ShiftAmt) in lshr()
[all …]
DAPInt.cpp1018 void APInt::ashrSlowCase(unsigned ShiftAmt) { in ashrSlowCase() argument
1020 if (!ShiftAmt) in ashrSlowCase()
1027 unsigned WordShift = ShiftAmt / APINT_BITS_PER_WORD; in ashrSlowCase()
1028 unsigned BitShift = ShiftAmt % APINT_BITS_PER_WORD; in ashrSlowCase()
1067 void APInt::lshrSlowCase(unsigned ShiftAmt) { in lshrSlowCase() argument
1068 tcShiftRight(U.pVal, getNumWords(), ShiftAmt); in lshrSlowCase()
1079 void APInt::shlSlowCase(unsigned ShiftAmt) { in shlSlowCase() argument
1080 tcShiftLeft(U.pVal, getNumWords(), ShiftAmt); in shlSlowCase()
2231 unsigned ShiftAmt = (Radix == 16 ? 4 : (Radix == 8 ? 3 : 1)); in toString() local
2237 Tmp.lshrInPlace(ShiftAmt); in toString()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64ExpandImm.cpp69 unsigned ShiftAmt = 0; in tryToreplicateChunks() local
72 for (; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
73 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
81 AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt) }); in tryToreplicateChunks()
89 for (ShiftAmt += 16; ShiftAmt < 64; ShiftAmt += 16) { in tryToreplicateChunks()
90 Imm16 = (UImm >> ShiftAmt) & 0xFFFF; in tryToreplicateChunks()
96 AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt) }); in tryToreplicateChunks()
DAArch64ConditionOptimizer.cpp175 unsigned ShiftAmt = AArch64_AM::getShiftValue(I.getOperand(3).getImm()); in findSuitableCompare() local
179 } else if (I.getOperand(2).getImm() << ShiftAmt >= 0xfff) { in findSuitableCompare()
DAArch64ISelDAGToDAG.cpp532 unsigned ShiftAmt; in SelectArithImmed() local
535 ShiftAmt = 0; in SelectArithImmed()
537 ShiftAmt = 12; in SelectArithImmed()
542 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in SelectArithImmed()
2520 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local
2521 Mask <<= ShiftAmt; in getUsefulBitsFromOrWithShiftedReg()
2523 Mask.lshrInPlace(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
2528 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local
2529 Mask.lshrInPlace(ShiftAmt); in getUsefulBitsFromOrWithShiftedReg()
2531 Mask <<= ShiftAmt; in getUsefulBitsFromOrWithShiftedReg()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Analysis/
DDemandedBits.cpp156 uint64_t ShiftAmt = SA->urem(BitWidth); in determineLiveOperandBits() local
158 ShiftAmt = BitWidth - ShiftAmt; in determineLiveOperandBits()
161 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
163 AB = AOut.shl(BitWidth - ShiftAmt); in determineLiveOperandBits()
204 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
205 AB = AOut.lshr(ShiftAmt); in determineLiveOperandBits()
211 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1); in determineLiveOperandBits()
213 AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt); in determineLiveOperandBits()
221 uint64_t ShiftAmt = ShiftAmtC->getLimitedValue(BitWidth - 1); in determineLiveOperandBits() local
222 AB = AOut.shl(ShiftAmt); in determineLiveOperandBits()
[all …]
DValueTracking.cpp1033 for (unsigned ShiftAmt = 0; ShiftAmt < BitWidth; ++ShiftAmt) { in computeKnownBitsFromShiftOperator() local
1036 if ((ShiftAmt & ~ShiftAmtKZ) != ShiftAmt) in computeKnownBitsFromShiftOperator()
1038 if ((ShiftAmt | ShiftAmtKO) != ShiftAmt) in computeKnownBitsFromShiftOperator()
1043 if (ShiftAmt == 0) { in computeKnownBitsFromShiftOperator()
1052 Known, KF(Known2, KnownBits::makeConstant(APInt(32, ShiftAmt)))); in computeKnownBitsFromShiftOperator()
1669 uint64_t ShiftAmt = SA->urem(BitWidth); in computeKnownBitsFromOperator() local
1671 ShiftAmt = BitWidth - ShiftAmt; in computeKnownBitsFromOperator()
1678 Known2.Zero.shl(ShiftAmt) | Known3.Zero.lshr(BitWidth - ShiftAmt); in computeKnownBitsFromOperator()
1680 Known2.One.shl(ShiftAmt) | Known3.One.lshr(BitWidth - ShiftAmt); in computeKnownBitsFromOperator()
DConstantFolding.cpp218 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1); in FoldBitCast() local
234 ConstantInt::get(Src->getType(), ShiftAmt)); in FoldBitCast()
235 ShiftAmt += isLittleEndian ? SrcBitSize : -SrcBitSize; in FoldBitCast()
266 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize*(Ratio-1); in FoldBitCast() local
271 ConstantInt::get(Src->getType(), ShiftAmt)); in FoldBitCast()
272 ShiftAmt += isLittleEndian ? DstBitSize : -DstBitSize; in FoldBitCast()
/openbsd/src/gnu/llvm/llvm/include/llvm/ADT/
DAPInt.h773 APInt &operator<<=(unsigned ShiftAmt) {
774 assert(ShiftAmt <= BitWidth && "Invalid shift amount");
776 if (ShiftAmt == BitWidth)
779 U.VAL <<= ShiftAmt;
782 shlSlowCase(ShiftAmt);
791 APInt &operator<<=(const APInt &ShiftAmt);
815 APInt ashr(unsigned ShiftAmt) const { in ashr() argument
817 R.ashrInPlace(ShiftAmt); in ashr()
822 void ashrInPlace(unsigned ShiftAmt) { in ashrInPlace() argument
823 assert(ShiftAmt <= BitWidth && "Invalid shift amount"); in ashrInPlace()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Transforms/InstCombine/
DInstCombineSimplifyDemanded.cpp619 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
622 if (DemandedMask.countTrailingZeros() >= ShiftAmt && in SimplifyDemandedUseBits()
624 Constant *LeftShiftAmtC = ConstantInt::get(VTy, ShiftAmt); in SimplifyDemandedUseBits()
632 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); in SimplifyDemandedUseBits()
637 DemandedMaskIn.setHighBits(ShiftAmt+1); in SimplifyDemandedUseBits()
639 DemandedMaskIn.setHighBits(ShiftAmt); in SimplifyDemandedUseBits()
647 Known.Zero <<= ShiftAmt; in SimplifyDemandedUseBits()
648 Known.One <<= ShiftAmt; in SimplifyDemandedUseBits()
650 if (ShiftAmt) in SimplifyDemandedUseBits()
651 Known.Zero.setLowBits(ShiftAmt); in SimplifyDemandedUseBits()
[all …]
DInstCombineCasts.cpp1175 uint64_t ShiftAmt = Amt->getZExtValue(); in canEvaluateZExtd() local
1176 BitsToClear = ShiftAmt < BitsToClear ? BitsToClear - ShiftAmt : 0; in canEvaluateZExtd()
1405 unsigned ShiftAmt = KnownZeroMask.countTrailingZeros(); in transformSExtICmp() local
1407 if (ShiftAmt) in transformSExtICmp()
1409 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
1419 unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); in transformSExtICmp() local
1421 if (ShiftAmt) in transformSExtICmp()
1423 ConstantInt::get(In->getType(), ShiftAmt)); in transformSExtICmp()
DInstCombineCompares.cpp2073 const APInt *ShiftAmt; in foldICmpShlConstant() local
2074 if (!match(Shl->getOperand(1), m_APInt(ShiftAmt))) in foldICmpShlConstant()
2080 if (ShiftAmt->uge(TypeBits)) in foldICmpShlConstant()
2093 APInt ShiftedC = C.ashr(*ShiftAmt); in foldICmpShlConstant()
2097 C.ashr(*ShiftAmt).shl(*ShiftAmt) == C) { in foldICmpShlConstant()
2098 APInt ShiftedC = C.ashr(*ShiftAmt); in foldICmpShlConstant()
2107 APInt ShiftedC = (C - 1).ashr(*ShiftAmt) + 1; in foldICmpShlConstant()
2123 APInt ShiftedC = C.lshr(*ShiftAmt); in foldICmpShlConstant()
2127 C.lshr(*ShiftAmt).shl(*ShiftAmt) == C) { in foldICmpShlConstant()
2128 APInt ShiftedC = C.lshr(*ShiftAmt); in foldICmpShlConstant()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
DAArch64PostLegalizerCombiner.cpp173 unsigned ShiftAmt, AddSubOpc; in matchAArch64MulConstCombine() local
186 ShiftAmt = SCVMinus1.logBase2(); in matchAArch64MulConstCombine()
189 ShiftAmt = CVPlus1.logBase2(); in matchAArch64MulConstCombine()
199 ShiftAmt = CVNegPlus1.logBase2(); in matchAArch64MulConstCombine()
203 ShiftAmt = CVNegMinus1.logBase2(); in matchAArch64MulConstCombine()
214 auto Shift = B.buildConstant(LLT::scalar(64), ShiftAmt); in matchAArch64MulConstCombine()
DAArch64PostLegalizerLowering.cpp822 uint64_t ShiftAmt = MaybeShiftAmt->Value.getZExtValue(); in getCmpOperandFoldingProfit() local
830 return (ShiftAmt <= 4) ? 2 : 1; in getCmpOperandFoldingProfit()
836 if ((ShiftSize == 32 && ShiftAmt <= 31) || in getCmpOperandFoldingProfit()
837 (ShiftSize == 64 && ShiftAmt <= 63)) in getCmpOperandFoldingProfit()
/openbsd/src/gnu/llvm/llvm/lib/Transforms/Utils/
DVNCoercion.cpp140 uint64_t ShiftAmt = DL.getTypeStoreSizeInBits(StoredValTy).getFixedValue() - in coerceAvailableValueToLoadType() local
143 StoredVal, ConstantInt::get(StoredVal->getType(), ShiftAmt)); in coerceAvailableValueToLoadType()
426 unsigned ShiftAmt; in getStoreValueForLoadHelper() local
428 ShiftAmt = Offset * 8; in getStoreValueForLoadHelper()
430 ShiftAmt = (StoreSize - LoadSize - Offset) * 8; in getStoreValueForLoadHelper()
431 if (ShiftAmt) in getStoreValueForLoadHelper()
433 ConstantInt::get(SrcVal->getType(), ShiftAmt)); in getStoreValueForLoadHelper()
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DAMDGPUPostLegalizerCombiner.cpp257 int64_t ShiftAmt; in matchCvtF32UByteN() local
258 IsShr = mi_match(SrcReg, MRI, m_GLShr(m_Reg(Src0), m_ICst(ShiftAmt))); in matchCvtF32UByteN()
259 if (IsShr || mi_match(SrcReg, MRI, m_GShl(m_Reg(Src0), m_ICst(ShiftAmt)))) { in matchCvtF32UByteN()
264 ShiftOffset += ShiftAmt; in matchCvtF32UByteN()
266 ShiftOffset -= ShiftAmt; in matchCvtF32UByteN()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DAtomicExpandPass.cpp649 Value *ShiftAmt = nullptr; member
672 PrintObj(PMV.ShiftAmt); in operator <<()
720 PMV.ShiftAmt = ConstantInt::get(PMV.ValueType, 0); in createMaskInstrs()
750 PMV.ShiftAmt = Builder.CreateShl(PtrLSB, 3); in createMaskInstrs()
753 PMV.ShiftAmt = Builder.CreateShl( in createMaskInstrs()
757 PMV.ShiftAmt = Builder.CreateTrunc(PMV.ShiftAmt, PMV.WordType, "ShiftAmt"); in createMaskInstrs()
759 ConstantInt::get(PMV.WordType, (1 << (ValueSize * 8)) - 1), PMV.ShiftAmt, in createMaskInstrs()
777 Value *Shift = Builder.CreateLShr(WideWord, PMV.ShiftAmt, "shifted"); in extractMaskedValue()
793 Builder.CreateShl(ZExt, PMV.ShiftAmt, "shifted", /*HasNUW*/ true); in insertMaskedValue()
877 PMV.ShiftAmt, "ValOperand_Shifted"); in expandPartwordAtomicRMW()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/AVR/
DAVRISelLowering.cpp1862 ISD::NodeType Opc, int64_t ShiftAmt) { in insertMultibyteShift() argument
1880 if (ShiftLeft && (ShiftAmt % 8) >= 6) { in insertMultibyteShift()
1885 size_t ShiftRegsOffset = ShiftAmt / 8; in insertMultibyteShift()
1900 if (ShiftAmt % 8 == 6) { in insertMultibyteShift()
1923 if (!ShiftLeft && (ShiftAmt % 8) >= 6) { in insertMultibyteShift()
1926 size_t ShiftRegsSize = Regs.size() - (ShiftAmt / 8); in insertMultibyteShift()
1957 if (ShiftAmt % 8 == 6) { in insertMultibyteShift()
1984 while (ShiftLeft && ShiftAmt >= 8) { in insertMultibyteShift()
1996 ShiftAmt -= 8; in insertMultibyteShift()
2001 if (!ShiftLeft && ShiftAmt >= 8) { in insertMultibyteShift()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1989 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToScaledMask() local
1990 if (ShiftAmt != 1 && ShiftAmt != 2 && ShiftAmt != 3) in foldMaskedShiftToScaledMask()
2001 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, DL, VT); in foldMaskedShiftToScaledMask()
2016 AM.Scale = 1 << ShiftAmt; in foldMaskedShiftToScaledMask()
2056 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskAndShiftToScale() local
2073 unsigned ScaleDown = (64 - X.getSimpleValueType().getSizeInBits()) + ShiftAmt; in foldMaskAndShiftToScale()
2110 SDValue NewSRLAmt = DAG.getConstant(ShiftAmt + AMShiftAmt, DL, MVT::i8); in foldMaskAndShiftToScale()
2153 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in foldMaskedShiftToBEXTR() local
2165 SDValue NewSRLAmt = DAG.getConstant(ShiftAmt + AMShiftAmt, DL, MVT::i8); in foldMaskedShiftToBEXTR()
3583 auto canonicalizeShiftAmt = [&NBits, &NegateNBits](SDValue ShiftAmt, in matchBitExtract()
[all …]
DX86InstCombineIntrinsic.cpp287 auto ShiftAmt = ConstantInt::get(SVT, Count.zextOrTrunc(BitWidth)); in simplifyX86immShift() local
288 auto ShiftVec = Builder.CreateVectorSplat(VWidth, ShiftAmt); in simplifyX86immShift()
1006 Value *ShiftAmt = ConstantInt::get(II.getType(), MaskIdx); in instCombineIntrinsic() local
1007 Value *Shifted = IC.Builder.CreateLShr(Masked, ShiftAmt); in instCombineIntrinsic()
1049 Value *ShiftAmt = ConstantInt::get(II.getType(), MaskIdx); in instCombineIntrinsic() local
1050 Value *Shifted = IC.Builder.CreateShl(Input, ShiftAmt); in instCombineIntrinsic()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
DCombinerHelper.cpp1678 int64_t ShiftAmt = MaybeShiftAmtVal->Value.getSExtValue(); in matchCombineShlOfExtend() local
1680 MatchData.Imm = ShiftAmt; in matchCombineShlOfExtend()
1683 return MinLeadingZeros >= ShiftAmt; in matchCombineShlOfExtend()
1693 auto ShiftAmt = Builder.buildConstant(ExtSrcTy, ShiftAmtVal); in applyCombineShlOfExtend() local
1695 Builder.buildShl(ExtSrcTy, ExtSrcReg, ShiftAmt, MI.getFlags()); in applyCombineShlOfExtend()
1789 unsigned ShiftAmt = Dst0Ty.getSizeInBits(); in matchCombineUnmergeConstant() local
1792 Csts.emplace_back(Val.trunc(ShiftAmt)); in matchCombineUnmergeConstant()
1793 Val = Val.lshr(ShiftAmt); in matchCombineUnmergeConstant()
2021 unsigned ShiftAmt; in tryCombineShiftToUnmerge() local
2022 if (matchCombineShiftToUnmerge(MI, TargetShiftAmount, ShiftAmt)) { in tryCombineShiftToUnmerge()
[all …]
DLegalizerHelper.cpp369 auto ShiftAmt = in buildLCMMergePieces() local
371 PadReg = MIRBuilder.buildAShr(GCDTy, VRegs.back(), ShiftAmt).getReg(0); in buildLCMMergePieces()
1538 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset); in widenScalarMergeValues() local
1539 auto Shl = MIRBuilder.buildShl(WideTy, ZextInput, ShiftAmt); in widenScalarMergeValues()
1668 auto ShiftAmt = MIRBuilder.buildConstant(SrcTy, DstSize * I); in widenScalarUnmergeValues() local
1669 auto Shr = MIRBuilder.buildLShr(SrcTy, SrcReg, ShiftAmt); in widenScalarUnmergeValues()
2184 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, DiffBits); in widenScalar() local
2185 auto Shift = MIRBuilder.buildLShr(WideTy, DstExt, ShiftAmt); in widenScalar()
3049 auto ShiftAmt = MIRBuilder.buildConstant(AnyExtTy, LargeSplitSize); in lowerLoad() local
3050 auto Shift = MIRBuilder.buildShl(AnyExtTy, SmallLoad, ShiftAmt); in lowerLoad()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/Mips/
DMipsFastISel.cpp1825 unsigned ShiftAmt; in emitIntSExt32r1() local
1830 ShiftAmt = 24; in emitIntSExt32r1()
1833 ShiftAmt = 16; in emitIntSExt32r1()
1837 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt); in emitIntSExt32r1()
1838 emitInst(Mips::SRA, DestReg).addReg(TempReg).addImm(ShiftAmt); in emitIntSExt32r1()
DMipsISelLowering.cpp1669 Register ShiftAmt = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1792 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicBinaryPartword()
1797 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicBinaryPartword()
1802 .addReg(MaskUpper).addReg(ShiftAmt); in emitAtomicBinaryPartword()
1804 BuildMI(BB, DL, TII->get(Mips::SLLV), Incr2).addReg(Incr).addReg(ShiftAmt); in emitAtomicBinaryPartword()
1818 .addReg(ShiftAmt) in emitAtomicBinaryPartword()
1918 Register ShiftAmt = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1979 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(PtrLSB2).addImm(3); in emitAtomicCmpSwapPartword()
1984 BuildMI(BB, DL, TII->get(Mips::SLL), ShiftAmt).addReg(Off).addImm(3); in emitAtomicCmpSwapPartword()
1989 .addReg(MaskUpper).addReg(ShiftAmt); in emitAtomicCmpSwapPartword()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/ExecutionEngine/Interpreter/
DExecution.cpp1611 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize * (Ratio - 1); in executeBitCastInst() local
1617 Tmp <<= ShiftAmt; in executeBitCastInst()
1618 ShiftAmt += isLittleEndian ? SrcBitSize : -SrcBitSize; in executeBitCastInst()
1627 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize * (Ratio - 1); in executeBitCastInst() local
1632 Elt.IntVal.lshrInPlace(ShiftAmt); in executeBitCastInst()
1636 ShiftAmt += isLittleEndian ? DstBitSize : -DstBitSize; in executeBitCastInst()

123