Searched refs:SrcRegBank (Results 1 – 3 of 3) sorted by relevance
| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 919 const auto &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); in select() local
922 if (SrcRegBank.getID() == ARM::FPRRegBankID) { in select()
947 if (SrcRegBank.getID() != DstRegBank.getID()) { in select()
953 if (SrcRegBank.getID() != ARM::GPRRegBankID) { in select()
1014 const auto &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); in select() local
1017 if (SrcRegBank.getID() != DstRegBank.getID()) { in select()
1024 if (SrcRegBank.getID() != ARM::GPRRegBankID) { in select()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 275 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); in selectCopy() local
280 if (DstSize > SrcSize && SrcRegBank.getID() == X86::GPRRegBankID && in selectCopy()
284 getRegClass(MRI.getType(SrcReg), SrcRegBank); in selectCopy()
316 if (SrcRegBank.getID() == X86::GPRRegBankID && in selectCopy()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64InstructionSelector.cpp | 891 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); in getRegClassesForCopy() local
903 if (SrcRegBank != DstRegBank && (DstSize == 1 && SrcSize == 1)) in getRegClassesForCopy()
906 return {getMinClassForRegBank(SrcRegBank, SrcSize, true), in getRegClassesForCopy()
948 const RegisterBank &SrcRegBank = *RBI.getRegBank(SrcReg, MRI, TRI); in selectCopy() local
975 if (getMinSizeForRegBank(SrcRegBank) > DstSize) { in selectCopy()
987 getMinClassForRegBank(SrcRegBank, DstSize, /* GetAllRegSet */ true); in selectCopy()
994 getMinClassForRegBank(SrcRegBank, DstSize, /* GetAllRegSet */ true); in selectCopy()
1025 assert(SrcRegBank.getID() == AArch64::GPRRegBankID); in selectCopy()
|