Searched refs:VCPU_REGS_SS (Results 1 – 4 of 4) sorted by relevance
92 .vrs_sregs[VCPU_REGS_SS] = { 0x10, 0xFFFFFFFF, 0xC093, 0x0},128 .vrs_sregs[VCPU_REGS_SS] = { 0x0, 0xFFFF, 0x8093, 0x0},
358 case VCPU_REGS_SS: return "GS"; in str_sreg()
406 #define VCPU_REGS_SS 2 macro
1234 sregs[VCPU_REGS_SS].vsi_sel = vmcb->v_ss.vs_sel; in vcpu_readregs_svm()1235 sregs[VCPU_REGS_SS].vsi_limit = vmcb->v_ss.vs_lim; in vcpu_readregs_svm()1237 sregs[VCPU_REGS_SS].vsi_ar = (attr & 0xff) | ((attr << 4) & in vcpu_readregs_svm()1239 sregs[VCPU_REGS_SS].vsi_base = vmcb->v_ss.vs_base; in vcpu_readregs_svm()1513 vmcb->v_ss.vs_sel = sregs[VCPU_REGS_SS].vsi_sel; in vcpu_writeregs_svm()1514 vmcb->v_ss.vs_lim = sregs[VCPU_REGS_SS].vsi_limit; in vcpu_writeregs_svm()1515 attr = sregs[VCPU_REGS_SS].vsi_ar; in vcpu_writeregs_svm()1517 vmcb->v_ss.vs_base = sregs[VCPU_REGS_SS].vsi_base; in vcpu_writeregs_svm()