| /openbsd/src/lib/libcrypto/sha/ |
| D | sha1.c | 174 X8, X9, X10, X11, X12, X13, X14, X15; in sha1_block_data_order() local
200 X14 = be32toh(in32[14]); in sha1_block_data_order()
218 X14 = crypto_load_be32toh(&in[14 * 4]); in sha1_block_data_order()
237 sha1_round1(&a, &b, &c, &d, &e, X14); in sha1_block_data_order()
241 sha1_msg_schedule_update(&X1, X3, X9, X14); in sha1_block_data_order()
246 sha1_msg_schedule_update(&X6, X8, X14, X3); in sha1_block_data_order()
252 sha1_msg_schedule_update(&X12, X14, X4, X9); in sha1_block_data_order()
254 sha1_msg_schedule_update(&X14, X0, X6, X11); in sha1_block_data_order()
271 sha1_round2(&a, &b, &c, &d, &e, X14); in sha1_block_data_order()
275 sha1_msg_schedule_update(&X1, X3, X9, X14); in sha1_block_data_order()
[all …]
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| /openbsd/src/lib/libcrypto/md5/ |
| D | md5.c | 137 X8, X9, X10, X11, X12, X13, X14, X15; in md5_block_data_order() local
162 X14 = le32toh(in32[14]); in md5_block_data_order()
180 X14 = crypto_load_le32toh(&in[14 * 4]); in md5_block_data_order()
199 md5_round1(&C, D, A, B, X14, 0xa679438eL, 17); in md5_block_data_order()
211 md5_round2(&D, A, B, C, X14, 0xc33707d6L, 9); in md5_block_data_order()
222 md5_round3(&B, C, D, A, X14, 0xfde5380cL, 23); in md5_block_data_order()
238 md5_round4(&C, D, A, B, X14, 0xab9423a7L, 15); in md5_block_data_order()
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| /openbsd/src/lib/libcrypto/ripemd/ |
| D | ripemd.c | 135 X8, X9, X10, X11, X12, X13, X14, X15; in ripemd160_block_data_order() local
161 X14 = le32toh(in32[14]); in ripemd160_block_data_order()
179 X14 = crypto_load_le32toh(&in[14 * 4]); in ripemd160_block_data_order()
198 RIP1(B, C, D, E, A, X14, 9); in ripemd160_block_data_order()
214 RIP2(B, C, D, E, A, X14, 7, KL1); in ripemd160_block_data_order()
220 RIP3(B, C, D, E, A, X14, 6, KL2); in ripemd160_block_data_order()
247 RIP4(A, B, C, D, E, X14, 8, KL3); in ripemd160_block_data_order()
260 RIP5(D, E, A, B, C, X14, 5, KL4); in ripemd160_block_data_order()
282 RIP5(E, A, B, C, D, X14, 9, KR0); in ripemd160_block_data_order()
306 RIP4(B, C, D, E, A, X14, 7, KR1); in ripemd160_block_data_order()
[all …]
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| /openbsd/src/lib/libcrypto/md4/ |
| D | md4.c | 119 X8, X9, X10, X11, X12, X13, X14, X15; in md4_block_data_order() local
144 X14 = le32toh(in32[14]); in md4_block_data_order()
162 X14 = crypto_load_le32toh(&in[14 * 4]); in md4_block_data_order()
181 md4_round1(&C, D, A, B, X14, 11); in md4_block_data_order()
196 md4_round2(&B, C, D, A, X14, 13); in md4_block_data_order()
210 md4_round3(&B, C, D, A, X14, 15); in md4_block_data_order()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64ReturnProtectorLowering.cpp | 92 TempRegs.push_back(AArch64::X14); in fillTempRegisters()
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| D | AArch64SLSHardening.cpp | 163 { "__llvm_slsblr_thunk_x14", AArch64::X14},
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| D | AArch64RegisterInfo.cpp | 366 MCRegisterInfo::regsOverlap(PhysReg, AArch64::X14) || in explainReservedReg()
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| D | AArch64RegisterInfo.td | 118 def X14 : AArch64Reg<14, "x14", [W14]>, DwarfRegAlias<W14>;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 45 case AArch64::X14: return AArch64::W14; in getWRegFromXReg()
85 case AArch64::W14: return AArch64::X14; in getXRegFromWReg()
118 case AArch64::X14_X15_X16_X17_X18_X19_X20_X21: return AArch64::X14; in getXRegFromXRegTuple()
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| /openbsd/src/distrib/notes/arm64/ |
| D | hardware | 66 HP OmniBook X14
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| /openbsd/src/gnu/gcc/libstdc++-v3/include/ext/ |
| D | typelist.h | 327 … X11, X12, X13, X14) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN14(X1, X2, X3, X4, X5, …
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCTargetDesc.cpp | 118 {codeview::RegisterId::ARM64_X14, AArch64::X14}, in initLLVMToCVRegMapping()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 298 def CSR_PPC64 : CalleeSavedRegs<(add X14, X15, X16, X17, X18, X19, X20,
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| D | PPCFrameLowering.cpp | 159 {PPC::X14, -144} in getCalleeSavedSpillSlots()
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| D | PPCAsmPrinter.cpp | 2222 unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13; in emitTracebackTable()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVFrameLowering.cpp | 898 RISCV::X12, RISCV::X13, RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17, in determineCalleeSaves()
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| D | RISCVRegisterInfo.td | 97 def X14 : RISCVReg<14,"x14", ["a4"]>, DwarfRegNum<[14]>;
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| D | RISCVISelLowering.cpp | 11899 RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17
12448 RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13, RISCV::X14, in CC_RISCV_FastCC()
13549 .Case("{a4}", RISCV::X14) in getRegForInlineAsmConstraint()
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