Searched refs:defvar (Results 1 – 25 of 58) sorted by relevance
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42 defvar TAIL_UNDISTURBED_MASK_UNDISTURBED = 0;43 defvar TAIL_AGNOSTIC = 1;44 defvar TA_MA = 3;98 defvar MxList = [V_MF8, V_MF4, V_MF2, V_M1, V_M2, V_M4, V_M8];100 defvar MxListF = [V_MF4, V_MF2, V_M1, V_M2, V_M4, V_M8];103 defvar MxListW = [V_MF8, V_MF4, V_MF2, V_M1, V_M2, V_M4];105 defvar MxListFW = [V_MF4, V_MF2, V_M1, V_M2, V_M4];108 defvar MxListVF2 = [V_MF4, V_MF2, V_M1, V_M2, V_M4, V_M8];111 defvar MxListVF4 = [V_MF2, V_M1, V_M2, V_M4, V_M8];114 defvar MxListVF8 = [V_M1, V_M2, V_M4, V_M8];[all …]
282 defvar vint8mf8_t = nxv1i8;283 defvar vint8mf4_t = nxv2i8;284 defvar vint8mf2_t = nxv4i8;285 defvar vint8m1_t = nxv8i8;286 defvar vint8m2_t = nxv16i8;287 defvar vint8m4_t = nxv32i8;288 defvar vint8m8_t = nxv64i8;290 defvar vint16mf4_t = nxv1i16;291 defvar vint16mf2_t = nxv2i16;292 defvar vint16m1_t = nxv4i16;[all …]
34 defvar load_instr = !cast<Instruction>("PseudoVLE"#sew#"_V_"#vlmul.MX);35 defvar store_instr = !cast<Instruction>("PseudoVSE"#sew#"_V_"#vlmul.MX);50 defvar load_instr =52 defvar store_instr =65 defvar load_instr = !cast<Instruction>("PseudoVLM_V_"#m.BX);66 defvar store_instr = !cast<Instruction>("PseudoVSM_V_"#m.BX);176 defvar instruction = !cast<Instruction>(instruction_name#"_VV_"#vti.LMul.MX);188 defvar instruction = !cast<Instruction>(instruction_name#"_VV_"#vti.LMul.MX);203 defvar instruction = !cast<Instruction>(instruction_name#_#kind#_#vti.LMul.MX);218 defvar instruction = !cast<Instruction>(instruction_name#_#kind#_#vti.LMul.MX);[all …]
529 defvar vti = VtiToWti.Vti;530 defvar wti = VtiToWti.Wti;545 defvar vti = VtiToWti.Vti;546 defvar wti = VtiToWti.Wti;563 defvar vti = VtiToWti.Vti;564 defvar wti = VtiToWti.Wti;660 defvar instruction_masked = !cast<Instruction>(instruction_name#"_VX_"#vti.LMul.MX#"_MASK");679 defvar instruction_masked = !cast<Instruction>(instruction_name#"_VI_"#vti.LMul.MX#"_MASK");704 defvar instruction_masked = !cast<Instruction>(instruction_name#"_VI_"#vti.LMul.MX#"_MASK");765 defvar vti = vtiTofti.Vti;[all …]
77 defvar MxListTHVdot = [V_MF2, THVdotV_M1, THVdotV_M2, THVdotV_M4, THVdotV_M8];107 defvar vti = vtiToWti.Vti;108 defvar wti = vtiToWti.Wti;119 defvar vti = vtiToWti.Vti;120 defvar wti = vtiToWti.Wti;
75 defvar HINX = [H, H_INX];76 defvar HHINX = [HH, HH_INX];77 defvar XHINX = [XH, XH_INX];78 defvar HXINX = [HX, HX_INX];79 defvar XHIN64X = [XH_64, XH_INX_64];80 defvar HXIN64X = [HX_64, HX_INX_64];81 defvar HFINXmin = [HFmin, HF_INXmin];82 defvar FHINXmin = [FHmin, FH_INXmin];83 defvar DHINXmin = [DHmin, DH_INXmin];84 defvar HDINXmin = [HDmin, HD_INXmin];
82 defvar DINX = [D, D_INX, D_IN32X];83 defvar DDINX = [DD, DD_INX, DD_IN32X];84 defvar DXINX = [DX, DX_INX, DX_IN32X];85 defvar DFINX = [DF, DF_INX, DF_IN32X];86 defvar FDINX = [FD, FD_INX, FD_IN32X];87 defvar XDINX = [XD, XD_INX, XD_IN32X];88 defvar DXIN64X = [DX_64, DX_INX];89 defvar XDIN64X = [XD_64, XD_INX];
131 defvar FINX = [F, F_INX];132 defvar FFINX = [FF, FF_INX];133 defvar FXINX = [FX, FX_INX];134 defvar XFINX = [XF, XF_INX];135 defvar XFIN64X = [XF_64, XF_INX_64];136 defvar FXIN64X = [FX_64, FX_INX_64];
119 defvar VOPDYPseudos = [125 defvar VOPDXPseudos = VOPDYPseudos[0...VOPDX_Max_Index];133 defvar xInst = !cast<VOP_Pseudo>(x);134 defvar yInst = !cast<VOP_Pseudo>(y);135 defvar XasVC = !cast<VOPD_Component>(x);136 defvar YasVC = !cast<VOPD_Component>(y);137 defvar isMADK = !or(!eq(x, "V_FMAAK_F32"), !eq(x, "V_FMAMK_F32"),145 defvar isOpXMADK = !or(!eq(x, "V_FMAAK_F32"), !eq(x, "V_FMAMK_F32"));146 defvar isOpYMADK = !or(!eq(y, "V_FMAAK_F32"), !eq(y, "V_FMAMK_F32"));147 defvar OpName = "V_DUAL_" # !substr(x,2) # "_X_" # !substr(y,2);[all …]
1307 defvar ps32 = !cast<VOPC_Pseudo>(NAME#"_e32");1308 defvar ps64 = !cast<VOP3_Pseudo>(NAME#"_e64");1324 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_e32" #"_dpp");1325 defvar AsmDPP = ps32.Pfl.AsmDPP16;1340 defvar AsmDPP8 = ps32.Pfl.AsmDPP8;1356 defvar psDPP = !cast<VOP_DPP_Pseudo>(NAME #"_e64" #"_dpp");1357 defvar AsmDPP = ps64.Pfl.AsmVOP3DPP16;1372 defvar AsmDPP8 = ps64.Pfl.AsmVOP3DPP8;1392 defvar ps32 = !cast<VOPC_Pseudo>(OpName#"_e32");1393 defvar ps64 = !cast<VOP3_Pseudo>(OpName#"_e64");[all …]
37 defvar VOPDX_Max_Index = 12;1330 defvar ps = !cast<VOP_Pseudo>(opName#"_e64");1344 defvar ps = !cast<VOP_Pseudo>(opName#"_e64");1353 defvar ps = !cast<VOP_Pseudo>(opName#"_e64");1369 defvar ps = !cast<VOP_Pseudo>(opName);1390 defvar ps = !cast<VOP3_Pseudo>(opName#"_e64");1396 defvar ps = !cast<VOP3_Pseudo>(opName#"_e64");1403 defvar ps = !cast<VOP3_Pseudo>(opName#"_e64");1413 defvar ps = !cast<VOP3_Pseudo>(opName#"_e64");1420 defvar ps = !cast<VOP3_Pseudo>(opName#"_e64");[all …]
509 defvar legal_load_vt = !if(!eq(load_vt, v3f16), v4f16, load_vt);547 defvar legal_load_vt = !if(!eq(!cast<string>(load_vt), !cast<string>(v3f16)), v4f16, load_vt);579 defvar legal_store_vt = !if(!eq(store_vt, v3f16), v4f16, store_vt);1231 defvar st = !if(!eq(memoryVt, vt), name, mubuf_intrinsic_load<name, memoryVt>);1318 defvar st = !if(!eq(memoryVt, vt), name, mubuf_intrinsic_store<name, memoryVt>);1404 defvar Op = !cast<SDPatternOperator>(OpPrefix1407 defvar InstSuffix = !if(!eq(RtnMode, "ret"), "_RTN", "");1434 defvar Op = !cast<SDPatternOperator>("AMDGPUatomic_cmp_swap_global"1437 defvar InstSuffix = !if(!eq(RtnMode, "ret"), "_RTN", "");1440 defvar OffsetResDag = (!cast<MUBUF_Pseudo>(Inst # "_OFFSET" # InstSuffix)[all …]
1596 defvar ps = !cast<SOP1_Pseudo>(NAME);1629 defvar ps = !cast<SOP1_Pseudo>(NAME);1754 defvar ps = !cast<SOP2_Pseudo>(NAME);1777 defvar ps = !cast<SOP_Pseudo>(NAME);1863 defvar ps = !cast<SOPK_Pseudo>(NAME);1869 defvar ps = !cast<SOPK_Pseudo>(NAME);1891 defvar ps = !cast<SOPK_Pseudo>(NAME);1897 defvar ps = !cast<SOPK_Pseudo>(NAME);2002 defvar ps = !cast<SOPP_Pseudo>(NAME);2009 defvar ps = !cast<SOPP_Pseudo>(NAME);[all …]
253 tree defvar = NULL_TREE, usevar = NULL_TREE; in dse_optimize_stmt() local267 defvar = DEF_FROM_PTR (var1); in dse_optimize_stmt()272 if (! has_single_use (defvar)) in dse_optimize_stmt()279 single_imm_use (defvar, &use_p, &temp); in dse_optimize_stmt()
274 defvar suffix = s_p[1];275 defvar prototype = s_p[2];552 defvar suffix = s_p[1];553 defvar prototype = s_p[2];568 defvar suffix = s_p[1];569 defvar prototype = s_p[2];606 defvar TypeList = ["c","s","i","l","x","f","d"];607 defvar EEWList = [["8", "(Log2EEW:3)"],707 defvar eew = eew_list[0];708 defvar eew_type = eew_list[1];[all …]
168 defvar m2_cg = !if(add, (id $m2), (fneg $m2));170 defvar unpred_cg = (IRIntBase<"fma", [Vector]> $m1, m2_cg, $addend);171 defvar pred_cg = (IRInt<"fma_predicated", [Vector, Predicate]>298 defvar UnpredInt = IRInt<NAME, [Vector]>;299 defvar PredInt = IRInt<NAME # "_predicated", [Vector, Predicate]>;300 defvar UnpredIntCall = !con((UnpredInt $base), paramsOut);301 defvar PredIntCall = !con((PredInt $inactive, $base), paramsOut, (? $pred));544 defvar intArgsBase = (? $prev, $vec);545 defvar intArgsUnpred = !con(intArgsBase,547 defvar intArgsPred = !con(intArgsUnpred, (? $pred));[all …]
124 defvar Zn3Divider = Zn3ALU0;128 defvar Zn3BRU0 = Zn3ALU0;131 defvar Zn3Multiplier = Zn3ALU1;208 defvar Zn3FPFMul0 = Zn3FPP0;209 defvar Zn3FPFMul1 = Zn3FPP1;212 defvar Zn3FPFAdd0 = Zn3FPP2;213 defvar Zn3FPFAdd1 = Zn3FPP3;216 defvar Zn3FPFCvt0 = Zn3FPP2;217 defvar Zn3FPFCvt1 = Zn3FPP3;224 defvar Zn3FPFDiv = Zn3FPP1;[all …]
116 defvar Zn4Divider = Zn4ALU0;120 defvar Zn4BRU0 = Zn4ALU0;123 defvar Zn4Multiplier = Zn4ALU1;199 defvar Zn4FPFMul0 = Zn4FP0;200 defvar Zn4FPFMul1 = Zn4FP1;203 defvar Zn4FPFAdd0 = Zn4FP2;204 defvar Zn4FPFAdd1 = Zn4FP3;207 defvar Zn4FPFCvt0 = Zn4FP2;208 defvar Zn4FPFCvt1 = Zn4FP3;215 defvar Zn4FPFDiv = Zn4FP1;[all …]
145 defvar AllVecs = [I8x16, I16x8, I32x4, I64x2, F32x4, F64x2];146 defvar IntVecs = [I8x16, I16x8, I32x4, I64x2];197 defvar inst = "LOAD"#vec.lane_bits#"_SPLAT";205 defvar signed = vec.prefix#".load"#loadPat#"_s";206 defvar unsigned = vec.prefix#".load"#loadPat#"_u";243 defvar loadpat = !cast<PatFrag>(exts[0]#vec.split.lane_bits);244 defvar inst = "LOAD_EXTEND"#exts[1]#"_"#vec;250 defvar name = "v128.load"#vec.lane_bits#"_zero";273 defvar inst = "LOAD_ZERO_"#vec;274 defvar pat = PatFrag<(ops node:$addr), (scalar_to_vector (vec.lane_vt (load $addr)))>;[all …]
632 defvar Inst = !cast<Instruction>(NAME);697 defvar InstA = !cast<Instruction>(NAME # "acc");698 defvar InstN = !cast<Instruction>(NAME # "no_acc");803 defvar InstA = !cast<Instruction>(NAME # "acc");804 defvar InstN = !cast<Instruction>(NAME # "no_acc");806 defvar letter = VTI.SuffixLetter;807 defvar ARMVADDLV = SDNode<"ARMISD::VADDLV" # letter, SDTVecReduceL>;808 defvar ARMVADDLVA = SDNode<"ARMISD::VADDLVA" # letter, SDTVecReduceLA>;809 defvar ARMVADDLVp = SDNode<"ARMISD::VADDLVp" # letter, SDTVecReduceLP>;810 defvar ARMVADDLVAp = SDNode<"ARMISD::VADDLVAp" # letter, SDTVecReduceLPA>;[all …]
28 deftypemethod, deftypeop, deftypevar, deftypevr, defun, defvar, defvr, enumerator
319 case defvar: base_type = defvr; break; in get_base_type()411 case defvar: in defun_internal()
17 syn keyword tgKeyword def let in code dag field include defm foreach defset defvar if then else
18 0 search/256 (defvar\ Lisp/Scheme program text
206 defm defset defvar field if462 * A variable defined with the ``defvar`` or ``defset`` statements.638 :| "defvar" `TokIdentifier` "=" `Value` ";"652 The ``defvar`` form defines a variable whose value can be used in other679 These include global variables defined by ``defvar`` and ``defset``. A1183 ``defvar`` --- define a variable1186 A ``defvar`` statement defines a global variable. Its value can be used1190 Defvar: "defvar" `TokIdentifier` "=" `Value` ";"1200 the next iteration. The following ``defvar`` will not work::1202 defvar i = !add(i, 1);[all …]