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Searched refs:dev_warn (Results 1 – 25 of 112) sorted by relevance

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/openbsd/src/sys/dev/pci/drm/radeon/
Devergreen_cs.c216 dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d\n", in evergreen_surface_check_linear_aligned()
239 dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d (%d %d %d)\n", in evergreen_surface_check_1d()
247 dev_warn(p->dev, "%s:%d %s height %d invalid must be aligned with 8\n", in evergreen_surface_check_1d()
282 dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d\n", in evergreen_surface_check_2d()
289 dev_warn(p->dev, "%s:%d %s height %d invalid must be aligned with %d\n", in evergreen_surface_check_2d()
315 dev_warn(p->dev, "%s:%d %s invalid array mode %d\n", in evergreen_surface_check()
334 dev_warn(p->dev, "%s:%d %s invalid array mode %d\n", in evergreen_surface_value_conv_check()
345 dev_warn(p->dev, "%s:%d %s invalid number of banks %d\n", in evergreen_surface_value_conv_check()
355 dev_warn(p->dev, "%s:%d %s invalid bankw %d\n", in evergreen_surface_value_conv_check()
365 dev_warn(p->dev, "%s:%d %s invalid bankh %d\n", in evergreen_surface_value_conv_check()
[all …]
Dr600_cs.c364 dev_warn(p->dev, "%s:%d cb invalid format %d for %d (0x%08X)\n", in r600_cs_track_validate_cb()
387 dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__, in r600_cs_track_validate_cb()
405 dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__, in r600_cs_track_validate_cb()
412 dev_warn(p->dev, "%s:%d cb pitch (%d, 0x%x, %d) invalid\n", in r600_cs_track_validate_cb()
417 dev_warn(p->dev, "%s:%d cb height (%d, 0x%x, %d) invalid\n", in r600_cs_track_validate_cb()
422 dev_warn(p->dev, "%s offset[%d] 0x%llx 0x%llx, %d not aligned\n", __func__, i, in r600_cs_track_validate_cb()
450 dev_warn(p->dev, "%s offset[%d] %d %llu %d %lu too big (%d %d) (%d %d %d)\n", in r600_cs_track_validate_cb()
481 dev_warn(p->dev, "%s FMASK_TILE_MAX too large " in r600_cs_track_validate_cb()
499 dev_warn(p->dev, "%s CMASK_BLOCK_MAX too large " in r600_cs_track_validate_cb()
509 dev_warn(p->dev, "%s invalid tile mode\n", __func__); in r600_cs_track_validate_cb()
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Dradeon_device.c479 dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); in radeon_wb_init()
491 dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r); in radeon_wb_init()
498 dev_warn(rdev->dev, "(%d) map WB bo failed\n", r); in radeon_wb_init()
584 dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); in radeon_vram_location()
590 dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); in radeon_vram_location()
622 dev_warn(rdev->dev, "limiting GTT\n"); in radeon_gtt_location()
628 dev_warn(rdev->dev, "limiting GTT\n"); in radeon_gtt_location()
1132 dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n", in radeon_check_arguments()
1142 dev_warn(rdev->dev, "gart size (%d) too small\n", in radeon_check_arguments()
1146 dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n", in radeon_check_arguments()
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Dr520.c142 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); in r520_mc_program()
231 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in r520_resume()
276 dev_warn(rdev->dev, in r520_init()
Drs400.c398 dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n"); in rs400_mc_program()
472 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in rs400_resume()
545 dev_warn(rdev->dev, in rs400_init()
Dradeon_agp.c269 dev_warn(rdev->dev, "AGP aperture too small (%zuM) " in radeon_agp_init()
390 dev_warn(rdev->dev, "radeon AGP reinit failed\n"); in radeon_agp_resume()
Devergreen.c2867 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in evergreen_mc_program()
2918 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in evergreen_mc_program()
3921 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in evergreen_gpu_soft_reset()
4038 dev_warn(rdev->dev, "Wait for MC idle timed out !\n"); in evergreen_gpu_pci_config_reset()
4117 dev_warn(rdev->dev, "(%d) reserve RLC sr bo failed\n", r); in sumo_rlc_fini()
4129 dev_warn(rdev->dev, "(%d) reserve RLC c bo failed\n", r); in sumo_rlc_fini()
4141 dev_warn(rdev->dev, "(%d) reserve RLC cp table bo failed\n", r); in sumo_rlc_fini()
4176 dev_warn(rdev->dev, "(%d) create RLC sr bo failed\n", r); in sumo_rlc_init()
4190 dev_warn(rdev->dev, "(%d) pin RLC sr bo failed\n", r); in sumo_rlc_init()
4197 dev_warn(rdev->dev, "(%d) map RLC sr bo failed\n", r); in sumo_rlc_init()
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Dr420.c317 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in r420_resume()
407 dev_warn(rdev->dev, in r420_init()
/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dgfx_v11_0_3.c48 dev_warn(adev->dev, "RLC_GC_FED irq is generated, but rlc_status0 and rlc_status1 are empty!\n"); in gfx_v11_0_3_rlc_gc_fed_irq()
65 dev_warn(adev->dev, "RLC %s FED IRQ\n", ras_if->name); in gfx_v11_0_3_rlc_gc_fed_irq()
74 dev_warn(adev->dev, in gfx_v11_0_3_rlc_gc_fed_irq()
Damdgpu_umc.c41 dev_warn(adev->dev, in amdgpu_umc_convert_error_address()
63 dev_warn(adev->dev, in amdgpu_umc_page_retirement_mca()
124 dev_warn(adev->dev, "Failed to alloc memory for " in amdgpu_umc_handle_bad_pages()
151 dev_warn(adev->dev, "Failed to alloc memory for " in amdgpu_umc_handle_bad_pages()
261 dev_warn(adev->dev, in amdgpu_umc_pasid_poison_handler()
Dgmc_v6_0.c228 dev_warn(adev->dev, "Wait for MC idle timedout !\n"); in gmc_v6_0_mc_program()
255 dev_warn(adev->dev, "Wait for MC idle timedout !\n"); in gmc_v6_0_mc_program()
412 dev_warn(adev->dev, "Disabling VM faults because of PRT request!\n"); in gmc_v6_0_set_prt()
555 dev_warn(adev->dev, "gmc_v6_0 PCIE GART already initialized\n"); in gmc_v6_0_gart_init()
832 dev_warn(adev->dev, "No suitable DMA available.\n"); in gmc_v6_0_sw_init()
996 dev_warn(adev->dev, "Wait for GMC idle timed out !\n"); in gmc_v6_0_soft_reset()
Damdgpu_psp.c384 dev_warn(adev->dev, "Invalid PSP runtime database entry count\n"); in psp_get_runtime_db_entry()
395 dev_warn(adev->dev, "Invalid PSP runtime database boot cfg entry size\n"); in psp_get_runtime_db_entry()
406 dev_warn(adev->dev, "Invalid PSP runtime database scpm entry size\n"); in psp_get_runtime_db_entry()
717 dev_warn(psp->adev->dev, in psp_cmd_submit_buf()
721 dev_warn( in psp_cmd_submit_buf()
1573 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1577 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1584 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1588 dev_warn(psp->adev->dev, in psp_ras_ta_check_status()
1673 dev_warn(psp->adev->dev, "RAS: Unsupported Interface\n"); in psp_ras_invoke()
[all …]
Ddf_v4_3.c53 dev_warn(adev->dev, "DF poison setting is inconsistent(%d:%d:%d:%d)!\n", in df_v4_3_query_ras_poison_mode()
Damdgpu_ras_eeprom.c561 dev_warn(adev->dev, "RAS records:%d exceed threshold:%d", in amdgpu_ras_eeprom_check_err_threshold()
563 dev_warn(adev->dev, in amdgpu_ras_eeprom_check_err_threshold()
567 dev_warn(adev->dev, "This GPU is in BAD status."); in amdgpu_ras_eeprom_check_err_threshold()
568 dev_warn(adev->dev, "Please retire it or set a larger " in amdgpu_ras_eeprom_check_err_threshold()
744 dev_warn(adev->dev, in amdgpu_ras_eeprom_update_header()
1400 dev_warn(adev->dev, "RAS records:%u exceeds 90%% of threshold:%d", in amdgpu_ras_eeprom_init()
1433 dev_warn(adev->dev, "GPU will be initialized due to bad_page_threshold = -1."); in amdgpu_ras_eeprom_init()
Damdgpu_gfx.c343 dev_warn(adev->dev, "(%d) failed to init kiq ring\n", r); in amdgpu_gfx_kiq_init_ring()
371 dev_warn(adev->dev, "failed to create KIQ bo (%d).\n", r); in amdgpu_gfx_kiq_init()
379 dev_warn(adev->dev, "(%d) reserve kiq eop bo failed\n", r); in amdgpu_gfx_kiq_init()
415 dev_warn(adev->dev, "failed to create ring mqd ob (%d)", r); in amdgpu_gfx_mqd_sw_init()
422 dev_warn(adev->dev, in amdgpu_gfx_mqd_sw_init()
437 dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r); in amdgpu_gfx_mqd_sw_init()
445 dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name); in amdgpu_gfx_mqd_sw_init()
461 dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r); in amdgpu_gfx_mqd_sw_init()
469 dev_warn(adev->dev, "no memory to create MQD backup for ring %s\n", ring->name); in amdgpu_gfx_mqd_sw_init()
1185 …dev_warn(adev->dev, "set kernel compute queue number to 8 due to invalid parameter provided by use… in amdgpu_gfx_get_num_kcq()
Damdgpu_ras.c172 dev_warn(adev->dev, in amdgpu_reserve_page_direct()
179 dev_warn(adev->dev, in amdgpu_reserve_page_direct()
201 dev_warn(adev->dev, "WARNING: THIS IS ONLY FOR TEST PURPOSES AND WILL CORRUPT RAS EEPROM\n"); in amdgpu_reserve_page_direct()
202 dev_warn(adev->dev, "Clear EEPROM:\n"); in amdgpu_reserve_page_direct()
203 dev_warn(adev->dev, " echo 1 > /sys/kernel/debug/dri/0/ras/ras_eeprom_reset\n"); in amdgpu_reserve_page_direct()
227 dev_warn(obj->adev->dev, "Failed to reset error counter and error status"); in amdgpu_ras_debugfs_read()
488 dev_warn(adev->dev, "RAS WARN: error injection " in amdgpu_ras_debugfs_ctrl_write()
519 dev_warn(adev->dev, "RAS WARN: input address " in amdgpu_ras_debugfs_ctrl_write()
529 dev_warn(adev->dev, "RAS WARN: inject: 0x%llx has " in amdgpu_ras_debugfs_ctrl_write()
640 dev_warn(obj->adev->dev, "Failed to reset error counter and error status"); in amdgpu_ras_sysfs_read()
[all …]
Dumc_v12_0.c187 dev_warn(adev->dev, "Failed to query RAS physical address for 0x%llx", in umc_v12_0_convert_error_address()
315 dev_warn(adev->dev, "Failed to query RAS physical address for 0x%llx", in umc_v12_0_convert_mca_to_addr()
593 dev_warn(adev->dev, "Fail to convert error address! count:%d\n", count); in umc_v12_0_update_ecc_status()
Damdgpu_seq64.c239 dev_warn(adev->dev, "(%d) create seq64 failed\n", r); in amdgpu_seq64_init()
Damdgpu_xgmi.c1370 dev_warn(adev->dev, "XGMI RAS error query not supported"); in amdgpu_xgmi_legacy_query_ras_error_count()
1471 dev_warn(adev->dev, "Failed to disallow df cstate"); in amdgpu_ras_error_inject_xgmi()
1475 dev_warn(adev->dev, "Failed to disallow XGMI power down"); in amdgpu_ras_error_inject_xgmi()
1484 dev_warn(adev->dev, "Failed to allow XGMI power down"); in amdgpu_ras_error_inject_xgmi()
1487 dev_warn(adev->dev, "Failed to allow df cstate"); in amdgpu_ras_error_inject_xgmi()
Damdgpu_gmc.c291 dev_warn(adev->dev, "limiting GART\n"); in amdgpu_gmc_gart_location()
1205 dev_warn( in amdgpu_gmc_get_nps_memranges()
1215 dev_warn( in amdgpu_gmc_get_nps_memranges()
1230 dev_warn( in amdgpu_gmc_get_nps_memranges()
/openbsd/src/sys/dev/pci/drm/
Ddrm_panel.c117 dev_warn(panel->dev, "Skipping prepare of already prepared panel\n"); in drm_panel_prepare()
174 dev_warn(panel->dev, "Skipping unprepare of already unprepared panel\n"); in drm_panel_unprepare()
220 dev_warn(panel->dev, "Skipping enable of already enabled panel\n"); in drm_panel_enable()
267 dev_warn(panel->dev, "Skipping disable of already disabled panel\n"); in drm_panel_disable()
/openbsd/src/sys/dev/usb/dwc2/
Ddwc2_core.c348 dev_warn(hsotg->dev, "%s: Couldn't set %s mode\n", in dwc2_wait_for_mode()
466 dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL_CSFTRST\n", in dwc2_core_reset()
473 dev_warn(hsotg->dev, "%s: HANG! Soft Reset timeout GRSTCTL_CSFTRST_DONE\n", in dwc2_core_reset()
501 dev_warn(hsotg->dev, "%s: HANG! AHB Idle timeout GRSTCTL GRSTCTL_AHBIDLE\n", in dwc2_core_reset()
627 dev_warn(hsotg->dev, "%s() Invalid dr_mode=%d\n", in dwc2_force_dr_mode()
827 dev_warn(hsotg->dev, "%s: HANG! AHB Idle GRSCTL\n", in dwc2_flush_tx_fifo()
835 dev_warn(hsotg->dev, "%s: HANG! timeout GRSTCTL GRSTCTL_TXFFLSH\n", in dwc2_flush_tx_fifo()
855 dev_warn(hsotg->dev, "%s: HANG! AHB Idle GRSCTL\n", in dwc2_flush_rx_fifo()
863 dev_warn(hsotg->dev, "%s: HANG! timeout GRSTCTL GRSTCTL_RXFFLSH\n", in dwc2_flush_rx_fifo()
Ddwc2.h71 #define dev_warn(d,fmt,...) do { \ macro
93 #define dev_warn(...) do { } while (0) macro
Ddwc2_params.c752 dev_warn(hsotg->dev, "%s: Invalid parameter g-tx-fifo-size, setting to default average\n", in dwc2_check_param_tx_fifo_sizes()
762 dev_warn(hsotg->dev, "%s: Invalid parameter g_tx_fifo_size[%d]=%d\n", in dwc2_check_param_tx_fifo_sizes()
773 dev_warn(hsotg->dev, "%s: Invalid parameter %s=%d\n", \
781 dev_warn(hsotg->dev, "%s: Invalid parameter %s=%d\n", \
/openbsd/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
Dcommon_baco.c75 dev_warn(adev->dev, "Invalid BACO command.\n"); in baco_cmd_handler()

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