| /openbsd/src/sys/dev/fdt/ |
| D | sxipwm.c | 51 uint32_t divider; member
156 for (i = 0; sxipwm_prescalers[i].divider; i++) { in sxipwm_get_state()
165 rate = sc->sc_clkin / sxipwm_prescalers[prescaler].divider; in sxipwm_get_state()
193 for (i = 0; sxipwm_prescalers[i].divider; i++) { in sxipwm_set_state()
194 rate = sc->sc_clkin / sxipwm_prescalers[i].divider; in sxipwm_set_state()
204 rate = sc->sc_clkin / sxipwm_prescalers[prescaler].divider; in sxipwm_set_state()
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/ |
| D | dcn20_clk_mgr.c | 73 uint32_t dentist_get_did_from_divider(int divider) in dentist_get_did_from_divider() argument
78 if (divider < DENTIST_DIVIDER_RANGE_2_START) { in dentist_get_did_from_divider()
79 if (divider < DENTIST_DIVIDER_RANGE_1_START) in dentist_get_did_from_divider()
83 + (divider - DENTIST_DIVIDER_RANGE_1_START) in dentist_get_did_from_divider()
85 } else if (divider < DENTIST_DIVIDER_RANGE_3_START) { in dentist_get_did_from_divider()
87 + (divider - DENTIST_DIVIDER_RANGE_2_START) in dentist_get_did_from_divider()
89 } else if (divider < DENTIST_DIVIDER_RANGE_4_START) { in dentist_get_did_from_divider()
91 + (divider - DENTIST_DIVIDER_RANGE_3_START) in dentist_get_did_from_divider()
95 + (divider - DENTIST_DIVIDER_RANGE_4_START) in dentist_get_did_from_divider()
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| D | dcn20_clk_mgr.h | 46 uint32_t dentist_get_did_from_divider(int divider);
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| /openbsd/src/usr.bin/units/ |
| D | units.c | 287 char *divider, *slash; in addunit() local
306 divider = strchr(item, '|'); in addunit()
307 if (divider) { in addunit()
308 *divider = 0; in addunit()
319 num = atof(divider + 1); in addunit()
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| /openbsd/src/sys/dev/pci/drm/radeon/ |
| D | r600_dpm.h | 180 u32 index, u32 divider);
182 u32 index, u32 divider);
184 u32 index, u32 divider);
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| D | trinity_dpm.c | 565 u32 index, u32 divider) in trinity_set_ds_dividers() argument
572 value |= DS_DIV(divider); in trinity_set_ds_dividers()
577 u32 index, u32 divider) in trinity_set_ss_dividers() argument
584 value |= DS_SH_DIV(divider); in trinity_set_ss_dividers()
1784 u32 divider; in trinity_convert_did_to_freq() local
1787 divider = did * 25; in trinity_convert_did_to_freq()
1789 divider = (did - 64) * 50 + 1600; in trinity_convert_did_to_freq()
1791 divider = (did - 96) * 100 + 3200; in trinity_convert_did_to_freq()
1793 divider = 128 * 100; in trinity_convert_did_to_freq()
1797 return ((pi->sys_info.dentist_vco_freq * 100) + (divider - 1)) / divider; in trinity_convert_did_to_freq()
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| D | radeon_legacy_crtc.c | 754 int divider; in radeon_set_pll() member
822 for (post_div = &post_divs[0]; post_div->divider; ++post_div) { in radeon_set_pll()
823 if (post_div->divider == post_divider) in radeon_set_pll()
827 if (!post_div->divider) in radeon_set_pll()
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| D | sumo_dpm.c | 472 u32 index, u32 divider) in sumo_set_divider_value() argument
479 SCLK_FSTATE_0_DIV(divider), ~SCLK_FSTATE_0_DIV_MASK); in sumo_set_divider_value()
482 SCLK_FSTATE_1_DIV(divider), ~SCLK_FSTATE_1_DIV_MASK); in sumo_set_divider_value()
485 SCLK_FSTATE_2_DIV(divider), ~SCLK_FSTATE_2_DIV_MASK); in sumo_set_divider_value()
488 SCLK_FSTATE_3_DIV(divider), ~SCLK_FSTATE_3_DIV_MASK); in sumo_set_divider_value()
492 u32 index, u32 divider) in sumo_set_ds_dividers() argument
500 dpm_ctrl |= (divider << (index * 3)); in sumo_set_ds_dividers()
506 u32 index, u32 divider) in sumo_set_ss_dividers() argument
514 dpm_ctrl |= (divider << (index * 3)); in sumo_set_ss_dividers()
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| D | r600_dpm.c | 477 u32 index, u32 divider) in r600_engine_clock_entry_set_post_divider() argument
480 STEP_0_SPLL_POST_DIV(divider), ~STEP_0_SPLL_POST_DIV_MASK); in r600_engine_clock_entry_set_post_divider()
484 u32 index, u32 divider) in r600_engine_clock_entry_set_reference_divider() argument
487 STEP_0_SPLL_REF_DIV(divider), ~STEP_0_SPLL_REF_DIV_MASK); in r600_engine_clock_entry_set_reference_divider()
491 u32 index, u32 divider) in r600_engine_clock_entry_set_feedback_divider() argument
494 STEP_0_SPLL_FB_DIV(divider), ~STEP_0_SPLL_FB_DIV_MASK); in r600_engine_clock_entry_set_feedback_divider()
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| D | rv6xx_dpm.c | 380 u32 index, u32 divider) in rv6xx_memory_clock_entry_set_post_divider() argument
383 LEVEL0_MPLL_POST_DIV(divider), ~LEVEL0_MPLL_POST_DIV_MASK); in rv6xx_memory_clock_entry_set_post_divider()
387 u32 index, u32 divider) in rv6xx_memory_clock_entry_set_feedback_divider() argument
389 WREG32_P(MPLL_FREQ_LEVEL_0 + (index * 4), LEVEL0_MPLL_FB_DIV(divider), in rv6xx_memory_clock_entry_set_feedback_divider()
394 u32 index, u32 divider) in rv6xx_memory_clock_entry_set_reference_divider() argument
397 LEVEL0_MPLL_REF_DIV(divider), ~LEVEL0_MPLL_REF_DIV_MASK); in rv6xx_memory_clock_entry_set_reference_divider()
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| /openbsd/src/sys/dev/pci/drm/i915/display/ |
| D | intel_lvds.c | 65 int divider; member
177 pps->divider = REG_FIELD_GET(PP_REFERENCE_DIVIDER_MASK, val); in intel_lvds_pps_get_hw_state()
205 pps->divider, pps->port, pps->powerdown_on_reset); in intel_lvds_pps_get_hw_state()
230 REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, pps->divider) | in intel_lvds_pps_init_hw()
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| D | intel_cdclk.c | 670 u32 divider; in vlv_set_cdclk() local
672 divider = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, in vlv_set_cdclk()
678 val |= divider; in vlv_set_cdclk()
682 CCK_FREQUENCY_STATUS) == (divider << CCK_FREQUENCY_STATUS_SHIFT), in vlv_set_cdclk()
1645 u32 divider; in bxt_get_cdclk() local
1662 divider = intel_de_read(dev_priv, CDCLK_CTL) & BXT_CDCLK_CD2X_DIV_SEL_MASK; in bxt_get_cdclk()
1664 switch (divider) { in bxt_get_cdclk()
1678 MISSING_CASE(divider); in bxt_get_cdclk()
3508 int divider, fraction; in cnp_rawclk() local
3512 divider = 24000; in cnp_rawclk()
[all …]
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| D | vlv_dsi.c | 1203 static u16 txclkesc(u32 divider, unsigned int us) in txclkesc() argument
1205 switch (divider) { in txclkesc()
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| D | intel_dpll_mgr.c | 1507 unsigned int divider) in skl_wrpll_try_divider() argument
1521 ctx->p = divider; in skl_wrpll_try_divider()
1529 ctx->p = divider; in skl_wrpll_try_divider()
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| D | intel_display.c | 156 int divider; in vlv_get_cck_clock() local
159 divider = val & CCK_FREQUENCY_VALUES; in vlv_get_cck_clock()
162 (divider << CCK_FREQUENCY_STATUS_SHIFT), in vlv_get_cck_clock()
165 return DIV_ROUND_CLOSEST(ref_freq << 1, divider + 1); in vlv_get_cck_clock()
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/inc/hw/ |
| D | opp.h | 270 uint32_t divider; /* (actually HW range is min/divider; divider !=0) */ member
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| /openbsd/src/gnu/usr.bin/gcc/gcc/config/alpha/ |
| D | ev4.md | 128 ; The floating point divider is not pipelined. Also, "no FPOP insn can be
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| D | ev5.md | 161 ; The floating point divider is not pipelined. Also, "no insn can be issued
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| /openbsd/src/gnu/usr.bin/gcc/gcc/config/i386/ |
| D | ppro.md | 71 ;; ??? Does the divider lock out the pipe while it works,
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| /openbsd/src/gnu/gcc/gcc/config/alpha/ |
| D | ev4.md | 143 ; The floating point divider is not pipelined. Also, "no FPOP insn can be
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| D | ev5.md | 166 ; The floating point divider is not pipelined. Also, "no insn can be issued
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| /openbsd/src/sys/dev/pci/ |
| D | cmpci.c | 277 int divider; member
312 return cmpci_rate_table[index].divider; in cmpci_index_to_divider()
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| /openbsd/src/usr.bin/vi/docs/ |
| D | changelog | 743 + Display the file name on split screens instead of a divider line.
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| /openbsd/src/share/dict/ |
| D | web2a | 7352 bow divider
20795 fertilizer divider
70451 voltage divider
73888 wing divider
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| /openbsd/src/gnu/usr.bin/perl/lib/unicore/ |
| D | NamesList.txt | 36683 x (ugaritic word divider - 1039F)
36684 x (old persian word divider - 103D0)
39411 = word divider
51814 = man and woman symbol with divider
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