| /openbsd/src/sys/dev/pci/drm/i915/display/ |
| D | intel_dpll.c | 316 static int pnv_calc_dpll_params(int refclk, struct dpll *clock) in pnv_calc_dpll_params()
329 static u32 i9xx_dpll_compute_m(const struct dpll *dpll) in i9xx_dpll_compute_m() argument
331 return 5 * (dpll->m1 + 2) + (dpll->m2 + 2); in i9xx_dpll_compute_m()
334 int i9xx_calc_dpll_params(int refclk, struct dpll *clock) in i9xx_calc_dpll_params()
347 static int vlv_calc_dpll_params(int refclk, struct dpll *clock) in vlv_calc_dpll_params()
360 int chv_calc_dpll_params(int refclk, struct dpll *clock) in chv_calc_dpll_params()
378 if ((hw_state->dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN) in i9xx_pll_refclk()
407 hw_state->dpll = intel_de_read(dev_priv, DPLL(dev_priv, crtc->pipe)); in i9xx_dpll_get_hw_state()
414 hw_state->dpll &= ~(DPLL_LOCK_VLV | in i9xx_dpll_get_hw_state()
426 u32 dpll = hw_state->dpll; in i9xx_crtc_clock_get() local
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| D | intel_dpll.h | 11 struct dpll;
24 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
25 u32 i9xx_dpll_compute_fp(const struct dpll *dpll);
32 const struct dpll *dpll);
42 struct dpll *best_clock);
43 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
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| D | intel_dpll_mgr.c | 263 mutex_lock(&i915->display.dpll.lock); in intel_enable_shared_dpll()
289 mutex_unlock(&i915->display.dpll.lock); in intel_enable_shared_dpll()
312 mutex_lock(&i915->display.dpll.lock); in intel_disable_shared_dpll()
335 mutex_unlock(&i915->display.dpll.lock); in intel_disable_shared_dpll()
537 hw_state->dpll = val; in ibx_pch_dpll_get_hw_state()
571 intel_de_write(i915, PCH_DPLL(id), hw_state->dpll); in ibx_pch_dpll_enable()
582 intel_de_write(i915, PCH_DPLL(id), hw_state->dpll); in ibx_pch_dpll_enable()
649 hw_state->dpll, in ibx_dump_hw_state()
661 return a->dpll == b->dpll && in ibx_compare_hw_state()
723 if (i915->display.dpll.pch_ssc_use & BIT(id)) in hsw_ddi_wrpll_disable()
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| D | g4x_dp.h | 22 const struct dpll *vlv_get_dpll(struct drm_i915_private *i915);
32 static inline const struct dpll *vlv_get_dpll(struct drm_i915_private *i915) in vlv_get_dpll()
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| D | intel_dpll_mgr.h | 34 for ((__i) = 0; (__i) < (__i915)->display.dpll.num_shared_dpll && \
35 ((__pll) = &(__i915)->display.dpll.shared_dplls[(__i)]) ; (__i)++)
192 u32 dpll; member
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| D | intel_pch_refclk.c | 464 dev_priv->display.dpll.pch_ssc_use = 0; in lpt_init_pch_refclk()
468 dev_priv->display.dpll.pch_ssc_use |= BIT(DPLL_ID_SPLL); in lpt_init_pch_refclk()
473 dev_priv->display.dpll.pch_ssc_use |= BIT(DPLL_ID_WRPLL1); in lpt_init_pch_refclk()
478 dev_priv->display.dpll.pch_ssc_use |= BIT(DPLL_ID_WRPLL2); in lpt_init_pch_refclk()
481 if (dev_priv->display.dpll.pch_ssc_use) in lpt_init_pch_refclk()
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| D | intel_display_core.h | 298 const struct intel_dpll_funcs *dpll; member
545 struct intel_dpll dpll; member
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| D | g4x_dp.c | 31 static const struct dpll g4x_dpll[] = {
36 static const struct dpll pch_dpll[] = {
41 static const struct dpll vlv_dpll[] = {
46 static const struct dpll chv_dpll[] = {
52 const struct dpll *vlv_get_dpll(struct drm_i915_private *i915) in vlv_get_dpll()
61 const struct dpll *divisor = NULL; in g4x_dp_set_clock()
81 pipe_config->dpll = divisor[i]; in g4x_dp_set_clock()
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| D | intel_dvo.c | 420 u32 dpll[I915_MAX_PIPES]; in intel_dvo_init_dev() local
459 dpll[pipe] = intel_de_rmw(dev_priv, DPLL(dev_priv, pipe), 0, in intel_dvo_init_dev()
466 intel_de_write(dev_priv, DPLL(dev_priv, pipe), dpll[pipe]); in intel_dvo_init_dev()
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| D | icl_dsi.c | 607 mutex_lock(&dev_priv->display.dpll.lock); in gen11_dsi_gate_clocks()
613 mutex_unlock(&dev_priv->display.dpll.lock); in gen11_dsi_gate_clocks()
623 mutex_lock(&dev_priv->display.dpll.lock); in gen11_dsi_ungate_clocks()
629 mutex_unlock(&dev_priv->display.dpll.lock); in gen11_dsi_ungate_clocks()
659 mutex_lock(&dev_priv->display.dpll.lock); in gen11_dsi_map_pll()
675 mutex_unlock(&dev_priv->display.dpll.lock); in gen11_dsi_map_pll()
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| D | intel_ddi.c | 1490 mutex_lock(&i915->display.dpll.lock); in _icl_ddi_enable_clock()
1500 mutex_unlock(&i915->display.dpll.lock); in _icl_ddi_enable_clock()
1506 mutex_lock(&i915->display.dpll.lock); in _icl_ddi_disable_clock()
1510 mutex_unlock(&i915->display.dpll.lock); in _icl_ddi_disable_clock()
1785 mutex_lock(&i915->display.dpll.lock); in icl_ddi_tc_enable_clock()
1790 mutex_unlock(&i915->display.dpll.lock); in icl_ddi_tc_enable_clock()
1799 mutex_lock(&i915->display.dpll.lock); in icl_ddi_tc_disable_clock()
1804 mutex_unlock(&i915->display.dpll.lock); in icl_ddi_tc_disable_clock()
1889 mutex_lock(&i915->display.dpll.lock); in skl_ddi_enable_clock()
1897 mutex_unlock(&i915->display.dpll.lock); in skl_ddi_enable_clock()
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| D | intel_display_types.h | 681 struct dpll { struct
1177 struct dpll dpll; member
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| D | intel_display.c | 1338 if (i915->display.dpll.mgr) { in intel_encoders_update_prepare()
3121 tmp = pipe_config->dpll_hw_state.i9xx.dpll; in i9xx_get_pipe_config()
5399 if (dev_priv->display.dpll.mgr) in intel_pipe_config_compare()
5403 if (dev_priv->display.dpll.mgr || HAS_GMCH(dev_priv)) in intel_pipe_config_compare()
8263 struct dpll clock = { in i830_enable_pipe()
8270 u32 dpll, fp; in i830_enable_pipe() local
8281 dpll = DPLL_DVO_2X_MODE | in i830_enable_pipe()
8312 dpll & ~DPLL_VGA_MODE_DIS); in i830_enable_pipe()
8313 intel_de_write(dev_priv, DPLL(dev_priv, pipe), dpll); in i830_enable_pipe()
8324 intel_de_write(dev_priv, DPLL(dev_priv, pipe), dpll); in i830_enable_pipe()
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| D | intel_pch_display.c | 533 tmp = crtc_state->dpll_hw_state.i9xx.dpll; in ilk_pch_get_config()
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| D | intel_display_debugfs.c | 654 dev_priv->display.dpll.ref_clks.nssc, in i915_shared_dplls_info()
655 dev_priv->display.dpll.ref_clks.ssc); in i915_shared_dplls_info()
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| D | intel_display.h | 36 struct dpll;
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| D | intel_sdvo.c | 1286 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
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| /openbsd/src/sys/dev/pci/drm/i915/gvt/ |
| D | handlers.c | 513 refclk = vgpu->gvt->gt->i915->display.dpll.ref_clks.ssc; in bdw_vgpu_get_dp_bitrate()
544 int refclk = vgpu->gvt->gt->i915->display.dpll.ref_clks.nssc; in bxt_vgpu_get_dp_bitrate()
547 struct dpll clock = {}; in bxt_vgpu_get_dp_bitrate()
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