Searched refs:dprefclk_khz (Results 1 – 11 of 11) sorted by relevance
136 clk_mgr->base.dprefclk_khz = 600000; in dce120_clk_mgr_construct()143 clk_mgr->base.dprefclk_khz = 625000; in dce121_clk_mgr_construct()
263 uint32_t dprefclk_khz; member333 …int dprefclk_khz; // Used by program pixel clock in clock source funcs, need to figureout where th… member
153 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in rv1_vbios_smu_set_dprefclk()
331 clk_mgr->base.dprefclk_khz = 600000; in rv1_clk_mgr_construct()
174 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in rn_vbios_smu_set_dprefclk()
765 clk_mgr->base.dprefclk_khz = 600000; in rn_clk_mgr_construct()
973 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in dcn31_program_pix_clk()1087 dtbclk_p_src_clk_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in dcn401_program_pix_clk()1196 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in get_pixel_clk_frequency_100hz()1295 clock_source->ctx->dc->clk_mgr->dprefclk_khz*1000); in dcn20_program_pix_clk()1331 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in dcn3_program_pix_clk()
178 return clk_mgr_adjust_dp_ref_freq_for_ss(clk_mgr_dce, clk_mgr_dce->dprefclk_khz); in dce12_get_dp_ref_freq_khz()934 clk_mgr_dce->dprefclk_khz = 600000; in dce120_clk_mgr_create()955 clk_mgr_dce->dprefclk_khz = 625000; in dce121_clk_mgr_create()
540 clk_mgr->base.dprefclk_khz = 730000; // 700 MHz planned if VCO is 3.85 GHz, will be retrieved in dcn3_clk_mgr_construct()554 clk_mgr->base.dprefclk_khz = s.dprefclk * 1000; in dcn3_clk_mgr_construct()
553 clk_mgr->base.dprefclk_khz = 700000; // 700 MHz planned if VCO is 3.85 GHz, will be retrieved in dcn20_clk_mgr_construct()581 clk_mgr->base.dprefclk_khz = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR in dcn20_clk_mgr_construct()
159 return dce_adjust_dp_ref_freq_for_ss(clk_mgr_dce, clk_mgr_base->dprefclk_khz); in dce12_get_dp_ref_freq_khz()