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Searched refs:enable_reg (Results 1 – 12 of 12) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/dce80/
Dirq_service_dce80.c54 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
62 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
94 .enable_reg = mmDC_HPD ## reg_num ## _INT_CONTROL,\
109 .enable_reg = mmDC_HPD ## reg_num ## _INT_CONTROL,\
123 .enable_reg = mmDCP ## reg_num ## _GRPH_INTERRUPT_CONTROL,\
138 .enable_reg = mmCRTC ## reg_num ## _CRTC_INTERRUPT_CONTROL,\
154 .enable_reg = mmCRTC ## reg_num ## _CRTC_VERTICAL_INTERRUPT0_CONTROL,\
/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/dce60/
Dirq_service_dce60.c63 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
71 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
103 .enable_reg = mmDC_HPD ## reg_num ## _INT_CONTROL,\
118 .enable_reg = mmDC_HPD ## reg_num ## _INT_CONTROL,\
132 .enable_reg = mmDCP ## reg_num ## _GRPH_INTERRUPT_CONTROL,\
147 .enable_reg = mmCRTC ## reg_num ## _CRTC_INTERRUPT_CONTROL,\
163 .enable_reg = mmLB ## reg_num ## _INT_MASK,\
/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/dce110/
Dirq_service_dce110.c53 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
59 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
91 .enable_reg = mmHPD ## reg_num ## _DC_HPD_INT_CONTROL,\
106 .enable_reg = mmHPD ## reg_num ## _DC_HPD_INT_CONTROL,\
119 .enable_reg = mmDCP ## reg_num ## _GRPH_INTERRUPT_CONTROL,\
134 .enable_reg = mmCRTC ## reg_num ## _CRTC_INTERRUPT_CONTROL,\
150 .enable_reg = mmCRTC ## reg_num ## _CRTC_VERTICAL_INTERRUPT0_CONTROL,\
/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/dcn30/
Dirq_service_dcn30.c158 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
166 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
223 .enable_reg = SRI(reg1, block, reg_num),\
237 .enable_reg = SRI_DMUB(reg1),\
/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/dcn21/
Dirq_service_dcn21.c149 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
157 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
214 .enable_reg = SRI(reg1, block, reg_num),\
228 .enable_reg = SRI_DMUB(reg1),\
/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/dce120/
Dirq_service_dce120.c54 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
62 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
104 .enable_reg = SRI(reg1, block, reg_num),\
/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/dcn20/
Dirq_service_dcn20.c147 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
155 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
204 .enable_reg = SRI(reg1, block, reg_num),\
/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/dcn10/
Dirq_service_dcn10.c146 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
154 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
201 .enable_reg = SRI(reg1, block, reg_num),\
/openbsd/src/sys/dev/pci/drm/i915/display/
Dintel_dpll_mgr.c3546 i915_reg_t enable_reg = intel_tc_pll_enable_reg(i915, pll); in mg_pll_get_hw_state() local
3553 val = intel_de_read(i915, enable_reg); in mg_pll_get_hw_state()
3677 i915_reg_t enable_reg) in icl_pll_get_hw_state() argument
3690 val = intel_de_read(i915, enable_reg); in icl_pll_get_hw_state()
3739 i915_reg_t enable_reg = intel_combo_pll_enable_reg(i915, pll); in combo_pll_get_hw_state() local
3741 return icl_pll_get_hw_state(i915, pll, dpll_hw_state, enable_reg); in combo_pll_get_hw_state()
3903 i915_reg_t enable_reg) in icl_pll_power_enable() argument
3905 intel_de_rmw(i915, enable_reg, 0, PLL_POWER_ENABLE); in icl_pll_power_enable()
3911 if (intel_de_wait_for_set(i915, enable_reg, PLL_POWER_STATE, 1)) in icl_pll_power_enable()
3918 i915_reg_t enable_reg) in icl_pll_enable() argument
[all …]
Dintel_snps_phy.c1828 i915_reg_t enable_reg = (phy <= PHY_D ? in intel_mpllb_enable() local
1852 intel_de_rmw(dev_priv, enable_reg, 0, PLL_ENABLE); in intel_mpllb_enable()
1869 if (intel_de_wait_for_set(dev_priv, enable_reg, PLL_LOCK, 5)) in intel_mpllb_enable()
1885 i915_reg_t enable_reg = (phy <= PHY_D ? in intel_mpllb_disable() local
1897 intel_de_rmw(i915, enable_reg, PLL_ENABLE, 0); in intel_mpllb_disable()
1909 if (intel_de_wait_for_clear(i915, enable_reg, PLL_LOCK, 5)) in intel_mpllb_disable()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/irq/
Dirq_service.h49 uint32_t enable_reg; member
Dirq_service.c90 uint32_t addr = info->enable_reg; in dal_irq_service_set_generic()