| /openbsd/src/sys/dev/pci/drm/amd/amdgpu/ |
| D | vega20_ih.c | 682 uint32_t data, def, field_val; in vega20_ih_update_clockgating_state() local 686 field_val = enable ? 0 : 1; in vega20_ih_update_clockgating_state() 688 IH_RETRY_INT_CAM_MEM_CLK_SOFT_OVERRIDE, field_val); in vega20_ih_update_clockgating_state() 690 IH_BUFFER_MEM_CLK_SOFT_OVERRIDE, field_val); in vega20_ih_update_clockgating_state() 692 DBUS_MUX_CLK_SOFT_OVERRIDE, field_val); in vega20_ih_update_clockgating_state() 694 OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val); in vega20_ih_update_clockgating_state() 696 LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val); in vega20_ih_update_clockgating_state() 698 DYN_CLK_SOFT_OVERRIDE, field_val); in vega20_ih_update_clockgating_state() 700 REG_CLK_SOFT_OVERRIDE, field_val); in vega20_ih_update_clockgating_state()
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| D | vega10_ih.c | 589 uint32_t data, def, field_val; in vega10_ih_update_clockgating_state() local 593 field_val = enable ? 0 : 1; in vega10_ih_update_clockgating_state() 599 IH_BUFFER_MEM_CLK_SOFT_OVERRIDE, field_val); in vega10_ih_update_clockgating_state() 602 DBUS_MUX_CLK_SOFT_OVERRIDE, field_val); in vega10_ih_update_clockgating_state() 604 OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val); in vega10_ih_update_clockgating_state() 606 LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val); in vega10_ih_update_clockgating_state() 608 DYN_CLK_SOFT_OVERRIDE, field_val); in vega10_ih_update_clockgating_state() 610 REG_CLK_SOFT_OVERRIDE, field_val); in vega10_ih_update_clockgating_state()
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| D | navi10_ih.c | 656 uint32_t data, def, field_val; in navi10_ih_update_clockgating_state() local 660 field_val = enable ? 0 : 1; in navi10_ih_update_clockgating_state() 662 DBUS_MUX_CLK_SOFT_OVERRIDE, field_val); in navi10_ih_update_clockgating_state() 664 OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val); in navi10_ih_update_clockgating_state() 666 LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val); in navi10_ih_update_clockgating_state() 668 DYN_CLK_SOFT_OVERRIDE, field_val); in navi10_ih_update_clockgating_state() 670 REG_CLK_SOFT_OVERRIDE, field_val); in navi10_ih_update_clockgating_state()
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| D | ih_v6_0.c | 682 uint32_t data, def, field_val; in ih_v6_0_update_clockgating_state() local 686 field_val = enable ? 0 : 1; in ih_v6_0_update_clockgating_state() 688 DBUS_MUX_CLK_SOFT_OVERRIDE, field_val); in ih_v6_0_update_clockgating_state() 690 OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val); in ih_v6_0_update_clockgating_state() 692 LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val); in ih_v6_0_update_clockgating_state() 694 DYN_CLK_SOFT_OVERRIDE, field_val); in ih_v6_0_update_clockgating_state() 696 REG_CLK_SOFT_OVERRIDE, field_val); in ih_v6_0_update_clockgating_state()
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| D | ih_v6_1.c | 661 uint32_t data, def, field_val; in ih_v6_1_update_clockgating_state() local 665 field_val = enable ? 0 : 1; in ih_v6_1_update_clockgating_state() 667 DBUS_MUX_CLK_SOFT_OVERRIDE, field_val); in ih_v6_1_update_clockgating_state() 669 OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val); in ih_v6_1_update_clockgating_state() 671 LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val); in ih_v6_1_update_clockgating_state() 673 DYN_CLK_SOFT_OVERRIDE, field_val); in ih_v6_1_update_clockgating_state() 675 REG_CLK_SOFT_OVERRIDE, field_val); in ih_v6_1_update_clockgating_state()
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| D | ih_v7_0.c | 651 uint32_t data, def, field_val; in ih_v7_0_update_clockgating_state() local 655 field_val = enable ? 0 : 1; in ih_v7_0_update_clockgating_state() 657 DBUS_MUX_CLK_SOFT_OVERRIDE, field_val); in ih_v7_0_update_clockgating_state() 659 OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val); in ih_v7_0_update_clockgating_state() 661 LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val); in ih_v7_0_update_clockgating_state() 663 DYN_CLK_SOFT_OVERRIDE, field_val); in ih_v7_0_update_clockgating_state() 665 REG_CLK_SOFT_OVERRIDE, field_val); in ih_v7_0_update_clockgating_state()
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| D | amdgpu_psp.h | 483 uint32_t field_val, uint32_t mask, bool check_changed); 485 uint32_t field_val, uint32_t mask, uint32_t msec_timeout);
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| D | amdgpu.h | 1371 #define REG_SET_FIELD(orig_val, reg, field, field_val) \ argument 1373 (REG_FIELD_MASK(reg, field) & ((field_val) << REG_FIELD_SHIFT(reg, field))))
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| /openbsd/src/sys/dev/pci/drm/amd/include/ |
| D | cgs_common.h | 123 #define CGS_REG_SET_FIELD(orig_val, reg, field, field_val) \ argument 125 (CGS_REG_FIELD_MASK(reg, field) & ((field_val) << CGS_REG_FIELD_SHIFT(reg, field))))
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