| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86InstrVecCompiler.td | 20 def : Pat<(f16 (extractelt (v8f16 VR128:$src), (iPTR 0))), 22 def : Pat<(f32 (extractelt (v4f32 VR128:$src), (iPTR 0))), 24 def : Pat<(f64 (extractelt (v2f64 VR128:$src), (iPTR 0))), 30 def : Pat<(f16 (extractelt (v8f16 VR128X:$src), (iPTR 0))), 32 def : Pat<(f32 (extractelt (v4f32 VR128X:$src), (iPTR 0))), 34 def : Pat<(f64 (extractelt (v2f64 VR128X:$src), (iPTR 0))), 68 def : Pat<(subVT (extract_subvector (VT RC:$src), (iPTR 0))), 71 def : Pat<(VT (insert_subvector undef_or_freeze_undef, subRC:$src, (iPTR 0))), 119 (SrcTy RC:$src), (iPTR 0))), 195 maskzeroupperv1i1:$src, (iPTR 0))), [all …]
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| D | X86InstrAVX512.td | 565 (iPTR imm)), 568 (iPTR imm))>, 577 (iPTR imm)), 580 (iPTR imm))>, AVX512AIi8Base, EVEX_4V, 598 (To.VT To.RC:$src1), (From.VT From.RC:$src2), (iPTR imm)), 606 (iPTR imm)), 712 (iPTR imm))), 724 (iPTR imm))), 735 (iPTR imm))), 745 (iPTR imm))), [all …]
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| D | X86InstrFMA.td | 338 (EltVT (extractelt (VT VR128:$src1), (iPTR 0))), 346 (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))), 353 (EltVT (extractelt (VT VR128:$src1), (iPTR 0))), 360 (Op (EltVT (extractelt (VT VR128:$src1), (iPTR 0))), 368 (EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
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| D | X86InstrSSE.td | 710 (iPTR 0))), addr:$dst)]>, 720 (iPTR 0))), addr:$dst)]>; 757 (iPTR 0))), addr:$dst)]>, VEX, VEX_WIG; 767 (iPTR 0))), addr:$dst)]>; 777 (iPTR 0))), addr:$dst), 806 (iPTR 0))), addr:$dst), 1425 (f32 (any_fpround (f64 (extractelt VR128:$src, (iPTR 0))))))))), 1431 (f64 (any_fpextend (f32 (extractelt VR128:$src, (iPTR 0))))))))), 1479 (f32 (any_fpround (f64 (extractelt VR128:$src, (iPTR 0))))))))), 1485 (f64 (any_fpextend (f32 (extractelt VR128:$src, (iPTR 0))))))))), [all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.td | 765 def calltarget : Operand<iPTR> { 772 def abscalltarget : Operand<iPTR> { 791 def ptr_rc_nor0 : Operand<iPTR>, PointerLikeRegClass<1> { 800 def dispRI34 : Operand<iPTR> { 803 def memri34 : Operand<iPTR> { // memri, imm is a 34-bit value. 811 def memri34_pcrel : Operand<iPTR> { // memri, imm is a 34-bit value. 822 def ptr_rc_idx : Operand<iPTR>, PointerLikeRegClass<0> { 830 def dispRI : Operand<iPTR> { 837 def dispRIX : Operand<iPTR> { 844 def dispRIHash : Operand<iPTR> { [all …]
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| D | PPCInstr64Bit.td | 41 def tocentry : Operand<iPTR> { 1724 def : Pat<(pre_truncsti8 i64:$rS, iPTR:$ptrreg, iaddroff:$ptroff), 1726 def : Pat<(pre_truncsti16 i64:$rS, iPTR:$ptrreg, iaddroff:$ptroff), 1728 def : Pat<(pre_truncsti32 i64:$rS, iPTR:$ptrreg, iaddroff:$ptroff), 1730 def : Pat<(DSFormPreStore i64:$rS, iPTR:$ptrreg, iaddroff:$ptroff), 1733 def : Pat<(pre_truncsti8 i64:$rS, iPTR:$ptrreg, iPTR:$ptroff), 1735 def : Pat<(pre_truncsti16 i64:$rS, iPTR:$ptrreg, iPTR:$ptroff), 1737 def : Pat<(pre_truncsti32 i64:$rS, iPTR:$ptrreg, iPTR:$ptroff), 1739 def : Pat<(pre_store i64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
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| D | PPCInstrInfo.td | 94 def tocentry32 : Operand<iPTR> { 663 def iaddr : ComplexPattern<iPTR, 2, "SelectAddrImm", [], []>; // "stb" 665 def iaddrX4 : ComplexPattern<iPTR, 2, "SelectAddrImmX4", [], []>; // "std" 667 def iaddrX16 : ComplexPattern<iPTR, 2, "SelectAddrImmX16", [], []>; // "stxv" 669 def iaddrX34 : ComplexPattern<iPTR, 2, "SelectAddrImmX34", [], []>; // "pstxvp" 674 def xaddr : ComplexPattern<iPTR, 2, "SelectAddrIdx", [], []>; // "stbx" 676 def xaddrX4 : ComplexPattern<iPTR, 2, "SelectAddrIdxX4", [], []>; // "stdx" 678 def xaddrX16 : ComplexPattern<iPTR, 2, "SelectAddrIdxX16", [], []>; // "stxvx" 680 def xoaddr : ComplexPattern<iPTR, 2, "SelectAddrIdxOnly",[], []>; 684 def addr : ComplexPattern<iPTR, 1, "SelectAddr",[], []>; [all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInfo.td | 77 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>, 78 SDTCisVT<1, iPTR>]>; 80 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/ |
| D | VEInstrInfo.td | 300 def ADDRrri : ComplexPattern<iPTR, 3, "selectADDRrri", [frameindex], []>; 301 def ADDRrii : ComplexPattern<iPTR, 3, "selectADDRrii", [frameindex], []>; 302 def ADDRzri : ComplexPattern<iPTR, 3, "selectADDRzri", [], []>; 303 def ADDRzii : ComplexPattern<iPTR, 3, "selectADDRzii", [], []>; 304 def ADDRri : ComplexPattern<iPTR, 2, "selectADDRri", [frameindex], []>; 305 def ADDRzi : ComplexPattern<iPTR, 2, "selectADDRzi", [], []>; 326 def MEMrri : Operand<iPTR> { 331 def MEMrii : Operand<iPTR> { 336 def MEMzri : Operand<iPTR> { 341 def MEMzii : Operand<iPTR> { [all …]
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| /openbsd/src/gnu/llvm/llvm/utils/TableGen/ |
| D | DAGISelMatcher.cpp | 339 if (T1 == MVT::iPTR) in TypesAreContradictory() 342 if (T2 == MVT::iPTR) in TypesAreContradictory()
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| D | CodeGenTarget.cpp | 49 case MVT::iPTR: return "TLI.getPointerTy()"; in getName() 256 case MVT::iPTR: return "MVT::iPTR"; in getEnumName() 934 return ParamType == MVT::iPTR || ParamType == MVT::iPTRAny; in isParamAPointer()
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| D | CodeGenDAGPatterns.cpp | 38 return VT.isInteger() || VT == MVT::iPTR; in isIntegerOrPtr() 275 bool OutP = Out.count(MVT::iPTR), InP = In.count(MVT::iPTR); in intersect() 329 Out.insert(MVT::iPTR); in intersect() 350 Out.insert(MVT::iPTR); in intersect() 837 Out.insert(MVT::iPTR); in expandOverloads() 1654 return NodeToApply->UpdateNodeType(ResNo, MVT::iPTR, TP); in ApplyTypeConstraint() 1768 return UpdateNodeType(ResNo, MVT::iPTR, TP); in UpdateNodeTypeFromInst() 1867 return MVT::iPTR; in getKnownType() 2320 TypeSetByHwMode VTS(MVT::iPTR); in getImplicitType() 2498 if (VT == MVT::iPTR || VT == MVT::iPTRAny) in ApplyTypeConstraints() [all …]
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| D | IntrinsicEmitter.cpp | 382 case MVT::iPTR: { in EncodeFixedType() 442 case MVT::iPTR: in UpdateArgCodes()
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| D | DAGISelMatcherOpt.cpp | 374 CTM->getType() == MVT::iPTR || in FactorNodes()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.td | 115 def ADDRrr : ComplexPattern<iPTR, 2, "SelectADDRrr", [], []>; 116 def ADDRri : ComplexPattern<iPTR, 2, "SelectADDRri", [frameindex], []>; 141 def MEMrr : Operand<iPTR> { 146 def MEMri : Operand<iPTR> { 160 def TailRelocSymGOTLoad : Operand<iPTR> { 164 def TailRelocSymTLSAdd : Operand<iPTR> { 168 def TailRelocSymTLSLoad : Operand<iPTR> { 172 def TailRelocSymTLSCall : Operand<iPTR> { 305 def getPCX : Operand<iPTR> { 776 [(set iPTR:$rd, ADDRri:$addr)]>; [all …]
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| D | SparcInstr64Bit.td | 179 [(set iPTR:$rd, ADDRri:$addr)]>; 535 def : Pat<(add iPTR:$r, (SPlo tglobaladdr:$in)), (ADDXri $r, tglobaladdr:$in)>; 536 def : Pat<(add iPTR:$r, (SPlo tconstpool:$in)), (ADDXri $r, tconstpool:$in)>; 537 def : Pat<(add iPTR:$r, (SPlo tblockaddress:$in)),
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 27 CCIfType<[iPTR], CCBitConvertToType<i64>>, 122 CCIfType<[iPTR], CCBitConvertToType<i64>>, 172 CCIfType<[f64, v1f64, v1i64, v2f32, v2i32, v4i16, v4f16, v4bf16, v8i8, iPTR], 219 CCIfType<[iPTR], CCBitConvertToType<i64>>, 281 CCIfType<[iPTR], CCBitConvertToType<i64>>, 371 CCIfType<[iPTR], CCBitConvertToType<i64>>,
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | SMInstructions.td | 831 def SMRDImm : ComplexPattern<iPTR, 2, "SelectSMRDImm">; 832 def SMRDImm32 : ComplexPattern<iPTR, 2, "SelectSMRDImm32">; 833 def SMRDSgpr : ComplexPattern<iPTR, 2, "SelectSMRDSgpr">; 834 def SMRDSgprImm : ComplexPattern<iPTR, 3, "SelectSMRDSgprImm">; 835 def SMRDBufferImm : ComplexPattern<iPTR, 1, "SelectSMRDBufferImm">; 836 def SMRDBufferImm32 : ComplexPattern<iPTR, 1, "SelectSMRDBufferImm32">; 837 def SMRDBufferSgprImm : ComplexPattern<iPTR, 2, "SelectSMRDBufferSgprImm">;
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| D | AMDGPUInstrInfo.td | 99 "AMDGPUISD::CONST_DATA_PTR", SDTypeProfile <1, 1, [SDTCisVT<0, iPTR>, 100 SDTCisVT<0, iPTR>]>
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 18 def SDT_MipsJmpLink : SDTypeProfile<0, 1, [SDTCisVT<0, iPTR>]>; 852 def calltarget : Operand<iPTR> { 1008 def uimm # I # _ptr : Operand<iPTR> { 1126 class mem_generic : Operand<iPTR> { 1171 def mem_ea : Operand<iPTR> { 1178 def PtrRC : Operand<iPTR> { 1296 ComplexPattern<iPTR, 2, "selectIntAddr", [frameindex]>; 1299 ComplexPattern<iPTR, 2, "selectAddrRegImm", [frameindex]>; 1302 ComplexPattern<iPTR, 2, "selectAddrDefault", [frameindex]>; 1304 def addrimm10 : ComplexPattern<iPTR, 2, "selectIntAddrSImm10", [frameindex]>; [all …]
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| D | MicroMipsInstrInfo.td | 13 def addrimm11 : ComplexPattern<iPTR, 2, "selectIntAddr11MM", [frameindex]>; 14 def addrimm12 : ComplexPattern<iPTR, 2, "selectIntAddr12MM", [frameindex]>; 15 def addrimm16 : ComplexPattern<iPTR, 2, "selectIntAddr16MM", [frameindex]>; 16 def addrimm4lsl2 : ComplexPattern<iPTR, 2, "selectIntAddrLSL2MM", [frameindex]>; 169 def calltarget_mm : Operand<iPTR> { 1269 def : MipsPat<(MipsTailCall (iPTR tglobaladdr:$dst)), 1271 def : MipsPat<(MipsTailCall (iPTR texternalsym:$dst)),
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| D | MipsInstrFPU.td | 220 [(set DRC:$fd, (OpNode (add iPTR:$base, iPTR:$index)))], Itin, 229 [(OpNode DRC:$fs, (add iPTR:$base, iPTR:$index))], Itin,
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| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 18 def SDT_BPFCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>, 19 SDTCisVT<1, iPTR>]>; 20 def SDT_BPFCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 21 def SDT_BPFCall : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
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| /openbsd/src/gnu/llvm/llvm/docs/GlobalISel/ |
| D | GMIR.rst | 182 ``p0`` ``iPTR`` ``i8*``, ``i32*``, ``%opaque*`` 183 ``p2`` ``iPTR`` ``i8 addrspace(2)*``
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGISel.cpp | 2597 return VT == MVT::iPTR && N.getValueType() == TLI->getPointerTy(DL); in CheckType() 2633 return VT == MVT::iPTR && cast<VTSDNode>(N)->getVT() == TLI->getPointerTy(DL); in CheckValueType() 3228 if (CaseVT == MVT::iPTR) in SelectCodeCommon() 3510 if (VT == MVT::iPTR) in SelectCodeCommon() 3687 NodeToMatch->getValueType(i) == MVT::iPTR || in SelectCodeCommon() 3688 Res.getValueType() == MVT::iPTR || in SelectCodeCommon()
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