Searched refs:min_dcfclk (Results 1 – 6 of 6) sorted by relevance
137 .min_dcfclk = 500.0, /* TODO: set this to actual min DCFCLK */425 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn30_fpu_calculate_wm_and_dlg()426 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn30_fpu_calculate_wm_and_dlg()748 base->bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table()770 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table()789 base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table()
4652 if (v->DCFCLKState[i][j] < mode_lib->soc.min_dcfclk) { in dml30_ModeSupportAndSystemConfigurationFull()4653 v->DCFCLKState[i][j] = mode_lib->soc.min_dcfclk; in dml30_ModeSupportAndSystemConfigurationFull()
151 uint16_t min_dcfclk; member
243 double min_dcfclk; member
1855 int min_dcfclk = 0; in dcn20_update_bounding_box() local1866 min_dcfclk = dc->bb_overrides.min_dcfclk_mhz; in dcn20_update_bounding_box()1869 min_dcfclk = 310; in dcn20_update_bounding_box()1873 min_dcfclk = 506; in dcn20_update_bounding_box()1885 bb->clock_limits[i].fabricclk_mhz = (min_fclk_required_by_uclk < min_dcfclk) ? in dcn20_update_bounding_box()1886 min_dcfclk : min_fclk_required_by_uclk; in dcn20_update_bounding_box()
341 …M_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.min_dcfclk; in dcn3_notify_wm_ranges()