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Searched refs:phy_name (Results 1 – 5 of 5) sorted by relevance

/openbsd/src/sys/dev/pci/drm/i915/display/
Dintel_combo_phy.c101 phy_name(phy), in check_phy_reg()
323 phy_name(phy), procmon->name); in icl_combo_phys_init()
389 phy_name(phy)); in icl_combo_phys_uninit()
393 phy_name(phy)); in icl_combo_phys_uninit()
Dintel_cx0_phy.c140 drm_err_once(&i915->drm, "Failed to bring PHY %c to idle.\n", phy_name(phy)); in intel_cx0_bus_reset()
161 phy_name(phy), *val); in intel_cx0_wait_for_ack()
167 phy_name(phy)); in intel_cx0_wait_for_ack()
174 drm_dbg_kms(&i915->drm, "PHY %c Error occurred during %s command. Status: 0x%x\n", phy_name(phy), in intel_cx0_wait_for_ack()
181 drm_dbg_kms(&i915->drm, "PHY %c Not a %s response. MSGBUS Status: 0x%x.\n", phy_name(phy), in intel_cx0_wait_for_ack()
203 … Timeout waiting for previous transaction to complete. Reset the bus and retry.\n", phy_name(phy)); in __intel_cx0_read_once()
247 phy_name(phy), addr, i); in __intel_cx0_read()
273 …PHY %c Timeout waiting for previous transaction to complete. Resetting the bus.\n", phy_name(phy)); in __intel_cx0_write_once()
289 "PHY %c Timeout waiting for write to complete. Resetting the bus.\n", phy_name(phy)); in __intel_cx0_write_once()
301 "PHY %c Error occurred during write command.\n", phy_name(phy)); in __intel_cx0_write_once()
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Dintel_ddi.c4905 port_name(port), phy_name(phy)); in intel_ddi_init()
4936 phy_name(phy)); in intel_ddi_init()
4953 phy_name(phy)); in intel_ddi_init()
4963 tc_port != TC_PORT_NONE ? tc_port_name(tc_port) : phy_name(phy)); in intel_ddi_init()
4973 tc_port != TC_PORT_NONE ? tc_port_name(tc_port) : phy_name(phy)); in intel_ddi_init()
4977 "DDI %c/PHY %c", port_name(port), phy_name(phy)); in intel_ddi_init()
Dintel_display.h210 #define phy_name(a) ((a) + 'A') macro
Dintel_snps_phy.c1870 drm_dbg_kms(&dev_priv->drm, "Port %c PLL not locked\n", phy_name(phy)); in intel_mpllb_enable()
1910 drm_err(&i915->drm, "Port %c PLL not locked\n", phy_name(phy)); in intel_mpllb_disable()