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Searched refs:regCP_HQD_HQ_CONTROL0 (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_4_3_offset.h3350 #define regCP_HQD_HQ_CONTROL0 … macro
Dgc_9_4_2_offset.h761 #define regCP_HQD_HQ_CONTROL0 … macro
Dgc_11_5_0_offset.h3641 #define regCP_HQD_HQ_CONTROL0 … macro
Dgc_12_0_0_offset.h3908 #define regCP_HQD_HQ_CONTROL0 … macro
Dgc_11_0_3_offset.h4892 #define regCP_HQD_HQ_CONTROL0 … macro
Dgc_11_0_0_offset.h4668 #define regCP_HQD_HQ_CONTROL0 … macro