Searched refs:regGDS_VMID0_SIZE (Results 1 – 7 of 7) sorted by relevance
| /openbsd/src/sys/dev/pci/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 1260 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_SIZE, 2 * i, 0); in gfx_v9_4_3_xcc_init_compute_vmid()
1278 WREG32_SOC15_OFFSET(GC, GET_INST(GC, xcc_id), regGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v9_4_3_xcc_init_gds_vmid()
2504 SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regGDS_VMID0_SIZE) + 2 * vmid, in gfx_v9_4_3_ring_emit_gds_switch()
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| D | gfx_v11_0.c | 1900 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * i, 0); in gfx_v11_0_init_compute_vmid()
1918 WREG32_SOC15_OFFSET(GC, 0, regGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v11_0_init_gds_vmid()
4984 SOC15_REG_OFFSET(GC, 0, regGDS_VMID0_SIZE) + 2 * vmid, in gfx_v11_0_ring_emit_gds_switch()
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| /openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_3_offset.h | 3460 #define regGDS_VMID0_SIZE … macro
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| D | gc_9_4_2_offset.h | 1280 #define regGDS_VMID0_SIZE … macro
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| D | gc_11_5_0_offset.h | 3739 #define regGDS_VMID0_SIZE … macro
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| D | gc_11_0_3_offset.h | 4990 #define regGDS_VMID0_SIZE … macro
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| D | gc_11_0_0_offset.h | 4766 #define regGDS_VMID0_SIZE … macro
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