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Searched refs:regRLC_LX6_DRAM_ADDR (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h9259 #define regRLC_LX6_DRAM_ADDR … macro
Dgc_12_0_0_offset.h6110 #define regRLC_LX6_DRAM_ADDR … macro
Dgc_11_0_3_offset.h10132 #define regRLC_LX6_DRAM_ADDR … macro
Dgc_11_0_0_offset.h10830 #define regRLC_LX6_DRAM_ADDR … macro
/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dgfx_v12_0.c1886 WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_ADDR, 0); in gfx_v12_0_load_rlc_iram_dram_microcode()
Dgfx_v11_0.c2173 WREG32_SOC15(GC, 0, regRLC_LX6_DRAM_ADDR, 0); in gfx_v11_0_load_rlc_iram_dram_microcode()