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Searched refs:res_ctx (Results 1 – 25 of 32) sorted by relevance

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/openbsd/src/sys/dev/pci/drm/amd/display/dc/core/
Ddc_link_enc_cfg.c71 if (dc->current_state->res_ctx.link_enc_cfg_ctx.mode == LINK_ENC_CFG_TRANSIENT) in get_assignment()
72 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.transient_assignments[i]; in get_assignment()
74 assignment = dc->current_state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in get_assignment()
88 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in get_stream_using_link_enc()
114 struct link_enc_assignment assignment = state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i]; in remove_link_enc_assignment()
117 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid = false; in remove_link_enc_assignment()
122 state->res_ctx.link_enc_cfg_ctx.link_enc_avail[eng_idx] = eng_id; in remove_link_enc_assignment()
125 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].eng_id = ENGINE_ID_UNKNOWN; in remove_link_enc_assignment()
126 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].stream = NULL; in remove_link_enc_assignment()
150 state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i] = (struct link_enc_assignment){ in add_link_enc_assignment()
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Ddc_resource.c504 struct resource_context *res_ctx, in resource_unreference_clock_source() argument
511 res_ctx->clock_source_ref_count[i]--; in resource_unreference_clock_source()
514 res_ctx->dp_clock_source_ref_count--; in resource_unreference_clock_source()
518 struct resource_context *res_ctx, in resource_reference_clock_source() argument
525 res_ctx->clock_source_ref_count[i]++; in resource_reference_clock_source()
528 res_ctx->dp_clock_source_ref_count++; in resource_reference_clock_source()
532 struct resource_context *res_ctx, in resource_get_clock_source_reference() argument
539 return res_ctx->clock_source_ref_count[i]; in resource_get_clock_source_reference()
542 return res_ctx->dp_clock_source_ref_count; in resource_get_clock_source_reference()
679 struct resource_context *res_ctx, in resource_find_used_clk_src_for_sharing() argument
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Ddc_stream.c229 struct resource_context *res_ctx; in program_cursor_attributes() local
235 res_ctx = &dc->current_state->res_ctx; in program_cursor_attributes()
238 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_attributes()
339 struct resource_context *res_ctx; in program_cursor_position() local
345 res_ctx = &dc->current_state->res_ctx; in program_cursor_position()
348 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in program_cursor_position()
428 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_program_cursor_position()
630 struct resource_context *res_ctx = in dc_stream_get_vblank_counter() local
631 &dc->current_state->res_ctx; in dc_stream_get_vblank_counter()
636 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg; in dc_stream_get_vblank_counter()
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Damdgpu_dc.c404 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in set_long_vtotal()
462 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_adjust_vmin_vmax()
499 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_last_used_drr_vtotal()
532 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crtc_position()
592 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_forward_crc_window()
643 &dc->current_state->res_ctx, stream); in dc_stream_configure_crc()
713 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
739 if (dc->current_state->res_ctx.pipe_ctx[i].stream in dc_stream_set_dyn_expansion()
741 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dyn_expansion()
761 if (link->dc->current_state->res_ctx.pipe_ctx[i].stream == in dc_stream_set_dither_option()
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Ddc_state.c151 struct pipe_ctx *cur_pipe = &dst_state->res_ctx.pipe_ctx[i]; in dc_state_copy_internal()
154 cur_pipe->top_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx]; in dc_state_copy_internal()
157 cur_pipe->bottom_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx]; in dc_state_copy_internal()
160 cur_pipe->prev_odm_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->prev_odm_pipe->pipe_idx]; in dc_state_copy_internal()
163 cur_pipe->next_odm_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->next_odm_pipe->pipe_idx]; in dc_state_copy_internal()
337 memset(&state->res_ctx, 0, sizeof(state->res_ctx)); in dc_state_destruct()
415 &state->res_ctx, stream); in dc_state_remove_stream()
482 &state->res_ctx, stream); in dc_state_add_plane()
925 struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i]; in dc_state_remove_phantom_streams_and_planes()
Ddc_surface.c74 struct pipe_ctx *pipe_ctx = &dc_state->res_ctx.pipe_ctx[i]; in dc_plane_get_pipe_mask()
141 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
156 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
Ddc_debug.c311 struct resource_context *res_ctx) in context_timing_trace() argument
321 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace()
333 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace()
Ddc_hw_sequencer.c531 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in set_p_state_switch_method()
1003 opp_head = &context->res_ctx.pipe_ctx[i]; in hwss_wait_for_all_blank_complete()
1020 otg_master = &context->res_ctx.pipe_ctx[i]; in hwss_wait_for_odm_update_pending_complete()
1038 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in hwss_wait_for_no_pipes_pending()
1072 pipe_ctx = &dc_context->res_ctx.pipe_ctx[pipe_idx]; in hwss_wait_for_outstanding_hw_updates()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/inc/
Dresource.h106 struct resource_context *res_ctx,
118 struct resource_context *res_ctx,
123 struct resource_context *res_ctx,
128 struct resource_context *res_ctx,
141 struct resource_context *res_ctx,
145 struct resource_context *res_ctx,
369 struct resource_context *res_ctx,
379 struct resource_context *res_ctx,
389 struct resource_context *res_ctx,
398 struct resource_context *res_ctx,
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Dcore_types.h174 struct resource_context *res_ctx,
180 struct resource_context *res_ctx,
193 struct resource_context *res_ctx,
200 struct resource_context *res_ctx,
599 struct resource_context res_ctx; member
/openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn20/
Ddcn20_fpu.c991 struct resource_context *res_ctx, in dcn20_populate_dml_writeback_from_context() argument
999 struct dc_writeback_info *wb_info = &res_ctx->pipe_ctx[i].stream->writeback_info[0]; in dcn20_populate_dml_writeback_from_context()
1001 if (!res_ctx->pipe_ctx[i].stream) in dcn20_populate_dml_writeback_from_context()
1043 …wb_arb_params->time_per_pixel = 16.0 * 1000 / (context->res_ctx.pipe_ctx[i].stream->phy_pix_clk / … in dcn20_fpu_set_wb_arb_params()
1050 if (!context->res_ctx.pipe_ctx[i].stream) in is_dtbclk_required()
1052 if (dc->link_srv->dp_is_128b_132b_signal(&context->res_ctx.pipe_ctx[i])) in is_dtbclk_required()
1065 if (context->res_ctx.pipe_ctx[i].plane_state) in decide_zstate_support()
1181 if (!context->res_ctx.pipe_ctx[i].stream) in dcn20_calculate_dlg_params()
1183 if (context->res_ctx.pipe_ctx[i].plane_state) in dcn20_calculate_dlg_params()
1190 if (dc_state_get_pipe_subvp_type(context, &context->res_ctx.pipe_ctx[i]) == SUBVP_PHANTOM) { in dcn20_calculate_dlg_params()
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Ddcn20_fpu.h32 struct resource_context *res_ctx,
86 struct resource_context *res_ctx,
/openbsd/src/sys/dev/pci/drm/amd/display/dc/dce/
Ddmub_replay.c124 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; in dmub_replay_copy_settings() local
128 if (res_ctx && in dmub_replay_copy_settings()
129 res_ctx->pipe_ctx[i].stream && in dmub_replay_copy_settings()
130 res_ctx->pipe_ctx[i].stream->link && in dmub_replay_copy_settings()
131 res_ctx->pipe_ctx[i].stream->link == link && in dmub_replay_copy_settings()
132 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { in dmub_replay_copy_settings()
133 pipe_ctx = &res_ctx->pipe_ctx[i]; in dmub_replay_copy_settings()
Ddmub_psr.c302 struct resource_context *res_ctx = &link->ctx->dc->current_state->res_ctx; in dmub_psr_copy_settings() local
306 if (res_ctx->pipe_ctx[i].stream && in dmub_psr_copy_settings()
307 res_ctx->pipe_ctx[i].stream->link == link && in dmub_psr_copy_settings()
308 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { in dmub_psr_copy_settings()
309 pipe_ctx = &res_ctx->pipe_ctx[i]; in dmub_psr_copy_settings()
Ddce_clk_mgr.c190 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in get_max_pixel_clock_for_all_paths()
511 if (stream == context->res_ctx.pipe_ctx[k].stream) { in dce110_fill_display_configs()
512 pipe_ctx = &context->res_ctx.pipe_ctx[k]; in dce110_fill_display_configs()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/dce60/
Ddce60_hw_sequencer.c56 struct resource_context *res_ctx = &context->res_ctx; in dce60_should_enable_fbc() local
71 if (res_ctx->pipe_ctx[i].stream) { in dce60_should_enable_fbc()
73 pipe_ctx = &res_ctx->pipe_ctx[i]; in dce60_should_enable_fbc()
124 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; in dce60_enable_fbc()
396 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dce60_apply_ctx_for_surface()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/
Ddc_trace.h28 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[index]; \
Ddc_dmub_srv.c398 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_dmub_srv_get_pipes_for_stream()
415 struct pipe_ctx *split_pipe = &context->res_ctx.pipe_ctx[j]; in dc_dmub_srv_populate_fams_pipe_info()
447 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dc_dmub_srv_p_state_delegate()
466 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dc_dmub_srv_p_state_delegate()
473 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dc_dmub_srv_p_state_delegate()
652 pipe = &context->res_ctx.pipe_ctx[i]; in populate_subvp_cmd_vblank_pipe_info()
828 struct pipe_ctx *phantom_pipe = &context->res_ctx.pipe_ctx[j]; in populate_subvp_cmd_pipe_info()
875 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dc_dmub_setup_subvp_dmub_command()
888 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dc_dmub_setup_subvp_dmub_command()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/
Ddcn30_fpu.h36 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
Ddcn30_fpu.c258 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn30_fpu_populate_dml_writeback_from_context() argument
268 struct dc_stream_state *stream = res_ctx->pipe_ctx[i].stream; in dcn30_fpu_populate_dml_writeback_from_context()
281 (wb_info->writeback_source_plane == res_ctx->pipe_ctx[i].plane_state)) { in dcn30_fpu_populate_dml_writeback_from_context()
554 if (!context->res_ctx.pipe_ctx[i].stream) in dcn30_fpu_calculate_wm_and_dlg()
/openbsd/src/sys/dev/pci/drm/amd/display/include/
Dlogger_interface.h57 struct resource_context *res_ctx);
/openbsd/src/sys/dev/pci/drm/amd/display/dc/clk_mgr/dce110/
Ddce110_clk_mgr.c135 if (stream == context->res_ctx.pipe_ctx[k].stream) { in dce110_fill_display_configs()
136 pipe_ctx = &context->res_ctx.pipe_ctx[k]; in dce110_fill_display_configs()
/openbsd/src/sys/dev/pci/drm/amd/display/amdgpu_dm/
Damdgpu_dm_debugfs.c1271 pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i]; in odm_combine_segments_show()
1549 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_clock_en_read()
1652 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_clock_en_write()
1739 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_slice_width_read()
1840 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_slice_width_write()
1927 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_slice_height_read()
2028 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_slice_height_write()
2111 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_bits_per_pixel_read()
2209 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_bits_per_pixel_write()
2290 pipe_ctx = &aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i]; in dp_dsc_pic_width_read()
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/openbsd/src/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c117 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
153 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn20_update_clocks_update_dentist()
184 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn20_update_clocks_update_dentist()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr.c164 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in ramp_up_dispclk_with_dpp()

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