Searched refs:sc_prim_fifo_size_backend (Results 1 – 13 of 13) sorted by relevance
1582 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v6_0_constants_init()1599 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v6_0_constants_init()1616 adev->gfx.config.sc_prim_fifo_size_backend = 0x40; in gfx_v6_0_constants_init()1633 adev->gfx.config.sc_prim_fifo_size_backend = 0x40; in gfx_v6_0_constants_init()1650 adev->gfx.config.sc_prim_fifo_size_backend = 0x40; in gfx_v6_0_constants_init()1731 …(adev->gfx.config.sc_prim_fifo_size_backend << PA_SC_FIFO_SIZE__SC_BACKEND_PRIM_FIFO_SIZE__SHIFT) | in gfx_v6_0_constants_init()
198 unsigned sc_prim_fifo_size_backend; member
1670 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1687 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1702 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1717 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1734 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1751 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1768 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()1785 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v8_0_gpu_early_init()3793 (adev->gfx.config.sc_prim_fifo_size_backend << in gfx_v8_0_constants_init()
1977 …(adev->gfx.config.sc_prim_fifo_size_backend << PA_SC_FIFO_SIZE__SC_BACKEND_PRIM_FIFO_SIZE__SHIFT) | in gfx_v7_0_constants_init()4190 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v7_0_gpu_early_init()4207 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v7_0_gpu_early_init()4224 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v7_0_gpu_early_init()4243 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v7_0_gpu_early_init()
2019 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2027 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2037 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2052 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2064 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2074 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()2085 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_0_gpu_early_init()
905 config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_backend; in amdgpu_debugfs_gca_config_read()
1063 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v11_0_gpu_early_init()1071 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v11_0_gpu_early_init()1082 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v11_0_gpu_early_init()
4524 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v10_0_gpu_early_init()4539 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v10_0_gpu_early_init()4550 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v10_0_gpu_early_init()
940 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v9_4_3_gpu_early_init()
881 adev->gfx.config.sc_prim_fifo_size_backend = 0x100; in gfx_v12_0_gpu_early_init()
3091 rdev->config.si.sc_prim_fifo_size_backend = 0x100; in si_gpu_init()3108 rdev->config.si.sc_prim_fifo_size_backend = 0x100; in si_gpu_init()3126 rdev->config.si.sc_prim_fifo_size_backend = 0x40; in si_gpu_init()3143 rdev->config.si.sc_prim_fifo_size_backend = 0x40; in si_gpu_init()3160 rdev->config.si.sc_prim_fifo_size_backend = 0x40; in si_gpu_init()3295 SC_BACKEND_PRIM_FIFO_SIZE(rdev->config.si.sc_prim_fifo_size_backend) | in si_gpu_init()
2147 unsigned sc_prim_fifo_size_backend; member2178 unsigned sc_prim_fifo_size_backend; member
3189 rdev->config.cik.sc_prim_fifo_size_backend = 0x100; in cik_gpu_init()3206 rdev->config.cik.sc_prim_fifo_size_backend = 0x100; in cik_gpu_init()3223 rdev->config.cik.sc_prim_fifo_size_backend = 0x100; in cik_gpu_init()3242 rdev->config.cik.sc_prim_fifo_size_backend = 0x100; in cik_gpu_init()3377 SC_BACKEND_PRIM_FIFO_SIZE(rdev->config.cik.sc_prim_fifo_size_backend) | in cik_gpu_init()