Home
last modified time | relevance | path

Searched refs:ucode_id (Results 1 – 25 of 32) sorted by relevance

12

/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Damdgpu_virt.c873 bool amdgpu_virt_fw_load_skip_check(struct amdgpu_device *adev, uint32_t ucode_id) in amdgpu_virt_fw_load_skip_check() argument
878 if (ucode_id == AMDGPU_UCODE_ID_VCN1 || in amdgpu_virt_fw_load_skip_check()
879 ucode_id == AMDGPU_UCODE_ID_VCN) in amdgpu_virt_fw_load_skip_check()
886 if (ucode_id == AMDGPU_UCODE_ID_RLC_G in amdgpu_virt_fw_load_skip_check()
887 || ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL in amdgpu_virt_fw_load_skip_check()
888 || ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM in amdgpu_virt_fw_load_skip_check()
889 || ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM in amdgpu_virt_fw_load_skip_check()
890 || ucode_id == AMDGPU_UCODE_ID_SMC) in amdgpu_virt_fw_load_skip_check()
896 if (ucode_id == AMDGPU_UCODE_ID_CAP in amdgpu_virt_fw_load_skip_check()
897 || ucode_id == AMDGPU_UCODE_ID_CP_RS64_PFP in amdgpu_virt_fw_load_skip_check()
[all …]
Damdgpu_rlc.c333 info->ucode_id = AMDGPU_UCODE_ID_RLC_G; in amdgpu_gfx_rlc_init_microcode_v2_0()
369 info->ucode_id = AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL; in amdgpu_gfx_rlc_init_microcode_v2_1()
377 info->ucode_id = AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM; in amdgpu_gfx_rlc_init_microcode_v2_1()
385 info->ucode_id = AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM; in amdgpu_gfx_rlc_init_microcode_v2_1()
407 info->ucode_id = AMDGPU_UCODE_ID_RLC_IRAM; in amdgpu_gfx_rlc_init_microcode_v2_2()
415 info->ucode_id = AMDGPU_UCODE_ID_RLC_DRAM; in amdgpu_gfx_rlc_init_microcode_v2_2()
442 info->ucode_id = AMDGPU_UCODE_ID_RLC_P; in amdgpu_gfx_rlc_init_microcode_v2_3()
450 info->ucode_id = AMDGPU_UCODE_ID_RLC_V; in amdgpu_gfx_rlc_init_microcode_v2_3()
478 info->ucode_id = AMDGPU_UCODE_ID_GLOBAL_TAP_DELAYS; in amdgpu_gfx_rlc_init_microcode_v2_4()
486 info->ucode_id = AMDGPU_UCODE_ID_SE0_TAP_DELAYS; in amdgpu_gfx_rlc_init_microcode_v2_4()
[all …]
Damdgpu_sdma.c271 info->ucode_id = AMDGPU_UCODE_ID_SDMA0 + i; in amdgpu_sdma_init_microcode()
282 info->ucode_id = AMDGPU_UCODE_ID_SDMA_UCODE_TH0; in amdgpu_sdma_init_microcode()
287 info->ucode_id = AMDGPU_UCODE_ID_SDMA_UCODE_TH1; in amdgpu_sdma_init_microcode()
296 info->ucode_id = AMDGPU_UCODE_ID_SDMA_RS64; in amdgpu_sdma_init_microcode()
Damdgpu_jpeg.c335 enum AMDGPU_UCODE_ID ucode_id) in amdgpu_jpeg_psp_update_sram() argument
338 .ucode_id = AMDGPU_UCODE_ID_JPEG_RAM, in amdgpu_jpeg_psp_update_sram()
Damdgpu_psp.c719 amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id); in psp_cmd_submit_buf()
2411 switch (ucode->ucode_id) { in psp_get_fw_type()
2634 switch (ucode->ucode_id) { in psp_print_fw_hdr()
2644 adev->sdma.instance[ucode->ucode_id - AMDGPU_UCODE_ID_SDMA0].fw->data; in psp_print_fw_hdr()
2780 if (ucode->ucode_id == AMDGPU_UCODE_ID_P2S_TABLE) in fw_load_skip_check()
2783 if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && in fw_load_skip_check()
2790 amdgpu_virt_fw_load_skip_check(psp->adev, ucode->ucode_id)) in fw_load_skip_check()
2794 (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT || in fw_load_skip_check()
2795 ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT)) in fw_load_skip_check()
2837 if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC && in psp_load_non_psp_fw()
[all …]
Damdgpu_isp.c115 adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].ucode_id = in isp_load_fw_by_psp()
Damdgpu_jpeg.h151 enum AMDGPU_UCODE_ID ucode_id);
Damdgpu_ucode.h566 enum AMDGPU_UCODE_ID ucode_id; member
622 const char *amdgpu_ucode_name(enum AMDGPU_UCODE_ID ucode_id);
Damdgpu_vcn.c1067 adev->firmware.ucode[idx].ucode_id = idx; in amdgpu_vcn_setup_ucode()
1268 enum AMDGPU_UCODE_ID ucode_id) in amdgpu_vcn_psp_update_sram() argument
1271 .ucode_id = (ucode_id ? ucode_id : in amdgpu_vcn_psp_update_sram()
Dimu_v11_0.c62 info->ucode_id = AMDGPU_UCODE_ID_IMU_I; in imu_v11_0_init_microcode()
67 info->ucode_id = AMDGPU_UCODE_ID_IMU_D; in imu_v11_0_init_microcode()
Dimu_v12_0.c59 info->ucode_id = AMDGPU_UCODE_ID_IMU_I; in imu_v12_0_init_microcode()
64 info->ucode_id = AMDGPU_UCODE_ID_IMU_D; in imu_v12_0_init_microcode()
Damdgpu_gfx.c1192 uint32_t ucode_id) in amdgpu_gfx_cp_init_microcode() argument
1200 switch (ucode_id) { in amdgpu_gfx_cp_init_microcode()
1319 dev_err(adev->dev, "Invalid ucode id %u\n", ucode_id); in amdgpu_gfx_cp_init_microcode()
1324 info = &adev->firmware.ucode[ucode_id]; in amdgpu_gfx_cp_init_microcode()
1325 info->ucode_id = ucode_id; in amdgpu_gfx_cp_init_microcode()
Damdgpu_vpe.c223 .ucode_id = AMDGPU_UCODE_ID_VPE, in amdgpu_vpe_psp_update_sram()
251 info->ucode_id = AMDGPU_UCODE_ID_VPE_CTX; in amdgpu_vpe_init_microcode()
257 info->ucode_id = AMDGPU_UCODE_ID_VPE_CTL; in amdgpu_vpe_init_microcode()
Damdgpu_ucode.c574 const char *amdgpu_ucode_name(enum AMDGPU_UCODE_ID ucode_id) in amdgpu_ucode_name() argument
576 switch (ucode_id) { in amdgpu_ucode_name()
844 if (ucode->ucode_id == AMDGPU_UCODE_ID_STORAGE) in amdgpu_ucode_init_single_fw()
860 switch (ucode->ucode_id) { in amdgpu_ucode_init_single_fw()
Damdgpu_umsch_mm.c616 info->ucode_id = AMDGPU_UCODE_ID_UMSCH_MM_UCODE; in amdgpu_umsch_mm_init_microcode()
622 info->ucode_id = AMDGPU_UCODE_ID_UMSCH_MM_DATA; in amdgpu_umsch_mm_init_microcode()
699 .ucode_id = AMDGPU_UCODE_ID_UMSCH_MM_CMD_BUFFER, in amdgpu_umsch_mm_psp_execute_cmd_buf()
Dsmu_v13_0_10.c157 switch (ucode->ucode_id) { in smu_v13_0_10_mode2_restore_ip()
Damdgpu_virt.h378 uint32_t ucode_id);
Daldebaran.c220 switch (ucode->ucode_id) { in aldebaran_mode2_restore_ip()
Damdgpu_vcn.h520 enum AMDGPU_UCODE_ID ucode_id);
Damdgpu_cgs.c426 ucode->ucode_id = AMDGPU_UCODE_ID_SMC; in amdgpu_cgs_get_firmware_info()
Damdgpu_gfx.h563 void amdgpu_gfx_cp_init_microcode(struct amdgpu_device *adev, uint32_t ucode_id);
Damdgpu_mes.c1647 info->ucode_id = ucode; in amdgpu_mes_init_microcode()
1654 info->ucode_id = ucode_data; in amdgpu_mes_init_microcode()
Duvd_v7_0.c428 adev->firmware.ucode[AMDGPU_UCODE_ID_UVD].ucode_id = AMDGPU_UCODE_ID_UVD; in uvd_v7_0_sw_init()
434 adev->firmware.ucode[AMDGPU_UCODE_ID_UVD1].ucode_id = AMDGPU_UCODE_ID_UVD1; in uvd_v7_0_sw_init()
Dgfx_v8_0.c1138 info->ucode_id = AMDGPU_UCODE_ID_CP_PFP; in gfx_v8_0_init_microcode()
1145 info->ucode_id = AMDGPU_UCODE_ID_CP_ME; in gfx_v8_0_init_microcode()
1152 info->ucode_id = AMDGPU_UCODE_ID_CP_CE; in gfx_v8_0_init_microcode()
1159 info->ucode_id = AMDGPU_UCODE_ID_RLC_G; in gfx_v8_0_init_microcode()
1166 info->ucode_id = AMDGPU_UCODE_ID_CP_MEC1; in gfx_v8_0_init_microcode()
1179 info->ucode_id = AMDGPU_UCODE_ID_STORAGE; in gfx_v8_0_init_microcode()
1187 info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2; in gfx_v8_0_init_microcode()
/openbsd/src/sys/dev/pci/drm/amd/pm/powerplay/smumgr/
Dsmu8_smumgr.c552 enum cgs_ucode_id ucode_id; in smu8_smu_populate_firmware_entries() local
562 ucode_id = smu8_convert_fw_type_to_cgs(firmware_type); in smu8_smu_populate_firmware_entries()
565 ucode_id, &info); in smu8_smu_populate_firmware_entries()

12