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Searched refs:vpe (Results 1 – 10 of 10) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Damdgpu_vpe.h35 uint32_t (*get_reg_offset)(struct amdgpu_vpe *vpe, uint32_t inst, uint32_t offset);
36 int (*set_regs)(struct amdgpu_vpe *vpe);
37 int (*irq_init)(struct amdgpu_vpe *vpe);
38 int (*init_microcode)(struct amdgpu_vpe *vpe);
39 int (*load_microcode)(struct amdgpu_vpe *vpe);
40 int (*ring_init)(struct amdgpu_vpe *vpe);
41 int (*ring_start)(struct amdgpu_vpe *vpe);
42 int (*ring_stop)(struct amdgpu_vpe *vpe);
43 int (*ring_fini)(struct amdgpu_vpe *vpe);
85 int amdgpu_vpe_init_microcode(struct amdgpu_vpe *vpe);
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Dvpe_v6_1.c64 static uint32_t vpe_v6_1_get_reg_offset(struct amdgpu_vpe *vpe, uint32_t inst, uint32_t offset) in vpe_v6_1_get_reg_offset() argument
68 base = vpe->ring.adev->reg_offset[VPE_HWIP][inst][0]; in vpe_v6_1_get_reg_offset()
73 static void vpe_v6_1_halt(struct amdgpu_vpe *vpe, bool halt) in vpe_v6_1_halt() argument
75 struct amdgpu_device *adev = vpe->ring.adev; in vpe_v6_1_halt()
78 for (i = 0; i < vpe->num_instances; i++) { in vpe_v6_1_halt()
79 f32_cntl = RREG32(vpe_get_reg_offset(vpe, i, regVPEC_F32_CNTL)); in vpe_v6_1_halt()
82 WREG32(vpe_get_reg_offset(vpe, i, regVPEC_F32_CNTL), f32_cntl); in vpe_v6_1_halt()
86 static int vpe_v6_1_irq_init(struct amdgpu_vpe *vpe) in vpe_v6_1_irq_init() argument
88 struct amdgpu_device *adev = container_of(vpe, struct amdgpu_device, vpe); in vpe_v6_1_irq_init()
93 &adev->vpe.trap_irq); in vpe_v6_1_irq_init()
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Damdgpu_vpe.c121 int amdgpu_vpe_configure_dpm(struct amdgpu_vpe *vpe) in amdgpu_vpe_configure_dpm() argument
123 struct amdgpu_device *adev = vpe->ring.adev; in amdgpu_vpe_configure_dpm()
135 dpm_ctl = RREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable)); in amdgpu_vpe_configure_dpm()
137 WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable), dpm_ctl); in amdgpu_vpe_configure_dpm()
199 WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_pratio), pratio_ctl); /* PRatio */ in amdgpu_vpe_configure_dpm()
200 … WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_request_interval), 24000); /* 1ms, unit=1/24MHz */ in amdgpu_vpe_configure_dpm()
201 WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_decision_threshold), 1200000); /* 50ms */ in amdgpu_vpe_configure_dpm()
202 WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_busy_clamp_threshold), 1200000);/* 50ms */ in amdgpu_vpe_configure_dpm()
203 WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_idle_clamp_threshold), 1200000);/* 50ms */ in amdgpu_vpe_configure_dpm()
213 dpm_ctl = RREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable)); in amdgpu_vpe_configure_dpm()
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Dvpe_v6_1.h27 void vpe_v6_1_set_funcs(struct amdgpu_vpe *vpe);
Damdgpu_dev_coredump.c188 adev->vpe.feature_version, adev->vpe.fw_version); in amdgpu_devcoredump_fw_info()
Dumsch_mm_v4_0.c282 adev->vpe.collaborate_mode ? 0x3 : 0x0; in umsch_mm_v4_0_set_hw_resources()
358 add_queue.collaboration_mode = adev->vpe.collaborate_mode ? 1 : 0; in umsch_mm_v4_0_add_queue()
Damdgpu_umsch_mm.c195 if (adev->vpe.collaborate_mode) in setup_vpe_queue()
296 if (adev->vpe.collaborate_mode) in submit_vpe_queue()
Damdgpu_kms.c364 fw_info->ver = adev->vpe.fw_version; in amdgpu_firmware_info()
365 fw_info->feature = adev->vpe.feature_version; in amdgpu_firmware_info()
486 if (adev->vpe.ring.sched.ready) in amdgpu_hw_ip_info()
Damdgpu_discovery.c1391 if (adev->vpe.num_instances < AMDGPU_MAX_VPE_INSTANCES) in amdgpu_discovery_reg_base_init()
1392 adev->vpe.num_instances++; in amdgpu_discovery_reg_base_init()
1395 adev->vpe.num_instances + 1, in amdgpu_discovery_reg_base_init()
Damdgpu.h1049 struct amdgpu_vpe vpe; member