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Searched refs:simplify_gen_subreg (Results 1 – 25 of 82) sorted by relevance

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/netbsd/src/external/gpl3/gcc/dist/gcc/config/stormy16/
Dstormy16.cc196 op0_word = simplify_gen_subreg (word_mode, op0, mode, in xstormy16_emit_cbranch()
198 op1_word = simplify_gen_subreg (word_mode, op1, mode, in xstormy16_emit_cbranch()
202 op0_word = simplify_gen_subreg (word_mode, op0, mode, in xstormy16_emit_cbranch()
204 op1_word = simplify_gen_subreg (word_mode, op1, mode, in xstormy16_emit_cbranch()
586 in = simplify_gen_subreg (HImode, in, QImode, 0); in xstormy16_expand_iorqi3()
587 outsub = simplify_gen_subreg (HImode, out, QImode, 0); in xstormy16_expand_iorqi3()
590 val = simplify_gen_subreg (HImode, val, QImode, 0); in xstormy16_expand_iorqi3()
631 in = simplify_gen_subreg (HImode, in, QImode, 0); in xstormy16_expand_andqi3()
632 outsub = simplify_gen_subreg (HImode, out, QImode, 0); in xstormy16_expand_andqi3()
635 val = simplify_gen_subreg (HImode, val, QImode, 0); in xstormy16_expand_andqi3()
[all …]
Dstormy16.md570 operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, s);
571 operands[4] = simplify_gen_subreg (QImode, operands[1], HImode, s);
572 operands[5] = simplify_gen_subreg (QImode, operands[2], HImode, s);
599 operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, s);
600 operands[4] = simplify_gen_subreg (QImode, operands[1], HImode, s);
601 operands[5] = simplify_gen_subreg (QImode, operands[2], HImode, s);
/netbsd/src/external/gpl3/gcc/dist/gcc/config/avr/
Davr.cc269 rtx xval8 = simplify_gen_subreg (QImode, xval, mode, i); in avr_popcount_each_byte()
290 : simplify_gen_subreg (int_mode_for_mode (mode).require (), x, mode, 0); in avr_to_int_mode()
6114 rtx xval = simplify_gen_subreg (imode, *op1, mode, 0); in avr_canonicalize_comparison()
6125 *op1 = simplify_gen_subreg (mode, xval, imode, 0); in avr_canonicalize_comparison()
6246 rtx xlo8 = simplify_gen_subreg (QImode, xval, mode, 0); in avr_out_compare()
6247 rtx xhi8 = simplify_gen_subreg (QImode, xval, mode, 1); in avr_out_compare()
6262 rtx reg8 = simplify_gen_subreg (QImode, xreg, mode, i); in avr_out_compare()
6263 rtx xval8 = simplify_gen_subreg (QImode, xval, mode, i); in avr_out_compare()
6467 rtx xzmsb = simplify_gen_subreg (QImode, zreg, zmode, zmsb); in avr_out_cmp_ext()
6490 regs[1 - z] = simplify_gen_subreg (QImode, reg, mode, b); in avr_out_cmp_ext()
[all …]
Davr.md465 rtx part = simplify_gen_subreg (QImode, operands[0], <MODE>mode, i);
567 emit_move_insn (reg_z, simplify_gen_subreg (HImode, addr, PSImode, 0));
568 emit_move_insn (hi8, simplify_gen_subreg (QImode, addr, PSImode, 2));
596 rtx addr_hi8 = simplify_gen_subreg (QImode, addr, PSImode, 2);
601 emit_move_insn (reg_z, simplify_gen_subreg (HImode, addr, PSImode, 0));
1651 operands[3] = simplify_gen_subreg (QImode, operands[0], <MODE>mode, 0);
4701 rtx dst_lo = simplify_gen_subreg (HImode, operands[0], <MODE>mode, 0);
4702 rtx src_lo = simplify_gen_subreg (HImode, operands[1], <MODE>mode, 0);
4703 rtx dst_hi = simplify_gen_subreg (mode_hi, operands[0], <MODE>mode, 2);
4704 rtx src_hi = simplify_gen_subreg (mode_hi, operands[1], <MODE>mode, 2);
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/mips/
Dmips-ps-3d.md471 operands[6] = simplify_gen_subreg (CCV2mode, operands[0], CCV4mode, 0);
472 operands[7] = simplify_gen_subreg (CCV2mode, operands[0], CCV4mode, 8);
500 operands[6] = simplify_gen_subreg (CCV2mode, operands[0], CCV4mode, 0);
501 operands[7] = simplify_gen_subreg (CCV2mode, operands[0], CCV4mode, 8);
/netbsd/src/external/gpl3/gcc/dist/gcc/config/arc/
Dfpx.md362 ;; "operands[7] = simplify_gen_subreg(SImode,operands[5],DFmode,0);"
421 "operands[9] = simplify_gen_subreg(SImode,operands[7],DFmode,0);"
469 ;; "operands[6] = simplify_gen_subreg(SImode,operands[5],DFmode,0);"
519 "operands[8] = simplify_gen_subreg(SImode,operands[7],DFmode,0);"
Darc.md1445 operands[4] = simplify_gen_subreg (SImode, operands[0], DFmode, 0);
1446 operands[5] = simplify_gen_subreg (SImode, operands[0], DFmode, 4);"
2486 rtx l0 = simplify_gen_subreg (word_mode, operands[0], DImode, lo);
2487 rtx h0 = simplify_gen_subreg (word_mode, operands[0], DImode, hi);
2730 rtx l2 = simplify_gen_subreg (SImode, operands[2], DImode,
2732 rtx h2 = simplify_gen_subreg (SImode, operands[2], DImode,
2929 rtx l2 = simplify_gen_subreg (SImode, operands[2], DImode,
2931 rtx h2 = simplify_gen_subreg (SImode, operands[2], DImode,
4376 "operands[0] = simplify_gen_subreg (SImode, operands[0], HImode, 0);")
/netbsd/src/external/gpl3/gcc/dist/gcc/config/s390/
Dvector.md654 operands[2] = simplify_gen_subreg (DFmode, operands[0], TFmode, 0);
655 operands[3] = simplify_gen_subreg (DFmode, operands[1], FPRX2mode, 0);
656 operands[4] = simplify_gen_subreg (DFmode, operands[0], TFmode, 8);
657 operands[5] = simplify_gen_subreg (DFmode, operands[1], FPRX2mode, 8);
929 operands[2] = simplify_gen_subreg (DFmode, operands[0], FPRX2mode, 0);
930 operands[3] = simplify_gen_subreg (DFmode, operands[1], TFmode, 0);
931 operands[4] = simplify_gen_subreg (DFmode, operands[0], FPRX2mode, 8);
932 operands[5] = simplify_gen_subreg (DFmode, operands[1], TFmode, 8);
1156 operands[1] = simplify_gen_subreg (V16QImode, operands[1],
1173 operands[1] = simplify_gen_subreg (V16QImode, operands[1], V4SImode, 0);
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/rs6000/
Drs6000-string.cc173 rtx reg_v2di = simplify_gen_subreg (V2DImode, reg, in do_load_for_compare()
841 rtx chr1_di = simplify_gen_subreg (DImode, chr1, SImode, 0); in emit_final_compare_vec()
842 rtx chr2_di = simplify_gen_subreg (DImode, chr2, SImode, 0); in emit_final_compare_vec()
863 rtx diffix_df = simplify_gen_subreg (DFmode, diffix, DImode, 0); in emit_final_compare_vec()
884 rtx chr1_rm = simplify_gen_subreg (rmode, chr1, QImode, 0); in emit_final_compare_vec()
885 rtx chr2_rm = simplify_gen_subreg (rmode, chr2, QImode, 0); in emit_final_compare_vec()
Drs6000-builtin.cc2871 temp1 = simplify_gen_subreg (V16QImode, tiscratch, TImode, 0); in lxvrse_expand_builtin()
2876 temp1 = simplify_gen_subreg (V8HImode, tiscratch, TImode, 0); in lxvrse_expand_builtin()
2881 temp1 = simplify_gen_subreg (V4SImode, tiscratch, TImode, 0); in lxvrse_expand_builtin()
2885 discratch = simplify_gen_subreg (V2DImode, tiscratch, TImode, 0); in lxvrse_expand_builtin()
2890 rtx temp2 = simplify_gen_subreg (TImode, discratch, V2DImode, 0); in lxvrse_expand_builtin()
3283 rtx subreg = simplify_gen_subreg (CCmode, scratch1, SImode, 0); in htm_expand_builtin()
Drs6000.md2653 operands[3] = simplify_gen_subreg (SImode, operands[0], HImode, 0);
2654 operands[4] = simplify_gen_subreg (SImode, operands[1], HImode, 0);
2798 rtx op3_32 = simplify_gen_subreg (SImode, op3, DImode,
2800 rtx dest_32 = simplify_gen_subreg (SImode, dest, DImode,
2861 rtx src_si = simplify_gen_subreg (SImode, src, DImode,
2863 rtx op3_si = simplify_gen_subreg (SImode, op3, DImode,
2924 rtx dest_si = simplify_gen_subreg (SImode, dest, DImode, lo_off);
2925 rtx src_si = simplify_gen_subreg (SImode, src, DImode, lo_off);
2926 rtx op2_si = simplify_gen_subreg (SImode, op2, DImode, lo_off);
2927 rtx op3_si = simplify_gen_subreg (SImode, op3, DImode, lo_off);
[all …]
Drs6000.cc6960 op[i] = simplify_gen_subreg (tmode, tmp, inner_mode, 0); in rs6000_expand_vector_init()
7188 rtx sub_target = simplify_gen_subreg (V16QImode, target, mode, 0); in rs6000_expand_vector_set_var_p9()
7280 rtx sub_mask = simplify_gen_subreg (V16QImode, mask_v2di, V2DImode, 0); in rs6000_expand_vector_set_var_p7()
7314 rtx sub_val = simplify_gen_subreg (V16QImode, val_v2di, V2DImode, 0); in rs6000_expand_vector_set_var_p7()
7328 rtx target_v16qi = simplify_gen_subreg (V16QImode, target, mode, 0); in rs6000_expand_vector_set_var_p7()
10619 rs6000_emit_move (simplify_gen_subreg (DFmode, operands[0], mode, 0), in rs6000_emit_move()
10620 simplify_gen_subreg (DFmode, operands[1], mode, 0), in rs6000_emit_move()
10622 rs6000_emit_move (simplify_gen_subreg (DFmode, operands[0], mode, in rs6000_emit_move()
10624 simplify_gen_subreg (DFmode, operands[1], mode, in rs6000_emit_move()
15745 mask = simplify_gen_subreg (dest_mode, mask, mask_mode, 0); in rs6000_emit_vector_cond_expr()
[all …]
Dvsx.md1407 subreg = simplify_gen_subreg (V4SImode, operands[1], V8HImode, 0);
1409 subreg2 = simplify_gen_subreg (V8HImode, tmp, V4SImode, 0);
1457 subreg = simplify_gen_subreg (V4SImode, operands[1], V16QImode, 0);
1459 subreg2 = simplify_gen_subreg (V16QImode, tmp, V4SImode, 0);
1565 subreg = simplify_gen_subreg (V4SImode, tmp, V8HImode, 0);
1566 mem_subreg = simplify_gen_subreg (V4SImode, operands[0], V8HImode, 0);
1623 subreg = simplify_gen_subreg (V4SImode, tmp, V16QImode, 0);
1624 mem_subreg = simplify_gen_subreg (V4SImode, operands[0], V16QImode, 0);
6572 rtx tmp1 = simplify_gen_subreg (DImode, operands[1], TImode, 0);
6573 rtx tmp2 = simplify_gen_subreg (DImode, operands[1], TImode, 8);
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/
Dlower-subreg.cc688 return simplify_gen_subreg (outermode, part, partmode, final_offset); in simplify_subreg_concatn()
734 ret = simplify_gen_subreg (outermode, op, innermode, byte); in simplify_gen_subreg_concatn()
1117 mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0); in resolve_simple_move()
Dexpr.cc302 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0); in convert_move()
304 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0); in convert_move()
773 return simplify_gen_subreg (mode, x, oldmode, 0); in convert_modes()
2510 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos); in emit_group_load_1()
2735 temp = simplify_gen_subreg (outer, tmps[start], in emit_group_store()
2756 temp = simplify_gen_subreg (outer, tmps[finish - 1], in emit_group_store()
3477 rtx part = simplify_gen_subreg (imode, cplx, cmode, in write_complex_part()
3544 rtx ret = simplify_gen_subreg (imode, cplx, cmode, in read_complex_part()
3596 ret = simplify_gen_subreg (new_mode, x, old_mode, 0); in emit_move_change_mode()
5562 = simplify_gen_subreg (to_mode, XEXP (result, 0), in expand_assignment()
[all …]
Dexpmed.cc700 tmp = simplify_gen_subreg (op_mode, in store_bit_field_using_insv()
799 sub = simplify_gen_subreg (GET_MODE (op0), value, fieldmode, 0); in store_bit_field_1()
812 sub = simplify_gen_subreg (fieldmode, op0, GET_MODE (op0), in store_bit_field_1()
1043 op0 = simplify_gen_subreg (word_mode, op0, op0_mode.require (), in store_integral_bit_field()
1623 return simplify_gen_subreg (mode, op0, op0_mode, bytenum); in extract_bit_field_as_subreg()
1986 op0 = simplify_gen_subreg (word_mode, op0, op0_mode.require (), in extract_integral_bit_field()
5674 op00 = simplify_gen_subreg (word_mode, op0, int_mode, 0); in emit_store_flag_1()
5675 op01 = simplify_gen_subreg (word_mode, op0, int_mode, UNITS_PER_WORD); in emit_store_flag_1()
5690 op0h = simplify_gen_subreg (word_mode, op0, int_mode, in emit_store_flag_1()
Dvaltrack.cc558 rtx ret = simplify_gen_subreg (outer_mode, expr, inner_mode, offset); in debug_lowpart_subreg()
Dsimplify-rtx.cc474 op0 = simplify_gen_subreg (GET_MODE (x), op0, in simplify_replace_fn_rtx()
774 return simplify_gen_subreg (mode, XEXP (op, 0), op_mode, in simplify_truncation()
834 return simplify_gen_subreg (int_mode, SUBREG_REG (op), in simplify_truncation()
7564 return simplify_gen_subreg (outermode, XEXP (op, 0), innermode, byte); in simplify_subreg()
7618 simplify_context::simplify_gen_subreg (machine_mode outermode, rtx op, in simplify_gen_subreg() function in simplify_context
7653 return simplify_gen_subreg (outer_mode, expr, inner_mode, in lowpart_subreg()
8033 simplify_gen_subreg (inner_mode, vm, in test_vector_ops_duplicate()
8042 simplify_gen_subreg (inner_mode, duplicate, in test_vector_ops_duplicate()
8075 simplify_gen_subreg (narrower_mode, duplicate, in test_vector_ops_duplicate()
Drtl.h3427 rtx simplify_gen_subreg (machine_mode, rtx, machine_mode, poly_uint64);
3531 simplify_gen_subreg (machine_mode outermode, rtx op, machine_mode innermode,
3534 return simplify_context ().simplify_gen_subreg (outermode, op,
Dlra-eliminations.cc632 return simplify_gen_subreg (GET_MODE (x), new_rtx, in lra_eliminate_regs_1()
/netbsd/src/external/gpl3/gcc/dist/gcc/config/m32c/
Dm32c.cc3266 rtx r = simplify_gen_subreg (outer, x, inner, byte); in m32c_subreg()
3281 return simplify_gen_subreg (outer, x, inner, byte); in m32c_subreg()
3284 return simplify_gen_subreg (outer, x, inner, byte); in m32c_subreg()
/netbsd/src/external/gpl3/gcc/dist/gcc/config/frv/
Dfrv.md1991 rtx dest = simplify_gen_subreg (SImode, operands[0], CCmode, 0);
2057 rtx dest = simplify_gen_subreg (SImode, operands[0], CC_UNSmode, 0);
2139 "operands[3] = simplify_gen_subreg (SImode, operands[0], CC_NZmode, 0);")
2176 rtx cc_op2 = simplify_gen_subreg (CC_FPmode, operands[2], TImode, 0);
2177 rtx int_op2 = simplify_gen_subreg (SImode, operands[2], TImode, 0);
2178 rtx temp1 = simplify_gen_subreg (SImode, operands[2], TImode, 4);
2179 rtx temp2 = simplify_gen_subreg (SImode, operands[2], TImode, 8);
2186 rtx temp3 = simplify_gen_subreg (SImode, operands[2], TImode, 12);
2237 rtx int_op0 = simplify_gen_subreg (SImode, operands[0], CC_FPmode, 0);
2293 rtx int_op2 = simplify_gen_subreg (SImode, operands[2], CC_CCRmode, 0);
[all …]
Dfrv.cc8956 emit_move_insn (simplify_gen_subreg (HImode, op0, DImode, 2), arg1); in frv_expand_mdpackh_builtin()
8957 emit_move_insn (simplify_gen_subreg (HImode, op0, DImode, 6), arg2); in frv_expand_mdpackh_builtin()
8958 emit_move_insn (simplify_gen_subreg (HImode, op1, DImode, 2), arg3); in frv_expand_mdpackh_builtin()
8959 emit_move_insn (simplify_gen_subreg (HImode, op1, DImode, 6), arg4); in frv_expand_mdpackh_builtin()
9058 emit_move_insn (simplify_gen_subreg (SImode, dest, inner, i), in frv_split_iacc_move()
9059 simplify_gen_subreg (SImode, src, inner, i)); in frv_split_iacc_move()
/netbsd/src/external/gpl3/gcc/dist/gcc/config/xtensa/
Dxtensa.cc619 src = simplify_gen_subreg (SImode, src, GET_MODE (src), 0); in xtensa_extend_reg()
620 dst = simplify_gen_subreg (SImode, dst, GET_MODE (dst), 0); in xtensa_extend_reg()
1113 emit_move_insn (simplify_gen_subreg (SImode, dst, mode, 0), src); in xtensa_emit_move_sequence()
/netbsd/src/external/gpl3/gcc/dist/gcc/config/bfin/
Dbfin.md1087 xops[1] = simplify_gen_subreg (SImode, operands[0], DImode, 4);
1089 xops[3] = simplify_gen_subreg (SImode, operands[1], DImode, 4);
1091 xops[5] = simplify_gen_subreg (SImode, operands[2], DImode, 4);
1124 xops[1] = simplify_gen_subreg (SImode, operands[0], DImode, 4);
1126 xops[3] = simplify_gen_subreg (SImode, operands[1], DImode, 4);
1128 xops[5] = simplify_gen_subreg (SImode, operands[2], DImode, 4);

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