Searched refs:RegOp2 (Results 1 – 1 of 1) sorted by relevance
4180 Register RegOp2 = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter() local4182 BuildMI(*BB, MII, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), RegOp2) in EmitInstrWithCustomInserter()4184 Src2.setReg(RegOp2); in EmitInstrWithCustomInserter()