1 /*-
2 * Copyright (C) 2009 Nathan Whitehorn
3 * Copyright (C) 2015 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Portions of this software were developed by Andrew Turner
7 * under sponsorship from the FreeBSD Foundation.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31 #include <sys/cdefs.h>
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/module.h>
36 #include <sys/malloc.h>
37 #include <sys/bus.h>
38 #include <sys/cpu.h>
39 #include <machine/bus.h>
40
41 #include <dev/ofw/openfirm.h>
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
44 #include <dev/ofw/ofw_cpu.h>
45
46 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
47 #include <dev/extres/clk/clk.h>
48 #endif
49
50 static int ofw_cpulist_probe(device_t);
51 static int ofw_cpulist_attach(device_t);
52 static const struct ofw_bus_devinfo *ofw_cpulist_get_devinfo(device_t dev,
53 device_t child);
54
55 static MALLOC_DEFINE(M_OFWCPU, "ofwcpu", "OFW CPU device information");
56
57 struct ofw_cpulist_softc {
58 pcell_t sc_addr_cells;
59 };
60
61 static device_method_t ofw_cpulist_methods[] = {
62 /* Device interface */
63 DEVMETHOD(device_probe, ofw_cpulist_probe),
64 DEVMETHOD(device_attach, ofw_cpulist_attach),
65
66 /* Bus interface */
67 DEVMETHOD(bus_add_child, bus_generic_add_child),
68 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
69
70 /* ofw_bus interface */
71 DEVMETHOD(ofw_bus_get_devinfo, ofw_cpulist_get_devinfo),
72 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
73 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
74 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
75 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
76 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
77
78 DEVMETHOD_END
79 };
80
81 static driver_t ofw_cpulist_driver = {
82 "cpulist",
83 ofw_cpulist_methods,
84 sizeof(struct ofw_cpulist_softc)
85 };
86
87 static devclass_t ofw_cpulist_devclass;
88
89 DRIVER_MODULE(ofw_cpulist, ofwbus, ofw_cpulist_driver, ofw_cpulist_devclass,
90 0, 0);
91
92 static int
ofw_cpulist_probe(device_t dev)93 ofw_cpulist_probe(device_t dev)
94 {
95 const char *name;
96
97 name = ofw_bus_get_name(dev);
98
99 if (name == NULL || strcmp(name, "cpus") != 0)
100 return (ENXIO);
101
102 device_set_desc(dev, "Open Firmware CPU Group");
103
104 return (0);
105 }
106
107 static int
ofw_cpulist_attach(device_t dev)108 ofw_cpulist_attach(device_t dev)
109 {
110 struct ofw_cpulist_softc *sc;
111 phandle_t root, child;
112 device_t cdev;
113 struct ofw_bus_devinfo *dinfo;
114
115 sc = device_get_softc(dev);
116 root = ofw_bus_get_node(dev);
117
118 sc->sc_addr_cells = 1;
119 OF_getencprop(root, "#address-cells", &sc->sc_addr_cells,
120 sizeof(sc->sc_addr_cells));
121
122 for (child = OF_child(root); child != 0; child = OF_peer(child)) {
123 dinfo = malloc(sizeof(*dinfo), M_OFWCPU, M_WAITOK | M_ZERO);
124
125 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) {
126 free(dinfo, M_OFWCPU);
127 continue;
128 }
129 cdev = device_add_child(dev, NULL, -1);
130 if (cdev == NULL) {
131 device_printf(dev, "<%s>: device_add_child failed\n",
132 dinfo->obd_name);
133 ofw_bus_gen_destroy_devinfo(dinfo);
134 free(dinfo, M_OFWCPU);
135 continue;
136 }
137 device_set_ivars(cdev, dinfo);
138 }
139
140 return (bus_generic_attach(dev));
141 }
142
143 static const struct ofw_bus_devinfo *
ofw_cpulist_get_devinfo(device_t dev,device_t child)144 ofw_cpulist_get_devinfo(device_t dev, device_t child)
145 {
146 return (device_get_ivars(child));
147 }
148
149 static int ofw_cpu_probe(device_t);
150 static int ofw_cpu_attach(device_t);
151 static int ofw_cpu_read_ivar(device_t dev, device_t child, int index,
152 uintptr_t *result);
153
154 struct ofw_cpu_softc {
155 struct pcpu *sc_cpu_pcpu;
156 uint32_t sc_nominal_mhz;
157 boolean_t sc_reg_valid;
158 pcell_t sc_reg[2];
159 };
160
161 static device_method_t ofw_cpu_methods[] = {
162 /* Device interface */
163 DEVMETHOD(device_probe, ofw_cpu_probe),
164 DEVMETHOD(device_attach, ofw_cpu_attach),
165
166 /* Bus interface */
167 DEVMETHOD(bus_add_child, bus_generic_add_child),
168 DEVMETHOD(bus_read_ivar, ofw_cpu_read_ivar),
169 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
170 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
171 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
172 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
173 DEVMETHOD(bus_activate_resource,bus_generic_activate_resource),
174
175 DEVMETHOD_END
176 };
177
178 static driver_t ofw_cpu_driver = {
179 "cpu",
180 ofw_cpu_methods,
181 sizeof(struct ofw_cpu_softc)
182 };
183
184 static devclass_t ofw_cpu_devclass;
185
186 DRIVER_MODULE(ofw_cpu, cpulist, ofw_cpu_driver, ofw_cpu_devclass, 0, 0);
187
188 static int
ofw_cpu_probe(device_t dev)189 ofw_cpu_probe(device_t dev)
190 {
191 const char *type = ofw_bus_get_type(dev);
192
193 if (type == NULL || strcmp(type, "cpu") != 0)
194 return (ENXIO);
195
196 device_set_desc(dev, "Open Firmware CPU");
197 if (!bootverbose && device_get_unit(dev) != 0) {
198 device_quiet(dev);
199 device_quiet_children(dev);
200 }
201
202 return (0);
203 }
204
205 static int
ofw_cpu_attach(device_t dev)206 ofw_cpu_attach(device_t dev)
207 {
208 struct ofw_cpulist_softc *psc;
209 struct ofw_cpu_softc *sc;
210 phandle_t node;
211 pcell_t cell;
212 int rv;
213 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
214 clk_t cpuclk;
215 uint64_t freq;
216 #endif
217
218 sc = device_get_softc(dev);
219 psc = device_get_softc(device_get_parent(dev));
220
221 if (nitems(sc->sc_reg) < psc->sc_addr_cells) {
222 if (bootverbose)
223 device_printf(dev, "Too many address cells\n");
224 return (EINVAL);
225 }
226
227 node = ofw_bus_get_node(dev);
228
229 /* Read and validate the reg property for use later */
230 sc->sc_reg_valid = false;
231 rv = OF_getencprop(node, "reg", sc->sc_reg, sizeof(sc->sc_reg));
232 if (rv < 0)
233 device_printf(dev, "missing 'reg' property\n");
234 else if ((rv % 4) != 0) {
235 if (bootverbose)
236 device_printf(dev, "Malformed reg property\n");
237 } else if ((rv / 4) != psc->sc_addr_cells) {
238 if (bootverbose)
239 device_printf(dev, "Invalid reg size %u\n", rv);
240 } else
241 sc->sc_reg_valid = true;
242
243 #ifdef __powerpc__
244 /*
245 * On powerpc, "interrupt-servers" denotes a SMT CPU. Look for any
246 * thread on this CPU, and assign that.
247 */
248 if (OF_hasprop(node, "ibm,ppc-interrupt-server#s")) {
249 struct cpuref cpuref;
250 cell_t *servers;
251 int i, nservers, rv;
252
253 if ((nservers = OF_getencprop_alloc(node,
254 "ibm,ppc-interrupt-server#s", (void **)&servers)) < 0)
255 return (ENXIO);
256 nservers /= sizeof(cell_t);
257 for (i = 0; i < nservers; i++) {
258 for (rv = platform_smp_first_cpu(&cpuref); rv == 0;
259 rv = platform_smp_next_cpu(&cpuref)) {
260 if (cpuref.cr_hwref == servers[i]) {
261 sc->sc_cpu_pcpu =
262 pcpu_find(cpuref.cr_cpuid);
263 if (sc->sc_cpu_pcpu == NULL) {
264 OF_prop_free(servers);
265 return (ENXIO);
266 }
267 break;
268 }
269 }
270 if (rv != ENOENT)
271 break;
272 }
273 OF_prop_free(servers);
274 if (sc->sc_cpu_pcpu == NULL) {
275 device_printf(dev, "No CPU found for this device.\n");
276 return (ENXIO);
277 }
278 } else
279 #endif
280 sc->sc_cpu_pcpu = pcpu_find(device_get_unit(dev));
281
282 if (OF_getencprop(node, "clock-frequency", &cell, sizeof(cell)) < 0) {
283 #if defined(__arm__) || defined(__arm64__) || defined(__riscv__)
284 rv = clk_get_by_ofw_index(dev, 0, 0, &cpuclk);
285 if (rv == 0) {
286 rv = clk_get_freq(cpuclk, &freq);
287 if (rv != 0 && bootverbose)
288 device_printf(dev,
289 "Cannot get freq of property clocks\n");
290 else
291 sc->sc_nominal_mhz = freq / 1000000;
292 } else
293 #endif
294 {
295 if (bootverbose)
296 device_printf(dev,
297 "missing 'clock-frequency' property\n");
298 }
299 } else
300 sc->sc_nominal_mhz = cell / 1000000; /* convert to MHz */
301
302 if (sc->sc_nominal_mhz != 0 && bootverbose)
303 device_printf(dev, "Nominal frequency %dMhz\n",
304 sc->sc_nominal_mhz);
305 bus_generic_probe(dev);
306 return (bus_generic_attach(dev));
307 }
308
309 static int
ofw_cpu_read_ivar(device_t dev,device_t child,int index,uintptr_t * result)310 ofw_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
311 {
312 struct ofw_cpulist_softc *psc;
313 struct ofw_cpu_softc *sc;
314
315 sc = device_get_softc(dev);
316
317 switch (index) {
318 case CPU_IVAR_PCPU:
319 *result = (uintptr_t)sc->sc_cpu_pcpu;
320 return (0);
321 case CPU_IVAR_NOMINAL_MHZ:
322 if (sc->sc_nominal_mhz > 0) {
323 *result = (uintptr_t)sc->sc_nominal_mhz;
324 return (0);
325 }
326 break;
327 case CPU_IVAR_CPUID_SIZE:
328 psc = device_get_softc(device_get_parent(dev));
329 *result = psc->sc_addr_cells;
330 return (0);
331 case CPU_IVAR_CPUID:
332 if (sc->sc_reg_valid) {
333 *result = (uintptr_t)sc->sc_reg;
334 return (0);
335 }
336 break;
337 }
338
339 return (ENOENT);
340 }
341
342 int
ofw_cpu_early_foreach(ofw_cpu_foreach_cb callback,boolean_t only_runnable)343 ofw_cpu_early_foreach(ofw_cpu_foreach_cb callback, boolean_t only_runnable)
344 {
345 phandle_t node, child;
346 pcell_t addr_cells, reg[2];
347 char status[16];
348 char device_type[16];
349 u_int id, next_id;
350 int count, rv;
351
352 count = 0;
353 id = 0;
354 next_id = 0;
355
356 node = OF_finddevice("/cpus");
357 if (node == -1)
358 return (-1);
359
360 /* Find the number of cells in the cpu register */
361 if (OF_getencprop(node, "#address-cells", &addr_cells,
362 sizeof(addr_cells)) < 0)
363 return (-1);
364
365 for (child = OF_child(node); child != 0; child = OF_peer(child),
366 id = next_id) {
367 /* Check if child is a CPU */
368 memset(device_type, 0, sizeof(device_type));
369 rv = OF_getprop(child, "device_type", device_type,
370 sizeof(device_type) - 1);
371 if (rv < 0)
372 continue;
373 if (strcmp(device_type, "cpu") != 0)
374 continue;
375
376 /* We're processing CPU, update next_id used in the next iteration */
377 next_id++;
378
379 /*
380 * If we are filtering by runnable then limit to only
381 * those that have been enabled, or do provide a method
382 * to enable them.
383 */
384 if (only_runnable) {
385 status[0] = '\0';
386 OF_getprop(child, "status", status, sizeof(status));
387 if (status[0] != '\0' && strcmp(status, "okay") != 0 &&
388 strcmp(status, "ok") != 0 &&
389 !OF_hasprop(child, "enable-method"))
390 continue;
391 }
392
393 /*
394 * Check we have a register to identify the cpu
395 */
396 rv = OF_getencprop(child, "reg", reg,
397 addr_cells * sizeof(cell_t));
398 if (rv != addr_cells * sizeof(cell_t))
399 continue;
400
401 if (callback == NULL || callback(id, child, addr_cells, reg))
402 count++;
403 }
404
405 return (only_runnable ? count : id);
406 }
407