1 /*-
2 * Copyright (c) 2016, Hiroki Mori
3 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
11 * disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include "opt_platform.h"
30 #include "opt_ar531x.h"
31
32 #include <sys/cdefs.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36 #include <sys/interrupt.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/rman.h>
40 #include <sys/malloc.h>
41 #include <sys/pcpu.h>
42 #include <sys/proc.h>
43 #include <sys/pmc.h>
44 #include <sys/pmckern.h>
45
46 #include <machine/bus.h>
47 #ifdef INTRNG
48 #include <machine/intr.h>
49 #else
50 #include <machine/intr_machdep.h>
51 #endif
52
53 #ifdef INTRNG
54 #include "pic_if.h"
55
56 #define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc)
57 #endif
58
59 #include <mips/atheros/ar531x/apbvar.h>
60 #include <mips/atheros/ar531x/ar5315reg.h>
61 #include <mips/atheros/ar531x/ar5312reg.h>
62 #include <mips/atheros/ar531x/ar5315_setup.h>
63
64 #ifdef AR531X_APB_DEBUG
65 #define dprintf printf
66 #else
67 #define dprintf(x, arg...)
68 #endif /* AR531X_APB_DEBUG */
69
70 static int apb_activate_resource(device_t, device_t, int, int,
71 struct resource *);
72 static device_t apb_add_child(device_t, u_int, const char *, int);
73 static struct resource *
74 apb_alloc_resource(device_t, device_t, int, int *, rman_res_t,
75 rman_res_t, rman_res_t, u_int);
76 static int apb_attach(device_t);
77 static int apb_deactivate_resource(device_t, device_t, int, int,
78 struct resource *);
79 static struct resource_list *
80 apb_get_resource_list(device_t, device_t);
81 static void apb_hinted_child(device_t, const char *, int);
82 static int apb_filter(void *);
83 static int apb_probe(device_t);
84 static int apb_release_resource(device_t, device_t, int, int,
85 struct resource *);
86 #ifndef INTRNG
87 static int apb_setup_intr(device_t, device_t, struct resource *, int,
88 driver_filter_t *, driver_intr_t *, void *, void **);
89 static int apb_teardown_intr(device_t, device_t, struct resource *,
90 void *);
91 #endif
92
93 static void
apb_mask_irq(void * source)94 apb_mask_irq(void *source)
95 {
96 unsigned int irq = (unsigned int)source;
97 uint32_t reg;
98
99 if(ar531x_soc >= AR531X_SOC_AR5315) {
100 reg = ATH_READ_REG(AR5315_SYSREG_BASE +
101 AR5315_SYSREG_MISC_INTMASK);
102 ATH_WRITE_REG(AR5315_SYSREG_BASE
103 + AR5315_SYSREG_MISC_INTMASK, reg & ~(1 << irq));
104 } else {
105 reg = ATH_READ_REG(AR5312_SYSREG_BASE +
106 AR5312_SYSREG_MISC_INTMASK);
107 ATH_WRITE_REG(AR5312_SYSREG_BASE
108 + AR5312_SYSREG_MISC_INTMASK, reg & ~(1 << irq));
109 }
110 }
111
112 static void
apb_unmask_irq(void * source)113 apb_unmask_irq(void *source)
114 {
115 uint32_t reg;
116 unsigned int irq = (unsigned int)source;
117
118 if(ar531x_soc >= AR531X_SOC_AR5315) {
119 reg = ATH_READ_REG(AR5315_SYSREG_BASE +
120 AR5315_SYSREG_MISC_INTMASK);
121 ATH_WRITE_REG(AR5315_SYSREG_BASE +
122 AR5315_SYSREG_MISC_INTMASK, reg | (1 << irq));
123 } else {
124 reg = ATH_READ_REG(AR5312_SYSREG_BASE +
125 AR5312_SYSREG_MISC_INTMASK);
126 ATH_WRITE_REG(AR5312_SYSREG_BASE +
127 AR5312_SYSREG_MISC_INTMASK, reg | (1 << irq));
128 }
129 }
130
131 #ifdef INTRNG
132 static int
apb_pic_register_isrcs(struct apb_softc * sc)133 apb_pic_register_isrcs(struct apb_softc *sc)
134 {
135 int error;
136 uint32_t irq;
137 struct intr_irqsrc *isrc;
138 const char *name;
139
140 name = device_get_nameunit(sc->apb_dev);
141 for (irq = 0; irq < APB_NIRQS; irq++) {
142 sc->pic_irqs[irq].irq = irq;
143 isrc = PIC_INTR_ISRC(sc, irq);
144 error = intr_isrc_register(isrc, sc->apb_dev, 0, "%s", name);
145 if (error != 0) {
146 /* XXX call intr_isrc_deregister */
147 device_printf(sc->apb_dev, "%s failed", __func__);
148 return (error);
149 }
150 }
151
152 return (0);
153 }
154
155 static inline intptr_t
pic_xref(device_t dev)156 pic_xref(device_t dev)
157 {
158 return (0);
159 }
160 #endif
161
162 static int
apb_probe(device_t dev)163 apb_probe(device_t dev)
164 {
165 #ifdef INTRNG
166 device_set_desc(dev, "APB Bus bridge INTRNG");
167 #else
168 device_set_desc(dev, "APB Bus bridge");
169 #endif
170
171 return (0);
172 }
173
174 static int
apb_attach(device_t dev)175 apb_attach(device_t dev)
176 {
177 struct apb_softc *sc = device_get_softc(dev);
178 #ifdef INTRNG
179 intptr_t xref = pic_xref(dev);
180 int miscirq;
181 #else
182 int rid = 0;
183 #endif
184
185 sc->apb_dev = dev;
186
187 sc->apb_mem_rman.rm_type = RMAN_ARRAY;
188 sc->apb_mem_rman.rm_descr = "APB memory window";
189
190 if(ar531x_soc >= AR531X_SOC_AR5315) {
191 if (rman_init(&sc->apb_mem_rman) != 0 ||
192 rman_manage_region(&sc->apb_mem_rman,
193 AR5315_APB_BASE,
194 AR5315_APB_BASE + AR5315_APB_SIZE - 1) != 0)
195 panic("apb_attach: failed to set up memory rman");
196 } else {
197 if (rman_init(&sc->apb_mem_rman) != 0 ||
198 rman_manage_region(&sc->apb_mem_rman,
199 AR5312_APB_BASE,
200 AR5312_APB_BASE + AR5312_APB_SIZE - 1) != 0)
201 panic("apb_attach: failed to set up memory rman");
202 }
203
204 sc->apb_irq_rman.rm_type = RMAN_ARRAY;
205 sc->apb_irq_rman.rm_descr = "APB IRQ";
206
207 if (rman_init(&sc->apb_irq_rman) != 0 ||
208 rman_manage_region(&sc->apb_irq_rman,
209 APB_IRQ_BASE, APB_IRQ_END) != 0)
210 panic("apb_attach: failed to set up IRQ rman");
211
212 #ifndef INTRNG
213 if ((sc->sc_misc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
214 RF_SHAREABLE | RF_ACTIVE)) == NULL) {
215 device_printf(dev, "unable to allocate IRQ resource\n");
216 return (ENXIO);
217 }
218
219 if ((bus_setup_intr(dev, sc->sc_misc_irq, INTR_TYPE_MISC,
220 apb_filter, NULL, sc, &sc->sc_misc_ih))) {
221 device_printf(dev,
222 "WARNING: unable to register interrupt handler\n");
223 return (ENXIO);
224 }
225 #else
226 /* Register the interrupts */
227 if (apb_pic_register_isrcs(sc) != 0) {
228 device_printf(dev, "could not register PIC ISRCs\n");
229 return (ENXIO);
230 }
231
232 /*
233 * Now, when everything is initialized, it's right time to
234 * register interrupt controller to interrupt framefork.
235 */
236 if (intr_pic_register(dev, xref) == NULL) {
237 device_printf(dev, "could not register PIC\n");
238 return (ENXIO);
239 }
240
241 if(ar531x_soc >= AR531X_SOC_AR5315) {
242 miscirq = AR5315_CPU_IRQ_MISC;
243 } else {
244 miscirq = AR5312_IRQ_MISC;
245 }
246 cpu_establish_hardintr("aric", apb_filter, NULL, sc, miscirq,
247 INTR_TYPE_MISC, NULL);
248 #endif
249
250 /* mask all misc interrupt */
251 if(ar531x_soc >= AR531X_SOC_AR5315) {
252 ATH_WRITE_REG(AR5315_SYSREG_BASE
253 + AR5315_SYSREG_MISC_INTMASK, 0);
254 } else {
255 ATH_WRITE_REG(AR5312_SYSREG_BASE
256 + AR5312_SYSREG_MISC_INTMASK, 0);
257 }
258
259 bus_generic_probe(dev);
260 bus_enumerate_hinted_children(dev);
261 bus_generic_attach(dev);
262
263 return (0);
264 }
265
266 static struct resource *
apb_alloc_resource(device_t bus,device_t child,int type,int * rid,rman_res_t start,rman_res_t end,rman_res_t count,u_int flags)267 apb_alloc_resource(device_t bus, device_t child, int type, int *rid,
268 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
269 {
270 struct apb_softc *sc = device_get_softc(bus);
271 struct apb_ivar *ivar = device_get_ivars(child);
272 struct resource *rv;
273 struct resource_list_entry *rle;
274 struct rman *rm;
275 int isdefault, needactivate, passthrough;
276
277 isdefault = (RMAN_IS_DEFAULT_RANGE(start, end));
278 needactivate = flags & RF_ACTIVE;
279 /*
280 * Pass memory requests to nexus device
281 */
282 passthrough = (device_get_parent(child) != bus);
283 rle = NULL;
284
285 dprintf("%s: entry (%p, %p, %d, %d, %p, %p, %jd, %d)\n",
286 __func__, bus, child, type, *rid, (void *)(intptr_t)start,
287 (void *)(intptr_t)end, count, flags);
288
289 if (passthrough)
290 return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type,
291 rid, start, end, count, flags));
292
293 /*
294 * If this is an allocation of the "default" range for a given RID,
295 * and we know what the resources for this device are (ie. they aren't
296 * maintained by a child bus), then work out the start/end values.
297 */
298
299 if (isdefault) {
300 rle = resource_list_find(&ivar->resources, type, *rid);
301 if (rle == NULL) {
302 return (NULL);
303 }
304
305 if (rle->res != NULL) {
306 panic("%s: resource entry is busy", __func__);
307 }
308 start = rle->start;
309 end = rle->end;
310 count = rle->count;
311
312 dprintf("%s: default resource (%p, %p, %jd)\n",
313 __func__, (void *)(intptr_t)start,
314 (void *)(intptr_t)end, count);
315 }
316
317 switch (type) {
318 case SYS_RES_IRQ:
319 rm = &sc->apb_irq_rman;
320 break;
321 case SYS_RES_MEMORY:
322 rm = &sc->apb_mem_rman;
323 break;
324 default:
325 printf("%s: unknown resource type %d\n", __func__, type);
326 return (0);
327 }
328
329 rv = rman_reserve_resource(rm, start, end, count, flags, child);
330 if (rv == NULL) {
331 printf("%s: could not reserve resource %d\n", __func__, type);
332 return (0);
333 }
334
335 rman_set_rid(rv, *rid);
336
337 if (needactivate) {
338 if (bus_activate_resource(child, type, *rid, rv)) {
339 printf("%s: could not activate resource\n", __func__);
340 rman_release_resource(rv);
341 return (0);
342 }
343 }
344
345 return (rv);
346 }
347
348 static int
apb_activate_resource(device_t bus,device_t child,int type,int rid,struct resource * r)349 apb_activate_resource(device_t bus, device_t child, int type, int rid,
350 struct resource *r)
351 {
352
353 /* XXX: should we mask/unmask IRQ here? */
354 return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child,
355 type, rid, r));
356 }
357
358 static int
apb_deactivate_resource(device_t bus,device_t child,int type,int rid,struct resource * r)359 apb_deactivate_resource(device_t bus, device_t child, int type, int rid,
360 struct resource *r)
361 {
362
363 /* XXX: should we mask/unmask IRQ here? */
364 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(bus), child,
365 type, rid, r));
366 }
367
368 static int
apb_release_resource(device_t dev,device_t child,int type,int rid,struct resource * r)369 apb_release_resource(device_t dev, device_t child, int type,
370 int rid, struct resource *r)
371 {
372 struct resource_list *rl;
373 struct resource_list_entry *rle;
374
375 rl = apb_get_resource_list(dev, child);
376 if (rl == NULL)
377 return (EINVAL);
378 rle = resource_list_find(rl, type, rid);
379 if (rle == NULL)
380 return (EINVAL);
381 rman_release_resource(r);
382 rle->res = NULL;
383
384 return (0);
385 }
386
387 static int
apb_setup_intr(device_t bus,device_t child,struct resource * ires,int flags,driver_filter_t * filt,driver_intr_t * handler,void * arg,void ** cookiep)388 apb_setup_intr(device_t bus, device_t child, struct resource *ires,
389 int flags, driver_filter_t *filt, driver_intr_t *handler,
390 void *arg, void **cookiep)
391 {
392 struct apb_softc *sc = device_get_softc(bus);
393 int error;
394 int irq;
395 #ifndef INTRNG
396 struct intr_event *event;
397 #endif
398
399 #ifdef INTRNG
400 struct intr_irqsrc *isrc;
401 const char *name;
402
403 if ((rman_get_flags(ires) & RF_SHAREABLE) == 0)
404 flags |= INTR_EXCL;
405
406 irq = rman_get_start(ires);
407 isrc = PIC_INTR_ISRC(sc, irq);
408 if(isrc->isrc_event == 0) {
409 error = intr_event_create(&isrc->isrc_event, (void *)irq,
410 0, irq, apb_mask_irq, apb_unmask_irq,
411 NULL, NULL, "apb intr%d:", irq);
412 if(error != 0)
413 return(error);
414 }
415 name = device_get_nameunit(child);
416 error = intr_event_add_handler(isrc->isrc_event, name, filt, handler,
417 arg, intr_priority(flags), flags, cookiep);
418 return(error);
419 #else
420 irq = rman_get_start(ires);
421
422 if (irq > APB_IRQ_END)
423 panic("%s: bad irq %d", __func__, irq);
424
425 event = sc->sc_eventstab[irq];
426 if (event == NULL) {
427 error = intr_event_create(&event, (void *)irq, 0, irq,
428 apb_mask_irq, apb_unmask_irq,
429 NULL, NULL,
430 "apb intr%d:", irq);
431
432 if (error == 0) {
433 sc->sc_eventstab[irq] = event;
434 sc->sc_intr_counter[irq] =
435 mips_intrcnt_create(event->ie_name);
436 }
437 else
438 return (error);
439 }
440
441 intr_event_add_handler(event, device_get_nameunit(child), filt,
442 handler, arg, intr_priority(flags), flags, cookiep);
443 mips_intrcnt_setname(sc->sc_intr_counter[irq], event->ie_fullname);
444
445 apb_unmask_irq((void*)irq);
446
447 return (0);
448 #endif
449 }
450
451 #ifndef INTRNG
452 static int
apb_teardown_intr(device_t dev,device_t child,struct resource * ires,void * cookie)453 apb_teardown_intr(device_t dev, device_t child, struct resource *ires,
454 void *cookie)
455 {
456 #ifdef INTRNG
457 return (intr_teardown_irq(child, ires, cookie));
458 #else
459 struct apb_softc *sc = device_get_softc(dev);
460 int irq, result;
461
462 irq = rman_get_start(ires);
463 if (irq > APB_IRQ_END)
464 panic("%s: bad irq %d", __func__, irq);
465
466 if (sc->sc_eventstab[irq] == NULL)
467 panic("Trying to teardown unoccupied IRQ");
468
469 apb_mask_irq((void*)irq);
470
471 result = intr_event_remove_handler(cookie);
472 if (!result)
473 sc->sc_eventstab[irq] = NULL;
474
475 return (result);
476 #endif
477 }
478
479 static int
apb_filter(void * arg)480 apb_filter(void *arg)
481 {
482 struct apb_softc *sc = arg;
483 struct intr_event *event;
484 uint32_t reg, irq;
485
486 if(ar531x_soc >= AR531X_SOC_AR5315)
487 reg = ATH_READ_REG(AR5315_SYSREG_BASE +
488 AR5315_SYSREG_MISC_INTSTAT);
489 else
490 reg = ATH_READ_REG(AR5312_SYSREG_BASE +
491 AR5312_SYSREG_MISC_INTSTAT);
492
493 for (irq = 0; irq < APB_NIRQS; irq++) {
494 if (reg & (1 << irq)) {
495 if(ar531x_soc >= AR531X_SOC_AR5315) {
496 ATH_WRITE_REG(AR5315_SYSREG_BASE +
497 AR5315_SYSREG_MISC_INTSTAT,
498 reg & ~(1 << irq));
499 } else {
500 ATH_WRITE_REG(AR5312_SYSREG_BASE +
501 AR5312_SYSREG_MISC_INTSTAT,
502 reg & ~(1 << irq));
503 }
504
505 event = sc->sc_eventstab[irq];
506 if (!event || CK_SLIST_EMPTY(&event->ie_handlers)) {
507 if(irq == 1 && ar531x_soc < AR531X_SOC_AR5315) {
508 ATH_READ_REG(AR5312_SYSREG_BASE +
509 AR5312_SYSREG_AHBPERR);
510 ATH_READ_REG(AR5312_SYSREG_BASE +
511 AR5312_SYSREG_AHBDMAE);
512 }
513 /* Ignore non handle interrupts */
514 if (irq != 0 && irq != 6)
515 printf("Stray APB IRQ %d\n", irq);
516
517 continue;
518 }
519
520 intr_event_handle(event, PCPU_GET(curthread)->td_intr_frame);
521 mips_intrcnt_inc(sc->sc_intr_counter[irq]);
522 }
523 }
524
525 return (FILTER_HANDLED);
526 }
527 #else
528 static int
apb_filter(void * arg)529 apb_filter(void *arg)
530 {
531 struct apb_softc *sc = arg;
532 struct thread *td;
533 uint32_t i, intr;
534
535 td = curthread;
536 /* Workaround: do not inflate intr nesting level */
537 td->td_intr_nesting_level--;
538
539 if(ar531x_soc >= AR531X_SOC_AR5315)
540 intr = ATH_READ_REG(AR5315_SYSREG_BASE +
541 AR5315_SYSREG_MISC_INTSTAT);
542 else
543 intr = ATH_READ_REG(AR5312_SYSREG_BASE +
544 AR5312_SYSREG_MISC_INTSTAT);
545
546 while ((i = fls(intr)) != 0) {
547 i--;
548 intr &= ~(1u << i);
549
550 if(i == 1 && ar531x_soc < AR531X_SOC_AR5315) {
551 ATH_READ_REG(AR5312_SYSREG_BASE +
552 AR5312_SYSREG_AHBPERR);
553 ATH_READ_REG(AR5312_SYSREG_BASE +
554 AR5312_SYSREG_AHBDMAE);
555 }
556
557 if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
558 curthread->td_intr_frame) != 0) {
559 device_printf(sc->apb_dev,
560 "Stray interrupt %u detected\n", i);
561 apb_mask_irq((void*)i);
562 continue;
563 }
564 }
565
566 KASSERT(i == 0, ("all interrupts handled"));
567
568 td->td_intr_nesting_level++;
569
570 return (FILTER_HANDLED);
571
572 }
573
574 #endif
575
576 static void
apb_hinted_child(device_t bus,const char * dname,int dunit)577 apb_hinted_child(device_t bus, const char *dname, int dunit)
578 {
579 device_t child;
580 long maddr;
581 int msize;
582 int irq;
583 int result;
584 int mem_hints_count;
585
586 child = BUS_ADD_CHILD(bus, 0, dname, dunit);
587
588 /*
589 * Set hard-wired resources for hinted child using
590 * specific RIDs.
591 */
592 mem_hints_count = 0;
593 if (resource_long_value(dname, dunit, "maddr", &maddr) == 0)
594 mem_hints_count++;
595 if (resource_int_value(dname, dunit, "msize", &msize) == 0)
596 mem_hints_count++;
597
598 /* check if all info for mem resource has been provided */
599 if ((mem_hints_count > 0) && (mem_hints_count < 2)) {
600 printf("Either maddr or msize hint is missing for %s%d\n",
601 dname, dunit);
602 } else if (mem_hints_count) {
603 result = bus_set_resource(child, SYS_RES_MEMORY, 0,
604 maddr, msize);
605 if (result != 0)
606 device_printf(bus,
607 "warning: bus_set_resource() failed\n");
608 }
609
610 if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
611 result = bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1);
612 if (result != 0)
613 device_printf(bus,
614 "warning: bus_set_resource() failed\n");
615 }
616 }
617
618 static device_t
apb_add_child(device_t bus,u_int order,const char * name,int unit)619 apb_add_child(device_t bus, u_int order, const char *name, int unit)
620 {
621 device_t child;
622 struct apb_ivar *ivar;
623
624 ivar = malloc(sizeof(struct apb_ivar), M_DEVBUF, M_WAITOK | M_ZERO);
625 if (ivar == NULL) {
626 printf("Failed to allocate ivar\n");
627 return (0);
628 }
629 resource_list_init(&ivar->resources);
630
631 child = device_add_child_ordered(bus, order, name, unit);
632 if (child == NULL) {
633 printf("Can't add child %s%d ordered\n", name, unit);
634 return (0);
635 }
636
637 device_set_ivars(child, ivar);
638
639 return (child);
640 }
641
642 /*
643 * Helper routine for bus_generic_rl_get_resource/bus_generic_rl_set_resource
644 * Provides pointer to resource_list for these routines
645 */
646 static struct resource_list *
apb_get_resource_list(device_t dev,device_t child)647 apb_get_resource_list(device_t dev, device_t child)
648 {
649 struct apb_ivar *ivar;
650
651 ivar = device_get_ivars(child);
652 return (&(ivar->resources));
653 }
654
655 #ifdef INTRNG
656 static void
apb_pic_enable_intr(device_t dev,struct intr_irqsrc * isrc)657 apb_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
658 {
659 u_int irq;
660
661 irq = ((struct apb_pic_irqsrc *)isrc)->irq;
662 apb_unmask_irq((void*)irq);
663 }
664
665 static void
apb_pic_disable_intr(device_t dev,struct intr_irqsrc * isrc)666 apb_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
667 {
668 u_int irq;
669
670 irq = ((struct apb_pic_irqsrc *)isrc)->irq;
671 apb_mask_irq((void*)irq);
672 }
673
674 static void
apb_pic_pre_ithread(device_t dev,struct intr_irqsrc * isrc)675 apb_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
676 {
677 apb_pic_disable_intr(dev, isrc);
678 }
679
680 static void
apb_pic_post_ithread(device_t dev,struct intr_irqsrc * isrc)681 apb_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
682 {
683 apb_pic_enable_intr(dev, isrc);
684 }
685
686 static void
apb_pic_post_filter(device_t dev,struct intr_irqsrc * isrc)687 apb_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
688 {
689 uint32_t reg, irq;
690
691 irq = ((struct apb_pic_irqsrc *)isrc)->irq;
692 if(ar531x_soc >= AR531X_SOC_AR5315) {
693 reg = ATH_READ_REG(AR5315_SYSREG_BASE +
694 AR5315_SYSREG_MISC_INTSTAT);
695 ATH_WRITE_REG(AR5315_SYSREG_BASE + AR5315_SYSREG_MISC_INTSTAT,
696 reg & ~(1 << irq));
697 } else {
698 reg = ATH_READ_REG(AR5312_SYSREG_BASE +
699 AR5312_SYSREG_MISC_INTSTAT);
700 ATH_WRITE_REG(AR5312_SYSREG_BASE + AR5312_SYSREG_MISC_INTSTAT,
701 reg & ~(1 << irq));
702 }
703 }
704
705 static int
apb_pic_map_intr(device_t dev,struct intr_map_data * data,struct intr_irqsrc ** isrcp)706 apb_pic_map_intr(device_t dev, struct intr_map_data *data,
707 struct intr_irqsrc **isrcp)
708 {
709 return (ENOTSUP);
710 }
711
712 #endif
713
714 static device_method_t apb_methods[] = {
715 DEVMETHOD(bus_activate_resource, apb_activate_resource),
716 DEVMETHOD(bus_add_child, apb_add_child),
717 DEVMETHOD(bus_alloc_resource, apb_alloc_resource),
718 DEVMETHOD(bus_deactivate_resource, apb_deactivate_resource),
719 DEVMETHOD(bus_get_resource_list, apb_get_resource_list),
720 DEVMETHOD(bus_hinted_child, apb_hinted_child),
721 DEVMETHOD(bus_release_resource, apb_release_resource),
722 DEVMETHOD(device_attach, apb_attach),
723 DEVMETHOD(device_probe, apb_probe),
724 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
725 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
726 #ifdef INTRNG
727 DEVMETHOD(pic_disable_intr, apb_pic_disable_intr),
728 DEVMETHOD(pic_enable_intr, apb_pic_enable_intr),
729 DEVMETHOD(pic_map_intr, apb_pic_map_intr),
730 DEVMETHOD(pic_post_filter, apb_pic_post_filter),
731 DEVMETHOD(pic_post_ithread, apb_pic_post_ithread),
732 DEVMETHOD(pic_pre_ithread, apb_pic_pre_ithread),
733
734 // DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
735 #else
736 DEVMETHOD(bus_teardown_intr, apb_teardown_intr),
737 #endif
738 DEVMETHOD(bus_setup_intr, apb_setup_intr),
739
740 DEVMETHOD_END
741 };
742
743 static driver_t apb_driver = {
744 "apb",
745 apb_methods,
746 sizeof(struct apb_softc),
747 };
748 static devclass_t apb_devclass;
749
750 EARLY_DRIVER_MODULE(apb, nexus, apb_driver, apb_devclass, 0, 0,
751 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
752