1 /* $NetBSD: qcomgpioreg.h,v 1.3 2024/12/17 22:05:11 riastradh Exp $ */
2 /*
3  * Copyright (c) 2022 Mark Kettenis <kettenis@openbsd.org>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  */
17 
18 #ifndef QCOMGPIOREG_H
19 #define QCOMGPIOREG_H
20 
21 #include <sys/cdefs.h>
22 
23 #define _TLMM_GPIO_PIN_OFFSET(pin, reg) ((pin) * 0x1000 + (reg))
24 
25 #define TLMM_GPIO_CTL(pin)              _TLMM_GPIO_PIN_OFFSET(pin, 0x0)
26 #define  TLMM_GPIO_CTL_OE                         __BIT(9)
27 #define  TLMM_GPIO_CTL_MUX                        __BITS(5,2)
28 #define   TLMM_GPIO_CTL_MUX_GPIO                            0
29 
30 #define TLMM_GPIO_IN_OUT(pin)           _TLMM_GPIO_PIN_OFFSET(pin, 0x4)
31 #define  TLMM_GPIO_IN_OUT_GPIO_IN                 __BIT(0)
32 #define  TLMM_GPIO_IN_OUT_GPIO_OUT                __BIT(1)
33 
34 #define TLMM_GPIO_INTR_CFG(pin)                   _TLMM_GPIO_PIN_OFFSET(pin, 0x8)
35 #define  TLMM_GPIO_INTR_CFG_TARGET_PROC_MASK      __BITS(7,5)
36 #define   TLMM_GPIO_INTR_CFG_TARGET_PROC_RPM                3
37 #define  TLMM_GPIO_INTR_CFG_INTR_RAW_STATUS_EN    __BIT(4)
38 #define  TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_MASK    __BITS(3,2)
39 #define   TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_LEVEL  0
40 #define   TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_EDGE_POS         1
41 #define   TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_EDGE_NEG         2
42 #define   TLMM_GPIO_INTR_CFG_INTR_DECT_CTL_EDGE_BOTH        3
43 #define  TLMM_GPIO_INTR_CFG_INTR_POL_CTL          __BIT(1)
44 #define  TLMM_GPIO_INTR_CFG_INTR_ENABLE           __BIT(0)
45 
46 #define TLMM_GPIO_INTR_STATUS(pin)      _TLMM_GPIO_PIN_OFFSET(pin, 0xc)
47 #define  TLMM_GPIO_INTR_STATUS_INTR_STATUS        __BIT(0)
48 
49 #endif /* !QCOMGPIOREG_H */
50