From midnightbsd-cvs at midnightbsd.org Tue May 24 10:51:26 2016 From: midnightbsd-cvs at midnightbsd.org (midnightbsd-cvs at midnightbsd.org) Date: 24 May 2016 17:51:26 +0300 Subject: [Midnightbsd-cvs] hot g!rl want you! Message-ID: <978867192.201605241826@midnightbsd.org> are u available? i'm looking for a quickie tonight... i'm 22/f with a very tight pu$$y and a$$ my username is Viktoria83 my profile is HERE i'm waiting for u From laffer1 at midnightbsd.org Wed May 25 20:01:06 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:01:06 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21440] trunk/sysutils/p5-Unix-Processors: update to 2.044 Message-ID: <201605260001.u4Q016it060046@stargazer.midnightbsd.org> Revision: 21440 http://svnweb.midnightbsd.org/mports/?rev=21440 Author: laffer1 Date: 2016-05-25 20:01:06 -0400 (Wed, 25 May 2016) Log Message: ----------- update to 2.044 Modified Paths: -------------- trunk/sysutils/p5-Unix-Processors/Makefile trunk/sysutils/p5-Unix-Processors/distinfo trunk/sysutils/p5-Unix-Processors/pkg-plist Modified: trunk/sysutils/p5-Unix-Processors/Makefile =================================================================== --- trunk/sysutils/p5-Unix-Processors/Makefile 2016-05-23 02:01:56 UTC (rev 21439) +++ trunk/sysutils/p5-Unix-Processors/Makefile 2016-05-26 00:01:06 UTC (rev 21440) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= Unix-Processors -PORTVERSION= 2.043 +PORTVERSION= 2.044 CATEGORIES= sysutils perl5 MASTER_SITES= CPAN PKGNAMEPREFIX= p5- Modified: trunk/sysutils/p5-Unix-Processors/distinfo =================================================================== --- trunk/sysutils/p5-Unix-Processors/distinfo 2016-05-23 02:01:56 UTC (rev 21439) +++ trunk/sysutils/p5-Unix-Processors/distinfo 2016-05-26 00:01:06 UTC (rev 21440) @@ -1,2 +1,2 @@ -SHA256 (Unix-Processors-2.043.tar.gz) = d339ef950881d790ebc1346ba170c3fbb080ebe7b4150a3591e77975c438cc5f -SIZE (Unix-Processors-2.043.tar.gz) = 14942 +SHA256 (Unix-Processors-2.044.tar.gz) = 70091544f7e4eccf2ff2e34d16bfab2a9f8e3284a8567656df320258d07d5765 +SIZE (Unix-Processors-2.044.tar.gz) = 14467 Modified: trunk/sysutils/p5-Unix-Processors/pkg-plist =================================================================== --- trunk/sysutils/p5-Unix-Processors/pkg-plist 2016-05-23 02:01:56 UTC (rev 21439) +++ trunk/sysutils/p5-Unix-Processors/pkg-plist 2016-05-26 00:01:06 UTC (rev 21440) @@ -1,10 +1,5 @@ -%%SITE_PERL%%/%%PERL_ARCH%%/auto/Unix/Processors/.packlist -%%SITE_PERL%%/%%PERL_ARCH%%/Unix/Processors.pm -%%SITE_PERL%%/%%PERL_ARCH%%/Unix/Processors/Info.pm -%%SITE_PERL%%/%%PERL_ARCH%%/auto/Unix/Processors/Processors.so +%%SITE_ARCH%%/Unix/Processors.pm +%%SITE_ARCH%%/Unix/Processors/Info.pm +%%SITE_ARCH%%/auto/Unix/Processors/Processors.so %%PERL5_MAN3%%/Unix::Processors.3.gz %%PERL5_MAN3%%/Unix::Processors::Info.3.gz - at dirrm %%SITE_PERL%%/%%PERL_ARCH%%/Unix/Processors - at dirrm %%SITE_PERL%%/%%PERL_ARCH%%/auto/Unix/Processors - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/Unix - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/auto/Unix From laffer1 at midnightbsd.org Wed May 25 20:02:17 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:02:17 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21441] trunk/sysutils/p5-Sys-Hostname-Long: 1.5 Message-ID: <201605260002.u4Q02HGt060181@stargazer.midnightbsd.org> Revision: 21441 http://svnweb.midnightbsd.org/mports/?rev=21441 Author: laffer1 Date: 2016-05-25 20:02:17 -0400 (Wed, 25 May 2016) Log Message: ----------- 1.5 Modified Paths: -------------- trunk/sysutils/p5-Sys-Hostname-Long/Makefile trunk/sysutils/p5-Sys-Hostname-Long/distinfo trunk/sysutils/p5-Sys-Hostname-Long/pkg-descr trunk/sysutils/p5-Sys-Hostname-Long/pkg-plist Modified: trunk/sysutils/p5-Sys-Hostname-Long/Makefile =================================================================== --- trunk/sysutils/p5-Sys-Hostname-Long/Makefile 2016-05-26 00:01:06 UTC (rev 21440) +++ trunk/sysutils/p5-Sys-Hostname-Long/Makefile 2016-05-26 00:02:17 UTC (rev 21441) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= Sys-Hostname-Long -PORTVERSION= 1.4 +PORTVERSION= 1.5 CATEGORIES= sysutils perl5 MASTER_SITES= CPAN PKGNAMEPREFIX= p5- @@ -8,10 +8,9 @@ MAINTAINER= ports at MidnightBSD.org COMMENT= Try every conceivable way to get full hostname + LICENSE= perl PERL_CONFIGURE= yes -MAN3= Sys::Hostname::Long.3 - .include Modified: trunk/sysutils/p5-Sys-Hostname-Long/distinfo =================================================================== --- trunk/sysutils/p5-Sys-Hostname-Long/distinfo 2016-05-26 00:01:06 UTC (rev 21440) +++ trunk/sysutils/p5-Sys-Hostname-Long/distinfo 2016-05-26 00:02:17 UTC (rev 21441) @@ -1,2 +1,2 @@ -SHA256 (Sys-Hostname-Long-1.4.tar.gz) = 9db6c8cd3ca0ba8dbf19969ed0a936cecb7f555c1cc8077b08cf8bf78b10c143 -SIZE (Sys-Hostname-Long-1.4.tar.gz) = 4991 +SHA256 (Sys-Hostname-Long-1.5.tar.gz) = e9186df3706a877efd6149f2c711d6cf87dd6cf72f6ab935ba8121b225b265cb +SIZE (Sys-Hostname-Long-1.5.tar.gz) = 5474 Modified: trunk/sysutils/p5-Sys-Hostname-Long/pkg-descr =================================================================== --- trunk/sysutils/p5-Sys-Hostname-Long/pkg-descr 2016-05-26 00:01:06 UTC (rev 21440) +++ trunk/sysutils/p5-Sys-Hostname-Long/pkg-descr 2016-05-26 00:02:17 UTC (rev 21441) @@ -1,5 +1,5 @@ How to get the host full name in perl on multiple operating systems -(mac, windows, unix* etc) +(OS X, Windows, Unix* etc) Attempt via many methods to get the systems full name. The Sys::Hostname class is the best and standard way to get the system hostname. Modified: trunk/sysutils/p5-Sys-Hostname-Long/pkg-plist =================================================================== --- trunk/sysutils/p5-Sys-Hostname-Long/pkg-plist 2016-05-26 00:01:06 UTC (rev 21440) +++ trunk/sysutils/p5-Sys-Hostname-Long/pkg-plist 2016-05-26 00:02:17 UTC (rev 21441) @@ -1,7 +1,3 @@ %%SITE_PERL%%/Sys/Hostname/Long.pm %%SITE_PERL%%/Sys/Hostname/testall.pl - at dirrm %%SITE_PERL%%/%%PERL_ARCH%%/auto/Sys/Hostname/Long - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/auto/Sys/Hostname - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/auto/Sys - at dirrmtry %%SITE_PERL%%/Sys/Hostname - at dirrmtry %%SITE_PERL%%/Sys +%%PERL5_MAN3%%/Sys::Hostname::Long.3.gz From laffer1 at midnightbsd.org Wed May 25 20:03:07 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:03:07 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21442] trunk/sysutils/p5-File-Which: 1.21 Message-ID: <201605260003.u4Q037EB060287@stargazer.midnightbsd.org> Revision: 21442 http://svnweb.midnightbsd.org/mports/?rev=21442 Author: laffer1 Date: 2016-05-25 20:03:06 -0400 (Wed, 25 May 2016) Log Message: ----------- 1.21 Modified Paths: -------------- trunk/sysutils/p5-File-Which/Makefile trunk/sysutils/p5-File-Which/distinfo trunk/sysutils/p5-File-Which/pkg-plist Modified: trunk/sysutils/p5-File-Which/Makefile =================================================================== --- trunk/sysutils/p5-File-Which/Makefile 2016-05-26 00:02:17 UTC (rev 21441) +++ trunk/sysutils/p5-File-Which/Makefile 2016-05-26 00:03:06 UTC (rev 21442) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= File-Which -PORTVERSION= 1.09 +PORTVERSION= 1.21 CATEGORIES= sysutils perl5 MASTER_SITES= CPAN PKGNAMEPREFIX= p5- @@ -13,7 +13,4 @@ PERL_CONFIGURE= yes -MAN1= pwhich.1 -MAN3= File::Which.3 - .include Modified: trunk/sysutils/p5-File-Which/distinfo =================================================================== --- trunk/sysutils/p5-File-Which/distinfo 2016-05-26 00:02:17 UTC (rev 21441) +++ trunk/sysutils/p5-File-Which/distinfo 2016-05-26 00:03:06 UTC (rev 21442) @@ -1,2 +1,2 @@ -SHA256 (File-Which-1.09.tar.gz) = b72fec6590160737cba97293c094962adf4f7d44d9e68dde7062ecec13f4b2c3 -SIZE (File-Which-1.09.tar.gz) = 15637 +SHA256 (File-Which-1.21.tar.gz) = 9def5f10316bfd944e56b7f8a2501be1d44c288325309462aa9345e340854bcc +SIZE (File-Which-1.21.tar.gz) = 21456 Modified: trunk/sysutils/p5-File-Which/pkg-plist =================================================================== --- trunk/sysutils/p5-File-Which/pkg-plist 2016-05-26 00:02:17 UTC (rev 21441) +++ trunk/sysutils/p5-File-Which/pkg-plist 2016-05-26 00:03:06 UTC (rev 21442) @@ -1,5 +1,2 @@ -bin/pwhich %%SITE_PERL%%/File/Which.pm - at dirrm %%SITE_PERL%%/%%PERL_ARCH%%/auto/File/Which - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/auto/File - at dirrmtry %%SITE_PERL%%/File +%%PERL5_MAN3%%/File::Which.3.gz From laffer1 at midnightbsd.org Wed May 25 20:05:51 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:05:51 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21443] trunk/sysutils/synergy: 1.7.5 Message-ID: <201605260005.u4Q05pPC060835@stargazer.midnightbsd.org> Revision: 21443 http://svnweb.midnightbsd.org/mports/?rev=21443 Author: laffer1 Date: 2016-05-25 20:05:51 -0400 (Wed, 25 May 2016) Log Message: ----------- 1.7.5 Modified Paths: -------------- trunk/sysutils/synergy/Makefile trunk/sysutils/synergy/distinfo trunk/sysutils/synergy/files/patch-CMakeLists.txt Modified: trunk/sysutils/synergy/Makefile =================================================================== --- trunk/sysutils/synergy/Makefile 2016-05-26 00:03:06 UTC (rev 21442) +++ trunk/sysutils/synergy/Makefile 2016-05-26 00:05:51 UTC (rev 21443) @@ -2,7 +2,7 @@ # $FreeBSD: ports/sysutils/synergy/Makefile,v 1.14 2007/07/25 01:25:03 kevlo Exp $ PORTNAME= synergy -PORTVERSION= 1.7.4 +PORTVERSION= 1.7.5 CATEGORIES= sysutils MAINTAINER= ports at MidnightBSD.org Modified: trunk/sysutils/synergy/distinfo =================================================================== --- trunk/sysutils/synergy/distinfo 2016-05-26 00:03:06 UTC (rev 21442) +++ trunk/sysutils/synergy/distinfo 2016-05-26 00:05:51 UTC (rev 21443) @@ -1,2 +1,2 @@ -SHA256 (synergy-v1.7.4-stable_GH0.tar.gz) = 215dc3918b9f3ddfb57cc963f8df6751e5e834fd90c0a8b2767091589b012bdf -SIZE (synergy-v1.7.4-stable_GH0.tar.gz) = 13665193 +SHA256 (synergy-v1.7.5-stable_GH0.tar.gz) = b50c79f5c8aca2048cb0e11ba37f75722d1acdda23b0352e25ad66aff999f192 +SIZE (synergy-v1.7.5-stable_GH0.tar.gz) = 13668296 Modified: trunk/sysutils/synergy/files/patch-CMakeLists.txt =================================================================== --- trunk/sysutils/synergy/files/patch-CMakeLists.txt 2016-05-26 00:03:06 UTC (rev 21442) +++ trunk/sysutils/synergy/files/patch-CMakeLists.txt 2016-05-26 00:05:51 UTC (rev 21443) @@ -1,12 +1,12 @@ ---- CMakeLists.txt.orig 2015-05-26 23:56:21.000000000 +0800 -+++ CMakeLists.txt 2015-08-03 14:02:26.524577000 +0800 -@@ -74,10 +74,6 @@ +--- CMakeLists.txt.orig 2016-01-11 08:43:40.989031000 -0800 ++++ CMakeLists.txt 2016-01-11 08:44:16.000036000 -0800 +@@ -75,10 +75,6 @@ # Depending on the platform, pass in the required defines. if (UNIX) - # warnings as errors: - # we have a problem with people checking in code with warnings. -- set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Werror") +- set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Werror -Wno-unused-local-typedef") - if (NOT APPLE) set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fPIC") From laffer1 at midnightbsd.org Wed May 25 20:08:17 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:08:17 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21444] trunk/dns/bind99: bind 9.9.8P4 Message-ID: <201605260008.u4Q08Hs9061008@stargazer.midnightbsd.org> Revision: 21444 http://svnweb.midnightbsd.org/mports/?rev=21444 Author: laffer1 Date: 2016-05-25 20:08:17 -0400 (Wed, 25 May 2016) Log Message: ----------- bind 9.9.8P4 Modified Paths: -------------- trunk/dns/bind99/Makefile trunk/dns/bind99/distinfo Modified: trunk/dns/bind99/Makefile =================================================================== --- trunk/dns/bind99/Makefile 2016-05-26 00:05:51 UTC (rev 21443) +++ trunk/dns/bind99/Makefile 2016-05-26 00:08:17 UTC (rev 21444) @@ -3,7 +3,7 @@ PORTNAME= bind PORTVERSION= ${ISCVERSION:S/-P/P/} -PORTREVISION= 4 +PORTREVISION= 5 CATEGORIES= dns net ipv6 MASTER_SITES= ISC/bind9/${ISCVERSION} PKGNAMESUFFIX= 99 @@ -15,7 +15,7 @@ LICENSE= iscl # ISC releases things like 9.8.0-P1, which our versioning doesn't like -ISCVERSION= 9.9.8-P3 +ISCVERSION= 9.9.8-P4 MAKE_JOBS_UNSAFE= yes Modified: trunk/dns/bind99/distinfo =================================================================== --- trunk/dns/bind99/distinfo 2016-05-26 00:05:51 UTC (rev 21443) +++ trunk/dns/bind99/distinfo 2016-05-26 00:08:17 UTC (rev 21444) @@ -1,2 +1,4 @@ -SHA256 (bind-9.9.8-P3.tar.gz) = 6a489f98dffaf31cfd8b572aa5cc345e8d775758488a4541f2f0c974c8090a07 -SIZE (bind-9.9.8-P3.tar.gz) = 7998476 +SHA256 (bind-9.9.8-P4.tar.gz) = 5ed0b852e4d1dc90e10751c7fa70a9ee29a619bad61d97250eac8161009d89f2 +SIZE (bind-9.9.8-P4.tar.gz) = 7999697 +SHA256 (9.9.8-P4-rpz2+rl.14038.05.patch.xz) = 5415559171c03a9a02e31284552a4888911eeb692d57def8d631b7d0564dc5f0 +SIZE (9.9.8-P4-rpz2+rl.14038.05.patch.xz) = 39240 From laffer1 at midnightbsd.org Wed May 25 20:11:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:11:00 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21445] trunk/dns/bind910: bind 9.10.3 p4 Message-ID: <201605260011.u4Q0B0Bt061535@stargazer.midnightbsd.org> Revision: 21445 http://svnweb.midnightbsd.org/mports/?rev=21445 Author: laffer1 Date: 2016-05-25 20:11:00 -0400 (Wed, 25 May 2016) Log Message: ----------- bind 9.10.3 p4 Modified Paths: -------------- trunk/dns/bind910/Makefile trunk/dns/bind910/distinfo Modified: trunk/dns/bind910/Makefile =================================================================== --- trunk/dns/bind910/Makefile 2016-05-26 00:08:17 UTC (rev 21444) +++ trunk/dns/bind910/Makefile 2016-05-26 00:11:00 UTC (rev 21445) @@ -5,10 +5,10 @@ PORTVERSION= ${ISCVERSION:S/-P/P/} .if defined(BIND_TOOLS_SLAVE) # dns/bind-tools here -PORTREVISION= 1 +PORTREVISION= 2 .else # dns/bind910 here -PORTREVISION= 2 +PORTREVISION= 3 .endif CATEGORIES= dns net ipv6 MASTER_SITES= ISC/bind9/${ISCVERSION} @@ -29,7 +29,7 @@ LICENSE= iscl # ISC releases things like 9.8.0-P1, which our versioning doesn't like -ISCVERSION= 9.10.3-P3 +ISCVERSION= 9.10.3-P4 MAKE_JOBS_UNSAFE= yes Modified: trunk/dns/bind910/distinfo =================================================================== --- trunk/dns/bind910/distinfo 2016-05-26 00:08:17 UTC (rev 21444) +++ trunk/dns/bind910/distinfo 2016-05-26 00:11:00 UTC (rev 21445) @@ -1,2 +1,2 @@ -SHA256 (bind-9.10.3-P3.tar.gz) = 690810d1fbb72afa629e74638d19cd44e28d2b2e5eb63f55c705ad85d1a4cb83 -SIZE (bind-9.10.3-P3.tar.gz) = 8527540 +SHA256 (bind-9.10.3-P4.tar.gz) = 2ac044b5fbdf45fb45107af0df961b3b7cb5262a3bf1948ed3fe7a170dd13e3e +SIZE (bind-9.10.3-P4.tar.gz) = 8529535 From laffer1 at midnightbsd.org Wed May 25 20:12:17 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:12:17 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21446] trunk/dns/bindgraph: bindgraph 0.3 Message-ID: <201605260012.u4Q0CHoW061641@stargazer.midnightbsd.org> Revision: 21446 http://svnweb.midnightbsd.org/mports/?rev=21446 Author: laffer1 Date: 2016-05-25 20:12:16 -0400 (Wed, 25 May 2016) Log Message: ----------- bindgraph 0.3 Modified Paths: -------------- trunk/dns/bindgraph/Makefile trunk/dns/bindgraph/distinfo Modified: trunk/dns/bindgraph/Makefile =================================================================== --- trunk/dns/bindgraph/Makefile 2016-05-26 00:11:00 UTC (rev 21445) +++ trunk/dns/bindgraph/Makefile 2016-05-26 00:12:16 UTC (rev 21446) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= bindgraph -PORTVERSION= 0.2 +PORTVERSION= 0.3 PORTREVISION= 0 CATEGORIES= dns MASTER_SITES= http://www.linux.it/~md/software/ Modified: trunk/dns/bindgraph/distinfo =================================================================== --- trunk/dns/bindgraph/distinfo 2016-05-26 00:11:00 UTC (rev 21445) +++ trunk/dns/bindgraph/distinfo 2016-05-26 00:12:16 UTC (rev 21446) @@ -1,2 +1,2 @@ -SHA256 (bindgraph-0.2.tgz) = 680ca9a73a9c06e3c4281f52eb7af95871d69f909642ca490d2da437c522bff6 -SIZE (bindgraph-0.2.tgz) = 15808 +SHA256 (bindgraph-0.3.tgz) = 9aa7052da09cb242f107b0bfba09c4b62d337a29a1c9078aae6350efe90ef1fc +SIZE (bindgraph-0.3.tgz) = 16106 From laffer1 at midnightbsd.org Wed May 25 20:14:39 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:14:39 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21447] trunk/dns/mDNSResponder_nss: mDNS responder 576.30.4 Message-ID: <201605260014.u4Q0Ed5A061768@stargazer.midnightbsd.org> Revision: 21447 http://svnweb.midnightbsd.org/mports/?rev=21447 Author: laffer1 Date: 2016-05-25 20:14:39 -0400 (Wed, 25 May 2016) Log Message: ----------- mDNS responder 576.30.4 Modified Paths: -------------- trunk/dns/mDNSResponder_nss/Makefile trunk/dns/mDNSResponder_nss/distinfo trunk/dns/mDNSResponder_nss/files/patch-mDNSPosix__nss_mdns.c Modified: trunk/dns/mDNSResponder_nss/Makefile =================================================================== --- trunk/dns/mDNSResponder_nss/Makefile 2016-05-26 00:12:16 UTC (rev 21446) +++ trunk/dns/mDNSResponder_nss/Makefile 2016-05-26 00:14:39 UTC (rev 21447) @@ -1,10 +1,10 @@ # $MidnightBSD$ -PORTNAME= mDNSResponder_nss -PORTVERSION= 567 +PORTNAME= mDNSResponder +PORTVERSION= 576.30.4 CATEGORIES= dns net MASTER_SITES= http://opensource.apple.com/tarballs/mDNSResponder/ -DISTNAME= ${PORTNAME:S/_nss//}-${PORTVERSION} +PKGNAMESUFFIX= _nss MAINTAINER= ports at MidnightBSD.org COMMENT= Apple mDNS responder - BSD nsswitch module Modified: trunk/dns/mDNSResponder_nss/distinfo =================================================================== --- trunk/dns/mDNSResponder_nss/distinfo 2016-05-26 00:12:16 UTC (rev 21446) +++ trunk/dns/mDNSResponder_nss/distinfo 2016-05-26 00:14:39 UTC (rev 21447) @@ -1,2 +1,2 @@ -SHA256 (mDNSResponder-567.tar.gz) = 3239d9bb1e1e017be1ae12cff90802194b6e0312de628a1f324530b00b833018 -SIZE (mDNSResponder-567.tar.gz) = 2143110 +SHA256 (mDNSResponder-576.30.4.tar.gz) = 4737cb51378377e11d0edb7bcdd1bec79cbdaa7b27ea09c13e3006e58f8d92c0 +SIZE (mDNSResponder-576.30.4.tar.gz) = 2157791 Modified: trunk/dns/mDNSResponder_nss/files/patch-mDNSPosix__nss_mdns.c =================================================================== --- trunk/dns/mDNSResponder_nss/files/patch-mDNSPosix__nss_mdns.c 2016-05-26 00:12:16 UTC (rev 21446) +++ trunk/dns/mDNSResponder_nss/files/patch-mDNSPosix__nss_mdns.c 2016-05-26 00:14:39 UTC (rev 21447) @@ -1,6 +1,6 @@ ---- ./mDNSPosix/nss_mdns.c.orig 2012-04-15 08:07:19.000000000 +0200 -+++ ./mDNSPosix/nss_mdns.c 2013-11-05 11:00:14.000000000 +0100 -@@ -379,7 +379,18 @@ +--- mDNSPosix/nss_mdns.c.orig 2012-04-15 06:07:19 UTC ++++ mDNSPosix/nss_mdns.c +@@ -379,7 +379,18 @@ init_config (); #define ENTNAME hostent #define DATABASE "hosts" @@ -20,7 +20,7 @@ // For nss_status #include // For hostent -@@ -1684,7 +1695,7 @@ +@@ -1684,7 +1695,7 @@ is_applicable_addr ( //---------- // Types and Constants From laffer1 at midnightbsd.org Wed May 25 20:17:34 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:17:34 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21448] trunk/dns/p5-Net-DNS: perl Net::DNS 1.05 Message-ID: <201605260017.u4Q0HYGw062285@stargazer.midnightbsd.org> Revision: 21448 http://svnweb.midnightbsd.org/mports/?rev=21448 Author: laffer1 Date: 2016-05-25 20:17:34 -0400 (Wed, 25 May 2016) Log Message: ----------- perl Net::DNS 1.05 Modified Paths: -------------- trunk/dns/p5-Net-DNS/Makefile trunk/dns/p5-Net-DNS/distinfo trunk/dns/p5-Net-DNS/pkg-plist Modified: trunk/dns/p5-Net-DNS/Makefile =================================================================== --- trunk/dns/p5-Net-DNS/Makefile 2016-05-26 00:14:39 UTC (rev 21447) +++ trunk/dns/p5-Net-DNS/Makefile 2016-05-26 00:17:34 UTC (rev 21448) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= Net-DNS -PORTVERSION= 1.01 +PORTVERSION= 1.05 CATEGORIES= dns net perl5 ipv6 MASTER_SITES= CPAN PKGNAMEPREFIX= p5- @@ -11,8 +11,7 @@ LICENSE= mit -BUILD_DEPENDS= p5-Digest-HMAC>=1.03:${PORTSDIR}/security/p5-Digest-HMAC \ - p5-MIME-Base32>=1.01:${PORTSDIR}/converters/p5-MIME-Base32 +BUILD_DEPENDS= p5-Digest-HMAC>=1.03:${PORTSDIR}/security/p5-Digest-HMAC RUN_DEPENDS:= ${BUILD_DEPENDS} TEST_DEPENDS= p5-Digest-BubbleBabble>=0:${PORTSDIR}/security/p5-Digest-BubbleBabble \ p5-Test-Pod>=0:${PORTSDIR}/devel/p5-Test-Pod @@ -31,9 +30,14 @@ GOST_RUN_DEPENDS= p5-Digest-GOST>=0.06:${PORTSDIR}/security/p5-Digest-GOST IDN_BUILD_DEPENDS= p5-Net-LibIDN>=0.12:${PORTSDIR}/dns/p5-Net-LibIDN IDN_RUN_DEPENDS= p5-Net-LibIDN>=0.12:${PORTSDIR}/dns/p5-Net-LibIDN -IPV6_BUILD_DEPENDS= p5-IO-Socket-INET6>=2.01:${PORTSDIR}/net/p5-IO-Socket-INET6 -IPV6_RUN_DEPENDS= p5-IO-Socket-INET6>=2.01:${PORTSDIR}/net/p5-IO-Socket-INET6 SSHFP_BUILD_DEPENDS= p5-Digest-BubbleBabble>=0.01:${PORTSDIR}/security/p5-Digest-BubbleBabble SSHFP_RUN_DEPENDS= p5-Digest-BubbleBabble>=0.01:${PORTSDIR}/security/p5-Digest-BubbleBabble -.include +.include + +.if ${PORT_OPTIONS:MIPV6} && ${PERL_LEVEL} < 502200 +BUILD_DEPENDS+= p5-IO-Socket-IP>=0.32:${PORTSDIR}/net/p5-IO-Socket-IP +RUN_DEPENDS+= p5-IO-Socket-IP>=0.32:${PORTSDIR}/net/p5-IO-Socket-IP +.endif + +.include Modified: trunk/dns/p5-Net-DNS/distinfo =================================================================== --- trunk/dns/p5-Net-DNS/distinfo 2016-05-26 00:14:39 UTC (rev 21447) +++ trunk/dns/p5-Net-DNS/distinfo 2016-05-26 00:17:34 UTC (rev 21448) @@ -1,2 +1,2 @@ -SHA256 (Net-DNS-1.01.tar.gz) = 8f96b80d46764993dbad92e22cf5fc869ecdc1d09018f2565440d528afd9d92a -SIZE (Net-DNS-1.01.tar.gz) = 239297 +SHA256 (Net-DNS-1.05.tar.gz) = 900198014110af96ebac34af019612dd2ddd6af30178600028c3c940d089d5c8 +SIZE (Net-DNS-1.05.tar.gz) = 253015 Modified: trunk/dns/p5-Net-DNS/pkg-plist =================================================================== --- trunk/dns/p5-Net-DNS/pkg-plist 2016-05-26 00:14:39 UTC (rev 21447) +++ trunk/dns/p5-Net-DNS/pkg-plist 2016-05-26 00:17:34 UTC (rev 21448) @@ -57,6 +57,7 @@ %%SITE_PERL%%/Net/DNS/RR/RRSIG.pm %%SITE_PERL%%/Net/DNS/RR/RT.pm %%SITE_PERL%%/Net/DNS/RR/SIG.pm +%%SITE_PERL%%/Net/DNS/RR/SMIMEA.pm %%SITE_PERL%%/Net/DNS/RR/SOA.pm %%SITE_PERL%%/Net/DNS/RR/SPF.pm %%SITE_PERL%%/Net/DNS/RR/SRV.pm @@ -137,6 +138,7 @@ %%PERL5_MAN3%%/Net::DNS::RR::RRSIG.3.gz %%PERL5_MAN3%%/Net::DNS::RR::RT.3.gz %%PERL5_MAN3%%/Net::DNS::RR::SIG.3.gz +%%PERL5_MAN3%%/Net::DNS::RR::SMIMEA.3.gz %%PERL5_MAN3%%/Net::DNS::RR::SOA.3.gz %%PERL5_MAN3%%/Net::DNS::RR::SPF.3.gz %%PERL5_MAN3%%/Net::DNS::RR::SRV.3.gz From laffer1 at midnightbsd.org Wed May 25 20:46:42 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:46:42 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21449] trunk/dns/unbound: unbound 1.5.8 Message-ID: <201605260046.u4Q0kgVV065320@stargazer.midnightbsd.org> Revision: 21449 http://svnweb.midnightbsd.org/mports/?rev=21449 Author: laffer1 Date: 2016-05-25 20:46:41 -0400 (Wed, 25 May 2016) Log Message: ----------- unbound 1.5.8 Modified Paths: -------------- trunk/dns/unbound/Makefile trunk/dns/unbound/distinfo trunk/dns/unbound/pkg-plist Modified: trunk/dns/unbound/Makefile =================================================================== --- trunk/dns/unbound/Makefile 2016-05-26 00:17:34 UTC (rev 21448) +++ trunk/dns/unbound/Makefile 2016-05-26 00:46:41 UTC (rev 21449) @@ -1,8 +1,8 @@ # $MidnightBSD$ PORTNAME= unbound -PORTVERSION= 1.5.3 -PORTREVISION= 1 +PORTVERSION= 1.5.8 +PORTREVISION= 0 CATEGORIES= dns MASTER_SITES= http://unbound.net/downloads/ @@ -29,13 +29,14 @@ ietf67-design-02.pdf requirements.txt PLIST_SUB+= PYTHON=${PYTHON} MUNIN=${MUNIN} -OPTIONS_DEFINE= THREADS PYTHON GOST ECDSA MUNIN DOCS LIBEVENT FILTER_AAAA +OPTIONS_SUB= yes +OPTIONS_DEFINE= THREADS PYTHON GOST ECDSA MUNIN_PLUGIN DOCS LIBEVENT FILTER_AAAA OPTIONS_DEFAULT=THREADS ECDSA LIBEVENT_DESC= Build against libevent GOST_DESC= Enable GOST support (requires OpenSSL >= 1.0) ECDSA_DESC= Enable ECDSA (elliptic curve) support (OpenSSL >= 1.0) -MUNIN_DESC= Install Munin plugin +MUNIN_PLUGIN_DESC= Install Munin plugin FILTER_AAAA_DESC= Build with AAAA filter functionality (contrib) .include @@ -71,9 +72,9 @@ CONFIGURE_ARGS+=--disable-ecdsa .endif -.if ${PORT_OPTIONS:MMUNIN} +.if ${PORT_OPTIONS:MMUNIN_PLUGIN} SUB_FILES+= pkg-message -MUNIN_ALL= hits queue memory by_type by_class by_opcode by_rcode \ +MUNIN_PLUGIN_ALL= hits queue memory by_type by_class by_opcode by_rcode \ by_flags histogram MUNIN= .else @@ -111,12 +112,12 @@ .if ${PORT_OPTIONS:MPYTHON} @${STRIP_CMD} ${STAGEDIR}${PYTHON_SITELIBDIR}/_unbound.so .endif -.if ${PORT_OPTIONS:MMUNIN} +.if ${PORT_OPTIONS:MMUNIN_PLUGIN} @${MKDIR} ${STAGEDIR}${PREFIX}/share/munin/plugins @${MKDIR} ${STAGEDIR}${PREFIX}/etc/munin/plugins @${INSTALL_SCRIPT} ${WRKDIR}/unbound-${PORTVERSION}/contrib/unbound_munin_\ ${STAGEDIR}${PREFIX}/share/munin/plugins/ - @for i in ${MUNIN_ALL}; do\ + @for i in ${MUNIN_PLUGIN_ALL}; do\ ${LN} -fs ${PREFIX}/share/munin/plugins/unbound_munin_\ ${STAGEDIR}${PREFIX}/etc/munin/plugins/unbound_munin_$$i ;\ done Modified: trunk/dns/unbound/distinfo =================================================================== --- trunk/dns/unbound/distinfo 2016-05-26 00:17:34 UTC (rev 21448) +++ trunk/dns/unbound/distinfo 2016-05-26 00:46:41 UTC (rev 21449) @@ -1,2 +1,2 @@ -SHA256 (unbound-1.5.3.tar.gz) = 76bdc875ed4d1d3f8e4cfe960e6df78ee5c6c7c18abac11331cf93a7ae129eca -SIZE (unbound-1.5.3.tar.gz) = 4821300 +SHA256 (unbound-1.5.8.tar.gz) = 33567a20f73e288f8daa4ec021fbb30fe1824b346b34f12677ad77899ecd09be +SIZE (unbound-1.5.8.tar.gz) = 4895649 Modified: trunk/dns/unbound/pkg-plist =================================================================== --- trunk/dns/unbound/pkg-plist 2016-05-26 00:17:34 UTC (rev 21448) +++ trunk/dns/unbound/pkg-plist 2016-05-26 00:46:41 UTC (rev 21449) @@ -1,9 +1,21 @@ -etc/unbound/unbound.conf.sample +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_class +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_flags +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_opcode +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_rcode +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_type +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_histogram +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_hits +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_memory +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_queue + at sample %%ETCDIR%%/unbound.conf.sample include/unbound.h -lib/libunbound.so.2.3.6 +lib/libunbound.a +lib/libunbound.so lib/libunbound.so.2 -lib/libunbound.so -lib/libunbound.a +lib/libunbound.so.2.4.0 +%%PYTHON%%%%PYTHON_SITELIBDIR%%/_unbound.so +%%PYTHON%%%%PYTHON_SITELIBDIR%%/unbound.py +%%PYTHON%%%%PYTHON_SITELIBDIR%%/unboundmodule.py man/man1/unbound-host.1.gz man/man3/libunbound.3.gz man/man3/ub_cancel.3.gz @@ -48,17 +60,5 @@ sbin/unbound-control sbin/unbound-control-setup sbin/unbound-host -%%PYTHON%%%%PYTHON_SITELIBDIR%%/_unbound.so -%%PYTHON%%%%PYTHON_SITELIBDIR%%/unbound.py -%%PYTHON%%%%PYTHON_SITELIBDIR%%/unboundmodule.py -%%MUNIN%%etc/munin/plugins/unbound_munin_by_class -%%MUNIN%%etc/munin/plugins/unbound_munin_by_flags -%%MUNIN%%etc/munin/plugins/unbound_munin_by_opcode -%%MUNIN%%etc/munin/plugins/unbound_munin_by_rcode -%%MUNIN%%etc/munin/plugins/unbound_munin_by_type -%%MUNIN%%etc/munin/plugins/unbound_munin_histogram -%%MUNIN%%etc/munin/plugins/unbound_munin_hits -%%MUNIN%%etc/munin/plugins/unbound_munin_memory -%%MUNIN%%etc/munin/plugins/unbound_munin_queue -%%MUNIN%%share/munin/plugins/unbound_munin_ - at exec chown unbound %D/etc/unbound +%%MUNIN_PLUGIN%%share/munin/plugins/unbound_munin_ + at dir(unbound,,) %%ETCDIR%% From laffer1 at midnightbsd.org Wed May 25 20:57:23 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:57:23 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21450] trunk/java/openjdk6/Makefile: bump for cups update Message-ID: <201605260057.u4Q0vNJd066426@stargazer.midnightbsd.org> Revision: 21450 http://svnweb.midnightbsd.org/mports/?rev=21450 Author: laffer1 Date: 2016-05-25 20:57:23 -0400 (Wed, 25 May 2016) Log Message: ----------- bump for cups update Modified Paths: -------------- trunk/java/openjdk6/Makefile Modified: trunk/java/openjdk6/Makefile =================================================================== --- trunk/java/openjdk6/Makefile 2016-05-26 00:46:41 UTC (rev 21449) +++ trunk/java/openjdk6/Makefile 2016-05-26 00:57:23 UTC (rev 21450) @@ -2,12 +2,13 @@ PORTNAME= openjdk6 PORTVERSION= b36 +PORTREVISION= 1 PORTEPOCH= 1 CATEGORIES= java devel MASTER_SITES= APACHE/ant/binaries/:ant \ http://download.java.net/openjdk/jtreg/promoted/4.1/b05/:jtreg \ https://java.net/downloads/openjdk6/ \ - LOCAL/jkim + FREEBSD_LOCAL/jkim DISTNAME= openjdk-6-src-${PORTVERSION}-${OPENJDK_BUILDDATE} DISTFILES= ${ANTFILE}:ant \ ${DISTNAME}${EXTRACT_SUFX} @@ -20,7 +21,7 @@ BUILD_DEPENDS= ${LOCALBASE}/bin/zip:${PORTSDIR}/archivers/zip \ ${LOCALBASE}/bin/unzip:${PORTSDIR}/archivers/unzip \ - ${LOCALBASE}/include/cups/cups.h:${PORTSDIR}/print/cups-client + ${LOCALBASE}/include/cups/cups.h:${PORTSDIR}/print/cups LIB_DEPENDS= libfreetype.so:${PORTSDIR}/print/freetype2 RUN_DEPENDS= javavm:${PORTSDIR}/java/javavmwrapper \ ${LOCALBASE}/share/fonts/dejavu:${PORTSDIR}/x11-fonts/dejavu From laffer1 at midnightbsd.org Wed May 25 21:16:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:16:00 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21451] trunk/math/lapack: fix lapack make Message-ID: <201605260116.u4Q1G0kJ068689@stargazer.midnightbsd.org> Revision: 21451 http://svnweb.midnightbsd.org/mports/?rev=21451 Author: laffer1 Date: 2016-05-25 21:15:59 -0400 (Wed, 25 May 2016) Log Message: ----------- fix lapack make Modified Paths: -------------- trunk/math/lapack/Makefile trunk/math/lapack/distinfo trunk/math/lapack/files/manpages trunk/math/lapack/files/patch-SRC+Makefile trunk/math/lapack/files/patch-TESTING+LIN+Makefile trunk/math/lapack/files/patch-TESTING+Makefile trunk/math/lapack/pkg-plist Modified: trunk/math/lapack/Makefile =================================================================== --- trunk/math/lapack/Makefile 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/Makefile 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,8 +1,8 @@ # $MidnightBSD$ PORTNAME?= lapack -PORTVERSION= 3.4.2 -PORTREVISION= 1 +PORTVERSION= 3.5.0 +PORTREVISION= 0 CATEGORIES= math MASTER_SITES= NL/lapack/ DISTFILES= lapack-${PORTVERSION}.tgz @@ -12,11 +12,12 @@ DIST_SUBDIR= lapack MAINTAINER?= ports at MidnightBSD.org -COMMENT?= A library of Fortran 77 subroutines for linear algebra +COMMENT?= Library of Fortran 77 subroutines for linear algebra + LICENSE= bsd3 +LICENSE_FILE= ${WRKSRC}/LICENSE -USE_GCC= any -USE_FORTRAN= yes +USES= fortran OPTIONS_DEFINE= PROFILE SHARED STATIC OPTIONS_DEFAULT= SHARED STATIC @@ -25,11 +26,10 @@ STATIC_DESC= Build (non-PIC) archives MAKE_ENV= BLASLIB="${BLASLIB}" -MAKE_JOBS_SAFE= yes PLIST_SUB= SVERSION="${SVERSION}" -WRKSRC = ${WRKDIR}/lapack-${PORTVERSION} -WRKSRC_PROFILE = ${WRKSRC}_PROFILE +WRKSRC= ${WRKDIR}/lapack-${PORTVERSION} +WRKSRC_PROFILE= ${WRKSRC}_PROFILE WRKSRC_SHARED= ${WRKSRC}_SHARED WRKSRC_STATIC= ${WRKSRC} @@ -39,30 +39,42 @@ ALL_TARGET= blaslib BLASLIB= ../../libblas.a LIBS= blas -PLIST_SUB+= BLAS="" LAPACK="@comment " XLAPACK="@comment " +PLIST_SUB+= BLAS="" LAPACK="@comment " XLAPACK="@comment " LAPACKE="@comment " SVERSION= 2 TEST_TARGET= blas_testing +.elif defined(LAPACKE_SLAVEPORT) +ALL_TARGET= lapackelib +LAPACKELIB= liblapacke.a +LAPACKETMGLIB= liblapacke_tmg.a +MAKE_ENV+= LAPACKELIB="${LAPACKELIB}" LAPACKETMGLIB="${LAPACKETMGLIB}" +LIB_DEPENDS+= libblas.so:${PORTSDIR}/math/blas \ + liblapack.so:${PORTSDIR}/math/lapack +LIBS= lapacke lapacke_tmg +INCLS= lapacke lapacke_utils lapacke_mangling +PLIST_SUB+= BLAS="@comment " LAPACK="@comment " XLAPACK="@comment " LAPACKE="" +SVERSION= 1 .else ALL_TARGET= lib BLASLIB?= -L${LOCALBASE}/lib -lblas -LIB_DEPENDS+= blas.2:${PORTSDIR}/math/blas +LIB_DEPENDS+= libblas.so:${PORTSDIR}/math/blas LIBS= lapack tmglib SVERSION= 4 TEST_TARGET= lapack_testing .if defined(MAINTAINER_MODE) || defined(PACKAGE_BUILDING) S= ${PYTHON_CMD} -USE_PYTHON_BUILD= yes +USES+= python:build .else S= \# .endif .if defined(XLAPACK_SLAVEPORT) -LIB_DEPENDS+= xblas.0:${PORTSDIR}/math/xblas +LIB_DEPENDS+= libxblas.so:${PORTSDIR}/math/xblas MAKE_ENV+= USEXBLAS=yes XBLASLIB="${XBLASLIB}" P= x -PLIST_SUB+= BLAS="@comment " LAPACK="@comment " XLAPACK="" +PLIST_SUB+= BLAS="@comment " LAPACK="@comment " XLAPACK="" LAPACKE="@comment " XBLASLIB?= -L${LOCALBASE}/lib -lxblas .else -PLIST_SUB+= BLAS="@comment " LAPACK="" XLAPACK="@comment " +PLIST_FILES+= ${MAN3L:S|^|man/man3/|:S|$|.gz|} +PLIST_SUB+= BLAS="@comment " LAPACK="" XLAPACK="@comment " LAPACKE="@comment " .if defined(MAINTAINER_MODE) BUILD_DEPENDS += doxygen:${PORTSDIR}/devel/doxygen MAN_TARGET= build-manpages @@ -79,6 +91,10 @@ FFLAGS_PROFILE?= -pg FFLAGS_SHARED ?= ${PICFLAG} +.if ${PORT_OPTIONS:MPROFILE} +LDFLAGS+= -static +.endif + .if ${PORT_OPTIONS:MPROFILE} && !exists(/usr/lib/libc_p.a) IGNORE= you have chosen WITH_PROFILE, but have not installed the\ base system profiling libraries @@ -102,7 +118,9 @@ s@^(OPTS[[:blank:]]*=)(.*)@\1 $${FFLAGS} $${EXTRAFLAGS}@; \ s@^NOOPT[[:blank:]]*=.*@& $${EXTRAFLAGS}@; \ s@^(LOADOPTS[[:blank:]]*=)(.*)@\1 $${LDFLAGS} $${EXTRAFLAGS}@; \ - \@(BLAS|RAN)LIB[[:blank:]]*=@d;' \ + s@^(CC[[:blank:]]*=)(.*)@@; \ + s@^(CFLAGS[[:blank:]]*)(=)(.*)@\1 += $${EXTRAFLAGS}@; \ + \@(BLAS|LAPACKE|RAN)LIB[[:blank:]]*=@d;' \ ${WRKSRC}/make.inc.example > ${WRKSRC}/make.inc @${REINPLACE_CMD} -e 's@\./lapack_testing\.py@${S} &@' \ ${WRKSRC}/Makefile @@ -115,9 +133,9 @@ do-build: ${MAN_TARGET} build-profile build-shared build-static .for o in PROFILE SHARED STATIC -build-${o:L}: patch +build-${o:tl}: patch .if ${PORT_OPTIONS:M${o}} - ${PRINTF} "\n\nBuilding ${o:L} libraries:\n\n\n" + ${PRINTF} "\n\nBuilding ${o:tl} libraries:\n\n\n" cd ${WRKSRC_${o}}; ${SETENV} ${MAKE_ENV} EXTRAFLAGS="${FFLAGS_${o}}" \ ${MAKE} ${_MAKE_JOBS} ${MAKE_ARGS} ARCH="${AR}" ${ALL_TARGET} @@ -148,45 +166,50 @@ TESTS ?= test-profile .endif +.if !defined(LAPACKE_SLAVEPORT) check regression-test test: ${TESTS} - .for o in PROFILE SHARED STATIC -test-${o:L}: build-${o:L} +test-${o:tl}: build-${o:tl} .if ${PORT_OPTIONS:M${o}} - @${PRINTF} "\n\nTesting ${o:L} libraries:\n\n\n" + @${PRINTF} "\n\nTesting ${o:tl} libraries:\n\n\n" @cd ${WRKSRC_${o}}; ${SETENV} ${MAKE_ENV} EXTRAFLAGS="${FFLAGS_${o}}" \ ${MAKE} ${_MAKE_JOBS} ${MAKE_ARGS} ARCH="${AR}" ${TEST_TARGET} .if defined(BLAS_SLAVEPORT) @${CAT} ${WRKSRC_${o}}/BLAS/*.out .endif - .endif .endfor +.endif do-install: .for L in ${LIBS} .if ${PORT_OPTIONS:MSTATIC} - @${INSTALL_DATA} ${WRKSRC}/lib${L}.a ${PREFIX}/lib/lib${P}${L}.a + @${INSTALL_DATA} ${WRKSRC}/lib${L}.a ${STAGEDIR}${PREFIX}/lib/lib${P}${L}.a .endif .if ${PORT_OPTIONS:MSHARED} - @${INSTALL_DATA} ${WRKSRC_SHARED}/lib${L}.a ${PREFIX}/lib/lib${P}${L}_pic.a - @${INSTALL_DATA} ${WRKSRC_SHARED}/lib${P}${L}.so.${SVERSION} ${PREFIX}/lib - @${LN} -sf lib${P}${L}.so.${SVERSION} ${PREFIX}/lib/lib${P}${L}.so + @${INSTALL_DATA} ${WRKSRC_SHARED}/lib${L}.a ${STAGEDIR}${PREFIX}/lib/lib${P}${L}_pic.a + @${INSTALL_DATA} ${WRKSRC_SHARED}/lib${P}${L}.so.${SVERSION} ${STAGEDIR}${PREFIX}/lib + @${LN} -sf lib${P}${L}.so.${SVERSION} ${STAGEDIR}${PREFIX}/lib/lib${P}${L}.so .endif .if ${PORT_OPTIONS:MPROFILE} - @${INSTALL_DATA} ${WRKSRC_PROFILE}/lib${L}.a ${PREFIX}/lib/lib${P}${L}_p.a + @${INSTALL_DATA} ${WRKSRC_PROFILE}/lib${L}.a ${STAGEDIR}${PREFIX}/lib/lib${P}${L}_p.a .endif .endfor +.if defined(LAPACKE_SLAVEPORT) +.for I in ${INCLS} + @${INSTALL_DATA} ${WRKSRC}/lapacke/include/${I}.h ${STAGEDIR}${PREFIX}/include +.endfor +.endif .include -.if !(defined(BLAS_SLAVEPORT) || defined(XLAPACK_SLAVEPORT)) +.if !(defined(BLAS_SLAVEPORT) || defined(XLAPACK_SLAVEPORT) || defined(LAPACKE_SLAVEPORT)) .include "${FILESDIR}/manpages" post-install: - @cd ${WRKDIR}/man ; ${ECHO_CMD} ${MAN3:S|^|man3/|} \ - | ${XARGS} -J @ ${INSTALL_MAN} @ ${MAN3PREFIX}/man/man3 + @cd ${WRKDIR}/man ; ${ECHO_CMD} ${MAN3L:S|^|man3/|} \ + | ${XARGS} -J @ ${INSTALL_MAN} @ ${STAGEDIR}${MAN3PREFIX}/man/man3 .if defined(MAINTAINER_MODE) package-manpages: build-manpages @@ -193,7 +216,7 @@ @${RM} -f ${WRKDIR}/lapack-manpages-${PORTVERSION}.tar.gz ; \ cd ${WRKSRC}/DOCS/man; \ ${TAR} -czvf ${WRKDIR}/lapack-manpages-${PORTVERSION}.tar.gz \ - ${MAN3:S|^|man3/|} + ${MAN3L:S|^|man3/|} .endif .endif Modified: trunk/math/lapack/distinfo =================================================================== --- trunk/math/lapack/distinfo 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/distinfo 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,4 +1,4 @@ -SHA256 (lapack/lapack-3.4.2.tgz) = 60a65daaf16ec315034675942618a2230521ea7adf85eea788ee54841072faf0 -SIZE (lapack/lapack-3.4.2.tgz) = 6168281 -SHA256 (lapack/manpages-3.4.2.tgz) = 65181ed22a87cde3cfee3bc9e4135434e3ee9f5fc5651a37c0ca4e4b737254de -SIZE (lapack/manpages-3.4.2.tgz) = 1378304 +SHA256 (lapack/lapack-3.5.0.tgz) = 9ad8f0d3f3fb5521db49f2dd716463b8fb2b6bc9dc386a9956b8c6144f726352 +SIZE (lapack/lapack-3.5.0.tgz) = 6313139 +SHA256 (lapack/manpages-3.5.0.tgz) = 055da7402ea807cc16f6c50b71ac63d290f83a5f2885aa9f679b7ad11dd8903d +SIZE (lapack/manpages-3.5.0.tgz) = 1394730 Modified: trunk/math/lapack/files/manpages =================================================================== --- trunk/math/lapack/files/manpages 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/files/manpages 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,4 +1,4 @@ -MAN3= \ +MAN3L= \ INSTALL_ilaver.f.3 \ INSTALL_lsame.f.3 \ LAPACK_version.f.3 \ Modified: trunk/math/lapack/files/patch-SRC+Makefile =================================================================== --- trunk/math/lapack/files/patch-SRC+Makefile 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/files/patch-SRC+Makefile 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,6 +1,6 @@ ---- SRC/Makefile~ 2011-11-18 23:21:16.000000000 +0900 -+++ SRC/Makefile 2011-11-18 23:22:26.000000000 +0900 -@@ -154,7 +154,7 @@ +--- SRC/Makefile.orig 2015-01-15 16:32:42.000000000 +0100 ++++ SRC/Makefile 2015-01-15 16:33:52.000000000 +0100 +@@ -159,7 +159,7 @@ DSLASRC = spotrs.o sgetrs.o spotrf.o sgetrf.o @@ -9,7 +9,7 @@ SXLASRC = sgesvxx.o sgerfsx.o sla_gerfsx_extended.o sla_geamv.o \ sla_gercond.o sla_gerpvgrw.o ssysvxx.o ssyrfsx.o \ sla_syrfsx_extended.o sla_syamv.o sla_syrcond.o sla_syrpvgrw.o \ -@@ -162,7 +162,7 @@ +@@ -167,7 +167,7 @@ sla_porpvgrw.o sgbsvxx.o sgbrfsx.o sla_gbrfsx_extended.o \ sla_gbamv.o sla_gbrcond.o sla_gbrpvgrw.o sla_lin_berr.o slarscl2.o \ slascl2.o sla_wwaddw.o @@ -18,7 +18,7 @@ CLASRC = \ cbdsqr.o cgbbrd.o cgbcon.o cgbequ.o cgbrfs.o cgbsv.o cgbsvx.o \ -@@ -226,7 +226,7 @@ +@@ -238,7 +238,7 @@ cgeqrt.o cgeqrt2.o cgeqrt3.o cgemqrt.o \ ctpqrt.o ctpqrt2.o ctpmqrt.o ctprfb.o @@ -27,7 +27,7 @@ CXLASRC = cgesvxx.o cgerfsx.o cla_gerfsx_extended.o cla_geamv.o \ cla_gercond_c.o cla_gercond_x.o cla_gerpvgrw.o \ csysvxx.o csyrfsx.o cla_syrfsx_extended.o cla_syamv.o \ -@@ -238,7 +238,7 @@ +@@ -250,7 +250,7 @@ chesvxx.o cherfsx.o cla_herfsx_extended.o cla_heamv.o \ cla_hercond_c.o cla_hercond_x.o cla_herpvgrw.o \ cla_lin_berr.o clarscl2.o clascl2.o cla_wwaddw.o @@ -36,7 +36,7 @@ ZCLASRC = cpotrs.o cgetrs.o cpotrf.o cgetrf.o -@@ -302,7 +302,7 @@ +@@ -318,7 +318,7 @@ dgeqrt.o dgeqrt2.o dgeqrt3.o dgemqrt.o \ dtpqrt.o dtpqrt2.o dtpmqrt.o dtprfb.o @@ -45,7 +45,7 @@ DXLASRC = dgesvxx.o dgerfsx.o dla_gerfsx_extended.o dla_geamv.o \ dla_gercond.o dla_gerpvgrw.o dsysvxx.o dsyrfsx.o \ dla_syrfsx_extended.o dla_syamv.o dla_syrcond.o dla_syrpvgrw.o \ -@@ -310,7 +310,7 @@ +@@ -326,7 +326,7 @@ dla_porpvgrw.o dgbsvxx.o dgbrfsx.o dla_gbrfsx_extended.o \ dla_gbamv.o dla_gbrcond.o dla_gbrpvgrw.o dla_lin_berr.o dlarscl2.o \ dlascl2.o dla_wwaddw.o @@ -54,7 +54,7 @@ ZLASRC = \ zbdsqr.o zgbbrd.o zgbcon.o zgbequ.o zgbrfs.o zgbsv.o zgbsvx.o \ -@@ -379,7 +379,7 @@ +@@ -402,7 +402,7 @@ zgeqrt.o zgeqrt2.o zgeqrt3.o zgemqrt.o \ ztpqrt.o ztpqrt2.o ztpmqrt.o ztprfb.o @@ -63,7 +63,7 @@ ZXLASRC = zgesvxx.o zgerfsx.o zla_gerfsx_extended.o zla_geamv.o \ zla_gercond_c.o zla_gercond_x.o zla_gerpvgrw.o zsysvxx.o zsyrfsx.o \ zla_syrfsx_extended.o zla_syamv.o zla_syrcond_c.o zla_syrcond_x.o \ -@@ -389,14 +389,14 @@ +@@ -412,14 +412,14 @@ zla_gbrpvgrw.o zhesvxx.o zherfsx.o zla_herfsx_extended.o \ zla_heamv.o zla_hercond_c.o zla_hercond_x.o zla_herpvgrw.o \ zla_lin_berr.o zlarscl2.o zlascl2.o zla_wwaddw.o @@ -81,7 +81,7 @@ all: ../$(LAPACKLIB) -@@ -433,12 +433,12 @@ +@@ -456,12 +456,12 @@ $(ZLASRC): $(FRC) $(ZCLASRC): $(FRC) $(DSLASRC): $(FRC) Modified: trunk/math/lapack/files/patch-TESTING+LIN+Makefile =================================================================== --- trunk/math/lapack/files/patch-TESTING+LIN+Makefile 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/files/patch-TESTING+LIN+Makefile 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,5 +1,5 @@ ---- TESTING/LIN/Makefile~ 2011-11-01 07:21:11.000000000 +0900 -+++ TESTING/LIN/Makefile 2011-11-18 23:32:05.000000000 +0900 +--- TESTING/LIN/Makefile.orig 2015-01-15 16:35:28.000000000 +0100 ++++ TESTING/LIN/Makefile 2015-01-15 16:36:26.000000000 +0100 @@ -34,11 +34,6 @@ # ####################################################################### @@ -14,78 +14,69 @@ alasum.o alasvm.o chkxer.o icopy.o ilaenv.o xlaenv.o xerbla.o @@ -76,13 +71,13 @@ strt02.o strt03.o strt05.o strt06.o \ - stzt01.o stzt02.o sgennd.o + stzt01.o stzt02.o sgennd.o sqrt04.o sqrt05.o schkqrt.o serrqrt.o schkqrtp.o serrqrtp.o -ifdef USEXBLAS +.ifdef USEXBLAS SLINTST += serrvxx.o sdrvgex.o sdrvsyx.o serrgex.o sdrvgbx.o sdrvpox.o \ - sebchvxx.o serrsyx.o serrpox.o + sebchvxx.o serrsyx.o serrpox.o -else +.else SLINTST += serrvx.o sdrvge.o sdrvsy.o serrge.o sdrvgb.o sdrvpo.o \ - serrsy.o serrpo.o + serrsy.o serrpo.o -endif +.endif CLINTST = cchkaa.o \ cchkeq.o cchkgb.o cchkge.o cchkgt.o \ -@@ -116,13 +111,13 @@ - ctrt02.o ctrt03.o ctrt05.o ctrt06.o \ - ctzt01.o ctzt02.o sget06.o cgennd.o +@@ -117,13 +112,13 @@ + ctzt01.o ctzt02.o sget06.o cgennd.o \ + cqrt04.o cqrt05.o cchkqrt.o cerrqrt.o cchkqrtp.o cerrqrtp.o -ifdef USEXBLAS +.ifdef USEXBLAS - CLINTST += cerrvxx.o cdrvgex.o cdrvsyx.o cdrvgbx.o cerrgex.o cdrvpox.o cdrvhex.o \ - cerrpox.o cebchvxx.o cerrsyx.o cerrhex.o + CLINTST += cerrvxx.o cdrvgex.o cdrvsyx.o cdrvgbx.o cerrgex.o cdrvpox.o \ + cdrvhex.o cerrpox.o cebchvxx.o cerrsyx.o cerrhex.o -else +.else - CLINTST += cerrvx.o cdrvge.o cdrvsy.o cdrvgb.o cerrge.o cdrvpo.o cdrvhe.o \ - cerrpo.o cerrsy.o cerrhe.o + CLINTST += cerrvx.o cdrvge.o cdrvsy.o cdrvgb.o cerrge.o cdrvpo.o \ + cdrvhe.o cerrpo.o cerrsy.o cerrhe.o -endif +.endif DLINTST = dchkaa.o \ dchkeq.o dchkgb.o dchkge.o dchkgt.o \ -@@ -153,13 +148,13 @@ - dtrt02.o dtrt03.o dtrt05.o dtrt06.o \ - dtzt01.o dtzt02.o dgennd.o +@@ -155,13 +150,13 @@ + dtzt01.o dtzt02.o dgennd.o \ + dqrt04.o dqrt05.o dchkqrt.o derrqrt.o dchkqrtp.o derrqrtp.o -ifdef USEXBLAS +.ifdef USEXBLAS DLINTST += derrvxx.o ddrvgex.o ddrvsyx.o ddrvgbx.o derrgex.o ddrvpox.o derrpox.o \ - debchvxx.o derrsyx.o + debchvxx.o derrsyx.o -else +.else DLINTST += derrvx.o ddrvge.o ddrvsy.o ddrvgb.o derrge.o ddrvpo.o derrpo.o \ - derrsy.o + derrsy.o -endif +.endif ZLINTST = zchkaa.o \ zchkeq.o zchkgb.o zchkge.o zchkgt.o \ -@@ -193,13 +188,13 @@ - ztrt02.o ztrt03.o ztrt05.o ztrt06.o \ - ztzt01.o ztzt02.o dget06.o zgennd.o +@@ -196,13 +191,13 @@ + ztzt01.o ztzt02.o dget06.o zgennd.o \ + zqrt04.o zqrt05.o zchkqrt.o zerrqrt.o zchkqrtp.o zerrqrtp.o -ifdef USEXBLAS +.ifdef USEXBLAS ZLINTST += zerrvxx.o zdrvgex.o zdrvsyx.o zdrvgbx.o zerrgex.o zdrvpox.o zdrvhex.o \ - zerrpox.o zebchvxx.o zerrsyx.o zerrhex.o + zerrpox.o zebchvxx.o zerrsyx.o zerrhex.o -else +.else - ZLINTST += zerrvx.o zdrvge.o zdrvsy.o zdrvgb.o zerrge.o zdrvpo.o zdrvhe.o \ - zerrpo.o zerrsy.o zerrhe.o + ZLINTST += zerrvx.o zdrvge.o zdrvsy.o zdrvgb.o zerrge.o zdrvpo.o \ + zdrvhe.o zerrpo.o zerrsy.o zerrhe.o -endif +.endif DSLINTST = dchkab.o \ ddrvab.o ddrvac.o derrab.o derrac.o dget08.o \ -@@ -250,7 +245,7 @@ - ../../$(TMGLIB) ../../$(LAPACKLIB) $(XBLASLIB) $(BLASLIB) -o $@ - - xlintstd : $(ALINTST) $(DLINTST) $(DZLNTST) ../../$(LAPACKLIB) -- $(LOADER) $(LOADOPTS) $^ \ -+ $(LOADER) $(LOADOPTS) $(ALINTST) $(DLINTST) $(DZLNTST) \ - ../../$(TMGLIB) ../../$(LAPACKLIB) $(XBLASLIB) $(BLASLIB) -o $@ - - xlintstz : $(ALINTST) $(ZLINTST) $(DZLNTST) ../../$(LAPACKLIB) Modified: trunk/math/lapack/files/patch-TESTING+Makefile =================================================================== --- trunk/math/lapack/files/patch-TESTING+Makefile 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/files/patch-TESTING+Makefile 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,5 +1,5 @@ ---- TESTING/Makefile~ 2011-11-18 23:12:35.000000000 +0900 -+++ TESTING/Makefile 2011-11-18 23:12:48.000000000 +0900 +--- TESTING/Makefile.orig 2015-01-15 16:34:38.000000000 +0100 ++++ TESTING/Makefile 2015-01-15 16:35:05.000000000 +0100 @@ -37,11 +37,6 @@ include ../make.inc Modified: trunk/math/lapack/pkg-plist =================================================================== --- trunk/math/lapack/pkg-plist 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/pkg-plist 2016-05-26 01:15:59 UTC (rev 21451) @@ -23,3 +23,16 @@ %%XLAPACK%%%%SHARED%%lib/libxtmglib.so %%XLAPACK%%%%SHARED%%lib/libxtmglib.so.%%SVERSION%% %%XLAPACK%%%%PROFILE%%lib/libxtmglib_p.a +%%LAPACKE%%include/lapacke.h +%%LAPACKE%%include/lapacke_utils.h +%%LAPACKE%%include/lapacke_mangling.h +%%LAPACKE%%%%STATIC%%lib/liblapacke.a +%%LAPACKE%%%%SHARED%%lib/liblapacke_pic.a +%%LAPACKE%%%%SHARED%%lib/liblapacke.so +%%LAPACKE%%%%SHARED%%lib/liblapacke.so.%%SVERSION%% +%%LAPACKE%%%%PROFILE%%lib/liblapacke_p.a +%%LAPACKE%%%%STATIC%%lib/liblapacke_tmg.a +%%LAPACKE%%%%SHARED%%lib/liblapacke_tmg_pic.a +%%LAPACKE%%%%SHARED%%lib/liblapacke_tmg.so +%%LAPACKE%%%%SHARED%%lib/liblapacke_tmg.so.%%SVERSION%% +%%LAPACKE%%%%PROFILE%%lib/liblapacke_tmg_p.a From laffer1 at midnightbsd.org Wed May 25 21:20:18 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:20:18 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21452] trunk/math/blas/Makefile: masterdir lapakc Message-ID: <201605260120.u4Q1KIrB069320@stargazer.midnightbsd.org> Revision: 21452 http://svnweb.midnightbsd.org/mports/?rev=21452 Author: laffer1 Date: 2016-05-25 21:20:18 -0400 (Wed, 25 May 2016) Log Message: ----------- masterdir lapakc Modified Paths: -------------- trunk/math/blas/Makefile Modified: trunk/math/blas/Makefile =================================================================== --- trunk/math/blas/Makefile 2016-05-26 01:15:59 UTC (rev 21451) +++ trunk/math/blas/Makefile 2016-05-26 01:20:18 UTC (rev 21452) @@ -1,59 +1,14 @@ # $MidnightBSD$ PORTNAME= blas -PORTVERSION= 1.0 PORTREVISION= 3 -CATEGORIES= math -MASTER_SITES= http://www.netlib.org/blas/ \ - http://www.mirrorservice.org/sites/netlib.bell-labs.com/netlib/blas/ \ - ftp://ftp.mirrorservice.org/sites/netlib.bell-labs.com/netlib/blas/ \ - http://netlib.sandia.gov/blas/ \ - http://www.netlib.no/netlib/blas/ -DISTNAME= ${PORTNAME} -EXTRACT_SUFX= .tgz MAINTAINER= ports at MidnightBSD.org -COMMENT= Basic Linear Algebra, level 1, 2, and 3 -LICENSE= unknown +COMMENT= Basic Linear Algebra Subroutines -FAKE_OPTS= trueprefix +DESCR= ${.CURDIR}/pkg-descr +BLAS_SLAVEPORT= yes -USE_LDCONFIG= yes -USE_FORTRAN= yes -WRKSRC= ${WRKDIR}/BLAS -SHLIB_MAJOR= 2 +MASTERDIR= ${.CURDIR}/../lapack -PLIST_FILES= lib/libblas.a lib/libblas.so lib/libblas.so.${SHLIB_MAJOR} - -LDFLAGS+= ${FFLAGS} -LDADD ?= -lgfortran -lm -SRCCONF= ${NONEXISTENT} -MAKE_ENV+= LDADD="${LDADD}" LDFLAGS="${LDFLAGS}" \ - SHLIB_MAJOR="${SHLIB_MAJOR}" SRCCONF="${SRCCONF}" -.for _u in AR NM RANLIB -MAKE_ENV+= ${_u}="${LOCALBASE}/bin/${_u:L}" -.endfor - -OPTIONS= PROFILE "Build and install a profiling library" Off - -.include - -.if defined(WITH_PROFILE) -.if defined(NOPROFILE) || defined(NO_PROFILE) || defined(WITHOUT_PROFILE) -IGNORE = you have defined WITH_PROFILE, but have also defined\ -WITHOUT_PROFILE, NOPROFILE, or NO_PROFILE -.elif !exists(/usr/lib/libc_p.a) -IGNORE = you have chosen WITH_PROFILE, but have not installed the\ -base system profiling libraries -.endif -PLIST_FILES+= lib/libblas_p.a -.else -MAKE_ENV+= NO_PROFILE= -.endif - -.include - -post-patch: - @${CP} ${FILESDIR}/makefile.lib ${WRKSRC}/Makefile - -.include +.include "${MASTERDIR}/Makefile" From laffer1 at midnightbsd.org Wed May 25 21:29:43 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:29:43 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21453] trunk/Mk/extensions/fortran.mk: update the fortran Message-ID: <201605260129.u4Q1Thwv070170@stargazer.midnightbsd.org> Revision: 21453 http://svnweb.midnightbsd.org/mports/?rev=21453 Author: laffer1 Date: 2016-05-25 21:29:42 -0400 (Wed, 25 May 2016) Log Message: ----------- update the fortran Modified Paths: -------------- trunk/Mk/extensions/fortran.mk Modified: trunk/Mk/extensions/fortran.mk =================================================================== --- trunk/Mk/extensions/fortran.mk 2016-05-26 01:20:18 UTC (rev 21452) +++ trunk/Mk/extensions/fortran.mk 2016-05-26 01:29:42 UTC (rev 21453) @@ -1,5 +1,47 @@ # $MidnightBSD$ +# $FreeBSD: head/Mk/Uses/fortran.mk 399326 2015-10-15 07:36:38Z bapt $ +# +# Fortran support +# +# Feature: fortran +# Usage: USES=fortran +# Valid ARGS: gcc (default), ifort +# -# All fortran logic is included in gcc.mk currently. +.if !defined(_INCLUDE_USES_FORTRAN_MK) +_INCLUDE_USES_FORTRAN_MK= yes -.include "gcc.mk" +.if empty(fortran_ARGS) +fortran_ARGS= gcc +.endif + +.if ${fortran_ARGS} == gcc +.include "${PORTSDIR}/Mk/components/default-versions.mk" +_GCC_VER= ${GCC_DEFAULT:S/.//} +.if ${GCC_DEFAULT} == ${LANG_GCC_IS} +BUILD_DEPENDS+= gfortran${_GCC_VER}:${PORTSDIR}/lang/gcc +RUN_DEPENDS+= gfortran${_GCC_VER}:${PORTSDIR}/lang/gcc +.else +BUILD_DEPENDS+= gfortran${_GCC_VER}:${PORTSDIR}/lang/gcc${_GCC_VER} +RUN_DEPENDS+= gfortran${_GCC_VER}:${PORTSDIR}/lang/gcc${_GCC_VER} +.endif +USE_BINUTILS= yes +F77= gfortran${_GCC_VER} +FC= gfortran${_GCC_VER} +FFLAGS+= -Wl,-rpath=${LOCALBASE}/lib/gcc${_GCC_VER} +FCFLAGS+= -Wl,-rpath=${LOCALBASE}/lib/gcc${_GCC_VER} +LDFLAGS+= -Wl,-rpath=${LOCALBASE}/lib/gcc${_GCC_VER} \ + -L${LOCALBASE}/lib/gcc${_GCC_VER} -B${LOCALBASE}/bin +.elif ${fortran_ARGS} == ifort +BUILD_DEPENDS+= ${LOCALBASE}/intel_fc_80/bin/ifort:${PORTSDIR}/lang/ifc +RUN_DEPENDS+= ${LOCALBASE}/intel_fc_80/bin/ifort:${PORTSDIR}/lang/ifc +F77= ${LOCALBASE}/intel_fc_80/bin/ifort +FC= ${LOCALBASE}/intel_fc_80/bin/ifort +.else +IGNORE= USES=fortran: invalid arguments: ${fortran_ARGS} +.endif + +CONFIGURE_ENV+= F77="${F77}" FC="${FC}" FFLAGS="${FFLAGS}" FCFLAGS="${FCFLAGS}" +MAKE_ENV+= F77="${F77}" FC="${FC}" FFLAGS="${FFLAGS}" FCFLAGS="${FCFLAGS}" + +.endif From laffer1 at midnightbsd.org Wed May 25 21:47:11 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:47:11 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21454] trunk/lang/gawk: 4.1.3 Message-ID: <201605260147.u4Q1lBee072496@stargazer.midnightbsd.org> Revision: 21454 http://svnweb.midnightbsd.org/mports/?rev=21454 Author: laffer1 Date: 2016-05-25 21:47:11 -0400 (Wed, 25 May 2016) Log Message: ----------- 4.1.3 Modified Paths: -------------- trunk/lang/gawk/Makefile trunk/lang/gawk/distinfo trunk/lang/gawk/pkg-plist Added Paths: ----------- trunk/lang/gawk/files/patch-Makefile.in Removed Paths: ------------- trunk/lang/gawk/files/patch-Makefile trunk/lang/gawk/files/patch-extension_Makefile.in Modified: trunk/lang/gawk/Makefile =================================================================== --- trunk/lang/gawk/Makefile 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/Makefile 2016-05-26 01:47:11 UTC (rev 21454) @@ -1,12 +1,12 @@ # $MidnightBSD$ PORTNAME= gawk -PORTVERSION= 4.1.1 +PORTVERSION= 4.1.3 CATEGORIES= lang MASTER_SITES= GNU MAINTAINER= ports at MidnightBSD.org -COMMENT= The GNU version of Awk +COMMENT= GNU version of Awk LICENSE= gpl3 Modified: trunk/lang/gawk/distinfo =================================================================== --- trunk/lang/gawk/distinfo 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/distinfo 2016-05-26 01:47:11 UTC (rev 21454) @@ -1,2 +1,2 @@ -SHA256 (gawk-4.1.1.tar.xz) = efd4c6aafb1ce996309fc903ceb625e7012221c464eb72483dbb23adef1ee8db -SIZE (gawk-4.1.1.tar.xz) = 2196904 +SHA256 (gawk-4.1.3.tar.xz) = e3cf55e91e31ea2845f8338bedd91e40671fc30e4d82ea147d220e687abda625 +SIZE (gawk-4.1.3.tar.xz) = 2311268 Deleted: trunk/lang/gawk/files/patch-Makefile =================================================================== --- trunk/lang/gawk/files/patch-Makefile 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/files/patch-Makefile 2016-05-26 01:47:11 UTC (rev 21454) @@ -1,11 +0,0 @@ ---- Makefile.in.orig 2014-04-08 18:12:38.000000000 +0200 -+++ Makefile.in 2014-04-21 14:23:45.000000000 +0200 -@@ -1151,7 +1151,7 @@ uninstall-am: uninstall-binPROGRAMS unin - install-exec-hook: - (cd $(DESTDIR)$(bindir); \ - $(LN) gawk$(EXEEXT) gawk-$(VERSION)$(EXEEXT) 2>/dev/null ; \ -- if [ ! -f awk ]; \ -+ if ! /usr/bin/which -s awk; \ - then $(LN_S) gawk$(EXEEXT) awk; \ - fi; exit 0) - Copied: trunk/lang/gawk/files/patch-Makefile.in (from rev 21439, trunk/lang/gawk/files/patch-Makefile) =================================================================== --- trunk/lang/gawk/files/patch-Makefile.in (rev 0) +++ trunk/lang/gawk/files/patch-Makefile.in 2016-05-26 01:47:11 UTC (rev 21454) @@ -0,0 +1,11 @@ +--- Makefile.in.orig 2014-04-08 18:12:38.000000000 +0200 ++++ Makefile.in 2014-04-21 14:23:45.000000000 +0200 +@@ -1151,7 +1151,7 @@ uninstall-am: uninstall-binPROGRAMS unin + install-exec-hook: + (cd $(DESTDIR)$(bindir); \ + $(LN) gawk$(EXEEXT) gawk-$(VERSION)$(EXEEXT) 2>/dev/null ; \ +- if [ ! -f awk ]; \ ++ if ! /usr/bin/which -s awk; \ + then $(LN_S) gawk$(EXEEXT) awk; \ + fi; exit 0) + Deleted: trunk/lang/gawk/files/patch-extension_Makefile.in =================================================================== --- trunk/lang/gawk/files/patch-extension_Makefile.in 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/files/patch-extension_Makefile.in 2016-05-26 01:47:11 UTC (rev 21454) @@ -1,12 +0,0 @@ ---- extension/Makefile.in.orig 2014-04-08 18:13:03.000000000 +0200 -+++ extension/Makefile.in 2014-04-21 14:26:04.000000000 +0200 -@@ -1230,9 +1230,6 @@ uninstall-man: uninstall-man3 - - - install-data-hook: -- for i in $(pkgextension_LTLIBRARIES) ; do \ -- $(RM) $(pkgextensiondir)/$$i ; \ -- done - - # Keep the uninstall check working: - uninstall-so: Modified: trunk/lang/gawk/pkg-plist =================================================================== --- trunk/lang/gawk/pkg-plist 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/pkg-plist 2016-05-26 01:47:11 UTC (rev 21454) @@ -43,11 +43,13 @@ share/awk/noassign.awk share/awk/ord.awk share/awk/passwd.awk +share/awk/processarray.awk share/awk/quicksort.awk share/awk/readable.awk share/awk/readfile.awk share/awk/rewind.awk share/awk/round.awk +share/awk/shellquote.awk share/awk/strtonum.awk share/awk/walkarray.awk share/awk/zerofile.awk @@ -64,6 +66,3 @@ %%NLS%%share/locale/pl/LC_MESSAGES/gawk.mo %%NLS%%share/locale/sv/LC_MESSAGES/gawk.mo %%NLS%%share/locale/vi/LC_MESSAGES/gawk.mo - at dirrm share/awk - at dirrm libexec/awk - at dirrm lib/gawk From laffer1 at midnightbsd.org Wed May 25 21:47:50 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:47:50 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21455] trunk/lang/gawk/files/patch-Makefile.in: fixup patchset Message-ID: <201605260147.u4Q1loSX072585@stargazer.midnightbsd.org> Revision: 21455 http://svnweb.midnightbsd.org/mports/?rev=21455 Author: laffer1 Date: 2016-05-25 21:47:50 -0400 (Wed, 25 May 2016) Log Message: ----------- fixup patchset Modified Paths: -------------- trunk/lang/gawk/files/patch-Makefile.in Modified: trunk/lang/gawk/files/patch-Makefile.in =================================================================== --- trunk/lang/gawk/files/patch-Makefile.in 2016-05-26 01:47:11 UTC (rev 21454) +++ trunk/lang/gawk/files/patch-Makefile.in 2016-05-26 01:47:50 UTC (rev 21455) @@ -1,11 +1,11 @@ ---- Makefile.in.orig 2014-04-08 18:12:38.000000000 +0200 -+++ Makefile.in 2014-04-21 14:23:45.000000000 +0200 -@@ -1151,7 +1151,7 @@ uninstall-am: uninstall-binPROGRAMS unin - install-exec-hook: +--- Makefile.in.orig 2015-05-19 13:38:35 UTC ++++ Makefile.in +@@ -1178,7 +1178,7 @@ install-exec-hook: (cd $(DESTDIR)$(bindir); \ - $(LN) gawk$(EXEEXT) gawk-$(VERSION)$(EXEEXT) 2>/dev/null ; \ -- if [ ! -f awk ]; \ + name=`echo gawk | sed '$(transform)'` ; \ + $(LN) $${name}$(EXEEXT) gawk-$(VERSION)$(EXEEXT) 2>/dev/null ; \ +- if [ ! -f awk$(EXEEXT) ]; \ + if ! /usr/bin/which -s awk; \ - then $(LN_S) gawk$(EXEEXT) awk; \ + then $(LN_S) $${name}$(EXEEXT) awk$(EXEEXT); \ fi; exit 0) From laffer1 at midnightbsd.org Wed May 25 21:49:59 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:49:59 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21456] trunk/lang/cython: cython 0.23.4 Message-ID: <201605260149.u4Q1nxDB072718@stargazer.midnightbsd.org> Revision: 21456 http://svnweb.midnightbsd.org/mports/?rev=21456 Author: laffer1 Date: 2016-05-25 21:49:59 -0400 (Wed, 25 May 2016) Log Message: ----------- cython 0.23.4 Modified Paths: -------------- trunk/lang/cython/Makefile trunk/lang/cython/distinfo Modified: trunk/lang/cython/Makefile =================================================================== --- trunk/lang/cython/Makefile 2016-05-26 01:47:50 UTC (rev 21455) +++ trunk/lang/cython/Makefile 2016-05-26 01:49:59 UTC (rev 21456) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= cython -PORTVERSION= 0.23 +PORTVERSION= 0.23.4 CATEGORIES= lang python MASTER_SITES= http://www.cython.org/release/ \ CHEESESHOP Modified: trunk/lang/cython/distinfo =================================================================== --- trunk/lang/cython/distinfo 2016-05-26 01:47:50 UTC (rev 21455) +++ trunk/lang/cython/distinfo 2016-05-26 01:49:59 UTC (rev 21456) @@ -1,2 +1,2 @@ -SHA256 (Cython-0.23.tar.gz) = 9fd01e8301c24fb3ba0411ad8eb16f5d9f9f8e66b1281fbe7aba2a9bd9d343dc -SIZE (Cython-0.23.tar.gz) = 1621481 +SHA256 (Cython-0.23.4.tar.gz) = fec42fecee35d6cc02887f1eef4e4952c97402ed2800bfe41bbd9ed1a0730d8e +SIZE (Cython-0.23.4.tar.gz) = 1628326 From laffer1 at midnightbsd.org Wed May 25 23:43:56 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 23:43:56 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21457] trunk/textproc: add elasticsearch 2.x Message-ID: <201605260343.u4Q3huen085667@stargazer.midnightbsd.org> Revision: 21457 http://svnweb.midnightbsd.org/mports/?rev=21457 Author: laffer1 Date: 2016-05-25 23:43:55 -0400 (Wed, 25 May 2016) Log Message: ----------- add elasticsearch 2.x Modified Paths: -------------- trunk/textproc/Makefile Added Paths: ----------- trunk/textproc/elasticsearch2/ trunk/textproc/elasticsearch2/Makefile trunk/textproc/elasticsearch2/distinfo trunk/textproc/elasticsearch2/files/ trunk/textproc/elasticsearch2/files/elasticsearch.in trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml trunk/textproc/elasticsearch2/files/pkg-message.in trunk/textproc/elasticsearch2/pkg-descr trunk/textproc/elasticsearch2/pkg-plist Modified: trunk/textproc/Makefile =================================================================== --- trunk/textproc/Makefile 2016-05-26 01:49:59 UTC (rev 21456) +++ trunk/textproc/Makefile 2016-05-26 03:43:55 UTC (rev 21457) @@ -24,6 +24,7 @@ SUBDIR += easydiff SUBDIR += ebook-tools SUBDIR += elasticsearch +SUBDIR += elasticsearch2 SUBDIR += enchant SUBDIR += exempi SUBDIR += expat2 Added: trunk/textproc/elasticsearch2/Makefile =================================================================== --- trunk/textproc/elasticsearch2/Makefile (rev 0) +++ trunk/textproc/elasticsearch2/Makefile 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,85 @@ +# Created by: Tom Judge +# $FreeBSD: head/textproc/elasticsearch2/Makefile 407192 2016-01-25 06:37:37Z pi $ +# $MidnightBSD$ + +PORTNAME= elasticsearch +PORTVERSION= 2.1.1 +CATEGORIES= textproc java devel +MASTER_SITES= http://download.elasticsearch.org/${PORTNAME}/${PORTNAME}/ \ + http://mirrors.rit.edu/zi/ +PKGNAMESUFFIX= 2 + +MAINTAINER= ports at MidnightBSD.org +COMMENT= Full-text search engine for Java + +LICENSE= apache2 + +CONFLICTS= elasticsearch-[0-9]* + +USES= cpe +NO_ARCH= yes +USE_JAVA= yes +NO_BUILD= yes +JAVA_VERSION= 1.7+ +USE_RC_SUBR= ${PORTNAME} + +OPTIONS_DEFINE= DOCS + +.include + +LUCENEVER= 5.3.1 +CONFIG_FILES= elasticsearch.yml logging.yml +BINS= elasticsearch.in.sh \ + elasticsearch \ + plugin + +DOCS= LICENSE.txt \ + NOTICE.txt \ + README.textile + +SIGAR_ARCH= ${ARCH:S|i386|x86|} +SEARCHUSER?= elasticsearch +SEARCHGROUP?= ${SEARCHUSER} +USERS= ${SEARCHUSER} +GROUPS= ${SEARCHGROUP} +ELASTIC_DBDIR= /var/db/elasticsearch +ELASTIC_LOGDIR= /var/log/elasticsearch + +SUB_LIST= SEARCHUSER=${SEARCHUSER} \ + SEARCHGROUP=${SEARCHGROUP} \ + PORTVERSION=${PORTVERSION} +SUB_FILES= pkg-message +PLIST_SUB= SEARCHUSER=${SEARCHUSER} \ + SEARCHGROUP=${SEARCHGROUP} \ + LUCENEVER=${LUCENEVER} \ + PORTVERSION=${PORTVERSION} \ + ELASTIC_DBDIR=${ELASTIC_DBDIR} \ + ELASTIC_LOGDIR=${ELASTIC_LOGDIR} + +post-patch: + ${REINPLACE_CMD} -e "s|%%PREFIX%%|${PREFIX}|g" ${WRKSRC}/config/elasticsearch.yml + ${REINPLACE_CMD} -e "s|%%PREFIX%%|${PREFIX}|g" ${WRKSRC}/bin/elasticsearch.in.sh + +do-install: + @${MKDIR} ${STAGEDIR}${PREFIX}/etc/elasticsearch +.for f in ${CONFIG_FILES} + ${INSTALL} -m 440 ${WRKSRC}/config/${f} ${STAGEDIR}${ETCDIR}/${f}.sample +.endfor + @${MKDIR} ${STAGEDIR}${PREFIX}/lib/elasticsearch/bin +.for f in ${BINS} + ${INSTALL_SCRIPT} ${WRKSRC}/bin/${f} ${STAGEDIR}${PREFIX}/lib/elasticsearch/bin +.endfor + @${MKDIR} ${STAGEDIR}${PREFIX}/lib/elasticsearch/lib + (cd ${WRKSRC}/lib && ${COPYTREE_SHARE} . ${STAGEDIR}${PREFIX}/lib/elasticsearch/lib/ "-name *\.jar") + + @${MKDIR} ${STAGEDIR}${PREFIX}/lib/elasticsearch/plugins + @${MKDIR} ${STAGEDIR}${PREFIX}/libexec/elasticsearch + @${MKDIR} ${STAGEDIR}${ELASTIC_DBDIR} ${STAGEDIR}${ELASTIC_LOGDIR} + cd ${STAGEDIR}${PREFIX}/bin && ${LN} -s ${PREFIX}/lib/elasticsearch/bin/plugin elasticsearch-plugin + @${MKDIR} ${STAGEDIR}${DOCSDIR} +.for f in ${DOCS} + ${INSTALL_DATA} ${WRKSRC}/${f} ${STAGEDIR}${DOCSDIR} +.endfor + + +.include Property changes on: trunk/textproc/elasticsearch2/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/distinfo =================================================================== --- trunk/textproc/elasticsearch2/distinfo (rev 0) +++ trunk/textproc/elasticsearch2/distinfo 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,2 @@ +SHA256 (elasticsearch-2.1.1.tar.gz) = ebd69c0483f20ba7e51caa9606d4e3ce5fe2667e1216c799f0cdbb815c317ce6 +SIZE (elasticsearch-2.1.1.tar.gz) = 29007342 Property changes on: trunk/textproc/elasticsearch2/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/files/elasticsearch.in =================================================================== --- trunk/textproc/elasticsearch2/files/elasticsearch.in (rev 0) +++ trunk/textproc/elasticsearch2/files/elasticsearch.in 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,112 @@ +#!/bin/sh +# +# $FreeBSD: head/textproc/elasticsearch2/files/elasticsearch.in 401977 2015-11-19 21:50:18Z tj $ +# +# PROVIDE: elasticsearch +# REQUIRE: NETWORKING SERVERS +# BEFORE: DAEMON +# KEYWORD: shutdown +# +# Add the following line to /etc/rc.conf to enable elasticsearch: +# +# elasticsearch_enable="YES" +# +# elasticsearch_user (username): Set to elasticsearch by default. +# Set it to required username. +# elasticsearch_group (group): Set to elasticsearch by default. +# Set it to required group. +# elasticsearch_config (path): Set to /usr/local/etc/elasticsearch/elasticsearch.yml by default. +# Set it to the config file location. +# elasticsearch_min_mem (num): Minumum JVM heap size, 256m by default. +# elasticsearch_max_mem (num): Maximum JVM heap size, 1g by default. +# elasticsearch_props (args): Additional java properties or arguments. +# elasticsearch_tmp (path): Set to /var/tmp/elasticsearch by default. +# Set it to the path to be used for temp files. +# +. /etc/rc.subr + +name=elasticsearch +rcvar=elasticsearch_enable + +load_rc_config ${name} + +: ${elasticsearch_enable:="NO"} +: ${elasticsearch_user:=%%SEARCHUSER%%} +: ${elasticsearch_group:=%%SEARCHGROUP%%} +: ${elasticsearch_config:="%%PREFIX%%/etc/elasticsearch"} +: ${elasticsearch_tmp:="/var/tmp/elasticsearch"} + +required_files="${elasticsearch_config}/elasticsearch.yml" +pidfile="/var/run/${name}.pid" + +extra_commands="console status" +console_cmd="elasticsearch_console" +start_precmd="elasticsearch_precmd" +status_cmd="elasticsearch_status" +stop_cmd="elasticsearch_stop" +command="%%PREFIX%%/lib/elasticsearch/bin/elasticsearch" +command_args="-d --pidfile=${pidfile}" + +elasticsearch_precmd() +{ + touch ${pidfile} + chown ${elasticsearch_user}:${elasticsearch_group} ${pidfile} + /usr/bin/install -d -o ${elasticsearch_user} -g ${elasticsearch_group} -m 750 ${elasticsearch_tmp} + /usr/bin/install -d -o ${elasticsearch_user} -g ${elasticsearch_group} -m 750 /var/db/elasticsearch + /usr/bin/install -d -o ${elasticsearch_user} -g ${elasticsearch_group} -m 750 /var/log/elasticsearch +} + +elasticsearch_console() +{ + command_args="" + run_rc_command "start" +} + + +elasticsearch_stop() +{ + rc_pid=$(elasticsearch_check_pidfile $pidfile) + + if [ -z "$rc_pid" ]; then + [ -n "$rc_fast" ] && return 0 + echo "${name} not running? (check $pidfile)." + return 1 + fi + + echo "Stopping ${name}." + kill ${rc_pid} 2> /dev/null +} + +elasticsearch_status() +{ + rc_pid=$(elasticsearch_check_pidfile $pidfile) + + if [ -z "$rc_pid" ]; then + [ -n "$rc_fast" ] && return 0 + echo "${name} not running? (check $pidfile)." + return 1 + fi + echo "${name} is running as pid ${rc_pid}." +} + +elasticsearch_check_pidfile() +{ + _pidfile=$1 + if [ -z "$_pidfile" ]; then + err 3 'USAGE: elasticsearch_check_pidfile pidfile' + fi + if [ ! -f $_pidfile ]; then + debug "pid file ($_pidfile): not readable." + return + fi + read _pid _junk < $_pidfile + if [ -z "$_pid" ]; then + debug "pid file ($_pidfile): no pid in file." + return + fi + if [ -n "`%%LOCALBASE%%/bin/jps -l | grep -e "^$_pid"`" ]; then + echo -n $_pid + fi +} + +run_rc_command "$1" Property changes on: trunk/textproc/elasticsearch2/files/elasticsearch.in ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh =================================================================== --- trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh (rev 0) +++ trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,23 @@ +--- bin/elasticsearch.in.sh.orig 2015-10-21 04:41:12.000000000 -0400 ++++ bin/elasticsearch.in.sh 2015-12-15 12:00:37.323441838 -0500 +@@ -1,5 +1,20 @@ + #!/bin/sh + ++if [ `uname -o` == "FreeBSD" ]; then ++ . /etc/rc.subr ++ load_rc_config elasticsearch ++ ES_MIN_MEM=${elasticsearch_min_mem} ++ ES_MAX_MEM=${elasticsearch_max_mem} ++ ES_HEAP_NEW_SIZE=${elasticsearch_heap_newsize} ++ ES_DIRECT_SIZE=${elasticsearch_direct_size} ++ ES_USE_IPV4=${elasticsearch_use_ipv4} ++ ES_GC_OPTS=${elasticsearch_gc_opts} ++ ES_GC_LOG_FILE=${elasticsearch_gc_logfile} ++ JAVA_OPTS="$JAVA_OPTS -Des.path.conf=${elasticsearch_config:="/usr/local/etc/elasticsearch"}" ++ JAVA_OPTS="$JAVA_OPTS -Des.path.scripts=${elasticsearch_scripts:="/usr/local/libexec/elasticsearch"}" ++ PATH=${PATH}:/usr/local/bin ++fi ++ + # check in case a user was using this mechanism + if [ "x$ES_CLASSPATH" != "x" ]; then + cat >&2 << EOF Property changes on: trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml =================================================================== --- trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml (rev 0) +++ trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,15 @@ +--- config/elasticsearch.yml.orig 2015-10-21 04:41:12.000000000 -0400 ++++ config/elasticsearch.yml 2015-11-19 12:34:39.766910803 -0500 +@@ -31,10 +31,12 @@ + # Path to directory where to store the data (separate multiple locations by comma): + # + # path.data: /path/to/data ++path.data: /var/db/elasticsearch + # + # Path to log files: + # + # path.logs: /path/to/logs ++path.logs: /var/log/elasticsearch + # + # ----------------------------------- Memory ----------------------------------- + # Property changes on: trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/files/pkg-message.in =================================================================== --- trunk/textproc/elasticsearch2/files/pkg-message.in (rev 0) +++ trunk/textproc/elasticsearch2/files/pkg-message.in 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,6 @@ +====================================================================== + +Please see %%ETCDIR%% for sample versions of +elasticsearch.yml and logging.yml. + +====================================================================== Property changes on: trunk/textproc/elasticsearch2/files/pkg-message.in ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/pkg-descr =================================================================== --- trunk/textproc/elasticsearch2/pkg-descr (rev 0) +++ trunk/textproc/elasticsearch2/pkg-descr 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,4 @@ +Elasticsearch aims to be a Distributed, RESTful, Search Engine built on top of +Apache Lucene. + +WWW: http://www.elastic.co/ Property changes on: trunk/textproc/elasticsearch2/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/pkg-plist =================================================================== --- trunk/textproc/elasticsearch2/pkg-plist (rev 0) +++ trunk/textproc/elasticsearch2/pkg-plist 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,61 @@ + at sample(%%SEARCHUSER%%,%%SEARCHGROUP%%,440) %%ETCDIR%%/elasticsearch.yml.sample + at sample(%%SEARCHUSER%%,%%SEARCHGROUP%%,440) %%ETCDIR%%/logging.yml.sample + at unexec if [ -d %%ELASTIC_LOGDIR%% ]; then echo "You should remove %%ELASTIC_LOGDIR%% if you don't need it any more."; fi + at unexec if [ -d %%ELASTIC_DBDIR%% ]; then echo "You should remove %%ELASTIC_DBDIR%% if you don't need it any more."; fi +bin/elasticsearch-plugin +lib/elasticsearch/lib/HdrHistogram-2.1.6.jar +lib/elasticsearch/lib/antlr-runtime-3.5.jar +lib/elasticsearch/lib/apache-log4j-extras-1.2.17.jar +lib/elasticsearch/lib/asm-4.1.jar +lib/elasticsearch/lib/asm-commons-4.1.jar +lib/elasticsearch/lib/commons-cli-1.3.1.jar +lib/elasticsearch/lib/compiler-0.8.13.jar +lib/elasticsearch/lib/compress-lzf-1.0.2.jar +lib/elasticsearch/lib/elasticsearch-%%PORTVERSION%%.jar +lib/elasticsearch/lib/groovy-all-2.4.4-indy.jar +lib/elasticsearch/lib/guava-18.0.jar +lib/elasticsearch/lib/hppc-0.7.1.jar +lib/elasticsearch/lib/jackson-core-2.6.2.jar +lib/elasticsearch/lib/jackson-dataformat-cbor-2.6.2.jar +lib/elasticsearch/lib/jackson-dataformat-smile-2.6.2.jar +lib/elasticsearch/lib/jackson-dataformat-yaml-2.6.2.jar +lib/elasticsearch/lib/jna-4.1.0.jar +lib/elasticsearch/lib/joda-convert-1.2.jar +lib/elasticsearch/lib/joda-time-2.8.2.jar +lib/elasticsearch/lib/jsr166e-1.1.0.jar +lib/elasticsearch/lib/jts-1.13.jar +lib/elasticsearch/lib/log4j-1.2.17.jar +lib/elasticsearch/lib/lucene-analyzers-common-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-backward-codecs-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-core-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-expressions-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-grouping-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-highlighter-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-join-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-memory-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-misc-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-queries-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-queryparser-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-sandbox-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-spatial-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-spatial3d-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-suggest-%%LUCENEVER%%.jar +lib/elasticsearch/lib/netty-3.10.5.Final.jar +lib/elasticsearch/lib/snakeyaml-1.15.jar +lib/elasticsearch/lib/spatial4j-0.5.jar +lib/elasticsearch/lib/t-digest-3.0.jar +lib/elasticsearch/bin/elasticsearch.in.sh +lib/elasticsearch/bin/elasticsearch +lib/elasticsearch/bin/plugin +%%PORTDOCS%%%%DOCSDIR%%/LICENSE.txt +%%PORTDOCS%%%%DOCSDIR%%/NOTICE.txt +%%PORTDOCS%%%%DOCSDIR%%/README.textile + at dir lib/elasticsearch/lib + at dir lib/elasticsearch/bin + at dir lib/elasticsearch/plugins + at dir lib/elasticsearch + at dir libexec/elasticsearch + at dir(%%SEARCHUSER%%,%%SEARCHGROUP%%,750) %%ELASTIC_LOGDIR%% + at dir(%%SEARCHUSER%%,%%SEARCHGROUP%%,750) %%ELASTIC_DBDIR%% + at postunexec if [ -d %%ELASTIC_LOGDIR%% ]; then echo "You should remove %%ELASTIC_LOGDIR%% if you don't need it any more."; fi + at postunexec if [ -d %%ELASTIC_DBDIR%% ]; then echo "You should remove %%ELASTIC_DBDIR%% if you don't need it any more."; fi Property changes on: trunk/textproc/elasticsearch2/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 00:02:18 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 00:02:18 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21459] trunk/sysutils: add logstash based on freebsd port Message-ID: <201605260402.u4Q42I0F088305@stargazer.midnightbsd.org> Revision: 21459 http://svnweb.midnightbsd.org/mports/?rev=21459 Author: laffer1 Date: 2016-05-26 00:02:18 -0400 (Thu, 26 May 2016) Log Message: ----------- add logstash based on freebsd port Modified Paths: -------------- trunk/sysutils/Makefile Added Paths: ----------- trunk/sysutils/logstash/ trunk/sysutils/logstash/Makefile trunk/sysutils/logstash/distinfo trunk/sysutils/logstash/files/ trunk/sysutils/logstash/files/logstash.conf.sample trunk/sysutils/logstash/files/logstash.in trunk/sysutils/logstash/pkg-descr trunk/sysutils/logstash/pkg-message trunk/sysutils/logstash/pkg-plist Modified: trunk/sysutils/Makefile =================================================================== --- trunk/sysutils/Makefile 2016-05-26 03:57:22 UTC (rev 21458) +++ trunk/sysutils/Makefile 2016-05-26 04:02:18 UTC (rev 21459) @@ -62,6 +62,7 @@ SUBDIR += libsunacl SUBDIR += linux-f10-procps SUBDIR += lmmon +SUBDIR += logstash SUBDIR += lsof SUBDIR += mbmon SUBDIR += mdf2iso Added: trunk/sysutils/logstash/Makefile =================================================================== --- trunk/sysutils/logstash/Makefile (rev 0) +++ trunk/sysutils/logstash/Makefile 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,55 @@ +# Created by: Daniel Solsona , Guido Falsi +# $FreeBSD: head/sysutils/logstash/Makefile 402867 2015-12-03 02:45:41Z junovitch $ +# $MidnightBSD$ + +PORTNAME= logstash +PORTVERSION= 2.1.0 +CATEGORIES= sysutils java +MASTER_SITES= http://download.elastic.co/logstash/logstash/ + +MAINTAINER= ports at MidnightBSD.org +COMMENT= Tool for managing events and logs + +LICENSE= apache2 + +RUN_DEPENDS= ${LOCALBASE}/bin/bash:${PORTSDIR}/shells/bash + +USES= cpe +CPE_VENDOR= elasticsearch +USE_JAVA= yes +JAVA_VERSION= 1.7+ +JAVA_EXTRACT= yes +JAVA_RUN= yes +NO_BUILD= yes + +LOGSTASH_DIR= ${PREFIX}/${PORTNAME} + +USE_RC_SUBR= logstash + +LOGSTASH_HOME?= ${PREFIX}/${PORTNAME} +LOGSTASH_RUN?= /var/run/${PORTNAME} +LOGSTASH_DATA_DIR?= /var/db/${PORTNAME} + +SUB_LIST= LOGSTASH_DATA_DIR=${LOGSTASH_DATA_DIR} JAVA_HOME=${JAVA_HOME} \ + LOGSTASH_HOME=${LOGSTASH_HOME} + +LOGSTASH_BIN_FILES= logstash +LOGSTASH_JRUBY_SUBDIR= vendor/jruby/bin +LOGSTASH_JRUBY_BIN_FILES= ast irb jirb jruby jruby.sh rdoc testrb gem \ + jgem jirb_swing jruby.bash jrubyc rake ri + +do-install: + @${FIND} ${WRKSRC} -name '*.bat' -delete + ${MKDIR} ${STAGEDIR}${ETCDIR} + ${MKDIR} ${STAGEDIR}${LOGSTASH_RUN} + ${MKDIR} ${STAGEDIR}${LOGSTASH_DATA_DIR} + @(cd ${WRKSRC} && ${COPYTREE_SHARE} . ${STAGEDIR}${LOGSTASH_DIR}) + ${INSTALL_DATA} ${FILESDIR}/logstash.conf.sample ${STAGEDIR}${ETCDIR} +.for x in ${LOGSTASH_BIN_FILES} + @${CHMOD} ${BINMODE} ${STAGEDIR}${LOGSTASH_DIR}/bin/${x} +.endfor +.for x in ${LOGSTASH_JRUBY_BIN_FILES} + @${CHMOD} ${BINMODE} ${STAGEDIR}${LOGSTASH_DIR}/${LOGSTASH_JRUBY_SUBDIR}/${x} +.endfor + +.include Property changes on: trunk/sysutils/logstash/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/distinfo =================================================================== --- trunk/sysutils/logstash/distinfo (rev 0) +++ trunk/sysutils/logstash/distinfo 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,2 @@ +SHA256 (logstash-2.1.0.tar.gz) = 1f132e0fc9fc46ebe836951bb44c5cd1a5f8e3f653bb44bded55300cc6c892dc +SIZE (logstash-2.1.0.tar.gz) = 73512846 Property changes on: trunk/sysutils/logstash/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/files/logstash.conf.sample =================================================================== --- trunk/sysutils/logstash/files/logstash.conf.sample (rev 0) +++ trunk/sysutils/logstash/files/logstash.conf.sample 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,45 @@ +input { + + file { + type => "syslog" + # path => [ "/var/log/*.log", "/var/log/messages", "/var/log/syslog" ] + path => "/var/log/messages" + start_position => "beginning" + } +} + +filter { +# An filter may change the regular expression used to match a record or a field, +# alter the value of parsed fields, add or remove fields, etc. +# +# if [type] == "syslog" { +# grok { +# match => { "message" => "%{SYSLOGTIMESTAMP:syslog_timestamp} %{SYSLOGHOST:syslog_hostname} (%{DATA:syslog_program}(?:\[%{POSINT:syslog_pid}\])?: %{GREEDYDATA:syslog_message}|%{GREEDYDATA:syslog_message})" } +# add_field => [ "received_at", "%{@timestamp}" ] +# add_field => [ "received_from", "%{@source_host}" ] +# } +# +# if !("_grokparsefailure" in [tags]) { +# mutate { +# replace => [ "@source_host", "%{syslog_hostname}" ] +# replace => [ "@message", "%{syslog_message}" ] +# } +# } +# mutate { +# remove_field => [ "syslog_hostname", "syslog_message" ] +# } +# date { +# match => [ "syslog_timestamp","MMM d HH:mm:ss", "MMM dd HH:mm:ss", "ISO8601" ] +# } +# syslog_pri { } +# } +} + +output { + # Emit events to stdout for easy debugging of what is going through + # logstash. + # stdout { codec => rubydebug } + + # This will use elasticsearch to store your logs. + # elasticsearch { hosts => [ "localhost:9200" ] } +} Property changes on: trunk/sysutils/logstash/files/logstash.conf.sample ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/files/logstash.in =================================================================== --- trunk/sysutils/logstash/files/logstash.in (rev 0) +++ trunk/sysutils/logstash/files/logstash.in 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,100 @@ +#!/bin/sh + +# Configuration settings for logstash in /etc/rc.conf: +# +# PROVIDE: logstash +# REQUIRE: DAEMON +# BEFORE: LOGIN +# KEYWORD: shutdown +# +# logstash_enable (bool): +# Default value: "NO" +# Flag that determines whether Logstash is enabled. +# +# logstash_home (string): +# Default value: "/usr/local/logstash" +# Logstash installation directory. +# +# logstash_config (string): +# Default value: /usr/local/etc/${name}/${name}.conf +# Logstash configuration file path. +# +# logstash_log (bool): +# Set to "NO" by default. +# Set it to "YES" to enable logstash logging to file +# Default output to /var/log/logstash.log +# +# logstash_log_file (string): +# Default value: "${logdir}/${name}.log" +# Log file path. +# +# logstash_java_home (string): +# Default value: "/usr/local/openjdk6" +# Root directory of the desired Java SDK. +# The JAVA_HOME environment variable is set with the contents of this +# variable. +# +# logstash_java_opts (string): +# Default value: "" +# Options to pass to the Java Virtual Machine. +# The JAVA_OPTS environment variable is set with the contents of this +# variable. +# +# logstash_elastic_datadir (string): +# Default value: "/var/db/logstash". +# Data directory of the embedded ElasticSearch instance. +# + +. /etc/rc.subr + +name=logstash +rcvar=logstash_enable + +load_rc_config ${name} + +logdir="/var/log" + +: ${logstash_enable="NO"} +: ${logstash_home="%%LOGSTASH_HOME%%"} +: ${logstash_config="%%ETCDIR%%/${name}.conf"} +: ${logstash_log="NO"} +: ${logstash_log_file="${logdir}/${name}.log"} +: ${logstash_java_home="%%JAVA_HOME%%"} +: ${logstash_java_opts=""} +: ${logstash_elastic_datadir="%%LOGSTASH_DATA_DIR%%"} + +piddir=/var/run/${name} +pidfile=${piddir}/${name}.pid + +if [ -d $piddir ]; then + mkdir -p $piddir +fi + +logstash_cmd="${logstash_home}/bin/logstash" +procname="${logstash_java_home}/bin/java" + +logstash_chdir=${logstash_home} +logstash_log_options="" +logstash_elastic_options="" + +if checkyesno logstash_log; then + logstash_log_options=" --log ${logstash_log_file}" +fi + +logstash_args="agent -f ${logstash_config} ${logstash_log_options}" +logstash_elastic_options="-Des.path.data=${logstash_elastic_datadir}" + +JAVA_OPTS="${logstash_java_opts} ${logstash_elastic_options}" +JAVA_HOME="${logstash_java_home}" +export JAVA_OPTS +export JAVA_HOME + +command="/usr/sbin/daemon" +command_args="-f -p ${pidfile} ${logstash_cmd} ${logstash_args}" +required_files="${logstash_home} ${logstash_java_home} ${logstash_cmd} ${logstash_config}" + +# Include /usr/local/bin in path because Logstash startup scripts +# assume bash is in path. +PATH=/usr/local/bin:$PATH + +run_rc_command "$1" Property changes on: trunk/sysutils/logstash/files/logstash.in ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/pkg-descr =================================================================== --- trunk/sysutils/logstash/pkg-descr (rev 0) +++ trunk/sysutils/logstash/pkg-descr 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,6 @@ +Logstash is a tool for managing events and logs. You can use it to collect +logs, parse them, and store them for later use (like, for searching). Speaking +of searching, logstash comes with a web interface for searching and drilling +into all of your logs. + +WWW: http://logstash.net/ Property changes on: trunk/sysutils/logstash/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/pkg-message =================================================================== --- trunk/sysutils/logstash/pkg-message (rev 0) +++ trunk/sysutils/logstash/pkg-message 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,14 @@ +To start logstash as an agent during startup, add + + logstash_enable="YES" + +to your /etc/rc.conf. + +Extra options can be found in startup script. + +NOTE: Since version 1.5.0, logstash is started in agent mode. +The Kibana web application is no longer embedded in this Logstash +distribution. + +NOTE: Since version 2, logstash does not support an embedded +ElasticSearch instance. Property changes on: trunk/sysutils/logstash/pkg-message ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/pkg-plist =================================================================== --- trunk/sysutils/logstash/pkg-plist (rev 0) +++ trunk/sysutils/logstash/pkg-plist 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,9285 @@ + at sample %%ETCDIR%%/logstash.conf.sample +logstash/CHANGELOG.md +logstash/CONTRIBUTORS +logstash/Gemfile +logstash/Gemfile.jruby-1.9.lock +logstash/LICENSE +logstash/NOTICE.TXT +logstash/bin/logstash +logstash/bin/logstash.lib.sh +logstash/bin/plugin +logstash/bin/rspec +logstash/lib/bootstrap/bundler.rb +logstash/lib/bootstrap/environment.rb +logstash/lib/bootstrap/rspec.rb +logstash/lib/bootstrap/rubygems.rb +logstash/lib/bootstrap/util/compress.rb +logstash/lib/pluginmanager/command.rb +logstash/lib/pluginmanager/gemfile.rb +logstash/lib/pluginmanager/install.rb +logstash/lib/pluginmanager/list.rb +logstash/lib/pluginmanager/main.rb +logstash/lib/pluginmanager/pack.rb +logstash/lib/pluginmanager/pack_command.rb +logstash/lib/pluginmanager/uninstall.rb +logstash/lib/pluginmanager/unpack.rb +logstash/lib/pluginmanager/update.rb +logstash/lib/pluginmanager/util.rb +logstash/vendor/bundle/jruby/1.9/bin/aws-rb +logstash/vendor/bundle/jruby/1.9/bin/aws.rb +logstash/vendor/bundle/jruby/1.9/bin/bundle +logstash/vendor/bundle/jruby/1.9/bin/bundler +logstash/vendor/bundle/jruby/1.9/bin/coderay +logstash/vendor/bundle/jruby/1.9/bin/file-deps +logstash/vendor/bundle/jruby/1.9/bin/fpm +logstash/vendor/bundle/jruby/1.9/bin/gelfd +logstash/vendor/bundle/jruby/1.9/bin/geoip +logstash/vendor/bundle/jruby/1.9/bin/globtail +logstash/vendor/bundle/jruby/1.9/bin/httparty +logstash/vendor/bundle/jruby/1.9/bin/lock_jars +logstash/vendor/bundle/jruby/1.9/bin/minitar +logstash/vendor/bundle/jruby/1.9/bin/nokogiri +logstash/vendor/bundle/jruby/1.9/bin/pry +logstash/vendor/bundle/jruby/1.9/bin/puma +logstash/vendor/bundle/jruby/1.9/bin/pumactl +logstash/vendor/bundle/jruby/1.9/bin/rackup +logstash/vendor/bundle/jruby/1.9/bin/rmvn +logstash/vendor/bundle/jruby/1.9/bin/rubygems-cabin-test +logstash/vendor/bundle/jruby/1.9/bin/sequel +logstash/vendor/bundle/jruby/1.9/bin/tt +logstash/vendor/bundle/jruby/1.9/bin/user_agent_parser +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/CHANGELOG.md +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/Gemfile +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/LICENSE.txt +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/README.md +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/Rakefile +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/addressable.gemspec +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/data/unicode.data +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/lib/addressable/idna.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/lib/addressable/idna/native.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/lib/addressable/idna/pure.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/lib/addressable/template.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/lib/addressable/uri.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/lib/addressable/version.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/spec/addressable/idna_spec.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/spec/addressable/net_http_compat_spec.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/spec/addressable/template_spec.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/spec/addressable/uri_spec.rb +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/spec/spec_helper.rb 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+logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/configure_builder.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/ext_conf_builder.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/rake_builder.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/gem_runner.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/gemcutter_utilities.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/indexer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/install_default_message.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/install_message.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/install_update_options.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/installer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/installer_test_case.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/local_remote_options.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/mock_gem_ui.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/name_tuple.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/digest_io.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/file_source.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/io_source.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/old.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/source.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_header.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_reader.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_reader/entry.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_test_case.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_writer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package_task.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/path_support.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/platform.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/psych_additions.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/psych_tree.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/rdoc.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/remote_fetcher.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request/connection_pools.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request/http_pool.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request/https_pool.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set/gem_dependency_api.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set/lockfile.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set/lockfile/parser.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set/lockfile/tokenizer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/requirement.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/activation_request.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/api_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/api_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/best_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/composed_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/conflict.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/current_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/dependency_request.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/git_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/git_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/index_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/index_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/installed_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/installer_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/local_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/lock_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/lock_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/requirement_list.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/spec_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/stats.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/vendor_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/vendor_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security/policies.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security/policy.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security/signer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security/trust_dir.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/server.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/git.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/installed.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/local.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/lock.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/specific_file.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/vendor.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source_list.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source_local.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source_specific_file.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/spec_fetcher.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/AddTrustExternalCARoot-2048.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/AddTrustExternalCARoot.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/Class3PublicPrimaryCertificationAuthority.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/DigiCertHighAssuranceEVRootCA.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/Entrust_net-Secure-Server-Certification-Authority.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/EntrustnetSecureServerCertificationAuthority.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/GeoTrustGlobalCA.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/GeoTrust_Global_CA.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/VerisignClass3PublicPrimaryCertificationAuthority-G2.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/stub_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/syck_hack.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/test_case.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/test_utilities.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/text.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/uninstaller.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/uri_formatter.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/user_interaction.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/util.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/util/list.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/util/stringio.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/validator.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/version.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/version_option.rb +logstash/vendor/jruby/lib/ruby/shared/securerandom.rb +logstash/vendor/jruby/lib/ruby/shared/syslog.rb +logstash/vendor/jruby/lib/ruby/shared/tempfile.rb +logstash/vendor/jruby/lib/ruby/shared/tmpdir.rb +logstash/vendor/jruby/lib/ruby/shared/ubygems.rb +logstash/vendor/jruby/tool/nailgun/Makefile.in +logstash/vendor/jruby/tool/nailgun/README.txt +logstash/vendor/jruby/tool/nailgun/configure +logstash/vendor/jruby/tool/nailgun/ng.exe +logstash/vendor/jruby/tool/nailgun/src/c/ng.c + at dir logstash/vendor/bundle/jruby/1.9/build_info + at dir logstash/vendor/bundle/jruby/1.9/cache + at dir logstash/vendor/bundle/jruby/1.9/doc + at dir logstash/vendor/bundle/jruby/1.9/extensions + at dir logstash/vendor/bundle/jruby/1.9/gems/manticore-0.4.4-java/spec/ssl + at dir logstash/vendor/bundle/jruby/1.9/gems/redis-3.2.2/test/db + at dir logstash/vendor/bundle/ruby/1.9.1/build_info + at dir logstash/vendor/bundle/ruby/1.9.1/cache + at dir logstash/vendor/bundle/ruby/1.9.1/doc + at dir logstash/vendor/bundle/ruby/1.9.1/extensions + at dir /var/db/logstash + at dir /var/run/logstash Property changes on: trunk/sysutils/logstash/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 08:48:01 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 08:48:01 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21460] trunk/sysutils/devcpu-data: update the microcode files Message-ID: <201605261248.u4QCm196047009@stargazer.midnightbsd.org> Revision: 21460 http://svnweb.midnightbsd.org/mports/?rev=21460 Author: laffer1 Date: 2016-05-26 08:48:00 -0400 (Thu, 26 May 2016) Log Message: ----------- update the microcode files Modified Paths: -------------- trunk/sysutils/devcpu-data/Makefile trunk/sysutils/devcpu-data/distinfo trunk/sysutils/devcpu-data/pkg-plist Modified: trunk/sysutils/devcpu-data/Makefile =================================================================== --- trunk/sysutils/devcpu-data/Makefile 2016-05-26 04:02:18 UTC (rev 21459) +++ trunk/sysutils/devcpu-data/Makefile 2016-05-26 12:48:00 UTC (rev 21460) @@ -1,12 +1,12 @@ # $MidnightBSD$ PORTNAME= data -PORTVERSION= 1.5 +PORTVERSION= 1.6 CATEGORIES= sysutils -MASTER_SITES= http://downloadmirror.intel.com/24661/eng/:intel \ +MASTER_SITES= http://downloadmirror.intel.com/25512/eng/:intel \ http://www.amd64.org/microcode/:amd PKGNAMEPREFIX= devcpu- -DISTFILES= microcode-20150121.tgz:intel amd-ucode-2014-12-01.tar.bz2:amd +DISTFILES= microcode-20151106.tgz:intel amd-ucode-2014-12-01.tar.bz2:amd MAINTAINER= ports at MidnightBSD.org COMMENT= Intel and AMD CPUs microcode updates Modified: trunk/sysutils/devcpu-data/distinfo =================================================================== --- trunk/sysutils/devcpu-data/distinfo 2016-05-26 04:02:18 UTC (rev 21459) +++ trunk/sysutils/devcpu-data/distinfo 2016-05-26 12:48:00 UTC (rev 21460) @@ -1,4 +1,4 @@ -SHA256 (microcode-20150121.tgz) = 23353b93bb421971496cea5e9f9d390ce0ed22580a8cc45ae7b3b322dcd8f6b3 -SIZE (microcode-20150121.tgz) = 850761 +SHA256 (microcode-20151106.tgz) = 096e39489eef67666be652e81fa372a06b74f39ea3d565dc0287242c668717e7 +SIZE (microcode-20151106.tgz) = 892805 SHA256 (amd-ucode-2014-12-01.tar.bz2) = e8f37ed12955585a625ee7cd48d89f9a04ceb2afa36081b52cc59d08a3bb8293 SIZE (amd-ucode-2014-12-01.tar.bz2) = 20585 Modified: trunk/sysutils/devcpu-data/pkg-plist =================================================================== --- trunk/sysutils/devcpu-data/pkg-plist 2016-05-26 04:02:18 UTC (rev 21459) +++ trunk/sysutils/devcpu-data/pkg-plist 2016-05-26 12:48:00 UTC (rev 21460) @@ -110,7 +110,7 @@ %%DATADIR%%/m111067AA0B.fw %%DATADIR%%/m1220652_0000000e.fw %%DATADIR%%/m12206a7_00000029.fw -%%DATADIR%%/m12306a9_0000001b.fw +%%DATADIR%%/m12306a9_0000001c.fw %%DATADIR%%/m13106e5_00000007.fw %%DATADIR%%/m16f25d.fw %%DATADIR%%/m16f6d0.fw @@ -124,8 +124,9 @@ %%DATADIR%%/m206f6d1.fw %%DATADIR%%/m206fbBA.fw %%DATADIR%%/m206fda4.fw +%%DATADIR%%/m2240671_00000013.fw %%DATADIR%%/m22f6809.fw -%%DATADIR%%/m32306c3_0000001c.fw +%%DATADIR%%/m32306c3_0000001e.fw %%DATADIR%%/m3240661_00000012.fw %%DATADIR%%/m34f6404.fw %%DATADIR%%/m401067660F.fw @@ -138,10 +139,11 @@ %%DATADIR%%/m5ff4807.fw %%DATADIR%%/m6d206d6_00000619.fw %%DATADIR%%/m6d206d7_00000710.fw -%%DATADIR%%/m6f306f2_00000029.fw -%%DATADIR%%/m7240651_0000001c.fw +%%DATADIR%%/m6f306f2_00000036.fw +%%DATADIR%%/m7240651_0000001d.fw %%DATADIR%%/m801066144.fw %%DATADIR%%/m801067660F.fw +%%DATADIR%%/m80306f4_00000009.fw %%DATADIR%%/m8069547.fw %%DATADIR%%/m806ec59.fw %%DATADIR%%/m806fa95.fw @@ -154,7 +156,7 @@ %%DATADIR%%/mA01067AA0B.fw %%DATADIR%%/mbdf4117.fw %%DATADIR%%/mbdf4903.fw -%%DATADIR%%/mc0306d4_00000018.fw +%%DATADIR%%/mc0306d4_00000022.fw %%DATADIR%%/med306e4_00000428.fw %%DATADIR%%/med306e6_00000600.fw %%DATADIR%%/med306e7_0000070d.fw From laffer1 at midnightbsd.org Thu May 26 23:13:19 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:13:19 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21461] trunk/print: add pycups Message-ID: <201605270313.u4R3DJCe043121@stargazer.midnightbsd.org> Revision: 21461 http://svnweb.midnightbsd.org/mports/?rev=21461 Author: laffer1 Date: 2016-05-26 23:13:18 -0400 (Thu, 26 May 2016) Log Message: ----------- add pycups Modified Paths: -------------- trunk/print/Makefile Added Paths: ----------- trunk/print/py-pycups/ trunk/print/py-pycups/Makefile trunk/print/py-pycups/distinfo trunk/print/py-pycups/pkg-descr Modified: trunk/print/Makefile =================================================================== --- trunk/print/Makefile 2016-05-26 12:48:00 UTC (rev 21460) +++ trunk/print/Makefile 2016-05-27 03:13:18 UTC (rev 21461) @@ -48,6 +48,7 @@ SUBDIR += pdflib SUBDIR += pecl-pdflib SUBDIR += psutils +SUBDIR += py-pycups SUBDIR += qpdf SUBDIR += t1utils SUBDIR += tex-basic-engines Added: trunk/print/py-pycups/Makefile =================================================================== --- trunk/print/py-pycups/Makefile (rev 0) +++ trunk/print/py-pycups/Makefile 2016-05-27 03:13:18 UTC (rev 21461) @@ -0,0 +1,37 @@ +# Created by: Michael Johnson +# $FreeBSD: head/print/py-pycups/Makefile 410825 2016-03-11 11:53:42Z tijl $ +# $MidnightBSD$ + +PORTNAME= pycups +PORTVERSION= 1.9.73 +CATEGORIES= print python +MASTER_SITES= CHEESESHOP +PKGNAMEPREFIX= ${PYTHON_PKGNAMEPREFIX} + +MAINTAINER= ports at MidnightBSD.org +COMMENT= CUPS bindings for Python + +LICENSE= gpl2 gpl3 +LICENSE_COMB= dual + +LIB_DEPENDS= libcups.so:${PORTSDIR}/print/cups + +USE_PYTHON= autoplist concurrent distutils +USES= iconv localbase python tar:bzip2 + +.include + +post-patch: + @${REINPLACE_CMD} -e 's|^\(VERSION=\).*$$|\1${PORTVERSION}|' ${WRKSRC}/Makefile +.if empty(ICONV_LIB) + @${REINPLACE_CMD} -e 's| or sys.platform.startswith("freebsd"):|:|' ${WRKSRC}/setup.py +.endif + +pre-configure: + @${REINPLACE_CMD} -e 's|/usr/local|${LOCALBASE}|g' ${WRKSRC}/cupsconnection.c + @${REINPLACE_CMD} -e 's|#ifdef __SVR4|#ifdef __FreeBSD__|' ${WRKSRC}/cupsppd.c + +post-install: + ${STRIP_CMD} ${FAKE_DESTDIR}${PYTHON_SITELIBDIR}/cups.so + +.include Property changes on: trunk/print/py-pycups/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/print/py-pycups/distinfo =================================================================== --- trunk/print/py-pycups/distinfo (rev 0) +++ trunk/print/py-pycups/distinfo 2016-05-27 03:13:18 UTC (rev 21461) @@ -0,0 +1,2 @@ +SHA256 (pycups-1.9.73.tar.bz2) = c381be011889ca6f728598578c89c8ac9f7ab1e95b614474df9f2fa831ae5335 +SIZE (pycups-1.9.73.tar.bz2) = 52732 Property changes on: trunk/print/py-pycups/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/print/py-pycups/pkg-descr =================================================================== --- trunk/print/py-pycups/pkg-descr (rev 0) +++ trunk/print/py-pycups/pkg-descr 2016-05-27 03:13:18 UTC (rev 21461) @@ -0,0 +1,4 @@ +CUPS bindings for Python + +WWW: https://pypi.python.org/pypi/pycups +WWW: http://cyberelk.net/tim/software/pycups/ Property changes on: trunk/print/py-pycups/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:14:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:14:00 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21462] trunk/math/lapack/files: add patches Message-ID: <201605270314.u4R3E0aG043227@stargazer.midnightbsd.org> Revision: 21462 http://svnweb.midnightbsd.org/mports/?rev=21462 Author: laffer1 Date: 2016-05-26 23:14:00 -0400 (Thu, 26 May 2016) Log Message: ----------- add patches Added Paths: ----------- trunk/math/lapack/files/patch-Makefile trunk/math/lapack/files/patch-lapacke+Makefile trunk/math/lapack/files/patch-lapacke+src+Makefile Added: trunk/math/lapack/files/patch-Makefile =================================================================== --- trunk/math/lapack/files/patch-Makefile (rev 0) +++ trunk/math/lapack/files/patch-Makefile 2016-05-27 03:14:00 UTC (rev 21462) @@ -0,0 +1,11 @@ +--- Makefile.orig 2012-09-09 00:53:46.000000000 +0900 ++++ Makefile 2012-09-09 00:53:57.000000000 +0900 +@@ -23,7 +23,7 @@ + lapacklib: lapack_install + ( cd SRC; $(MAKE) ) + +-lapackelib: lapacklib ++lapackelib: + ( cd lapacke; $(MAKE) ) + + lapacke_example: lapackelib Property changes on: trunk/math/lapack/files/patch-Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/math/lapack/files/patch-lapacke+Makefile =================================================================== --- trunk/math/lapack/files/patch-lapacke+Makefile (rev 0) +++ trunk/math/lapack/files/patch-lapacke+Makefile 2016-05-27 03:14:00 UTC (rev 21462) @@ -0,0 +1,30 @@ +--- lapacke/Makefile.orig 2012-09-09 00:48:05.000000000 +0900 ++++ lapacke/Makefile 2012-09-09 00:48:54.000000000 +0900 +@@ -45,20 +45,20 @@ + all: lapacke + + lapacke: +- cd include && cp lapacke_mangling_with_flags.h lapacke_mangling.h +- cd src && $(MAKE) +- cd utils && $(MAKE) ++ cd ${.CURDIR}/include && cp lapacke_mangling_with_flags.h lapacke_mangling.h ++ cd ${.CURDIR}/src && $(MAKE) ++ cd ${.CURDIR}/utils && $(MAKE) + + lapacke_example: +- cd example && $(MAKE) ++ cd ${.CURDIR}/example && $(MAKE) + + clean: cleanlib + + cleanlib: +- cd src && $(MAKE) clean +- cd utils && $(MAKE) clean ++ cd ${.CURDIR}/src && $(MAKE) clean ++ cd ${.CURDIR}/utils && $(MAKE) clean + + cleanall: clean + rm -f $(LAPACKE) +- cd example && $(MAKE) clean ++ cd ${.CURDIR}/example && $(MAKE) clean + Property changes on: trunk/math/lapack/files/patch-lapacke+Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/math/lapack/files/patch-lapacke+src+Makefile =================================================================== --- trunk/math/lapack/files/patch-lapacke+src+Makefile (rev 0) +++ trunk/math/lapack/files/patch-lapacke+src+Makefile 2016-05-27 03:14:00 UTC (rev 21462) @@ -0,0 +1,29 @@ +--- lapacke/src/Makefile.orig 2012-04-03 05:16:32.000000000 +0900 ++++ lapacke/src/Makefile 2012-09-09 01:28:00.000000000 +0900 +@@ -2042,19 +2042,23 @@ + + ALLOBJ = $(SRC_OBJ) $(MATGEN_OBJ) + +-ifdef USEXBLAS ++.ifdef USEXBLAS + ALLXOBJ = $(SXLASRC) $(DXLASRC) $(CXLASRC) $(ZXLASRC) +-endif ++.endif + + + OBJ_FILES := $(C_FILES:.o=.o) + +-all: ../../$(LAPACKELIB) ++all: ../../$(LAPACKELIB) ../../$(LAPACKETMGLIB) + + ../../$(LAPACKELIB): $(ALLOBJ) $(ALLXOBJ) + $(ARCH) $(ARCHFLAGS) ../../$(LAPACKELIB) $(ALLOBJ) $(ALLXOBJ) + $(RANLIB) ../../$(LAPACKELIB) + ++../../$(LAPACKETMGLIB): $(MATGEN_OBJ) ++ $(ARCH) $(ARCHFLAGS) ../../$(LAPACKETMGLIB) $(MATGEN_OBJ) ++ $(RANLIB) ../../$(LAPACKETMGLIB) ++ + .c.o: + $(CC) -c $(CFLAGS) -I ../include -o $@ $< + Property changes on: trunk/math/lapack/files/patch-lapacke+src+Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:14:42 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:14:42 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21463] trunk/graphics/ImageMagick/files: add patches Message-ID: <201605270314.u4R3Egu2043326@stargazer.midnightbsd.org> Revision: 21463 http://svnweb.midnightbsd.org/mports/?rev=21463 Author: laffer1 Date: 2016-05-26 23:14:42 -0400 (Thu, 26 May 2016) Log Message: ----------- add patches Added Paths: ----------- trunk/graphics/ImageMagick/files/ trunk/graphics/ImageMagick/files/patch-config_policy.xml Added: trunk/graphics/ImageMagick/files/patch-config_policy.xml =================================================================== --- trunk/graphics/ImageMagick/files/patch-config_policy.xml (rev 0) +++ trunk/graphics/ImageMagick/files/patch-config_policy.xml 2016-05-27 03:14:42 UTC (rev 21463) @@ -0,0 +1,12 @@ +--- config/policy.xml.orig 2016-05-09 19:28:58.000000000 +0200 ++++ config/policy.xml 2016-05-10 17:44:26.720503000 +0200 +@@ -64,4 +64,9 @@ + + + ++ ++ ++ ++ ++ + Property changes on: trunk/graphics/ImageMagick/files/patch-config_policy.xml ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:19:37 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:19:37 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7574] trunk/lib/libpmc: lower warns level Message-ID: <201605270319.u4R3JbVr043909@stargazer.midnightbsd.org> Revision: 7574 http://svnweb.midnightbsd.org/src/?rev=7574 Author: laffer1 Date: 2016-05-26 23:19:37 -0400 (Thu, 26 May 2016) Log Message: ----------- lower warns level Modified Paths: -------------- trunk/lib/libpmc/Makefile Removed Paths: ------------- trunk/lib/libpmc/pmc.xscale.3 Modified: trunk/lib/libpmc/Makefile =================================================================== --- trunk/lib/libpmc/Makefile 2016-05-23 03:00:30 UTC (rev 7573) +++ trunk/lib/libpmc/Makefile 2016-05-27 03:19:37 UTC (rev 7574) @@ -5,6 +5,8 @@ SRCS= libpmc.c pmclog.c INCS= pmc.h pmclog.h +WARNS= 3 + MAN= pmc.3 MAN+= pmc_allocate.3 MAN+= pmc_attach.3 @@ -23,7 +25,6 @@ MAN+= pmc.soft.3 # PMC-dependent manual pages -.if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64" MAN+= pmc.atom.3 MAN+= pmc.core.3 MAN+= pmc.core2.3 @@ -41,9 +42,6 @@ MAN+= pmc.westmere.3 MAN+= pmc.westmereuc.3 MAN+= pmc.tsc.3 -.elif ${MACHINE_CPUARCH} == "arm" && ${CPUTYPE} == "xscale" -MAN+= pmc.xscale.3 -.endif MLINKS+= \ pmc_allocate.3 pmc_release.3 \ Deleted: trunk/lib/libpmc/pmc.xscale.3 =================================================================== --- trunk/lib/libpmc/pmc.xscale.3 2016-05-23 03:00:30 UTC (rev 7573) +++ trunk/lib/libpmc/pmc.xscale.3 2016-05-27 03:19:37 UTC (rev 7574) @@ -1,157 +0,0 @@ -.\" Copyright (c) 2009, 2010 Rui Paulo. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" $MidnightBSD$ -.\" -.Dd December 23, 2009 -.Dt PMC.XSCALE 3 -.Os -.Sh NAME -.Nm pmc.xscale -.Nd measurement events for -.Tn Intel -.Tn XScale -family CPUs -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -.Tn Intel XScale -CPUs are ARM CPUs based on the ARMv5e core. -.Pp -Second generation cores have 2 counters, while third generation cores -have 4 counters. -Third generation cores also have an increased number of PMC events. -.Pp -.Tn Intel XScale -PMCs are documented in -.Rs -.%B "3rd Generation Intel XScale Microarchitecture Developer's Manual" -.%D May 2007 -.Re -.Ss Event Specifiers (Programmable PMCs) -.Tn Intel XScale -programmable PMCs support the following events: -.Bl -tag -width indent -.It Li IC_FETCH -External memory fetch due to L1 instruction cache miss. -.It Li IC_MISS -Instruction cache or TLB miss. -.It Li DATA_DEPENDENCY_STALLED -A data dependency stalled -.It Li ITLB_MISS -Instruction TLB miss. -.It Li DTLB_MISS -Data TLB miss. -.It Li BRANCH_RETIRED -Branch instruction retired (executed). -.It Li BRANCH_MISPRED -Branch mispredicted. -.It Li INSTR_RETIRED -Instructions retired (executed). -.It Li DC_FULL_CYCLE -L1 data cache buffer full stall. -Event occurs on every cycle the -condition is present. -.It Li DC_FULL_CONTIG -L1 data cache buffer full stall. -Event occurs once for each contiguous sequence of this type of stall. -.It Li DC_ACCESS -L1 data cache access, not including cache operations. -.It Li DC_MISS -L1 data cache miss, not including cache operations. -.It Li DC_WRITEBACK -L1 data cache write-back. -Occurs for each cache line that's written back from the cache. -.It Li PC_CHANGE -Software changed the program counter. -.It Li BRANCH_RETIRED_ALL -Branch instruction retired (executed). -This event counts all branch instructions, indirect or direct. -.It Li INSTR_CYCLE -Count the number of microarchitecture cycles each instruction requires -to issue. -.It Li CP_STALL -Coprocessor stalled the instruction pipeline. -.It Li PC_CHANGE_ALL -Software changed the program counter (includes exceptions). -.It Li PIPELINE_FLUSH -Pipeline flushes due to mispredictions or exceptions. -.It Li BACKEND_STALL -Backend stalled the instruction pipeline. -.It Li MULTIPLIER_USE -Multiplier used. -.It Li MULTIPLIER_STALLED -Multiplier stalled the instruction pipeline. -.It Li DATA_CACHE_STALLED -Data cache stalled the instruction pipeline. -.It Li L2_CACHE_REQ -L2 cache request, not including cache operations. -.It Li L2_CACHE_MISS -L2 cache miss, not including cache operations. -.It Li ADDRESS_BUS_TRANS -Address bus transaction. -.It Li SELF_ADDRESS_BUS_TRANS -Self initiated address bus transaction. -.It Li DATA_BUS_TRANS -Data bus transaction. -.El -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "BRANCH_MISPRED" -.It Em Alias Ta Em Event Ta -.It Li branches Ta Li BRANCH_RETIRED Ta -.It Li branch-mispredicts Ta Li BRANCH_MISPRED Ta -.It Li dc-misses Ta Li DC_MISS Ta -.It Li ic-misses Ta Li IC_MISS Ta -.It Li instructions Ta Li INSTR_RETIRED Ta -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc_cpuinfo 3 , -.Xr pmclog 3 , -.Xr pmc.soft 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -Intel XScale support first appeared in -.Fx 9.0 . -.Sh AUTHORS -The -.Lb libpmc -library was written by -.An "Joseph Koshy" -.Aq jkoshy at FreeBSD.org . -.Pp -Intel XScale support was added by -.An "Rui Paulo" -.Aq rpaulo at FreeBSD.org . -.Sh CAVEATS -The Intel XScale code does not yet support sampling. From laffer1 at midnightbsd.org Thu May 26 23:21:51 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:21:51 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7575] trunk/sys/modules/pmc/: delete pmc Message-ID: <201605270321.u4R3Lpas044420@stargazer.midnightbsd.org> Revision: 7575 http://svnweb.midnightbsd.org/src/?rev=7575 Author: laffer1 Date: 2016-05-26 23:21:51 -0400 (Thu, 26 May 2016) Log Message: ----------- delete pmc Removed Paths: ------------- trunk/sys/modules/pmc/ From laffer1 at midnightbsd.org Thu May 26 23:22:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:22:00 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7576] trunk/sys/modules/Makefile: remove pmc Message-ID: <201605270322.u4R3M0c9044471@stargazer.midnightbsd.org> Revision: 7576 http://svnweb.midnightbsd.org/src/?rev=7576 Author: laffer1 Date: 2016-05-26 23:22:00 -0400 (Thu, 26 May 2016) Log Message: ----------- remove pmc Modified Paths: -------------- trunk/sys/modules/Makefile Modified: trunk/sys/modules/Makefile =================================================================== --- trunk/sys/modules/Makefile 2016-05-27 03:21:51 UTC (rev 7575) +++ trunk/sys/modules/Makefile 2016-05-27 03:22:00 UTC (rev 7576) @@ -256,7 +256,6 @@ ${_pflog} \ ${_pfsync} \ plip \ - ${_pmc} \ portalfs \ ppbus \ ppc \ From laffer1 at midnightbsd.org Thu May 26 23:22:54 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:22:54 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7577] trunk/sys/modules/hwpmc/Makefile: remove sparc Message-ID: <201605270322.u4R3MsVW044548@stargazer.midnightbsd.org> Revision: 7577 http://svnweb.midnightbsd.org/src/?rev=7577 Author: laffer1 Date: 2016-05-26 23:22:54 -0400 (Thu, 26 May 2016) Log Message: ----------- remove sparc Modified Paths: -------------- trunk/sys/modules/hwpmc/Makefile Property Changed: ---------------- trunk/sys/modules/hwpmc/Makefile Modified: trunk/sys/modules/hwpmc/Makefile =================================================================== --- trunk/sys/modules/hwpmc/Makefile 2016-05-27 03:22:00 UTC (rev 7576) +++ trunk/sys/modules/hwpmc/Makefile 2016-05-27 03:22:54 UTC (rev 7577) @@ -18,8 +18,4 @@ SRCS+= device_if.h bus_if.h .endif -.if ${MACHINE_CPUARCH} == "sparc64" -SRCS+= hwpmc_sparc64.c -.endif - .include Property changes on: trunk/sys/modules/hwpmc/Makefile ___________________________________________________________________ Deleted: cvs2svn:cvs-rev ## -1 +0,0 ## -1.3 \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:31:33 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:31:33 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7578] trunk/sys: update kernel support to include ivy bridge intel chips for hwpmc(4) Message-ID: <201605270331.u4R3VXxo045610@stargazer.midnightbsd.org> Revision: 7578 http://svnweb.midnightbsd.org/src/?rev=7578 Author: laffer1 Date: 2016-05-26 23:31:33 -0400 (Thu, 26 May 2016) Log Message: ----------- update kernel support to include ivy bridge intel chips for hwpmc(4) Modified Paths: -------------- trunk/sys/dev/hwpmc/hwpmc_amd.c trunk/sys/dev/hwpmc/hwpmc_amd.h trunk/sys/dev/hwpmc/hwpmc_arm.c trunk/sys/dev/hwpmc/hwpmc_core.c trunk/sys/dev/hwpmc/hwpmc_core.h trunk/sys/dev/hwpmc/hwpmc_ia64.c trunk/sys/dev/hwpmc/hwpmc_intel.c trunk/sys/dev/hwpmc/hwpmc_logging.c trunk/sys/dev/hwpmc/hwpmc_mips.c trunk/sys/dev/hwpmc/hwpmc_mips24k.c trunk/sys/dev/hwpmc/hwpmc_mips24k.h trunk/sys/dev/hwpmc/hwpmc_mod.c trunk/sys/dev/hwpmc/hwpmc_pentium.c trunk/sys/dev/hwpmc/hwpmc_pentium.h trunk/sys/dev/hwpmc/hwpmc_piv.c trunk/sys/dev/hwpmc/hwpmc_piv.h trunk/sys/dev/hwpmc/hwpmc_powerpc.c trunk/sys/dev/hwpmc/hwpmc_ppro.c trunk/sys/dev/hwpmc/hwpmc_ppro.h trunk/sys/dev/hwpmc/hwpmc_soft.c trunk/sys/dev/hwpmc/hwpmc_soft.h trunk/sys/dev/hwpmc/hwpmc_sparc64.c trunk/sys/dev/hwpmc/hwpmc_tsc.c trunk/sys/dev/hwpmc/hwpmc_tsc.h trunk/sys/dev/hwpmc/hwpmc_uncore.c trunk/sys/dev/hwpmc/hwpmc_uncore.h trunk/sys/dev/hwpmc/hwpmc_x86.c trunk/sys/dev/hwpmc/hwpmc_xscale.c trunk/sys/dev/hwpmc/hwpmc_xscale.h trunk/sys/dev/hwpmc/pmc_events.h trunk/sys/sys/pmc.h trunk/sys/sys/pmckern.h Modified: trunk/sys/dev/hwpmc/hwpmc_amd.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_amd.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_amd.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2008 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_amd.c 241272 2012-10-06 18:59:12Z avg $"); /* Support for the AMD K7 and later processors */ @@ -839,7 +840,7 @@ for (i = 0; i < AMD_NPMCS; i++) { KASSERT(pac->pc_amdpmcs[i].phw_pmc == NULL, ("[amd,%d] CPU%d/PMC%d in use", __LINE__, cpu, i)); - KASSERT(AMD_PMC_IS_STOPPED(AMD_PMC_EVSEL_0 + (i-1)), + KASSERT(AMD_PMC_IS_STOPPED(AMD_PMC_EVSEL_0 + i), ("[amd,%d] CPU%d/PMC%d not stopped", __LINE__, cpu, i)); } #endif Modified: trunk/sys/dev/hwpmc/hwpmc_amd.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_amd.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_amd.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_amd.h 184802 2008-11-09 17:37:54Z jkoshy $ */ /* Machine dependent interfaces */ Modified: trunk/sys/dev/hwpmc/hwpmc_arm.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_arm.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_arm.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_arm.c 250581 2013-05-12 22:01:22Z hiren $"); #include #include @@ -75,12 +76,10 @@ KASSERT(TRAPF_USERMODE(tf) == 0,("[arm,%d] not a kernel backtrace", __LINE__)); + td = curthread; pc = PMC_TRAPFRAME_TO_PC(tf); *cc++ = pc; - if ((td = curthread) == NULL) - return (1); - if (maxsamples <= 1) return (1); @@ -126,12 +125,10 @@ KASSERT(TRAPF_USERMODE(tf), ("[x86,%d] Not a user trap frame tf=%p", __LINE__, (void *) tf)); + td = curthread; pc = PMC_TRAPFRAME_TO_PC(tf); *cc++ = pc; - if ((td = curthread) == NULL) - return (1); - if (maxsamples <= 1) return (1); Modified: trunk/sys/dev/hwpmc/hwpmc_core.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_core.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_core.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -25,11 +26,11 @@ */ /* - * Intel Core, Core 2 and Atom PMCs. + * Intel Core PMCs. */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_core.c 250373 2013-05-08 16:43:52Z hiren $"); #include #include @@ -52,7 +53,8 @@ #define CORE_CPUID_EDX 0x3 #define IAF_PMC_CAPS \ - (PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INTERRUPT) + (PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INTERRUPT | \ + PMC_CAP_USER | PMC_CAP_SYSTEM) #define IAF_RI_TO_MSR(RI) ((RI) + (1 << 30)) #define IAP_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | PMC_CAP_SYSTEM | \ @@ -546,7 +548,7 @@ enum pmc_event iap_ev; unsigned char iap_evcode; unsigned char iap_umask; - unsigned char iap_flags; + unsigned int iap_flags; }; #define IAP_F_CC (1 << 0) /* CPU: Core */ @@ -556,8 +558,12 @@ #define IAP_F_I7 (1 << 4) /* CPU: Core i7 */ #define IAP_F_I7O (1 << 4) /* CPU: Core i7 (old) */ #define IAP_F_WM (1 << 5) /* CPU: Westmere */ -#define IAP_F_SB (1 << 6) /* CPU: Sandy Brdige */ -#define IAP_F_FM (1 << 7) /* Fixed mask */ +#define IAP_F_SB (1 << 6) /* CPU: Sandy Bridge */ +#define IAP_F_IB (1 << 7) /* CPU: Ivy Bridge */ +#define IAP_F_SBX (1 << 8) /* CPU: Sandy Bridge Xeon */ +#define IAP_F_IBX (1 << 9) /* CPU: Ivy Bridge Xeon */ +#define IAP_F_HW (1 << 10) /* CPU: Haswell */ +#define IAP_F_FM (1 << 11) /* Fixed mask */ #define IAP_F_ALLCPUSCORE2 \ (IAP_F_CC | IAP_F_CC2 | IAP_F_CC2E | IAP_F_CA) @@ -597,12 +603,15 @@ IAPDESCR(02H_81H, 0x02, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(03H_00H, 0x03, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB), - IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_WM | IAP_F_SB), + IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(03H_04H, 0x03, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), - IAPDESCR(03H_08H, 0x03, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB), - IAPDESCR(03H_10H, 0x03, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB), + IAPDESCR(03H_08H, 0x03, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(03H_10H, 0x03, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB | + IAP_F_SBX), IAPDESCR(03H_20H, 0x03, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(04H_00H, 0x04, 0x00, IAP_F_FM | IAP_F_CC), @@ -612,8 +621,10 @@ IAPDESCR(04H_08H, 0x04, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(05H_00H, 0x05, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB), - IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_WM | IAP_F_SB), + IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(05H_03H, 0x05, 0x03, IAP_F_FM | IAP_F_I7O), IAPDESCR(06H_00H, 0x06, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2 | @@ -625,28 +636,36 @@ IAPDESCR(06H_0FH, 0x06, 0x0F, IAP_F_FM | IAP_F_I7O), IAPDESCR(07H_00H, 0x07, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(07H_01H, 0x07, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(07H_01H, 0x07, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), IAPDESCR(07H_02H, 0x07, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(07H_03H, 0x07, 0x03, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(07H_06H, 0x07, 0x06, IAP_F_FM | IAP_F_CA), - IAPDESCR(07H_08H, 0x07, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_SB), + IAPDESCR(07H_08H, 0x07, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_SB | + IAP_F_SBX), IAPDESCR(08H_01H, 0x08, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW), IAPDESCR(08H_02H, 0x08, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW), IAPDESCR(08H_04H, 0x08, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_WM | IAP_F_SB), + IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW), IAPDESCR(08H_05H, 0x08, 0x05, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_06H, 0x08, 0x06, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_07H, 0x08, 0x07, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_08H, 0x08, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(08H_09H, 0x08, 0x09, IAP_F_FM | IAP_F_CA), - IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7O), - IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7), + IAPDESCR(08H_0EH, 0x08, 0x0E, IAP_F_FM | IAP_F_HW), + IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX | IAP_F_HW), + IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_HW), + IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW), + IAPDESCR(08H_60H, 0x08, 0x60, IAP_F_FM | IAP_F_HW), + IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_HW), + IAPDESCR(08H_81H, 0x08, 0x81, IAP_F_FM | IAP_F_IB | IAP_F_IBX), + IAPDESCR(08H_82H, 0x08, 0x82, IAP_F_FM | IAP_F_IB | IAP_F_IBX), + IAPDESCR(08H_84H, 0x08, 0x84, IAP_F_FM | IAP_F_IB | IAP_F_IBX), IAPDESCR(09H_01H, 0x09, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), IAPDESCR(09H_02H, 0x09, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), @@ -662,11 +681,15 @@ IAPDESCR(0CH_02H, 0x0C, 0x02, IAP_F_FM | IAP_F_CC2), IAPDESCR(0CH_03H, 0x0C, 0x03, IAP_F_FM | IAP_F_CA), - IAPDESCR(0DH_03H, 0x0D, 0x03, IAP_F_FM | IAP_F_SB), - IAPDESCR(0DH_40H, 0x0D, 0x40, IAP_F_FM | IAP_F_SB), + IAPDESCR(0DH_03H, 0x0D, 0x03, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_HW), + IAPDESCR(0DH_40H, 0x0D, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX), - IAPDESCR(0EH_01H, 0x0E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(0EH_01H, 0x0E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(0EH_02H, 0x0E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0EH_10H, 0x0E, 0x10, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(0EH_20H, 0x0E, 0x20, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(0EH_40H, 0x0E, 0x40, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(0FH_01H, 0x0F, 0x01, IAP_F_FM | IAP_F_I7), IAPDESCR(0FH_02H, 0x0F, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -676,20 +699,25 @@ IAPDESCR(0FH_80H, 0x0F, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(10H_00H, 0x10, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(10H_01H, 0x10, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM | IAP_F_SB), + IAPDESCR(10H_01H, 0x10, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM | IAP_F_SB | IAP_F_SBX), IAPDESCR(10H_02H, 0x10, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(10H_04H, 0x10, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(10H_08H, 0x10, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(10H_10H, 0x10, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(10H_20H, 0x10, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(10H_40H, 0x10, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(10H_80H, 0x10, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(10H_10H, 0x10, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(10H_20H, 0x10, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(10H_40H, 0x10, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(10H_80H, 0x10, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), IAPDESCR(10H_81H, 0x10, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(11H_00H, 0x11, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(11H_01H, 0x11, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_SB), - IAPDESCR(11H_02H, 0x11, 0x02, IAP_F_FM | IAP_F_SB), + IAPDESCR(11H_01H, 0x11, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(11H_02H, 0x11, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX), IAPDESCR(11H_81H, 0x11, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(12H_00H, 0x12, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), @@ -710,11 +738,12 @@ IAPDESCR(13H_81H, 0x13, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(14H_00H, 0x14, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(14H_01H, 0x14, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM | IAP_F_SB), + IAPDESCR(14H_01H, 0x14, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(14H_02H, 0x14, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(17H_01H, 0x17, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(17H_01H, 0x17, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), IAPDESCR(18H_00H, 0x18, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(18H_01H, 0x18, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -736,20 +765,45 @@ IAPDESCR(23H, 0x23, IAP_M_CORE, IAP_F_ALLCPUSCORE2), IAPDESCR(24H, 0x24, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), - IAPDESCR(24H_01H, 0x24, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(24H_01H, 0x24, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(24H_02H, 0x24, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(24H_03H, 0x24, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_04H, 0x24, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_08H, 0x24, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_0CH, 0x24, 0x0C, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_10H, 0x24, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_20H, 0x24, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_30H, 0x24, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_40H, 0x24, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_80H, 0x24, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_C0H, 0x24, 0xC0, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(24H_03H, 0x24, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_04H, 0x24, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_08H, 0x24, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_0CH, 0x24, 0x0C, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_10H, 0x24, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_20H, 0x24, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_21H, 0x24, 0x21, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_22H, 0x24, 0x22, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_24H, 0x24, 0x24, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_27H, 0x24, 0x27, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_30H, 0x24, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(24H_40H, 0x24, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_41H, 0x24, 0x41, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_42H, 0x24, 0x42, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_44H, 0x24, 0x44, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_50H, 0x24, 0x50, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_80H, 0x24, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_C0H, 0x24, 0xC0, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_E1H, 0x24, 0xE1, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_E2H, 0x24, 0xE2, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_E4H, 0x24, 0xE4, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_E7H, 0x24, 0xE7, IAP_F_FM | IAP_F_HW), IAPDESCR(24H_AAH, 0x24, 0xAA, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(24H_FFH, 0x24, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_F8H, 0x24, 0xF8, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_3FH, 0x24, 0x3F, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_FFH, 0x24, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_HW), IAPDESCR(25H, 0x25, IAP_M_CORE, IAP_F_ALLCPUSCORE2), @@ -767,25 +821,34 @@ IAPDESCR(26H_FFH, 0x26, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H, 0x27, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), - IAPDESCR(27H_01H, 0x27, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(27H_01H, 0x27, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(27H_02H, 0x27, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(27H_04H, 0x27, 0x04, IAP_F_FM | IAP_F_I7O | IAP_F_SB), - IAPDESCR(27H_08H, 0x27, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(27H_04H, 0x27, 0x04, IAP_F_FM | IAP_F_I7O | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(27H_08H, 0x27, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(27H_0EH, 0x27, 0x0E, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(27H_0FH, 0x27, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(27H_0FH, 0x27, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(27H_10H, 0x27, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H_20H, 0x27, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H_40H, 0x27, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_50H, 0x27, 0x50, IAP_F_FM | IAP_F_HW), IAPDESCR(27H_80H, 0x27, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H_E0H, 0x27, 0xE0, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H_F0H, 0x27, 0xF0, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(28H, 0x28, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUSCORE2), - IAPDESCR(28H_01H, 0x28, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(28H_02H, 0x28, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(28H_04H, 0x28, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(28H_08H, 0x28, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(28H_0FH, 0x28, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(28H_01H, 0x28, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(28H_02H, 0x28, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SBX), + IAPDESCR(28H_04H, 0x28, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(28H_08H, 0x28, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(28H_0FH, 0x28, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI, IAP_F_CC), IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, @@ -798,9 +861,9 @@ IAPDESCR(2EH_01H, 0x2E, 0x01, IAP_F_FM | IAP_F_WM), IAPDESCR(2EH_02H, 0x2E, 0x02, IAP_F_FM | IAP_F_WM), IAPDESCR(2EH_41H, 0x2E, 0x41, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(2EH_4FH, 0x2E, 0x4F, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(30H, 0x30, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), @@ -813,9 +876,11 @@ IAPDESCR(3BH_C0H, 0x3B, 0xC0, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(3CH_00H, 0x3C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), IAPDESCR(3CH_01H, 0x3C, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), IAPDESCR(3CH_02H, 0x3C, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(3DH_01H, 0x3D, 0x01, IAP_F_FM | IAP_F_I7O), @@ -856,20 +921,26 @@ IAPDESCR(47H_00H, 0x47, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(48H_00H, 0x48, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(48H_01H, 0x48, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(48H_01H, 0x48, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(48H_02H, 0x48, 0x02, IAP_F_FM | IAP_F_I7O), IAPDESCR(49H_00H, 0x49, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(49H_01H, 0x49, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), IAPDESCR(49H_02H, 0x49, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(49H_04H, 0x49, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), + IAPDESCR(49H_04H, 0x49, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(49H_0EH, 0x49, 0x0E, IAP_F_FM | IAP_F_HW), IAPDESCR(49H_10H, 0x49, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7O), - IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_HW), + IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW), + IAPDESCR(49H_60H, 0x49, 0x60, IAP_F_FM | IAP_F_HW), + IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7 | IAP_F_HW), IAPDESCR(4BH_00H, 0x4B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(4BH_01H, 0x4B, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7O), @@ -879,14 +950,15 @@ IAPDESCR(4CH_00H, 0x4C, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(4CH_01H, 0x4C, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(4CH_02H, 0x4C, 0x02, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(4CH_02H, 0x4C, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(4DH_01H, 0x4D, 0x01, IAP_F_FM | IAP_F_I7O), IAPDESCR(4EH_01H, 0x4E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(4EH_02H, 0x4E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(4EH_04H, 0x4E, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(4EH_10H, 0x4E, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -897,40 +969,52 @@ IAPDESCR(4FH_10H, 0x4F, 0x10, IAP_F_FM | IAP_F_WM), IAPDESCR(51H_01H, 0x51, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(51H_02H, 0x51, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(51H_04H, 0x51, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(51H_08H, 0x51, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(52H_01H, 0x52, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(53H_01H, 0x53, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(59H_20H, 0x59, 0x20, IAP_F_FM | IAP_F_SB), - IAPDESCR(59H_40H, 0x59, 0x40, IAP_F_FM | IAP_F_SB), - IAPDESCR(59H_80H, 0x59, 0x80, IAP_F_FM | IAP_F_SB), + IAPDESCR(58H_01H, 0x58, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(58H_02H, 0x58, 0x02, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(58H_04H, 0x58, 0x04, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(58H_08H, 0x58, 0x08, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), - IAPDESCR(5BH_0CH, 0x5B, 0x0C, IAP_F_FM | IAP_F_SB), - IAPDESCR(5BH_0FH, 0x5B, 0x0F, IAP_F_FM | IAP_F_SB), - IAPDESCR(5BH_40H, 0x5B, 0x40, IAP_F_FM | IAP_F_SB), - IAPDESCR(5BH_4FH, 0x5B, 0x4F, IAP_F_FM | IAP_F_SB), + IAPDESCR(59H_20H, 0x59, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(59H_40H, 0x59, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(59H_80H, 0x59, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_SBX), - IAPDESCR(5CH_01H, 0x5C, 0x01, IAP_F_FM | IAP_F_SB), - IAPDESCR(5CH_02H, 0x5C, 0x02, IAP_F_FM | IAP_F_SB), - - IAPDESCR(5EH_01H, 0x5E, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(5BH_0CH, 0x5B, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(5BH_0FH, 0x5B, 0x0F, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(5BH_40H, 0x5B, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(5BH_4FH, 0x5B, 0x4F, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(5CH_01H, 0x5C, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(5CH_02H, 0x5C, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + + IAPDESCR(5EH_01H, 0x5E, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + + IAPDESCR(5FH_01H, 0x5F, 0x01, IAP_F_FM | IAP_F_IB), + IAPDESCR(5FH_04H, 0x5F, 0x04, IAP_F_IBX), + IAPDESCR(60H, 0x60, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), IAPDESCR(60H_01H, 0x60, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), - IAPDESCR(60H_02H, 0x60, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(60H_02H, 0x60, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_IB | + IAP_F_IBX | IAP_F_HW), IAPDESCR(60H_04H, 0x60, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(60H_08H, 0x60, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(61H, 0x61, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2), IAPDESCR(61H_00H, 0x61, 0x00, IAP_F_FM | IAP_F_CC), @@ -942,9 +1026,9 @@ IAP_F_CA | IAP_F_CC2), IAPDESCR(63H, 0x63, IAP_M_CORE, IAP_F_CC), IAPDESCR(63H_01H, 0x63, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(63H_02H, 0x63, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(64H, 0x64, IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(64H_40H, 0x64, 0x40, IAP_F_FM | IAP_F_CC), @@ -985,13 +1069,22 @@ IAPDESCR(78H, 0x78, IAP_M_CORE, IAP_F_CC), IAPDESCR(78H, 0x78, IAP_M_CORE | IAP_M_SNOOPTYPE, IAP_F_CA | IAP_F_CC2), - IAPDESCR(79H_02H, 0x79, 0x02, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_04H, 0x79, 0x04, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_08H, 0x79, 0x08, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_10H, 0x79, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_20H, 0x79, 0x20, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_30H, 0x79, 0x30, IAP_F_FM | IAP_F_SB), - + IAPDESCR(79H_02H, 0x79, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_04H, 0x79, 0x04, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_08H, 0x79, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_10H, 0x79, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_20H, 0x79, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_30H, 0x79, 0x30, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_18H, 0x79, 0x18, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_24H, 0x79, 0x24, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_3CH, 0x79, 0x3C, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(7AH, 0x7A, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2), IAPDESCR(7BH, 0x7B, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2), @@ -1006,7 +1099,7 @@ IAPDESCR(80H_00H, 0x80, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(80H_01H, 0x80, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(80H_02H, 0x80, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM | IAP_F_SB), + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(80H_03H, 0x80, 0x03, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM), IAPDESCR(80H_04H, 0x80, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1027,14 +1120,17 @@ IAPDESCR(85H_00H, 0x85, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(85H_01H, 0x85, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(85H_02H, 0x85, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(85H_04H, 0x85, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), - IAPDESCR(85H_10H, 0x85, 0x10, IAP_F_FM | IAP_F_I7O | IAP_F_SB), - IAPDESCR(85H_20H, 0x85, 0x20, IAP_F_FM | IAP_F_I7O), - IAPDESCR(85H_40H, 0x85, 0x40, IAP_F_FM | IAP_F_I7O), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(85H_0EH, 0x85, 0x0E, IAP_F_FM | IAP_F_HW), + IAPDESCR(85H_10H, 0x85, 0x10, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(85H_20H, 0x85, 0x20, IAP_F_FM | IAP_F_I7O | IAP_F_HW), + IAPDESCR(85H_40H, 0x85, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW), + IAPDESCR(85H_60H, 0x85, 0x60, IAP_F_FM | IAP_F_HW), IAPDESCR(85H_80H, 0x85, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7O), IAPDESCR(86H_00H, 0x86, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), @@ -1041,53 +1137,57 @@ IAPDESCR(87H_00H, 0x87, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(87H_01H, 0x87, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(87H_02H, 0x87, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(87H_04H, 0x87, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(87H_08H, 0x87, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(87H_0FH, 0x87, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(88H_00H, 0x88, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(88H_01H, 0x88, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_02H, 0x88, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_04H, 0x88, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_07H, 0x88, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(88H_08H, 0x88, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_10H, 0x88, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_20H, 0x88, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_30H, 0x88, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(88H_40H, 0x88, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_7FH, 0x88, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(88H_80H, 0x88, 0x80, IAP_F_FM | IAP_F_SB), - IAPDESCR(88H_FFH, 0x88, 0xFF, IAP_F_FM | IAP_F_SB), + IAPDESCR(88H_80H, 0x88, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(88H_FFH, 0x88, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_00H, 0x89, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(89H_01H, 0x89, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_02H, 0x89, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(89H_04H, 0x89, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_07H, 0x89, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(89H_08H, 0x89, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_10H, 0x89, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_20H, 0x89, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_30H, 0x89, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(89H_40H, 0x89, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_7FH, 0x89, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(89H_80H, 0x89, 0x80, IAP_F_FM | IAP_F_SB), - IAPDESCR(89H_FFH, 0x89, 0xFF, IAP_F_FM | IAP_F_SB), + IAPDESCR(89H_80H, 0x89, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(89H_FFH, 0x89, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(8AH_00H, 0x8A, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(8BH_00H, 0x8B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), @@ -1102,7 +1202,8 @@ IAPDESCR(93H_00H, 0x93, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(94H_00H, 0x94, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(9CH_01H, 0x9C, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(9CH_01H, 0x9C, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(97H_00H, 0x97, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(98H_00H, 0x98, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1109,40 +1210,50 @@ IAPDESCR(A0H_00H, 0xA0, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(A1H_01H, 0xA1, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A1H_02H, 0xA1, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A1H_04H, 0xA1, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A1H_08H, 0xA1, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), - IAPDESCR(A1H_0CH, 0xA1, 0x0C, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A1H_0CH, 0xA1, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), IAPDESCR(A1H_10H, 0xA1, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A1H_20H, 0xA1, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), - IAPDESCR(A1H_30H, 0xA1, 0x30, IAP_F_FM | IAP_F_SB), - IAPDESCR(A1H_40H, 0xA1, 0x40, IAP_F_FM | IAP_F_SB), - IAPDESCR(A1H_80H, 0xA1, 0x80, IAP_F_FM | IAP_F_SB), - + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A1H_30H, 0xA1, 0x30, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(A1H_40H, 0xA1, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A1H_80H, 0xA1, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A2H_00H, 0xA2, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(A2H_01H, 0xA2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A2H_02H, 0xA2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(A2H_04H, 0xA2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A2H_08H, 0xA2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A2H_10H, 0xA2, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A2H_20H, 0xA2, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(A2H_40H, 0xA2, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(A2H_80H, 0xA2, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), + IAPDESCR(A3H_01H, 0xA3, 0x01, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A3H_02H, 0xA3, 0x02, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A3H_04H, 0xA3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(A3H_05H, 0xA3, 0x05, IAP_F_FM | IAP_F_HW), + IAPDESCR(A3H_08H, 0xA3, 0x08, IAP_F_FM | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A6H_01H, 0xA6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(A7H_01H, 0xA7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(A8H_01H, 0xA8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1153,25 +1264,27 @@ IAPDESCR(AAH_08H, 0xAA, 0x08, IAP_F_FM | IAP_F_CC2), IAPDESCR(ABH_01H, 0xAB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(ABH_02H, 0xAB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), - IAPDESCR(ACH_02H, 0xAC, 0x02, IAP_F_FM | IAP_F_SB), - IAPDESCR(ACH_08H, 0xAC, 0x08, IAP_F_FM | IAP_F_SB), - IAPDESCR(ACH_0AH, 0xAC, 0x0A, IAP_F_FM | IAP_F_SB), + IAPDESCR(ACH_02H, 0xAC, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(ACH_08H, 0xAC, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(ACH_0AH, 0xAC, 0x0A, IAP_F_FM | IAP_F_SB | IAP_F_SBX), IAPDESCR(AEH_01H, 0xAE, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B0H_00H, 0xB0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(B0H_01H, 0xB0, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), - IAPDESCR(B0H_02H, 0xB0, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(B0H_02H, 0xB0, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_IB | + IAP_F_IBX | IAP_F_HW), IAPDESCR(B0H_04H, 0xB0, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B0H_08H, 0xB0, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B0H_10H, 0xB0, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_I7O), IAPDESCR(B0H_20H, 0xB0, 0x20, IAP_F_FM | IAP_F_I7O), IAPDESCR(B0H_40H, 0xB0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1179,9 +1292,9 @@ IAPDESCR(B1H_00H, 0xB1, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(B1H_01H, 0xB1, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(B1H_02H, 0xB1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B1H_04H, 0xB1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B1H_08H, 0xB1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B1H_10H, 0xB1, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1193,7 +1306,7 @@ IAP_F_WM), IAPDESCR(B2H_01H, 0xB2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(B3H_01H, 0xB3, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_WM | IAP_F_I7O), @@ -1215,10 +1328,10 @@ IAPDESCR(B4H_02H, 0xB4, 0x02, IAP_F_FM | IAP_F_WM), IAPDESCR(B4H_04H, 0xB4, 0x04, IAP_F_FM | IAP_F_WM), - IAPDESCR(B6H_01H, 0xB6, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(B6H_01H, 0xB6, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_SBX), IAPDESCR(B7H_01H, 0xB7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B8H_01H, 0xB8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B8H_02H, 0xB8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1228,17 +1341,29 @@ IAPDESCR(BAH_02H, 0xBA, 0x02, IAP_F_FM | IAP_F_I7O), IAPDESCR(BBH_01H, 0xBB, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), - IAPDESCR(BDH_01H, 0xBD, 0x01, IAP_F_FM | IAP_F_SB), - IAPDESCR(BDH_20H, 0xBD, 0x20, IAP_F_FM | IAP_F_SB), + IAPDESCR(BCH_11H, 0xBC, 0x11, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_12H, 0xBC, 0x12, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_14H, 0xBC, 0x14, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_18H, 0xBC, 0x18, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_21H, 0xBC, 0x21, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_22H, 0xBC, 0x22, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_24H, 0xBC, 0x24, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_28H, 0xBC, 0x28, IAP_F_FM | IAP_F_HW), - IAPDESCR(BFH_05H, 0xBF, 0x05, IAP_F_FM | IAP_F_SB), + IAPDESCR(BDH_01H, 0xBD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(BDH_20H, 0xBD, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(BFH_05H, 0xBF, 0x05, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(C0H_00H, 0xC0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C0H_01H, 0xC0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C0H_02H, 0xC0, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB), IAPDESCR(C0H_04H, 0xC0, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | @@ -1247,17 +1372,23 @@ IAPDESCR(C1H_00H, 0xC1, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C1H_01H, 0xC1, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(C1H_02H, 0xC1, 0x02, IAP_F_FM | IAP_F_SB), - IAPDESCR(C1H_08H, 0xC1, 0x08, IAP_F_FM | IAP_F_SB), - IAPDESCR(C1H_10H, 0xC1, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(C1H_20H, 0xC1, 0x20, IAP_F_FM | IAP_F_SB), + IAPDESCR(C1H_02H, 0xC1, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(C1H_08H, 0xC1, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C1H_10H, 0xC1, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C1H_20H, 0xC1, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(C1H_40H, 0xC1, 0x40, IAP_F_FM | IAP_F_HW), IAPDESCR(C1H_FEH, 0xC1, 0xFE, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C2H_00H, 0xC2, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C2H_01H, 0xC2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C2H_02H, 0xC2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C2H_04H, 0xC2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(C2H_07H, 0xC2, 0x07, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1269,36 +1400,50 @@ IAPDESCR(C3H_01H, 0xC3, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(C3H_02H, 0xC3, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C3H_04H, 0xC3, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C3H_10H, 0xC3, 0x10, IAP_F_FM | IAP_F_I7O), - IAPDESCR(C3H_20H, 0xC3, 0x20, IAP_F_FM | IAP_F_SB), + IAPDESCR(C3H_20H, 0xC3, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_00H, 0xC4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_01H, 0xC4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_02H, 0xC4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_04H, 0xC4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_08H, 0xC4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_0CH, 0xC4, 0x0C, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C4H_0FH, 0xC4, 0x0F, IAP_F_FM | IAP_F_CA), - IAPDESCR(C4H_10H, 0xC4, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(C4H_20H, 0xC4, 0x20, IAP_F_FM | IAP_F_SB), - IAPDESCR(C4H_40H, 0xC4, 0x40, IAP_F_FM | IAP_F_SB), + IAPDESCR(C4H_10H, 0xC4, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C4H_20H, 0xC4, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C4H_40H, 0xC4, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C5H_00H, 0xC5, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), + IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C5H_02H, 0xC5, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(C5H_04H, 0xC5, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB), - IAPDESCR(C5H_10H, 0xC5, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(C5H_20H, 0xC5, 0x20, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(C5H_04H, 0xC5, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C5H_10H, 0xC5, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(C5H_20H, 0xC5, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), IAPDESCR(C6H_00H, 0xC6, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C6H_01H, 0xC6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1325,13 +1470,15 @@ IAPDESCR(CAH_00H, 0xCA, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(CAH_01H, 0xCA, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(CAH_02H, 0xCA, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CAH_04H, 0xCA, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CAH_08H, 0xCA, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), - IAPDESCR(CAH_10H, 0xCA, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(CAH_1EH, 0xCA, 0x1E, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(CAH_10H, 0xCA, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(CAH_1EH, 0xCA, 0x1E, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CBH_01H, 0xCB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), @@ -1352,11 +1499,14 @@ IAPDESCR(CCH_02H, 0xCC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(CCH_03H, 0xCC, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(CCH_20H, 0xCC, 0x20, IAP_F_FM | IAP_F_SB), + IAPDESCR(CCH_20H, 0xCC, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CDH_00H, 0xCD, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(CDH_01H, 0xCD, 0x01, IAP_F_FM | IAP_F_SB), - IAPDESCR(CDH_02H, 0xCD, 0x02, IAP_F_FM | IAP_F_SB), + IAPDESCR(CDH_01H, 0xCD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(CDH_02H, 0xCD, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), IAPDESCR(CEH_00H, 0xCE, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(CFH_00H, 0xCF, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1363,37 +1513,52 @@ IAPDESCR(D0H_00H, 0xD0, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(D0H_02H, 0xD0, 0x02, IAP_F_FM | IAP_F_SB), - IAPDESCR(D0H_10H, 0xD0, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(D0H_20H, 0xD0, 0x20, IAP_F_FM | IAP_F_SB), - IAPDESCR(D0H_40H, 0xD0, 0x40, IAP_F_FM | IAP_F_SB), - IAPDESCR(D0H_80H, 0xD0, 0X80, IAP_F_FM | IAP_F_SB), - - IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_02H, 0xD0, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_10H, 0xD0, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_20H, 0xD0, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_40H, 0xD0, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_80H, 0xD0, 0X80, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + + IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(D1H_02H, 0xD1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(D1H_04H, 0xD1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(D1H_08H, 0xD1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(D1H_40H, 0xD1, 0x40, IAP_F_FM | IAP_F_SB), + IAPDESCR(D1H_10H, 0xD1, 0x10, IAP_F_HW), + IAPDESCR(D1H_20H, 0xD1, 0x20, IAP_F_FM | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(D1H_40H, 0xD1, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_01H, 0xD2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_02H, 0xD2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_04H, 0xD2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_08H, 0xD2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_0FH, 0xD2, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(D2H_10H, 0xD2, 0x10, IAP_F_FM | IAP_F_CC2E), + IAPDESCR(D3H_01H, 0xD3, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), + IAPDESCR(D3H_04H, 0xD3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(D3H_10H, 0xD3, 0x10, IAP_F_IBX), + IAPDESCR(D3H_20H, 0xD3, 0x20, IAP_F_IBX), + IAPDESCR(D4H_01H, 0xD4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(D4H_02H, 0xD4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(D4H_04H, 0xD4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D4H_08H, 0xD4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D4H_0FH, 0xD4, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1445,8 +1610,9 @@ IAPDESCR(E6H_00H, 0xE6, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), IAPDESCR(E6H_01H, 0xE6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM), + IAP_F_WM | IAP_F_SBX), IAPDESCR(E6H_02H, 0xE6, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(E6H_1FH, 0xE6, 0x1F, IAP_F_FM | IAP_F_IBX | IAP_F_HW), IAPDESCR(E8H_01H, 0xE8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(E8H_02H, 0xE8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1456,39 +1622,43 @@ IAPDESCR(F0H_00H, 0xF0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(F0H_01H, 0xF0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_02H, 0xF0, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_04H, 0xF0, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_08H, 0xF0, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_10H, 0xF0, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_20H, 0xF0, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_40H, 0xF0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_80H, 0xF0, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), - IAPDESCR(F1H_01H, 0xF1, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(F1H_01H, 0xF1, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F1H_02H, 0xF1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F1H_04H, 0xF1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F1H_07H, 0xF1, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F2H_01H, 0xF2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(F2H_02H, 0xF2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(F2H_04H, 0xF2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(F2H_05H, 0xF2, 0x05, IAP_F_FM | IAP_F_HW), + IAPDESCR(F2H_06H, 0xF2, 0x06, IAP_F_FM | IAP_F_HW), IAPDESCR(F2H_08H, 0xF2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(F2H_0AH, 0xF2, 0x0A, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(F2H_0AH, 0xF2, 0x0A, IAP_F_FM | IAP_F_SB | IAP_F_SBX | + IAP_F_IBX), IAPDESCR(F2H_0FH, 0xF2, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(F3H_01H, 0xF3, 0x01, IAP_F_FM | IAP_F_I7O), @@ -1503,7 +1673,7 @@ IAPDESCR(F4H_04H, 0xF4, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O), IAPDESCR(F4H_08H, 0xF4, 0x08, IAP_F_FM | IAP_F_I7O), IAPDESCR(F4H_10H, 0xF4, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(F6H_01H, 0xF6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1644,7 +1814,7 @@ case PMC_EV_IAP_EVENT_60H_01H: case PMC_EV_IAP_EVENT_60H_02H: case PMC_EV_IAP_EVENT_60H_04H: - case PMC_EV_IAP_EVENT_60H_08H: + case PMC_EV_IAP_EVENT_60H_08H: case PMC_EV_IAP_EVENT_B3H_01H: case PMC_EV_IAP_EVENT_B3H_02H: case PMC_EV_IAP_EVENT_B3H_04H: @@ -1675,21 +1845,35 @@ } static int -iap_event_sandybridge_ok_on_counter(enum pmc_event pe, int ri) +iap_event_sb_sbx_ib_ibx_ok_on_counter(enum pmc_event pe, int ri) { uint32_t mask; - + switch (pe) { - /* - * Events valid only on counter 2. - */ + /* Events valid only on counter 0. */ + case PMC_EV_IAP_EVENT_B7H_01H: + mask = 0x1; + break; + /* Events valid only on counter 1. */ + case PMC_EV_IAP_EVENT_C0H_01H: + mask = 0x1; + break; + /* Events valid only on counter 2. */ case PMC_EV_IAP_EVENT_48H_01H: - mask = 0x2; + case PMC_EV_IAP_EVENT_A2H_02H: + mask = 0x4; break; + /* Events valid only on counter 3. */ + case PMC_EV_IAP_EVENT_A3H_08H: + case PMC_EV_IAP_EVENT_BBH_01H: + case PMC_EV_IAP_EVENT_CDH_01H: + case PMC_EV_IAP_EVENT_CDH_02H: + mask = 0x8; + break; default: mask = ~0; /* Any row index is ok. */ } - + return (mask & (1 << ri)); } @@ -1758,12 +1942,12 @@ * A small number of events are not supported in all the * processors based on a given microarchitecture. */ - if (ev == PMC_EV_IAP_EVENT_0FH_01H || ev == PMC_EV_IAP_EVENT_0FH_80H) { + if (ev == PMC_EV_IAP_EVENT_0FH_01H || ev == PMC_EV_IAP_EVENT_0FH_80H) { model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4); - if (core_cputype == PMC_CPU_INTEL_COREI7 && model != 0x2E) - return (EINVAL); + if (core_cputype == PMC_CPU_INTEL_COREI7 && model != 0x2E) + return (EINVAL); } - + switch (core_cputype) { case PMC_CPU_INTEL_COREI7: if (iap_event_corei7_ok_on_counter(ev, ri) == 0) @@ -1770,7 +1954,11 @@ return (EINVAL); break; case PMC_CPU_INTEL_SANDYBRIDGE: - if (iap_event_sandybridge_ok_on_counter(ev, ri) == 0) + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + case PMC_CPU_INTEL_IVYBRIDGE: + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + case PMC_CPU_INTEL_HASWELL: + if (iap_event_sb_sbx_ib_ibx_ok_on_counter(ev, ri) == 0) return (EINVAL); break; case PMC_CPU_INTEL_WESTMERE: @@ -1804,9 +1992,21 @@ case PMC_CPU_INTEL_COREI7: cpuflag = IAP_F_I7; break; - case PMC_CPU_INTEL_SANDYBRIDGE: + case PMC_CPU_INTEL_HASWELL: + cpuflag = IAP_F_HW; + break; + case PMC_CPU_INTEL_IVYBRIDGE: + cpuflag = IAP_F_IB; + break; + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + cpuflag = IAP_F_IBX; + break; + case PMC_CPU_INTEL_SANDYBRIDGE: cpuflag = IAP_F_SB; break; + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + cpuflag = IAP_F_SBX; + break; case PMC_CPU_INTEL_WESTMERE: cpuflag = IAP_F_WM; break; @@ -1894,7 +2094,8 @@ * Only Atom and SandyBridge CPUs support the 'ANY' qualifier. */ if (core_cputype == PMC_CPU_INTEL_ATOM || - core_cputype == PMC_CPU_INTEL_SANDYBRIDGE) + core_cputype == PMC_CPU_INTEL_SANDYBRIDGE || + core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON) evsel |= (config & IAP_ANY); else if (config & IAP_ANY) return (EINVAL); @@ -1909,10 +2110,17 @@ if (core_cputype == PMC_CPU_INTEL_COREI7 && ev == PMC_EV_IAP_EVENT_BBH_01H) return (EINVAL); - if ( a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK) + if ((core_cputype == PMC_CPU_INTEL_COREI7 || + core_cputype == PMC_CPU_INTEL_WESTMERE) && + a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_I7WM) return (EINVAL); - pm->pm_md.pm_iap.pm_iap_rsp = - a->pm_md.pm_iap.pm_iap_rsp & IA_OFFCORE_RSP_MASK; + else if ((core_cputype == PMC_CPU_INTEL_SANDYBRIDGE || + core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON || + core_cputype == PMC_CPU_INTEL_IVYBRIDGE || + core_cputype == PMC_CPU_INTEL_IVYBRIDGE_XEON) && + a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_SBIB) + return (EINVAL); + pm->pm_md.pm_iap.pm_iap_rsp = a->pm_md.pm_iap.pm_iap_rsp; } if (caps & PMC_CAP_THRESHOLD) @@ -2256,7 +2464,7 @@ if (error) continue; - wrmsr(IAP_EVSEL0 + ri, msr | (pm->pm_md.pm_iap.pm_iap_evsel | + wrmsr(IAP_EVSEL0 + ri, msr | (pm->pm_md.pm_iap.pm_iap_evsel | IAP_EN)); } @@ -2336,8 +2544,8 @@ /* Reload sampling count. */ wrmsr(IAF_CTR0 + n, v); - PMCDBG(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu, error, - (uintmax_t) v, (uintmax_t) rdpmc(IAF_RI_TO_MSR(n))); + PMCDBG(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu, + error, (uintmax_t) v, (uintmax_t) rdpmc(IAF_RI_TO_MSR(n))); } /* @@ -2406,8 +2614,12 @@ PMCDBG(MDP,INI,1,"core-init cputype=%d ncpu=%d ipa-version=%d", md->pmd_cputype, maxcpu, ipa_version); - if (ipa_version < 1 || ipa_version > 3) /* Unknown PMC architecture. */ + if (ipa_version < 1 || ipa_version > 3) { + /* Unknown PMC architecture. */ + printf("hwpc_core: unknown PMC architecture: %d\n", + ipa_version); return (EPROGMISMATCH); + } core_cputype = md->pmd_cputype; Modified: trunk/sys/dev/hwpmc/hwpmc_core.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_core.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_core.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_core.h 241609 2012-10-16 13:27:20Z fabient $ */ #ifndef _DEV_HWPMC_CORE_H_ @@ -46,7 +47,7 @@ */ struct pmc_md_iap_op_pmcallocate { uint32_t pm_iap_config; - uint32_t pm_iap_rsp; + uint64_t pm_iap_rsp; }; #define IAP_EVSEL(C) ((C) & 0xFF) @@ -60,7 +61,8 @@ #define IAP_INV (1 << 23) #define IAP_CMASK(C) (((C) & 0xFF) << 24) -#define IA_OFFCORE_RSP_MASK 0xF7FF +#define IA_OFFCORE_RSP_MASK_I7WM 0x000000F7FF +#define IA_OFFCORE_RSP_MASK_SBIB 0x3F807F8FFF #ifdef _KERNEL @@ -167,7 +169,7 @@ struct pmc_md_iap_pmc { uint32_t pm_iap_evsel; - uint32_t pm_iap_rsp; + uint64_t pm_iap_rsp; }; /* Modified: trunk/sys/dev/hwpmc/hwpmc_ia64.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_ia64.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_ia64.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_ia64.c 185168 2008-11-22 12:34:49Z jkoshy $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_intel.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_intel.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_intel.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_intel.c 250373 2013-05-08 16:43:52Z hiren $"); #include #include @@ -68,7 +69,7 @@ (uintmax_t) rcr4()); /* always turn off the RDPMC instruction */ - load_cr4(rcr4() & ~CR4_PCE); + load_cr4(rcr4() & ~CR4_PCE); return 0; } @@ -131,8 +132,14 @@ nclasses = 3; break; case 0x1A: - case 0x1E: /* Per Intel document 253669-032 9/2009, pages A-2 and A-57 */ - case 0x1F: /* Per Intel document 253669-032 9/2009, pages A-2 and A-57 */ + case 0x1E: /* + * Per Intel document 253669-032 9/2009, + * pages A-2 and A-57 + */ + case 0x1F: /* + * Per Intel document 253669-032 9/2009, + * pages A-2 and A-57 + */ case 0x2E: cputype = PMC_CPU_INTEL_COREI7; nclasses = 5; @@ -146,6 +153,22 @@ cputype = PMC_CPU_INTEL_SANDYBRIDGE; nclasses = 5; break; + case 0x2D: /* Per Intel document 253669-044US 08/2012. */ + cputype = PMC_CPU_INTEL_SANDYBRIDGE_XEON; + nclasses = 3; + break; + case 0x3A: /* Per Intel document 253669-043US 05/2012. */ + cputype = PMC_CPU_INTEL_IVYBRIDGE; + nclasses = 3; + break; + case 0x3E: /* Per Intel document 325462-045US 01/2013. */ + cputype = PMC_CPU_INTEL_IVYBRIDGE_XEON; + nclasses = 3; + break; + case 0x3C: /* Per Intel document 325462-045US 01/2013. */ + cputype = PMC_CPU_INTEL_HASWELL; + nclasses = 5; + break; } break; #if defined(__i386__) || defined(__amd64__) @@ -164,7 +187,7 @@ /* Allocate base class and initialize machine dependent struct */ pmc_mdep = pmc_mdep_alloc(nclasses); - pmc_mdep->pmd_cputype = cputype; + pmc_mdep->pmd_cputype = cputype; pmc_mdep->pmd_switch_in = intel_switch_in; pmc_mdep->pmd_switch_out = intel_switch_out; @@ -184,8 +207,12 @@ case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_IVYBRIDGE: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + case PMC_CPU_INTEL_HASWELL: error = pmc_core_initialize(pmc_mdep, ncpus); break; @@ -224,6 +251,9 @@ KASSERT(0, ("[intel,%d] Unknown CPU type", __LINE__)); } + if (error) + goto error; + /* * Init the uncore class. */ @@ -233,6 +263,7 @@ * Intel Corei7 and Westmere processors. */ case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_HASWELL: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: error = pmc_uncore_initialize(pmc_mdep, ncpus); @@ -263,8 +294,12 @@ case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_HASWELL: + case PMC_CPU_INTEL_IVYBRIDGE: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + case PMC_CPU_INTEL_IVYBRIDGE_XEON: pmc_core_finalize(md); break; @@ -294,6 +329,7 @@ #if defined(__i386__) || defined(__amd64__) switch (md->pmd_cputype) { case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_HASWELL: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: pmc_uncore_finalize(md); Modified: trunk/sys/dev/hwpmc/hwpmc_logging.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_logging.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_logging.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005-2007 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -34,7 +35,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_logging.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_mips.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_mips.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_mips.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010, George V. Neville-Neil * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_mips.c 204635 2010-03-03 15:05:58Z gnn $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_mips24k.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_mips24k.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_mips24k.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010 George V. Neville-Neil * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_mips24k.c 204635 2010-03-03 15:05:58Z gnn $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_mips24k.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_mips24k.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_mips24k.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010 George V. Neville-Neil * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_mips24k.h 204635 2010-03-03 15:05:58Z gnn $ */ #ifndef _DEV_HWPMC_MIPS24K_H_ Modified: trunk/sys/dev/hwpmc/hwpmc_mod.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_mod.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_mod.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2008 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -30,7 +31,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_mod.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_pentium.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_pentium.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_pentium.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2005 Joseph Koshy * All rights reserved. @@ -25,7 +26,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_pentium.c 184802 2008-11-09 17:37:54Z jkoshy $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_pentium.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_pentium.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_pentium.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_pentium.h 184802 2008-11-09 17:37:54Z jkoshy $ */ /* Machine dependent interfaces */ Modified: trunk/sys/dev/hwpmc/hwpmc_piv.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_piv.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_piv.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2007 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_piv.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_piv.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_piv.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_piv.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_piv.h 184802 2008-11-09 17:37:54Z jkoshy $ */ /* Machine dependent interfaces */ Modified: trunk/sys/dev/hwpmc/hwpmc_powerpc.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_powerpc.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_powerpc.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2011 Justin Hibbits * Copyright (c) 2005, Joseph Koshy @@ -27,7 +28,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_powerpc.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_ppro.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_ppro.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_ppro.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2005,2008 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_ppro.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_ppro.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_ppro.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_ppro.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_ppro.h 184802 2008-11-09 17:37:54Z jkoshy $ */ /* Machine dependent interfaces */ Modified: trunk/sys/dev/hwpmc/hwpmc_soft.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_soft.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_soft.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2012 Fabien Thomas * All rights reserved. @@ -25,7 +26,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_soft.c 250600 2013-05-13 15:18:36Z fabient $"); #include #include @@ -124,6 +125,9 @@ if (ps == NULL) return (EINVAL); pmc_soft_ev_release(ps); + /* Module unload is protected by pmc SX lock. */ + if (ps->ps_alloc != NULL) + ps->ps_alloc(); return (0); } @@ -311,6 +315,8 @@ soft_release_pmc(int cpu, int ri, struct pmc *pmc) { struct pmc_hw *phw; + enum pmc_event ev; + struct pmc_soft *ps; (void) pmc; @@ -324,9 +330,16 @@ KASSERT(phw->phw_pmc == NULL, ("[soft,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); - /* - * Nothing to do. - */ + ev = pmc->pm_event; + + /* Check if event is registered. */ + ps = pmc_soft_ev_acquire(ev); + KASSERT(ps != NULL, + ("[soft,%d] unregistered event %d", __LINE__, ev)); + pmc_soft_ev_release(ps); + /* Module unload is protected by pmc SX lock. */ + if (ps->ps_release != NULL) + ps->ps_release(); return (0); } Modified: trunk/sys/dev/hwpmc/hwpmc_soft.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_soft.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_soft.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2012 Fabien Thomas * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_soft.h 236238 2012-05-29 14:50:21Z fabient $ */ #ifndef _DEV_HWPMC_SOFT_H_ Modified: trunk/sys/dev/hwpmc/hwpmc_sparc64.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_sparc64.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_sparc64.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_sparc64.c 185168 2008-11-22 12:34:49Z jkoshy $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_tsc.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_tsc.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_tsc.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -25,7 +26,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_tsc.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_tsc.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_tsc.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_tsc.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_tsc.h 184802 2008-11-09 17:37:54Z jkoshy $ */ #ifndef _DEV_HWPMC_TSC_H_ Modified: trunk/sys/dev/hwpmc/hwpmc_uncore.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_uncore.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_uncore.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010 Fabien Thomas * All rights reserved. @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_uncore.c 250038 2013-04-29 04:38:43Z hiren $"); #include #include @@ -51,10 +52,12 @@ PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE) #define SELECTSEL(x) \ - (((x) == PMC_CPU_INTEL_SANDYBRIDGE) ? UCP_CB0_EVSEL0 : UCP_EVSEL0) + (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \ + UCP_CB0_EVSEL0 : UCP_EVSEL0) #define SELECTOFF(x) \ - (((x) == PMC_CPU_INTEL_SANDYBRIDGE) ? UCF_OFFSET_SB : UCF_OFFSET) + (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \ + UCF_OFFSET_SB : UCF_OFFSET) static enum pmc_cputype uncore_cputype; @@ -469,7 +472,8 @@ #define UCP_F_I7 (1 << 0) /* CPU: Core i7 */ #define UCP_F_WM (1 << 1) /* CPU: Westmere */ #define UCP_F_SB (1 << 2) /* CPU: Sandy Bridge */ -#define UCP_F_FM (1 << 3) /* Fixed mask */ +#define UCP_F_HW (1 << 3) /* CPU: Haswell */ +#define UCP_F_FM (1 << 4) /* Fixed mask */ #define UCP_F_ALLCPUS \ (UCP_F_I7 | UCP_F_WM) @@ -573,15 +577,16 @@ UCPDESCR(21H_04H, 0x21, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), UCPDESCR(22H_01H, 0x22, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB), + UCP_F_SB | UCP_F_HW), UCPDESCR(22H_02H, 0x22, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB), + UCP_F_SB | UCP_F_HW), UCPDESCR(22H_04H, 0x22, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB), - UCPDESCR(22H_08H, 0x22, 0x08, UCP_F_FM | UCP_F_SB), - UCPDESCR(22H_20H, 0x22, 0x20, UCP_F_FM | UCP_F_SB), - UCPDESCR(22H_40H, 0x22, 0x40, UCP_F_FM | UCP_F_SB), - UCPDESCR(22H_80H, 0x22, 0x80, UCP_F_FM | UCP_F_SB), + UCP_F_SB | UCP_F_HW), + UCPDESCR(22H_08H, 0x22, 0x08, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(22H_10H, 0x22, 0x10, UCP_F_FM | UCP_F_HW), + UCPDESCR(22H_20H, 0x22, 0x20, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(22H_40H, 0x22, 0x40, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(22H_80H, 0x22, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), UCPDESCR(23H_01H, 0x23, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), UCPDESCR(23H_02H, 0x23, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), @@ -671,14 +676,19 @@ UCPDESCR(33H_04H, 0x33, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), UCPDESCR(33H_07H, 0x33, 0x07, UCP_F_FM | UCP_F_WM), - UCPDESCR(34H_01H, 0x34, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + UCPDESCR(34H_01H, 0x34, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(34H_02H, 0x34, 0x02, UCP_F_FM | UCP_F_WM | UCP_F_SB), UCPDESCR(34H_04H, 0x34, 0x04, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_08H, 0x34, 0x08, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_10H, 0x34, 0x10, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_20H, 0x34, 0x20, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_40H, 0x34, 0x40, UCP_F_FM | UCP_F_SB), - UCPDESCR(34H_80H, 0x34, 0x80, UCP_F_FM | UCP_F_SB), + UCPDESCR(34H_06H, 0x34, 0x06, UCP_F_FM | UCP_F_HW), + UCPDESCR(34H_08H, 0x34, 0x08, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), + UCPDESCR(34H_10H, 0x34, 0x10, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), + UCPDESCR(34H_20H, 0x34, 0x20, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), + UCPDESCR(34H_40H, 0x34, 0x40, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(34H_80H, 0x34, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), UCPDESCR(35H_01H, 0x35, 0x01, UCP_F_FM | UCP_F_WM), UCPDESCR(35H_02H, 0x35, 0x02, UCP_F_FM | UCP_F_WM), @@ -745,27 +755,31 @@ UCPDESCR(66H_04H, 0x66, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), UCPDESCR(67H_01H, 0x67, 0x01, UCP_F_FM | UCP_F_WM), - - UCPDESCR(80H_01H, 0x80, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + + UCPDESCR(80H_01H, 0x80, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(80H_02H, 0x80, 0x02, UCP_F_FM | UCP_F_WM), UCPDESCR(80H_04H, 0x80, 0x04, UCP_F_FM | UCP_F_WM), UCPDESCR(80H_08H, 0x80, 0x08, UCP_F_FM | UCP_F_WM), - - UCPDESCR(81H_01H, 0x81, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + + UCPDESCR(81H_01H, 0x81, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(81H_02H, 0x81, 0x02, UCP_F_FM | UCP_F_WM), UCPDESCR(81H_04H, 0x81, 0x04, UCP_F_FM | UCP_F_WM), UCPDESCR(81H_08H, 0x81, 0x08, UCP_F_FM | UCP_F_WM), - UCPDESCR(81H_20H, 0x81, 0x20, UCP_F_FM | UCP_F_SB), - UCPDESCR(81H_80H, 0x81, 0x80, UCP_F_FM | UCP_F_SB), + UCPDESCR(81H_20H, 0x81, 0x20, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(81H_80H, 0x81, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), UCPDESCR(82H_01H, 0x82, 0x01, UCP_F_FM | UCP_F_WM), - - UCPDESCR(83H_01H, 0x83, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + + UCPDESCR(83H_01H, 0x83, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(83H_02H, 0x83, 0x02, UCP_F_FM | UCP_F_WM), UCPDESCR(83H_04H, 0x83, 0x04, UCP_F_FM | UCP_F_WM), UCPDESCR(83H_08H, 0x83, 0x08, UCP_F_FM | UCP_F_WM), - - UCPDESCR(84H_01H, 0x84, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + + UCPDESCR(84H_01H, 0x84, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(84H_02H, 0x84, 0x02, UCP_F_FM | UCP_F_WM), UCPDESCR(84H_04H, 0x84, 0x04, UCP_F_FM | UCP_F_WM), UCPDESCR(84H_08H, 0x84, 0x08, UCP_F_FM | UCP_F_WM), @@ -788,13 +802,16 @@ return (1ULL << uncore_ucp_width) - rlc; } +/* + * Counter specific event information for Sandybridge and Haswell + */ static int -ucp_event_sandybridge_ok_on_counter(enum pmc_event pe, int ri) +ucp_event_sb_hw_ok_on_counter(enum pmc_event pe, int ri) { uint32_t mask; - + switch (pe) { - /* + /* * Events valid only on counter 0. */ case PMC_EV_UCP_EVENT_80H_01H: @@ -801,11 +818,11 @@ case PMC_EV_UCP_EVENT_83H_01H: mask = (1 << 0); break; - + default: mask = ~0; /* Any row index is ok. */ } - + return (mask & (1 << ri)); } @@ -831,15 +848,16 @@ ev = pm->pm_event; switch (uncore_cputype) { + case PMC_CPU_INTEL_HASWELL: case PMC_CPU_INTEL_SANDYBRIDGE: - if (ucp_event_sandybridge_ok_on_counter(ev, ri) == 0) + if (ucp_event_sb_hw_ok_on_counter(ev, ri) == 0) return (EINVAL); break; default: break; } - + /* * Look for an event descriptor with matching CPU and event id * fields. @@ -849,6 +867,9 @@ case PMC_CPU_INTEL_COREI7: cpuflag = UCP_F_I7; break; + case PMC_CPU_INTEL_HASWELL: + cpuflag = UCP_F_HW; + break; case PMC_CPU_INTEL_SANDYBRIDGE: cpuflag = UCP_F_SB; break; @@ -1025,9 +1046,9 @@ evsel = pm->pm_md.pm_ucp.pm_ucp_evsel; - PMCDBG(MDP,STA,2, - "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", - cpu, ri, SELECTSEL(uncore_cputype) + ri, evsel); + PMCDBG(MDP,STA,2, + "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", + cpu, ri, SELECTSEL(uncore_cputype) + ri, evsel); /* Event specific configuration. */ switch (pm->pm_event) { @@ -1047,12 +1068,12 @@ case PMC_EV_UCP_EVENT_0CH_08H_S: wrmsr(MSR_GQ_SNOOP_MESF,0x4); break; - default: + default: break; } wrmsr(SELECTSEL(uncore_cputype) + ri, evsel); - + do { cc->pc_resync = 0; cc->pc_globalctrl |= (1ULL << ri); Modified: trunk/sys/dev/hwpmc/hwpmc_uncore.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_uncore.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_uncore.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010 Fabien Thomas * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_uncore.h 237444 2012-06-22 14:58:40Z gnn $ */ #ifndef _DEV_HWPMC_UNCORE_H_ Modified: trunk/sys/dev/hwpmc/hwpmc_x86.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_x86.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_x86.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005,2008 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_x86.c 250581 2013-05-12 22:01:22Z hiren $"); #include #include @@ -161,6 +162,7 @@ KASSERT(TRAPF_USERMODE(tf) == 0,("[x86,%d] not a kernel backtrace", __LINE__)); + td = curthread; pc = PMC_TRAPFRAME_TO_PC(tf); fp = PMC_TRAPFRAME_TO_FP(tf); sp = PMC_TRAPFRAME_TO_KERNEL_SP(tf); @@ -168,9 +170,6 @@ *cc++ = pc; r = fp + sizeof(uintptr_t); /* points to return address */ - if ((td = curthread) == NULL) - return (1); - if (nframes <= 1) return (1); @@ -252,7 +251,7 @@ return (NULL); /* disallow sampling if we do not have an LAPIC */ - if (!lapic_enable_pmc()) + if (md != NULL && !lapic_enable_pmc()) for (i = 0; i < md->pmd_nclass; i++) { if (i == PMC_CLASS_INDEX_SOFT) continue; Modified: trunk/sys/dev/hwpmc/hwpmc_xscale.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_xscale.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_xscale.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2009 Rui Paulo * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_xscale.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_xscale.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_xscale.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_xscale.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2009 Rui Paulo * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_xscale.h 200928 2009-12-23 23:16:54Z rpaulo $ */ #ifndef _DEV_HWPMC_XSCALE_H_ Modified: trunk/sys/dev/hwpmc/pmc_events.h =================================================================== --- trunk/sys/dev/hwpmc/pmc_events.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/pmc_events.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005 Joseph Koshy * All rights reserved. @@ -23,13 +24,13 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/pmc_events.h 250038 2013-04-29 04:38:43Z hiren $ */ #ifndef _DEV_HWPMC_PMC_EVENTS_H_ #define _DEV_HWPMC_PMC_EVENTS_H_ -/* +/* * Note: Documentation on adding events can be found both in * the source tree at src/share/doc/papers/hwpmc/hwpmc.ms * as well as on-line at: @@ -506,10 +507,15 @@ __PMC_EV(IAP, EVENT_08H_07H) \ __PMC_EV(IAP, EVENT_08H_08H) \ __PMC_EV(IAP, EVENT_08H_09H) \ +__PMC_EV(IAP, EVENT_08H_0EH) \ __PMC_EV(IAP, EVENT_08H_10H) \ __PMC_EV(IAP, EVENT_08H_20H) \ __PMC_EV(IAP, EVENT_08H_40H) \ +__PMC_EV(IAP, EVENT_08H_60H) \ __PMC_EV(IAP, EVENT_08H_80H) \ +__PMC_EV(IAP, EVENT_08H_81H) \ +__PMC_EV(IAP, EVENT_08H_82H) \ +__PMC_EV(IAP, EVENT_08H_84H) \ __PMC_EV(IAP, EVENT_09H_01H) \ __PMC_EV(IAP, EVENT_09H_02H) \ __PMC_EV(IAP, EVENT_09H_04H) \ @@ -524,6 +530,9 @@ __PMC_EV(IAP, EVENT_0DH_40H) \ __PMC_EV(IAP, EVENT_0EH_01H) \ __PMC_EV(IAP, EVENT_0EH_02H) \ +__PMC_EV(IAP, EVENT_0EH_10H) \ +__PMC_EV(IAP, EVENT_0EH_20H) \ +__PMC_EV(IAP, EVENT_0EH_40H) \ __PMC_EV(IAP, EVENT_0FH_01H) \ __PMC_EV(IAP, EVENT_0FH_02H) \ __PMC_EV(IAP, EVENT_0FH_08H) \ @@ -575,6 +584,14 @@ __PMC_EV(IAP, EVENT_20H_01H) \ __PMC_EV(IAP, EVENT_21H) \ __PMC_EV(IAP, EVENT_22H) \ +__PMC_EV(IAP, EVENT_22H_01H) \ +__PMC_EV(IAP, EVENT_22H_02H) \ +__PMC_EV(IAP, EVENT_22H_04H) \ +__PMC_EV(IAP, EVENT_22H_08H) \ +__PMC_EV(IAP, EVENT_22H_10H) \ +__PMC_EV(IAP, EVENT_22H_20H) \ +__PMC_EV(IAP, EVENT_22H_40H) \ +__PMC_EV(IAP, EVENT_22H_80H) \ __PMC_EV(IAP, EVENT_23H) \ __PMC_EV(IAP, EVENT_24H) \ __PMC_EV(IAP, EVENT_24H_01H) \ @@ -585,11 +602,26 @@ __PMC_EV(IAP, EVENT_24H_0CH) \ __PMC_EV(IAP, EVENT_24H_10H) \ __PMC_EV(IAP, EVENT_24H_20H) \ +__PMC_EV(IAP, EVENT_24H_21H) \ +__PMC_EV(IAP, EVENT_24H_22H) \ +__PMC_EV(IAP, EVENT_24H_24H) \ +__PMC_EV(IAP, EVENT_24H_27H) \ __PMC_EV(IAP, EVENT_24H_30H) \ __PMC_EV(IAP, EVENT_24H_40H) \ +__PMC_EV(IAP, EVENT_24H_41H) \ +__PMC_EV(IAP, EVENT_24H_42H) \ +__PMC_EV(IAP, EVENT_24H_44H) \ +__PMC_EV(IAP, EVENT_24H_50H) \ __PMC_EV(IAP, EVENT_24H_80H) \ __PMC_EV(IAP, EVENT_24H_AAH) \ +__PMC_EV(IAP, EVENT_24H_3FH) \ +__PMC_EV(IAP, EVENT_24H_BFH) \ __PMC_EV(IAP, EVENT_24H_C0H) \ +__PMC_EV(IAP, EVENT_24H_E1H) \ +__PMC_EV(IAP, EVENT_24H_E2H) \ +__PMC_EV(IAP, EVENT_24H_E4H) \ +__PMC_EV(IAP, EVENT_24H_E7H) \ +__PMC_EV(IAP, EVENT_24H_F8H) \ __PMC_EV(IAP, EVENT_24H_FFH) \ __PMC_EV(IAP, EVENT_25H) \ __PMC_EV(IAP, EVENT_26H) \ @@ -614,6 +646,7 @@ __PMC_EV(IAP, EVENT_27H_10H) \ __PMC_EV(IAP, EVENT_27H_20H) \ __PMC_EV(IAP, EVENT_27H_40H) \ +__PMC_EV(IAP, EVENT_27H_50H) \ __PMC_EV(IAP, EVENT_27H_80H) \ __PMC_EV(IAP, EVENT_27H_E0H) \ __PMC_EV(IAP, EVENT_27H_F0H) \ @@ -670,6 +703,7 @@ __PMC_EV(IAP, EVENT_48H_01H) \ __PMC_EV(IAP, EVENT_48H_02H) \ __PMC_EV(IAP, EVENT_49H_00H) \ +__PMC_EV(IAP, EVENT_49H_0EH) \ __PMC_EV(IAP, EVENT_49H_01H) \ __PMC_EV(IAP, EVENT_49H_02H) \ __PMC_EV(IAP, EVENT_49H_04H) \ @@ -676,6 +710,7 @@ __PMC_EV(IAP, EVENT_49H_10H) \ __PMC_EV(IAP, EVENT_49H_20H) \ __PMC_EV(IAP, EVENT_49H_40H) \ +__PMC_EV(IAP, EVENT_49H_60H) \ __PMC_EV(IAP, EVENT_49H_80H) \ __PMC_EV(IAP, EVENT_4BH_00H) \ __PMC_EV(IAP, EVENT_4BH_01H) \ @@ -701,6 +736,10 @@ __PMC_EV(IAP, EVENT_51H_08H) \ __PMC_EV(IAP, EVENT_52H_01H) \ __PMC_EV(IAP, EVENT_53H_01H) \ +__PMC_EV(IAP, EVENT_58H_01H) \ +__PMC_EV(IAP, EVENT_58H_02H) \ +__PMC_EV(IAP, EVENT_58H_04H) \ +__PMC_EV(IAP, EVENT_58H_08H) \ __PMC_EV(IAP, EVENT_59H_20H) \ __PMC_EV(IAP, EVENT_59H_40H) \ __PMC_EV(IAP, EVENT_59H_80H) \ @@ -711,6 +750,8 @@ __PMC_EV(IAP, EVENT_5CH_01H) \ __PMC_EV(IAP, EVENT_5CH_02H) \ __PMC_EV(IAP, EVENT_5EH_01H) \ +__PMC_EV(IAP, EVENT_5FH_01H) \ +__PMC_EV(IAP, EVENT_5FH_04H) \ __PMC_EV(IAP, EVENT_60H) \ __PMC_EV(IAP, EVENT_60H_01H) \ __PMC_EV(IAP, EVENT_60H_02H) \ @@ -746,6 +787,9 @@ __PMC_EV(IAP, EVENT_79H_10H) \ __PMC_EV(IAP, EVENT_79H_20H) \ __PMC_EV(IAP, EVENT_79H_30H) \ +__PMC_EV(IAP, EVENT_79H_18H) \ +__PMC_EV(IAP, EVENT_79H_24H) \ +__PMC_EV(IAP, EVENT_79H_3CH) \ __PMC_EV(IAP, EVENT_7AH) \ __PMC_EV(IAP, EVENT_7BH) \ __PMC_EV(IAP, EVENT_7DH) \ @@ -773,9 +817,11 @@ __PMC_EV(IAP, EVENT_85H_01H) \ __PMC_EV(IAP, EVENT_85H_02H) \ __PMC_EV(IAP, EVENT_85H_04H) \ +__PMC_EV(IAP, EVENT_85H_0EH) \ __PMC_EV(IAP, EVENT_85H_10H) \ __PMC_EV(IAP, EVENT_85H_20H) \ __PMC_EV(IAP, EVENT_85H_40H) \ +__PMC_EV(IAP, EVENT_85H_60H) \ __PMC_EV(IAP, EVENT_85H_80H) \ __PMC_EV(IAP, EVENT_86H_00H) \ __PMC_EV(IAP, EVENT_87H_00H) \ @@ -844,6 +890,11 @@ __PMC_EV(IAP, EVENT_A2H_20H) \ __PMC_EV(IAP, EVENT_A2H_40H) \ __PMC_EV(IAP, EVENT_A2H_80H) \ +__PMC_EV(IAP, EVENT_A3H_01H) \ +__PMC_EV(IAP, EVENT_A3H_02H) \ +__PMC_EV(IAP, EVENT_A3H_04H) \ +__PMC_EV(IAP, EVENT_A3H_05H) \ +__PMC_EV(IAP, EVENT_A3H_08H) \ __PMC_EV(IAP, EVENT_A6H_01H) \ __PMC_EV(IAP, EVENT_A7H_01H) \ __PMC_EV(IAP, EVENT_A8H_01H) \ @@ -901,6 +952,14 @@ __PMC_EV(IAP, EVENT_BAH_01H) \ __PMC_EV(IAP, EVENT_BAH_02H) \ __PMC_EV(IAP, EVENT_BBH_01H) \ +__PMC_EV(IAP, EVENT_BCH_11H) \ +__PMC_EV(IAP, EVENT_BCH_12H) \ +__PMC_EV(IAP, EVENT_BCH_14H) \ +__PMC_EV(IAP, EVENT_BCH_18H) \ +__PMC_EV(IAP, EVENT_BCH_21H) \ +__PMC_EV(IAP, EVENT_BCH_22H) \ +__PMC_EV(IAP, EVENT_BCH_24H) \ +__PMC_EV(IAP, EVENT_BCH_28H) \ __PMC_EV(IAP, EVENT_BDH_01H) \ __PMC_EV(IAP, EVENT_BDH_20H) \ __PMC_EV(IAP, EVENT_BFH_05H) \ @@ -915,6 +974,7 @@ __PMC_EV(IAP, EVENT_C1H_08H) \ __PMC_EV(IAP, EVENT_C1H_10H) \ __PMC_EV(IAP, EVENT_C1H_20H) \ +__PMC_EV(IAP, EVENT_C1H_40H) \ __PMC_EV(IAP, EVENT_C1H_FEH) \ __PMC_EV(IAP, EVENT_C2H_00H) \ __PMC_EV(IAP, EVENT_C2H_01H) \ @@ -994,6 +1054,8 @@ __PMC_EV(IAP, EVENT_D1H_02H) \ __PMC_EV(IAP, EVENT_D1H_04H) \ __PMC_EV(IAP, EVENT_D1H_08H) \ +__PMC_EV(IAP, EVENT_D1H_10H) \ +__PMC_EV(IAP, EVENT_D1H_20H) \ __PMC_EV(IAP, EVENT_D1H_40H) \ __PMC_EV(IAP, EVENT_D2H_01H) \ __PMC_EV(IAP, EVENT_D2H_02H) \ @@ -1001,6 +1063,10 @@ __PMC_EV(IAP, EVENT_D2H_08H) \ __PMC_EV(IAP, EVENT_D2H_0FH) \ __PMC_EV(IAP, EVENT_D2H_10H) \ +__PMC_EV(IAP, EVENT_D3H_01H) \ +__PMC_EV(IAP, EVENT_D3H_04H) \ +__PMC_EV(IAP, EVENT_D3H_10H) \ +__PMC_EV(IAP, EVENT_D3H_20H) \ __PMC_EV(IAP, EVENT_D4H_01H) \ __PMC_EV(IAP, EVENT_D4H_02H) \ __PMC_EV(IAP, EVENT_D4H_04H) \ @@ -1041,6 +1107,7 @@ __PMC_EV(IAP, EVENT_E6H_00H) \ __PMC_EV(IAP, EVENT_E6H_01H) \ __PMC_EV(IAP, EVENT_E6H_02H) \ +__PMC_EV(IAP, EVENT_E6H_1FH) \ __PMC_EV(IAP, EVENT_E8H_01H) \ __PMC_EV(IAP, EVENT_E8H_02H) \ __PMC_EV(IAP, EVENT_E8H_03H) \ @@ -1061,6 +1128,8 @@ __PMC_EV(IAP, EVENT_F2H_01H) \ __PMC_EV(IAP, EVENT_F2H_02H) \ __PMC_EV(IAP, EVENT_F2H_04H) \ +__PMC_EV(IAP, EVENT_F2H_05H) \ +__PMC_EV(IAP, EVENT_F2H_06H) \ __PMC_EV(IAP, EVENT_F2H_08H) \ __PMC_EV(IAP, EVENT_F2H_0AH) \ __PMC_EV(IAP, EVENT_F2H_0FH) \ @@ -1127,7 +1196,7 @@ __PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_NOT_TAKEN", \ IAP_EVENT_C4H_02H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_TAKEN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_NOT_TAKEN",IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_NOT_TAKEN", IAP_EVENT_C4H_01H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.PRED_TAKEN", IAP_EVENT_C4H_04H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.TAKEN", IAP_EVENT_C4H_0CH) \ __PMC_EV_ALIAS("BR_MISSP_EXEC", IAP_EVENT_89H_00H) \ @@ -1348,139 +1417,139 @@ /* * Aliases for Core PMC events. */ -#define __PMC_EV_ALIAS_CORE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("BAClears", IAP_EVENT_E6H_00H) \ -__PMC_EV_ALIAS("BTB_Misses", IAP_EVENT_E2H_00H) \ -__PMC_EV_ALIAS("Br_BAC_Missp_Exec", IAP_EVENT_8AH_00H) \ -__PMC_EV_ALIAS("Br_Bogus", IAP_EVENT_E4H_00H) \ -__PMC_EV_ALIAS("Br_Call_Exec", IAP_EVENT_92H_00H) \ -__PMC_EV_ALIAS("Br_Call_Missp_Exec", IAP_EVENT_93H_00H) \ -__PMC_EV_ALIAS("Br_Cnd_Exec", IAP_EVENT_8BH_00H) \ -__PMC_EV_ALIAS("Br_Cnd_Missp_Exec", IAP_EVENT_8CH_00H) \ -__PMC_EV_ALIAS("Br_Ind_Call_Exec", IAP_EVENT_94H_00H) \ -__PMC_EV_ALIAS("Br_Ind_Exec", IAP_EVENT_8DH_00H) \ -__PMC_EV_ALIAS("Br_Ind_Missp_Exec", IAP_EVENT_8EH_00H) \ -__PMC_EV_ALIAS("Br_Inst_Exec", IAP_EVENT_88H_00H) \ -__PMC_EV_ALIAS("Br_Instr_Decoded", IAP_EVENT_E0H_00H) \ -__PMC_EV_ALIAS("Br_Instr_Ret", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("Br_MisPred_Ret", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("Br_MisPred_Taken_Ret", IAP_EVENT_CAH_00H) \ -__PMC_EV_ALIAS("Br_Missp_Exec", IAP_EVENT_89H_00H) \ -__PMC_EV_ALIAS("Br_Ret_BAC_Missp_Exec", IAP_EVENT_91H_00H) \ -__PMC_EV_ALIAS("Br_Ret_Exec", IAP_EVENT_8FH_00H) \ -__PMC_EV_ALIAS("Br_Ret_Missp_Exec", IAP_EVENT_90H_00H) \ -__PMC_EV_ALIAS("Br_Taken_Ret", IAP_EVENT_C9H_00H) \ -__PMC_EV_ALIAS("Bus_BNR_Clocks", IAP_EVENT_61H_00H) \ -__PMC_EV_ALIAS("Bus_DRDY_Clocks", IAP_EVENT_62H_00H) \ -__PMC_EV_ALIAS("Bus_Data_Rcv", IAP_EVENT_64H_40H) \ -__PMC_EV_ALIAS("Bus_Locks_Clocks", IAP_EVENT_63H) \ -__PMC_EV_ALIAS("Bus_Not_In_Use", IAP_EVENT_7DH) \ -__PMC_EV_ALIAS("Bus_Req_Outstanding", IAP_EVENT_60H) \ -__PMC_EV_ALIAS("Bus_Snoop_Stall", IAP_EVENT_7EH_00H) \ -__PMC_EV_ALIAS("Bus_Snoops", IAP_EVENT_77H) \ -__PMC_EV_ALIAS("Bus_Trans_Any", IAP_EVENT_70H) \ -__PMC_EV_ALIAS("Bus_Trans_Brd", IAP_EVENT_65H) \ -__PMC_EV_ALIAS("Bus_Trans_Burst", IAP_EVENT_6EH) \ -__PMC_EV_ALIAS("Bus_Trans_Def", IAP_EVENT_6DH) \ -__PMC_EV_ALIAS("Bus_Trans_IO", IAP_EVENT_6CH) \ -__PMC_EV_ALIAS("Bus_Trans_Ifetch", IAP_EVENT_68H) \ -__PMC_EV_ALIAS("Bus_Trans_Inval", IAP_EVENT_69H) \ -__PMC_EV_ALIAS("Bus_Trans_Mem", IAP_EVENT_6FH) \ -__PMC_EV_ALIAS("Bus_Trans_P", IAP_EVENT_6BH) \ -__PMC_EV_ALIAS("Bus_Trans_Pwr", IAP_EVENT_6AH) \ -__PMC_EV_ALIAS("Bus_Trans_RFO", IAP_EVENT_66H) \ -__PMC_EV_ALIAS("Bus_Trans_WB", IAP_EVENT_67H) \ -__PMC_EV_ALIAS("Cycles_Div_Busy", IAP_EVENT_14H_00H) \ -__PMC_EV_ALIAS("Cycles_Int_Masked", IAP_EVENT_C6H_00H) \ -__PMC_EV_ALIAS("Cycles_Int_Pending_Masked", IAP_EVENT_C7H_00H) \ -__PMC_EV_ALIAS("DCU_Snoop_To_Share", IAP_EVENT_78H) \ -__PMC_EV_ALIAS("DCache_Cache_LD", IAP_EVENT_40H) \ -__PMC_EV_ALIAS("DCache_Cache_Lock", IAP_EVENT_42H) \ -__PMC_EV_ALIAS("DCache_Cache_ST", IAP_EVENT_41H) \ -__PMC_EV_ALIAS("DCache_M_Evict", IAP_EVENT_47H_00H) \ -__PMC_EV_ALIAS("DCache_M_Repl", IAP_EVENT_46H_00H) \ -__PMC_EV_ALIAS("DCache_Pend_Miss", IAP_EVENT_48H_00H) \ -__PMC_EV_ALIAS("DCache_Repl", IAP_EVENT_45H_0FH) \ -__PMC_EV_ALIAS("Data_Mem_Cache_Ref", IAP_EVENT_44H_02H) \ -__PMC_EV_ALIAS("Data_Mem_Ref", IAP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("Dbus_Busy", IAP_EVENT_22H) \ -__PMC_EV_ALIAS("Dbus_Busy_Rd", IAP_EVENT_23H) \ -__PMC_EV_ALIAS("Div", IAP_EVENT_13H_00H) \ -__PMC_EV_ALIAS("Dtlb_Miss", IAP_EVENT_49H_00H) \ -__PMC_EV_ALIAS("ESP_Uops", IAP_EVENT_D7H_00H) \ -__PMC_EV_ALIAS("EST_Trans", IAP_EVENT_3AH) \ -__PMC_EV_ALIAS("FP_Assist", IAP_EVENT_11H_00H) \ -__PMC_EV_ALIAS("FP_Comp_Instr_Ret", IAP_EVENT_C1H_00H) \ -__PMC_EV_ALIAS("FP_Comps_Op_Exe", IAP_EVENT_10H_00H) \ -__PMC_EV_ALIAS("FP_MMX_Trans", IAP_EVENT_CCH_01H) \ -__PMC_EV_ALIAS("Fused_Ld_Uops_Ret", IAP_EVENT_DAH_01H) \ -__PMC_EV_ALIAS("Fused_St_Uops_Ret", IAP_EVENT_DAH_02H) \ -__PMC_EV_ALIAS("Fused_Uops_Ret", IAP_EVENT_DAH_00H) \ -__PMC_EV_ALIAS("HW_Int_Rx", IAP_EVENT_C8H_00H) \ -__PMC_EV_ALIAS("ICache_Misses", IAP_EVENT_81H_00H) \ -__PMC_EV_ALIAS("ICache_Reads", IAP_EVENT_80H_00H) \ -__PMC_EV_ALIAS("IFU_Mem_Stall", IAP_EVENT_86H_00H) \ -__PMC_EV_ALIAS("ILD_Stall", IAP_EVENT_87H_00H) \ -__PMC_EV_ALIAS("ITLB_Misses", IAP_EVENT_85H_00H) \ -__PMC_EV_ALIAS("Instr_Decoded", IAP_EVENT_D0H_00H) \ -__PMC_EV_ALIAS("Instr_Ret", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("L1_Pref_Req", IAP_EVENT_4FH_00H) \ -__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \ -__PMC_EV_ALIAS("L2_IFetch", IAP_EVENT_28H) \ -__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \ -__PMC_EV_ALIAS("L2_Lines_In", IAP_EVENT_24H) \ -__PMC_EV_ALIAS("L2_Lines_Out", IAP_EVENT_26H) \ -__PMC_EV_ALIAS("L2_M_Lines_In", IAP_EVENT_25H) \ -__PMC_EV_ALIAS("L2_M_Lines_Out", IAP_EVENT_27H) \ -__PMC_EV_ALIAS("L2_No_Request_Cycles", IAP_EVENT_32H) \ -__PMC_EV_ALIAS("L2_Reject_Cycles", IAP_EVENT_30H) \ -__PMC_EV_ALIAS("L2_Rqsts", IAP_EVENT_2EH) \ -__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \ -__PMC_EV_ALIAS("LD_Blocks", IAP_EVENT_03H_00H) \ -__PMC_EV_ALIAS("LLC_Misses", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("LLC_Reference", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("MMX_Assist", IAP_EVENT_CDH_00H) \ -__PMC_EV_ALIAS("MMX_FP_Trans", IAP_EVENT_CCH_00H) \ -__PMC_EV_ALIAS("MMX_Instr_Exec", IAP_EVENT_B0H_00H) \ -__PMC_EV_ALIAS("MMX_Instr_Ret", IAP_EVENT_CEH_00H) \ -__PMC_EV_ALIAS("Misalign_Mem_Ref", IAP_EVENT_05H_00H) \ -__PMC_EV_ALIAS("Mul", IAP_EVENT_12H_00H) \ -__PMC_EV_ALIAS("NonHlt_Ref_Cycles", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("Pref_Rqsts_Dn", IAP_EVENT_F8H_00H) \ -__PMC_EV_ALIAS("Pref_Rqsts_Up", IAP_EVENT_F0H_00H) \ -__PMC_EV_ALIAS("Resource_Stall", IAP_EVENT_A2H_00H) \ -__PMC_EV_ALIAS("SD_Drains", IAP_EVENT_04H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_P_Comp_Ret", IAP_EVENT_D9H_02H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_P_Ret", IAP_EVENT_D8H_02H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_S_Comp_Ret", IAP_EVENT_D9H_03H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_S_Ret", IAP_EVENT_D8H_03H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_P_Comp_Ret", IAP_EVENT_D9H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_Ret", IAP_EVENT_D8H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_S_Comp_Ret", IAP_EVENT_D9H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_S_Ret", IAP_EVENT_D8H_01H) \ -__PMC_EV_ALIAS("SIMD_Int_128_Ret", IAP_EVENT_D8H_04H) \ -__PMC_EV_ALIAS("SIMD_Int_Pari_Exec", IAP_EVENT_B3H_20H) \ -__PMC_EV_ALIAS("SIMD_Int_Pck_Exec", IAP_EVENT_B3H_04H) \ -__PMC_EV_ALIAS("SIMD_Int_Plog_Exec", IAP_EVENT_B3H_10H) \ -__PMC_EV_ALIAS("SIMD_Int_Pmul_Exec", IAP_EVENT_B3H_01H) \ -__PMC_EV_ALIAS("SIMD_Int_Psft_Exec", IAP_EVENT_B3H_02H) \ -__PMC_EV_ALIAS("SIMD_Int_Sat_Exec", IAP_EVENT_B1H_00H) \ -__PMC_EV_ALIAS("SIMD_Int_Upck_Exec", IAP_EVENT_B3H_08H) \ -__PMC_EV_ALIAS("SMC_Detected", IAP_EVENT_C3H_00H) \ -__PMC_EV_ALIAS("SSE_NTStores_Miss", IAP_EVENT_4BH_03H) \ -__PMC_EV_ALIAS("SSE_NTStores_Ret", IAP_EVENT_07H_03H) \ -__PMC_EV_ALIAS("SSE_PrefNta_Miss", IAP_EVENT_4BH_00H) \ -__PMC_EV_ALIAS("SSE_PrefNta_Ret", IAP_EVENT_07H_00H) \ -__PMC_EV_ALIAS("SSE_PrefT1_Miss", IAP_EVENT_4BH_01H) \ -__PMC_EV_ALIAS("SSE_PrefT1_Ret", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("SSE_PrefT2_Miss", IAP_EVENT_4BH_02H) \ -__PMC_EV_ALIAS("SSE_PrefT2_Ret", IAP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("Seg_Reg_Loads", IAP_EVENT_06H_00H) \ -__PMC_EV_ALIAS("Serial_Execution_Cycles", IAP_EVENT_3CH_02H) \ -__PMC_EV_ALIAS("Thermal_Trip", IAP_EVENT_3BH_C0H) \ -__PMC_EV_ALIAS("Unfusion", IAP_EVENT_DBH_00H) \ -__PMC_EV_ALIAS("Unhalted_Core_Cycles", IAP_EVENT_3CH_00H) \ +#define __PMC_EV_ALIAS_CORE() \ +__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ +__PMC_EV_ALIAS("BAClears", IAP_EVENT_E6H_00H) \ +__PMC_EV_ALIAS("BTB_Misses", IAP_EVENT_E2H_00H) \ +__PMC_EV_ALIAS("Br_BAC_Missp_Exec", IAP_EVENT_8AH_00H) \ +__PMC_EV_ALIAS("Br_Bogus", IAP_EVENT_E4H_00H) \ +__PMC_EV_ALIAS("Br_Call_Exec", IAP_EVENT_92H_00H) \ +__PMC_EV_ALIAS("Br_Call_Missp_Exec", IAP_EVENT_93H_00H) \ +__PMC_EV_ALIAS("Br_Cnd_Exec", IAP_EVENT_8BH_00H) \ +__PMC_EV_ALIAS("Br_Cnd_Missp_Exec", IAP_EVENT_8CH_00H) \ +__PMC_EV_ALIAS("Br_Ind_Call_Exec", IAP_EVENT_94H_00H) \ +__PMC_EV_ALIAS("Br_Ind_Exec", IAP_EVENT_8DH_00H) \ +__PMC_EV_ALIAS("Br_Ind_Missp_Exec", IAP_EVENT_8EH_00H) \ +__PMC_EV_ALIAS("Br_Inst_Exec", IAP_EVENT_88H_00H) \ +__PMC_EV_ALIAS("Br_Instr_Decoded", IAP_EVENT_E0H_00H) \ +__PMC_EV_ALIAS("Br_Instr_Ret", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("Br_MisPred_Ret", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("Br_MisPred_Taken_Ret", IAP_EVENT_CAH_00H) \ +__PMC_EV_ALIAS("Br_Missp_Exec", IAP_EVENT_89H_00H) \ +__PMC_EV_ALIAS("Br_Ret_BAC_Missp_Exec", IAP_EVENT_91H_00H) \ +__PMC_EV_ALIAS("Br_Ret_Exec", IAP_EVENT_8FH_00H) \ +__PMC_EV_ALIAS("Br_Ret_Missp_Exec", IAP_EVENT_90H_00H) \ +__PMC_EV_ALIAS("Br_Taken_Ret", IAP_EVENT_C9H_00H) \ +__PMC_EV_ALIAS("Bus_BNR_Clocks", IAP_EVENT_61H_00H) \ +__PMC_EV_ALIAS("Bus_DRDY_Clocks", IAP_EVENT_62H_00H) \ +__PMC_EV_ALIAS("Bus_Data_Rcv", IAP_EVENT_64H_40H) \ +__PMC_EV_ALIAS("Bus_Locks_Clocks", IAP_EVENT_63H) \ +__PMC_EV_ALIAS("Bus_Not_In_Use", IAP_EVENT_7DH) \ +__PMC_EV_ALIAS("Bus_Req_Outstanding", IAP_EVENT_60H) \ +__PMC_EV_ALIAS("Bus_Snoop_Stall", IAP_EVENT_7EH_00H) \ +__PMC_EV_ALIAS("Bus_Snoops", IAP_EVENT_77H) \ +__PMC_EV_ALIAS("Bus_Trans_Any", IAP_EVENT_70H) \ +__PMC_EV_ALIAS("Bus_Trans_Brd", IAP_EVENT_65H) \ +__PMC_EV_ALIAS("Bus_Trans_Burst", IAP_EVENT_6EH) \ +__PMC_EV_ALIAS("Bus_Trans_Def", IAP_EVENT_6DH) \ +__PMC_EV_ALIAS("Bus_Trans_IO", IAP_EVENT_6CH) \ +__PMC_EV_ALIAS("Bus_Trans_Ifetch", IAP_EVENT_68H) \ +__PMC_EV_ALIAS("Bus_Trans_Inval", IAP_EVENT_69H) \ +__PMC_EV_ALIAS("Bus_Trans_Mem", IAP_EVENT_6FH) \ +__PMC_EV_ALIAS("Bus_Trans_P", IAP_EVENT_6BH) \ +__PMC_EV_ALIAS("Bus_Trans_Pwr", IAP_EVENT_6AH) \ +__PMC_EV_ALIAS("Bus_Trans_RFO", IAP_EVENT_66H) \ +__PMC_EV_ALIAS("Bus_Trans_WB", IAP_EVENT_67H) \ +__PMC_EV_ALIAS("Cycles_Div_Busy", IAP_EVENT_14H_00H) \ +__PMC_EV_ALIAS("Cycles_Int_Masked", IAP_EVENT_C6H_00H) \ +__PMC_EV_ALIAS("Cycles_Int_Pending_Masked", IAP_EVENT_C7H_00H) \ +__PMC_EV_ALIAS("DCU_Snoop_To_Share", IAP_EVENT_78H) \ +__PMC_EV_ALIAS("DCache_Cache_LD", IAP_EVENT_40H) \ +__PMC_EV_ALIAS("DCache_Cache_Lock", IAP_EVENT_42H) \ +__PMC_EV_ALIAS("DCache_Cache_ST", IAP_EVENT_41H) \ +__PMC_EV_ALIAS("DCache_M_Evict", IAP_EVENT_47H_00H) \ +__PMC_EV_ALIAS("DCache_M_Repl", IAP_EVENT_46H_00H) \ +__PMC_EV_ALIAS("DCache_Pend_Miss", IAP_EVENT_48H_00H) \ +__PMC_EV_ALIAS("DCache_Repl", IAP_EVENT_45H_0FH) \ +__PMC_EV_ALIAS("Data_Mem_Cache_Ref", IAP_EVENT_44H_02H) \ +__PMC_EV_ALIAS("Data_Mem_Ref", IAP_EVENT_43H_01H) \ +__PMC_EV_ALIAS("Dbus_Busy", IAP_EVENT_22H) \ +__PMC_EV_ALIAS("Dbus_Busy_Rd", IAP_EVENT_23H) \ +__PMC_EV_ALIAS("Div", IAP_EVENT_13H_00H) \ +__PMC_EV_ALIAS("Dtlb_Miss", IAP_EVENT_49H_00H) \ +__PMC_EV_ALIAS("ESP_Uops", IAP_EVENT_D7H_00H) \ +__PMC_EV_ALIAS("EST_Trans", IAP_EVENT_3AH) \ +__PMC_EV_ALIAS("FP_Assist", IAP_EVENT_11H_00H) \ +__PMC_EV_ALIAS("FP_Comp_Instr_Ret", IAP_EVENT_C1H_00H) \ +__PMC_EV_ALIAS("FP_Comps_Op_Exe", IAP_EVENT_10H_00H) \ +__PMC_EV_ALIAS("FP_MMX_Trans", IAP_EVENT_CCH_01H) \ +__PMC_EV_ALIAS("Fused_Ld_Uops_Ret", IAP_EVENT_DAH_01H) \ +__PMC_EV_ALIAS("Fused_St_Uops_Ret", IAP_EVENT_DAH_02H) \ +__PMC_EV_ALIAS("Fused_Uops_Ret", IAP_EVENT_DAH_00H) \ +__PMC_EV_ALIAS("HW_Int_Rx", IAP_EVENT_C8H_00H) \ +__PMC_EV_ALIAS("ICache_Misses", IAP_EVENT_81H_00H) \ +__PMC_EV_ALIAS("ICache_Reads", IAP_EVENT_80H_00H) \ +__PMC_EV_ALIAS("IFU_Mem_Stall", IAP_EVENT_86H_00H) \ +__PMC_EV_ALIAS("ILD_Stall", IAP_EVENT_87H_00H) \ +__PMC_EV_ALIAS("ITLB_Misses", IAP_EVENT_85H_00H) \ +__PMC_EV_ALIAS("Instr_Decoded", IAP_EVENT_D0H_00H) \ +__PMC_EV_ALIAS("Instr_Ret", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("L1_Pref_Req", IAP_EVENT_4FH_00H) \ +__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \ +__PMC_EV_ALIAS("L2_IFetch", IAP_EVENT_28H) \ +__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \ +__PMC_EV_ALIAS("L2_Lines_In", IAP_EVENT_24H) \ +__PMC_EV_ALIAS("L2_Lines_Out", IAP_EVENT_26H) \ +__PMC_EV_ALIAS("L2_M_Lines_In", IAP_EVENT_25H) \ +__PMC_EV_ALIAS("L2_M_Lines_Out", IAP_EVENT_27H) \ +__PMC_EV_ALIAS("L2_No_Request_Cycles", IAP_EVENT_32H) \ +__PMC_EV_ALIAS("L2_Reject_Cycles", IAP_EVENT_30H) \ +__PMC_EV_ALIAS("L2_Rqsts", IAP_EVENT_2EH) \ +__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \ +__PMC_EV_ALIAS("LD_Blocks", IAP_EVENT_03H_00H) \ +__PMC_EV_ALIAS("LLC_Misses", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("LLC_Reference", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("MMX_Assist", IAP_EVENT_CDH_00H) \ +__PMC_EV_ALIAS("MMX_FP_Trans", IAP_EVENT_CCH_00H) \ +__PMC_EV_ALIAS("MMX_Instr_Exec", IAP_EVENT_B0H_00H) \ +__PMC_EV_ALIAS("MMX_Instr_Ret", IAP_EVENT_CEH_00H) \ +__PMC_EV_ALIAS("Misalign_Mem_Ref", IAP_EVENT_05H_00H) \ +__PMC_EV_ALIAS("Mul", IAP_EVENT_12H_00H) \ +__PMC_EV_ALIAS("NonHlt_Ref_Cycles", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("Pref_Rqsts_Dn", IAP_EVENT_F8H_00H) \ +__PMC_EV_ALIAS("Pref_Rqsts_Up", IAP_EVENT_F0H_00H) \ +__PMC_EV_ALIAS("Resource_Stall", IAP_EVENT_A2H_00H) \ +__PMC_EV_ALIAS("SD_Drains", IAP_EVENT_04H_00H) \ +__PMC_EV_ALIAS("SIMD_FP_DP_P_Comp_Ret", IAP_EVENT_D9H_02H) \ +__PMC_EV_ALIAS("SIMD_FP_DP_P_Ret", IAP_EVENT_D8H_02H) \ +__PMC_EV_ALIAS("SIMD_FP_DP_S_Comp_Ret", IAP_EVENT_D9H_03H) \ +__PMC_EV_ALIAS("SIMD_FP_DP_S_Ret", IAP_EVENT_D8H_03H) \ +__PMC_EV_ALIAS("SIMD_FP_SP_P_Comp_Ret", IAP_EVENT_D9H_00H) \ +__PMC_EV_ALIAS("SIMD_FP_SP_Ret", IAP_EVENT_D8H_00H) \ +__PMC_EV_ALIAS("SIMD_FP_SP_S_Comp_Ret", IAP_EVENT_D9H_01H) \ +__PMC_EV_ALIAS("SIMD_FP_SP_S_Ret", IAP_EVENT_D8H_01H) \ +__PMC_EV_ALIAS("SIMD_Int_128_Ret", IAP_EVENT_D8H_04H) \ +__PMC_EV_ALIAS("SIMD_Int_Pari_Exec", IAP_EVENT_B3H_20H) \ +__PMC_EV_ALIAS("SIMD_Int_Pck_Exec", IAP_EVENT_B3H_04H) \ +__PMC_EV_ALIAS("SIMD_Int_Plog_Exec", IAP_EVENT_B3H_10H) \ +__PMC_EV_ALIAS("SIMD_Int_Pmul_Exec", IAP_EVENT_B3H_01H) \ +__PMC_EV_ALIAS("SIMD_Int_Psft_Exec", IAP_EVENT_B3H_02H) \ +__PMC_EV_ALIAS("SIMD_Int_Sat_Exec", IAP_EVENT_B1H_00H) \ +__PMC_EV_ALIAS("SIMD_Int_Upck_Exec", IAP_EVENT_B3H_08H) \ +__PMC_EV_ALIAS("SMC_Detected", IAP_EVENT_C3H_00H) \ +__PMC_EV_ALIAS("SSE_NTStores_Miss", IAP_EVENT_4BH_03H) \ +__PMC_EV_ALIAS("SSE_NTStores_Ret", IAP_EVENT_07H_03H) \ +__PMC_EV_ALIAS("SSE_PrefNta_Miss", IAP_EVENT_4BH_00H) \ +__PMC_EV_ALIAS("SSE_PrefNta_Ret", IAP_EVENT_07H_00H) \ +__PMC_EV_ALIAS("SSE_PrefT1_Miss", IAP_EVENT_4BH_01H) \ +__PMC_EV_ALIAS("SSE_PrefT1_Ret", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("SSE_PrefT2_Miss", IAP_EVENT_4BH_02H) \ +__PMC_EV_ALIAS("SSE_PrefT2_Ret", IAP_EVENT_07H_02H) \ +__PMC_EV_ALIAS("Seg_Reg_Loads", IAP_EVENT_06H_00H) \ +__PMC_EV_ALIAS("Serial_Execution_Cycles", IAP_EVENT_3CH_02H) \ +__PMC_EV_ALIAS("Thermal_Trip", IAP_EVENT_3BH_C0H) \ +__PMC_EV_ALIAS("Unfusion", IAP_EVENT_DBH_00H) \ +__PMC_EV_ALIAS("Unhalted_Core_Cycles", IAP_EVENT_3CH_00H) \ __PMC_EV_ALIAS("Uops_Ret", IAP_EVENT_C2H_00H) /* @@ -1812,7 +1881,7 @@ */ #define __PMC_EV_ALIAS_COREI7() \ __PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("SB_DRAIN.ANY", IAP_EVENT_04H_07H) \ +__PMC_EV_ALIAS("SB_DRAIN.ANY", IAP_EVENT_04H_07H) \ __PMC_EV_ALIAS("STORE_BLOCKS.AT_RET", IAP_EVENT_06H_04H) \ __PMC_EV_ALIAS("STORE_BLOCKS.L1D_BLOCK", IAP_EVENT_06H_08H) \ __PMC_EV_ALIAS("PARTIAL_ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ @@ -1821,11 +1890,11 @@ __PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ __PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_MISS", IAP_EVENT_08H_20H) \ __PMC_EV_ALIAS("DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED", \ - IAP_EVENT_08H_80H) \ + IAP_EVENT_08H_80H) \ __PMC_EV_ALIAS("MEM_INST_RETIRED.LOADS", IAP_EVENT_0BH_01H) \ __PMC_EV_ALIAS("MEM_INST_RETIRED.STORES", IAP_EVENT_0BH_02H) \ __PMC_EV_ALIAS("MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD", \ - IAP_EVENT_0BH_10H) \ + IAP_EVENT_0BH_10H) \ __PMC_EV_ALIAS("MEM_STORE_RETIRED.DTLB_MISS", IAP_EVENT_0CH_01H) \ __PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ __PMC_EV_ALIAS("UOPS_ISSUED.STALLED_CYCLES", IAP_EVENT_0EH_01H) \ @@ -2124,7 +2193,7 @@ __PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED", IAP_EVENT_10H_10H) \ __PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR", IAP_EVENT_10H_20H) \ __PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION", \ - IAP_EVENT_10H_40H) \ + IAP_EVENT_10H_40H) \ __PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION", \ IAP_EVENT_10H_80H) \ __PMC_EV_ALIAS("SIMD_INT_128.PACKED_MPY", IAP_EVENT_12H_01H) \ @@ -2303,11 +2372,11 @@ __PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ __PMC_EV_ALIAS("MACHINE_CLEARS.MEM_ORDER", IAP_EVENT_C3H_02H) \ __PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ANY_P", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ANY_P", IAP_EVENT_C4H_00H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ANY_P", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ANY_P", IAP_EVENT_C5H_00H) \ __PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ __PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ __PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ @@ -2379,219 +2448,1101 @@ __PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) /* - * Aliases for Sandy Bridge PMC events (253669-039US May 2011) + * Aliases for Haswell core PMC events */ +#define __PMC_EV_ALIAS_HASWELL() \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K", \ + IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_0EH) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_10H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_4K", IAP_EVENT_08H_20H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_2M", IAP_EVENT_08H_40H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_60H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_CACHE_MISS", IAP_EVENT_08H_80H) \ +__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SiNGLE_MUL", IAP_EVENT_0EH_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_MISS", IAP_EVENT_24H_21H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_41H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_42H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_22H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_44H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_24H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_MISS", IAP_EVENT_24H_27H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_REFERENCES", IAP_EVENT_24H_E7H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ +__PMC_EV_ALIAS("L2_RQSTS.L2_PF_HIT", IAP_EVENT_24H_50H) \ +__PMC_EV_ALIAS("L2_RQSTS.L2_PF_MISS", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ +__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_3FH) \ +__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ +__PMC_EV_ALIAS("L2_DEMAND_RQSTS.WB_HIT", IAP_EVENT_27H_50H) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_4K", \ + IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", \ + IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_0EH) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_4K", IAP_EVENT_49H_20H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_2M", IAP_EVENT_49H_40H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_60H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.PDE_CACHE_MISS", IAP_EVENT_49H_80H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ + IAP_EVENT_58H_04H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_NOT_ELIMINATED", \ + IAP_EVENT_58H_08H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_ELIMINATED", IAP_EVENT_58H_02H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CORE_RD", \ + IAP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_4_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_4K", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("TLB_MISSES.WALK_COMPLETED_2M_4M", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_0EH) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_4K", IAP_EVENT_85H_20H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_2M", IAP_EVENT_85H_40H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_60H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_2", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_3", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_4", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_5", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_6", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_7", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_LDM_PENDING", IAP_EVENT_A3H_02H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L2_PENDING", IAP_EVENT_A3H_05H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_08H) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L1", IAP_EVENT_BCH_11H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L1", IAP_EVENT_BCH_21H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L2", IAP_EVENT_BCH_12H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L2", IAP_EVENT_BCH_22H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L3", IAP_EVENT_BCH_14H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L3", IAP_EVENT_BCH_24H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_MEMORY", IAP_EVENT_BCH_18H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_MEMORY", IAP_EVENT_BCH_28H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.ANY_WB_ASSIST", IAP_EVENT_C1H_40H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ + IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ + IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ + IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ + IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ + IAP_EVENT_D3H_01H) \ +__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_1FH) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_05H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_06H) -#define __PMC_EV_ALIAS_SANDYBRIDGE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.DATA_UNKNOWN", IAP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("LD_BLOCKS.ALL_BLOCK", IAP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ALL_STA_BLOCK", IAP_EVENT_07H_08H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("INT_MISC.RAT_STALL_CYCLES", IAP_EVENT_0DH_40H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("INSTS_WRITTEN_TO_IQ.INSTS", IAP_EVENT_17H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_E", IAP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("LOAD_HIT_PER.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("HW_PRE_REQ.DL1_MISS", IAP_EVENT_4EH_02H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("L1D.ALLOCATED_IN_M", IAP_EVENT_51H_02H) \ -__PMC_EV_ALIAS("L1D.EVICTION", IAP_EVENT_51H_04H) \ -__PMC_EV_ALIAS("L1D.ALL_M_REPLACEMENT", IAP_EVENT_51H_08H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP", IAP_EVENT_59H_20H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW", IAP_EVENT_59H_40H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.MUL_SINGLE_UOP", IAP_EVENT_59H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_FL_EMPTY", IAP_EVENT_5BH_0CH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_PRF_CONTROL", IAP_EVENT_5BH_0FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.BOB_FULL", IAP_EVENT_5BH_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.OOO_RSRC", IAP_EVENT_5BH_4FH) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", IAP_EVENT_60H_01H)\ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IQD.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", IAP_EVENT_88H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ -__PMC_EV_ALIAS("BR_INST_EXE.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", IAP_EVENT_89H_04H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LB", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FCSW", IAP_EVENT_A2H_20H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.OTHER_CANCEL", IAP_EVENT_ACH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ -__PMC_EV_ALIAS("DSB_FILL.ALL_CANCEL", IAP_EVENT_ACH_0AH) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("AGU_BYPASS_CANCEL.COUNT", IAP_EVENT_B6H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("L1D_BLOCKS.BANK_CONFLICT_CYCLES", IAP_EVENT_BFH_05H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ITLB_MISS_RETIRED", IAP_EVENT_C1H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCH", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED_ALL", IAP_EVENT_D0H_80H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.LLC_MISS", IAP_EVENT_D4H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RF0", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES-IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) \ -__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) +#define __PMC_EV_ALIAS_IVYBRIDGE() \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK", \ + IAP_EVENT_08H_81H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED", \ + IAP_EVENT_08H_82H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION", \ + IAP_EVENT_08H_84H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ +__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ + IAP_EVENT_58H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_NOT_ELIMINATED", \ + IAP_EVENT_58H_02H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_04H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_ELIMINATED", IAP_EVENT_58H_08H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("TLB_ACCESS.LOAD_STLB_HIT", IAP_EVENT_5FH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ + IAP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_4_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ + IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ + IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ + IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ + IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ + IAP_EVENT_D3H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) +/* + * Aliases for Ivy Bridge Xeon PMC events (325462-045US January 2013) + */ +#define __PMC_EV_ALIAS_IVYBRIDGE_XEON() \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK", \ + IAP_EVENT_08H_81H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED", \ + IAP_EVENT_08H_82H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION", \ + IAP_EVENT_08H_84H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ +__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", IAP_EVENT_58H_01H)\ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_NOT_ELIMINATED", \ + IAP_EVENT_58H_02H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_04H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_ELIMINATED", IAP_EVENT_58H_08H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_5FH_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ + IAP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_4_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_LDM_PENDING", IAP_EVENT_A3H_02H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_NO_EXECUTE", IAP_EVENT_A3H_04H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_08H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_MISS", IAP_EVENT_D1H_20H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ + IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ + IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ + IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ + IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ + IAP_EVENT_D3H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM", \ + IAP_EVENT_D3H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_HITM", \ + IAP_EVENT_D3H_10H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_FWD", \ + IAP_EVENT_D3H_20H) \ +__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_1FH) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) +/* + * Aliases for Sandy Bridge PMC events (253669-039US May 2011) + */ +#define __PMC_EV_ALIAS_SANDYBRIDGE() \ +__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ +__PMC_EV_ALIAS("LD_BLOCKS.DATA_UNKNOWN", IAP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ +__PMC_EV_ALIAS("LD_BLOCKS.ALL_BLOCK", IAP_EVENT_03H_10H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ALL_STA_BLOCK", IAP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ +__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ +__PMC_EV_ALIAS("INT_MISC.RAT_STALL_CYCLES", IAP_EVENT_0DH_40H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", \ + IAP_EVENT_10H_10H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", \ + IAP_EVENT_10H_20H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ +__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ +__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ +__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("INSTS_WRITTEN_TO_IQ.INSTS", IAP_EVENT_17H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_E", IAP_EVENT_27H_04H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("HW_PRE_REQ.DL1_MISS", IAP_EVENT_4EH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("L1D.ALLOCATED_IN_M", IAP_EVENT_51H_02H) \ +__PMC_EV_ALIAS("L1D.EVICTION", IAP_EVENT_51H_04H) \ +__PMC_EV_ALIAS("L1D.ALL_M_REPLACEMENT", IAP_EVENT_51H_08H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP", IAP_EVENT_59H_20H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW", IAP_EVENT_59H_40H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.MUL_SINGLE_UOP", IAP_EVENT_59H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_FL_EMPTY", IAP_EVENT_5BH_0CH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_PRF_CONTROL", IAP_EVENT_5BH_0FH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.BOB_FULL", IAP_EVENT_5BH_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.OOO_RSRC", IAP_EVENT_5BH_4FH) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IQD.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXE.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.LB", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.FCSW", IAP_EVENT_A2H_20H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.OTHER_CANCEL", IAP_EVENT_ACH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ +__PMC_EV_ALIAS("DSB_FILL.ALL_CANCEL", IAP_EVENT_ACH_0AH) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED.THREAD", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ +__PMC_EV_ALIAS("AGU_BYPASS_CANCEL.COUNT", IAP_EVENT_B6H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("L1D_BLOCKS.BANK_CONFLICT_CYCLES", IAP_EVENT_BFH_05H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.ITLB_MISS_RETIRED", IAP_EVENT_C1H_02H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCH", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED_ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ + IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ + IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ + IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ + IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.LLC_MISS", \ + IAP_EVENT_D4H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) \ +__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) + +/* + * Aliases for Sandy Bridge Xeon PMC events (253669-044US August 2012) + */ +#define __PMC_EV_ALIAS_SANDYBRIDGE_XEON() \ +__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ +__PMC_EV_ALIAS("LD_BLOCKS.DATA_UNKNOWN", IAP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ +__PMC_EV_ALIAS("LD_BLOCKS.ALL_BLOCK", IAP_EVENT_03H_10H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ALL_STA_BLOCK", IAP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ +__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ +__PMC_EV_ALIAS("INT_MISC.RAT_STALL_CYCLES", IAP_EVENT_0DH_40H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", \ + IAP_EVENT_10H_10H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", \ + IAP_EVENT_10H_20H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ +__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ +__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ +__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("INSTS_WRITTEN_TO_IQ.INSTS", IAP_EVENT_17H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_E", IAP_EVENT_27H_04H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_S", IAP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("HW_PRE_REQ.DL1_MISS", IAP_EVENT_4EH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("L1D.ALLOCATED_IN_M", IAP_EVENT_51H_02H) \ +__PMC_EV_ALIAS("L1D.EVICTION", IAP_EVENT_51H_04H) \ +__PMC_EV_ALIAS("L1D.ALL_M_REPLACEMENT", IAP_EVENT_51H_08H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP", IAP_EVENT_59H_20H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW", IAP_EVENT_59H_40H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.MUL_SINGLE_UOP", IAP_EVENT_59H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_FL_EMPTY", IAP_EVENT_5BH_0CH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_PRF_CONTROL", IAP_EVENT_5BH_0FH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.BOB_FULL", IAP_EVENT_5BH_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.OOO_RSRC", IAP_EVENT_5BH_4FH) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXE.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.LB", IAP_EVENT_A2H_02H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.FCSW", IAP_EVENT_A2H_20H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_02H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_NO_DISPATCH", IAP_EVENT_A3H_04H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.OTHER_CANCEL", IAP_EVENT_ACH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ +__PMC_EV_ALIAS("DSB_FILL.ALL_CANCEL", IAP_EVENT_ACH_0AH) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED.THREAD", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ +__PMC_EV_ALIAS("AGU_BYPASS_CANCEL.COUNT", IAP_EVENT_B6H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("L1D_BLOCKS.BANK_CONFLICT_CYCLES", IAP_EVENT_BFH_05H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.ITLB_MISS_RETIRED", IAP_EVENT_C1H_02H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCH", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED_ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_MISS", IAP_EVENT_D1H_20H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ + IAP_EVENT_D3H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM", \ + IAP_EVENT_D3H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS", IAP_EVENT_D4H_02H)\ +__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) \ +__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) + /* timestamp counters. */ #define __PMC_EV_TSC() \ __PMC_EV(TSC, TSC) @@ -2692,6 +3643,7 @@ __PMC_EV(UCP, EVENT_22H_02H) \ __PMC_EV(UCP, EVENT_22H_04H) \ __PMC_EV(UCP, EVENT_22H_08H) \ +__PMC_EV(UCP, EVENT_22H_10H) \ __PMC_EV(UCP, EVENT_22H_20H) \ __PMC_EV(UCP, EVENT_22H_40H) \ __PMC_EV(UCP, EVENT_22H_80H) \ @@ -2769,6 +3721,7 @@ __PMC_EV(UCP, EVENT_34H_01H) \ __PMC_EV(UCP, EVENT_34H_02H) \ __PMC_EV(UCP, EVENT_34H_04H) \ +__PMC_EV(UCP, EVENT_34H_06H) \ __PMC_EV(UCP, EVENT_34H_08H) \ __PMC_EV(UCP, EVENT_34H_10H) \ __PMC_EV(UCP, EVENT_34H_20H) \ @@ -2858,104 +3811,105 @@ __PMC_EV_ALIAS("GQ_CYCLES_FULL.PEER_PROBE_TRACKER", UCP_EVENT_00H_04H) \ __PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.READ_TRACKER", UCP_EVENT_01H_01H) \ __PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.WRITE_TRACKER", UCP_EVENT_01H_02H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", UCP_EVENT_01H_04H) \ -__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", \ + UCP_EVENT_01H_04H) \ +__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ __PMC_EV_ALIAS("GQ_ALLOC.RT_TO_RTID_ACQUIRED", UCP_EVENT_03H_08H) \ __PMC_EV_ALIAS("GQ_ALLOC.WT_TO_RTID_ACQUIRED", UCP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ +__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ __PMC_EV_ALIAS("GQ_ALLOC.PEER_PROBE_TRACKER", UCP_EVENT_03H_40H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.I_STATE", UCP_EVENT_06H_01H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.S_STATE", UCP_EVENT_06H_02H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_S_STATE", UCP_EVENT_06H_04H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_I_STATE", UCP_EVENT_06H_08H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.CONFLICT", UCP_EVENT_06H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.I_STATE", UCP_EVENT_07H_01H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.S_STATE", UCP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H)\ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H)\ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.CONFLICT", UCP_EVENT_07H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.HITM", UCP_EVENT_07H_24H) \ -__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ -__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ -__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ -__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ -__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ -__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ -__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ -__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ -__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ +__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ +__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ +__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ +__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ +__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ +__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ +__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ +__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ +__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ +__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ +__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ __PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.REMOTE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ -__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH0", UCP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH1", UCP_EVENT_27H_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH2", UCP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH0", UCP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH1", UCP_EVENT_27H_10H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH2", UCP_EVENT_27H_20H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ +__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH0", UCP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH1", UCP_EVENT_27H_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH2", UCP_EVENT_27H_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH0", UCP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH1", UCP_EVENT_27H_10H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH2", UCP_EVENT_27H_20H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH0", UCP_EVENT_2DH_01H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH1", UCP_EVENT_2DH_02H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH2", UCP_EVENT_2DH_04H) \ @@ -2964,71 +3918,113 @@ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH1", UCP_EVENT_2EH_02H) \ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH2", UCP_EVENT_2EH_04H) \ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.ANY", UCP_EVENT_2EH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ -__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", UCP_EVENT_40H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", UCP_EVENT_40H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", UCP_EVENT_40H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", UCP_EVENT_40H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", UCP_EVENT_40H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", UCP_EVENT_40H_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ +__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", \ + UCP_EVENT_40H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", \ + UCP_EVENT_40H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", \ + UCP_EVENT_40H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", \ + UCP_EVENT_40H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", \ + UCP_EVENT_40H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", \ + UCP_EVENT_40H_20H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_0", UCP_EVENT_40H_07H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_1", UCP_EVENT_40H_38H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", UCP_EVENT_41H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", UCP_EVENT_41H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", UCP_EVENT_41H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", UCP_EVENT_41H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", UCP_EVENT_41H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", UCP_EVENT_41H_20H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", \ + UCP_EVENT_41H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", \ + UCP_EVENT_41H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", \ + UCP_EVENT_41H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", \ + UCP_EVENT_41H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", \ + UCP_EVENT_41H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", \ + UCP_EVENT_41H_20H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_0", UCP_EVENT_41H_07H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_1", UCP_EVENT_41H_38H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ __PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_0", UCP_EVENT_43H_01H) \ __PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_1", UCP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ __PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) +/* + * Aliases for Haswell uncore PMC events + */ +#define __PMC_EV_ALIAS_HASWELLUC() \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.MISS", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.INVAL", UCP_EVENT_22H_02H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.HIT", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.HITM", UCP_EVENT_22H_08H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.INVAL_M", UCP_EVENT_22H_10H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.EXTERNAL_FILTER", \ + UCP_EVENT_22H_20H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.XCORE_FILTER", UCP_EVENT_22H_40H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.EVICTION_FILTER", \ + UCP_EVENT_22H_80H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.ES", UCP_EVENT_34H_06H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.READ_FILTER", UCP_EVENT_34H_10H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.WRITE_FILTER", UCP_EVENT_34H_20H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.EXTSNP_FILTER", UCP_EVENT_34H_40H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.ANY_REQUEST_FILTER", \ + UCP_EVENT_34H_80H) \ +__PMC_EV_ALIAS("UNC_ARB_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ +__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ +__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ +__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ +__PMC_EV_ALIAS("UNC_ARB_COH_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ +__PMC_EV_ALIAS("UNC_ARB_COH_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) + + #define __PMC_EV_ALIAS_WESTMEREUC() \ __PMC_EV_ALIAS("GQ_CYCLES_FULL.READ_TRACKER", UCP_EVENT_00H_01H) \ __PMC_EV_ALIAS("GQ_CYCLES_FULL.WRITE_TRACKER", UCP_EVENT_00H_02H) \ @@ -3035,110 +4031,111 @@ __PMC_EV_ALIAS("GQ_CYCLES_FULL.PEER_PROBE_TRACKER", UCP_EVENT_00H_04H) \ __PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.READ_TRACKER", UCP_EVENT_01H_01H) \ __PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.WRITE_TRACKER", UCP_EVENT_01H_02H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", UCP_EVENT_01H_04H) \ -__PMC_EV_ALIAS("GQ_OCCUPANCY.READ_TRACKER", UCP_EVENT_02H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", \ + UCP_EVENT_01H_04H) \ +__PMC_EV_ALIAS("GQ_OCCUPANCY.READ_TRACKER", UCP_EVENT_02H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ __PMC_EV_ALIAS("GQ_ALLOC.RT_TO_RTID_ACQUIRED", UCP_EVENT_03H_08H) \ __PMC_EV_ALIAS("GQ_ALLOC.WT_TO_RTID_ACQUIRED", UCP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ +__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ __PMC_EV_ALIAS("GQ_ALLOC.PEER_PROBE_TRACKER", UCP_EVENT_03H_40H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.I_STATE", UCP_EVENT_06H_01H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.S_STATE", UCP_EVENT_06H_02H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_S_STATE", UCP_EVENT_06H_04H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_I_STATE", UCP_EVENT_06H_08H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.CONFLICT", UCP_EVENT_06H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.I_STATE", UCP_EVENT_07H_01H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.S_STATE", UCP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H)\ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H)\ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.CONFLICT", UCP_EVENT_07H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.HITM", UCP_EVENT_07H_24H) \ -__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ -__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ -__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ -__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ -__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ -__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ -__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ -__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ -__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S", UCP_EVENT_0CH_01H) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I", UCP_EVENT_0CH_02H) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_E", UCP_EVENT_0CH_04H_E) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_F", UCP_EVENT_0CH_04H_F) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_M", UCP_EVENT_0CH_04H_M) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_S", UCP_EVENT_0CH_04H_S) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_E", UCP_EVENT_0CH_08H_E) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_F", UCP_EVENT_0CH_08H_F) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_M", UCP_EVENT_0CH_08H_M) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_S", UCP_EVENT_0CH_08H_S) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ +__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ +__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ +__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ +__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ +__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ +__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ +__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ +__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ +__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ +__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ +__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S", UCP_EVENT_0CH_01H) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I", UCP_EVENT_0CH_02H) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_E", UCP_EVENT_0CH_04H_E) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_F", UCP_EVENT_0CH_04H_F) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_M", UCP_EVENT_0CH_04H_M) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_S", UCP_EVENT_0CH_04H_S) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_E", UCP_EVENT_0CH_08H_E) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_F", UCP_EVENT_0CH_08H_F) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_M", UCP_EVENT_0CH_08H_M) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_S", UCP_EVENT_0CH_08H_S) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ __PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.REMOTE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ -__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.ANY", UCP_EVENT_2AH_07H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ +__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.ANY", UCP_EVENT_2AH_07H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH0", UCP_EVENT_2DH_01H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH1", UCP_EVENT_2DH_02H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH2", UCP_EVENT_2DH_04H) \ @@ -3147,89 +4144,101 @@ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH1", UCP_EVENT_2EH_02H) \ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH2", UCP_EVENT_2EH_04H) \ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.ANY", UCP_EVENT_2EH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ -__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH0", UCP_EVENT_32H_01H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH1", UCP_EVENT_32H_02H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH2", UCP_EVENT_32H_04H) \ -__PMC_EV_ALIAS("IMC_RETRY.ANY", UCP_EVENT_32H_07H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.IOH", UCP_EVENT_33H_01H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.REMOTE", UCP_EVENT_33H_02H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.ANY", UCP_EVENT_33H_07H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.IOH_ORDER", UCP_EVENT_34H_01H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_ORDER", UCP_EVENT_34H_02H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_ORDER", UCP_EVENT_34H_04H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.IOH_CONFLICT", UCP_EVENT_34H_08H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_CONFLICT", UCP_EVENT_34H_10H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_CONFLICT", UCP_EVENT_34H_20H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.IOH", UCP_EVENT_35H_01H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.REMOTE", UCP_EVENT_35H_02H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.LOCAL", UCP_EVENT_35H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", UCP_EVENT_40H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", UCP_EVENT_40H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", UCP_EVENT_40H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", UCP_EVENT_40H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", UCP_EVENT_40H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", UCP_EVENT_40H_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ +__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH0", UCP_EVENT_32H_01H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH1", UCP_EVENT_32H_02H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH2", UCP_EVENT_32H_04H) \ +__PMC_EV_ALIAS("IMC_RETRY.ANY", UCP_EVENT_32H_07H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.IOH", UCP_EVENT_33H_01H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.REMOTE", UCP_EVENT_33H_02H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.ANY", UCP_EVENT_33H_07H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.IOH_ORDER", UCP_EVENT_34H_01H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_ORDER", UCP_EVENT_34H_02H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_ORDER", UCP_EVENT_34H_04H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.IOH_CONFLICT", UCP_EVENT_34H_08H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_CONFLICT", UCP_EVENT_34H_10H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_CONFLICT", UCP_EVENT_34H_20H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.IOH", UCP_EVENT_35H_01H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.REMOTE", UCP_EVENT_35H_02H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.LOCAL", UCP_EVENT_35H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", \ + UCP_EVENT_40H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", \ + UCP_EVENT_40H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", \ + UCP_EVENT_40H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", \ + UCP_EVENT_40H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", \ + UCP_EVENT_40H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", \ + UCP_EVENT_40H_20H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_0", UCP_EVENT_40H_07H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_1", UCP_EVENT_40H_38H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", UCP_EVENT_41H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", UCP_EVENT_41H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", UCP_EVENT_41H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", UCP_EVENT_41H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", UCP_EVENT_41H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", UCP_EVENT_41H_20H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", \ + UCP_EVENT_41H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", \ + UCP_EVENT_41H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", \ + UCP_EVENT_41H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", \ + UCP_EVENT_41H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", \ + UCP_EVENT_41H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", \ + UCP_EVENT_41H_20H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_0", UCP_EVENT_41H_07H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_1", UCP_EVENT_41H_38H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_0", UCP_EVENT_42H_01H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_1", UCP_EVENT_42H_04H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_0", UCP_EVENT_42H_01H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_1", UCP_EVENT_42H_04H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ __PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_0", UCP_EVENT_43H_01H) \ __PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_1", UCP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) \ -__PMC_EV_ALIAS("DRAM_THERMAL_THROTTLED", UCP_EVENT_67H_01H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) \ +__PMC_EV_ALIAS("DRAM_THERMAL_THROTTLED", UCP_EVENT_67H_01H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_0", UCP_EVENT_80H_01H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_1", UCP_EVENT_80H_02H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_2", UCP_EVENT_80H_04H) \ @@ -3238,41 +4247,41 @@ __PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_1", UCP_EVENT_81H_02H) \ __PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_2", UCP_EVENT_81H_04H) \ __PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_3", UCP_EVENT_81H_08H) \ -__PMC_EV_ALIAS("PROCHOT_ASSERTION", UCP_EVENT_82H_01H) \ +__PMC_EV_ALIAS("PROCHOT_ASSERTION", UCP_EVENT_82H_01H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_0", UCP_EVENT_83H_01H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_1", UCP_EVENT_83H_02H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_2", UCP_EVENT_83H_04H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_3", UCP_EVENT_83H_08H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_0", UCP_EVENT_84H_01H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_1", UCP_EVENT_84H_02H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_2", UCP_EVENT_84H_04H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_3", UCP_EVENT_84H_08H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_0", UCP_EVENT_84H_01H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_1", UCP_EVENT_84H_02H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_2", UCP_EVENT_84H_04H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_3", UCP_EVENT_84H_08H) \ __PMC_EV_ALIAS("CYCLES_UNHALTED_L3_FLL_ENABLE", UCP_EVENT_85H_02H) \ __PMC_EV_ALIAS("CYCLES_UNHALTED_L3_FLL_DISABLE", UCP_EVENT_86H_01H) -#define __PMC_EV_ALIAS_SANDYBRIDGEUC() \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITI", UCP_EVENT_22H_01H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITFSE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSHITFSE", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSFWDM", UCP_EVENT_22H_08H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_EXTERNAL", UCP_EVENT_22H_20H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_XCORE", UCP_EVENT_22H_40H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE_AND_XCORE2", UCP_EVENT_22H_80H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.E", UCP_EVENT_34H_02H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.S", UCP_EVENT_34H_04H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_READ", UCP_EVENT_34H_10H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP_AND_READ2", UCP_EVENT_34H_20H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_EXTSNP", UCP_EVENT_34H_40H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_ANY", UCP_EVENT_34H_80H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ -__PMC_EV_ALIAS("IMPH_C0H_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) +#define __PMC_EV_ALIAS_SANDYBRIDGEUC() \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITI", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITFSE", UCP_EVENT_22H_02H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSHITFSE", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSFWDM", UCP_EVENT_22H_08H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_EXTERNAL", UCP_EVENT_22H_20H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_XCORE", UCP_EVENT_22H_40H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE_AND_XCORE2", UCP_EVENT_22H_80H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.E", UCP_EVENT_34H_02H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.S", UCP_EVENT_34H_04H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_READ", UCP_EVENT_34H_10H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP_AND_READ2", UCP_EVENT_34H_20H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_EXTSNP", UCP_EVENT_34H_40H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_ANY", UCP_EVENT_34H_80H) \ +__PMC_EV_ALIAS("IMPH_CB0_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ +__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ +__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ +__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ +__PMC_EV_ALIAS("IMPH_C0H_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ +__PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) /* * Intel XScale events from: @@ -3420,226 +4429,230 @@ #define PMC_EV_MIPS24K_FIRST PMC_EV_MIPS24K_CYCLE #define PMC_EV_MIPS24K_LAST PMC_EV_MIPS24K_WBB_FULL_PIPELINE_STALLS -#define __PMC_EV_PPC7450() \ - __PMC_EV(PPC7450, CYCLE) \ - __PMC_EV(PPC7450, INSTR_COMPLETED) \ - __PMC_EV(PPC7450, TLB_BIT_TRANSITIONS) \ - __PMC_EV(PPC7450, INSTR_DISPATCHED) \ - __PMC_EV(PPC7450, PMON_EXCEPT) \ - __PMC_EV(PPC7450, PMON_SIG) \ - __PMC_EV(PPC7450, VPU_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, VFPU_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, VIU1_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, VIU2_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, MTVSCR_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, MTVRSAVE_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, VPU_INSTR_WAIT_CYCLES) \ - __PMC_EV(PPC7450, VFPU_INSTR_WAIT_CYCLES) \ - __PMC_EV(PPC7450, VIU1_INSTR_WAIT_CYCLES) \ - __PMC_EV(PPC7450, VIU2_INSTR_WAIT_CYCLES) \ - __PMC_EV(PPC7450, MFVSCR_SYNC_CYCLES) \ - __PMC_EV(PPC7450, VSCR_SAT_SET) \ - __PMC_EV(PPC7450, STORE_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, L1_INSTR_CACHE_MISSES) \ - __PMC_EV(PPC7450, L1_DATA_SNOOPS) \ - __PMC_EV(PPC7450, UNRESOLVED_BRANCHES) \ - __PMC_EV(PPC7450, SPEC_BUFFER_CYCLES) \ - __PMC_EV(PPC7450, BRANCH_UNIT_STALL_CYCLES) \ - __PMC_EV(PPC7450, TRUE_BRANCH_TARGET_HITS) \ - __PMC_EV(PPC7450, BRANCH_LINK_STAC_PREDICTED) \ - __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_DISPATCHES) \ - __PMC_EV(PPC7450, CYCLES_THREE_INSTR_DISPATCHED) \ - __PMC_EV(PPC7450, THRESHOLD_INSTR_QUEUE_ENTRIES_CYCLES) \ +#define __PMC_EV_PPC7450() \ + __PMC_EV(PPC7450, CYCLE) \ + __PMC_EV(PPC7450, INSTR_COMPLETED) \ + __PMC_EV(PPC7450, TLB_BIT_TRANSITIONS) \ + __PMC_EV(PPC7450, INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, PMON_EXCEPT) \ + __PMC_EV(PPC7450, PMON_SIG) \ + __PMC_EV(PPC7450, VPU_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, VFPU_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, VIU1_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, VIU2_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, MTVSCR_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, MTVRSAVE_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, VPU_INSTR_WAIT_CYCLES) \ + __PMC_EV(PPC7450, VFPU_INSTR_WAIT_CYCLES) \ + __PMC_EV(PPC7450, VIU1_INSTR_WAIT_CYCLES) \ + __PMC_EV(PPC7450, VIU2_INSTR_WAIT_CYCLES) \ + __PMC_EV(PPC7450, MFVSCR_SYNC_CYCLES) \ + __PMC_EV(PPC7450, VSCR_SAT_SET) \ + __PMC_EV(PPC7450, STORE_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, L1_INSTR_CACHE_MISSES) \ + __PMC_EV(PPC7450, L1_DATA_SNOOPS) \ + __PMC_EV(PPC7450, UNRESOLVED_BRANCHES) \ + __PMC_EV(PPC7450, SPEC_BUFFER_CYCLES) \ + __PMC_EV(PPC7450, BRANCH_UNIT_STALL_CYCLES) \ + __PMC_EV(PPC7450, TRUE_BRANCH_TARGET_HITS) \ + __PMC_EV(PPC7450, BRANCH_LINK_STAC_PREDICTED) \ + __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_DISPATCHES) \ + __PMC_EV(PPC7450, CYCLES_THREE_INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, THRESHOLD_INSTR_QUEUE_ENTRIES_CYCLES) \ __PMC_EV(PPC7450, THRESHOLD_VEC_INSTR_QUEUE_ENTRIES_CYCLES) \ - __PMC_EV(PPC7450, CYCLES_NO_COMPLETED_INSTRS) \ - __PMC_EV(PPC7450, IU2_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, BRANCHES_COMPLETED) \ - __PMC_EV(PPC7450, EIEIO_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, MTSPR_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, SC_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, LS_LM_COMPLETED) \ - __PMC_EV(PPC7450, ITLB_HW_TABLE_SEARCH_CYCLES) \ - __PMC_EV(PPC7450, DTLB_HW_SEARCH_CYCLES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, L1_INSTR_CACHE_ACCESSES) \ - __PMC_EV(PPC7450, INSTR_BKPT_MATCHES) \ - __PMC_EV(PPC7450, L1_DATA_CACHE_LOAD_MISS_CYCLES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_ON_MODIFIED) \ - __PMC_EV(PPC7450, LOAD_MISS_ALIAS) \ - __PMC_EV(PPC7450, LOAD_MISS_ALIAS_ON_TOUCH) \ - __PMC_EV(PPC7450, TOUCH_ALIAS) \ - __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_CASTOUT_QUEUE) \ - __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_CASTOUT) \ - __PMC_EV(PPC7450, L1_DATA_SNOOP_HITS) \ - __PMC_EV(PPC7450, WRITE_THROUGH_STORES) \ - __PMC_EV(PPC7450, CACHE_INHIBITED_STORES) \ - __PMC_EV(PPC7450, L1_DATA_LOAD_HIT) \ - __PMC_EV(PPC7450, L1_DATA_TOUCH_HIT) \ - __PMC_EV(PPC7450, L1_DATA_STORE_HIT) \ - __PMC_EV(PPC7450, L1_DATA_TOTAL_HITS) \ - __PMC_EV(PPC7450, DST_INSTR_DISPATCHED) \ - __PMC_EV(PPC7450, REFRESHED_DSTS) \ - __PMC_EV(PPC7450, SUCCESSFUL_DST_TABLE_SEARCHES) \ - __PMC_EV(PPC7450, DSS_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, DST_STREAM_0_CACHE_LINE_FETCHES) \ - __PMC_EV(PPC7450, VTQ_SUSPENDS_DUE_TO_CTX_CHANGE) \ - __PMC_EV(PPC7450, VTQ_LINE_FETCH_HIT) \ - __PMC_EV(PPC7450, VEC_LOAD_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, FP_STORE_INSTR_COMPLETED_IN_LSU) \ - __PMC_EV(PPC7450, FPU_RENORMALIZATION) \ - __PMC_EV(PPC7450, FPU_DENORMALIZATION) \ - __PMC_EV(PPC7450, FP_STORE_CAUSES_STALL_IN_LSU) \ - __PMC_EV(PPC7450, LD_ST_TRUE_ALIAS_STALL) \ - __PMC_EV(PPC7450, LSU_INDEXED_ALIAS_STALL) \ - __PMC_EV(PPC7450, LSU_ALIAS_VS_FSQ_WB0_WB1) \ - __PMC_EV(PPC7450, LSU_ALIAS_VS_CSQ) \ - __PMC_EV(PPC7450, LSU_LOAD_HIT_LINE_ALIAS_VS_CSQ0) \ - __PMC_EV(PPC7450, LSU_LOAD_MISS_LINE_ALIAS_VS_CSQ0) \ - __PMC_EV(PPC7450, LSU_TOUCH_LINE_ALIAS_VS_FSQ_WB0_WB1) \ - __PMC_EV(PPC7450, LSU_TOUCH_ALIAS_VS_CSQ) \ - __PMC_EV(PPC7450, LSU_LMQ_FULL_STALL) \ - __PMC_EV(PPC7450, FP_LOAD_INSTR_COMPLETED_IN_LSU) \ + __PMC_EV(PPC7450, CYCLES_NO_COMPLETED_INSTRS) \ + __PMC_EV(PPC7450, IU2_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, BRANCHES_COMPLETED) \ + __PMC_EV(PPC7450, EIEIO_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, MTSPR_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, SC_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, LS_LM_COMPLETED) \ + __PMC_EV(PPC7450, ITLB_HW_TABLE_SEARCH_CYCLES) \ + __PMC_EV(PPC7450, DTLB_HW_SEARCH_CYCLES_OVER_THRESHOLD) \ + __PMC_EV(PPC7450, L1_INSTR_CACHE_ACCESSES) \ + __PMC_EV(PPC7450, INSTR_BKPT_MATCHES) \ + __PMC_EV(PPC7450, L1_DATA_CACHE_LOAD_MISS_CYCLES_OVER_THRESHOLD)\ + __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_ON_MODIFIED) \ + __PMC_EV(PPC7450, LOAD_MISS_ALIAS) \ + __PMC_EV(PPC7450, LOAD_MISS_ALIAS_ON_TOUCH) \ + __PMC_EV(PPC7450, TOUCH_ALIAS) \ + __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_CASTOUT_QUEUE) \ + __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_CASTOUT) \ + __PMC_EV(PPC7450, L1_DATA_SNOOP_HITS) \ + __PMC_EV(PPC7450, WRITE_THROUGH_STORES) \ + __PMC_EV(PPC7450, CACHE_INHIBITED_STORES) \ + __PMC_EV(PPC7450, L1_DATA_LOAD_HIT) \ + __PMC_EV(PPC7450, L1_DATA_TOUCH_HIT) \ + __PMC_EV(PPC7450, L1_DATA_STORE_HIT) \ + __PMC_EV(PPC7450, L1_DATA_TOTAL_HITS) \ + __PMC_EV(PPC7450, DST_INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, REFRESHED_DSTS) \ + __PMC_EV(PPC7450, SUCCESSFUL_DST_TABLE_SEARCHES) \ + __PMC_EV(PPC7450, DSS_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, DST_STREAM_0_CACHE_LINE_FETCHES) \ + __PMC_EV(PPC7450, VTQ_SUSPENDS_DUE_TO_CTX_CHANGE) \ + __PMC_EV(PPC7450, VTQ_LINE_FETCH_HIT) \ + __PMC_EV(PPC7450, VEC_LOAD_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, FP_STORE_INSTR_COMPLETED_IN_LSU) \ + __PMC_EV(PPC7450, FPU_RENORMALIZATION) \ + __PMC_EV(PPC7450, FPU_DENORMALIZATION) \ + __PMC_EV(PPC7450, FP_STORE_CAUSES_STALL_IN_LSU) \ + __PMC_EV(PPC7450, LD_ST_TRUE_ALIAS_STALL) \ + __PMC_EV(PPC7450, LSU_INDEXED_ALIAS_STALL) \ + __PMC_EV(PPC7450, LSU_ALIAS_VS_FSQ_WB0_WB1) \ + __PMC_EV(PPC7450, LSU_ALIAS_VS_CSQ) \ + __PMC_EV(PPC7450, LSU_LOAD_HIT_LINE_ALIAS_VS_CSQ0) \ + __PMC_EV(PPC7450, LSU_LOAD_MISS_LINE_ALIAS_VS_CSQ0) \ + __PMC_EV(PPC7450, LSU_TOUCH_LINE_ALIAS_VS_FSQ_WB0_WB1) \ + __PMC_EV(PPC7450, LSU_TOUCH_ALIAS_VS_CSQ) \ + __PMC_EV(PPC7450, LSU_LMQ_FULL_STALL) \ + __PMC_EV(PPC7450, FP_LOAD_INSTR_COMPLETED_IN_LSU) \ __PMC_EV(PPC7450, FP_LOAD_SINGLE_INSTR_COMPLETED_IN_LSU) \ - __PMC_EV(PPC7450, FP_LOAD_DOUBLE_COMPLETED_IN_LSU) \ - __PMC_EV(PPC7450, LSU_RA_LATCH_STALL) \ - __PMC_EV(PPC7450, LSU_LOAD_VS_STORE_QUEUE_ALIAS_STALL) \ - __PMC_EV(PPC7450, LSU_LMQ_INDEX_ALIAS) \ - __PMC_EV(PPC7450, LSU_STORE_QUEUE_INDEX_ALIAS) \ - __PMC_EV(PPC7450, LSU_CSQ_FORWARDING) \ - __PMC_EV(PPC7450, LSU_MISALIGNED_LOAD_FINISH) \ - __PMC_EV(PPC7450, LSU_MISALIGN_STORE_COMPLETED) \ - __PMC_EV(PPC7450, LSU_MISALIGN_STALL) \ - __PMC_EV(PPC7450, FP_ONE_QUARTER_FPSCR_RENAMES_BUSY) \ - __PMC_EV(PPC7450, FP_ONE_HALF_FPSCR_RENAMES_BUSY) \ - __PMC_EV(PPC7450, FP_THREE_QUARTERS_FPSCR_RENAMES_BUSY) \ - __PMC_EV(PPC7450, FP_ALL_FPSCR_RENAMES_BUSY) \ - __PMC_EV(PPC7450, FP_DENORMALIZED_RESULT) \ - __PMC_EV(PPC7450, L1_DATA_TOTAL_MISSES) \ - __PMC_EV(PPC7450, DISPATCHES_TO_FPR_ISSUE_QUEUE) \ - __PMC_EV(PPC7450, LSU_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, LOAD_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, SS_SM_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, TLBIE_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, LWARX_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, MFSPR_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, REFETCH_SERIALIZATION) \ + __PMC_EV(PPC7450, FP_LOAD_DOUBLE_COMPLETED_IN_LSU) \ + __PMC_EV(PPC7450, LSU_RA_LATCH_STALL) \ + __PMC_EV(PPC7450, LSU_LOAD_VS_STORE_QUEUE_ALIAS_STALL) \ + __PMC_EV(PPC7450, LSU_LMQ_INDEX_ALIAS) \ + __PMC_EV(PPC7450, LSU_STORE_QUEUE_INDEX_ALIAS) \ + __PMC_EV(PPC7450, LSU_CSQ_FORWARDING) \ + __PMC_EV(PPC7450, LSU_MISALIGNED_LOAD_FINISH) \ + __PMC_EV(PPC7450, LSU_MISALIGN_STORE_COMPLETED) \ + __PMC_EV(PPC7450, LSU_MISALIGN_STALL) \ + __PMC_EV(PPC7450, FP_ONE_QUARTER_FPSCR_RENAMES_BUSY) \ + __PMC_EV(PPC7450, FP_ONE_HALF_FPSCR_RENAMES_BUSY) \ + __PMC_EV(PPC7450, FP_THREE_QUARTERS_FPSCR_RENAMES_BUSY) \ + __PMC_EV(PPC7450, FP_ALL_FPSCR_RENAMES_BUSY) \ + __PMC_EV(PPC7450, FP_DENORMALIZED_RESULT) \ + __PMC_EV(PPC7450, L1_DATA_TOTAL_MISSES) \ + __PMC_EV(PPC7450, DISPATCHES_TO_FPR_ISSUE_QUEUE) \ + __PMC_EV(PPC7450, LSU_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, LOAD_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, SS_SM_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, TLBIE_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, LWARX_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, MFSPR_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, REFETCH_SERIALIZATION) \ __PMC_EV(PPC7450, COMPLETION_QUEUE_ENTRIES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, CYCLES_ONE_INSTR_DISPATCHED) \ - __PMC_EV(PPC7450, CYCLES_TWO_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, ITLB_NON_SPECULATIVE_MISSES) \ + __PMC_EV(PPC7450, CYCLES_ONE_INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, CYCLES_TWO_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, ITLB_NON_SPECULATIVE_MISSES) \ __PMC_EV(PPC7450, CYCLES_WAITING_FROM_L1_INSTR_CACHE_MISS) \ - __PMC_EV(PPC7450, L1_DATA_LOAD_ACCESS_MISS) \ - __PMC_EV(PPC7450, L1_DATA_TOUCH_MISS) \ - __PMC_EV(PPC7450, L1_DATA_STORE_MISS) \ - __PMC_EV(PPC7450, L1_DATA_TOUCH_MISS_CYCLES) \ - __PMC_EV(PPC7450, L1_DATA_CYCLES_USED) \ - __PMC_EV(PPC7450, DST_STREAM_1_CACHE_LINE_FETCHES) \ - __PMC_EV(PPC7450, VTQ_STREAM_CANCELED_PREMATURELY) \ - __PMC_EV(PPC7450, VTQ_RESUMES_DUE_TO_CTX_CHANGE) \ - __PMC_EV(PPC7450, VTQ_LINE_FETCH_MISS) \ - __PMC_EV(PPC7450, VTQ_LINE_FETCH) \ - __PMC_EV(PPC7450, TLBIE_SNOOPS) \ - __PMC_EV(PPC7450, L1_INSTR_CACHE_RELOADS) \ - __PMC_EV(PPC7450, L1_DATA_CACHE_RELOADS) \ - __PMC_EV(PPC7450, L1_DATA_CACHE_CASTOUTS_TO_L2) \ - __PMC_EV(PPC7450, STORE_MERGE_GATHER) \ - __PMC_EV(PPC7450, CACHEABLE_STORE_MERGE_TO_32_BYTES) \ - __PMC_EV(PPC7450, DATA_BKPT_MATCHES) \ - __PMC_EV(PPC7450, FALL_THROUGH_BRANCHES_PROCESSED) \ - __PMC_EV(PPC7450, FIRST_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ - __PMC_EV(PPC7450, SECOND_SPECULATION_BUFFER_ACTIVE) \ - __PMC_EV(PPC7450, BPU_STALL_ON_LR_DEPENDENCY) \ - __PMC_EV(PPC7450, BTIC_MISS) \ - __PMC_EV(PPC7450, BRANCH_LINK_STACK_CORRECTLY_RESOLVED) \ - __PMC_EV(PPC7450, FPR_ISSUE_STALLED) \ - __PMC_EV(PPC7450, SWITCHES_BETWEEN_PRIV_USER) \ - __PMC_EV(PPC7450, LSU_COMPLETES_FP_STORE_SINGLE) \ - __PMC_EV(PPC7450, VR_ISSUE_QUEUE_DISPATCHES) \ - __PMC_EV(PPC7450, VR_STALLS) \ + __PMC_EV(PPC7450, L1_DATA_LOAD_ACCESS_MISS) \ + __PMC_EV(PPC7450, L1_DATA_TOUCH_MISS) \ + __PMC_EV(PPC7450, L1_DATA_STORE_MISS) \ + __PMC_EV(PPC7450, L1_DATA_TOUCH_MISS_CYCLES) \ + __PMC_EV(PPC7450, L1_DATA_CYCLES_USED) \ + __PMC_EV(PPC7450, DST_STREAM_1_CACHE_LINE_FETCHES) \ + __PMC_EV(PPC7450, VTQ_STREAM_CANCELED_PREMATURELY) \ + __PMC_EV(PPC7450, VTQ_RESUMES_DUE_TO_CTX_CHANGE) \ + __PMC_EV(PPC7450, VTQ_LINE_FETCH_MISS) \ + __PMC_EV(PPC7450, VTQ_LINE_FETCH) \ + __PMC_EV(PPC7450, TLBIE_SNOOPS) \ + __PMC_EV(PPC7450, L1_INSTR_CACHE_RELOADS) \ + __PMC_EV(PPC7450, L1_DATA_CACHE_RELOADS) \ + __PMC_EV(PPC7450, L1_DATA_CACHE_CASTOUTS_TO_L2) \ + __PMC_EV(PPC7450, STORE_MERGE_GATHER) \ + __PMC_EV(PPC7450, CACHEABLE_STORE_MERGE_TO_32_BYTES) \ + __PMC_EV(PPC7450, DATA_BKPT_MATCHES) \ + __PMC_EV(PPC7450, FALL_THROUGH_BRANCHES_PROCESSED) \ + __PMC_EV(PPC7450, \ + FIRST_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ + __PMC_EV(PPC7450, SECOND_SPECULATION_BUFFER_ACTIVE) \ + __PMC_EV(PPC7450, BPU_STALL_ON_LR_DEPENDENCY) \ + __PMC_EV(PPC7450, BTIC_MISS) \ + __PMC_EV(PPC7450, BRANCH_LINK_STACK_CORRECTLY_RESOLVED) \ + __PMC_EV(PPC7450, FPR_ISSUE_STALLED) \ + __PMC_EV(PPC7450, SWITCHES_BETWEEN_PRIV_USER) \ + __PMC_EV(PPC7450, LSU_COMPLETES_FP_STORE_SINGLE) \ + __PMC_EV(PPC7450, VR_ISSUE_QUEUE_DISPATCHES) \ + __PMC_EV(PPC7450, VR_STALLS) \ __PMC_EV(PPC7450, GPR_RENAME_BUFFER_ENTRIES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, FPR_ISSUE_QUEUE_ENTRIES) \ - __PMC_EV(PPC7450, FPU_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, STWCX_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, LS_LM_INSTR_PIECES) \ - __PMC_EV(PPC7450, ITLB_HW_SEARCH_CYCLES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, DTLB_MISSES) \ - __PMC_EV(PPC7450, CANCELLED_L1_INSTR_CACHE_MISSES) \ - __PMC_EV(PPC7450, L1_DATA_CACHE_OP_HIT) \ - __PMC_EV(PPC7450, L1_DATA_LOAD_MISS_CYCLES) \ - __PMC_EV(PPC7450, L1_DATA_PUSHES) \ - __PMC_EV(PPC7450, L1_DATA_TOTAL_MISS) \ - __PMC_EV(PPC7450, VT2_FETCHES) \ - __PMC_EV(PPC7450, TAKEN_BRANCHES_PROCESSED) \ - __PMC_EV(PPC7450, BRANCH_FLUSHES) \ - __PMC_EV(PPC7450, SECOND_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ - __PMC_EV(PPC7450, THIRD_SPECULATION_BUFFER_ACTIVE) \ - __PMC_EV(PPC7450, BRANCH_UNIT_STALL_ON_CTR_DEPENDENCY) \ - __PMC_EV(PPC7450, FAST_BTIC_HIT) \ - __PMC_EV(PPC7450, BRANCH_LINK_STACK_MISPREDICTED) \ - __PMC_EV(PPC7450, CYCLES_THREE_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, CYCLES_NO_INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, FPR_ISSUE_QUEUE_ENTRIES) \ + __PMC_EV(PPC7450, FPU_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, STWCX_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, LS_LM_INSTR_PIECES) \ + __PMC_EV(PPC7450, ITLB_HW_SEARCH_CYCLES_OVER_THRESHOLD) \ + __PMC_EV(PPC7450, DTLB_MISSES) \ + __PMC_EV(PPC7450, CANCELLED_L1_INSTR_CACHE_MISSES) \ + __PMC_EV(PPC7450, L1_DATA_CACHE_OP_HIT) \ + __PMC_EV(PPC7450, L1_DATA_LOAD_MISS_CYCLES) \ + __PMC_EV(PPC7450, L1_DATA_PUSHES) \ + __PMC_EV(PPC7450, L1_DATA_TOTAL_MISS) \ + __PMC_EV(PPC7450, VT2_FETCHES) \ + __PMC_EV(PPC7450, TAKEN_BRANCHES_PROCESSED) \ + __PMC_EV(PPC7450, BRANCH_FLUSHES) \ + __PMC_EV(PPC7450, \ + SECOND_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ + __PMC_EV(PPC7450, THIRD_SPECULATION_BUFFER_ACTIVE) \ + __PMC_EV(PPC7450, BRANCH_UNIT_STALL_ON_CTR_DEPENDENCY) \ + __PMC_EV(PPC7450, FAST_BTIC_HIT) \ + __PMC_EV(PPC7450, BRANCH_LINK_STACK_MISPREDICTED) \ + __PMC_EV(PPC7450, CYCLES_THREE_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, CYCLES_NO_INSTR_DISPATCHED) \ __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_ENTRIES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_STALLED) \ - __PMC_EV(PPC7450, IU1_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, DSSALL_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, TLBSYNC_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, SYNC_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, SS_SM_INSTR_PIECES) \ - __PMC_EV(PPC7450, DTLB_HW_SEARCH_CYCLES) \ - __PMC_EV(PPC7450, SNOOP_RETRIES) \ - __PMC_EV(PPC7450, SUCCESSFUL_STWCX) \ - __PMC_EV(PPC7450, DST_STREAM_3_CACHE_LINE_FETCHES) \ - __PMC_EV(PPC7450, THIRD_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ - __PMC_EV(PPC7450, MISPREDICTED_BRANCHES) \ - __PMC_EV(PPC7450, FOLDED_BRANCHES) \ - __PMC_EV(PPC7450, FP_STORE_DOUBLE_COMPLETES_IN_LSU) \ - __PMC_EV(PPC7450, L2_CACHE_HITS) \ - __PMC_EV(PPC7450, L3_CACHE_HITS) \ - __PMC_EV(PPC7450, L2_INSTR_CACHE_MISSES) \ - __PMC_EV(PPC7450, L3_INSTR_CACHE_MISSES) \ - __PMC_EV(PPC7450, L2_DATA_CACHE_MISSES) \ - __PMC_EV(PPC7450, L3_DATA_CACHE_MISSES) \ - __PMC_EV(PPC7450, L2_LOAD_HITS) \ - __PMC_EV(PPC7450, L2_STORE_HITS) \ - __PMC_EV(PPC7450, L3_LOAD_HITS) \ - __PMC_EV(PPC7450, L3_STORE_HITS) \ - __PMC_EV(PPC7450, L2_TOUCH_HITS) \ - __PMC_EV(PPC7450, L3_TOUCH_HITS) \ - __PMC_EV(PPC7450, SNOOP_MODIFIED) \ - __PMC_EV(PPC7450, SNOOP_VALID) \ - __PMC_EV(PPC7450, INTERVENTION) \ - __PMC_EV(PPC7450, L2_CACHE_MISSES) \ - __PMC_EV(PPC7450, L3_CACHE_MISSES) \ - __PMC_EV(PPC7450, L2_CACHE_CASTOUTS) \ - __PMC_EV(PPC7450, L3_CACHE_CASTOUTS) \ - __PMC_EV(PPC7450, L2SQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, L3SQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, RAQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, WAQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, L1_EXTERNAL_INTERVENTIONS) \ - __PMC_EV(PPC7450, L2_EXTERNAL_INTERVENTIONS) \ - __PMC_EV(PPC7450, L3_EXTERNAL_INTERVENTIONS) \ - __PMC_EV(PPC7450, EXTERNAL_INTERVENTIONS) \ - __PMC_EV(PPC7450, EXTERNAL_PUSHES) \ - __PMC_EV(PPC7450, EXTERNAL_SNOOP_RETRY) \ - __PMC_EV(PPC7450, DTQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, BUS_RETRY) \ - __PMC_EV(PPC7450, L2_VALID_REQUEST) \ - __PMC_EV(PPC7450, BORDQ_FULL) \ - __PMC_EV(PPC7450, BUS_TAS_FOR_READS) \ - __PMC_EV(PPC7450, BUS_TAS_FOR_WRITES) \ - __PMC_EV(PPC7450, BUS_READS_NOT_RETRIED) \ - __PMC_EV(PPC7450, BUS_WRITES_NOT_RETRIED) \ - __PMC_EV(PPC7450, BUS_READS_WRITES_NOT_RETRIED) \ - __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_L1_RETRY) \ - __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_PREVIOUS_ADJACENT) \ - __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_COLLISION) \ + __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_STALLED) \ + __PMC_EV(PPC7450, IU1_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, DSSALL_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, TLBSYNC_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, SYNC_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, SS_SM_INSTR_PIECES) \ + __PMC_EV(PPC7450, DTLB_HW_SEARCH_CYCLES) \ + __PMC_EV(PPC7450, SNOOP_RETRIES) \ + __PMC_EV(PPC7450, SUCCESSFUL_STWCX) \ + __PMC_EV(PPC7450, DST_STREAM_3_CACHE_LINE_FETCHES) \ + __PMC_EV(PPC7450, \ + THIRD_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ + __PMC_EV(PPC7450, MISPREDICTED_BRANCHES) \ + __PMC_EV(PPC7450, FOLDED_BRANCHES) \ + __PMC_EV(PPC7450, FP_STORE_DOUBLE_COMPLETES_IN_LSU) \ + __PMC_EV(PPC7450, L2_CACHE_HITS) \ + __PMC_EV(PPC7450, L3_CACHE_HITS) \ + __PMC_EV(PPC7450, L2_INSTR_CACHE_MISSES) \ + __PMC_EV(PPC7450, L3_INSTR_CACHE_MISSES) \ + __PMC_EV(PPC7450, L2_DATA_CACHE_MISSES) \ + __PMC_EV(PPC7450, L3_DATA_CACHE_MISSES) \ + __PMC_EV(PPC7450, L2_LOAD_HITS) \ + __PMC_EV(PPC7450, L2_STORE_HITS) \ + __PMC_EV(PPC7450, L3_LOAD_HITS) \ + __PMC_EV(PPC7450, L3_STORE_HITS) \ + __PMC_EV(PPC7450, L2_TOUCH_HITS) \ + __PMC_EV(PPC7450, L3_TOUCH_HITS) \ + __PMC_EV(PPC7450, SNOOP_MODIFIED) \ + __PMC_EV(PPC7450, SNOOP_VALID) \ + __PMC_EV(PPC7450, INTERVENTION) \ + __PMC_EV(PPC7450, L2_CACHE_MISSES) \ + __PMC_EV(PPC7450, L3_CACHE_MISSES) \ + __PMC_EV(PPC7450, L2_CACHE_CASTOUTS) \ + __PMC_EV(PPC7450, L3_CACHE_CASTOUTS) \ + __PMC_EV(PPC7450, L2SQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, L3SQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, RAQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, WAQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, L1_EXTERNAL_INTERVENTIONS) \ + __PMC_EV(PPC7450, L2_EXTERNAL_INTERVENTIONS) \ + __PMC_EV(PPC7450, L3_EXTERNAL_INTERVENTIONS) \ + __PMC_EV(PPC7450, EXTERNAL_INTERVENTIONS) \ + __PMC_EV(PPC7450, EXTERNAL_PUSHES) \ + __PMC_EV(PPC7450, EXTERNAL_SNOOP_RETRY) \ + __PMC_EV(PPC7450, DTQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, BUS_RETRY) \ + __PMC_EV(PPC7450, L2_VALID_REQUEST) \ + __PMC_EV(PPC7450, BORDQ_FULL) \ + __PMC_EV(PPC7450, BUS_TAS_FOR_READS) \ + __PMC_EV(PPC7450, BUS_TAS_FOR_WRITES) \ + __PMC_EV(PPC7450, BUS_READS_NOT_RETRIED) \ + __PMC_EV(PPC7450, BUS_WRITES_NOT_RETRIED) \ + __PMC_EV(PPC7450, BUS_READS_WRITES_NOT_RETRIED) \ + __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_L1_RETRY) \ + __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_PREVIOUS_ADJACENT) \ + __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_COLLISION) \ __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_INTERVENTION_ORDERING) \ - __PMC_EV(PPC7450, SNOOP_REQUESTS) \ - __PMC_EV(PPC7450, PREFETCH_ENGINE_REQUEST) \ - __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_LOAD) \ - __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_STORE) \ + __PMC_EV(PPC7450, SNOOP_REQUESTS) \ + __PMC_EV(PPC7450, PREFETCH_ENGINE_REQUEST) \ + __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_LOAD) \ + __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_STORE) \ __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_INSTR_FETCH) \ - __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_LOAD_STORE_INSTR_FETCH) \ + __PMC_EV(PPC7450, \ + PREFETCH_ENGINE_COLLISION_VS_LOAD_STORE_INSTR_FETCH) \ __PMC_EV(PPC7450, PREFETCH_ENGINE_FULL) #define PMC_EV_PPC7450_FIRST PMC_EV_PPC7450_CYCLE Modified: trunk/sys/sys/pmc.h =================================================================== --- trunk/sys/sys/pmc.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/sys/pmc.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -593,12 +593,12 @@ #include -#define PMC_HASH_SIZE 16 -#define PMC_MTXPOOL_SIZE 32 +#define PMC_HASH_SIZE 1024 +#define PMC_MTXPOOL_SIZE 2048 #define PMC_LOG_BUFFER_SIZE 4 -#define PMC_NLOGBUFFERS 64 -#define PMC_NSAMPLES 512 -#define PMC_CALLCHAIN_DEPTH 8 +#define PMC_NLOGBUFFERS 1024 +#define PMC_NSAMPLES 1024 +#define PMC_CALLCHAIN_DEPTH 16 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "." Modified: trunk/sys/sys/pmckern.h =================================================================== --- trunk/sys/sys/pmckern.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/sys/pmckern.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -87,9 +87,9 @@ * Soft PMC. */ -#define PMC_SOFT_DEFINE(prov, mod, func, name) \ +#define PMC_SOFT_DEFINE_EX(prov, mod, func, name, alloc, release) \ struct pmc_soft pmc_##prov##_##mod##_##func##_##name = \ - { 0, { #prov "_" #mod "_" #func "." #name, 0 } }; \ + { 0, alloc, release, { #prov "_" #mod "_" #func "." #name, 0 } }; \ SYSINIT(pmc_##prov##_##mod##_##func##_##name##_init, SI_SUB_KDTRACE, \ SI_ORDER_SECOND + 1, pmc_soft_ev_register, \ &pmc_##prov##_##mod##_##func##_##name ); \ @@ -97,6 +97,9 @@ SI_SUB_KDTRACE, SI_ORDER_SECOND + 1, pmc_soft_ev_deregister, \ &pmc_##prov##_##mod##_##func##_##name ) +#define PMC_SOFT_DEFINE(prov, mod, func, name) \ + PMC_SOFT_DEFINE_EX(prov, mod, func, name, NULL, NULL) + #define PMC_SOFT_DECLARE(prov, mod, func, name) \ extern struct pmc_soft pmc_##prov##_##mod##_##func##_##name @@ -147,6 +150,8 @@ struct pmc_soft { int ps_running; + void (*ps_alloc)(void); + void (*ps_release)(void); struct pmc_dyn_event_descr ps_ev; }; @@ -201,8 +206,7 @@ /* Check if a process is using HWPMCs.*/ #define PMC_PROC_IS_USING_PMCS(p) \ - (__predict_false(atomic_load_acq_int(&(p)->p_flag) & \ - P_HWPMC)) + (__predict_false(p->p_flag & P_HWPMC)) /* Check if a thread have pending user capture. */ #define PMC_IS_PENDING_CALLCHAIN(p) \ From laffer1 at midnightbsd.org Thu May 26 23:36:07 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:36:07 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7579] stable/0.8/lib/libpmc/Makefile: set warns to 3 so it can build with clang Message-ID: <201605270336.u4R3a7dI046152@stargazer.midnightbsd.org> Revision: 7579 http://svnweb.midnightbsd.org/src/?rev=7579 Author: laffer1 Date: 2016-05-26 23:36:07 -0400 (Thu, 26 May 2016) Log Message: ----------- set warns to 3 so it can build with clang Modified Paths: -------------- stable/0.8/lib/libpmc/Makefile Modified: stable/0.8/lib/libpmc/Makefile =================================================================== --- stable/0.8/lib/libpmc/Makefile 2016-05-27 03:31:33 UTC (rev 7578) +++ stable/0.8/lib/libpmc/Makefile 2016-05-27 03:36:07 UTC (rev 7579) @@ -5,6 +5,8 @@ SRCS= libpmc.c pmclog.c INCS= pmc.h pmclog.h +WARNS= 3 + MAN= pmc.3 MAN+= pmc_allocate.3 MAN+= pmc_attach.3 From laffer1 at midnightbsd.org Thu May 26 23:40:40 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:40:40 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7580] trunk/lib/libpmc: add haswell and ivy chips Message-ID: <201605270340.u4R3eeks046688@stargazer.midnightbsd.org> Revision: 7580 http://svnweb.midnightbsd.org/src/?rev=7580 Author: laffer1 Date: 2016-05-26 23:40:40 -0400 (Thu, 26 May 2016) Log Message: ----------- add haswell and ivy chips Modified Paths: -------------- trunk/lib/libpmc/Makefile trunk/lib/libpmc/libpmc.c trunk/lib/libpmc/libpmcinternal.h trunk/lib/libpmc/pmc.3 trunk/lib/libpmc/pmc.atom.3 trunk/lib/libpmc/pmc.core.3 trunk/lib/libpmc/pmc.core2.3 trunk/lib/libpmc/pmc.corei7.3 trunk/lib/libpmc/pmc.corei7uc.3 trunk/lib/libpmc/pmc.h trunk/lib/libpmc/pmc.iaf.3 trunk/lib/libpmc/pmc.k7.3 trunk/lib/libpmc/pmc.k8.3 trunk/lib/libpmc/pmc.mips.3 trunk/lib/libpmc/pmc.p4.3 trunk/lib/libpmc/pmc.p5.3 trunk/lib/libpmc/pmc.p6.3 trunk/lib/libpmc/pmc.sandybridge.3 trunk/lib/libpmc/pmc.sandybridgeuc.3 trunk/lib/libpmc/pmc.soft.3 trunk/lib/libpmc/pmc.tsc.3 trunk/lib/libpmc/pmc.ucf.3 trunk/lib/libpmc/pmc.westmere.3 trunk/lib/libpmc/pmc.westmereuc.3 trunk/lib/libpmc/pmc_allocate.3 trunk/lib/libpmc/pmc_attach.3 trunk/lib/libpmc/pmc_capabilities.3 trunk/lib/libpmc/pmc_configure_logfile.3 trunk/lib/libpmc/pmc_disable.3 trunk/lib/libpmc/pmc_event_names_of_class.3 trunk/lib/libpmc/pmc_get_driver_stats.3 trunk/lib/libpmc/pmc_get_msr.3 trunk/lib/libpmc/pmc_init.3 trunk/lib/libpmc/pmc_name_of_capability.3 trunk/lib/libpmc/pmc_read.3 trunk/lib/libpmc/pmc_set.3 trunk/lib/libpmc/pmc_start.3 trunk/lib/libpmc/pmclog.3 trunk/lib/libpmc/pmclog.c trunk/lib/libpmc/pmclog.h Added Paths: ----------- trunk/lib/libpmc/pmc.haswell.3 trunk/lib/libpmc/pmc.haswelluc.3 trunk/lib/libpmc/pmc.ivybridge.3 trunk/lib/libpmc/pmc.ivybridgexeon.3 trunk/lib/libpmc/pmc.sandybridgexeon.3 Modified: trunk/lib/libpmc/Makefile =================================================================== --- trunk/lib/libpmc/Makefile 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/Makefile 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,4 +1,5 @@ # $MidnightBSD$ +# $FreeBSD: release/9.2.0/lib/libpmc/Makefile 249655 2013-04-19 19:28:48Z hiren $ LIB= pmc @@ -5,7 +6,7 @@ SRCS= libpmc.c pmclog.c INCS= pmc.h pmclog.h -WARNS= 3 +WARNS=3 MAN= pmc.3 MAN+= pmc_allocate.3 @@ -28,7 +29,11 @@ MAN+= pmc.atom.3 MAN+= pmc.core.3 MAN+= pmc.core2.3 +MAN+= pmc.haswell.3 +MAN+= pmc.haswelluc.3 MAN+= pmc.iaf.3 +MAN+= pmc.ivybridge.3 +MAN+= pmc.ivybridgexeon.3 MAN+= pmc.ucf.3 MAN+= pmc.k7.3 MAN+= pmc.k8.3 @@ -39,6 +44,7 @@ MAN+= pmc.corei7uc.3 MAN+= pmc.sandybridge.3 MAN+= pmc.sandybridgeuc.3 +MAN+= pmc.sandybridgexeon.3 MAN+= pmc.westmere.3 MAN+= pmc.westmereuc.3 MAN+= pmc.tsc.3 Modified: trunk/lib/libpmc/libpmc.c =================================================================== --- trunk/lib/libpmc/libpmc.c 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/libpmc.c 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2008 Joseph Koshy * All rights reserved. @@ -25,7 +26,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/lib/libpmc/libpmc.c 249655 2013-04-19 19:28:48Z hiren $"); #include #include @@ -182,11 +183,31 @@ __PMC_EV_ALIAS_COREI7() }; +static const struct pmc_event_descr haswell_event_table[] = +{ + __PMC_EV_ALIAS_HASWELL() +}; + +static const struct pmc_event_descr ivybridge_event_table[] = +{ + __PMC_EV_ALIAS_IVYBRIDGE() +}; + +static const struct pmc_event_descr ivybridge_xeon_event_table[] = +{ + __PMC_EV_ALIAS_IVYBRIDGE_XEON() +}; + static const struct pmc_event_descr sandybridge_event_table[] = { __PMC_EV_ALIAS_SANDYBRIDGE() }; +static const struct pmc_event_descr sandybridge_xeon_event_table[] = +{ + __PMC_EV_ALIAS_SANDYBRIDGE_XEON() +}; + static const struct pmc_event_descr westmere_event_table[] = { __PMC_EV_ALIAS_WESTMERE() @@ -197,6 +218,11 @@ __PMC_EV_ALIAS_COREI7UC() }; +static const struct pmc_event_descr haswelluc_event_table[] = +{ + __PMC_EV_ALIAS_HASWELLUC() +}; + static const struct pmc_event_descr sandybridgeuc_event_table[] = { __PMC_EV_ALIAS_SANDYBRIDGEUC() @@ -221,7 +247,11 @@ PMC_MDEP_TABLE(core, IAP, PMC_CLASS_SOFT, PMC_CLASS_TSC); PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); +PMC_MDEP_TABLE(haswell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); +PMC_MDEP_TABLE(ivybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); +PMC_MDEP_TABLE(ivybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(sandybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); +PMC_MDEP_TABLE(sandybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC); PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC); @@ -257,10 +287,15 @@ PMC_CLASS_TABLE_DESC(core, IAP, core, iap); PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap); PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap); +PMC_CLASS_TABLE_DESC(haswell, IAP, haswell, iap); +PMC_CLASS_TABLE_DESC(ivybridge, IAP, ivybridge, iap); +PMC_CLASS_TABLE_DESC(ivybridge_xeon, IAP, ivybridge_xeon, iap); PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap); +PMC_CLASS_TABLE_DESC(sandybridge_xeon, IAP, sandybridge_xeon, iap); PMC_CLASS_TABLE_DESC(westmere, IAP, westmere, iap); PMC_CLASS_TABLE_DESC(ucf, UCF, ucf, ucf); PMC_CLASS_TABLE_DESC(corei7uc, UCP, corei7uc, ucp); +PMC_CLASS_TABLE_DESC(haswelluc, UCP, haswelluc, ucp); PMC_CLASS_TABLE_DESC(sandybridgeuc, UCP, sandybridgeuc, ucp); PMC_CLASS_TABLE_DESC(westmereuc, UCP, westmereuc, ucp); #endif @@ -362,7 +397,7 @@ /* Event masks for events */ struct pmc_masks { const char *pm_name; - const uint32_t pm_value; + const uint64_t pm_value; }; #define PMCMASK(N,V) { .pm_name = #N, .pm_value = (V) } #define NULLMASK { .pm_name = NULL } @@ -369,7 +404,7 @@ #if defined(__amd64__) || defined(__i386__) static int -pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint32_t *evmask) +pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint64_t *evmask) { const struct pmc_masks *pm; char *q, *r; @@ -558,8 +593,16 @@ #define atom_aliases_without_iaf core2_aliases_without_iaf #define corei7_aliases core2_aliases #define corei7_aliases_without_iaf core2_aliases_without_iaf +#define haswell_aliases core2_aliases +#define haswell_aliases_without_iaf core2_aliases_without_iaf +#define ivybridge_aliases core2_aliases +#define ivybridge_aliases_without_iaf core2_aliases_without_iaf +#define ivybridge_xeon_aliases core2_aliases +#define ivybridge_xeon_aliases_without_iaf core2_aliases_without_iaf #define sandybridge_aliases core2_aliases #define sandybridge_aliases_without_iaf core2_aliases_without_iaf +#define sandybridge_xeon_aliases core2_aliases +#define sandybridge_xeon_aliases_without_iaf core2_aliases_without_iaf #define westmere_aliases core2_aliases #define westmere_aliases_without_iaf core2_aliases_without_iaf @@ -660,7 +703,7 @@ NULLMASK }; -static struct pmc_masks iap_rsp_mask[] = { +static struct pmc_masks iap_rsp_mask_i7_wm[] = { PMCMASK(DMND_DATA_RD, (1 << 0)), PMCMASK(DMND_RFO, (1 << 1)), PMCMASK(DMND_IFETCH, (1 << 2)), @@ -679,12 +722,68 @@ NULLMASK }; +static struct pmc_masks iap_rsp_mask_sb_sbx_ib[] = { + PMCMASK(REQ_DMND_DATA_RD, (1ULL << 0)), + PMCMASK(REQ_DMND_RFO, (1ULL << 1)), + PMCMASK(REQ_DMND_IFETCH, (1ULL << 2)), + PMCMASK(REQ_WB, (1ULL << 3)), + PMCMASK(REQ_PF_DATA_RD, (1ULL << 4)), + PMCMASK(REQ_PF_RFO, (1ULL << 5)), + PMCMASK(REQ_PF_IFETCH, (1ULL << 6)), + PMCMASK(REQ_PF_LLC_DATA_RD, (1ULL << 7)), + PMCMASK(REQ_PF_LLC_RFO, (1ULL << 8)), + PMCMASK(REQ_PF_LLC_IFETCH, (1ULL << 9)), + PMCMASK(REQ_BUS_LOCKS, (1ULL << 10)), + PMCMASK(REQ_STRM_ST, (1ULL << 11)), + PMCMASK(REQ_OTHER, (1ULL << 15)), + PMCMASK(RES_ANY, (1ULL << 16)), + PMCMASK(RES_SUPPLIER_SUPP, (1ULL << 17)), + PMCMASK(RES_SUPPLIER_LLC_HITM, (1ULL << 18)), + PMCMASK(RES_SUPPLIER_LLC_HITE, (1ULL << 19)), + PMCMASK(RES_SUPPLIER_LLC_HITS, (1ULL << 20)), + PMCMASK(RES_SUPPLIER_LLC_HITF, (1ULL << 21)), + PMCMASK(RES_SUPPLIER_LOCAL, (1ULL << 22)), + PMCMASK(RES_SNOOP_SNP_NONE, (1ULL << 31)), + PMCMASK(RES_SNOOP_SNP_NO_NEEDED,(1ULL << 32)), + PMCMASK(RES_SNOOP_SNP_MISS, (1ULL << 33)), + PMCMASK(RES_SNOOP_HIT_NO_FWD, (1ULL << 34)), + PMCMASK(RES_SNOOP_HIT_FWD, (1ULL << 35)), + PMCMASK(RES_SNOOP_HITM, (1ULL << 36)), + PMCMASK(RES_NON_DRAM, (1ULL << 37)), + NULLMASK +}; + +static struct pmc_masks iap_rsp_mask_haswell[] = { + PMCMASK(REQ_DMND_DATA_RD, (1ULL << 0)), + PMCMASK(REQ_DMND_RFO, (1ULL << 1)), + PMCMASK(REQ_DMND_IFETCH, (1ULL << 2)), + PMCMASK(REQ_PF_DATA_RD, (1ULL << 4)), + PMCMASK(REQ_PF_RFO, (1ULL << 5)), + PMCMASK(REQ_PF_IFETCH, (1ULL << 6)), + PMCMASK(REQ_OTHER, (1ULL << 15)), + PMCMASK(RES_ANY, (1ULL << 16)), + PMCMASK(RES_SUPPLIER_SUPP, (1ULL << 17)), + PMCMASK(RES_SUPPLIER_LLC_HITM, (1ULL << 18)), + PMCMASK(RES_SUPPLIER_LLC_HITE, (1ULL << 19)), + PMCMASK(RES_SUPPLIER_LLC_HITS, (1ULL << 20)), + PMCMASK(RES_SUPPLIER_LLC_HITF, (1ULL << 21)), + PMCMASK(RES_SUPPLIER_LOCAL, (1ULL << 22)), + PMCMASK(RES_SNOOP_SNP_NONE, (1ULL << 31)), + PMCMASK(RES_SNOOP_SNP_NO_NEEDED,(1ULL << 32)), + PMCMASK(RES_SNOOP_SNP_MISS, (1ULL << 33)), + PMCMASK(RES_SNOOP_HIT_NO_FWD, (1ULL << 34)), + PMCMASK(RES_SNOOP_HIT_FWD, (1ULL << 35)), + PMCMASK(RES_SNOOP_HITM, (1ULL << 36)), + PMCMASK(RES_NON_DRAM, (1ULL << 37)), + NULLMASK +}; + static int iap_allocate_pmc(enum pmc_event pe, char *ctrspec, struct pmc_op_pmcallocate *pmc_config) { char *e, *p, *q; - uint32_t cachestate, evmask, rsp; + uint64_t cachestate, evmask, rsp; int count, n; pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE | @@ -750,9 +849,22 @@ } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_COREI7 || cpu_info.pm_cputype == PMC_CPU_INTEL_WESTMERE) { if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { - n = pmc_parse_mask(iap_rsp_mask, p, &rsp); + n = pmc_parse_mask(iap_rsp_mask_i7_wm, p, &rsp); } else return (-1); + } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_SANDYBRIDGE || + cpu_info.pm_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON || + cpu_info.pm_cputype == PMC_CPU_INTEL_IVYBRIDGE || + cpu_info.pm_cputype == PMC_CPU_INTEL_IVYBRIDGE_XEON ) { + if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { + n = pmc_parse_mask(iap_rsp_mask_sb_sbx_ib, p, &rsp); + } else + return (-1); + } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_HASWELL) { + if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { + n = pmc_parse_mask(iap_rsp_mask_haswell, p, &rsp); + } else + return (-1); } else return (-1); @@ -1069,7 +1181,8 @@ { char *e, *p, *q; int n; - uint32_t count, evmask; + uint32_t count; + uint64_t evmask; const struct pmc_masks *pm, *pmask; pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); @@ -1551,7 +1664,8 @@ char *e, *p, *q; int count, has_tag, has_busreqtype, n; - uint32_t evmask, cccractivemask; + uint32_t cccractivemask; + uint64_t evmask; const struct pmc_masks *pm, *pmask; pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); @@ -1979,7 +2093,7 @@ struct pmc_op_pmcallocate *pmc_config) { char *e, *p, *q; - uint32_t evmask; + uint64_t evmask; int count, n; const struct pmc_masks *pm, *pmask; @@ -2203,7 +2317,7 @@ (void)ctrspec; (void)pmc_config; - if (pe < PMC_EV_SOFT_FIRST || pe > PMC_EV_SOFT_LAST) + if ((int)pe < PMC_EV_SOFT_FIRST || (int)pe > PMC_EV_SOFT_LAST) return (-1); pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); @@ -2611,10 +2725,26 @@ ev = corei7_event_table; count = PMC_EVENT_TABLE_SIZE(corei7); break; + case PMC_CPU_INTEL_HASWELL: + ev = haswell_event_table; + count = PMC_EVENT_TABLE_SIZE(haswell); + break; + case PMC_CPU_INTEL_IVYBRIDGE: + ev = ivybridge_event_table; + count = PMC_EVENT_TABLE_SIZE(ivybridge); + break; + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + ev = ivybridge_xeon_event_table; + count = PMC_EVENT_TABLE_SIZE(ivybridge_xeon); + break; case PMC_CPU_INTEL_SANDYBRIDGE: ev = sandybridge_event_table; count = PMC_EVENT_TABLE_SIZE(sandybridge); break; + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + ev = sandybridge_xeon_event_table; + count = PMC_EVENT_TABLE_SIZE(sandybridge_xeon); + break; case PMC_CPU_INTEL_WESTMERE: ev = westmere_event_table; count = PMC_EVENT_TABLE_SIZE(westmere); @@ -2636,6 +2766,10 @@ ev = corei7uc_event_table; count = PMC_EVENT_TABLE_SIZE(corei7uc); break; + case PMC_CPU_INTEL_HASWELL: + ev = haswelluc_event_table; + count = PMC_EVENT_TABLE_SIZE(haswelluc); + break; case PMC_CPU_INTEL_SANDYBRIDGE: ev = sandybridgeuc_event_table; count = PMC_EVENT_TABLE_SIZE(sandybridgeuc); @@ -2899,11 +3033,25 @@ pmc_class_table[n++] = &corei7uc_class_table_descr; PMC_MDEP_INIT_INTEL_V2(corei7); break; + case PMC_CPU_INTEL_HASWELL: + pmc_class_table[n++] = &ucf_class_table_descr; + pmc_class_table[n++] = &haswelluc_class_table_descr; + PMC_MDEP_INIT_INTEL_V2(haswell); + break; + case PMC_CPU_INTEL_IVYBRIDGE: + PMC_MDEP_INIT_INTEL_V2(ivybridge); + break; + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + PMC_MDEP_INIT_INTEL_V2(ivybridge_xeon); + break; case PMC_CPU_INTEL_SANDYBRIDGE: pmc_class_table[n++] = &ucf_class_table_descr; pmc_class_table[n++] = &sandybridgeuc_class_table_descr; PMC_MDEP_INIT_INTEL_V2(sandybridge); break; + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + PMC_MDEP_INIT_INTEL_V2(sandybridge_xeon); + break; case PMC_CPU_INTEL_WESTMERE: pmc_class_table[n++] = &ucf_class_table_descr; pmc_class_table[n++] = &westmereuc_class_table_descr; @@ -3030,10 +3178,26 @@ ev = corei7_event_table; evfence = corei7_event_table + PMC_EVENT_TABLE_SIZE(corei7); break; + case PMC_CPU_INTEL_HASWELL: + ev = haswell_event_table; + evfence = haswell_event_table + PMC_EVENT_TABLE_SIZE(haswell); + break; + case PMC_CPU_INTEL_IVYBRIDGE: + ev = ivybridge_event_table; + evfence = ivybridge_event_table + PMC_EVENT_TABLE_SIZE(ivybridge); + break; + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + ev = ivybridge_xeon_event_table; + evfence = ivybridge_xeon_event_table + PMC_EVENT_TABLE_SIZE(ivybridge_xeon); + break; case PMC_CPU_INTEL_SANDYBRIDGE: ev = sandybridge_event_table; evfence = sandybridge_event_table + PMC_EVENT_TABLE_SIZE(sandybridge); break; + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + ev = sandybridge_xeon_event_table; + evfence = sandybridge_xeon_event_table + PMC_EVENT_TABLE_SIZE(sandybridge_xeon); + break; case PMC_CPU_INTEL_WESTMERE: ev = westmere_event_table; evfence = westmere_event_table + PMC_EVENT_TABLE_SIZE(westmere); @@ -3088,7 +3252,7 @@ } else if (pe == PMC_EV_TSC_TSC) { ev = tsc_event_table; evfence = tsc_event_table + PMC_EVENT_TABLE_SIZE(tsc); - } else if (pe >= PMC_EV_SOFT_FIRST && pe <= PMC_EV_SOFT_LAST) { + } else if ((int)pe >= PMC_EV_SOFT_FIRST && (int)pe <= PMC_EV_SOFT_LAST) { ev = soft_event_table; evfence = soft_event_table + soft_event_info.pm_nevent; } Modified: trunk/lib/libpmc/libpmcinternal.h =================================================================== --- trunk/lib/libpmc/libpmcinternal.h 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/libpmcinternal.h 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/lib/libpmc/libpmcinternal.h 185363 2008-11-27 09:00:47Z jkoshy $ */ #ifndef LIBPMC_INTERNAL_H Modified: trunk/lib/libpmc/pmc.3 =================================================================== --- trunk/lib/libpmc/pmc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd November 24, 2008 .Dt PMC 3 Modified: trunk/lib/libpmc/pmc.atom.3 =================================================================== --- trunk/lib/libpmc/pmc.atom.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.atom.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.atom.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd November 12, 2008 .Dt PMC.ATOM 3 Modified: trunk/lib/libpmc/pmc.core.3 =================================================================== --- trunk/lib/libpmc/pmc.core.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.core.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.core.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd November 12, 2008 .Dt PMC.CORE 3 Modified: trunk/lib/libpmc/pmc.core2.3 =================================================================== --- trunk/lib/libpmc/pmc.core2.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.core2.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.core2.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd June 8, 2009 .Dt PMC.CORE2 3 Modified: trunk/lib/libpmc/pmc.corei7.3 =================================================================== --- trunk/lib/libpmc/pmc.corei7.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.corei7.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.corei7.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd March 24, 2010 .Dt PMC.COREI7 3 Modified: trunk/lib/libpmc/pmc.corei7uc.3 =================================================================== --- trunk/lib/libpmc/pmc.corei7uc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.corei7uc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.corei7uc.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd March 24, 2010 .Dt PMC.COREI7UC 3 Modified: trunk/lib/libpmc/pmc.h =================================================================== --- trunk/lib/libpmc/pmc.h 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.h 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003,2004 Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/lib/libpmc/pmc.h 229392 2012-01-03 16:35:00Z fabient $ */ #ifndef _PMC_H_ Added: trunk/lib/libpmc/pmc.haswell.3 =================================================================== --- trunk/lib/libpmc/pmc.haswell.3 (rev 0) +++ trunk/lib/libpmc/pmc.haswell.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,975 @@ +.\" Copyright (c) 2013 Hiren Panchasara +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.haswell.3 249655 2013-04-19 19:28:48Z hiren $ +.\" +.Dd March 22, 2013 +.Dt PMC.HASWELL 3 +.Os +.Sh NAME +.Nm pmc.haswell +.Nd measurement events for +.Tn Intel +.Tn Haswsell +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Haswell" +CPUs contain PMCs conforming to version 2 of the +.Tn Intel +performance measurement architecture. +These CPUs may contain up to two classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_IAP" +.It Li PMC_CLASS_IAF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_IAP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Haswell PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual" +.%T "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C" +.%N "Order Number: 325462-045US" +.%D January 2013 +.%Q "Intel Corporation" +.Re +.Ss HASWELL FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.iaf 3 . +.Ss HASWELL PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta Yes +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta Yes +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta Yes +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li rsp= Ns Ar value +Configure the Off-core Response bits. +.Bl -tag -width indent +.It Li DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full +and partial cachelines as well as demand data page table entry +cacheline reads. Does not count L2 data read prefetches or +instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. +Does not count L2 code read prefetches. +.It Li REQ_WB +Counts the number of writeback (modified to exclusive) transactions. +.It Li REQ_PF_DATA_RD +Counts the number of data cacheline reads generated by L2 prefetchers. +.It Li REQ_PF_RFO +Counts the number of RFO requests generated by L2 prefetchers. +.It Li REQ_PF_IFETCH +Counts the number of code reads generated by L2 prefetchers. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. +.El +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.It Li os +Configure the PMC to count events happening at processor privilege +level 0. +.It Li usr +Configure the PMC to count events occurring at privilege levels 1, 2 +or 3. +.El +.Pp +If neither of the +.Dq Li os +or +.Dq Li usr +qualifiers are specified, the default is to enable both. +.Ss Event Specifiers (Programmable PMCs) +Haswell programmable PMCs support the following events: +.Bl -tag -width indent +.It Li LD_BLOCKS.STORE_FORWARD +.Pq Event 03H , Umask 02H +Loads blocked by overlapping with store buffer that +cannot be forwarded. +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H , Umask 01H +Speculative cache-line split load uops dispatched to +L1D. +.It Li MISALIGN_MEM_REF.STORES +.Pq Event 05H , Umask 02H +Speculative cache-line split Store-address uops +dispatched to L1D. +.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS +.Pq Event 07H , Umask 01H +False dependencies in MOB due to partial compare +on address. +.It Li DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK +.Pq Event 08H , Umask 01H +Misses in all TLB levels that cause a page walk of any +page size. +.It Li DTLB_LOAD_MISSES.WALK_COMPLETED_4K +.Pq Event 08H , Umask 02H +Completed page walks due to demand load misses +that caused 4K page walks in any TLB levels. +.It Li DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K +.Pq Event 08H , Umask 02H +Completed page walks due to demand load misses +that caused 2M/4M page walks in any TLB levels. +.It Li DTLB_LOAD_MISSES.WALK_COMPLETED +.Pq Event 08H , Umask 0EH +Completed page walks in any TLB of any page size +due to demand load misses +.It Li DTLB_LOAD_MISSES.WALK_DURATION +.Pq Event 08H , Umask 10H +Cycle PMH is busy with a walk. +.It Li DTLB_LOAD_MISSES.STLB_HIT_4K +.Pq Event 08H , Umask 20H +Load misses that missed DTLB but hit STLB (4K). +.It Li DTLB_LOAD_MISSES.STLB_HIT_2M +.Pq Event 08H , Umask 40H +Load misses that missed DTLB but hit STLB (2M). +.It Li DTLB_LOAD_MISSES.STLB_HIT +.Pq Event 08H , Umask 60H +Number of cache load STLB hits. No page walk. +.It Li DTLB_LOAD_MISSES.PDE_CACHE_MISS +.Pq Event 08H , Umask 80H +DTLB demand load misses with low part of linear-to- +physical address translation missed +.It Li INT_MISC.RECOVERY_CYCLES +.Pq Event 0DH , Umask 03H +Cycles waiting to recover after Machine Clears +except JEClear. Set Cmask= 1. +.It Li UOPS_ISSUED.ANY +.Pq Event 0EH , Umask 01H +ncrements each cycle the # of Uops issued by the +RAT to RS. +Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles +of this core. +.It Li UOPS_ISSUED.FLAGS_MERGE +.Pq Event 0EH , Umask 10H +Number of flags-merge uops allocated. Such uops +adds delay. +.It Li UOPS_ISSUED.SLOW_LEA +.Pq Event 0EH , Umask 20H +Number of slow LEA or similar uops allocated. Such +uop has 3 sources (e.g. 2 sources + immediate) +regardless if as a result of LEA instruction or not. +.It Li UOPS_ISSUED.SiNGLE_MUL +.Pq Event 0EH , Umask 40H +Number of multiply packed/scalar single precision +uops allocated. +.It Li L2_RQSTS.DEMAND_DATA_RD_MISS +.Pq Event 24H , Umask 21H +Demand Data Read requests that missed L2, no +rejects. +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H , Umask 41H +Demand Data Read requests that hit L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_DATA_RD +.Pq Event 24H , Umask E1H +Counts any demand and L1 HW prefetch data load +requests to L2. +.It Li L2_RQSTS.RFO_HIT +.Pq Event 24H , Umask 42H +Counts the number of store RFO requests that hit +the L2 cache. +.It Li L2_RQSTS.RFO_MISS +.Pq Event 24H , Umask 22H +Counts the number of store RFO requests that miss +the L2 cache. +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H , Umask E2H +Counts all L2 store RFO requests. +.It Li L2_RQSTS.CODE_RD_HIT +.Pq Event 24H , Umask 44H +Number of instruction fetches that hit the L2 cache. +.It Li L2_RQSTS.CODE_RD_MISS +.Pq Event 24H , Umask 24H +Number of instruction fetches that missed the L2 +cache. +.It Li L2_RQSTS.ALL_DEMAND_MISS +.Pq Event 24H , Umask 27H +Demand requests that miss L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_REFERENCES +.Pq Event 24H , Umask E7H +Demand requests to L2 cache. +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H , Umask E4H +Counts all L2 code requests. +.It Li L2_RQSTS.L2_PF_HIT +.Pq Event 24H , Umask 50H +Counts all L2 HW prefetcher requests that hit L2. +.It Li L2_RQSTS.L2_PF_MISS +.Pq Event 24H , Umask 30H +Counts all L2 HW prefetcher requests that missed +L2. +.It Li L2_RQSTS.ALL_PF +.Pq Event 24H , Umask F8H +Counts all L2 HW prefetcher requests. +.It Li L2_RQSTS.MISS +.Pq Event 24H , Umask 3FH +All requests that missed L2. +.It Li L2_RQSTS.REFERENCES +.Pq Event 24H , Umask FFH +All requests to L2 cache. +.It Li L2_DEMAND_RQSTS.WB_HIT +.Pq Event 27H , Umask 50H +Not rejected writebacks that hit L2 cache +.It Li LONGEST_LAT_CACHE.REFERENCE +.Pq Event 2EH , Umask 4FH +This event counts requests originating from the core +that reference a cache line in the last level cache. +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH , Umask 41H +This event counts each cache miss condition for +references to the last level cache. +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH , Umask 00H +Counts the number of thread cycles while the thread +is not in a halt state. The thread enters the halt state +when it is running the HLT instruction. The core +frequency may change from time to time due to +power or thermal throttling. +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH , Umask 01H +Increments at the frequency of XCLK (100 MHz) +when not halted. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H , Umask 01H +Increments the number of outstanding L1D misses +every cycle. Set Cmaks = 1 and Edge =1 to count +occurrences. +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H , Umask 01H +Miss in all TLB levels causes an page walk of any +page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_COMPLETED_4K +.Pq Event 49H , Umask 02H +Completed page walks due to store misses in one or +more TLB levels of 4K page structure. +.It Li DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M +.Pq Event 49H , Umask 04H +Completed page walks due to store misses in one or +more TLB levels of 2M/4M page structure. +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H , Umask 0EH +Completed page walks due to store miss in any TLB +levels of any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H , Umask 10H +Cycles PMH is busy with this walk. +.It Li DTLB_STORE_MISSES.STLB_HIT_4K +.Pq Event 49H , Umask 20H +Store misses that missed DTLB but hit STLB (4K). +.It Li DTLB_STORE_MISSES.STLB_HIT_2M +.Pq Event 49H , Umask 40H +Store misses that missed DTLB but hit STLB (2M). +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H , Umask 60H +Store operations that miss the first TLB level but hit +the second and do not cause page walks. +.It Li DTLB_STORE_MISSES.PDE_CACHE_MISS +.Pq Event 49H , Umask 80H +DTLB store misses with low part of linear-to-physical +address translation missed. +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH , Umask 01H +Non-SW-prefetch load dispatches that hit fill buffer +allocated for S/W prefetch. +.It Li LOAD_HIT_PRE.HW_PF +.Pq Event 4CH , Umask 02H +Non-SW-prefetch load dispatches that hit fill buffer +allocated for H/W prefetch. +.It Li L1D.REPLACEMENT +.Pq Event 51H , Umask 01H +Counts the number of lines brought into the L1 data +cache. +.It Li MOVE_ELIMINATION.INT_NOT_ELIMINATED +.Pq Event 58H , Umask 04H +Number of integer Move Elimination candidate uops +that were not eliminated. +.It Li MOVE_ELIMINATION.SMID_NOT_ELIMINATED +.Pq Event 58H , Umask 08H +Number of SIMD Move Elimination candidate uops +that were not eliminated. +.It Li MOVE_ELIMINATION.INT_ELIMINATED +.Pq Event 58H , Umask 01H +Unhalted core cycles when the thread is in ring 0. +.It Li MOVE_ELIMINATION.SMID_ELIMINATED +.Pq Event 58H , Umask 02H +Number of SIMD Move Elimination candidate uops +that were eliminated. +.It Li CPL_CYCLES.RING0 +.Pq Event 5CH , Umask 02H +Unhalted core cycles when the thread is in ring 0. +.It Li CPL_CYCLES.RING123 +.Pq Event 5CH , Umask 01H +Unhalted core cycles when the thread is not in ring 0. +.It Li RS_EVENTS.EMPTY_CYCLES +.Pq Event 5EH , Umask 01H +Cycles the RS is empty for the thread. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD +.Pq Event 60H , Umask 01H +Offcore outstanding Demand Data Read transactions +in SQ to uncore. Set Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CORE_RD +.Pq Event 60H , Umask 02H +Offcore outstanding Demand code Read transactions +in SQ to uncore. Set Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO +.Pq Event 60H , Umask 04H +Offcore outstanding RFO store transactions in SQ to +uncore. Set Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD +.Pq Event 60H , Umask 08H +Offcore outstanding cacheable data read +transactions in SQ to uncore. Set Cmask=1 to count +cycles. +.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION +.Pq Event 63H , Umask 01H +Cycles in which the L1D and L2 are locked, due to a +UC lock or split lock. +.It Li LOCK_CYCLES.CACHE_LOCK_DURATION +.Pq Event 63H , Umask 02H +Cycles in which the L1D is locked. +.It Li IDQ.EMPTY +.Pq Event 79H , Umask 02H +Counts cycles the IDQ is empty. +.It Li IDQ.MITE_UOPS +.Pq Event 79H , Umask 04H +Increment each cycle # of uops delivered to IDQ from +MITE path. +Set Cmask = 1 to count cycles. +.It Li IDQ.DSB_UOPS +.Pq Event 79H , Umask 08H +Increment each cycle. # of uops delivered to IDQ +from DSB path. +Set Cmask = 1 to count cycles. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H , Umask 10H +Increment each cycle # of uops delivered to IDQ +when MS_busy by DSB. Set Cmask = 1 to count +cycles. Add Edge=1 to count # of delivery. +.It Li IDQ.MS_MITE_UOPS +.Pq Event 79H , Umask 20H +ncrement each cycle # of uops delivered to IDQ +when MS_busy by MITE. Set Cmask = 1 to count +cycles. +.It Li IDQ.MS_UOPS +.Pq Event 79H , Umask 30H +Increment each cycle # of uops delivered to IDQ from +MS by either DSB or MITE. Set Cmask = 1 to count +cycles. +.It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered at least one uops. Set +Cmask = 1. +.It Li IDQ.ALL_DSB_CYCLES_4_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered four uops. Set Cmask +=4. +.It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered at least one uops. Set +Cmask = 1. +.It Li IDQ.ALL_MITE_CYCLES_4_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered four uops. Set Cmask +=4. +.It Li IDQ.MITE_ALL_UOPS +.Pq Event 79H , Umask 3CH +# of uops delivered to IDQ from any path. +.It Li ICACHE.MISSES +.Pq Event 80H , Umask 02H +Number of Instruction Cache, Streaming Buffer and +Victim Cache Misses. Includes UC accesses. +.It Li ITLB_MISSES.MISS_CAUSES_A_WALK +.Pq Event 85H , Umask 01H +Misses in ITLB that causes a page walk of any page +size. +.It Li ITLB_MISSES.WALK_COMPLETED_4K +.Pq Event 85H , Umask 02H +Completed page walks due to misses in ITLB 4K page +entries. +.It Li TLB_MISSES.WALK_COMPLETED_2M_4M +.Pq Event 85H , Umask 04H +Completed page walks due to misses in ITLB 2M/4M +page entries. +.It Li ITLB_MISSES.WALK_COMPLETED +.Pq Event 85H , Umask 0EH +Completed page walks in ITLB of any page size. +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H , Umask 10H +Cycle PMH is busy with a walk. +.It Li ITLB_MISSES.STLB_HIT_4K +.Pq Event 85H , Umask 20H +ITLB misses that hit STLB (4K). +.It Li ITLB_MISSES.STLB_HIT_2M +.Pq Event 85H , Umask 40H +ITLB misses that hit STLB (2K). +.It Li ITLB_MISSES.STLB_HIT +.Pq Event 85H , Umask 60H +TLB misses that hit STLB. No page walk. +.It Li ILD_STALL.LCP +.Pq Event 87H , Umask 01H +Stalls caused by changing prefix length of the +instruction. +.It Li ILD_STALL.IQ_FULL +.Pq Event 87H , Umask 04H +Stall cycles due to IQ is full. +.It Li BR_INST_EXEC.COND +.Pq Event 88H , Umask 01H +Qualify conditional near branch instructions +executed, but not necessarily retired. +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H , Umask 02H +Qualify all unconditional near branch instructions +excluding calls and indirect branches. +.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 88H , Umask 04H +Qualify executed indirect near branch instructions +that are not calls nor returns. +.It Li BR_INST_EXEC.RETURN_NEAR +.Pq Event 88H , Umask 08H +Qualify indirect near branches that have a return +mnemonic. +.It Li BR_INST_EXEC.DIRECT_NEAR_CALL +.Pq Event 88H , Umask 10H +Qualify unconditional near call branch instructions, +excluding non call branch, executed. +.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL +.Pq Event 88H , Umask 20H +Qualify indirect near calls, including both register and +memory indirect, executed. +.It Li BR_INST_EXEC.NONTAKEN +.Pq Event 88H , Umask 40H +Qualify non-taken near branches executed. +.It Li BR_INST_EXEC.TAKEN +.Pq Event 88H , Umask 80H +Qualify taken near branches executed. Must combine +with 01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_INST_EXEC.ALL_BRANCHES +.Pq Event 88H , Umask FFH +Counts all near executed branches (not necessarily +retired). +.It Li BR_MISP_EXEC.COND +.Pq Event 89H , Umask 01H +Qualify conditional near branch instructions +mispredicted. +.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 89H , Umask 04H +Qualify mispredicted indirect near branch +instructions that are not calls nor returns. +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H , Umask 08H +Qualify mispredicted indirect near branches that +have a return mnemonic. +.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL +.Pq Event 89H , Umask 10H +Qualify mispredicted unconditional near call branch +instructions, excluding non call branch, executed. +.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL +.Pq Event 89H , Umask 20H +Qualify mispredicted indirect near calls, including +both register and memory indirect, executed. +.It Li BR_MISP_EXEC.NONTAKEN +.Pq Event 89H , Umask 40H +Qualify mispredicted non-taken near branches +executed. +.It Li BR_MISP_EXEC.TAKEN +.Pq Event 89H , Umask 80H +Qualify mispredicted taken near branches executed. +Must combine with 01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_MISP_EXEC.ALL_BRANCHES +.Pq Event 89H , Umask FFH +Counts all near executed branches (not necessarily +retired). +.It Li IDQ_UOPS_NOT_DELIVERED.CORE +.Pq Event 9CH , Umask 01H +Count number of non-delivered uops to RAT per +thread. +.It Li UOPS_EXECUTED_PORT.PORT_0 +.Pq Event A1H , Umask 01H +Cycles which a Uop is dispatched on port 0 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_1 +.Pq Event A1H , Umask 02H +Cycles which a Uop is dispatched on port 1 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_2 +.Pq Event A1H , Umask 04H +Cycles which a Uop is dispatched on port 2 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_3 +.Pq Event A1H , Umask 08H +Cycles which a Uop is dispatched on port 3 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_4 +.Pq Event A1H , Umask 10H +Cycles which a Uop is dispatched on port 4 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_5 +.Pq Event A1H , Umask 20H +Cycles which a Uop is dispatched on port 5 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_6 +.Pq Event A1H , Umask 40H +Cycles which a Uop is dispatched on port 6 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_7 +.Pq Event A1H , Umask 80H +Cycles which a Uop is dispatched on port 7 in this +thread. +.It Li RESOURCE_STALLS.ANY +.Pq Event A2H , Umask 01H +Cycles Allocation is stalled due to Resource Related +reason. +.It Li RESOURCE_STALLS.RS +.Pq Event A2H , Umask 04H +Cycles stalled due to no eligible RS entry available. +.It Li RESOURCE_STALLS.SB +.Pq Event A2H , Umask 08H +Cycles stalled due to no store buffers available (not +including draining form sync). +.It Li RESOURCE_STALLS.ROB +.Pq Event A2H , Umask 10H +Cycles stalled due to re-order buffer full. +.It Li CYCLE_ACTIVITY.CYCLES_L2_PENDING +.Pq Event A3H , Umask 01H +Cycles with pending L2 miss loads. Set Cmask=2 to +count cycle. +.It Li CYCLE_ACTIVITY.CYCLES_LDM_PENDING +.Pq Event A3H , Umask 02H +Cycles with pending memory loads. Set Cmask=2 to +count cycle. +.It Li CYCLE_ACTIVITY.STALLS_L2_PENDING +.Pq Event A3H , Umask 05H +Number of loads missed L2. +.It Li CYCLE_ACTIVITY.CYCLES_L1D_PENDING +.Pq Event A3H , Umask 08H +Cycles with pending L1 cache miss loads. Set +Cmask=8 to count cycle. +.It Li ITLB.ITLB_FLUSH +.Pq Event AEH , Umask 01H +Counts the number of ITLB flushes, includes +4k/2M/4M pages. +.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD +.Pq Event B0H , Umask 01H +Demand data read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_CODE_RD +.Pq Event B0H , Umask 02H +Demand code read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H , Umask 04H +Demand RFO read requests sent to uncore, including +regular RFOs, locks, ItoM. +.It Li OFFCORE_REQUESTS.ALL_DATA_RD +.Pq Event B0H , Umask 08H +Data read requests sent to uncore (demand and +prefetch). +.It Li UOPS_EXECUTED.CORE +.Pq Event B1H , Umask 02H +Counts total number of uops to be executed per-core +each cycle. +.It Li OFF_CORE_RESPONSE_0 +.Pq Event B7H , Umask 01H +Requires MSR 01A6H +.It Li OFF_CORE_RESPONSE_1 +.Pq Event BBH , Umask 01H +Requires MSR 01A7H +.It Li PAGE_WALKER_LOADS.DTLB_L1 +.Pq Event BCH , Umask 11H +Number of DTLB page walker loads that hit in the +L1+FB. +.It Li PAGE_WALKER_LOADS.ITLB_L1 +.Pq Event BCH , Umask 21H +Number of ITLB page walker loads that hit in the +L1+FB. +.It Li PAGE_WALKER_LOADS.DTLB_L2 +.Pq Event BCH , Umask 12H +Number of DTLB page walker loads that hit in the L2. +.It Li PAGE_WALKER_LOADS.ITLB_L2 +.Pq Event BCH , Umask 22H +Number of ITLB page walker loads that hit in the L2. +.It Li PAGE_WALKER_LOADS.DTLB_L3 +.Pq Event BCH , Umask 14H +Number of DTLB page walker loads that hit in the L3. +.It Li PAGE_WALKER_LOADS.ITLB_L3 +.Pq Event BCH , Umask 24H +Number of ITLB page walker loads that hit in the L3. +.It Li PAGE_WALKER_LOADS.DTLB_MEMORY +.Pq Event BCH , Umask 18H +Number of DTLB page walker loads from memory. +.It Li PAGE_WALKER_LOADS.ITLB_MEMORY +.Pq Event BCH , Umask 28H +Number of ITLB page walker loads from memory. +.It Li TLB_FLUSH.DTLB_THREAD +.Pq Event BDH , Umask 01H +DTLB flush attempts of the thread-specific entries. +.It Li TLB_FLUSH.STLB_ANY +.Pq Event BDH , Umask 20H +Count number of STLB flush attempts. +.It Li INST_RETIRED.ANY_P +.Pq Event C0H , Umask 00H +Number of instructions at retirement. +.It Li INST_RETIRED.ALL +.Pq Event C0H , Umask 01H +Precise instruction retired event with HW to reduce +effect of PEBS shadow in IP distribution. +.It Li OTHER_ASSISTS.AVX_TO_SSE +.Pq Event C1H , Umask 08H +Number of transitions from AVX-256 to legacy SSE +when penalty applicable. +.It Li OTHER_ASSISTS.SSE_TO_AVX +.Pq Event C1H , Umask 10H +Number of transitions from SSE to AVX-256 when +penalty applicable. +.It Li OTHER_ASSISTS.ANY_WB_ASSIST +.Pq Event C1H , Umask 40H +Number of microcode assists invoked by HW upon +uop writeback. +.It Li UOPS_RETIRED.ALL +.Pq Event C2H , Umask 01H +Counts the number of micro-ops retired, Use +cmask=1 and invert to count active cycles or stalled +cycles. +.It Li UOPS_RETIRED.RETIRE_SLOTS +.Pq Event C2H , Umask 02H +Counts the number of retirement slots used each +cycle. +.It Li MACHINE_CLEARS.MEMORY_ORDERING +.Pq Event C3H , Umask 02H +Counts the number of machine clears due to memory +order conflicts. +.It Li MACHINE_CLEARS.SMC +.Pq Event C3H , Umask 04H +Number of self-modifying-code machine clears +detected. +.It Li MACHINE_CLEARS.MASKMOV +.Pq Event C3H , Umask 20H +Counts the number of executed AVX masked load +operations that refer to an illegal address range with +the mask bits set to 0. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 00H +Branch instructions at retirement. +.It Li BR_INST_RETIRED.CONDITIONAL +.Pq Event C4H , Umask 01H +Counts the number of conditional branch instructions Supports PEBS +retired. +.It Li BR_INST_RETIRED.NEAR_CALL +.Pq Event C4H , Umask 02H +Direct and indirect near call instructions retired. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 04H +Counts the number of branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_RETURN +.Pq Event C4H , Umask 08H +Counts the number of near return instructions +retired. +.It Li BR_INST_RETIRED.NOT_TAKEN +.Pq Event C4H , Umask 10H +Counts the number of not taken branch instructions +retired. + It Li BR_INST_RETIRED.NEAR_TAKEN +.Pq Event C4H , Umask 20H +Number of near taken branches retired. +.It Li BR_INST_RETIRED.FAR_BRANCH +.Pq Event C4H , Umask 40H +Number of far branches retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 00H +Mispredicted branch instructions at retirement +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 01H +Mispredicted conditional branch instructions retired. +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 04H +Mispredicted macro branch instructions retired. +.It Li FP_ASSIST.X87_OUTPUT +.Pq Event CAH , Umask 02H +Number of X87 FP assists due to Output values. +.It Li FP_ASSIST.X87_INPUT +.Pq Event CAH , Umask 04H +Number of X87 FP assists due to input values. +.It Li FP_ASSIST.SIMD_OUTPUT +.Pq Event CAH , Umask 08H +Number of SIMD FP assists due to Output values. +.It Li FP_ASSIST.SIMD_INPUT +.Pq Event CAH , Umask 10H +Number of SIMD FP assists due to input values. +.It Li FP_ASSIST.ANY +.Pq Event CAH , Umask 1EH +Cycles with any input/output SSE* or FP assists. +.It Li ROB_MISC_EVENTS.LBR_INSERTS +.Pq Event CCH , Umask 20H +Count cases of saving new LBR records by hardware. +.It Li MEM_TRANS_RETIRED.LOAD_LATENCY +.Pq Event CDH , Umask 01H +Randomly sampled loads whose latency is above a +user defined threshold. A small fraction of the overall +loads are sampled due to randomization. +.It Li MEM_UOP_RETIRED.LOADS +.Pq Event D0H , Umask 01H +Qualify retired memory uops that are loads. Combine Supports PEBS and +with umask 10H, 20H, 40H, 80H. +.It Li MEM_UOP_RETIRED.STORES +.Pq Event D0H , Umask 02H +Qualify retired memory uops that are stores. +Combine with umask 10H, 20H, 40H, 80H. +.It Li MEM_UOP_RETIRED.STLB_MISS +.Pq Event D0H , Umask 10H +Qualify retired memory uops with STLB miss. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.LOCK +.Pq Event D0H , Umask 20H +Qualify retired memory uops with lock. Must combine Supports PEBS and +with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.SPLIT +.Pq Event D0H , Umask 40H +Qualify retired memory uops with line split. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.ALL +.Pq Event D0H , Umask 80H +Qualify any retired memory uops. Must combine with Supports PEBS and +umask 01H, 02H, to produce counts. +.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT +.Pq Event D1H , Umask 01H +Retired load uops with L1 cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT +.Pq Event D1H , Umask 02H +Retired load uops with L2 cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT +.Pq Event D1H , Umask 04H +Retired load uops with LLC cache hits as data +sources. +.It Li MEM_LOAD_UOPS_RETIRED.L2_MISS +.Pq Event D1H , Umask 10H +Retired load uops missed L2. Unknown data source +excluded. +.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB +.Pq Event D1H , Umask 40H +Retired load uops which data sources were load uops +missed L1 but hit FB due to preceding miss to the +same cache line with data not ready. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS +.Pq Event D2H , Umask 01H +Retired load uops which data sources were LLC hit +and cross-core snoop missed in on-pkg core cache. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT +.Pq Event D2H , Umask 02H +Retired load uops which data sources were LLC and +cross-core snoop hits in on-pkg core cache. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM +.Pq Event D2H , Umask 04H +Retired load uops which data sources were HitM +responses from shared LLC. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE +.Pq Event D2H , Umask 08H +Retired load uops which data sources were hits in +LLC without snoops required. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM +.Pq Event D3H , Umask 01H +Retired load uops which data sources missed LLC but +serviced from local dram. +.It Li BACLEARS.ANY +.Pq Event E6H , Umask 1FH +Number of front end re-steers due to BPU +misprediction. +.It Li L2_TRANS.DEMAND_DATA_RD +.Pq Event F0H , Umask 01H +Demand Data Read requests that access L2 cache. +.It Li L2_TRANS.RFO +.Pq Event F0H , Umask 02H +RFO requests that access L2 cache. +.It Li L2_TRANS.CODE_RD +.Pq Event F0H , Umask 04H +L2 cache accesses when fetching instructions. +.It Li L2_TRANS.ALL_PF +.Pq Event F0H , Umask 08H +Any MLC or LLC HW prefetch accessing L2, including +rejects. +.It Li L2_TRANS.L1D_WB +.Pq Event F0H , Umask 10H +L1D writebacks that access L2 cache. +.It Li L2_TRANS.L2_FILL +.Pq Event F0H , Umask 20H +L2 fill requests that access L2 cache. +.It Li L2_TRANS.L2_WB +.Pq Event F0H , Umask 40H +L2 writebacks that access L2 cache. +.It Li L2_TRANS.ALL_REQUESTS +.Pq Event F0H , Umask 80H +Transactions accessing L2 pipe. +.It Li L2_LINES_IN.I +.Pq Event F1H , Umask 01H +L2 cache lines in I state filling L2. +.It Li L2_LINES_IN.S +.Pq Event F1H , Umask 02H +L2 cache lines in S state filling L2. +.It Li L2_LINES_IN.E +.Pq Event F1H , Umask 04H +L2 cache lines in E state filling L2. +.It Li L2_LINES_IN.ALL +.Pq Event F1H , Umask 07H +L2 cache lines filling L2. +.It Li L2_LINES_OUT.DEMAND_CLEAN +.Pq Event F2H , Umask 05H +Clean L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.DEMAND_DIRTY +.Pq Event F2H , Umask 06H +Dirty L2 cache lines evicted by demand. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.iaf 3 , +.Xr pmc.ucf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.haswelluc 3 , +.Xr pmc.ivybridge 3 , +.Xr pmc.ivybridgexeon 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Haswell +microarchitecture was written by +.An "Hiren Panchasara" +.Aq hiren.panchasara at gmail.com . Property changes on: trunk/lib/libpmc/pmc.haswell.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/lib/libpmc/pmc.haswelluc.3 =================================================================== --- trunk/lib/libpmc/pmc.haswelluc.3 (rev 0) +++ trunk/lib/libpmc/pmc.haswelluc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,237 @@ +.\" Copyright (c) 2013 Hiren Panchasara +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.haswelluc.3 249655 2013-04-19 19:28:48Z hiren $ +.\" +.Dd March 22, 2013 +.Dt PMC.HASWELLUC 3 +.Os +.Sh NAME +.Nm pmc.haswelluc +.Nd uncore measurement events for +.Tn Intel +.Tn Haswell +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Haswell" +CPUs contain PMCs conforming to version 3 of the +.Tn Intel +performance measurement architecture. +These CPUs contain two classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_UCP" +.It Li PMC_CLASS_UCF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_UCP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Haswell PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developers Manual" +.%T "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C" +.%N "Order Number: 325462-045US" +.%D January 2013 +.%Q "Intel Corporation" +.Re +.Ss HASWELL UNCORE FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.ucf 3 . +Not all CPUs in this family implement fixed-function counters. +.Ss HASWELL UNCORE PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta \&No +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta \&No +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta \&No +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.El +.Ss Event Specifiers (Programmable PMCs) +Haswell programmable PMCs support the following events: +.Bl -tag -width indent +.It Li UNC_CBO_XSNP_RESPONSE.MISS +.Pq Event 22H , Umask 01H +A snoop misses in some processor core. +.It Li UNC_CBO_XSNP_RESPONSE.INVAL +.Pq Event 22H , Umask 02H +A snoop invalidates a non-modified line in some +processor core. +.It Li UNC_CBO_XSNP_RESPONSE.HIT +.Pq Event 22H , Umask 04H +A snoop hits a non-modified line in some processor +core. +.It Li UNC_CBO_XSNP_RESPONSE.HITM +.Pq Event 22H , Umask 08H +A snoop hits a modified line in some processor core. +.It Li UNC_CBO_XSNP_RESPONSE.INVAL_M +.Pq Event 22H , Umask 10H +A snoop invalidates a modified line in some processor +core. +.It Li UNC_CBO_XSNP_RESPONSE.EXTERNAL_FILTER +.Pq Event 22H , Umask 20H +Filter on cross-core snoops initiated by this Cbox due +to external snoop request. +.It Li UNC_CBO_XSNP_RESPONSE.XCORE_FILTER +.Pq Event 22H , Umask 40H +Filter on cross-core snoops initiated by this Cbox due +to processor core memory request. +.It Li UNC_CBO_XSNP_RESPONSE.EVICTION_FILTER +.Pq Event 22H , Umask 80H +Filter on cross-core snoops initiated by this Cbox due +to LLC eviction. +.It Li UNC_CBO_CACHE_LOOKUP.M +.Pq Event 34H , Umask 01H +LLC lookup request that access cache and found line in +M-state. +.It Li UNC_CBO_CACHE_LOOKUP.ES +.Pq Event 34H , Umask 06H +LLC lookup request that access cache and found line in +E or S state. +.It Li UNC_CBO_CACHE_LOOKUP.I +.Pq Event 34H , Umask 08H +LLC lookup request that access cache and found line in +I-state. +.It Li UNC_CBO_CACHE_LOOKUP.READ_FILTER +.Pq Event 34H , Umask 10H +Filter on processor core initiated cacheable read +requests. Must combine with at least one of 01H, 02H, +04H, 08H. +.It Li UNC_CBO_CACHE_LOOKUP.WRITE_FILTER +.Pq Event 34H , Umask 20H +Filter on processor core initiated cacheable write +requests. Must combine with at least one of 01H, 02H, +04H, 08H. +.It Li UNC_CBO_CACHE_LOOKUP.EXTSNP_FILTER +.Pq Event 34H , Umask 40H +Filter on external snoop requests. Must combine with +at least one of 01H, 02H, 04H, 08H. +.It Li UNC_CBO_CACHE_LOOKUP.ANY_REQUEST_FILTER +.Pq Event 34H , Umask 80H +Filter on any IRQ or IPQ initiated requests including +uncacheable, non-coherent requests. Must combine +with at least one of 01H, 02H, 04H, 08H. +.It Li UNC_ARB_TRK_OCCUPANCY.ALL +.Pq Event 80H , Umask 01H +Counts cycles weighted by the number of requests +waiting for data returning from the memory controller. +Accounts for coherent and non-coherent requests +initiated by IA cores, processor graphic units, or LLC. +.It Li UNC_ARB_TRK_REQUEST.ALL +.Pq Event 81H , Umask 01H +Counts the number of coherent and in-coherent +requests initiated by IA cores, processor graphic units, +or LLC. +.It Li UNC_ARB_TRK_REQUEST.WRITES +.Pq Event 81H , Umask 20H +Counts the number of allocated write entries, include +full, partial, and LLC evictions. +.It Li UNC_ARB_TRK_REQUEST.EVICTIONS +.Pq Event 81H , Umask 80H +Counts the number of LLC evictions allocated. +.It Li UNC_ARB_COH , Umask TRK_OCCUPANCY.ALL +.Pq Event 83H , Umask 01H +Cycles weighted by number of requests pending in +Coherency Tracker. +.It Li UNC_ARB_COH , Umask TRK_REQUEST.ALL +.Pq Event 84H , Umask 01H +Number of requests allocated in Coherency Tracker. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.haswell 3 , +.Xr pmc.iaf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc.ucf 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Haswell +microarchitecture was added by +.An "Hiren Panchasara" +.Aq hiren.panchasara at gmail.com . Property changes on: trunk/lib/libpmc/pmc.haswelluc.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Modified: trunk/lib/libpmc/pmc.iaf.3 =================================================================== --- trunk/lib/libpmc/pmc.iaf.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.iaf.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.iaf.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd November 14, 2008 .Dt PMC.IAF 3 Added: trunk/lib/libpmc/pmc.ivybridge.3 =================================================================== --- trunk/lib/libpmc/pmc.ivybridge.3 (rev 0) +++ trunk/lib/libpmc/pmc.ivybridge.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,882 @@ +.\" Copyright (c) 2012 Fabien Thomas. All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.ivybridge.3 249492 2013-04-15 03:09:59Z hiren $ +.\" +.Dd October 19, 2012 +.Dt PMC.IVYBRIDGE 3 +.Os +.Sh NAME +.Nm pmc.ivybridge +.Nd measurement events for +.Tn Intel +.Tn Ivy Bridge +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Ivy Bridge" +CPUs contain PMCs conforming to version 2 of the +.Tn Intel +performance measurement architecture. +These CPUs may contain up to three classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_IAP" +.It Li PMC_CLASS_IAF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_IAP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Ivy Bridge PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual" +Intel(R) 64 and IA-32 Architectures Software Developers Manual" +.%T "Volume 3B: System Programming Guide, Part 2" +.%N "Order Number: 253669-043US" +.%D May 2012 +.%Q "Intel Corporation" +.Re +.Ss IVYBRIDGE FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.iaf 3 . +.Ss IVYBRIDGE PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta Yes +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta Yes +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta Yes +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li rsp= Ns Ar value +Configure the Off-core Response bits. +.Bl -tag -width indent +.It Li REQ_DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full and partial +cachelines as well as demand data page table entry cacheline reads. Does not +count L2 data read prefetches or instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. +Does not count L2 code read prefetches. +.It Li REQ_WB +Counts the number of writeback (modified to exclusive) transactions. +.It Li REQ_PF_DATA_RD +Counts the number of data cacheline reads generated by L2 prefetchers. +.It Li REQ_PF_RFO +Counts the number of RFO requests generated by L2 prefetchers. +.It Li REQ_PF_IFETCH +Counts the number of code reads generated by L2 prefetchers. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. +.El +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.It Li os +Configure the PMC to count events happening at processor privilege +level 0. +.It Li usr +Configure the PMC to count events occurring at privilege levels 1, 2 +or 3. +.El +.Pp +If neither of the +.Dq Li os +or +.Dq Li usr +qualifiers are specified, the default is to enable both. +.Ss Event Specifiers (Programmable PMCs) +Ivy Bridge programmable PMCs support the following events: +.Bl -tag -width indent +.It Li LD_BLOCKS.STORE_FORWARD +.Pq Event 03H , Umask 02H +loads blocked by overlapping with store buffer that cannot be forwarded . +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H , Umask 01H +Speculative cache-line split load uops dispatched to L1D. +.It Li MISALIGN_MEM_REF.STORES +.Pq Event 05H , Umask 02H +Speculative cache-line split Store- address uops dispatched to L1D. +.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS +.Pq Event 07H , Umask 01H +False dependencies in MOB due to partial compare on address. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK +.Pq Event 08H , Umask 81H +Misses in all TLB levels that cause a page walk of any page size from demand loads. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED +.Pq Event 08H , Umask 82H +Misses in all TLB levels that caused page walk completed of any size by demand loads. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION +.Pq Event 08H , Umask 84H +Cycle PMH is busy with a walk due to demand loads. +.It Li UOPS_ISSUED.ANY +.Pq Event 0EH , Umask 01H +Increments each cycle the # of Uops issued by the RAT to RS. +Set Cmask = 1, Inv = 1to count stalled cycles. +Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles of this core. +.It Li UOPS_ISSUED.FLAGS_MERGE +.Pq Event 0EH , Umask 10H +Number of flags-merge uops allocated. Such uops adds delay. +.It Li UOPS_ISSUED.SLOW_LEA +.Pq Event 0EH , Umask 20H +Number of slow LEA or similar uops allocated. Such uop has 3 sources (e.g. 2 +sources + immediate) regardless if as a result of LEA instruction or not. +.It Li UOPS_ISSUED.SINGLE_MUL +.Pq Event 0EH , Umask 40H +Number of multiply packed/scalar single precision uops allocated. +.It Li ARITH.FPU_DIV_ACTIVE +.Pq Event 14H , Umask 01H +Cycles that the divider is active, includes INT and FP. Set 'edge =1, +cmask=1' to count the number of divides. +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H , Umask 01H +Demand Data Read requests that hit L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_DATA_RD +.Pq Event 24H , Umask 03H +Counts any demand and L1 HW prefetch data load requests to L2. +.It Li L2_RQSTS.RFO_HITS +.Pq Event 24H , Umask 04H +Counts the number of store RFO requests that hit the L2 cache. +.It Li L2_RQSTS.RFO_MISS +.Pq Event 24H , Umask 08H +Counts the number of store RFO requests that miss the L2 cache. +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H , Umask 0CH +Counts all L2 store RFO requests. +.It Li L2_RQSTS.CODE_RD_HIT +.Pq Event 24H , Umask 10H +Number of instruction fetches that hit the L2 cache. +.It Li L2_RQSTS.CODE_RD_MISS +.Pq Event 24H , Umask 20H +Number of instruction fetches that missed the L2 cache. +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H , Umask 30H +Counts all L2 code requests. +.It Li L2_RQSTS.PF_HIT +.Pq Event 24H , Umask 40H +Counts all L2 HW prefetcher requests that hit L2. +.It Li L2_RQSTS.PF_MISS +.Pq Event 24H , Umask 80H +Counts all L2 HW prefetcher requests that missed L2. +.It Li L2_RQSTS.ALL_PF +.Pq Event 24H , Umask C0H +Counts all L2 HW prefetcher requests. +.It Li L2_STORE_LOCK_RQSTS.MISS +.Pq Event 27H , Umask 01H +RFOs that miss cache lines. +.It Li L2_STORE_LOCK_RQSTS.HIT_M +.Pq Event 27H , Umask 08H +RFOs that hit cache lines in M state. +.It Li L2_STORE_LOCK_RQSTS.ALL +.Pq Event 27H , Umask 0FH +RFOs that access cache lines in any state. +.It Li L2_L1D_WB_RQSTS.MISS +.Pq Event 28H , Umask 01H +Not rejected writebacks that missed LLC. +.It Li L2_L1D_WB_RQSTS.HIT_E +.Pq Event 28H , Umask 04H +Not rejected writebacks from L1D to L2 cache lines in E state. +.It Li L2_L1D_WB_RQSTS.HIT_M +.Pq Event 28H , Umask 08H +Not rejected writebacks from L1D to L2 cache lines in M state. +.It Li L2_L1D_WB_RQSTS.ALL +.Pq Event 28H , Umask 0FH +Not rejected writebacks from L1D to L2 cache lines in any state. +.It Li LONGEST_LAT_CACHE.REFERENCE +.Pq Event 2EH , Umask 4FH +This event counts requests originating from the core that reference a cache +line in the last level cache. +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH , Umask 41H +This event counts each cache miss condition for references to the last level +cache. +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH , Umask 00H +Counts the number of thread cycles while the thread is not in a halt state. +The thread enters the halt state when it is running the HLT instruction. The +core frequency may change from time to time due to power or thermal +throttling. +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH , Umask 01H +Increments at the frequency of XCLK (100 MHz) when not halted. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H , Umask 01H +Increments the number of outstanding L1D misses every cycle. Set Cmaks = 1 +and Edge =1 to count occurrences. +Counter 2 only. +Set Cmask = 1 to count cycles. +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H , Umask 01H +Miss in all TLB levels causes an page walk of any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H , Umask 02H +Miss in all TLB levels causes a page walk that completes of any page size +(4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H , Umask 04H +Cycles PMH is busy with this walk. +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H , Umask 10H +Store operations that miss the first TLB level but hit the second and do not +cause page walks. +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH , Umask 01H +Non-SW-prefetch load dispatches that hit fill buffer allocated for S/W prefetch. +.It Li LOAD_HIT_PRE.HW_PF +.Pq Event 4CH , Umask 02H +Non-SW-prefetch load dispatches that hit fill buffer allocated for H/W prefetch. +.It Li L1D.REPLACEMENT +.Pq Event 51H , Umask 01H +Counts the number of lines brought into the L1 data cache. +.It Li MOVE_ELIMINATION.INT_NOT_ELIMINATED +.Pq Event 58H , Umask 01H +Number of integer Move Elimination candidate uops that were not eliminated. +.It Li MOVE_ELIMINATION.SIMD_NOT_ELIMINATED +.Pq Event 58H , Umask 02H +Number of SIMD Move Elimination candidate uops that were not eliminated. +.It Li MOVE_ELIMINATION.INT_ELIMINATED +.Pq Event 58H , Umask 04H +Number of integer Move Elimination candidate uops that were eliminated. +.It Li MOVE_ELIMINATION.SIMD_ELIMINATED +.Pq Event 58H , Umask 08H +Number of SIMD Move Elimination candidate uops that were eliminated. +.It Li CPL_CYCLES.RING0 +.Pq Event 5CH , Umask 01H +Unhalted core cycles when the thread is in ring 0. +Use Edge to count transition. +.It Li CPL_CYCLES.RING123 +.Pq Event 5CH , Umask 02H +Unhalted core cycles when the thread is not in ring 0. +.It Li RS_EVENTS.EMPTY_CYCLES +.Pq Event 5EH , Umask 01H +Cycles the RS is empty for the thread. +.It Li TLB_ACCESS.LOAD_STLB_HIT +.Pq Event 5FH , Umask 01H +Counts load operations that missed 1st level DTLB but hit the 2nd level. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD +.Pq Event 60H , Umask 01H +Offcore outstanding Demand Data Read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD +.Pq Event 60H , Umask 02H +Offcore outstanding Demand Code Read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO +.Pq Event 60H , Umask 04H +Offcore outstanding RFO store transactions in SQ to uncore. Set Cmask=1 to +count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD +.Pq Event 60H , Umask 08H +Offcore outstanding cacheable data read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION +.Pq Event 63H , Umask 01H +Cycles in which the L1D and L2 are locked, due to a UC lock or split lock. +.It Li LOCK_CYCLES.CACHE_LOCK_DURATION +.Pq Event 63H , Umask 02H +Cycles in which the L1D is locked. +.It Li IDQ.EMPTY +.Pq Event 79H , Umask 02H +Counts cycles the IDQ is empty. +.It Li IDQ.MITE_UOPS +.Pq Event 79H , Umask 04H +Increment each cycle # of uops delivered to IDQ from MITE path. +Can combine Umask 04H and 20H. +Set Cmask = 1 to count cycles. +.It Li IDQ.DSB_UOPS +.Pq Event 79H , Umask 08H +Increment each cycle. # of uops delivered to IDQ from DSB path. +Can combine Umask 08H and 10H +Set Cmask = 1 to count cycles. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H , Umask 10H +Increment each cycle # of uops delivered to IDQ when MS_busy by DSB. Set +Cmask = 1 to count cycles. Add Edge=1 to count # of delivery. +Can combine Umask 04H, 08H. +.It Li IDQ.MS_MITE_UOPS +.Pq Event 79H , Umask 20H +Increment each cycle # of uops delivered to IDQ when MS_busy by MITE. Set +Cmask = 1 to count cycles. +Can combine Umask 04H, 08H. +.It Li IDQ.MS_UOPS +.Pq Event 79H , Umask 30H +Increment each cycle # of uops delivered to IDQ from MS by either DSB or +MITE. Set Cmask = 1 to count cycles. +Can combine Umask 04H, 08H. +.It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered at least one uops. Set Cmask = 1. +.It Li IDQ.ALL_DSB_CYCLES_4_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered four uops. Set Cmask = 4. +.It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered at least one uops. Set Cmask = 1. +.It Li IDQ.ALL_MITE_CYCLES_4_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered four uops. Set Cmask = 4. +.It Li IDQ.MITE_ALL_UOPS +.Pq Event 79H , Umask 3CH +# of uops delivered to IDQ from any path. +.It Li ICACHE.MISSES +.Pq Event 80H , Umask 02H +Number of Instruction Cache, Streaming Buffer and Victim Cache Misses. +Includes UC accesses. +.It Li ITLB_MISSES.MISS_CAUSES_A_WALK +.Pq Event 85H , Umask 01H +Misses in all ITLB levels that cause page walks. +.It Li ITLB_MISSES.WALK_COMPLETED +.Pq Event 85H , Umask 02H +Misses in all ITLB levels that cause completed page walks. +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H , Umask 04H +Cycle PMH is busy with a walk. +.It Li ITLB_MISSES.STLB_HIT +.Pq Event 85H , Umask 10H +Number of cache load STLB hits. No page walk. +.It Li ILD_STALL.LCP +.Pq Event 87H , Umask 01H +Stalls caused by changing prefix length of the instruction. +.It Li ILD_STALL.IQ_FULL +.Pq Event 87H , Umask 04H +Stall cycles due to IQ is full. +.It Li BR_INST_EXEC.COND +.Pq Event 88H , Umask 01H +Qualify conditional near branch instructions executed, but not necessarily +retired. +Must combine with umask 40H, 80H. +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H , Umask 02H +Qualify all unconditional near branch instructions excluding calls and +indirect branches. +Must combine with umask 80H. +.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 88H , Umask 04H +Qualify executed indirect near branch instructions that are not calls nor +returns. +Must combine with umask 80H. +.It Li BR_INST_EXEC.RETURN_NEAR +.Pq Event 88H , Umask 08H +Qualify indirect near branches that have a return mnemonic. +Must combine with umask 80H. +.It Li BR_INST_EXEC.DIRECT_NEAR_CALL +.Pq Event 88H , Umask 10H +Qualify unconditional near call branch instructions, excluding non call +branch, executed. +Must combine with umask 80H. +.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL +.Pq Event 88H , Umask 20H +Qualify indirect near calls, including both register and memory indirect, +executed. +Must combine with umask 80H. +.It Li BR_INST_EXEC.NONTAKEN +.Pq Event 88H , Umask 40H +Qualify non-taken near branches executed. +Applicable to umask 01H only. +.It Li BR_INST_EXEC.TAKEN +.Pq Event 88H , Umask 80H +Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H, +10H, 20H. +.It Li BR_INST_EXEC.ALL_BRANCHES +.Pq Event 88H , Umask FFH +Counts all near executed branches (not necessarily retired). +.It Li BR_MISP_EXEC.COND +.Pq Event 89H , Umask 01H +Qualify conditional near branch instructions mispredicted. +Must combine with umask 40H, 80H. +.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 89H , Umask 04H +Qualify mispredicted indirect near branch instructions that are not calls +nor returns. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H , Umask 08H +Qualify mispredicted indirect near branches that have a return mnemonic. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL +.Pq Event 89H , Umask 10H +Qualify mispredicted unconditional near call branch instructions, excluding +non call branch, executed. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL +.Pq Event 89H , Umask 20H +Qualify mispredicted indirect near calls, including both register and memory +indirect, executed. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.NONTAKEN +.Pq Event 89H , Umask 40H +Qualify mispredicted non-taken near branches executed. +Applicable to umask 01H only. +.It Li BR_MISP_EXEC.TAKEN +.Pq Event 89H , Umask 80H +Qualify mispredicted taken near branches executed. Must combine with +01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_MISP_EXEC.ALL_BRANCHES +.Pq Event 89H , Umask FFH +Counts all near executed branches (not necessarily retired). +.It Li IDQ_UOPS_NOT_DELIVERED.CORE +.Pq Event 9CH , Umask 01H +Count number of non-delivered uops to RAT per thread. +Use Cmask to qualify uop b/w. +.It Li UOPS_DISPATCHED_PORT.PORT_0 +.Pq Event A1H , Umask 01H +Cycles which a Uop is dispatched on port 0. +.It Li UOPS_DISPATCHED_PORT.PORT_1 +.Pq Event A1H , Umask 02H +Cycles which a Uop is dispatched on port 1. +.It Li UOPS_DISPATCHED_PORT.PORT_2_LD +.Pq Event A1H , Umask 04H +Cycles which a load uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2_STA +.Pq Event A1H , Umask 08H +Cycles which a store address uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2 +.Pq Event A1H , Umask 0CH +Cycles which a Uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_3_LD +.Pq Event A1H , Umask 10H +Cycles which a load uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3_STA +.Pq Event A1H , Umask 20H +Cycles which a store address uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3 +.Pq Event A1H , Umask 30H +Cycles which a Uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_4 +.Pq Event A1H , Umask 40H +Cycles which a Uop is dispatched on port 4. +.It Li UOPS_DISPATCHED_PORT.PORT_5 +.Pq Event A1H , Umask 80H +Cycles which a Uop is dispatched on port 5. +.It Li RESOURCE_STALLS.ANY +.Pq Event A2H , Umask 01H +Cycles Allocation is stalled due to Resource Related reason. +.It Li RESOURCE_STALLS.RS +.Pq Event A2H , Umask 04H +Cycles stalled due to no eligible RS entry available. +.It Li RESOURCE_STALLS.SB +.Pq Event A2H , Umask 08H +Cycles stalled due to no store buffers available. (not including draining +form sync). +.It Li RESOURCE_STALLS.ROB +.Pq Event A2H , Umask 10H +Cycles stalled due to re-order buffer full. +.It Li DSB2MITE_SWITCHES.COUNT +.Pq Event ABH , Umask 01H +Number of DSB to MITE switches. +.It Li DSB2MITE_SWITCHES.PENALTY_CYCLES +.Pq Event ABH , Umask 02H +Cycles DSB to MITE switches caused delay. +.It Li DSB_FILL.EXCEED_DSB_LINES +.Pq Event ACH , Umask 08H +DSB Fill encountered > 3 DSB lines. +.It Li ITLB.ITLB_FLUSH +.Pq Event AEH , Umask 01H +Counts the number of ITLB flushes, includes 4k/2M/4M pages. +.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD +.Pq Event B0H , Umask 01H +Demand data read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_CODE_RD +.Pq Event B0H , Umask 02H +Demand code read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H , Umask 04H +Demand RFO read requests sent to uncore, including regular RFOs, locks, +ItoM. +.It Li OFFCORE_REQUESTS.ALL_DATA_RD +.Pq Event B0H , Umask 08H +Data read requests sent to uncore (demand and prefetch). +.It Li UOPS_EXECUTED.THREAD +.Pq Event B1H , Umask 01H +Counts total number of uops to be executed per-thread each cycle. Set Cmask += 1, INV =1 to count stall cycles. +.It Li UOPS_EXECUTED.CORE +.Pq Event B1H , Umask 02H +Counts total number of uops to be executed per-core each cycle. +Do not need to set ANY. +.It Li OFF_CORE_RESPONSE_0 +.Pq Event B7H , Umask 01H +Off-core Response Performance Monitoring. +PMC0 only. +Requires programming MSR 01A6H. +.It Li OFF_CORE_RESPONSE_1 +.Pq Event BBH , Umask 01H +Off-core Response Performance Monitoring. +PMC3 only. +Requires programming MSR 01A7H. +.It Li TLB_FLUSH.DTLB_THREAD +.Pq Event BDH , Umask 01H +DTLB flush attempts of the thread- specific entries. +.It Li TLB_FLUSH.STLB_ANY +.Pq Event BDH , Umask 20H +Count number of STLB flush attempts. +.It Li INST_RETIRED.ANY_P +.Pq Event C0H , Umask 00H +Number of instructions at retirement. +.It Li INST_RETIRED.ALL +.Pq Event C0H , Umask 01H +Precise instruction retired event with HW to reduce effect of PEBS shadow in +IP distribution. +PMC1 only. +Must quiesce other PMCs. +.It Li OTHER_ASSISTS.AVX_STORE +.Pq Event C1H , Umask 08H +Number of assists associated with 256-bit AVX store operations. +.It Li OTHER_ASSISTS.AVX_TO_SSE +.Pq Event C1H , Umask 10H +Number of transitions from AVX- 256 to legacy SSE when penalty applicable. +.It Li OTHER_ASSISTS.SSE_TO_AVX +.Pq Event C1H , Umask 20H +Number of transitions from SSE to AVX-256 when penalty applicable. +.It Li UOPS_RETIRED.ALL +.Pq Event C2H , Umask 01H +Counts the number of micro-ops retired, Use cmask=1 and invert to count +active cycles or stalled cycles. +Supports PEBS, use Any=1 for core granular. +.It Li UOPS_RETIRED.RETIRE_SLOTS +.Pq Event C2H , Umask 02H +Counts the number of retirement slots used each cycle. +.It Li MACHINE_CLEARS.MEMORY_ORDERING +.Pq Event C3H , Umask 02H +Counts the number of machine clears due to memory order conflicts. +.It Li MACHINE_CLEARS.SMC +.Pq Event C3H , Umask 04H +Number of self-modifying-code machine clears detected. +.It Li MACHINE_CLEARS.MASKMOV +.Pq Event C3H , Umask 20H +Counts the number of executed AVX masked load operations that refer to an +illegal address range with the mask bits set to 0. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 00H +Branch instructions at retirement. +.It Li BR_INST_RETIRED.CONDITIONAL +.Pq Event C4H , Umask 01H +Counts the number of conditional branch instructions retired. +Supports PEBS. +.It Li BR_INST_RETIRED.NEAR_CALL +.Pq Event C4H , Umask 02H +Direct and indirect near call instructions retired. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 04H +Counts the number of branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_RETURN +.Pq Event C4H , Umask 08H +Counts the number of near return instructions retired. +.It Li BR_INST_RETIRED.NOT_TAKEN +.Pq Event C4H , Umask 10H +Counts the number of not taken branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_TAKEN +.Pq Event C4H , Umask 20H +Number of near taken branches retired. +.It Li BR_INST_RETIRED.FAR_BRANCH +.Pq Event C4H , Umask 40H +Number of far branches retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 00H +Mispredicted branch instructions at retirement. +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 01H +Mispredicted conditional branch instructions retired. +Supports PEBS. +.It Li BR_MISP_RETIRED.NEAR_CALL +.Pq Event C5H , Umask 02H +Direct and indirect mispredicted near call instructions retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 04H +Mispredicted macro branch instructions retired. +.It Li BR_MISP_RETIRED.NOT_TAKEN +.Pq Event C5H , Umask 10H +Mispredicted not taken branch instructions retired. +.It Li BR_MISP_RETIRED.TAKEN +.Pq Event C5H , Umask 20H +Mispredicted taken branch instructions retired. +.It Li FP_ASSIST.X87_OUTPUT +.Pq Event CAH , Umask 02H +Number of X87 FP assists due to Output values. +.It Li FP_ASSIST.X87_INPUT +.Pq Event CAH , Umask 04H +Number of X87 FP assists due to input values. +.It Li FP_ASSIST.SIMD_OUTPUT +.Pq Event CAH , Umask 08H +Number of SIMD FP assists due to Output values. +.It Li FP_ASSIST.SIMD_INPUT +.Pq Event CAH , Umask 10H +Number of SIMD FP assists due to input values. +.It Li FP_ASSIST.ANY +.Pq Event CAH , Umask 1EH +Cycles with any input/output SSE* or FP assists. +.It Li ROB_MISC_EVENTS.LBR_INSERTS +.Pq Event CCH , Umask 20H +Count cases of saving new LBR records by hardware. +.It Li MEM_TRANS_RETIRED.LOAD_LATENCY +.Pq Event CDH , Umask 01H +Sample loads with specified latency threshold. +PMC3 only. +Specify threshold in MSR 0x3F6. +.It Li MEM_TRANS_RETIRED.PRECISE_STORE +.Pq Event CDH , Umask 02H +Sample stores and collect precise store operation via PEBS record. +PMC3 only. +.It Li MEM_UOP_RETIRED.LOADS +.Pq Event D0H , Umask 01H +Qualify retired memory uops that are loads. Combine with umask 10H, 20H, +40H, 80H. +Supports PEBS. +.It Li MEM_UOP_RETIRED.STORES +.Pq Event D0H , Umask 02H +Qualify retired memory uops that are stores. Combine with umask 10H, 20H, +40H, 80H. +.It Li MEM_UOP_RETIRED.STLB_MISS +.Pq Event D0H , Umask 10H +Qualify retired memory uops with STLB miss. Must combine with umask 01H, +02H, to produce counts. +.It Li MEM_UOP_RETIRED.LOCK +.Pq Event D0H , Umask 20H +Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to +produce counts. +.It Li MEM_UOP_RETIRED.SPLIT +.Pq Event D0H , Umask 40H +Qualify retired memory uops with line split. Must combine with umask 01H, +02H, to produce counts. +.It Li MEM_UOP_RETIRED.ALL +.Pq Event D0H , Umask 80H +Qualify any retired memory uops. Must combine with umask 01H, 02H, to +produce counts. +.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT +.Pq Event D1H , Umask 01H +Retired load uops with L1 cache hits as data sources. +Supports PEBS. +.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT +.Pq Event D1H , Umask 02H +Retired load uops with L2 cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT +.Pq Event D1H , Umask 04H +Retired load uops with LLC cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB +.Pq Event D1H , Umask 40H +Retired load uops which data sources were load uops missed L1 but hit FB due +to preceding miss to the same cache line with data not ready. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS +.Pq Event D2H , Umask 01H +Retired load uops which data sources were LLC hit and cross-core snoop +missed in on-pkg core cache. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT +.Pq Event D2H , Umask 02H +Retired load uops which data sources were LLC and cross-core snoop hits in +on-pkg core cache. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM +.Pq Event D2H , Umask 04H +Retired load uops which data sources were HitM responses from shared LLC. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE +.Pq Event D2H , Umask 08H +Retired load uops which data sources were hits in LLC without snoops +required. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM +.Pq Event D3H , Umask 01H +Retired load uops which data sources missed LLC but serviced from local +dram. +Supports PEBS. +.It Li L2_TRANS.DEMAND_DATA_RD +.Pq Event F0H , Umask 01H +Demand Data Read requests that access L2 cache. +.It Li L2_TRANS.RFO +.Pq Event F0H , Umask 02H +RFO requests that access L2 cache. +.It Li L2_TRANS.CODE_RD +.Pq Event F0H , Umask 04H +L2 cache accesses when fetching instructions. +.It Li L2_TRANS.ALL_PF +.Pq Event F0H , Umask 08H +Any MLC or LLC HW prefetch accessing L2, including rejects. +.It Li L2_TRANS.L1D_WB +.Pq Event F0H , Umask 10H +L1D writebacks that access L2 cache. +.It Li L2_TRANS.L2_FILL +.Pq Event F0H , Umask 20H +L2 fill requests that access L2 cache. +.It Li L2_TRANS.L2_WB +.Pq Event F0H , Umask 40H +L2 writebacks that access L2 cache. +.It Li L2_TRANS.ALL_REQUESTS +.Pq Event F0H , Umask 80H +Transactions accessing L2 pipe. +.It Li L2_LINES_IN.I +.Pq Event F1H , Umask 01H +L2 cache lines in I state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.S +.Pq Event F1H , Umask 02H +L2 cache lines in S state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.E +.Pq Event F1H , Umask 04H +L2 cache lines in E state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.ALL +.Pq Event F1H , Umask 07H +L2 cache lines filling L2. +Counting does not cover rejects. +.It Li L2_LINES_OUT.DEMAND_CLEAN +.Pq Event F2H , Umask 01H +Clean L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.DEMAND_DIRTY +.Pq Event F2H , Umask 02H +Dirty L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.PF_CLEAN +.Pq Event F2H , Umask 04H +Clean L2 cache lines evicted by the MLC prefetcher. +.It Li L2_LINES_OUT.PF_DIRTY +.Pq Event F2H , Umask 08H +Dirty L2 cache lines evicted by the MLC prefetcher. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.iaf 3 , +.Xr pmc.ucf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.ivybridgexeon 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Ivy Bridge +microarchitecture was written by +.An "Fabien Thomas" +.Aq fabient at FreeBSD.org . Property changes on: trunk/lib/libpmc/pmc.ivybridge.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/lib/libpmc/pmc.ivybridgexeon.3 =================================================================== --- trunk/lib/libpmc/pmc.ivybridgexeon.3 (rev 0) +++ trunk/lib/libpmc/pmc.ivybridgexeon.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,911 @@ +.\" Copyright (c) 2013 Hiren Panchasara +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.ivybridgexeon.3 249492 2013-04-15 03:09:59Z hiren $ +.\" +.Dd Jan 25, 2013 +.Dt PMC.IVYBRIDGEXEON 3 +.Os +.Sh NAME +.Nm pmc.ivybridgexeon +.Nd measurement events for +.Tn Intel +.Tn Ivy Bridge Xeon +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Ivy Bridge Xeon" +CPUs contain PMCs conforming to version 2 of the +.Tn Intel +performance measurement architecture. +These CPUs may contain up to three classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_IAP" +.It Li PMC_CLASS_IAF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_IAP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Ivy Bridge Xeon PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual" +.%N "Order Number: 325462-045US" +.%D January 2013 +.%Q "Intel Corporation" +.Re +.Ss IVYBRIDGE FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.iaf 3 . +.Ss IVYBRIDGE PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta Yes +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta Yes +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta Yes +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li rsp= Ns Ar value +Configure the Off-core Response bits. +.Bl -tag -width indent +.It Li REQ_DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full and partial +cachelines as well as demand data page table entry cacheline reads. Does not +count L2 data read prefetches or instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. +Does not count L2 code read prefetches. +.It Li REQ_WB +Counts the number of writeback (modified to exclusive) transactions. +.It Li REQ_PF_DATA_RD +Counts the number of data cacheline reads generated by L2 prefetchers. +.It Li REQ_PF_RFO +Counts the number of RFO requests generated by L2 prefetchers. +.It Li REQ_PF_IFETCH +Counts the number of code reads generated by L2 prefetchers. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. +.El +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.It Li os +Configure the PMC to count events happening at processor privilege +level 0. +.It Li usr +Configure the PMC to count events occurring at privilege levels 1, 2 +or 3. +.El +.Pp +If neither of the +.Dq Li os +or +.Dq Li usr +qualifiers are specified, the default is to enable both. +.Ss Event Specifiers (Programmable PMCs) +Ivy Bridge programmable PMCs support the following events: +.Bl -tag -width indent +.It Li LD_BLOCKS.STORE_FORWARD +.Pq Event 03H , Umask 02H +loads blocked by overlapping with store buffer that cannot be forwarded . +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H , Umask 01H +Speculative cache-line split load uops dispatched to L1D. +.It Li MISALIGN_MEM_REF.STORES +.Pq Event 05H , Umask 02H +Speculative cache-line split Store- address uops dispatched to L1D. +.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS +.Pq Event 07H , Umask 01H +False dependencies in MOB due to partial compare on address. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK +.Pq Event 08H , Umask 81H +Misses in all TLB levels that cause a page walk of any page size from demand loads. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED +.Pq Event 08H , Umask 82H +Misses in all TLB levels that caused page walk completed of any size by demand loads. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION +.Pq Event 08H , Umask 84H +Cycle PMH is busy with a walk due to demand loads. +.It Li UOPS_ISSUED.ANY +.Pq Event 0EH , Umask 01H +Increments each cycle the # of Uops issued by the RAT to RS. +Set Cmask = 1, Inv = 1to count stalled cycles. +Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles of this core. +.It Li UOPS_ISSUED.FLAGS_MERGE +.Pq Event 0EH , Umask 10H +Number of flags-merge uops allocated. Such uops adds delay. +.It Li UOPS_ISSUED.SLOW_LEA +.Pq Event 0EH , Umask 20H +Number of slow LEA or similar uops allocated. Such uop has 3 sources (e.g. 2 +sources + immediate) regardless if as a result of LEA instruction or not. +.It Li UOPS_ISSUED.SINGLE_MUL +.Pq Event 0EH , Umask 40H +Number of multiply packed/scalar single precision uops allocated. +.It Li ARITH.FPU_DIV_ACTIVE +.Pq Event 14H , Umask 01H +Cycles that the divider is active, includes INT and FP. Set 'edge =1, +cmask=1' to count the number of divides. +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H , Umask 01H +Demand Data Read requests that hit L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_DATA_RD +.Pq Event 24H , Umask 03H +Counts any demand and L1 HW prefetch data load requests to L2. +.It Li L2_RQSTS.RFO_HITS +.Pq Event 24H , Umask 04H +Counts the number of store RFO requests that hit the L2 cache. +.It Li L2_RQSTS.RFO_MISS +.Pq Event 24H , Umask 08H +Counts the number of store RFO requests that miss the L2 cache. +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H , Umask 0CH +Counts all L2 store RFO requests. +.It Li L2_RQSTS.CODE_RD_HIT +.Pq Event 24H , Umask 10H +Number of instruction fetches that hit the L2 cache. +.It Li L2_RQSTS.CODE_RD_MISS +.Pq Event 24H , Umask 20H +Number of instruction fetches that missed the L2 cache. +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H , Umask 30H +Counts all L2 code requests. +.It Li L2_RQSTS.PF_HIT +.Pq Event 24H , Umask 40H +Counts all L2 HW prefetcher requests that hit L2. +.It Li L2_RQSTS.PF_MISS +.Pq Event 24H , Umask 80H +Counts all L2 HW prefetcher requests that missed L2. +.It Li L2_RQSTS.ALL_PF +.Pq Event 24H , Umask C0H +Counts all L2 HW prefetcher requests. +.It Li L2_STORE_LOCK_RQSTS.MISS +.Pq Event 27H , Umask 01H +RFOs that miss cache lines. +.It Li L2_STORE_LOCK_RQSTS.HIT_M +.Pq Event 27H , Umask 08H +RFOs that hit cache lines in M state. +.It Li L2_STORE_LOCK_RQSTS.ALL +.Pq Event 27H , Umask 0FH +RFOs that access cache lines in any state. +.It Li L2_L1D_WB_RQSTS.MISS +.Pq Event 28H , Umask 01H +Not rejected writebacks that missed LLC. +.It Li L2_L1D_WB_RQSTS.HIT_E +.Pq Event 28H , Umask 04H +Not rejected writebacks from L1D to L2 cache lines in E state. +.It Li L2_L1D_WB_RQSTS.HIT_M +.Pq Event 28H , Umask 08H +Not rejected writebacks from L1D to L2 cache lines in M state. +.It Li L2_L1D_WB_RQSTS.ALL +.Pq Event 28H , Umask 0FH +Not rejected writebacks from L1D to L2 cache lines in any state. +.It Li LONGEST_LAT_CACHE.REFERENCE +.Pq Event 2EH , Umask 4FH +This event counts requests originating from the core that reference a cache +line in the last level cache. +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH , Umask 41H +This event counts each cache miss condition for references to the last level +cache. +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH , Umask 00H +Counts the number of thread cycles while the thread is not in a halt state. +The thread enters the halt state when it is running the HLT instruction. The +core frequency may change from time to time due to power or thermal +throttling. +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH , Umask 01H +Increments at the frequency of XCLK (100 MHz) when not halted. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H , Umask 01H +Increments the number of outstanding L1D misses every cycle. Set Cmaks = 1 +and Edge =1 to count occurrences. +Counter 2 only. +Set Cmask = 1 to count cycles. +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H , Umask 01H +Miss in all TLB levels causes an page walk of any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H , Umask 02H +Miss in all TLB levels causes a page walk that completes of any page size +(4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H , Umask 04H +Cycles PMH is busy with this walk. +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H , Umask 10H +Store operations that miss the first TLB level but hit the second and do not +cause page walks. +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH , Umask 01H +Non-SW-prefetch load dispatches that hit fill buffer allocated for S/W prefetch. +.It Li LOAD_HIT_PRE.HW_PF +.Pq Event 4CH , Umask 02H +Non-SW-prefetch load dispatches that hit fill buffer allocated for H/W prefetch. +.It Li L1D.REPLACEMENT +.Pq Event 51H , Umask 01H +Counts the number of lines brought into the L1 data cache. +.It Li MOVE_ELIMINATION.INT_NOT_ELIMINATED +.Pq Event 58H , Umask 01H +Number of integer Move Elimination candidate uops that were not eliminated. +.It Li MOVE_ELIMINATION.SIMD_NOT_ELIMINATED +.Pq Event 58H , Umask 02H +Number of SIMD Move Elimination candidate uops that were not eliminated. +.It Li MOVE_ELIMINATION.INT_ELIMINATED +.Pq Event 58H , Umask 04H +Number of integer Move Elimination candidate uops that were eliminated. +.It Li MOVE_ELIMINATION.SIMD_ELIMINATED +.Pq Event 58H , Umask 08H +Number of SIMD Move Elimination candidate uops that were eliminated. +.It Li CPL_CYCLES.RING0 +.Pq Event 5CH , Umask 01H +Unhalted core cycles when the thread is in ring 0. +Use Edge to count transition. +.It Li CPL_CYCLES.RING123 +.Pq Event 5CH , Umask 02H +Unhalted core cycles when the thread is not in ring 0. +.It Li RS_EVENTS.EMPTY_CYCLES +.Pq Event 5EH , Umask 01H +Cycles the RS is empty for the thread. +.It Li DTLB_LOAD_MISSES.STLB_HIT +.Pq Event 5FH , Umask 04H +Counts load operations that missed 1st level DTLB but hit the 2nd level. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD +.Pq Event 60H , Umask 01H +Offcore outstanding Demand Data Read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD +.Pq Event 60H , Umask 02H +Offcore outstanding Demand Code Read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO +.Pq Event 60H , Umask 04H +Offcore outstanding RFO store transactions in SQ to uncore. Set Cmask=1 to +count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD +.Pq Event 60H , Umask 08H +Offcore outstanding cacheable data read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION +.Pq Event 63H , Umask 01H +Cycles in which the L1D and L2 are locked, due to a UC lock or split lock. +.It Li LOCK_CYCLES.CACHE_LOCK_DURATION +.Pq Event 63H , Umask 02H +Cycles in which the L1D is locked. +.It Li IDQ.EMPTY +.Pq Event 79H , Umask 02H +Counts cycles the IDQ is empty. +.It Li IDQ.MITE_UOPS +.Pq Event 79H , Umask 04H +Increment each cycle # of uops delivered to IDQ from MITE path. +Can combine Umask 04H and 20H. +Set Cmask = 1 to count cycles. +.It Li IDQ.DSB_UOPS +.Pq Event 79H , Umask 08H +Increment each cycle. # of uops delivered to IDQ from DSB path. +Can combine Umask 08H and 10H +Set Cmask = 1 to count cycles. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H , Umask 10H +Increment each cycle # of uops delivered to IDQ when MS_busy by DSB. Set +Cmask = 1 to count cycles. Add Edge=1 to count # of delivery. +Can combine Umask 04H, 08H. +.It Li IDQ.MS_MITE_UOPS +.Pq Event 79H , Umask 20H +Increment each cycle # of uops delivered to IDQ when MS_busy by MITE. Set +Cmask = 1 to count cycles. +Can combine Umask 04H, 08H. +.It Li IDQ.MS_UOPS +.Pq Event 79H , Umask 30H +Increment each cycle # of uops delivered to IDQ from MS by either DSB or +MITE. Set Cmask = 1 to count cycles. +Can combine Umask 04H, 08H. +.It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered at least one uops. Set Cmask = 1. +.It Li IDQ.ALL_DSB_CYCLES_4_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered four uops. Set Cmask = 4. +.It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered at least one uops. Set Cmask = 1. +.It Li IDQ.ALL_MITE_CYCLES_4_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered four uops. Set Cmask = 4. +.It Li IDQ.MITE_ALL_UOPS +.Pq Event 79H , Umask 3CH +# of uops delivered to IDQ from any path. +.It Li ICACHE.MISSES +.Pq Event 80H , Umask 02H +Number of Instruction Cache, Streaming Buffer and Victim Cache Misses. +Includes UC accesses. +.It Li ITLB_MISSES.MISS_CAUSES_A_WALK +.Pq Event 85H , Umask 01H +Misses in all ITLB levels that cause page walks. +.It Li ITLB_MISSES.WALK_COMPLETED +.Pq Event 85H , Umask 02H +Misses in all ITLB levels that cause completed page walks. +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H , Umask 04H +Cycle PMH is busy with a walk. +.It Li ITLB_MISSES.STLB_HIT +.Pq Event 85H , Umask 10H +Number of cache load STLB hits. No page walk. +.It Li ILD_STALL.LCP +.Pq Event 87H , Umask 01H +Stalls caused by changing prefix length of the instruction. +.It Li ILD_STALL.IQ_FULL +.Pq Event 87H , Umask 04H +Stall cycles due to IQ is full. +.It Li BR_INST_EXEC.COND +.Pq Event 88H , Umask 01H +Qualify conditional near branch instructions executed, but not necessarily +retired. +Must combine with umask 40H, 80H. +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H , Umask 02H +Qualify all unconditional near branch instructions excluding calls and +indirect branches. +Must combine with umask 80H. +.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 88H , Umask 04H +Qualify executed indirect near branch instructions that are not calls nor +returns. +Must combine with umask 80H. +.It Li BR_INST_EXEC.RETURN_NEAR +.Pq Event 88H , Umask 08H +Qualify indirect near branches that have a return mnemonic. +Must combine with umask 80H. +.It Li BR_INST_EXEC.DIRECT_NEAR_CALL +.Pq Event 88H , Umask 10H +Qualify unconditional near call branch instructions, excluding non call +branch, executed. +Must combine with umask 80H. +.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL +.Pq Event 88H , Umask 20H +Qualify indirect near calls, including both register and memory indirect, +executed. +Must combine with umask 80H. +.It Li BR_INST_EXEC.NONTAKEN +.Pq Event 88H , Umask 40H +Qualify non-taken near branches executed. +Applicable to umask 01H only. +.It Li BR_INST_EXEC.TAKEN +.Pq Event 88H , Umask 80H +Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H, +10H, 20H. +.It Li BR_INST_EXEC.ALL_BRANCHES +.Pq Event 88H , Umask FFH +Counts all near executed branches (not necessarily retired). +.It Li BR_MISP_EXEC.COND +.Pq Event 89H , Umask 01H +Qualify conditional near branch instructions mispredicted. +Must combine with umask 40H, 80H. +.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 89H , Umask 04H +Qualify mispredicted indirect near branch instructions that are not calls +nor returns. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H , Umask 08H +Qualify mispredicted indirect near branches that have a return mnemonic. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL +.Pq Event 89H , Umask 10H +Qualify mispredicted unconditional near call branch instructions, excluding +non call branch, executed. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL +.Pq Event 89H , Umask 20H +Qualify mispredicted indirect near calls, including both register and memory +indirect, executed. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.NONTAKEN +.Pq Event 89H , Umask 40H +Qualify mispredicted non-taken near branches executed. +Applicable to umask 01H only. +.It Li BR_MISP_EXEC.TAKEN +.Pq Event 89H , Umask 80H +Qualify mispredicted taken near branches executed. Must combine with +01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_MISP_EXEC.ALL_BRANCHES +.Pq Event 89H , Umask FFH +Counts all near executed branches (not necessarily retired). +.It Li IDQ_UOPS_NOT_DELIVERED.CORE +.Pq Event 9CH , Umask 01H +Count number of non-delivered uops to RAT per thread. +Use Cmask to qualify uop b/w. +.It Li UOPS_DISPATCHED_PORT.PORT_0 +.Pq Event A1H , Umask 01H +Cycles which a Uop is dispatched on port 0. +.It Li UOPS_DISPATCHED_PORT.PORT_1 +.Pq Event A1H , Umask 02H +Cycles which a Uop is dispatched on port 1. +.It Li UOPS_DISPATCHED_PORT.PORT_2_LD +.Pq Event A1H , Umask 04H +Cycles which a load uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2_STA +.Pq Event A1H , Umask 08H +Cycles which a store address uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2 +.Pq Event A1H , Umask 0CH +Cycles which a Uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_3_LD +.Pq Event A1H , Umask 10H +Cycles which a load uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3_STA +.Pq Event A1H , Umask 20H +Cycles which a store address uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3 +.Pq Event A1H , Umask 30H +Cycles which a Uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_4 +.Pq Event A1H , Umask 40H +Cycles which a Uop is dispatched on port 4. +.It Li UOPS_DISPATCHED_PORT.PORT_5 +.Pq Event A1H , Umask 80H +Cycles which a Uop is dispatched on port 5. +.It Li RESOURCE_STALLS.ANY +.Pq Event A2H , Umask 01H +Cycles Allocation is stalled due to Resource Related reason. +.It Li RESOURCE_STALLS.RS +.Pq Event A2H , Umask 04H +Cycles stalled due to no eligible RS entry available. +.It Li RESOURCE_STALLS.SB +.Pq Event A2H , Umask 08H +Cycles stalled due to no store buffers available. (not including draining +form sync). +.It Li RESOURCE_STALLS.ROB +.Pq Event A2H , Umask 10H +Cycles stalled due to re-order buffer full. +.It Li CYCLE_ACTIVITY.CYCLES_L2_PENDING +.Pq Event A3H , Umask 01H +Cycles with pending L2 miss loads. Set AnyThread to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_LDM_PENDING +.Pq Event A3H , Umask 02H +Cycles with pending memory loads. Set AnyThread to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_NO_EXECUTE +.Pq Event A3H , Umask 04H +Cycles of dispatch stalls. Set AnyThread to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_L1D_PENDING +.Pq Event A3H , Umask 08H +Cycles with pending L1 cache miss loads. Set AnyThread to count per core. +.It Li DSB2MITE_SWITCHES.COUNT +.Pq Event ABH , Umask 01H +Number of DSB to MITE switches. +.It Li DSB2MITE_SWITCHES.PENALTY_CYCLES +.Pq Event ABH , Umask 02H +Cycles DSB to MITE switches caused delay. +.It Li DSB_FILL.EXCEED_DSB_LINES +.Pq Event ACH , Umask 08H +DSB Fill encountered > 3 DSB lines. +.It Li ITLB.ITLB_FLUSH +.Pq Event AEH , Umask 01H +Counts the number of ITLB flushes, includes 4k/2M/4M pages. +.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD +.Pq Event B0H , Umask 01H +Demand data read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_CODE_RD +.Pq Event B0H , Umask 02H +Demand code read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H , Umask 04H +Demand RFO read requests sent to uncore, including regular RFOs, locks, +ItoM. +.It Li OFFCORE_REQUESTS.ALL_DATA_RD +.Pq Event B0H , Umask 08H +Data read requests sent to uncore (demand and prefetch). +.It Li UOPS_EXECUTED.THREAD +.Pq Event B1H , Umask 01H +Counts total number of uops to be executed per-thread each cycle. Set Cmask += 1, INV =1 to count stall cycles. +.It Li UOPS_EXECUTED.CORE +.Pq Event B1H , Umask 02H +Counts total number of uops to be executed per-core each cycle. +Do not need to set ANY. +.It Li OFF_CORE_RESPONSE_0 +.Pq Event B7H , Umask 01H +Off-core Response Performance Monitoring. +PMC0 only. +Requires programming MSR 01A6H. +.It Li OFF_CORE_RESPONSE_1 +.Pq Event BBH , Umask 01H +Off-core Response Performance Monitoring. +PMC3 only. +Requires programming MSR 01A7H. +.It Li TLB_FLUSH.DTLB_THREAD +.Pq Event BDH , Umask 01H +DTLB flush attempts of the thread- specific entries. +.It Li TLB_FLUSH.STLB_ANY +.Pq Event BDH , Umask 20H +Count number of STLB flush attempts. +.It Li INST_RETIRED.ANY_P +.Pq Event C0H , Umask 00H +Number of instructions at retirement. +.It Li INST_RETIRED.ALL +.Pq Event C0H , Umask 01H +Precise instruction retired event with HW to reduce effect of PEBS shadow in +IP distribution. +PMC1 only. +Must quiesce other PMCs. +.It Li OTHER_ASSISTS.AVX_STORE +.Pq Event C1H , Umask 08H +Number of assists associated with 256-bit AVX store operations. +.It Li OTHER_ASSISTS.AVX_TO_SSE +.Pq Event C1H , Umask 10H +Number of transitions from AVX- 256 to legacy SSE when penalty applicable. +.It Li OTHER_ASSISTS.SSE_TO_AVX +.Pq Event C1H , Umask 20H +Number of transitions from SSE to AVX-256 when penalty applicable. +.It Li UOPS_RETIRED.ALL +.Pq Event C2H , Umask 01H +Counts the number of micro-ops retired, Use cmask=1 and invert to count +active cycles or stalled cycles. +Supports PEBS, use Any=1 for core granular. +.It Li UOPS_RETIRED.RETIRE_SLOTS +.Pq Event C2H , Umask 02H +Counts the number of retirement slots used each cycle. +.It Li MACHINE_CLEARS.MEMORY_ORDERING +.Pq Event C3H , Umask 02H +Counts the number of machine clears due to memory order conflicts. +.It Li MACHINE_CLEARS.SMC +.Pq Event C3H , Umask 04H +Number of self-modifying-code machine clears detected. +.It Li MACHINE_CLEARS.MASKMOV +.Pq Event C3H , Umask 20H +Counts the number of executed AVX masked load operations that refer to an +illegal address range with the mask bits set to 0. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 00H +Branch instructions at retirement. +.It Li BR_INST_RETIRED.CONDITIONAL +.Pq Event C4H , Umask 01H +Counts the number of conditional branch instructions retired. +Supports PEBS. +.It Li BR_INST_RETIRED.NEAR_CALL +.Pq Event C4H , Umask 02H +Direct and indirect near call instructions retired. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 04H +Counts the number of branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_RETURN +.Pq Event C4H , Umask 08H +Counts the number of near return instructions retired. +.It Li BR_INST_RETIRED.NOT_TAKEN +.Pq Event C4H , Umask 10H +Counts the number of not taken branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_TAKEN +.Pq Event C4H , Umask 20H +Number of near taken branches retired. +.It Li BR_INST_RETIRED.FAR_BRANCH +.Pq Event C4H , Umask 40H +Number of far branches retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 00H +Mispredicted branch instructions at retirement. +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 01H +Mispredicted conditional branch instructions retired. +Supports PEBS. +.It Li BR_MISP_RETIRED.NEAR_CALL +.Pq Event C5H , Umask 02H +Direct and indirect mispredicted near call instructions retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 04H +Mispredicted macro branch instructions retired. +.It Li BR_MISP_RETIRED.NOT_TAKEN +.Pq Event C5H , Umask 10H +Mispredicted not taken branch instructions retired. +.It Li BR_MISP_RETIRED.TAKEN +.Pq Event C5H , Umask 20H +Mispredicted taken branch instructions retired. +.It Li FP_ASSIST.X87_OUTPUT +.Pq Event CAH , Umask 02H +Number of X87 FP assists due to Output values. +.It Li FP_ASSIST.X87_INPUT +.Pq Event CAH , Umask 04H +Number of X87 FP assists due to input values. +.It Li FP_ASSIST.SIMD_OUTPUT +.Pq Event CAH , Umask 08H +Number of SIMD FP assists due to Output values. +.It Li FP_ASSIST.SIMD_INPUT +.Pq Event CAH , Umask 10H +Number of SIMD FP assists due to input values. +.It Li FP_ASSIST.ANY +.Pq Event CAH , Umask 1EH +Cycles with any input/output SSE* or FP assists. +.It Li ROB_MISC_EVENTS.LBR_INSERTS +.Pq Event CCH , Umask 20H +Count cases of saving new LBR records by hardware. +.It Li MEM_TRANS_RETIRED.LOAD_LATENCY +.Pq Event CDH , Umask 01H +Sample loads with specified latency threshold. +PMC3 only. +Specify threshold in MSR 0x3F6. +.It Li MEM_TRANS_RETIRED.PRECISE_STORE +.Pq Event CDH , Umask 02H +Sample stores and collect precise store operation via PEBS record. +PMC3 only. +.It Li MEM_UOP_RETIRED.LOADS +.Pq Event D0H , Umask 01H +Qualify retired memory uops that are loads. Combine with umask 10H, 20H, +40H, 80H. +Supports PEBS. +.It Li MEM_UOP_RETIRED.STORES +.Pq Event D0H , Umask 02H +Qualify retired memory uops that are stores. Combine with umask 10H, 20H, +40H, 80H. +.It Li MEM_UOP_RETIRED.STLB_MISS +.Pq Event D0H , Umask 10H +Qualify retired memory uops with STLB miss. Must combine with umask 01H, +02H, to produce counts. +.It Li MEM_UOP_RETIRED.LOCK +.Pq Event D0H , Umask 20H +Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to +produce counts. +.It Li MEM_UOP_RETIRED.SPLIT +.Pq Event D0H , Umask 40H +Qualify retired memory uops with line split. Must combine with umask 01H, +02H, to produce counts. +.It Li MEM_UOP_RETIRED.ALL +.Pq Event D0H , Umask 80H +Qualify any retired memory uops. Must combine with umask 01H, 02H, to +produce counts. +.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT +.Pq Event D1H , Umask 01H +Retired load uops with L1 cache hits as data sources. +Supports PEBS. +.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT +.Pq Event D1H , Umask 02H +Retired load uops with L2 cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT +.Pq Event D1H , Umask 04H +Retired load uops whose data source was LLC hit with no snoop required. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_MISS +.Pq Event D1H , Umask 20H +Retired load uops whose data source is LLC miss. +.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB +.Pq Event D1H , Umask 40H +Retired load uops which data sources were load uops missed L1 but hit FB due +to preceding miss to the same cache line with data not ready. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS +.Pq Event D2H , Umask 01H +Retired load uops which data sources were LLC hit and cross-core snoop +missed in on-pkg core cache. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT +.Pq Event D2H , Umask 02H +Retired load uops which data sources were LLC and cross-core snoop hits in +on-pkg core cache. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM +.Pq Event D2H , Umask 04H +Retired load uops which data sources were HitM responses from shared LLC. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE +.Pq Event D2H , Umask 08H +Retired load uops which data sources were hits in LLC without snoops +required. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM +.Pq Event D3H , Umask 01H +Retired load uops which data sources missed LLC but serviced from local +dram. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM +.Pq Event D3H , Umask 04H +Retired load uops whose data source was remote DRAM. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_HITM +.Pq Event D3H , Umask 10H +Retired load uops whose data source was remote HITM. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_FWD +.Pq Event D3H , Umask 20H +Retired load uops whose data source was forwards from a remote cache. +.It Li BACLEARS.ANY +.Pq Event E6H , Umask 1FH +Number of front end re-steers due to BPU misprediction. +.It Li L2_TRANS.DEMAND_DATA_RD +.Pq Event F0H , Umask 01H +Demand Data Read requests that access L2 cache. +.It Li L2_TRANS.RFO +.Pq Event F0H , Umask 02H +RFO requests that access L2 cache. +.It Li L2_TRANS.CODE_RD +.Pq Event F0H , Umask 04H +L2 cache accesses when fetching instructions. +.It Li L2_TRANS.ALL_PF +.Pq Event F0H , Umask 08H +Any MLC or LLC HW prefetch accessing L2, including rejects. +.It Li L2_TRANS.L1D_WB +.Pq Event F0H , Umask 10H +L1D writebacks that access L2 cache. +.It Li L2_TRANS.L2_FILL +.Pq Event F0H , Umask 20H +L2 fill requests that access L2 cache. +.It Li L2_TRANS.L2_WB +.Pq Event F0H , Umask 40H +L2 writebacks that access L2 cache. +.It Li L2_TRANS.ALL_REQUESTS +.Pq Event F0H , Umask 80H +Transactions accessing L2 pipe. +.It Li L2_LINES_IN.I +.Pq Event F1H , Umask 01H +L2 cache lines in I state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.S +.Pq Event F1H , Umask 02H +L2 cache lines in S state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.E +.Pq Event F1H , Umask 04H +L2 cache lines in E state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.ALL +.Pq Event F1H , Umask 07H +L2 cache lines filling L2. +Counting does not cover rejects. +.It Li L2_LINES_OUT.DEMAND_CLEAN +.Pq Event F2H , Umask 01H +Clean L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.DEMAND_DIRTY +.Pq Event F2H , Umask 02H +Dirty L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.PF_CLEAN +.Pq Event F2H , Umask 04H +Clean L2 cache lines evicted by the MLC prefetcher. +.It Li L2_LINES_OUT.PF_DIRTY +.Pq Event F2H , Umask 08H +Dirty L2 cache lines evicted by the MLC prefetcher. +.It Li L2_LINES_OUT.DIRTY_ALL +.Pq Event F2H , Umask 0AH +Dirty L2 cache lines filling the L2. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.iaf 3 , +.Xr pmc.ucf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.ivybridge 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Ivy Bridge Xeon +microarchitecture was written by +.An "Hiren Panchasara" +.Aq hiren.panchasara at gmail.com . Property changes on: trunk/lib/libpmc/pmc.ivybridgexeon.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Modified: trunk/lib/libpmc/pmc.k7.3 =================================================================== --- trunk/lib/libpmc/pmc.k7.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.k7.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.k7.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.K7 3 Modified: trunk/lib/libpmc/pmc.k8.3 =================================================================== --- trunk/lib/libpmc/pmc.k8.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.k8.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.k8.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.K8 3 Modified: trunk/lib/libpmc/pmc.mips.3 =================================================================== --- trunk/lib/libpmc/pmc.mips.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.mips.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.mips.3 234717 2012-04-26 20:11:57Z gjb $ .\" .Dd February 25, 2012 .Dt PMC.MIPS 3 Modified: trunk/lib/libpmc/pmc.p4.3 =================================================================== --- trunk/lib/libpmc/pmc.p4.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.p4.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.p4.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.P4 3 Modified: trunk/lib/libpmc/pmc.p5.3 =================================================================== --- trunk/lib/libpmc/pmc.p5.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.p5.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.p5.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC 3 Modified: trunk/lib/libpmc/pmc.p6.3 =================================================================== --- trunk/lib/libpmc/pmc.p6.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.p6.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.p6.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.P6 3 Modified: trunk/lib/libpmc/pmc.sandybridge.3 =================================================================== --- trunk/lib/libpmc/pmc.sandybridge.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.sandybridge.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -22,14 +22,14 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.sandybridge.3 249492 2013-04-15 03:09:59Z hiren $ .\" -.Dd February 12, 2012 -.Dt PMC.SANDYBRIDGE 3 -.Os +.Dd October 19, 2012 +.Dt PMC.SANDYBRIDGE 3 +.Os .Sh NAME .Nm pmc.sandybridge -.Nd measurement events for +.Nd measurement events for .Tn Intel .Tn Sandy Bridge family CPUs @@ -56,10 +56,10 @@ .El .Pp The number of PMCs available in each class and their widths need to be -determined at run time by calling +determined at run time by calling .Xr pmc_cpuinfo 3 . .Pp -Intel Sandy Bridge PMCs are documented in +Intel Sandy Bridge PMCs are documented in .Rs .%B "Intel(R) 64 and IA-32 Architectures Software Developers Manual" .%T "Volume 3B: System Programming Guide, Part 2" @@ -75,7 +75,7 @@ .Bl -column "PMC_CAP_INTERRUPT" "Support" .It Em Capability Ta Em Support .It PMC_CAP_CASCADE Ta \&No -.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_EDGE Ta Yes .It PMC_CAP_INTERRUPT Ta Yes .It PMC_CAP_INVERT Ta Yes .It PMC_CAP_READ Ta Yes @@ -93,55 +93,80 @@ .It Li rsp= Ns Ar value Configure the Off-core Response bits. .Bl -tag -width indent -.It Li DMND_DATA_RD -Counts the number of demand and DCU prefetch data reads of full -and partial cachelines as well as demand data page table entry -cacheline reads. -Does not count L2 data read prefetches or instruction fetches. -.It Li DMND_RFO -Counts the number of demand and DCU prefetch reads for ownership -(RFO) requests generated by a write to data cacheline. -Does not count L2 RFO. -.It Li DMND_IFETCH -Counts the number of demand and DCU prefetch instruction cacheline -reads. +.It Li REQ_DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full and partial +cachelines as well as demand data page table entry cacheline reads. Does not +count L2 data read prefetches or instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. Does not count L2 code read prefetches. -.It Li WB +.It Li REQ_WB Counts the number of writeback (modified to exclusive) transactions. -.It Li PF_DATA_RD +.It Li REQ_PF_DATA_RD Counts the number of data cacheline reads generated by L2 prefetchers. -.It Li PF_RFO +.It Li REQ_PF_RFO Counts the number of RFO requests generated by L2 prefetchers. -.It Li PF_IFETCH +.It Li REQ_PF_IFETCH Counts the number of code reads generated by L2 prefetchers. -.It Li OTHER -Counts one of the following transaction types, including L3 invalidate, -I/O, full or partial writes, WC or non-temporal stores, CLFLUSH, Fences, -lock, unlock, split lock. -.It Li UNCORE_HIT -L3 Hit: local or remote home requests that hit L3 cache in the uncore -with no coherency actions required (snooping). -.It Li OTHER_CORE_HIT_SNP -L3 Hit: local or remote home requests that hit L3 cache in the uncore -and was serviced by another core with a cross core snoop where no modified -copies were found (clean). -.It Li OTHER_CORE_HITM -L3 Hit: local or remote home requests that hit L3 cache in the uncore -and was serviced by another core with a cross core snoop where modified -copies were found (HITM). -.It Li REMOTE_CACHE_FWD -L3 Miss: local homed requests that missed the L3 cache and was serviced -by forwarded data following a cross package snoop where no modified -copies found. -(Remote home requests are not counted) -.It Li REMOTE_DRAM -L3 Miss: remote home requests that missed the L3 cache and were serviced -by remote DRAM. -.It Li LOCAL_DRAM -L3 Miss: local home requests that missed the L3 cache and were serviced -by local DRAM. -.It Li NON_DRAM -Non-DRAM requests that were serviced by IOH. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. .El .It Li cmask= Ns Ar value Configure the PMC to increment only if the number of configured @@ -177,222 +202,222 @@ Sandy Bridge programmable PMCs support the following events: .Bl -tag -width indent .It Li LD_BLOCKS.DATA_UNKNOWN -.Pq EVENT_03H, Umask 01H +.Pq EVENT_03H, Umask 01H Blocked loads due to store buffer blocks with unknown data. .It Li LD_BLOCKS.STORE_FORWARD -.Pq Event 03H, Umask 02H +.Pq Event 03H, Umask 02H Loads blocked by overlapping with store buffer that cannot be forwarded. .It Li LD_BLOCKS.NO_SR -.Pq Event 03H, Umask 08H +.Pq Event 03H, Umask 08H # of Split loads blocked due to resource not available. -.It Li LD_BLOCKS.ALL_BLOCK -.Pq EVENT_03H, Umask 10H +.It Li LD_BLOCKS.ALL_BLOCK +.Pq EVENT_03H, Umask 10H Number of cases where any load is blocked but has no DCU miss. -.It Li MISALIGN_MEM_REF.LOADS -.Pq Event 05H, Umask 01H +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H, Umask 01H Speculative cache-line split load uops dispatched to L1D. .It Li MISALIGN_MEM_REF.STORES -.Pq Event 05H, Umask 02H +.Pq Event 05H, Umask 02H Speculative cache-line split Store-address uops dispatched to L1D. .It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS -.Pq Event 07H, Umask 01H +.Pq Event 07H, Umask 01H False dependencies in MOB due to partial compare on address. -.It Li LD_BLOCKS_PARTIAL.ALL_STA_BLOCK -.Pq Event 07H, Umask 08H -The number of times that load operations are temporarily blocked because of -older stores, with addresses that are not yet known. +.It Li LD_BLOCKS_PARTIAL.ALL_STA_BLOCK +.Pq Event 07H, Umask 08H +The number of times that load operations are temporarily blocked because of +older stores, with addresses that are not yet known. A load operation may incur more than one block of this type. .It LI DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK -.Pq Event 08H, Umask 01H +.Pq Event 08H, Umask 01H Misses in all TLB levels that cause a page walk of any page size. -.It Li DTLB_LOAD_MISSES.WALK_COMPLETED -.Pq Event 08H, Umask 02H +.It Li DTLB_LOAD_MISSES.WALK_COMPLETED +.Pq Event 08H, Umask 02H Misses in all TLB levels that caused page walk completed of any size. -.It Li DTLB_LOAD_MISSES.WALK_DURATION -.Pq Event 08H, Umask 04H +.It Li DTLB_LOAD_MISSES.WALK_DURATION +.Pq Event 08H, Umask 04H Cycle PMH is busy with a walk. .It Li DTLB_LOAD_MISSES.STLB_HIT -.Pq Event 08H, Umask 10H -Number of cache load STLB hits. +.Pq Event 08H, Umask 10H +Number of cache load STLB hits. No page walk. -.It Li INT_MISC.RECOVERY_CYCLES -.Pq Event 0DH, Umask 03H -Cycles waiting to recover after Machine Clears or JEClear. +.It Li INT_MISC.RECOVERY_CYCLES +.Pq Event 0DH, Umask 03H +Cycles waiting to recover after Machine Clears or JEClear. Set Cmask = 1. Set Edge to count occurrences -.It Li INT_MISC.RAT_STALL_CYCLES -.Pq Event 0DH, Umask 40H +.It Li INT_MISC.RAT_STALL_CYCLES +.Pq Event 0DH, Umask 40H Cycles RAT external stall is sent to IDQ for this thread. .It Li UOPS_ISSUED.ANY -.Pq Event 0EH, Umask 01H -Increments each cycle the # of Uops issued by the RAT to RS. +.Pq Event 0EH, Umask 01H +Increments each cycle the # of Uops issued by the RAT to RS. Set Cmask = 1, Inv = 1, Any= 1 to count stalled cycles of this core. Set Cmask = 1, Inv = 1 to count stalled cycles -.It Li FP_COMP_OPS_EXE.X87 -.Pq Event 10H, Umask 01H +.It Li FP_COMP_OPS_EXE.X87 +.Pq Event 10H, Umask 01H Counts number of X87 uops executed. -.It Li FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE -.Pq Event 10H, Umask 10H +.It Li FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE +.Pq Event 10H, Umask 10H Counts number of SSE* double precision FP packed uops executed. .It Li FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE -.Pq Event 10H, Umask 20H +.Pq Event 10H, Umask 20H Counts number of SSE* single precision FP scalar uops executed. .It Li FP_COMP_OPS_EXE.SSE_PACKED_SINGLE .Pq Event 10H, Umask 40H Counts number of SSE* single precision FP packed uops executed. -.It LiFP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE +.It LiFP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE .Pq Event 10H, Umask 80H Counts number of SSE* double precision FP scalar uops executed. .It Li SIMD_FP_256.PACKED_SINGLE -.Pq Event 11H, Umask 01H +.Pq Event 11H, Umask 01H Counts 256-bit packed single-precision floating-point instructions. .It Li SIMD_FP_256.PACKED_DOUBLE .Pq Event 11H, Umask 02H Counts 256-bit packed double-precision floating-point instructions. .It Li ARITH.FPU_DIV_ACTIVE -.Pq Event 14H, Umask 01H +.Pq Event 14H, Umask 01H Cycles that the divider is active, includes INT and FP. Set 'edge =1, cmask=1' to count the number of divides. -.It Li INSTS_WRITTEN_TO_IQ.INSTS -.Pq Event 17H, Umask 01H +.It Li INSTS_WRITTEN_TO_IQ.INSTS +.Pq Event 17H, Umask 01H Counts the number of instructions written into the IQ every cycle. -.It Li L2_RQSTS.DEMAND_DATA_RD_HIT -.Pq Event 24H, Umask 01H +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H, Umask 01H Demand Data Read requests that hit L2 cache. .It Li L2_RQSTS.ALL_DEMAND_DATA_RD -.Pq Event 24H, Umask 03H +.Pq Event 24H, Umask 03H Counts any demand and L1 HW prefetch data load requests to L2. .It Li L2_RQSTS.RFO_HITS .Pq Event 24H, Umask 04H Counts the number of store RFO requests that hit the L2 cache. -.It Li L2_RQSTS.RFO_MISS +.It Li L2_RQSTS.RFO_MISS .Pq Event 24H, Umask 08H Counts the number of store RFO requests that miss the L2 cache. -.It Li L2_RQSTS.ALL_RFO -.Pq Event 24H, Umask 0CH +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H, Umask 0CH Counts all L2 store RFO requests. -.It Li L2_RQSTS.CODE_RD_HIT +.It Li L2_RQSTS.CODE_RD_HIT .Pq Event 24H, Umask 10H Number of instruction fetches that hit the L2 cache. -.It Li L2_RQSTS.CODE_RD_MISS +.It Li L2_RQSTS.CODE_RD_MISS .Pq Event 24H, Umask 20H Number of instruction fetches that missed the L2 cache. -.It Li L2_RQSTS.ALL_CODE_RD -.Pq Event 24H, Umask 30H +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H, Umask 30H Counts all L2 code requests. -.It Li L2_RQSTS.PF_HIT -.Pq Event 24H, Umask 40H +.It Li L2_RQSTS.PF_HIT +.Pq Event 24H, Umask 40H Requests from L2 Hardware prefetcher that hit L2. -.It Li L2_RQSTS.PF_MISS +.It Li L2_RQSTS.PF_MISS .Pq Event 24H, Umask 80H Requests from L2 Hardware prefetcher that missed L2. -.It Li L2_RQSTS.ALL_PF +.It Li L2_RQSTS.ALL_PF .Pq Event 24H, Umask C0H Any requests from L2 Hardware prefetchers. -.It Li L2_STORE_LOCK_RQSTS.MISS -.Pq Event 27H, Umask 01H +.It Li L2_STORE_LOCK_RQSTS.MISS +.Pq Event 27H, Umask 01H RFOs that miss cache lines. -.It Li L2_STORE_LOCK_RQSTS.HIT_E -.Pq Event 27H, Umask 04H +.It Li L2_STORE_LOCK_RQSTS.HIT_E +.Pq Event 27H, Umask 04H RFOs that hit cache lines in E state. .It Li L2_STORE_LOCK_RQSTS.HIT_M .Pq EVENT_27H, Umask 08H RFOs that hit cache lines in M state. -.It Li L2_STORE_LOCK_RQSTS.ALL -.Pq EVENT_27H, Umask 0FH +.It Li L2_STORE_LOCK_RQSTS.ALL +.Pq EVENT_27H, Umask 0FH RFOs that access cache lines in any state. -.It Li L2_L1D_WB_RQSTS.HIT_E -.Pq Event 28H, Umask 04H +.It Li L2_L1D_WB_RQSTS.HIT_E +.Pq Event 28H, Umask 04H Not rejected writebacks from L1D to L2 cache lines in E state. -.It Li L2_L1D_WB_RQSTS.HIT_M -.Pq Event 28H, Umask 08H +.It Li L2_L1D_WB_RQSTS.HIT_M +.Pq Event 28H, Umask 08H Not rejected writebacks from L1D to L2 cache lines in M state. -.It Li LONGEST_LAT_CACHE.REFERENCE +.It Li LONGEST_LAT_CACHE.REFERENCE .Pq Event 2EH, Umask 4FH -This event counts requests originating from the core that reference a cache +This event counts requests originating from the core that reference a cache line in the last level cache. -.It Li LONGEST_LAT_CACHE.MISS -.Pq Event 2EH, Umask 41H -This event counts each cache miss condition for references to the last level +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH, Umask 41H +This event counts each cache miss condition for references to the last level cache. -.It Li CPU_CLK_UNHALTED.THREAD_P -.Pq Event 3CH, Umask 00H -Counts the number of thread cycles while the thread is not in a halt state. -The thread enters the halt state when it is running the HLT instruction. -The core frequency may change from time to time due to power or thermal +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH, Umask 00H +Counts the number of thread cycles while the thread is not in a halt state. +The thread enters the halt state when it is running the HLT instruction. +The core frequency may change from time to time due to power or thermal throttling. -.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK -.Pq Event 3CH, Umask 01H +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH, Umask 01H Increments at the frequency of XCLK (100 MHz) when not halted. -.It Li L1D_PEND_MISS.PENDING -.Pq Event 48H, Umask 01H -Increments the number of outstanding L1D misses every cycle. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H, Umask 01H +Increments the number of outstanding L1D misses every cycle. Set Cmask = 1 and Edge =1 to count occurrences. Counter 2 only; Set Cmask = 1 to count cycles. -.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK -.Pq Event 49H, Umask 01H Miss in all TLB levels causes an page walk of any +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H, Umask 01H Miss in all TLB levels causes an page walk of any page size (4K/2M/4M/1G). -.It Li DTLB_STORE_MISSES.WALK_COMPLETED -.Pq Event 49H, Umask 02H -Miss in all TLB levels causes a page walk that completes of any page size +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H, Umask 02H +Miss in all TLB levels causes a page walk that completes of any page size (4K/2M/4M/1G). -.It Li DTLB_STORE_MISSES.WALK_DURATION -.Pq Event 49H, Umask 04H +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H, Umask 04H Cycles PMH is busy with this walk. -.It Li DTLB_STORE_MISSES.STLB_HIT -.Pq Event 49H, Umask 10H -Store operations that miss the first TLB level but hit the second and do not +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H, Umask 10H +Store operations that miss the first TLB level but hit the second and do not cause page walks. -.It Li LOAD_HIT_PRE.SW_PF -.Pq Event 4CH, Umask 01H +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH, Umask 01H Not SW-prefetch load dispatches that hit fill buffer allocated for S/W prefetch. -.It Li LOAD_HIT_PER.HW_PF -.Pq Event 4CH, Umask 02H +.It Li LOAD_HIT_PER.HW_PF +.Pq Event 4CH, Umask 02H Not SW-prefetch load dispatches that hit fill buffer allocated for H/W prefetch. -.It Li HW_PRE_REQ.DL1_MISS -.Pq Event 4EH, Umask 02H -Hardware Prefetch requests that miss the L1D cache. -A request is being counted each time it access the cache & miss it, including +.It Li HW_PRE_REQ.DL1_MISS +.Pq Event 4EH, Umask 02H +Hardware Prefetch requests that miss the L1D cache. +A request is being counted each time it access the cache & miss it, including if a block is applicable or if hit the Fill Buffer for example. This accounts for both L1 streamer and IP-based (IPP) HW prefetchers. -.It Li L1D.REPLACEMENT +.It Li L1D.REPLACEMENT .Pq Event 51H, Umask 01H Counts the number of lines brought into the L1 data cache. -.It Li L1D.ALLOCATED_IN_M -.Pq Event 51H, Umask 02H +.It Li L1D.ALLOCATED_IN_M +.Pq Event 51H, Umask 02H Counts the number of allocations of modified L1D cache lines. .It Li L1D.EVICTION .Pq Event 51H, Umask 04H -Counts the number of modified lines evicted from the L1 data cache due to +Counts the number of modified lines evicted from the L1 data cache due to replacement. .It Li L1D.ALL_M_REPLACEMENT -.Pq Event 51H, Umask 08H -Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line +.Pq Event 51H, Umask 08H +Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line replacement. .It Li PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP -.Pq Event 59H, Umask 20H +.Pq Event 59H, Umask 20H Increments the number of flags-merge uops in flight each cycle. Set Cmask = 1 to count cycles. .It Li PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW -.Pq Event 59H, Umask 40H +.Pq Event 59H, Umask 40H Cycles with at least one slow LEA uop allocated. .It Li PARTIAL_RAT_STALLS.MUL_SINGLE_UOP -.Pq Event 59H, Umask 80H +.Pq Event 59H, Umask 80H Number of Multiply packed/scalar single precision uops allocated. -.It Li RESOURCE_STALLS2.ALL_FL_EMPTY -.Pq Event 5BH, Umask 0CH +.It Li RESOURCE_STALLS2.ALL_FL_EMPTY +.Pq Event 5BH, Umask 0CH Cycles stalled due to free list empty. -.It Li RESOURCE_STALLS2.ALL_PRF_CONTROL -.Pq Event 5BH, Umask 0FH +.It Li RESOURCE_STALLS2.ALL_PRF_CONTROL +.Pq Event 5BH, Umask 0FH Cycles stalled due to control structures full for physical registers. -.It Li RESOURCE_STALLS2.BOB_FULL -.Pq Event 5BH, Umask 40H +.It Li RESOURCE_STALLS2.BOB_FULL +.Pq Event 5BH, Umask 40H Cycles Allocator is stalled due to Branch Order Buffer. .It Li RESOURCE_STALLS2.OOO_RSRC -.Pq Event 5BH, Umask 4FH +.Pq Event 5BH, Umask 4FH Cycles stalled due to out of order resources full. .It Li CPL_CYCLES.RING0 -.Pq Event 5CH, Umask 01H +.Pq Event 5CH, Umask 01H Unhalted core cycles when the thread is in ring 0. Use Edge to count transition .It Li CPL_CYCLES.RING123 @@ -399,54 +424,54 @@ .Pq Event 5CH, Umask 02H Unhalted core cycles when the thread is not in ring 0. .It Li RS_EVENTS.EMPTY_CYCLES -.Pq Event 5EH, Umask 01H +.Pq Event 5EH, Umask 01H Cycles the RS is empty for the thread. .It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD -.Pq Event 60H, Umask 01H +.Pq Event 60H, Umask 01H Offcore outstanding Demand Data Read transactions in SQ to uncore. Set Cmask=1 to count cycles. .It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO -.Pq Event 60H, Umask 04H +.Pq Event 60H, Umask 04H Offcore outstanding RFO store transactions in SQ to uncore. Set Cmask=1 to count cycles. .It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD -.Pq Event 60H, Umask 08H +.Pq Event 60H, Umask 08H Offcore outstanding cacheable data read transactions in SQ to uncore. Set Cmask=1 to count cycles. .It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION -.Pq Event 63H, Umask 01H +.Pq Event 63H, Umask 01H Cycles in which the L1D and L2 are locked, due to a UC lock or split lock. .It Li LOCK_CYCLES.CACHE_LOCK_DURATION .Pq Event 63H, Umask 02H Cycles in which the L1D is locked. .It Li IDQ.EMPTY -.Pq Event 79H, Umask 02H +.Pq Event 79H, Umask 02H Counts cycles the IDQ is empty. -.It Li IQD.MITE_UOPS -.Pq Event 79H, Umask 04H -Increment each cycle # of uops delivered to IDQ from MITE path. +.It Li IQD.MITE_UOPS +.Pq Event 79H, Umask 04H +Increment each cycle # of uops delivered to IDQ from MITE path. Set Cmask = 1 to count cycles. Can combine Umask 04H and 20H .It Li IDQ.DSB_UOPS -.Pq Event 79H, Umask 08H -Increment each cycle. -# of uops delivered to IDQ from DSB path. +.Pq Event 79H, Umask 08H +Increment each cycle. +# of uops delivered to IDQ from DSB path. Set Cmask = 1 to count cycles. Can combine Umask 08H and 10H -.It Li IDQ.MS_DSB_UOPS -.Pq Event 79H, Umask 10H -Increment each cycle # of uops delivered to IDQ when MS busy by DSB. -Set Cmask = 1 to count cycles MS is busy. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H, Umask 10H +Increment each cycle # of uops delivered to IDQ when MS busy by DSB. +Set Cmask = 1 to count cycles MS is busy. Set Cmask=1 and Edge=1 to count MS activations. Can combine Umask 08H and 10H .It Li IDQ.MS_MITE_UOPS -.Pq Event 79H, Umask 20H -Increment each cycle # of uops delivered to IDQ when MS is busy by MITE. +.Pq Event 79H, Umask 20H +Increment each cycle # of uops delivered to IDQ when MS is busy by MITE. Set Cmask = 1 to count cycles. Can combine Umask 04H and 20H -.It Li IDQ.MS_UOPS -.Pq Event 79H, Umask 30H -Increment each cycle # of uops delivered to IDQ from MS by either DSB or MITE. +.It Li IDQ.MS_UOPS +.Pq Event 79H, Umask 30H +Increment each cycle # of uops delivered to IDQ from MS by either DSB or MITE. Set Cmask = 1 to count cycles. Can combine Umask 04H, 08H and 30H .It Li ICACHE.MISSES @@ -457,38 +482,38 @@ .Pq Event 85H, Umask 01H Misses in all ITLB levels that cause page walks. .It Li ITLB_MISSES.WALK_COMPLETED -.Pq Event 85H, Umask 02H +.Pq Event 85H, Umask 02H Misses in all ITLB levels that cause completed page walks. -.It Li ITLB_MISSES.WALK_DURATION -.Pq Event 85H, Umask 04H +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H, Umask 04H Cycle PMH is busy with a walk. .It Li ITLB_MISSES.STLB_HIT -.Pq Event 85H, Umask 10H -Number of cache load STLB hits. +.Pq Event 85H, Umask 10H +Number of cache load STLB hits. No page walk. .It Li ILD_STALL.LCP -.Pq Event 87H, Umask 01H +.Pq Event 87H, Umask 01H Stalls caused by changing prefix length of the instruction. .It Li ILD_STALL.IQ_FULL -.Pq Event 87H, Umask 04H +.Pq Event 87H, Umask 04H Stall cycles due to IQ is full. .It Li BR_INST_EXEC.COND -.Pq Event 88H, Umask 01H -Qualify conditional near branch instructions executed, but not necessarily +.Pq Event 88H, Umask 01H +Qualify conditional near branch instructions executed, but not necessarily retired. Must combine with umask 40H, 80H -.It Li BR_INST_EXEC.DIRECT_JMP -.Pq Event 88H, Umask 02H -Qualify all unconditional near branch instructions excluding calls and indirect +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H, Umask 02H +Qualify all unconditional near branch instructions excluding calls and indirect branches. Must combine with umask 80H .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET -.Pq Event 88H, Umask 04H -Qualify executed indirect near branch instructions that are not calls nor +.Pq Event 88H, Umask 04H +Qualify executed indirect near branch instructions that are not calls nor returns. Must combine with umask 80H .It Li BR_INST_EXEC.RETURN_NEAR -.Pq Event 88H, Umask 08H +.Pq Event 88H, Umask 08H Qualify indirect near branches that have a return mnemonic. Must combine with umask 80H .It Li BR_INST_EXEC.DIRECT_NEAR_CALL @@ -497,49 +522,49 @@ executed. Must combine with umask 80H .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL -.Pq Event 88H, Umask 20H -Qualify indirect near calls, including both register and memory indirect, +.Pq Event 88H, Umask 20H +Qualify indirect near calls, including both register and memory indirect, executed. Must combine with umask 80H .It Li BR_INST_EXEC.NONTAKEN -.Pq Event 88H, Umask 40H +.Pq Event 88H, Umask 40H Qualify non-taken near branches executed. Applicable to umask 01H only .It Li BR_INST_EXEC.TAKEN -.Pq Event 88H, Umask 80H -Qualify taken near branches executed. +.Pq Event 88H, Umask 80H +Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H, 10H, 20H .It Li BR_INST_EXE.ALL_BRANCHES -.Pq Event 88H, Umask FFH +.Pq Event 88H, Umask FFH Counts all near executed branches (not necessarily retired). .It Li BR_MISP_EXEC.COND -.Pq Event 89H, Umask 01H -Qualify conditional near branch instructions mispredicted. +.Pq Event 89H, Umask 01H +Qualify conditional near branch instructions mispredicted. Must combine with umask 40H, 80H .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET -.Pq Event 89H, Umask 04H -Qualify mispredicted indirect near branch instructions that are not calls nor +.Pq Event 89H, Umask 04H +Qualify mispredicted indirect near branch instructions that are not calls nor returns. Must combine with umask 80H -.It Li BR_MISP_EXEC.RETURN_NEAR -.Pq Event 89H, Umask 08H +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H, Umask 08H Qualify mispredicted indirect near branches that have a return mnemonic. Must combine with umask 80H .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL -.Pq Event 89H, Umask 10H -Qualify mispredicted unconditional near call branch instructions, excluding non +.Pq Event 89H, Umask 10H +Qualify mispredicted unconditional near call branch instructions, excluding non call branch, executed. Must combine with umask 80H .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL -.Pq Event 89H, Umask 20H -Qualify mispredicted indirect near calls, including both register and memory +.Pq Event 89H, Umask 20H +Qualify mispredicted indirect near calls, including both register and memory indirect, executed. Must combine with umask 80H .It Li BR_MISP_EXEC.NONTAKEN -.Pq Event 89H, Umask 40H +.Pq Event 89H, Umask 40H Qualify mispredicted non-taken near branches executed. Applicable to umask 01H only -.It Li BR_MISP_EXEC.TAKEN +.It Li BR_MISP_EXEC.TAKEN .Pq Event 89H, Umask 80H Qualify mispredicted taken near branches executed. Must combine with 01H,02H, 04H, 08H, 10H, 20H @@ -547,7 +572,7 @@ .Pq Event 89H, Umask FFH Counts all near executed branches (not necessarily retired). .It Li IDQ_UOPS_NOT_DELIVERED.CORE -.Pq Event 9CH, Umask 01H +.Pq Event 9CH, Umask 01H Count number of non-delivered uops to RAT per thread. Use Cmask to qualify uop b/w .It Li UOPS_DISPATCHED_PORT.PORT_0 @@ -557,28 +582,28 @@ .Pq Event A1H, Umask 02H Cycles which a Uop is dispatched on port 1. .It Li UOPS_DISPATCHED_PORT.PORT_2_LD -.Pq Event A1H, Umask 04H +.Pq Event A1H, Umask 04H Cycles which a load uop is dispatched on port 2. .It Li UOPS_DISPATCHED_PORT.PORT_2_STA .Pq Event A1H, Umask 08H Cycles which a store address uop is dispatched on port 2. .It Li UOPS_DISPATCHED_PORT.PORT_2 -.Pq Event A1H, Umask 0CH +.Pq Event A1H, Umask 0CH Cycles which a Uop is dispatched on port 2. .It Li UOPS_DISPATCHED_PORT.PORT_3_LD -.Pq Event A1H, Umask 10H +.Pq Event A1H, Umask 10H Cycles which a load uop is dispatched on port 3. -.It Li UOPS_DISPATCHED_PORT.PORT_3_STA -.Pq Event A1H, Umask 20H +.It Li UOPS_DISPATCHED_PORT.PORT_3_STA +.Pq Event A1H, Umask 20H Cycles which a store address uop is dispatched on port 3. -.It Li UOPS_DISPATCHED_PORT.PORT_3 -.Pq Event A1H, Umask 30H +.It Li UOPS_DISPATCHED_PORT.PORT_3 +.Pq Event A1H, Umask 30H .Pq Cycles which a Uop is dispatched on port 3. -.It Li UOPS_DISPATCHED_PORT.PORT_4 +.It Li UOPS_DISPATCHED_PORT.PORT_4 .Pq Event A1H, Umask 40H Cycles which a Uop is dispatched on port 4. .It Li UOPS_DISPATCHED_PORT.PORT_5 -.Pq Event A1H, Umask 80H +.Pq Event A1H, Umask 80H Cycles which a Uop is dispatched on port 5. .It Li RESOURCE_STALLS.ANY .Pq Event A2H, Umask 01H @@ -587,30 +612,30 @@ .Pq Event A2H, Umask 02H Counts the cycles of stall due to lack of load buffers. .It Li RESOURCE_STALLS.LB -.Pq Event A2H, Umask 04H +.Pq Event A2H, Umask 04H Cycles stalled due to no eligible RS entry available. .It Li RESOURCE_STALLS.SB -.Pq Event A2H, Umask 08H -Cycles stalled due to no store buffers available. +.Pq Event A2H, Umask 08H +Cycles stalled due to no store buffers available. (not including draining form sync) .It Li RESOURCE_STALLS.ROB .Pq Event A2H, Umask 10H Cycles stalled due to re-order buffer full. .It Li RESOURCE_STALLS.FCSW -.Pq Event A2H, Umask 20H +.Pq Event A2H, Umask 20H Cycles stalled due to writing the FPU control word. .It Li RESOURCE_STALLS.MXCSR .Pq Event A2H, Umask 40H -Cycles stalled due to the MXCSR register rename occurring to close to a previous +Cycles stalled due to the MXCSR register rename occurring to close to a previous MXCSR rename. .It Li RESOURCE_STALLS.OTHER -.Pq Event A2H, Umask 80H +.Pq Event A2H, Umask 80H Cycles stalled while execution was stalled due to other resource issues. .It Li DSB2MITE_SWITCHES.COUNT .Pq Event ABH, Umask 01H Number of DSB to MITE switches. .It Li DSB2MITE_SWITCHES.PENALTY_CYCLES -.Pq Event ABH, Umask 02H +.Pq Event ABH, Umask 02H Cycles DSB to MITE switches caused delay. .It Li DSB_FILL.OTHER_CANCEL .Pq Event ACH, Umask 02H @@ -619,43 +644,43 @@ .Pq Event ACH, Umask 08H DSB Fill encountered > 3 DSB lines. .It Li DSB_FILL.ALL_CANCEL -.Pq Event ACH, Umask 0AH -Cases of cancelling valid Decode Stream Buffer (DSB) fill not because of exceeding +.Pq Event ACH, Umask 0AH +Cases of cancelling valid Decode Stream Buffer (DSB) fill not because of exceeding way limit. .It Li ITLB.ITLB_FLUSH .Pq Event AEH, Umask 01H Counts the number of ITLB flushes, includes 4k/2M/4M pages. .It Li OFFCORE_REQUESTS.DEMAND_DATA_RD -.Pq Event B0H, Umask 01H +.Pq Event B0H, Umask 01H Demand data read requests sent to uncore. -.It Li OFFCORE_REQUESTS.DEMAND_RFO -.Pq Event B0H, Umask 04H +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H, Umask 04H Demand RFO read requests sent to uncore, including regular RFOs, locks, ItoM. .It Li OFFCORE_REQUESTS.ALL_DATA_RD -.Pq Event B0H, Umask 08H +.Pq Event B0H, Umask 08H Data read requests sent to uncore (demand and prefetch). .It Li UOPS_DISPATCHED.THREAD -.Pq Event B1H, Umask 01H +.Pq Event B1H, Umask 01H Counts total number of uops to be dispatched per-thread each cycle. Set Cmask = 1, INV =1 to count stall cycles. .It Li UOPS_DISPATCHED.CORE -.Pq Event B1H, Umask 02H +.Pq Event B1H, Umask 02H Counts total number of uops to be dispatched per-core each cycle. Do not need to set ANY .It Li OFFCORE_REQUESTS_BUFFER.SQ_FULL -.Pq Event B2H, Umask 01H +.Pq Event B2H, Umask 01H Offcore requests buffer cannot take more entries for this thread core. .It Li AGU_BYPASS_CANCEL.COUNT -.Pq Event B6H, Umask 01H -Counts executed load operations with all the following traits: 1. addressing -of the format [base + offset], 2. the offset is between 1 and 2047, 3. the -address specified in the base register is in one page and the address +.Pq Event B6H, Umask 01H +Counts executed load operations with all the following traits: 1. addressing +of the format [base + offset], 2. the offset is between 1 and 2047, 3. the +address specified in the base register is in one page and the address [base+offset] is in another page. -.It Li OFF_CORE_RESPONSE_0 +.It Li OFF_CORE_RESPONSE_0 .Pq Event B7H, Umask 01H Off-core Response Performance Monitoring; PMC0 only. Requires programming MSR 01A6H -.It Li OFF_CORE_RESPONSE_1 +.It Li OFF_CORE_RESPONSE_1 .Pq Event BBH, Umask 01H Off-core Response Performance Monitoring. PMC3 only. Requires programming MSR 01A7H @@ -663,96 +688,96 @@ .Pq Event BDH, Umask 01H DTLB flush attempts of the thread-specific entries. .It Li TLB_FLUSH.STLB_ANY -.Pq Event BDH, Umask 20H +.Pq Event BDH, Umask 20H Count number of STLB flush attempts. .It Li L1D_BLOCKS.BANK_CONFLICT_CYCLES -.Pq Event BFH, Umask 05H +.Pq Event BFH, Umask 05H Cycles when dispatched loads are cancelled due to L1D bank conflicts with other load ports. cmask=1 .It Li INST_RETIRED.ANY_P -.Pq Event C0H, Umask 00H +.Pq Event C0H, Umask 00H Number of instructions at retirement. .It Li INST_RETIRED.PREC_DIST .Pq Event C0H, Umask 01H -Precise instruction retired event with HW to reduce effect of PEBS shadow in IP +Precise instruction retired event with HW to reduce effect of PEBS shadow in IP distribution PMC1 only; Must quiesce other PMCs. .It Li INST_RETIRED.X87 -.Pq Event C0H, Umask 02H +.Pq Event C0H, Umask 02H X87 instruction retired event. .It Li OTHER_ASSISTS.ITLB_MISS_RETIRED -.Pq Event C1H, Umask 02H +.Pq Event C1H, Umask 02H Instructions that experienced an ITLB miss. .It Li OTHER_ASSISTS.AVX_STORE -.Pq Event C1H, Umask 08H +.Pq Event C1H, Umask 08H Number of assists associated with 256-bit AVX store operations. .It Li OTHER_ASSISTS.AVX_TO_SSE -.Pq Event C1H, Umask 10H +.Pq Event C1H, Umask 10H Number of transitions from AVX256 to legacy SSE when penalty applicable. .It Li OTHER_ASSISTS.SSE_TO_AVX -.Pq Event C1H, Umask 20H +.Pq Event C1H, Umask 20H Number of transitions from SSE to AVX-256 when penalty applicable. .It Li UOPS_RETIRED.ALL -.Pq Event C2H, Umask 01H +.Pq Event C2H, Umask 01H Counts the number of micro-ops retired. Use cmask=1 and invert to count active cycles or stalled cycles. .It Li UOPS_RETIRED.RETIRE_SLOTS -.Pq Event C2H, Umask 02H +.Pq Event C2H, Umask 02H Counts the number of retirement slots used each cycle. .It Li MACHINE_CLEARS.MEMORY_ORDERING -.Pq Event C3H, Umask 02H +.Pq Event C3H, Umask 02H Counts the number of machine clears due to memory order conflicts. -.It Li MACHINE_CLEARS.SMC +.It Li MACHINE_CLEARS.SMC .Pq Event C3H, Umask 04H Counts the number of times that a program writes to a code section. .It Li MACHINE_CLEARS.MASKMOV .Pq Event C3H, Umask 20H -Counts the number of executed AVX masked load operations that refer to an +Counts the number of executed AVX masked load operations that refer to an illegal address range with the mask bits set to 0. .It Li BR_INST_RETIRED.ALL_BRANCH .Pq Event C4H, Umask 00H Branch instructions at retirement. .It Li BR_INST_RETIRED.CONDITIONAL -.Pq Event C4H, Umask 01H +.Pq Event C4H, Umask 01H Counts the number of conditional branch instructions retired. .It Li BR_INST_RETIRED.NEAR_CALL -.Pq Event C4H, Umask 02H +.Pq Event C4H, Umask 02H Direct and indirect near call instructions retired. .It Li BR_INST_RETIRED.ALL_BRANCHES .Pq Event C4H, Umask 04H Counts the number of branch instructions retired. .It Li BR_INST_RETIRED.NEAR_RETURN -.Pq Event C4H, Umask 08H +.Pq Event C4H, Umask 08H Counts the number of near return instructions retired. .It Li BR_INST_RETIRED.NOT_TAKEN -.Pq Event C4H, Umask 10H +.Pq Event C4H, Umask 10H Counts the number of not taken branch instructions retired. .It Li BR_INST_RETIRED.NEAR_TAKEN -.Pq Event C4H, Umask 20H +.Pq Event C4H, Umask 20H Number of near taken branches retired. .It Li BR_INST_RETIRED.FAR_BRANCH -.Pq Event C4H, Umask 40H +.Pq Event C4H, Umask 40H Number of far branches retired. .It Li BR_MISP_RETIRED.ALL_BRANCHES -.Pq Event C5H, Umask 00H +.Pq Event C5H, Umask 00H Mispredicted branch instructions at retirement. .It Li BR_MISP_RETIRED.CONDITIONAL -.Pq Event C5H, Umask 01H +.Pq Event C5H, Umask 01H Mispredicted conditional branch instructions retired. .It Li BR_MISP_RETIRED.NEAR_CALL -.Pq Event C5H, Umask 02H +.Pq Event C5H, Umask 02H Direct and indirect mispredicted near call instructions retired. .It Li BR_MISP_RETIRED.ALL_BRANCH -.Pq Event C5H, Umask 04H +.Pq Event C5H, Umask 04H Mispredicted macro branch instructions retired. .It Li BR_MISP_RETIRED.NOT_TAKEN -.Pq Event C5H, Umask 10H +.Pq Event C5H, Umask 10H Mispredicted not taken branch instructions retired. .It Li BR_MISP_RETIRED.TAKEN -.Pq Event C5H, Umask 20H +.Pq Event C5H, Umask 20H Mispredicted taken branch instructions retired. .It Li FP_ASSIST.X87_OUTPUT -.Pq Event CAH, Umask 02H +.Pq Event CAH, Umask 02H Number of X87 assists due to output value. .It Li FP_ASSIST.X87_INPUT .Pq Event CAH, Umask 04H @@ -761,30 +786,30 @@ .Pq Event CAH, Umask 08H Number of SIMD FP assists due to Output values. .It Li FP_ASSIST.SIMD_INPUT -.Pq Event CAH, Umask 10H +.Pq Event CAH, Umask 10H Number of SIMD FP assists due to input values. .It Li FP_ASSIST.ANY -.Pq Event CAH, Umask 1EH +.Pq Event CAH, Umask 1EH Cycles with any input/output SSE* or FP assists. .It Li ROB_MISC_EVENTS.LBR_INSERTS -.Pq Event CCH, Umask 20H +.Pq Event CCH, Umask 20H Count cases of saving new LBR records by hardware. .It Li MEM_TRANS_RETIRED.LOAD_LATENCY .Pq Event CDH, Umask 01H -Sample loads with specified latency threshold. -PMC3 only. +Sample loads with specified latency threshold. +PMC3 only. Specify threshold in MSR 0x3F6. .It Li MEM_TRANS_RETIRED.PRECISE_STORE -.Pq Event CDH, Umask 02H -Sample stores and collect precise store operation via PEBS record. +.Pq Event CDH, Umask 02H +Sample stores and collect precise store operation via PEBS record. PMC3 only. .It Li MEM_UOP_RETIRED.LOADS .Pq Event D0H, Umask 01H -Qualify retired memory uops that are loads. +Qualify retired memory uops that are loads. Combine with umask 10H, 20H, 40H, 80H. .It Li MEM_UOP_RETIRED.STORES .Pq Event D0H, Umask 02H -Qualify retired memory uops that are stores. +Qualify retired memory uops that are stores. Combine with umask 10H, 20H, 40H, 80H. .It Li MEM_UOP_RETIRED.STLB_MISS .Pq Event D0H, Umask 10H @@ -797,101 +822,101 @@ .It Li MEM_UOP_RETIRED.SPLIT .Pq Event D0H, Umask 40H Qualify retired memory uops with line split. -Must combine with umask 01H, 02H, to produce counts. +Must combine with umask 01H, 02H, to produce counts. .It Li MEM_UOP_RETIRED_ALL -.Pq Event D0H, Umask 80H +.Pq Event D0H, Umask 80H Qualify any retired memory uops. Must combine with umask 01H, 02H, to produce counts. .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT -.Pq Event D1H, Umask 01H +.Pq Event D1H, Umask 01H Retired load uops with L1 cache hits as data sources. Must combine with umask 01H, 02H, to produce counts. .It Li MEM_LOAD_UOPS_RETIRED.L2_HIT -.Pq Event D1H, Umask 02H +.Pq Event D1H, Umask 02H Retired load uops with L2 cache hits as data sources. .It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT -.Pq Event D1H, Umask 04H -Retired load uops which data sources were data hits in LLC without snoops +.Pq Event D1H, Umask 04H +Retired load uops which data sources were data hits in LLC without snoops required. .It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB -.Pq Event D1H, Umask 40H -Retired load uops which data sources were load uops missed L1 but hit FB due +.Pq Event D1H, Umask 40H +Retired load uops which data sources were load uops missed L1 but hit FB due to preceding miss to the same cache line with data not ready. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS -.Pq Event D2H, Umask 01H -Retired load uops which data sources were LLC hit and cross-core snoop missed in +.Pq Event D2H, Umask 01H +Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core cache. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT -.Pq Event D2H, Umask 02H -Retired load uops which data sources were LLC and cross-core snoop hits in +.Pq Event D2H, Umask 02H +Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core cache. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM -.Pq Event D2H, Umask 04H +.Pq Event D2H, Umask 04H Retired load uops which data sources were HitM responses from shared LLC. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE .Pq Event D2H, Umask 08H Retired load uops which data sources were hits in LLC without snoops required. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.LLC_MISS -.Pq Event D4H, Umask 02H +.Pq Event D4H, Umask 02H Retired load uops with unknown information as data source in cache serviced the load. .It Li L2_TRANS.DEMAND_DATA_RD -.Pq Event F0H, Umask 01H +.Pq Event F0H, Umask 01H Demand Data Read requests that access L2 cache. .It Li L2_TRANS.RF0 -.Pq Event F0H, Umask 02H +.Pq Event F0H, Umask 02H RFO requests that access L2 cache. .It Li L2_TRANS.CODE_RD -.Pq Event F0H, Umask 04H +.Pq Event F0H, Umask 04H L2 cache accesses when fetching instructions. .It Li L2_TRANS.ALL_PF -.Pq Event F0H, Umask 08H +.Pq Event F0H, Umask 08H L2 or LLC HW prefetches that access L2 cache. .It Li L2_TRANS.L1D_WB -.Pq Event F0H, Umask 10H +.Pq Event F0H, Umask 10H L1D writebacks that access L2 cache. .It Li L2_TRANS.L2_FILL -.Pq Event F0H, Umask 20H +.Pq Event F0H, Umask 20H L2 fill requests that access L2 cache. .It Li L2_TRANS.L2_WB -.Pq Event F0H, Umask 40H +.Pq Event F0H, Umask 40H L2 writebacks that access L2 cache. .It Li L2_TRANS.ALL_REQUESTS -.Pq Event F0H, Umask 80H +.Pq Event F0H, Umask 80H Transactions accessing L2 pipe. .It Li L2_LINES_IN.I .Pq Event F1H, Umask 01H -L2 cache lines in I state filling L2. +L2 cache lines in I state filling L2. Counting does not cover rejects. .It Li L2_LINES_IN.S -.Pq Event F1H, Umask 02H -L2 cache lines in S state filling L2. +.Pq Event F1H, Umask 02H +L2 cache lines in S state filling L2. Counting does not cover rejects. .It Li L2_LINES_IN.E -.Pq Event F1H, Umask 04H -L2 cache lines in E state filling L2. +.Pq Event F1H, Umask 04H +L2 cache lines in E state filling L2. Counting does not cover rejects. .It Li L2_LINES-IN.ALL -.Pq Event F1H, Umask 07H -L2 cache lines filling L2. +.Pq Event F1H, Umask 07H +L2 cache lines filling L2. Counting does not cover rejects. .It Li L2_LINES_OUT.DEMAND_CLEAN -.Pq Event F2H, Umask 01H +.Pq Event F2H, Umask 01H Clean L2 cache lines evicted by demand. .It Li L2_LINES_OUT.DEMAND_DIRTY -.Pq Event F2H, Umask 02H +.Pq Event F2H, Umask 02H Dirty L2 cache lines evicted by demand. .It Li L2_LINES_OUT.PF_CLEAN .Pq Event F2H, Umask 04H Clean L2 cache lines evicted by L2 prefetch. .It Li L2_LINES_OUT.PF_DIRTY -.Pq Event F2H, Umask 08H +.Pq Event F2H, Umask 08H Dirty L2 cache lines evicted by L2 prefetch. .It Li L2_LINES_OUT.DIRTY_ALL .Pq Event F2H, Umask 0AH -Dirty L2 cache lines filling the L2. +Dirty L2 cache lines filling the L2. Counting does not cover rejects. .It Li SQ_MISC.SPLIT_LOCK -.Pq Event F4H, Umask 10H +.Pq Event F4H, Umask 10H Split locks in SQ. .El .Sh SEE ALSO @@ -901,6 +926,8 @@ .Xr pmc.corei7 3 , .Xr pmc.corei7uc 3 , .Xr pmc.iaf 3 , +.Xr pmc.ivybridge 3 , +.Xr pmc.ivybridgexeon 3 , .Xr pmc.k7 3 , .Xr pmc.k8 3 , .Xr pmc.p4 3 , @@ -907,6 +934,7 @@ .Xr pmc.p5 3 , .Xr pmc.p6 3 , .Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , .Xr pmc.soft 3 , .Xr pmc.tsc 3 , .Xr pmc.ucf 3 , @@ -926,8 +954,7 @@ library was written by .An "Joseph Koshy" .Aq jkoshy at FreeBSD.org. -The support for the -.Lb Sandy Bridge +The support for the Sandy Bridge microarchitecture was written by .An "Davide Italiano" .Aq davide at FreeBSD.org . Modified: trunk/lib/libpmc/pmc.sandybridgeuc.3 =================================================================== --- trunk/lib/libpmc/pmc.sandybridgeuc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.sandybridgeuc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -22,9 +22,9 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.sandybridgeuc.3 242594 2012-11-05 01:05:14Z sbruno $ .\" -.Dd February 12, 2012 +.Dd October 19, 2012 .Dt PMC.SANDYBRIDGEUC 3 .Os .Sh NAME @@ -208,6 +208,7 @@ .Xr pmc.p5 3 , .Xr pmc.p6 3 , .Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgexeon 3 , .Xr pmc.soft 3 , .Xr pmc.tsc 3 , .Xr pmc.ucf 3 , Added: trunk/lib/libpmc/pmc.sandybridgexeon.3 =================================================================== --- trunk/lib/libpmc/pmc.sandybridgexeon.3 (rev 0) +++ trunk/lib/libpmc/pmc.sandybridgexeon.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,1024 @@ +.\" Copyright (c) 2012 Hiren Panchasara +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.sandybridgexeon.3 249964 2013-04-27 01:48:09Z bryanv $ +.\" +.Dd October 18, 2012 +.Dt PMC.SANDYBRIDGEXEON 3 +.Os +.Sh NAME +.Nm pmc.sandybridgexeon +.Nd measurement events for +.Tn Intel +.Tn Sandy Bridge Xeon +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Sandy Bridge Xeon" +CPUs contain PMCs conforming to version 2 of the +.Tn Intel +performance measurement architecture. +These CPUs may contain up to two classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_IAP" +.It Li PMC_CLASS_IAF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_IAP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Sandy Bridge Xeon PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual" +.%T "Volume 3B: System Programming Guide, Part 2" +.%N "Order Number: 253669-043US" +.%D August 2012 +.%Q "Intel Corporation" +.Re +.Ss SANDYBRIDGE XEON FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.iaf 3 . +.Ss SANDYBRIDGE XEON PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta Yes +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta Yes +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta Yes +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li rsp= Ns Ar value +Configure the Off-core Response bits. +.Bl -tag -width indent +.It Li REQ_DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full and partial +cachelines as well as demand data page table entry cacheline reads. Does not +count L2 data read prefetches or instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. +Does not count L2 code read prefetches. +.It Li REQ_WB +Counts the number of writeback (modified to exclusive) transactions. +.It Li REQ_PF_DATA_RD +Counts the number of data cacheline reads generated by L2 prefetchers. +.It Li REQ_PF_RFO +Counts the number of RFO requests generated by L2 prefetchers. +.It Li REQ_PF_IFETCH +Counts the number of code reads generated by L2 prefetchers. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. +.El +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.It Li os +Configure the PMC to count events happening at processor privilege +level 0. +.It Li usr +Configure the PMC to count events occurring at privilege levels 1, 2 +or 3. +.El +.Pp +If neither of the +.Dq Li os +or +.Dq Li usr +qualifiers are specified, the default is to enable both. +.Ss Event Specifiers (Programmable PMCs) +Sandy Bridge Xeon programmable PMCs support the following events: +.Bl -tag -width indent +.It Li LD_BLOCKS.DATA_UNKNOWN +.Pq Event 03H , Umask 01H +blocked loads due to store buffer blocks with unknown data. +.It Li LD_BLOCKS.STORE_FORWARD +.Pq Event 03H , Umask 02H +loads blocked by overlapping with store buffer that cannot +be forwarded . +.It Li LD_BLOCKS.NO_SR +.Pq Event 03H , Umask 08H +# of Split loads blocked due to resource not available. +.It Li LD_BLOCKS.ALL_BLOCK +.Pq Event 03H , Umask 10H +Number of cases where any load is blocked but has no +DCU miss. +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H , Umask 01H +Speculative cache-line split load uops dispatched to +L1D. +.It Li MISALIGN_MEM_REF.STORES +.Pq Event 05H , Umask 02H +Speculative cache-line split Store- address uops +dispatched to L1D. +.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS +.Pq Event 07H , Umask 01H +False dependencies in MOB due to partial compare on +address. +.It Li LD_BLOCKS_PARTIAL.ALL_STALL_BLOCK +.Pq Event 07H , Umask 08H +The number of times that load operations are temporarily +blocked because of older stores, with addresses that are +not yet known. A load operation may incur more than one +block of this type. +.It Li TLB_LOAD_MISSES.MISS_CAUSES_A_WALK +.Pq Event 08H , Umask 01H +Misses in all TLB levels that cause a page walk of any +page size. +.It Li TLB_LOAD_MISSES.WALK_COMPLETED +.Pq Event 08H , Umask 02H +Misses in all TLB levels that caused page walk completed +of any size. +.It Li DTLB_LOAD_MISSES.WALK_DURATION +.Pq Event 08H , Umask 04H +Cycle PMH is busy with a walk. +.It Li DTLB_LOAD_MISSES.STLB_HIT +.Pq Event 08H , Umask 10H +Number of cache load STLB hits. No page walk. +.It Li INT_MISC.RECOVERY_CYCLES +.Pq Event 0DH , Umask 03H +Cycles waiting to recover after Machine Clears or EClear. +Set Cmask= 1. +.It Li INT_MISC.RAT_STALL_CYCLES +.Pq Event 0DH , Umask 40H +Cycles RAT external stall is sent to IDQ for this thread. +.It Li UOPS_ISSUED.ANY +.Pq Event 0EH , Umask 01H +Increments each cycle the # of Uops issued by the +RAT to RS. +Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles +of this core. +.It Li FP_COMP_OPS_EXE.X87 +.Pq Event 10H , Umask 01H +Counts number of X87 uops executed. +.It Li FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE +.Pq Event 10H , Umask 10H +Counts number of SSE* double precision FP packed +uops executed. +.It Li FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE +.Pq Event 10H , Umask 20H +Counts number of SSE* single precision FP scalar +uops executed. +.It Li FP_COMP_OPS_EXE.SSE_PACKED_SINGLE +.Pq Event 10H , Umask 40H +Counts number of SSE* single precision FP packed +uops executed. +.It Li FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE +.Pq Event 10H , Umask 80H +Counts number of SSE* double precision FP scalar +uops executed. +.It Li SIMD_FP_256.PACKED_SINGLE +.Pq Event 11H , Umask 01H +Counts 256-bit packed single-precision floating- +point instructions. +.It Li SIMD_FP_256.PACKED_DOUBLE +.Pq Event 11H , Umask 02H +Counts 256-bit packed double-precision floating- +point instructions. +.It Li ARITH.FPU_DIV_ACTIVE +.Pq Event 14H , Umask 01H +Cycles that the divider is active, includes INT and FP. +Set 'edge =1, cmask=1' to count the number of +divides. +.It Li INSTS_WRITTEN_TO_IQ.INSTS +.Pq Event 17H , Umask 01H +Counts the number of instructions written into the +IQ every cycle. +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H , Umask 01H +Demand Data Read requests that hit L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_DATA_RD +.Pq Event 24H , Umask 03H +Counts any demand and L1 HW prefetch data load +requests to L2. +.It Li L2_RQSTS.RFO_HITS +.Pq Event 24H , Umask 04H +Counts the number of store RFO requests that +hit the L2 cache. +.It Li L2_RQSTS.RFO_MISS +.Pq Event 24H , Umask 08H +Counts the number of store RFO requests that +miss the L2 cache. +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H , Umask 0CH +Counts all L2 store RFO requests. +.It Li L2_RQSTS.CODE_RD_HIT +.Pq Event 24H , Umask 10H +Number of instruction fetches that hit the L2 +cache. +.It Li L2_RQSTS.CODE_RD_MISS +.Pq Event 24H , Umask 20H +Number of instruction fetches that missed the L2 +cache. +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H , Umask 30H +Counts all L2 code requests. +.It Li L2_RQSTS.PF_HIT +.Pq Event 24H , Umask 40H +Requests from L2 Hardware prefetcher that hit L2. +.It Li L2_RQSTS.PF_MISS +.Pq Event 24H , Umask 80H +Requests from L2 Hardware prefetcher that missed +L2. +.It Li L2_RQSTS.ALL_PF +.Pq Event 24H , Umask C0H +Any requests from L2 Hardware prefetchers. +.It Li L2_STORE_LOCK_RQSTS.MISS +.Pq Event 27H , Umask 01H +ROs that miss cache lines. +.It Li L2_STORE_LOCK_RQSTS.HIT_E +.Pq Event 27H , Umask 04H +RFOs that hit cache lines in E state. +.It Li L2_STORE_LOCK_RQSTS.HIT_M +.Pq Event 27H , Umask 08H +RFOs that hit cache lines in M state. +.It Li L2_STORE_LOCK_RQSTS.ALL +.Pq Event 27H , Umask 0FH +RFOs that access cache lines in any state. +.It Li L2_L1D_WB_RQSTS.MISS +.Pq Event 28H , Umask 01H +Not rejected writebacks from L1D to L2 cache lines +that missed L2. +.It Li L2_L1D_WB_RQSTS.HIT_S +.Pq Event 28H , Umask 02H +Not rejected writebacks from L1D to L2 cache lines +in S state. +.It Li L2_L1D_WB_RQSTS.HIT_E +.Pq Event 28H , Umask 04H +Not rejected writebacks from L1D to L2 cache lines +in E state. +.It Li L2_L1D_WB_RQSTS.HIT_M +.Pq Event 28H , Umask 08H +Not rejected writebacks from L1D to L2 cache lines +in M state. +.It Li L2_L1D_WB_RQSTS.ALL +.Pq Event 28H , Umask 0FH +Not rejected writebacks from L1D to L2 cache. +.It Li LONGEST_LAT_CACHE.REFERENCE +.Pq Event 2EH , Umask 4FH +This event counts requests originating from the +core that reference +a cache line in the last level cache. +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH , Umask 41H +This event counts each cache miss condition for +references to the last level cache. +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH , Umask 00H +Counts the number of thread cycles while the +thread is not in a halt state. The thread enters +the halt state when it is running the HLT +instruction. The core frequency may change from +time to time due to power or thermal throttling. +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH , Umask 01H +Increments at the frequency of XCLK (100 MHz) +when not halted. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H , Umask 01H +Increments the number of outstanding L1D misses +every cycle. +Set Cmaks = 1 and Edge =1 to count occurrences. +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H , Umask 01H +Miss in all TLB levels causes an page walk of +any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H , Umask 02H +Miss in all TLB levels causes a page walk that +completes of any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H , Umask 04H +Cycles PMH is busy with this walk. +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H , Umask 10H +Store operations that miss the first TLB level +but hit the second and do not cause page walks. +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH , Umask 01H +Not SW-prefetch load dispatches that hit fill +buffer allocated for S/W prefetch. +.It Li LOAD_HIT_PER.HW_PF +.Pq Event 4CH , Umask 02H +Not SW-prefetch load dispatches that hit fill +buffer allocated for H/W prefetch. +.It Li HW_PRE_REQ.DL1_MISS +.Pq Event 4EH , Umask 02H +Hardware Prefetch requests that miss the L1D +cache. A request is being counted each time +it access the cache & miss it, including if +a block is applicable or if hit the Fill +Buffer for example. +.It Li L1D.REPLACEMENT +.Pq Event 51H , Umask 01H +Counts the number of lines brought into the +L1 data cache. +.It Li L1D.ALLOCATED_IN_M +.Pq Event 51H , Umask 02H +Counts the number of allocations of modified +L1D cache lines. +.It Li L1D.EVICTION +.Pq Event 51H , Umask 04H +Counts the number of modified lines evicted +from the L1 data cache due to replacement. +.It Li L1D.ALL_M_REPLACEMENT +.Pq Event 51H , Umask 08H +Cache lines in M state evicted out of L1D due +to Snoop HitM or dirty line replacement. +.It Li PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP +.Pq Event 59H , Umask 0CH +Increments the number of flags-merge uops in +flight each cycle. +Set Cmask = 1 to count cycles. +.It Li PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW +.Pq Event 59H , Umask 0FH +Cycles with at least one slow LEA uop allocated. +.It Li PARTIAL_RAT_STALLS.MUL_SINGLE_UOP +.Pq Event 59H , Umask 40H +Number of Multiply packed/scalar single precision +uops allocated. +.It Li RESOURCE_STALLS2.ALL_FL_EMPTY +.Pq Event 5BH , Umask 0CH +Cycles stalled due to free list empty. +.It Li RESOURCE_STALLS2.ALL_PRF_CONTROL +.Pq Event 5BH , Umask 0FH +Cycles stalled due to control structures full for +physical registers. +.It Li RESOURCE_STALLS2.BOB_FULL +.Pq Event 5BH , Umask 40H +Cycles Allocator is stalled due Branch Order Buffer. +.It Li RESOURCE_STALLS2.OOO_RSRC +.Pq Event 5BH , Umask 4FH +Cycles stalled due to out of order resources full. +.It Li CPL_CYCLES.RING0 +.Pq Event 5CH , Umask 01H +Unhalted core cycles when the thread is in ring 0. +.It Li CPL_CYCLES.RING123 +.Pq Event 5CH , Umask 02H +Unhalted core cycles when the thread is not in ring +0. +.It Li RS_EVENTS.EMPTY_CYCLES +.Pq Event 5EH , Umask 01H +Cycles the RS is empty for the thread. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD +.Pq Event 60H , Umask 01H +Offcore outstanding Demand Data Read +transactions in SQ to uncore. Set Cmask=1 to count +cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO +.Pq Event 60H , Umask 04H +Offcore outstanding RFO store transactions in SQ to +uncore. Set Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD +.Pq Event 60H , Umask 08H +Offcore outstanding cacheable data read +transactions in SQ to uncore. Set Cmask=1 to count +cycles. +.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION +.Pq Event 63H , Umask 01H +Cycles in which the L1D and L2 are locked, due to a +UC lock or split lock. +.It Li LOCK_CYCLES.CACHE_LOCK_DURATION +.Pq Event 63H , Umask 02H +Cycles in which the L1D is locked. +.It Li IDQ.EMPTY +.Pq Event 79H , Umask 02H +Counts cycles the IDQ is empty. +.It Li IDQ.MITE_UOPS +.Pq Event 79H , Umask 04H +Increment each cycle # of uops delivered to IDQ +from MITE path. +Set Cmask = 1 to count cycles. +.It Li IDQ.DSB_UOPS +.Pq Event 79H , Umask 08H +Increment each cycle. # of uops delivered to IDQ +from DSB path. +Set Cmask = 1 to count cycles. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H , Umask 10H +Increment each cycle # of uops delivered to IDQ +when MS busy by DSB. Set Cmask = 1 to count +cycles MS is busy. Set Cmask=1 and Edge =1 to +count MS activations. +.It Li IDQ.MS_MITE_UOPS +.Pq Event 79H , Umask 20H +Increment each cycle # of uops delivered to IDQ +when MS is busy by MITE. Set Cmask = 1 to count +cycles. +.It Li IDQ.MS_UOPS +.Pq Event 79H , Umask 30H +Increment each cycle # of uops delivered to IDQ +from MS by either DSB or MITE. Set Cmask = 1 to +count cycles. +.It Li ICACHE.MISSES +.Pq Event 80H , Umask 02H +Number of Instruction Cache, Streaming Buffer and +Victim Cache Misses. Includes UC accesses. +.It Li ITLB_MISSES.MISS_CAUSES_A_WALK +.Pq Event 85H , Umask 01H +Misses in all ITLB levels that cause page walks. +.It Li ITLB_MISSES.WALK_COMPLETED +.Pq Event 85H , Umask 02H +Misses in all ITLB levels that cause completed page +walks. +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H , Umask 04H +Cycle PMH is busy with a walk. +.It Li ITLB_MISSES.STLB_HIT +.Pq Event 85H , Umask 10H +Number of cache load STLB hits. No page walk. +.It Li ILD_STALL.LCP +.Pq Event 87H , Umask 01H +Stalls caused by changing prefix length of the +instruction. +.It Li ILD_STALL.IQ_FULL +.Pq Event 87H , Umask 04H +Stall cycles due to IQ is full. +.It Li BR_INST_EXEC.COND +.Pq Event 88H , Umask 01H +Qualify conditional near branch instructions +executed, but not necessarily retired. +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H , Umask 02H +Qualify all unconditional near branch instructions +excluding calls and indirect branches. +.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 88H , Umask 04H +Qualify executed indirect near branch instructions +that are not calls nor returns. +.It Li BR_INST_EXEC.RETURN_NEAR +.Pq Event 88H , Umask 08H +Qualify indirect near branches that have a return +mnemonic. +.It Li BR_INST_EXEC.DIRECT_NEAR_CALL +.Pq Event 88H , Umask 10H +Qualify unconditional near call branch instructions, +excluding non call branch, executed. +.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL +.Pq Event 88H , Umask 20H +Qualify indirect near calls, including both register +and memory indirect, executed. +.It Li BR_INST_EXEC.NONTAKEN +.Pq Event 88H , Umask 40H +Qualify non-taken near branches executed. +.It Li BR_INST_EXEC.TAKEN +.Pq Event 88H , Umask 80H +Qualify taken near branches executed. Must +combine with 01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_INST_EXE.ALL_BRANCHES +.Pq Event 88H , Umask FFH +Counts all near executed branches (not necessarily +retired). +.It Li BR_MISP_EXEC.COND +.Pq Event 89H , Umask 01H +Qualify conditional near branch instructions +mispredicted. +.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 89H , Umask 04H +Qualify mispredicted indirect near branch +instructions that are not calls nor returns. +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H , Umask 08H +Qualify mispredicted indirect near branches that +have a return mnemonic. +.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL +.Pq Event 89H , Umask 10H +Qualify mispredicted unconditional near call branch +instructions, excluding non call branch, executed. +.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL +.Pq Event 89H , Umask 20H +Qualify mispredicted indirect near calls, including +both register and memory indirect, executed. +.It Li BR_MISP_EXEC.NONTAKEN +.Pq Event 89H , Umask 40H +Qualify mispredicted non-taken near branches +executed,. +.It Li BR_MISP_EXEC.TAKEN +.Pq Event 89H , Umask 80H +Qualify mispredicted taken near branches executed. +Must combine with 01H,02H, 04H, 08H, 10H, 20H +.It Li BR_MISP_EXEC.ALL_BRANCHES +.Pq Event 89H , Umask FFH +Counts all near executed branches (not necessarily +retired). +.It Li IDQ_UOPS_NOT_DELIVERED.CORE +.Pq Event 9CH , Umask 01H +Count number of non-delivered uops to RAT per +thread. +.It Li UOPS_DISPATCHED_PORT.PORT_0 +.Pq Event A1H , Umask 01H +Cycles which a Uop is dispatched on port 0. +.It Li UOPS_DISPATCHED_PORT.PORT_1 +.Pq Event A1H , Umask 02H +Cycles which a Uop is dispatched on port 1. +.It Li UOPS_DISPATCHED_PORT.PORT_2_LD +.Pq Event A1H , Umask 04H +Cycles which a load uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2_STA +.Pq Event A1H , Umask 08H +Cycles which a store address uop is dispatched on +port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2 +.Pq Event A1H , Umask 0CH +Cycles which a Uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_3_LD +.Pq Event A1H , Umask 10H +Cycles which a load uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3_STA +.Pq Event A1H , Umask 20H +Cycles which a store address uop is dispatched on +port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3 +.Pq Event A1H , Umask 30H +Cycles which a Uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_4 +.Pq Event A1H , Umask 40H +Cycles which a Uop is dispatched on port 4. +.It Li UOPS_DISPATCHED_PORT.PORT_5 +.Pq Event A1H , Umask 80H +Cycles which a Uop is dispatched on port 5. +.It Li RESOURCE_STALLS.ANY +.Pq Event A2H , Umask 01H +Cycles Allocation is stalled due to Resource Related +reason. +.It Li RESOURCE_STALLS.LB +.Pq Event A2H , Umask 01H +Counts the cycles of stall due to lack of load buffers. +.It Li RESOURCE_STALLS.RS +.Pq Event A2H , Umask 04H +Cycles stalled due to no eligible RS entry available. +.It Li RESOURCE_STALLS.SB +.Pq Event A2H , Umask 08H +Cycles stalled due to no store buffers available. (not +including draining form sync). +.It Li RESOURCE_STALLS.ROB +.Pq Event A2H , Umask 10H +Cycles stalled due to re-order buffer full. +.It Li RESOURCE_STALLS.FCSW +.Pq Event A2H , Umask 20H +Cycles stalled due to writing the FPU control word. +.It Li RESOURCE_STALLS.MXCSR +.Pq Event A2H , Umask 40H +Cycles stalled due to the MXCSR register rename +occurring to close to a previous MXCSR rename. +.It Li RESOURCE_STALLS.OTHER +.Pq Event A2H , Umask 80H +Cycles stalled while execution was stalled due to +other resource issues. +.It Li CYCLE_ACTIVITY.CYCLES_L2_PENDING +.Pq Event A3H , Umask 01H +Cycles with pending L2 miss loads. Set AnyThread +to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_L1D_PENDING +.Pq Event A3H , Umask 02H +Cycles with pending L1 cache miss loads.Set +AnyThread to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_NO_DISPATCH +.Pq Event A3H , Umask 04H +Cycles of dispatch stalls. Set AnyThread to count per +core. +.It Li DSB2MITE_SWITCHES.COUNT +.Pq Event ABH , Umask 01H +Number of DSB to MITE switches. +.It Li DSB2MITE_SWITCHES.PENALTY_CYCLES +.Pq Event ABH , Umask 02H +Cycles DSB to MITE switches caused delay. +.It Li DSB_FILL.OTHER_CANCEL +.Pq Event ACH , Umask 02H +Cases of cancelling valid DSB fill not because of +exceeding way limit. +.It Li DSB_FILL.EXCEED_DSB_LINES +.Pq Event ACH , Umask 08H +DSB Fill encountered > 3 DSB lines. +.It Li DSB_FILL.ALL_CANCEL +.Pq Event ACH , Umask 0AH +Cases of cancelling valid Decode Stream Buffer +(DSB) fill not because of exceeding way limit. +.It Li ITLB.ITLB_FLUSH +.Pq Event AEH , Umask 01H +Counts the number of ITLB flushes, includes +4k/2M/4M pages. +.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD +.Pq Event B0H , Umask 01H +Demand data read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H , Umask 04H +Demand RFO read requests sent to uncore, including +regular RFOs, locks, ItoM. +.It Li OFFCORE_REQUESTS.ALL_DATA_RD +.Pq Event B0H , Umask 08H +Data read requests sent to uncore (demand and +prefetch). +.It Li UOPS_DISPATCHED.THREAD +.Pq Event B1H , Umask 01H +Counts total number of uops to be dispatched per- +thread each cycle. Set Cmask = 1, INV =1 to count +stall cycles. +.It Li UOPS_DISPATCHED.CORE +.Pq Event B1H , Umask 02H +Counts total number of uops to be dispatched per- +core each cycle. +.It Li OFFCORE_REQUESTS_BUFFER.SQ_FULL +.Pq Event B2H , Umask 01H +Offcore requests buffer cannot take more entries +for this thread core. +.It Li AGU_BYPASS_CANCEL.COUNT +.Pq Event B6H , Umask 01H +Counts executed load operations with all the +following traits: 1. addressing of the format [base + +offset], 2. the offset is between 1 and 2047, 3. the +address specified in the base register is in one page +and the address [base+offset] is in another page. +.It Li OFF_CORE_RESPONSE_0 +.Pq Event B7H , Umask 01H +(Event B7H, Umask 01H) Off-core Response Performance +Monitoring; PMC0 only. Requires programming MSR 01A6H +.It Li OFF_CORE_RESPONSE_1 +.Pq Event BBH , Umask 01H +(Event BBH, Umask 01H) Off-core Response Performance +Monitoring; PMC3 only. Requires programming MSR 01A7H +.It Li TLB_FLUSH.DTLB_THREAD +.Pq Event BDH , Umask 01H +DTLB flush attempts of the thread-specific entries. +.It Li TLB_FLUSH.STLB_ANY +.Pq Event BDH , Umask 20H +Count number of STLB flush attempts. +.It Li L1D_BLOCKS.BANK_CONFLICT_CYCLES +.Pq Event BFH , Umask 05H +Cycles when dispatched loads are cancelled due to +L1D bank conflicts with other load ports. +.It Li INST_RETIRED.ANY_P +.Pq Event C0H , Umask 00H +Number of instructions at retirement. +.It Li INST_RETIRED.ALL +.Pq Event C0H , Umask 01H +Precise instruction retired event with HW to reduce +effect of PEBS shadow in IP distribution. +.It Li OTHER_ASSISTS.ITLB_MISS_RETIRED +.Pq Event C1H , Umask 02H +Instructions that experienced an ITLB miss. +.It Li OTHER_ASSISTS.AVX_STORE +.Pq Event C1H , Umask 08H +Number of assists associated with 256-bit AVX +store operations. +.It Li OTHER_ASSISTS.AVX_TO_SSE +.Pq Event C1H , Umask 10H +Number of transitions from AVX-256 to legacy SSE +when penalty applicable. +.It Li OTHER_ASSISTS.SSE_TO_AVX +.Pq Event C1H , Umask 20H +Number of transitions from SSE to AVX-256 when +penalty applicable. +.It Li UOPS_RETIRED.ALL +.Pq Event C2H , Umask 01H +Counts the number of micro-ops retired, Use +cmask=1 and invert to count active cycles or stalled +cycles. +.It Li UOPS_RETIRED.RETIRE_SLOTS +.Pq Event C2H , Umask 02H +Counts the number of retirement slots used each +cycle. +.It Li MACHINE_CLEARS.MEMORY_ORDERING +.Pq Event C3H , Umask 02H +Counts the number of machine clears due to +memory order conflicts. +.It Li MACHINE_CLEARS.SMC +.Pq Event C3H , Umask 04H +Counts the number of times that a program writes +to a code section. +.It Li MACHINE_CLEARS.MASKMOV +.Pq Event C3H , Umask 20H +Counts the number of executed AVX masked load +operations that refer to an illegal address range +with the mask bits set to 0. +.It Li BR_INST_RETIRED.ALL_BRANCH +.Pq Event C4H , Umask 00H +Branch instructions at retirement. +.It Li BR_INST_RETIRED.CONDITIONAL +.Pq Event C4H , Umask 01H +Counts the number of conditional branch +instructions retired. +.It Li BR_INST_RETIRED.NEAR_CALL +.Pq Event C4H , Umask 02H +Direct and indirect near call instructions retired. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 04H +Counts the number of branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_RETURN +.Pq Event C4H , Umask 08H +Counts the number of near return instructions +retired. +.It Li BR_INST_RETIRED.NOT_TAKEN +.Pq Event C4H , Umask 10H +Counts the number of not taken branch instructions +retired. +.It Li BR_INST_RETIRED.NEAR_TAKEN +.Pq Event C4H , Umask 20H +Number of near taken branches retired. +.It Li BR_INST_RETIRED.FAR_BRANCH +.Pq Event C4H , Umask 40H +Number of far branches retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 00H +Mispredicted branch instructions at retirement. +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 01H +Mispredicted conditional branch instructions retired. +.It Li BR_MISP_RETIRED.NEAR_CALL +.Pq Event C5H , Umask 02H +Direct and indirect mispredicted near call +instructions retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 04H +Mispredicted macro branch instructions retired. +.It Li BR_MISP_RETIRED.NOT_TAKEN +.Pq Event C5H , Umask 10H +Mispredicted not taken branch instructions retired. +.It Li BR_MISP_RETIRED.TAKEN +.Pq Event C5H , Umask 20H +Mispredicted taken branch instructions retired. +.It Li FP_ASSIST.X87_OUTPUT +.Pq Event CAH , Umask 02H +Number of X87 assists due to output value. +.It Li FP_ASSIST.X87_INPUT +.Pq Event CAH , Umask 04H +Number of X87 assists due to input value. +.It Li FP_ASSIST.SIMD_OUTPUT +.Pq Event CAH , Umask 08H + Number of SIMD FP assists due to output values. +.It Li FP_ASSIST.SIMD_INPUT +.Pq Event CAH , Umask 10H +Number of SIMD FP assists due to input values. +.It Li FP_ASSIST.ANY 1EH +.Pq Event CAH , Umask +Cycles with any input/output SSE* or FP assists. +.It Li ROB_MISC_EVENTS.LBR_INSERTS +.Pq Event CCH , Umask 20H +Count cases of saving new LBR records by +hardware. +.It Li MEM_TRANS_RETIRED.LOAD_LATENCY +.Pq Event CDH , Umask 01H +Sample loads with specified latency threshold. +PMC3 only. +.It Li MEM_TRANS_RETIRED.PRECISE_STORE +.Pq Event CDH , Umask 02H +Sample stores and collect precise store operation +via PEBS record. PMC3 only. +.It Li MEM_UOP_RETIRED.LOADS +.Pq Event D0H , Umask 10H +Qualify retired memory uops that are loads. +Combine with umask 10H, 20H, 40H, 80H. +.It Li MEM_UOP_RETIRED.STORES +.Pq Event D0H , Umask 02H +Qualify retired memory uops that are stores. +Combine with umask 10H, 20H, 40H, 80H. +.It Li MEM_UOP_RETIRED.STLB_MISS +.Pq Event D0H , Umask +Qualify retired memory uops with STLB miss. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.LOCK +.Pq Event D0H , Umask +Qualify retired memory uops with lock. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.SPLIT +.Pq Event D0H , Umask +Qualify retired memory uops with line split. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED_ALL +.Pq Event D0H , Umask +Qualify any retired memory uops. Must combine +with umask 01H, 02H, to produce counts. +.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT +.Pq Event D1H , Umask 01H +Retired load uops with L1 cache hits as data +sources. +.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT +.Pq Event D1H , Umask 02H +Retired load uops with L2 cache hits as data +sources. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT +.Pq Event D1H , Umask 04H +Retired load uops which data sources were data hits +in LLC without snoops required. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_MISS +.Pq Event D1H , Umask 20H +Retired load uops which data sources were data +missed LLC (excluding unknown data source). +.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB +.Pq Event D1H , Umask 40H +Retired load uops which data sources were load +uops missed L1 but hit FB due to preceding miss to +the same cache line with data not ready. +.It Li MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS +.Pq Event D4H , Umask 02H +Retired load uops with unknown information as data +source in cache serviced the load. +.It Li BACLEARS.ANY +.Pq Event E6H , Umask 01H +Counts the number of times the front end is re- +steered, mainly when the BPU cannot provide a +correct prediction and this is corrected by other +branch handling mechanisms at the front end. +.It Li L2_TRANS.DEMAND_DATA_RD +.Pq Event F0H , Umask 01H +Demand Data Read requests that access L2 cache. +.It Li L2_TRANS.RFO +.Pq Event F0H , Umask 02H +RFO requests that access L2 cache. +.It Li L2_TRANS.CODE_RD +.Pq Event F0H , Umask 04H +L2 cache accesses when fetching instructions. +.It Li L2_TRANS.ALL_PF +.Pq Event F0H , Umask 08H +L2 or LLC HW prefetches that access L2 cache. +.It Li L2_TRANS.L1D_WB +.Pq Event F0H , Umask 10H +L1D writebacks that access L2 cache. +.It Li L2_TRANS.L2_FILL +.Pq Event F0H , Umask 20H +L2 fill requests that access L2 cache. +.It Li L2_TRANS.L2_WB +.Pq Event F0H , Umask 40H +L2 writebacks that access L2 cache. +.It Li L2_TRANS.ALL_REQUESTS +.Pq Event F0H , Umask 80H +Transactions accessing L2 pipe. +.It Li L2_LINES_IN.I +.Pq Event F1H , Umask 01H +L2 cache lines in I state filling L2. +.It Li L2_LINES_IN.S +.Pq Event F1H , Umask 02H +L2 cache lines in S state filling L2. +.It Li L2_LINES_IN.E +.Pq Event F1H , Umask 04H +L2 cache lines in E state filling L2. +.It Li L2_LINES-IN.ALL +.Pq Event F1H , Umask 07H +L2 cache lines filling L2. +.It Li L2_LINES_OUT.DEMAND_CLEAN +.Pq Event F2H , Umask 01H +Clean L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.DEMAND_DIRTY +.Pq Event F2H , Umask 02H +Dirty L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.PF_CLEAN +.Pq Event F2H , Umask 04H +Clean L2 cache lines evicted by L2 prefetch. +.It Li L2_LINES_OUT.PF_DIRTY +.Pq Event F2H , Umask 08H +Dirty L2 cache lines evicted by L2 prefetch. +.It Li L2_LINES_OUT.DIRTY_ALL +.Pq Event F2H , Umask 0AH +Dirty L2 cache lines filling the L2. +.It Li SQ_MISC.SPLIT_LOCK +.Pq Event F4H , Umask 10H +Split locks in SQ. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.iaf 3 , +.Xr pmc.ucf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.ivybridge 3 , +.Xr pmc.ivybridgexeon 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Sandy Bridge Xeon +microarchitecture was written by +.An "Hiren Panchasara" +.Aq hiren.panchasara at gmail.com . Property changes on: trunk/lib/libpmc/pmc.sandybridgexeon.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Modified: trunk/lib/libpmc/pmc.soft.3 =================================================================== --- trunk/lib/libpmc/pmc.soft.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.soft.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,9 +21,9 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.soft.3 250600 2013-05-13 15:18:36Z fabient $ .\" -.Dd March 28, 2012 +.Dd February 26, 2013 .Os .Dt PMC.SOFT 3 .Sh NAME @@ -61,6 +61,8 @@ Hard clock ticks. .It Li CLOCK.STAT Stat clock ticks. +.It Li CLOCK.PROF +Profiling clock ticks. .It Li LOCK.FAILED Lock acquisition failed. .It Li PAGE_FAULT.ALL Modified: trunk/lib/libpmc/pmc.tsc.3 =================================================================== --- trunk/lib/libpmc/pmc.tsc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.tsc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.tsc.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.TSC 3 Modified: trunk/lib/libpmc/pmc.ucf.3 =================================================================== --- trunk/lib/libpmc/pmc.ucf.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.ucf.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.ucf.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd March 30, 2010 .Dt PMC.UCF 3 Modified: trunk/lib/libpmc/pmc.westmere.3 =================================================================== --- trunk/lib/libpmc/pmc.westmere.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.westmere.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.westmere.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd February 25, 2012 .Dt PMC.WESTMERE 3 Modified: trunk/lib/libpmc/pmc.westmereuc.3 =================================================================== --- trunk/lib/libpmc/pmc.westmereuc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.westmereuc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.westmereuc.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd March 24, 2010 .Dt PMC.WESTMEREUC 3 Modified: trunk/lib/libpmc/pmc_allocate.3 =================================================================== --- trunk/lib/libpmc/pmc_allocate.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_allocate.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_allocate.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd September 22, 2008 .Dt PMC_ALLOCATE 3 Modified: trunk/lib/libpmc/pmc_attach.3 =================================================================== --- trunk/lib/libpmc/pmc_attach.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_attach.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_attach.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_ATTACH 3 Modified: trunk/lib/libpmc/pmc_capabilities.3 =================================================================== --- trunk/lib/libpmc/pmc_capabilities.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_capabilities.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_capabilities.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd September 22, 2008 .Dt PMC_CAPABILITIES 3 Modified: trunk/lib/libpmc/pmc_configure_logfile.3 =================================================================== --- trunk/lib/libpmc/pmc_configure_logfile.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_configure_logfile.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_configure_logfile.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 24, 2007 .Dt PMC_CONFIGURE_LOGFILE 3 Modified: trunk/lib/libpmc/pmc_disable.3 =================================================================== --- trunk/lib/libpmc/pmc_disable.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_disable.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_disable.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd September 22, 2008 .Dt PMC_ENABLE 3 Modified: trunk/lib/libpmc/pmc_event_names_of_class.3 =================================================================== --- trunk/lib/libpmc/pmc_event_names_of_class.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_event_names_of_class.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_event_names_of_class.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 23, 2007 .Dt PMC_EVENT_NAMES_OF_CLASS 3 Modified: trunk/lib/libpmc/pmc_get_driver_stats.3 =================================================================== --- trunk/lib/libpmc/pmc_get_driver_stats.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_get_driver_stats.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_get_driver_stats.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_GET_DRIVER_STATS 3 Modified: trunk/lib/libpmc/pmc_get_msr.3 =================================================================== --- trunk/lib/libpmc/pmc_get_msr.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_get_msr.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_get_msr.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_GET_MSR 3 Modified: trunk/lib/libpmc/pmc_init.3 =================================================================== --- trunk/lib/libpmc/pmc_init.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_init.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_init.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 24, 2007 .Dt PMC_INIT 3 Modified: trunk/lib/libpmc/pmc_name_of_capability.3 =================================================================== --- trunk/lib/libpmc/pmc_name_of_capability.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_name_of_capability.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_name_of_capability.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 24, 2007 .Dt PMC_NAME_OF_CAPABILITY 3 Modified: trunk/lib/libpmc/pmc_read.3 =================================================================== --- trunk/lib/libpmc/pmc_read.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_read.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_read.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_READ 3 Modified: trunk/lib/libpmc/pmc_set.3 =================================================================== --- trunk/lib/libpmc/pmc_set.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_set.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_set.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_SET 3 Modified: trunk/lib/libpmc/pmc_start.3 =================================================================== --- trunk/lib/libpmc/pmc_start.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_start.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_start.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd September 22, 2008 .Dt PMC_START 3 Modified: trunk/lib/libpmc/pmclog.3 =================================================================== --- trunk/lib/libpmc/pmclog.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmclog.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmclog.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd March 26, 2006 .Dt PMCLOG 3 Modified: trunk/lib/libpmc/pmclog.c =================================================================== --- trunk/lib/libpmc/pmclog.c 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmclog.c 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005-2007 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/lib/libpmc/pmclog.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/lib/libpmc/pmclog.h =================================================================== --- trunk/lib/libpmc/pmclog.h 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmclog.h 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005-2007 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -27,7 +28,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/lib/libpmc/pmclog.h 236238 2012-05-29 14:50:21Z fabient $ */ #ifndef _PMCLOG_H_ From laffer1 at midnightbsd.org Thu May 26 23:42:18 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:42:18 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7581] trunk/UPDATING: document hwpmc changes Message-ID: <201605270342.u4R3gIb3046782@stargazer.midnightbsd.org> Revision: 7581 http://svnweb.midnightbsd.org/src/?rev=7581 Author: laffer1 Date: 2016-05-26 23:42:17 -0400 (Thu, 26 May 2016) Log Message: ----------- document hwpmc changes Modified Paths: -------------- trunk/UPDATING Modified: trunk/UPDATING =================================================================== --- trunk/UPDATING 2016-05-27 03:40:40 UTC (rev 7580) +++ trunk/UPDATING 2016-05-27 03:42:17 UTC (rev 7581) @@ -1,5 +1,10 @@ Updating Information for MidnightBSD users. +20160526: + Add support for Ivybridge and Haswell Intel CPUs to hwpmc(4). + + Fix libpmc(3) build with clang compiler. + 20160519: Kernel Security updates From laffer1 at midnightbsd.org Thu May 26 23:45:41 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:45:41 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21464] trunk/graphics/ImageMagick7: add ImageMagick7 Message-ID: <201605270345.u4R3jfOm047368@stargazer.midnightbsd.org> Revision: 21464 http://svnweb.midnightbsd.org/mports/?rev=21464 Author: laffer1 Date: 2016-05-26 23:45:40 -0400 (Thu, 26 May 2016) Log Message: ----------- add ImageMagick7 Added Paths: ----------- trunk/graphics/ImageMagick7/ trunk/graphics/ImageMagick7/Makefile trunk/graphics/ImageMagick7/distinfo trunk/graphics/ImageMagick7/pkg-descr trunk/graphics/ImageMagick7/pkg-plist Added: trunk/graphics/ImageMagick7/Makefile =================================================================== --- trunk/graphics/ImageMagick7/Makefile (rev 0) +++ trunk/graphics/ImageMagick7/Makefile 2016-05-27 03:45:40 UTC (rev 21464) @@ -0,0 +1,443 @@ +# $MidnightBSD$ +# $FreeBSD: head/graphics/ImageMagick7/Makefile 409613 2016-02-26 15:33:49Z kwm $ + +PORTNAME= ImageMagick +DISTVERSION= 7.0.0-0~beta${DATE} +PORTREVISION= 0 +CATEGORIES= graphics perl5 +MASTER_SITES= http://www.imagemagick.org/download/ \ + http://www.imagemagick.org/download/beta/ \ + FREEBSD_LOCAL/kwm \ + http://www.imagemagick.org/download/legacy/ \ + http://servingzone.com/mirrors/ImageMagick/ \ + http://mirror.checkdomain.de/imagemagick/ \ + http://image_magick.veidrodis.com/image_magick/ \ + http://imagemagick.spd.co.il/ \ + http://www.champground.com/imagemagick/ \ + http://ftp.surfnet.nl/pub/ImageMagick/ \ + http://mirror.searchdaimon.com/ImageMagick/ \ + http://mirror.is.co.za/pub/imagemagick/ \ + http://imagemagick.mirrorcatalogs.com/ \ + ftp://ftp.imagemagick.org/pub/ImageMagick/ \ + ftp://mirror.aarnet.edu.au/pub/imagemagick/ \ + ftp://mirror.checkdomain.de/imagemagick/ \ + ftp://ftp.kddlabs.co.jp/graphics/ImageMagick/ \ + ftp://ftp.u-aizu.ac.jp/pub/graphics/image/ImageMagick/imagemagick.org/ \ + ftp://ftp.nluug.nl/pub/ImageMagick/ \ + ftp://mirror.searchdaimon.com/ImageMagick/ \ + ftp://sunsite.icm.edu.pl/packages/ImageMagick/ \ + ftp://ftp.tpnet.pl/pub/graphics/ImageMagick/ \ + ftp://ftp.sunet.se/pub/multimedia/graphics/ImageMagick/ \ + ftp://ftp.is.co.za/pub/imagemagick/ \ + ftp://ftp.fifi.org/pub/ImageMagick/ +PKGNAMESUFFIX= 7 + +MAINTAINER= ports at MidnightBSD.org +COMMENT= Image processing tools (unstable version) + +LICENSE= apache2 +LICENSE_FILE= ${WRKSRC}/LICENSE + +DATE= 20160225 +WRKSRC= ${WRKDIR}/${PORTNAME}-7.0.0-0 + +LIB_DEPENDS= libltdl.so:${PORTSDIR}/devel/libltdl + +CONFLICTS_INSTALL= execline-[0-9]* # bin/import + +# This port uses .la files, keep libtool:keepla! (magick/module.c) +USES= cpe gmake libtool:keepla pathfix perl5 pkgconfig:both shebangfix tar:xz +CPE_PRODUCT= imagemagick +CPE_VENDOR= imagemagick +SHEBANG_FILES= www/source/examples.pl +GNU_CONFIGURE= yes +CONFIGURE_ENV= MAKE=${MAKE_CMD} +CONFIGURE_ARGS= --without-dps +USE_LDCONFIG= yes +USE_GNOME= libxml2 + +# make sure LOCALBASE is placed at the end of the compiler lookup so the configure +# script can find openjpeg2 headers before the openjpeg15 headers +CPPFLAGS+= -isystem${LOCALBASE}/include +LDFLAGS+= -Wl,-Y${LOCALBASE}/lib + +SAMPLE_FILES= coder.xml colors.xml delegates.xml log.xml magic.xml mime.xml \ + policy.xml quantization-table.xml thresholds.xml type-dejavu.xml \ + type-ghostscript.xml type-windows.xml type.xml + +#PLIST_SUB= PORTVERSION=${PORTVERSION:R} +PLIST_SUB+= PORTVERSION=${PORTVERSION:R:R} SITE_ARCH=${SITE_ARCH_REL} \ + PERL5_MAN3=man/man3 + +OPTIONS_DEFINE= BZIP2 DOCS DJVU FFTW FONTCONFIG FPX FREETYPE \ + GRAPHVIZ GSLIB JPEG2000 JBIG JPEG LCMS2 LZMA LQR MODULES \ + OPENEXR OPENMP PANGO PDF PERL PNG SVG TESTS TIFF WEBP WMF \ + THREADS X11 16BIT_PIXEL HDRI +OPTIONS_DEFAULT= 16BIT_PIXEL BZIP2 FFTW FONTCONFIG FPX FREETYPE \ + JPEG2000 JBIG JPEG LCMS2 LZMA LQR MODULES PDF PERL PNG SVG \ + TIFF WEBP WMF THREADS X11 HDRI + +16BIT_PIXEL_DESC= 16bit pixel support +JPEG2000_DESC= OpenJPEG 2000 support via openjpeg +DJVU_DESC= DJVU format support (needs THREADS) +GSLIB_DESC= libgs (Postscript SHLIB) support +HDRI_DESC= High dynamic range images support +MODULES_DESC= Modules support +SVG_DESC= SVG vector image format support (via librsvg) +TESTS_DESC= Run bundled self-tests after build +#SIMD_CONFIGURE_WITH= gcc-arch +CONFIGURE_ARGS+= --without-gcc-arch + +.include + +.if ${PORT_OPTIONS:MHDRI} +CONFIGURE_ARGS+= --enable-hdri +_HDRI=HDRI +.else +CONFIGURE_ARGS+= --disable-hdri +_HDRI="" +.endif +PLIST_SUB+= HDRI=${_HDRI} + +.if ${PORT_OPTIONS:MTHREADS} +_IMAGEMAGICK_THREADS=yes +_IMAGEMAGICK_THREADS_MSG=with threads +. if exists(${PERL}) +PERL_THREADED!= ${SH} -c 'case `perl --version` in *freebsd-thread*) ${ECHO_CMD} yes ;; esac'; ${ECHO_CMD} +. else +# if ${PERL} doesn't exists, assume we dealing with threaded perl. +PERL_THREADED= yes +. endif +.else +_IMAGEMAGICK_THREADS=no +_IMAGEMAGICK_THREADS_MSG=without threads +_IMAGEMAGICK_THREADS_IGNORE_MSG=. Define WITH_THREADS +.endif + +.if ${PORT_OPTIONS:MPERL} +CONFIGURE_ARGS+= --with-perl=${PERL} \ + --with-perl-options="MAKE=${MAKE_CMD}" +PLIST_SUB+= WITH_PERL='' +# PerlMagick does not work with threads, if perl is not threaded, and vice versa +. if defined(PERL_THREADED) +_IMAGEMAGICK_THREADS_PERL_MSG=Perl is threaded +_IMAGEMAGICK_THREADS=yes +. else +_IMAGEMAGICK_THREADS_PERL_MSG=Perl is non-threaded +_IMAGEMAGICK_THREADS_IGNORE_MSG=. ${_IMAGEMAGICK_THREADS_PERL_MSG}. Reinstall Perl with threads or undefine WITH_IMAGEMAGICK_PERL +. if ${_IMAGEMAGICK_THREADS} == "yes" +IGNORE=${_IMAGEMAGICK_THREADS_IGNORE_MSG} or undefine WITH_THREADS +. endif +_IMAGEMAGICK_THREADS=no +. endif +.else +CONFIGURE_ARGS+= --without-perl +PLIST_SUB+= WITH_PERL='@comment ' +.endif + +.if ${_IMAGEMAGICK_THREADS} == "yes" +CONFIGURE_ARGS+= --with-threads +CONFIGURE_ENV+= PTHREAD_LIBS="-lpthread" +LDFLAGS+= -lpthread +.else +CONFIGURE_ARGS+= --without-threads +_IMAGEMAGICK_THREADS=no +.endif + +# OpenMP +.if ${PORT_OPTIONS:MOPENMP} +. if ${_IMAGEMAGICK_THREADS} == "no" +IGNORE=OpenMP requires threads${_IMAGEMAGICK_THREADS_IGNORE_MSG} +. else +CONFIGURE_ARGS+= --enable-openmp +USES+= compiler:openmp +. endif +.else +CONFIGURE_ARGS+= --disable-openmp +.endif + +.if ${PORT_OPTIONS:M16BIT_PIXEL} +_QBIT=Q16 +.else +# Faster, but poor quality +CONFIGURE_ARGS+= --with-quantum-depth=8 +_QBIT=Q8 +.endif +PLIST_SUB+= QBIT=${_QBIT} + +.if defined(WITH_WINDOWS_FONT_DIR) +CONFIGURE_ARGS+= --with-windows-font-dir=${WITH_WINDOWS_FONT_DIR} +.endif + +# Loadable coders, smaller executable, but PerlMagick not really works +# ('make test' there works) +.if ${PORT_OPTIONS:MMODULES} +CONFIGURE_ARGS+= --with-modules +PLIST_SUB+= MODULES='' +.else +CONFIGURE_ARGS+= --without-modules +PLIST_SUB+= MODULES='@comment ' +.endif + +.if ${PORT_OPTIONS:MOPENEXR} +. if ${_IMAGEMAGICK_THREADS} == "no" +IGNORE=OpenEXR requires threads. ${_IMAGEMAGICK_THREADS_IGNORE_MSG} +. else +LIB_DEPENDS+= libIlmImf.so:${PORTSDIR}/graphics/OpenEXR +PLIST_SUB+= OPENEXR="" +. endif +.else +CONFIGURE_ARGS+= --without-openexr +PLIST_SUB+= OPENEXR="@comment " +.endif + +.if ${PORT_OPTIONS:MDJVU} +. if ${_IMAGEMAGICK_THREADS} == "no" +IGNORE=DjVu requires threads${_IMAGEMAGICK_THREADS_IGNORE_MSG} +. endif +LIB_DEPENDS+= libdjvulibre.so:${PORTSDIR}/graphics/djvulibre +PLIST_SUB+= DJVU="" +.else +CONFIGURE_ARGS+= --without-djvu +PLIST_SUB+= DJVU="@comment " +.endif + +.if ${PORT_OPTIONS:MJPEG} +USES+= jpeg +PLIST_SUB+= JPEG="" +.else +CONFIGURE_ARGS+= --without-jpeg +PLIST_SUB+= JPEG="@comment " +.endif + +.if ${PORT_OPTIONS:MPNG} +LIB_DEPENDS+= libpng.so:${PORTSDIR}/graphics/png +PLIST_SUB+= PNG="" +.else +CONFIGURE_ARGS+= --without-png +PLIST_SUB+= PNG="@comment " +.endif + +.if ${PORT_OPTIONS:MTIFF} +LIB_DEPENDS+= libtiff.so:${PORTSDIR}/graphics/tiff +PLIST_SUB+= TIFF="" +.else +CONFIGURE_ARGS+= --without-tiff +PLIST_SUB+= TIFF="@comment " +.endif + +.if ${PORT_OPTIONS:MGSLIB} +CONFIGURE_ARGS+= --with-gslib +. if ${PORT_OPTIONS:MX11} +USES+= ghostscript:x11 +. else +USES+= ghostscript +. endif +.else +CONFIGURE_ARGS+= --without-gslib +.endif + +.if ${PORT_OPTIONS:MLQR} +CONFIGURE_ARGS+= --with-lqr +LIB_DEPENDS+= liblqr-1.so:${PORTSDIR}/graphics/liblqr-1 +.else +CONFIGURE_ARGS+= --without-lqr +.endif + +.if ${PORT_OPTIONS:MFFTW} +CONFIGURE_ARGS+= --with-fftw +LIB_DEPENDS+= libfftw3.so:${PORTSDIR}/math/fftw3 +.else +CONFIGURE_ARGS+= --without-fftw +.endif + +# Produce BZip compressed MIFF images +.if empty(PORT_OPTIONS:MBZIP2) +CONFIGURE_ARGS+= --without-bzlib +.endif + +# FPX (FlashPIX) images +.if ${PORT_OPTIONS:MFPX} +LIB_DEPENDS+= libfpx.so:${PORTSDIR}/graphics/libfpx +CONFIGURE_ARGS+= --with-fpx +PLIST_SUB+= FPX="" +.else +CONFIGURE_ARGS+= --without-fpx +PLIST_SUB+= FPX="@comment " +.endif + +# JBIG images (lossless compression for bi-level images) +.if ${PORT_OPTIONS:MJBIG} +LIB_DEPENDS+= libjbig.so:${PORTSDIR}/graphics/jbigkit +PLIST_SUB+= JBIG="" +.else +CONFIGURE_ARGS+= --without-jbig +PLIST_SUB+= JBIG="@comment " +.endif + +# JPEG2000 images (wavelet-based lossy compression) +.if ${PORT_OPTIONS:MJPEG2000} +LIB_DEPENDS+= libopenjp2.so:${PORTSDIR}/graphics/openjpeg +PLIST_SUB+= JPEG2000="" +.else +CONFIGURE_ARGS+= --without-openjp2 +PLIST_SUB+= JPEG2000="@comment " +.endif + +# GraphViz dot graphs +.if ${PORT_OPTIONS:MGRAPHVIZ} +LIB_DEPENDS+= libgvc.so:${PORTSDIR}/graphics/graphviz +CFLAGS+= -I${LOCALBASE}/include/graphviz +LDFLAGS+= -L${LOCALBASE}/lib/graphviz +.else +CONFIGURE_ARGS+= --without-gvc +.endif + +# LZMA support +# needs manula override for base system... +.if ! ${PORT_OPTIONS:MLZMA} +CONFIGURE_ARGS+= --without-lzma +.endif + +# LCMS (Little CMS) color management version 2 and 1 (mutually exclusive) +.if ${PORT_OPTIONS:MLCMS2} +LIB_DEPENDS+= liblcms2.so:${PORTSDIR}/graphics/lcms2 +.else +CONFIGURE_ARGS+= --without-lcms +.endif + +# Freetype (TrueType Font) support +.if ${PORT_OPTIONS:MFREETYPE} +LIB_DEPENDS+= libfreetype.so:${PORTSDIR}/print/freetype2 +CONFIGURE_ARGS+= --with-freetype +.else +CONFIGURE_ARGS+= --without-freetype +.endif + +# Webp support +.if ${PORT_OPTIONS:MWEBP} +LIB_DEPENDS+= libwebp.so:${PORTSDIR}/graphics/webp +CONFIGURE_ARGS+= --with-webp +PLIST_SUB+= WEBP="" +.else +CONFIGURE_ARGS+= --without-webp +PLIST_SUB+= WEBP="@comment " +.endif + +# Fontconfig support +.if ${PORT_OPTIONS:MFONTCONFIG} +LIB_DEPENDS+= libfontconfig.so:${PORTSDIR}/x11-fonts/fontconfig +CONFIGURE_ARGS+= --with-fontconfig +.else +CONFIGURE_ARGS+= --without-fontconfig +.endif + +# WMF (Windows Meta File) images +.if ${PORT_OPTIONS:MWMF} +. if ${PORT_OPTIONS:MX11} +LIB_DEPENDS+= libwmf.so:${PORTSDIR}/graphics/libwmf +. else +LIB_DEPENDS+= libwmf.so:${PORTSDIR}/graphics/libwmf-nox11 +. endif +CONFIGURE_ARGS+= --with-wmf=yes +PLIST_SUB+= WMF="" +.else +CONFIGURE_ARGS+= --without-wmf +PLIST_SUB+= WMF="@comment " +.endif + +# SVG (Scalable Vector Graphics) requires both libxml2 and X11 +.if ${PORT_OPTIONS:MSVG} && ${PORT_OPTIONS:MX11} +LIB_DEPENDS+= librsvg-2.so:${PORTSDIR}/graphics/librsvg2 +CONFIGURE_ARGS+= --with-rsvg +.else +CONFIGURE_ARGS+= --without-rsvg +.endif + +# Pango support +.if ${PORT_OPTIONS:MPANGO} && ${PORT_OPTIONS:MX11} +USE_GNOME+= pango +PLIST_SUB+= PANGO="" +.else +CONFIGURE_ARGS+= --without-pango +PLIST_SUB+= PANGO="@comment " +.endif + +# PDF (Adobe Portable Document Format) support +.if ${PORT_OPTIONS:MPDF} +. if ${PORT_OPTIONS:MX11} +USES+= ghostscript:x11 +. else +USES+= ghostscript +. endif +.endif + +.if ! ${PORT_OPTIONS:MX11} +CONFIGURE_ARGS+= --without-x +CONFLICTS+= ImageMagick7-* +PLIST_SUB+= X11='@comment ' +PKGNAMESUFFIX= 7-nox11 +.else +CONFLICTS+= ImageMagick7-nox11-* +CONFLICTS+= display-[0-9]* +CONFIGURE_ARGS+= --with-x +USE_XORG= xext xt +PLIST_SUB+= X11='' +.endif + +.if ${PORT_OPTIONS:MDOCS} +INSTALL_TARGET= install-strip install-docDATA install-data-html +.else +INSTALL_TARGET= install-strip +.endif + +.if ${PORT_OPTIONS:MTESTS} +. if ${PORT_OPTIONS:MX11} +USES+= ghostscript:x11,build +. else +USES+= ghostscript:build +. endif +.endif + +.if defined(USER) && ${USER} == kwm +upload: + scp ${DISTDIR}/${DISTNAME}.tar.xz \ + kwm at freefall.freebsd.org:public_distfiles/ +.endif + +post-patch: +# strip library name of variable parts that can change due to +# the HDRI and Q16 option + @${REINPLACE_CMD} -e 's|_ at MAGICK_ABI_SUFFIX@||g; \ + s|\. at MAGICK_ABI_SUFFIX@||g' \ + ${WRKSRC}/Makefile.in + @${REINPLACE_CMD} -e 's|@\. at MAGICK_ABI_SUFFIX@|@|g' \ + ${WRKSRC}/PerlMagick/Makefile.PL.in \ + ${WRKSRC}/PerlMagick/quantum/Makefile.PL.in \ + ${WRKSRC}/Magick++/lib/Magick++.pc.in \ + ${WRKSRC}/MagickCore/MagickCore.pc.in \ + ${WRKSRC}/MagickWand/MagickWand.pc.in + +pre-configure: +.if defined(_IMAGEMAGICK_THREADS_PERL_MSG) + @${ECHO_CMD} '###################################################################' + @${ECHO_CMD} NOTICE: ${_IMAGEMAGICK_THREADS_PERL_MSG}. Building ImageMagick ${_IMAGEMAGICK_THREADS_MSG}. + @${ECHO_CMD} '###################################################################' +.endif + +.if ${PORT_OPTIONS:MSVG} && ! ${PORT_OPTIONS:MX11} + @${ECHO_CMD} NOTICE: SVG format support disabled, requires X11 +.endif + +post-install: +.for i in ${SAMPLE_FILES} + @${MV} ${STAGEDIR}${PREFIX}/etc/ImageMagick-7/${i} \ + ${STAGEDIR}${PREFIX}/etc/ImageMagick-7/${i}.sample +.endfor + +post-install-TESTS-on: test + +do-test: + -cd ${WRKSRC} && ${SETENV} ${MAKE_ENV} limits -m 20m ${MAKE} ${_MAKE_JOBS} check + +.include Property changes on: trunk/graphics/ImageMagick7/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/graphics/ImageMagick7/distinfo =================================================================== --- trunk/graphics/ImageMagick7/distinfo (rev 0) +++ trunk/graphics/ImageMagick7/distinfo 2016-05-27 03:45:40 UTC (rev 21464) @@ -0,0 +1,2 @@ +SHA256 (ImageMagick-7.0.0-0~beta20160225.tar.xz) = 35f9ed811415633ab4ed6fa4dd6ada625421e87d38dae98e5afc7d30e2a5e5c6 +SIZE (ImageMagick-7.0.0-0~beta20160225.tar.xz) = 8292428 Property changes on: trunk/graphics/ImageMagick7/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/graphics/ImageMagick7/pkg-descr =================================================================== --- trunk/graphics/ImageMagick7/pkg-descr (rev 0) +++ trunk/graphics/ImageMagick7/pkg-descr 2016-05-27 03:45:40 UTC (rev 21464) @@ -0,0 +1,19 @@ + +*** This is a UNSTABLE development snapshot. API/ABI breakage guaranteed *** + +*** This port is a best efford and updates might be irregular *** + +ImageMagick is a package for display and interactive manipulation of +images. The package includes tools for image conversion, annotation, +compositing, animation, and creating montages. ImageMagick can read and +write many of the more popular image formats (e.g. JPEG, TIFF, PNM, XPM, +Photo CD, etc.). + +The package can be built _without_ the GUI (X11) support at all -- it +will not have the display, import, and animate functionality, but remain +extremely useful for image manipulation. + +The optional "display" utility conflicts with the utility of the +same name from the misc/display port/package. + +WWW: http://www.ImageMagick.org/ Property changes on: trunk/graphics/ImageMagick7/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/graphics/ImageMagick7/pkg-plist =================================================================== --- trunk/graphics/ImageMagick7/pkg-plist (rev 0) +++ trunk/graphics/ImageMagick7/pkg-plist 2016-05-27 03:45:40 UTC (rev 21464) @@ -0,0 +1,1538 @@ +bin/Magick++-config +bin/MagickCore-config +bin/MagickWand-config +bin/animate +bin/compare +bin/composite +bin/conjure +bin/convert +bin/display +bin/identify +bin/import +bin/magick +bin/magick-script +bin/mogrify +bin/montage +bin/stream + at sample etc/ImageMagick-7/coder.xml.sample + at sample etc/ImageMagick-7/colors.xml.sample + at sample etc/ImageMagick-7/delegates.xml.sample + at sample etc/ImageMagick-7/log.xml.sample + at sample etc/ImageMagick-7/magic.xml.sample + at sample etc/ImageMagick-7/mime.xml.sample + at sample etc/ImageMagick-7/policy.xml.sample + at sample etc/ImageMagick-7/quantization-table.xml.sample + at sample etc/ImageMagick-7/thresholds.xml.sample + at sample etc/ImageMagick-7/type-dejavu.xml.sample + at sample etc/ImageMagick-7/type-ghostscript.xml.sample + at sample etc/ImageMagick-7/type-windows.xml.sample + at sample etc/ImageMagick-7/type.xml.sample +include/ImageMagick-7/Magick++.h +include/ImageMagick-7/Magick++/Blob.h +include/ImageMagick-7/Magick++/CoderInfo.h +include/ImageMagick-7/Magick++/Color.h +include/ImageMagick-7/Magick++/Drawable.h +include/ImageMagick-7/Magick++/Exception.h +include/ImageMagick-7/Magick++/Functions.h +include/ImageMagick-7/Magick++/Geometry.h +include/ImageMagick-7/Magick++/Image.h +include/ImageMagick-7/Magick++/Include.h +include/ImageMagick-7/Magick++/Montage.h +include/ImageMagick-7/Magick++/Pixels.h +include/ImageMagick-7/Magick++/ResourceLimits.h +include/ImageMagick-7/Magick++/STL.h +include/ImageMagick-7/Magick++/Statistic.h +include/ImageMagick-7/Magick++/TypeMetric.h +include/ImageMagick-7/MagickCore/MagickCore.h +include/ImageMagick-7/MagickCore/accelerate.h +include/ImageMagick-7/MagickCore/animate.h +include/ImageMagick-7/MagickCore/annotate.h +include/ImageMagick-7/MagickCore/artifact.h +include/ImageMagick-7/MagickCore/attribute.h +include/ImageMagick-7/MagickCore/blob.h +include/ImageMagick-7/MagickCore/cache-view.h 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+%%PORTDOCS%%%%DOCSDIR%%-7/www/api/drawing-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/drawing-wand.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/effect.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/effect.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/enhance.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/enhance.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/exception.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/exception.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/feature.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/feature.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/fourier.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/fourier.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/fx.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/fx.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/histogram.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/histogram.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/image-view.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/image-view.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/image.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/image.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/layer.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/layer.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/list.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/list.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick++-classes.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-deprecate.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-deprecate.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-image.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-image.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-property.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-property.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-wand.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/memory.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/memory.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/mime.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/mime.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/module.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/module.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/mogrify.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/mogrify.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/monitor.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/monitor.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/montage.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/montage.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/morphology.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/morphology.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/paint.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/paint.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/pixel-iterator.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/pixel-iterator.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/pixel-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/pixel-wand.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/profile.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/profile.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/property.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/property.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/quantize.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/quantize.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/registry.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/registry.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/resize.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/resize.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/resource.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/resource.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/segment.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/segment.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/shear.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/shear.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/signature.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/signature.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/statistic.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/statistic.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/stream.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/stream.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/transform.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/transform.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/version.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/version.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/wand-view.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/wand-view.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/architecture.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/binary-releases.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/changelog.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/cipher.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/color-management.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/color.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/command-line-options.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/command-line-processing.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/command-line-tools.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/compare.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/compose.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/composite.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/conjure.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/connected-components.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/contact.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/convert.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/css/README.txt +%%PORTDOCS%%%%DOCSDIR%%-7/www/css/magick.css +%%PORTDOCS%%%%DOCSDIR%%-7/www/display.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/distribute-pixel-cache.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/download.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/escape.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/examples.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/exception.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/export.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/favicon.ico +%%PORTDOCS%%%%DOCSDIR%%-7/www/formats.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/fx.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/gradient.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/high-dynamic-range.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/history.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/identify.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/import.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/index.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/install-source.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/jp2.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/js/README.txt +%%PORTDOCS%%%%DOCSDIR%%-7/www/js/magick.js +%%PORTDOCS%%%%DOCSDIR%%-7/www/license.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/links.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick++.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick-core.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick-vector-graphics.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/miff.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/mogrify.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/montage.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/motion-picture.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/opencl.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/openmp.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/perl-magick.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/porting.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/quantize.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/resources.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/search.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/sitemap.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/analyze.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/coder.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/colors.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/configure.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/contrast.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/core.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/delegates.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/english.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/examples.pl +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/francais.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/incantation.msl +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/locale.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/log.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/magic.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/mgk.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/mime.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/piechart.mvg +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/piechart.svg +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/policy.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/thresholds.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/type-ghostscript.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/type-windows.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/type.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/wand.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/sponsors.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/stream.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/support.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/wand.png +%%PORTDOCS%%%%DOCSDIR%%-7/www/webp.html Property changes on: trunk/graphics/ImageMagick7/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:45:49 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:45:49 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21465] trunk/graphics/Makefile: add ImageMagick7 Message-ID: <201605270345.u4R3jnsG047440@stargazer.midnightbsd.org> Revision: 21465 http://svnweb.midnightbsd.org/mports/?rev=21465 Author: laffer1 Date: 2016-05-26 23:45:49 -0400 (Thu, 26 May 2016) Log Message: ----------- add ImageMagick7 Modified Paths: -------------- trunk/graphics/Makefile Modified: trunk/graphics/Makefile =================================================================== --- trunk/graphics/Makefile 2016-05-27 03:45:40 UTC (rev 21464) +++ trunk/graphics/Makefile 2016-05-27 03:45:49 UTC (rev 21465) @@ -5,6 +5,7 @@ SUBDIR += GraphicsMagick SUBDIR += Hermes SUBDIR += ImageMagick +SUBDIR += ImageMagick7 SUBDIR += OpenEXR SUBDIR += aalib SUBDIR += agg From laffer1 at midnightbsd.org Fri May 27 00:17:36 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 00:17:36 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21466] trunk/graphics/ImageMagick7: update image magic 7 to a release version Message-ID: <201605270417.u4R4HatB050597@stargazer.midnightbsd.org> Revision: 21466 http://svnweb.midnightbsd.org/mports/?rev=21466 Author: laffer1 Date: 2016-05-27 00:17:35 -0400 (Fri, 27 May 2016) Log Message: ----------- update image magic 7 to a release version Modified Paths: -------------- trunk/graphics/ImageMagick7/Makefile trunk/graphics/ImageMagick7/distinfo trunk/graphics/ImageMagick7/pkg-descr trunk/graphics/ImageMagick7/pkg-plist Added Paths: ----------- trunk/graphics/ImageMagick7/files/ trunk/graphics/ImageMagick7/files/patch-config_policy.xml Modified: trunk/graphics/ImageMagick7/Makefile =================================================================== --- trunk/graphics/ImageMagick7/Makefile 2016-05-27 03:45:49 UTC (rev 21465) +++ trunk/graphics/ImageMagick7/Makefile 2016-05-27 04:17:35 UTC (rev 21466) @@ -2,12 +2,9 @@ # $FreeBSD: head/graphics/ImageMagick7/Makefile 409613 2016-02-26 15:33:49Z kwm $ PORTNAME= ImageMagick -DISTVERSION= 7.0.0-0~beta${DATE} -PORTREVISION= 0 +DISTVERSION= 7.0.1-5 CATEGORIES= graphics perl5 MASTER_SITES= http://www.imagemagick.org/download/ \ - http://www.imagemagick.org/download/beta/ \ - FREEBSD_LOCAL/kwm \ http://www.imagemagick.org/download/legacy/ \ http://servingzone.com/mirrors/ImageMagick/ \ http://mirror.checkdomain.de/imagemagick/ \ @@ -38,15 +35,13 @@ LICENSE= apache2 LICENSE_FILE= ${WRKSRC}/LICENSE -DATE= 20160225 -WRKSRC= ${WRKDIR}/${PORTNAME}-7.0.0-0 - LIB_DEPENDS= libltdl.so:${PORTSDIR}/devel/libltdl CONFLICTS_INSTALL= execline-[0-9]* # bin/import # This port uses .la files, keep libtool:keepla! (magick/module.c) -USES= cpe gmake libtool:keepla pathfix perl5 pkgconfig:both shebangfix tar:xz +USES= cpe gmake libtool:keepla localbase pathfix perl5 \ + pkgconfig:both shebangfix tar:xz CPE_PRODUCT= imagemagick CPE_VENDOR= imagemagick SHEBANG_FILES= www/source/examples.pl @@ -56,17 +51,13 @@ USE_LDCONFIG= yes USE_GNOME= libxml2 -# make sure LOCALBASE is placed at the end of the compiler lookup so the configure -# script can find openjpeg2 headers before the openjpeg15 headers -CPPFLAGS+= -isystem${LOCALBASE}/include -LDFLAGS+= -Wl,-Y${LOCALBASE}/lib - SAMPLE_FILES= coder.xml colors.xml delegates.xml log.xml magic.xml mime.xml \ - policy.xml quantization-table.xml thresholds.xml type-dejavu.xml \ - type-ghostscript.xml type-windows.xml type.xml + policy.xml quantization-table.xml thresholds.xml \ + type-apple.xml type-dejavu.xml type-ghostscript.xml \ + type-windows.xml type.xml #PLIST_SUB= PORTVERSION=${PORTVERSION:R} -PLIST_SUB+= PORTVERSION=${PORTVERSION:R:R} SITE_ARCH=${SITE_ARCH_REL} \ +PLIST_SUB+= PORTVERSION=${PORTVERSION:R} SITE_ARCH=${SITE_ARCH_REL} \ PERL5_MAN3=man/man3 OPTIONS_DEFINE= BZIP2 DOCS DJVU FFTW FONTCONFIG FPX FREETYPE \ @@ -399,12 +390,6 @@ . endif .endif -.if defined(USER) && ${USER} == kwm -upload: - scp ${DISTDIR}/${DISTNAME}.tar.xz \ - kwm at freefall.freebsd.org:public_distfiles/ -.endif - post-patch: # strip library name of variable parts that can change due to # the HDRI and Q16 option Modified: trunk/graphics/ImageMagick7/distinfo =================================================================== --- trunk/graphics/ImageMagick7/distinfo 2016-05-27 03:45:49 UTC (rev 21465) +++ trunk/graphics/ImageMagick7/distinfo 2016-05-27 04:17:35 UTC (rev 21466) @@ -1,2 +1,3 @@ -SHA256 (ImageMagick-7.0.0-0~beta20160225.tar.xz) = 35f9ed811415633ab4ed6fa4dd6ada625421e87d38dae98e5afc7d30e2a5e5c6 -SIZE (ImageMagick-7.0.0-0~beta20160225.tar.xz) = 8292428 +TIMESTAMP = 1463648575 +SHA256 (ImageMagick-7.0.1-5.tar.xz) = 3a1820c11c81d77ec4a8cac5f24d8582cc2e63d00e40d6930892bd405e86d953 +SIZE (ImageMagick-7.0.1-5.tar.xz) = 8282756 Added: trunk/graphics/ImageMagick7/files/patch-config_policy.xml =================================================================== --- trunk/graphics/ImageMagick7/files/patch-config_policy.xml (rev 0) +++ trunk/graphics/ImageMagick7/files/patch-config_policy.xml 2016-05-27 04:17:35 UTC (rev 21466) @@ -0,0 +1,12 @@ +--- config/policy.xml.orig 2016-05-09 19:28:58.000000000 +0200 ++++ config/policy.xml 2016-05-10 17:44:26.720503000 +0200 +@@ -64,4 +64,9 @@ + + + ++ ++ ++ ++ ++ + Property changes on: trunk/graphics/ImageMagick7/files/patch-config_policy.xml ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Modified: trunk/graphics/ImageMagick7/pkg-descr =================================================================== --- trunk/graphics/ImageMagick7/pkg-descr 2016-05-27 03:45:49 UTC (rev 21465) +++ trunk/graphics/ImageMagick7/pkg-descr 2016-05-27 04:17:35 UTC (rev 21466) @@ -1,8 +1,3 @@ - -*** This is a UNSTABLE development snapshot. API/ABI breakage guaranteed *** - -*** This port is a best efford and updates might be irregular *** - ImageMagick is a package for display and interactive manipulation of images. The package includes tools for image conversion, annotation, compositing, animation, and creating montages. ImageMagick can read and Modified: trunk/graphics/ImageMagick7/pkg-plist =================================================================== --- trunk/graphics/ImageMagick7/pkg-plist 2016-05-27 03:45:49 UTC (rev 21465) +++ trunk/graphics/ImageMagick7/pkg-plist 2016-05-27 04:17:35 UTC (rev 21466) @@ -23,6 +23,7 @@ @sample etc/ImageMagick-7/policy.xml.sample @sample etc/ImageMagick-7/quantization-table.xml.sample @sample etc/ImageMagick-7/thresholds.xml.sample + at sample etc/ImageMagick-7/type-apple.xml.sample @sample etc/ImageMagick-7/type-dejavu.xml.sample @sample etc/ImageMagick-7/type-ghostscript.xml.sample @sample etc/ImageMagick-7/type-windows.xml.sample @@ -88,7 +89,6 @@ include/ImageMagick-7/MagickCore/list.h include/ImageMagick-7/MagickCore/locale_.h include/ImageMagick-7/MagickCore/log.h -include/ImageMagick-7/MagickCore/magic-private.h include/ImageMagick-7/MagickCore/magic.h include/ImageMagick-7/MagickCore/magick-baseconfig.h include/ImageMagick-7/MagickCore/magick-config.h @@ -163,7 +163,7 @@ include/ImageMagick-7/MagickWand/stream.h include/ImageMagick-7/MagickWand/wand-view.h include/ImageMagick-7/MagickWand/wandcli.h -lib/ImageMagick-%%PORTVERSION%%/config-%%QBIT%%%%HDRI%%/configure.xml +lib/ImageMagick-7.0.1/config-%%QBIT%%%%HDRI%%/configure.xml %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/aai.la %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/aai.so %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/art.la @@ -316,8 +316,6 @@ %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/pnm.so %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/pango.la %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/pango.so -%%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/preview.la -%%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/preview.so %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/ps.la %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/ps.so %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/ps2.la @@ -455,6 +453,7 @@ man/man1/display.1.gz man/man1/identify.1.gz man/man1/import.1.gz +man/man1/magick-script.1.gz man/man1/magick.1.gz man/man1/mogrify.1.gz man/man1/montage.1.gz @@ -1493,8 +1492,10 @@ %%PORTDOCS%%%%DOCSDIR%%-7/www/links.html %%PORTDOCS%%%%DOCSDIR%%-7/www/magick++.html %%PORTDOCS%%%%DOCSDIR%%-7/www/magick-core.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick-script.html %%PORTDOCS%%%%DOCSDIR%%-7/www/magick-vector-graphics.html %%PORTDOCS%%%%DOCSDIR%%-7/www/magick-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick.html %%PORTDOCS%%%%DOCSDIR%%-7/www/miff.html %%PORTDOCS%%%%DOCSDIR%%-7/www/mogrify.html %%PORTDOCS%%%%DOCSDIR%%-7/www/montage.html From laffer1 at midnightbsd.org Fri May 27 00:18:13 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 00:18:13 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21467] trunk/print/ghostscript9-base/Makefile: bump port revision Message-ID: <201605270418.u4R4ID4n050682@stargazer.midnightbsd.org> Revision: 21467 http://svnweb.midnightbsd.org/mports/?rev=21467 Author: laffer1 Date: 2016-05-27 00:18:13 -0400 (Fri, 27 May 2016) Log Message: ----------- bump port revision Modified Paths: -------------- trunk/print/ghostscript9-base/Makefile Modified: trunk/print/ghostscript9-base/Makefile =================================================================== --- trunk/print/ghostscript9-base/Makefile 2016-05-27 04:17:35 UTC (rev 21466) +++ trunk/print/ghostscript9-base/Makefile 2016-05-27 04:18:13 UTC (rev 21467) @@ -3,6 +3,7 @@ PORTNAME= ghostscript PORTVERSION= 9.06 +PORTREVISION= 12 CATEGORIES= print MASTER_SITES= http://downloads.ghostscript.com/public/:gs_srcs \ SF/ghostscript/GPL%20Ghostscript/${PORTVERSION}:gs_srcs \ @@ -82,7 +83,7 @@ EXCLUDE_DIRS= freetype jbig2dec jpeg expat jasper lcms lcms2 libpng tiff zlib -CUPS_LIB_DEPENDS= libcups.so:${PORTSDIR}/print/cups-client +CUPS_LIB_DEPENDS= libcups.so:${PORTSDIR}/print/cups .include "Makefile.drivers" .include From laffer1 at midnightbsd.org Fri May 27 00:18:40 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 00:18:40 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21468] trunk/print/ghostscript9-x11/Makefile: bump Message-ID: <201605270418.u4R4IeAc050755@stargazer.midnightbsd.org> Revision: 21468 http://svnweb.midnightbsd.org/mports/?rev=21468 Author: laffer1 Date: 2016-05-27 00:18:40 -0400 (Fri, 27 May 2016) Log Message: ----------- bump Modified Paths: -------------- trunk/print/ghostscript9-x11/Makefile Modified: trunk/print/ghostscript9-x11/Makefile =================================================================== --- trunk/print/ghostscript9-x11/Makefile 2016-05-27 04:18:13 UTC (rev 21467) +++ trunk/print/ghostscript9-x11/Makefile 2016-05-27 04:18:40 UTC (rev 21468) @@ -3,6 +3,7 @@ PORTNAME= ghostscript PORTVERSION= 9.06 +PORTREVISION= 11 CATEGORIES= print MASTER_SITES= http://downloads.ghostscript.com/public/ \ SF/ghostscript/GPL%20Ghostscript/${PORTVERSION}/ From laffer1 at midnightbsd.org Fri May 27 10:13:58 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 10:13:58 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7582] stable/0.8/lib/libmport/Makefile: set warns 3 until we can deal with the hash table algorithm Message-ID: <201605271413.u4REDw7A016321@stargazer.midnightbsd.org> Revision: 7582 http://svnweb.midnightbsd.org/src/?rev=7582 Author: laffer1 Date: 2016-05-27 10:13:57 -0400 (Fri, 27 May 2016) Log Message: ----------- set warns 3 until we can deal with the hash table algorithm Modified Paths: -------------- stable/0.8/lib/libmport/Makefile Modified: stable/0.8/lib/libmport/Makefile =================================================================== --- stable/0.8/lib/libmport/Makefile 2016-05-27 03:42:17 UTC (rev 7581) +++ stable/0.8/lib/libmport/Makefile 2016-05-27 14:13:57 UTC (rev 7582) @@ -15,6 +15,8 @@ SHLIB_MAJOR= 2 MAN= mport.3 +WARNS= 3 + NO_PROFILE= DPADD= ${LIBMD} ${LIBARCHIVE} ${LIBBZP2} ${LIBLZMA} ${LIBZ} ${LIBFETCH} \ From laffer1 at midnightbsd.org Fri May 27 16:07:45 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 16:07:45 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7583] trunk/crypto/netpgp/src/lib/packet-parse.c: alrightythen just drop the 0 case Message-ID: <201605272007.u4RK7jgO056608@stargazer.midnightbsd.org> Revision: 7583 http://svnweb.midnightbsd.org/src/?rev=7583 Author: laffer1 Date: 2016-05-27 16:07:44 -0400 (Fri, 27 May 2016) Log Message: ----------- alrightythen just drop the 0 case Modified Paths: -------------- trunk/crypto/netpgp/src/lib/packet-parse.c Modified: trunk/crypto/netpgp/src/lib/packet-parse.c =================================================================== --- trunk/crypto/netpgp/src/lib/packet-parse.c 2016-05-27 14:13:57 UTC (rev 7582) +++ trunk/crypto/netpgp/src/lib/packet-parse.c 2016-05-27 20:07:44 UTC (rev 7583) @@ -1282,11 +1282,6 @@ free_BN(&p->key.elgamal.g); free_BN(&p->key.elgamal.y); break; - - case 0: - /* nothing to free */ - break; - default: (void) fprintf(stderr, "__ops_pubkey_free: bad alg\n"); } From laffer1 at midnightbsd.org Fri May 27 16:17:36 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 16:17:36 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7584] stable/0.8/secure/lib/libnetpgp/Makefile: lower warns level Message-ID: <201605272017.u4RKHacA057798@stargazer.midnightbsd.org> Revision: 7584 http://svnweb.midnightbsd.org/src/?rev=7584 Author: laffer1 Date: 2016-05-27 16:17:36 -0400 (Fri, 27 May 2016) Log Message: ----------- lower warns level Modified Paths: -------------- stable/0.8/secure/lib/libnetpgp/Makefile Modified: stable/0.8/secure/lib/libnetpgp/Makefile =================================================================== --- stable/0.8/secure/lib/libnetpgp/Makefile 2016-05-27 20:07:44 UTC (rev 7583) +++ stable/0.8/secure/lib/libnetpgp/Makefile 2016-05-27 20:17:36 UTC (rev 7584) @@ -19,7 +19,7 @@ CFLAGS+= -I${.CURDIR} -I${NETPGP_SRC}/include MAN= libnetpgp.3 -WARNS=4 +WARNS=2 .if ${MK_IDEA} == "no" CFLAGS+= -DOPENSSL_NO_IDEA From laffer1 at midnightbsd.org Fri May 27 16:18:09 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 16:18:09 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7585] stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c: fix warnings Message-ID: <201605272018.u4RKI9BE057849@stargazer.midnightbsd.org> Revision: 7585 http://svnweb.midnightbsd.org/src/?rev=7585 Author: laffer1 Date: 2016-05-27 16:18:09 -0400 (Fri, 27 May 2016) Log Message: ----------- fix warnings Modified Paths: -------------- stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c Modified: stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c =================================================================== --- stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c 2016-05-27 20:17:36 UTC (rev 7584) +++ stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c 2016-05-27 20:18:09 UTC (rev 7585) @@ -73,7 +73,7 @@ struct pam_response *resp; #endif struct passwd *pwd; - const char *user; + const char *user = NULL; char *crypt_password, *password; int pam_err, retry; From laffer1 at midnightbsd.org Fri May 27 19:22:26 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 19:22:26 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7586] stable/0.8/libexec/bootpd/bootpgw/bootpgw.c: get rid of warning Message-ID: <201605272322.u4RNMQkb079470@stargazer.midnightbsd.org> Revision: 7586 http://svnweb.midnightbsd.org/src/?rev=7586 Author: laffer1 Date: 2016-05-27 19:22:25 -0400 (Fri, 27 May 2016) Log Message: ----------- get rid of warning Modified Paths: -------------- stable/0.8/libexec/bootpd/bootpgw/bootpgw.c Modified: stable/0.8/libexec/bootpd/bootpgw/bootpgw.c =================================================================== --- stable/0.8/libexec/bootpd/bootpgw/bootpgw.c 2016-05-27 20:18:09 UTC (rev 7585) +++ stable/0.8/libexec/bootpd/bootpgw/bootpgw.c 2016-05-27 23:22:25 UTC (rev 7586) @@ -451,7 +451,7 @@ continue; } if (!(readfds & (1 << s))) { - report(LOG_INFO, "exiting after %ld minutes of inactivity", + report(LOG_INFO, "exiting after %d minutes of inactivity", actualtimeout.tv_sec / 60); exit(0); } From laffer1 at midnightbsd.org Sat May 28 14:36:40 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:36:40 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7587] stable/0.8/bin/mined: drop warns Message-ID: <201605281836.u4SIaef7099279@stargazer.midnightbsd.org> Revision: 7587 http://svnweb.midnightbsd.org/src/?rev=7587 Author: laffer1 Date: 2016-05-28 14:36:40 -0400 (Sat, 28 May 2016) Log Message: ----------- drop warns Modified Paths: -------------- stable/0.8/bin/mined/Makefile stable/0.8/bin/mined/mined1.c Modified: stable/0.8/bin/mined/Makefile =================================================================== --- stable/0.8/bin/mined/Makefile 2016-05-27 23:22:25 UTC (rev 7586) +++ stable/0.8/bin/mined/Makefile 2016-05-28 18:36:40 UTC (rev 7587) @@ -5,4 +5,6 @@ PROG= mined SRCS= mined1.c mined2.c +WARNS= 3 + .include Modified: stable/0.8/bin/mined/mined1.c =================================================================== --- stable/0.8/bin/mined/mined1.c 2016-05-27 23:22:25 UTC (rev 7586) +++ stable/0.8/bin/mined/mined1.c 2016-05-28 18:36:40 UTC (rev 7587) @@ -448,7 +448,7 @@ * ======================================================================== */ #include -__MBSDID("$MidnightBSD: src/bin/mined/mined1.c,v 1.1 2008/08/17 03:26:36 laffer1 Exp $"); +__MBSDID("$MidnightBSD$"); #include "mined.h" #include From laffer1 at midnightbsd.org Sat May 28 14:42:23 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:42:23 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7588] trunk/bin/mined: switch to a void pointer here Message-ID: <201605281842.u4SIgN0m099813@stargazer.midnightbsd.org> Revision: 7588 http://svnweb.midnightbsd.org/src/?rev=7588 Author: laffer1 Date: 2016-05-28 14:42:23 -0400 (Sat, 28 May 2016) Log Message: ----------- switch to a void pointer here Modified Paths: -------------- trunk/bin/mined/mined.h trunk/bin/mined/mined1.c Modified: trunk/bin/mined/mined.h =================================================================== --- trunk/bin/mined/mined.h 2016-05-28 18:36:40 UTC (rev 7587) +++ trunk/bin/mined/mined.h 2016-05-28 18:42:23 UTC (rev 7588) @@ -310,7 +310,7 @@ void abort_mined(void); void raw_mode(FLAG state); void panic(const char *message); -char *alloc(int bytes); +void *alloc(int bytes); void free_space(char *p); void initialize(void); char *basename(char *path); Modified: trunk/bin/mined/mined1.c =================================================================== --- trunk/bin/mined/mined1.c 2016-05-28 18:36:40 UTC (rev 7587) +++ trunk/bin/mined/mined1.c 2016-05-28 18:42:23 UTC (rev 7588) @@ -448,7 +448,7 @@ * ======================================================================== */ #include -__MBSDID("$MidnightBSD: src/bin/mined/mined1.c,v 1.1 2008/08/17 03:26:36 laffer1 Exp $"); +__MBSDID("$MidnightBSD$"); #include "mined.h" #include @@ -1215,10 +1215,10 @@ #endif /* UNIX */ } -char * +void * alloc(int bytes) { - char *p; + void *p; p = malloc((unsigned) bytes); if (p == NIL_PTR) { From laffer1 at midnightbsd.org Sat May 28 14:44:06 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:44:06 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7589] trunk/usr.bin/mail/util.c: fix warning with clang Message-ID: <201605281844.u4SIi6Cs099894@stargazer.midnightbsd.org> Revision: 7589 http://svnweb.midnightbsd.org/src/?rev=7589 Author: laffer1 Date: 2016-05-28 14:44:06 -0400 (Sat, 28 May 2016) Log Message: ----------- fix warning with clang Modified Paths: -------------- trunk/usr.bin/mail/util.c Modified: trunk/usr.bin/mail/util.c =================================================================== --- trunk/usr.bin/mail/util.c 2016-05-28 18:42:23 UTC (rev 7588) +++ trunk/usr.bin/mail/util.c 2016-05-28 18:44:06 UTC (rev 7589) @@ -236,8 +236,8 @@ { strlcpy(dest, src, dsize); - while (*dest) - *dest++ = tolower((unsigned char)*dest); + for (; *dest; dest++) + *dest = tolower((unsigned char)*dest); } /* From laffer1 at midnightbsd.org Sat May 28 14:45:14 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:45:14 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7590] stable/0.8/usr.bin/mail/util.c: fix clang warning Message-ID: <201605281845.u4SIjEeu000455@stargazer.midnightbsd.org> Revision: 7590 http://svnweb.midnightbsd.org/src/?rev=7590 Author: laffer1 Date: 2016-05-28 14:45:14 -0400 (Sat, 28 May 2016) Log Message: ----------- fix clang warning Modified Paths: -------------- stable/0.8/usr.bin/mail/util.c Modified: stable/0.8/usr.bin/mail/util.c =================================================================== --- stable/0.8/usr.bin/mail/util.c 2016-05-28 18:44:06 UTC (rev 7589) +++ stable/0.8/usr.bin/mail/util.c 2016-05-28 18:45:14 UTC (rev 7590) @@ -236,8 +236,8 @@ { strlcpy(dest, src, dsize); - while (*dest) - *dest++ = tolower((unsigned char)*dest); + for (; *dest; dest++) + *dest = tolower((unsigned char)*dest); } /* From laffer1 at midnightbsd.org Sat May 28 14:45:58 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:45:58 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7591] stable/0.8/bin/mined: fix some warnings in clang with mined(1) Message-ID: <201605281845.u4SIjwjf000530@stargazer.midnightbsd.org> Revision: 7591 http://svnweb.midnightbsd.org/src/?rev=7591 Author: laffer1 Date: 2016-05-28 14:45:58 -0400 (Sat, 28 May 2016) Log Message: ----------- fix some warnings in clang with mined(1) Modified Paths: -------------- stable/0.8/bin/mined/mined.h stable/0.8/bin/mined/mined1.c Modified: stable/0.8/bin/mined/mined.h =================================================================== --- stable/0.8/bin/mined/mined.h 2016-05-28 18:45:14 UTC (rev 7590) +++ stable/0.8/bin/mined/mined.h 2016-05-28 18:45:58 UTC (rev 7591) @@ -310,7 +310,7 @@ void abort_mined(void); void raw_mode(FLAG state); void panic(const char *message); -char *alloc(int bytes); +void *alloc(int bytes); void free_space(char *p); void initialize(void); char *basename(char *path); Modified: stable/0.8/bin/mined/mined1.c =================================================================== --- stable/0.8/bin/mined/mined1.c 2016-05-28 18:45:14 UTC (rev 7590) +++ stable/0.8/bin/mined/mined1.c 2016-05-28 18:45:58 UTC (rev 7591) @@ -1215,10 +1215,10 @@ #endif /* UNIX */ } -char * +void * alloc(int bytes) { - char *p; + void *p; p = malloc((unsigned) bytes); if (p == NIL_PTR) { From laffer1 at midnightbsd.org Sat May 28 15:02:11 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 15:02:11 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7592] trunk/usr.bin/msearch: fix zeroflag code to work with clang Message-ID: <201605281902.u4SJ2BkP002124@stargazer.midnightbsd.org> Revision: 7592 http://svnweb.midnightbsd.org/src/?rev=7592 Author: laffer1 Date: 2016-05-28 15:02:11 -0400 (Sat, 28 May 2016) Log Message: ----------- fix zeroflag code to work with clang Modified Paths: -------------- trunk/usr.bin/msearch/Makefile trunk/usr.bin/msearch/msearch.c Modified: trunk/usr.bin/msearch/Makefile =================================================================== --- trunk/usr.bin/msearch/Makefile 2016-05-28 18:45:58 UTC (rev 7591) +++ trunk/usr.bin/msearch/Makefile 2016-05-28 19:02:11 UTC (rev 7592) @@ -1,10 +1,9 @@ -# $MidnightBSD: src/usr.bin/msearch/Makefile,v 1.6 2011/08/07 06:25:00 laffer1 Exp $ +# $MidnightBSD$ PROG= msearch CFLAGS+= -I${.CURDIR}/../../lib/libsearch -WARNS?= 1 CSTD= c99 DPADD= ${LIBMSEARCH} ${LIBZ} ${LIBSQLITE3} Modified: trunk/usr.bin/msearch/msearch.c =================================================================== --- trunk/usr.bin/msearch/msearch.c 2016-05-28 18:45:58 UTC (rev 7591) +++ trunk/usr.bin/msearch/msearch.c 2016-05-28 19:02:11 UTC (rev 7592) @@ -25,7 +25,7 @@ */ #include -__MBSDID("$MidnightBSD: src/usr.bin/msearch/msearch.c,v 1.6 2011/08/06 23:02:26 laffer1 Exp $"); +__MBSDID("$MidnightBSD$"); #include #include @@ -101,15 +101,17 @@ while (current != NULL) { if (current->path != NULL) { if (tflag && rflag) { + printf("%0.2f %s", current->weight, current->path); if (zeroflag) - printf("%0.2f %s\0", current->weight, current->path); + fputc('\0', stdout); else - printf("%0.2f %s\n", current->weight, current->path); + fputc('\n', stdout); } else { + printf("%s", current->path); if (zeroflag) - printf("%s\0", current->path); + fputc('\0', stdout); else - printf("%s\n", current->path); + fputc('\n', stdout); } } current = current->next; From laffer1 at midnightbsd.org Sat May 28 15:03:14 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 15:03:14 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7593] stable/0.8/usr.bin/msearch: MFC: fix zeroflag code to work with clang Message-ID: <201605281903.u4SJ3EqN002205@stargazer.midnightbsd.org> Revision: 7593 http://svnweb.midnightbsd.org/src/?rev=7593 Author: laffer1 Date: 2016-05-28 15:03:13 -0400 (Sat, 28 May 2016) Log Message: ----------- MFC: fix zeroflag code to work with clang Modified Paths: -------------- stable/0.8/usr.bin/msearch/Makefile stable/0.8/usr.bin/msearch/msearch.c Modified: stable/0.8/usr.bin/msearch/Makefile =================================================================== --- stable/0.8/usr.bin/msearch/Makefile 2016-05-28 19:02:11 UTC (rev 7592) +++ stable/0.8/usr.bin/msearch/Makefile 2016-05-28 19:03:13 UTC (rev 7593) @@ -1,10 +1,9 @@ -# $MidnightBSD: src/usr.bin/msearch/Makefile,v 1.6 2011/08/07 06:25:00 laffer1 Exp $ +# $MidnightBSD$ PROG= msearch CFLAGS+= -I${.CURDIR}/../../lib/libsearch -WARNS?= 1 CSTD= c99 DPADD= ${LIBMSEARCH} ${LIBZ} ${LIBSQLITE3} Modified: stable/0.8/usr.bin/msearch/msearch.c =================================================================== --- stable/0.8/usr.bin/msearch/msearch.c 2016-05-28 19:02:11 UTC (rev 7592) +++ stable/0.8/usr.bin/msearch/msearch.c 2016-05-28 19:03:13 UTC (rev 7593) @@ -25,7 +25,7 @@ */ #include -__MBSDID("$MidnightBSD: src/usr.bin/msearch/msearch.c,v 1.6 2011/08/06 23:02:26 laffer1 Exp $"); +__MBSDID("$MidnightBSD$"); #include #include @@ -101,15 +101,17 @@ while (current != NULL) { if (current->path != NULL) { if (tflag && rflag) { + printf("%0.2f %s", current->weight, current->path); if (zeroflag) - printf("%0.2f %s\0", current->weight, current->path); + fputc('\0', stdout); else - printf("%0.2f %s\n", current->weight, current->path); + fputc('\n', stdout); } else { + printf("%s", current->path); if (zeroflag) - printf("%s\0", current->path); + fputc('\0', stdout); else - printf("%s\n", current->path); + fputc('\n', stdout); } } current = current->next; From laffer1 at midnightbsd.org Sat May 28 15:32:03 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 15:32:03 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7594] trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile: set warns Message-ID: <201605281932.u4SJW3xV005176@stargazer.midnightbsd.org> Revision: 7594 http://svnweb.midnightbsd.org/src/?rev=7594 Author: laffer1 Date: 2016-05-28 15:32:03 -0400 (Sat, 28 May 2016) Log Message: ----------- set warns Modified Paths: -------------- trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile Modified: trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile =================================================================== --- trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile 2016-05-28 19:03:13 UTC (rev 7593) +++ trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile 2016-05-28 19:32:03 UTC (rev 7594) @@ -13,6 +13,8 @@ ipForward ifIndex linkDown linkUp MAN= snmp_mibII.3 +WARNS= 3 + CFLAGS+= -I${CONTRIB}/lib -I${CONTRIB}/snmpd CFLAGS+= -DHAVE_ERR_H -DHAVE_GETADDRINFO -DHAVE_STRLCPY -DHAVE_SYS_TREE_H From laffer1 at midnightbsd.org Sat May 28 15:32:58 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 15:32:58 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7595] stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile: set warns Message-ID: <201605281932.u4SJWw5k005241@stargazer.midnightbsd.org> Revision: 7595 http://svnweb.midnightbsd.org/src/?rev=7595 Author: laffer1 Date: 2016-05-28 15:32:58 -0400 (Sat, 28 May 2016) Log Message: ----------- set warns Modified Paths: -------------- stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile Modified: stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile =================================================================== --- stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile 2016-05-28 19:32:03 UTC (rev 7594) +++ stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile 2016-05-28 19:32:58 UTC (rev 7595) @@ -13,6 +13,8 @@ ipForward ifIndex linkDown linkUp MAN= snmp_mibII.3 +WARNS= 3 + CFLAGS+= -I${CONTRIB}/lib -I${CONTRIB}/snmpd CFLAGS+= -DHAVE_ERR_H -DHAVE_GETADDRINFO -DHAVE_STRLCPY -DHAVE_SYS_TREE_H From laffer1 at midnightbsd.org Sat May 28 17:33:11 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:33:11 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7596] trunk/sbin/camcontrol/Makefile: drop to warns 3 Message-ID: <201605282133.u4SLXBfp017916@stargazer.midnightbsd.org> Revision: 7596 http://svnweb.midnightbsd.org/src/?rev=7596 Author: laffer1 Date: 2016-05-28 17:33:10 -0400 (Sat, 28 May 2016) Log Message: ----------- drop to warns 3 Modified Paths: -------------- trunk/sbin/camcontrol/Makefile Modified: trunk/sbin/camcontrol/Makefile =================================================================== --- trunk/sbin/camcontrol/Makefile 2016-05-28 19:32:58 UTC (rev 7595) +++ trunk/sbin/camcontrol/Makefile 2016-05-28 21:33:10 UTC (rev 7596) @@ -7,10 +7,7 @@ .else CFLAGS+= -DMINIMALISTIC .endif -# This is verboten -.if ${MACHINE_CPUARCH} == "arm" WARNS?= 3 -.endif DPADD= ${LIBCAM} ${LIBSBUF} ${LIBUTIL} LDADD= -lcam -lsbuf -lutil MAN= camcontrol.8 From laffer1 at midnightbsd.org Sat May 28 17:33:26 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:33:26 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7597] stable/0.8/sbin/camcontrol/Makefile: warns 3 Message-ID: <201605282133.u4SLXQOu017962@stargazer.midnightbsd.org> Revision: 7597 http://svnweb.midnightbsd.org/src/?rev=7597 Author: laffer1 Date: 2016-05-28 17:33:26 -0400 (Sat, 28 May 2016) Log Message: ----------- warns 3 Modified Paths: -------------- stable/0.8/sbin/camcontrol/Makefile Modified: stable/0.8/sbin/camcontrol/Makefile =================================================================== --- stable/0.8/sbin/camcontrol/Makefile 2016-05-28 21:33:10 UTC (rev 7596) +++ stable/0.8/sbin/camcontrol/Makefile 2016-05-28 21:33:26 UTC (rev 7597) @@ -7,10 +7,7 @@ .else CFLAGS+= -DMINIMALISTIC .endif -# This is verboten -.if ${MACHINE_CPUARCH} == "arm" WARNS?= 3 -.endif DPADD= ${LIBCAM} ${LIBSBUF} ${LIBUTIL} LDADD= -lcam -lsbuf -lutil MAN= camcontrol.8 From laffer1 at midnightbsd.org Sat May 28 17:34:29 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:34:29 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7598] trunk/sbin/ggate/Makefile.inc: set warns 3 Message-ID: <201605282134.u4SLYTht018031@stargazer.midnightbsd.org> Revision: 7598 http://svnweb.midnightbsd.org/src/?rev=7598 Author: laffer1 Date: 2016-05-28 17:34:29 -0400 (Sat, 28 May 2016) Log Message: ----------- set warns 3 Modified Paths: -------------- trunk/sbin/ggate/Makefile.inc Modified: trunk/sbin/ggate/Makefile.inc =================================================================== --- trunk/sbin/ggate/Makefile.inc 2016-05-28 21:33:26 UTC (rev 7597) +++ trunk/sbin/ggate/Makefile.inc 2016-05-28 21:34:29 UTC (rev 7598) @@ -1,3 +1,5 @@ # $MidnightBSD$ +WARNS=3 + .include "../Makefile.inc" From laffer1 at midnightbsd.org Sat May 28 17:34:50 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:34:50 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7599] trunk/sbin/ggate/shared/ggate.c: init to 0 Message-ID: <201605282134.u4SLYoO2018083@stargazer.midnightbsd.org> Revision: 7599 http://svnweb.midnightbsd.org/src/?rev=7599 Author: laffer1 Date: 2016-05-28 17:34:50 -0400 (Sat, 28 May 2016) Log Message: ----------- init to 0 Modified Paths: -------------- trunk/sbin/ggate/shared/ggate.c Modified: trunk/sbin/ggate/shared/ggate.c =================================================================== --- trunk/sbin/ggate/shared/ggate.c 2016-05-28 21:34:29 UTC (rev 7598) +++ trunk/sbin/ggate/shared/ggate.c 2016-05-28 21:34:50 UTC (rev 7599) @@ -152,7 +152,7 @@ unsigned g_gate_sectorsize(int fd) { - unsigned secsize; + unsigned secsize = 0; struct stat sb; if (fstat(fd, &sb) == -1) From laffer1 at midnightbsd.org Sat May 28 17:35:10 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:35:10 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7600] stable/0.8/sbin/ggate/shared/ggate.c: init to zero Message-ID: <201605282135.u4SLZA8R018504@stargazer.midnightbsd.org> Revision: 7600 http://svnweb.midnightbsd.org/src/?rev=7600 Author: laffer1 Date: 2016-05-28 17:35:10 -0400 (Sat, 28 May 2016) Log Message: ----------- init to zero Modified Paths: -------------- stable/0.8/sbin/ggate/shared/ggate.c Modified: stable/0.8/sbin/ggate/shared/ggate.c =================================================================== --- stable/0.8/sbin/ggate/shared/ggate.c 2016-05-28 21:34:50 UTC (rev 7599) +++ stable/0.8/sbin/ggate/shared/ggate.c 2016-05-28 21:35:10 UTC (rev 7600) @@ -152,7 +152,7 @@ unsigned g_gate_sectorsize(int fd) { - unsigned secsize; + unsigned secsize = 0; struct stat sb; if (fstat(fd, &sb) == -1) From laffer1 at midnightbsd.org Sat May 28 17:35:41 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:35:41 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7601] stable/0.8/sbin/ggate/shared/ggate.c: init Message-ID: <201605282135.u4SLZfNc018560@stargazer.midnightbsd.org> Revision: 7601 http://svnweb.midnightbsd.org/src/?rev=7601 Author: laffer1 Date: 2016-05-28 17:35:41 -0400 (Sat, 28 May 2016) Log Message: ----------- init Modified Paths: -------------- stable/0.8/sbin/ggate/shared/ggate.c Modified: stable/0.8/sbin/ggate/shared/ggate.c =================================================================== --- stable/0.8/sbin/ggate/shared/ggate.c 2016-05-28 21:35:10 UTC (rev 7600) +++ stable/0.8/sbin/ggate/shared/ggate.c 2016-05-28 21:35:41 UTC (rev 7601) @@ -131,7 +131,7 @@ off_t g_gate_mediasize(int fd) { - off_t mediasize; + off_t mediasize = 0; struct stat sb; if (fstat(fd, &sb) == -1) From laffer1 at midnightbsd.org Sat May 28 17:36:15 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:36:15 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7602] trunk/sbin/ggate/shared/ggate.c: init to zero Message-ID: <201605282136.u4SLaFWq018625@stargazer.midnightbsd.org> Revision: 7602 http://svnweb.midnightbsd.org/src/?rev=7602 Author: laffer1 Date: 2016-05-28 17:36:14 -0400 (Sat, 28 May 2016) Log Message: ----------- init to zero Modified Paths: -------------- trunk/sbin/ggate/shared/ggate.c Modified: trunk/sbin/ggate/shared/ggate.c =================================================================== --- trunk/sbin/ggate/shared/ggate.c 2016-05-28 21:35:41 UTC (rev 7601) +++ trunk/sbin/ggate/shared/ggate.c 2016-05-28 21:36:14 UTC (rev 7602) @@ -131,7 +131,7 @@ off_t g_gate_mediasize(int fd) { - off_t mediasize; + off_t mediasize = 0; struct stat sb; if (fstat(fd, &sb) == -1) From laffer1 at midnightbsd.org Sat May 28 21:43:13 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:43:13 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7603] stable/0.8/usr.sbin/ctladm/ctladm.c: init retval Message-ID: <201605290143.u4T1hDHT044751@stargazer.midnightbsd.org> Revision: 7603 http://svnweb.midnightbsd.org/src/?rev=7603 Author: laffer1 Date: 2016-05-28 21:43:12 -0400 (Sat, 28 May 2016) Log Message: ----------- init retval Modified Paths: -------------- stable/0.8/usr.sbin/ctladm/ctladm.c Modified: stable/0.8/usr.sbin/ctladm/ctladm.c =================================================================== --- stable/0.8/usr.sbin/ctladm/ctladm.c 2016-05-28 21:36:14 UTC (rev 7602) +++ stable/0.8/usr.sbin/ctladm/ctladm.c 2016-05-29 01:43:12 UTC (rev 7603) @@ -1026,7 +1026,7 @@ cctl_error_inject(int fd, uint32_t target, uint32_t lun, int argc, char **argv, char *combinedopt) { - int retval; + int retval = 0; struct ctl_error_desc err_desc; uint64_t lba = 0; uint32_t len = 0; From laffer1 at midnightbsd.org Sat May 28 21:44:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:44:00 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7604] trunk/usr.sbin/ctladm/ctladm.c: init retval Message-ID: <201605290144.u4T1i0BB044815@stargazer.midnightbsd.org> Revision: 7604 http://svnweb.midnightbsd.org/src/?rev=7604 Author: laffer1 Date: 2016-05-28 21:44:00 -0400 (Sat, 28 May 2016) Log Message: ----------- init retval Modified Paths: -------------- trunk/usr.sbin/ctladm/ctladm.c Modified: trunk/usr.sbin/ctladm/ctladm.c =================================================================== --- trunk/usr.sbin/ctladm/ctladm.c 2016-05-29 01:43:12 UTC (rev 7603) +++ trunk/usr.sbin/ctladm/ctladm.c 2016-05-29 01:44:00 UTC (rev 7604) @@ -1026,7 +1026,7 @@ cctl_error_inject(int fd, uint32_t target, uint32_t lun, int argc, char **argv, char *combinedopt) { - int retval; + int retval = 0; struct ctl_error_desc err_desc; uint64_t lba = 0; uint32_t len = 0; From laffer1 at midnightbsd.org Sat May 28 21:45:56 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:45:56 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7605] stable/0.8/usr.sbin/kbdcontrol/Makefile: drop to warns 3 for clang Message-ID: <201605290145.u4T1juUC045263@stargazer.midnightbsd.org> Revision: 7605 http://svnweb.midnightbsd.org/src/?rev=7605 Author: laffer1 Date: 2016-05-28 21:45:55 -0400 (Sat, 28 May 2016) Log Message: ----------- drop to warns 3 for clang Modified Paths: -------------- stable/0.8/usr.sbin/kbdcontrol/Makefile Modified: stable/0.8/usr.sbin/kbdcontrol/Makefile =================================================================== --- stable/0.8/usr.sbin/kbdcontrol/Makefile 2016-05-29 01:44:00 UTC (rev 7604) +++ stable/0.8/usr.sbin/kbdcontrol/Makefile 2016-05-29 01:45:55 UTC (rev 7605) @@ -5,7 +5,7 @@ MLINKS= kbdmap.5 keymap.5 SRCS= kbdcontrol.c lex.l -WARNS?= 4 +WARNS?= 3 CFLAGS+= -I${.CURDIR} DPADD= ${LIBL} From laffer1 at midnightbsd.org Sat May 28 21:46:35 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:46:35 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7606] trunk/usr.sbin/kbdcontrol/Makefile: fix build with clang Message-ID: <201605290146.u4T1kZ3h045317@stargazer.midnightbsd.org> Revision: 7606 http://svnweb.midnightbsd.org/src/?rev=7606 Author: laffer1 Date: 2016-05-28 21:46:34 -0400 (Sat, 28 May 2016) Log Message: ----------- fix build with clang Modified Paths: -------------- trunk/usr.sbin/kbdcontrol/Makefile Modified: trunk/usr.sbin/kbdcontrol/Makefile =================================================================== --- trunk/usr.sbin/kbdcontrol/Makefile 2016-05-29 01:45:55 UTC (rev 7605) +++ trunk/usr.sbin/kbdcontrol/Makefile 2016-05-29 01:46:34 UTC (rev 7606) @@ -5,7 +5,7 @@ MLINKS= kbdmap.5 keymap.5 SRCS= kbdcontrol.c lex.l -WARNS?= 4 +WARNS?= 3 CFLAGS+= -I${.CURDIR} DPADD= ${LIBL} From laffer1 at midnightbsd.org Sat May 28 21:47:18 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:47:18 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7607] trunk/usr.sbin/ndiscvt/Makefile: lower warns for clang switch Message-ID: <201605290147.u4T1lI3g045366@stargazer.midnightbsd.org> Revision: 7607 http://svnweb.midnightbsd.org/src/?rev=7607 Author: laffer1 Date: 2016-05-28 21:47:17 -0400 (Sat, 28 May 2016) Log Message: ----------- lower warns for clang switch Modified Paths: -------------- trunk/usr.sbin/ndiscvt/Makefile Modified: trunk/usr.sbin/ndiscvt/Makefile =================================================================== --- trunk/usr.sbin/ndiscvt/Makefile 2016-05-29 01:46:34 UTC (rev 7606) +++ trunk/usr.sbin/ndiscvt/Makefile 2016-05-29 01:47:17 UTC (rev 7607) @@ -1,3 +1,4 @@ +# $MidnightBSD$ # $FreeBSD: src/usr.sbin/ndiscvt/Makefile,v 1.7 2005/04/24 20:21:22 wpaul Exp $ .PATH: ${.CURDIR}/../../sys/compat/ndis @@ -10,7 +11,7 @@ MAN= ndiscvt.8 MAN+= ndisgen.8 -WARNS?= 4 +WARNS?= 3 DPADD= ${LIBL} LDADD= -ll From laffer1 at midnightbsd.org Sat May 28 21:47:36 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:47:36 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7608] stable/0.8/usr.sbin/ndiscvt/Makefile: lower warns for clang switch Message-ID: <201605290147.u4T1laEh045408@stargazer.midnightbsd.org> Revision: 7608 http://svnweb.midnightbsd.org/src/?rev=7608 Author: laffer1 Date: 2016-05-28 21:47:36 -0400 (Sat, 28 May 2016) Log Message: ----------- lower warns for clang switch Modified Paths: -------------- stable/0.8/usr.sbin/ndiscvt/Makefile Modified: stable/0.8/usr.sbin/ndiscvt/Makefile =================================================================== --- stable/0.8/usr.sbin/ndiscvt/Makefile 2016-05-29 01:47:17 UTC (rev 7607) +++ stable/0.8/usr.sbin/ndiscvt/Makefile 2016-05-29 01:47:36 UTC (rev 7608) @@ -10,7 +10,7 @@ MAN= ndiscvt.8 MAN+= ndisgen.8 -WARNS?= 4 +WARNS?= 3 DPADD= ${LIBL} LDADD= -ll From laffer1 at midnightbsd.org Sat May 28 22:10:32 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 22:10:32 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7609] stable/0.8/usr.sbin/sysinstall/label.c: fix build Message-ID: <201605290210.u4T2AWgK048200@stargazer.midnightbsd.org> Revision: 7609 http://svnweb.midnightbsd.org/src/?rev=7609 Author: laffer1 Date: 2016-05-28 22:10:32 -0400 (Sat, 28 May 2016) Log Message: ----------- fix build Modified Paths: -------------- stable/0.8/usr.sbin/sysinstall/label.c Modified: stable/0.8/usr.sbin/sysinstall/label.c =================================================================== --- stable/0.8/usr.sbin/sysinstall/label.c 2016-05-29 01:47:36 UTC (rev 7608) +++ stable/0.8/usr.sbin/sysinstall/label.c 2016-05-29 02:10:32 UTC (rev 7609) @@ -4,7 +4,7 @@ * This is probably the last program in the `sysinstall' line - the next * generation being essentially a complete rewrite. * - * $MidnightBSD: src/usr.sbin/sysinstall/label.c,v 1.9 2011/03/26 16:53:46 laffer1 Exp $ + * $MidnightBSD$ * $FreeBSD: src/usr.sbin/sysinstall/label.c,v 1.148.8.2 2006/01/24 15:51:33 ceri Exp $ * * Copyright (c) 1995 @@ -924,7 +924,7 @@ } if (msg) { if (req) { - msgConfirm(msg); + msgConfirm("%s", msg); clear_wins(); msg = NULL; } From laffer1 at midnightbsd.org Sat May 28 22:11:03 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 22:11:03 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7610] trunk/usr.sbin/sysinstall/label.c: fix build Message-ID: <201605290211.u4T2B3PP048267@stargazer.midnightbsd.org> Revision: 7610 http://svnweb.midnightbsd.org/src/?rev=7610 Author: laffer1 Date: 2016-05-28 22:11:02 -0400 (Sat, 28 May 2016) Log Message: ----------- fix build Modified Paths: -------------- trunk/usr.sbin/sysinstall/label.c Modified: trunk/usr.sbin/sysinstall/label.c =================================================================== --- trunk/usr.sbin/sysinstall/label.c 2016-05-29 02:10:32 UTC (rev 7609) +++ trunk/usr.sbin/sysinstall/label.c 2016-05-29 02:11:02 UTC (rev 7610) @@ -4,7 +4,7 @@ * This is probably the last program in the `sysinstall' line - the next * generation being essentially a complete rewrite. * - * $MidnightBSD: src/usr.sbin/sysinstall/label.c,v 1.9 2011/03/26 16:53:46 laffer1 Exp $ + * $MidnightBSD$ * $FreeBSD: src/usr.sbin/sysinstall/label.c,v 1.148.8.2 2006/01/24 15:51:33 ceri Exp $ * * Copyright (c) 1995 @@ -924,7 +924,7 @@ } if (msg) { if (req) { - msgConfirm(msg); + msgConfirm("%s", msg); clear_wins(); msg = NULL; } From laffer1 at midnightbsd.org Wed May 25 23:57:23 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 23:57:23 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21458] trunk/textproc: add kibana 4.2-4.4 Message-ID: <201605260357.u4Q3vNWS087540@stargazer.midnightbsd.org> Revision: 21458 http://svnweb.midnightbsd.org/mports/?rev=21458 Author: laffer1 Date: 2016-05-25 23:57:22 -0400 (Wed, 25 May 2016) Log Message: ----------- add kibana 4.2-4.4 Added Paths: ----------- trunk/textproc/kibana42/ trunk/textproc/kibana42/Makefile trunk/textproc/kibana42/distinfo trunk/textproc/kibana42/files/ trunk/textproc/kibana42/files/kibana.in trunk/textproc/kibana42/pkg-descr trunk/textproc/kibana42/pkg-plist trunk/textproc/kibana43/ trunk/textproc/kibana43/Makefile trunk/textproc/kibana43/distinfo trunk/textproc/kibana43/pkg-descr trunk/textproc/kibana43/pkg-plist trunk/textproc/kibana44/ trunk/textproc/kibana44/Makefile trunk/textproc/kibana44/distinfo trunk/textproc/kibana44/pkg-descr trunk/textproc/kibana44/pkg-plist Added: trunk/textproc/kibana42/Makefile =================================================================== --- trunk/textproc/kibana42/Makefile (rev 0) +++ trunk/textproc/kibana42/Makefile 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,34 @@ +# Created by: Sergey Kozlov +# $FreeBSD: head/textproc/kibana42/Makefile 411098 2016-03-14 16:10:26Z feld $ +# $MidnightBSD$ + +PORTNAME= kibana +PORTVERSION?= 4.2.2 +DISTVERSIONSUFFIX= -linux-x86 +PORTREVISION?= 0 +CATEGORIES= textproc www +MASTER_SITES= https://download.elastic.co/kibana/kibana/ \ + http://download.elastic.co/kibana/kibana/ +PKGNAMESUFFIX?= 42 + +MAINTAINER= ports at MidnightBSD.org +COMMENT= Browser based analytics and search interface to ElasticSearch + +LICENSE= apache2 + +RUN_DEPENDS= node012>=0:${PORTSDIR}/www/node012 + +NO_BUILD= yes +NO_ARCH= yes +WWWDIR= ${PREFIX}/www/${PORTNAME}${PKGNAMESUFFIX} +USE_RC_SUBR= ${PORTNAME} + +do-install: + ${CP} ${WRKSRC}/config/kibana.yml ${STAGEDIR}${PREFIX}/etc/kibana.yml.sample + ${MKDIR} ${STAGEDIR}${WWWDIR} + cd ${WRKSRC} && \ + ${RM} -r bin config node && \ + ${RM} -r optimize/* && \ + ${COPYTREE_SHARE} . ${STAGEDIR}${WWWDIR} + +.include Property changes on: trunk/textproc/kibana42/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana42/distinfo =================================================================== --- trunk/textproc/kibana42/distinfo (rev 0) +++ trunk/textproc/kibana42/distinfo 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,2 @@ +SHA256 (kibana-4.2.2-linux-x86.tar.gz) = c0644e435fbf304dc418184bcf9e96886f93bb7c01cd71c99e5fa5cca42b05d8 +SIZE (kibana-4.2.2-linux-x86.tar.gz) = 30043893 Property changes on: trunk/textproc/kibana42/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana42/files/kibana.in =================================================================== --- trunk/textproc/kibana42/files/kibana.in (rev 0) +++ trunk/textproc/kibana42/files/kibana.in 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,42 @@ +#!/bin/sh +# +# $FreeBSD: head/textproc/kibana42/files/kibana.in 402633 2015-11-29 23:49:44Z junovitch $ +# + +# PROVIDE: kibana +# REQUIRE: DAEMON +# KEYWORD: shutdown + +. /etc/rc.subr + +name=kibana +rcvar=kibana_enable + +load_rc_config $name + +: ${kibana_enable:="NO"} +: ${kibana_config:="%%PREFIX%%/etc/kibana.yml"} +: ${kibana_user:="www"} +: ${kibana_group:="www"} +: ${kibana_log:="/var/log/kibana.log"} + +required_files="${kibana_config}" +pidfile="/var/run/${name}/${name}.pid" +start_precmd="kibana_precmd" +procname="%%LOCALBASE%%/bin/node" +command="/usr/sbin/daemon" +command_args="-f -p ${pidfile} env BABEL_DISABLE_CACHE=1 ${procname} %%WWWDIR%%/src/cli serve --config ${kibana_config} --log-file ${kibana_log}" + +kibana_precmd() +{ + if [ ! -d $(dirname ${pidfile}) ]; then + mkdir $(dirname ${pidfile}) + chown ${kibana_user}:${kibana_group} $(dirname ${pidfile}) + fi + + if [ ! -f ${kibana_log} ]; then + install -o ${kibana_user} -g ${kibana_group} -m 640 /dev/null ${kibana_log} + fi +} + +run_rc_command "$1" Property changes on: trunk/textproc/kibana42/files/kibana.in ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana42/pkg-descr =================================================================== --- trunk/textproc/kibana42/pkg-descr (rev 0) +++ trunk/textproc/kibana42/pkg-descr 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,8 @@ +Kibana is an open source (Apache Licensed), browser based analytics and search +dashboard for Elasticsearch. Kibana is a snap to setup and start using. Kibana +strives to be easy to get started with, while also being flexible and powerful, +just like Elasticsearch. + +Kibana 4.2 is compatible with Elasticsearch 2.0.x. + +WWW: https://www.elastic.co/products/kibana Property changes on: trunk/textproc/kibana42/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana42/pkg-plist =================================================================== --- trunk/textproc/kibana42/pkg-plist (rev 0) +++ trunk/textproc/kibana42/pkg-plist 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,11757 @@ + at preunexec rm -rf %D/%%WWWDIR%%/optimize/* 2>&1 >/dev/null || true + at sample etc/kibana.yml.sample +%%WWWDIR%%/LICENSE.txt +%%WWWDIR%%/README.txt +%%WWWDIR%%/node_modules/.bin/autoprefixer +%%WWWDIR%%/node_modules/.bin/babel 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+native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana43/Makefile =================================================================== --- trunk/textproc/kibana43/Makefile (rev 0) +++ trunk/textproc/kibana43/Makefile 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,12 @@ +# Created by: Sergey Kozlov +# $FreeBSD: head/textproc/kibana43/Makefile 411098 2016-03-14 16:10:26Z feld $ +# $MidnightBSD$ + +PORTVERSION= 4.3.2 +PORTREVISION= 1 +PKGNAMESUFFIX= 43 +MASTERDIR= ${.CURDIR}/../kibana42 +PKGDIR= ${.CURDIR} +DISTINFO_FILE= ${.CURDIR}/distinfo + +.include "${MASTERDIR}/Makefile" Property changes on: trunk/textproc/kibana43/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana43/distinfo =================================================================== --- trunk/textproc/kibana43/distinfo (rev 0) +++ trunk/textproc/kibana43/distinfo 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,2 @@ +SHA256 (kibana-4.3.2-linux-x86.tar.gz) = 5b95c261840fa791b5069a88d211777b16ee0fca46153ab3f6330f9eb8e7364e +SIZE (kibana-4.3.2-linux-x86.tar.gz) = 29978015 Property changes on: trunk/textproc/kibana43/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana43/pkg-descr =================================================================== --- trunk/textproc/kibana43/pkg-descr (rev 0) +++ trunk/textproc/kibana43/pkg-descr 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,8 @@ +Kibana is an open source (Apache Licensed), browser based analytics and search +dashboard for Elasticsearch. Kibana is a snap to setup and start using. Kibana +strives to be easy to get started with, while also being flexible and powerful, +just like Elasticsearch. + +Kibana 4.3 is compatible with Elasticsearch 2.1.x. + +WWW: https://www.elastic.co/products/kibana Property changes on: trunk/textproc/kibana43/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana43/pkg-plist =================================================================== --- trunk/textproc/kibana43/pkg-plist (rev 0) +++ trunk/textproc/kibana43/pkg-plist 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,11688 @@ + at preunexec rm -rf %D/%%WWWDIR%%/optimize/* 2>&1 >/dev/null || true + at sample etc/kibana.yml.sample +%%WWWDIR%%/LICENSE.txt +%%WWWDIR%%/README.txt +%%WWWDIR%%/node_modules/.bin/autoprefixer +%%WWWDIR%%/node_modules/.bin/babel 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dir %%WWWDIR%%/installedPlugins + at dir %%WWWDIR%%/node_modules/rimraf/node_modules + at dir(www,www) %%WWWDIR%%/optimize + at dir %%WWWDIR%%/src/ui/public/factories Property changes on: trunk/textproc/kibana43/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana44/Makefile =================================================================== --- trunk/textproc/kibana44/Makefile (rev 0) +++ trunk/textproc/kibana44/Makefile 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,12 @@ +# Created by: Sergey Kozlov +# $FreeBSD: head/textproc/kibana44/Makefile 411098 2016-03-14 16:10:26Z feld $ +# $MidnightBSD$ + +PORTVERSION= 4.4.1 +PORTREVISION= 1 +PKGNAMESUFFIX= 44 +MASTERDIR= ${.CURDIR}/../kibana42 +PKGDIR= ${.CURDIR} +DISTINFO_FILE= ${.CURDIR}/distinfo + +.include "${MASTERDIR}/Makefile" Property changes on: trunk/textproc/kibana44/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana44/distinfo =================================================================== --- trunk/textproc/kibana44/distinfo (rev 0) +++ trunk/textproc/kibana44/distinfo 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,2 @@ +SHA256 (kibana-4.4.1-linux-x86.tar.gz) = b0b413db7f50d4cd547a0682ee4475c2fbdef8a44c4b9c3f4a89181a6fe4d733 +SIZE (kibana-4.4.1-linux-x86.tar.gz) = 30207961 Property changes on: trunk/textproc/kibana44/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana44/pkg-descr =================================================================== --- trunk/textproc/kibana44/pkg-descr (rev 0) +++ trunk/textproc/kibana44/pkg-descr 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,8 @@ +Kibana is an open source (Apache Licensed), browser based analytics and search +dashboard for Elasticsearch. Kibana is a snap to setup and start using. Kibana +strives to be easy to get started with, while also being flexible and powerful, +just like Elasticsearch. + +Kibana 4.4 is compatible with Elasticsearch 2.2.x. + +WWW: https://www.elastic.co/products/kibana Property changes on: trunk/textproc/kibana44/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana44/pkg-plist =================================================================== --- trunk/textproc/kibana44/pkg-plist (rev 0) +++ trunk/textproc/kibana44/pkg-plist 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,11924 @@ + at preunexec rm -rf %D/%%WWWDIR%%/optimize/* 2>&1 >/dev/null || true + at sample etc/kibana.yml.sample +%%WWWDIR%%/LICENSE.txt +%%WWWDIR%%/README.txt +%%WWWDIR%%/node_modules/.bin/@bigfunger/decompress-zip +%%WWWDIR%%/node_modules/.bin/autoprefixer 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+%%WWWDIR%%/src/ui/views/chrome.jade +%%WWWDIR%%/src/ui/views/rootRedirect.jade +%%WWWDIR%%/src/ui/views/ui_app.jade +%%WWWDIR%%/src/utils/Collection.js +%%WWWDIR%%/src/utils/fromRoot.js +%%WWWDIR%%/src/utils/packageJson.js +%%WWWDIR%%/src/utils/pathContains.js +%%WWWDIR%%/webpackShims/ace.js +%%WWWDIR%%/webpackShims/angular.js +%%WWWDIR%%/webpackShims/elasticsearch.js +%%WWWDIR%%/webpackShims/gridster.js +%%WWWDIR%%/webpackShims/jquery.js +%%WWWDIR%%/webpackShims/leaflet.js +%%WWWDIR%%/webpackShims/lodash.js +%%WWWDIR%%/webpackShims/moment-timezone.js +%%WWWDIR%%/webpackShims/moment.js +%%WWWDIR%%/webpackShims/numeral.js +%%WWWDIR%%/webpackShims/sinon.js +%%WWWDIR%%/webpackShims/ui-bootstrap.js + at dir %%WWWDIR%%/installedPlugins + at dir %%WWWDIR%%/node_modules/rimraf/node_modules + at dir(www,www) %%WWWDIR%%/optimize + at dir %%WWWDIR%%/src/ui/public/factories Property changes on: trunk/textproc/kibana44/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From midnightbsd-cvs at midnightbsd.org Tue May 24 10:51:26 2016 From: midnightbsd-cvs at midnightbsd.org (midnightbsd-cvs at midnightbsd.org) Date: 24 May 2016 17:51:26 +0300 Subject: [Midnightbsd-cvs] hot g!rl want you! Message-ID: <978867192.201605241826@midnightbsd.org> are u available? i'm looking for a quickie tonight... i'm 22/f with a very tight pu$$y and a$$ my username is Viktoria83 my profile is HERE i'm waiting for u From laffer1 at midnightbsd.org Wed May 25 20:01:06 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:01:06 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21440] trunk/sysutils/p5-Unix-Processors: update to 2.044 Message-ID: <201605260001.u4Q016it060046@stargazer.midnightbsd.org> Revision: 21440 http://svnweb.midnightbsd.org/mports/?rev=21440 Author: laffer1 Date: 2016-05-25 20:01:06 -0400 (Wed, 25 May 2016) Log Message: ----------- update to 2.044 Modified Paths: -------------- trunk/sysutils/p5-Unix-Processors/Makefile trunk/sysutils/p5-Unix-Processors/distinfo trunk/sysutils/p5-Unix-Processors/pkg-plist Modified: trunk/sysutils/p5-Unix-Processors/Makefile =================================================================== --- trunk/sysutils/p5-Unix-Processors/Makefile 2016-05-23 02:01:56 UTC (rev 21439) +++ trunk/sysutils/p5-Unix-Processors/Makefile 2016-05-26 00:01:06 UTC (rev 21440) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= Unix-Processors -PORTVERSION= 2.043 +PORTVERSION= 2.044 CATEGORIES= sysutils perl5 MASTER_SITES= CPAN PKGNAMEPREFIX= p5- Modified: trunk/sysutils/p5-Unix-Processors/distinfo =================================================================== --- trunk/sysutils/p5-Unix-Processors/distinfo 2016-05-23 02:01:56 UTC (rev 21439) +++ trunk/sysutils/p5-Unix-Processors/distinfo 2016-05-26 00:01:06 UTC (rev 21440) @@ -1,2 +1,2 @@ -SHA256 (Unix-Processors-2.043.tar.gz) = d339ef950881d790ebc1346ba170c3fbb080ebe7b4150a3591e77975c438cc5f -SIZE (Unix-Processors-2.043.tar.gz) = 14942 +SHA256 (Unix-Processors-2.044.tar.gz) = 70091544f7e4eccf2ff2e34d16bfab2a9f8e3284a8567656df320258d07d5765 +SIZE (Unix-Processors-2.044.tar.gz) = 14467 Modified: trunk/sysutils/p5-Unix-Processors/pkg-plist =================================================================== --- trunk/sysutils/p5-Unix-Processors/pkg-plist 2016-05-23 02:01:56 UTC (rev 21439) +++ trunk/sysutils/p5-Unix-Processors/pkg-plist 2016-05-26 00:01:06 UTC (rev 21440) @@ -1,10 +1,5 @@ -%%SITE_PERL%%/%%PERL_ARCH%%/auto/Unix/Processors/.packlist -%%SITE_PERL%%/%%PERL_ARCH%%/Unix/Processors.pm -%%SITE_PERL%%/%%PERL_ARCH%%/Unix/Processors/Info.pm -%%SITE_PERL%%/%%PERL_ARCH%%/auto/Unix/Processors/Processors.so +%%SITE_ARCH%%/Unix/Processors.pm +%%SITE_ARCH%%/Unix/Processors/Info.pm +%%SITE_ARCH%%/auto/Unix/Processors/Processors.so %%PERL5_MAN3%%/Unix::Processors.3.gz %%PERL5_MAN3%%/Unix::Processors::Info.3.gz - at dirrm %%SITE_PERL%%/%%PERL_ARCH%%/Unix/Processors - at dirrm %%SITE_PERL%%/%%PERL_ARCH%%/auto/Unix/Processors - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/Unix - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/auto/Unix From laffer1 at midnightbsd.org Wed May 25 20:02:17 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:02:17 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21441] trunk/sysutils/p5-Sys-Hostname-Long: 1.5 Message-ID: <201605260002.u4Q02HGt060181@stargazer.midnightbsd.org> Revision: 21441 http://svnweb.midnightbsd.org/mports/?rev=21441 Author: laffer1 Date: 2016-05-25 20:02:17 -0400 (Wed, 25 May 2016) Log Message: ----------- 1.5 Modified Paths: -------------- trunk/sysutils/p5-Sys-Hostname-Long/Makefile trunk/sysutils/p5-Sys-Hostname-Long/distinfo trunk/sysutils/p5-Sys-Hostname-Long/pkg-descr trunk/sysutils/p5-Sys-Hostname-Long/pkg-plist Modified: trunk/sysutils/p5-Sys-Hostname-Long/Makefile =================================================================== --- trunk/sysutils/p5-Sys-Hostname-Long/Makefile 2016-05-26 00:01:06 UTC (rev 21440) +++ trunk/sysutils/p5-Sys-Hostname-Long/Makefile 2016-05-26 00:02:17 UTC (rev 21441) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= Sys-Hostname-Long -PORTVERSION= 1.4 +PORTVERSION= 1.5 CATEGORIES= sysutils perl5 MASTER_SITES= CPAN PKGNAMEPREFIX= p5- @@ -8,10 +8,9 @@ MAINTAINER= ports at MidnightBSD.org COMMENT= Try every conceivable way to get full hostname + LICENSE= perl PERL_CONFIGURE= yes -MAN3= Sys::Hostname::Long.3 - .include Modified: trunk/sysutils/p5-Sys-Hostname-Long/distinfo =================================================================== --- trunk/sysutils/p5-Sys-Hostname-Long/distinfo 2016-05-26 00:01:06 UTC (rev 21440) +++ trunk/sysutils/p5-Sys-Hostname-Long/distinfo 2016-05-26 00:02:17 UTC (rev 21441) @@ -1,2 +1,2 @@ -SHA256 (Sys-Hostname-Long-1.4.tar.gz) = 9db6c8cd3ca0ba8dbf19969ed0a936cecb7f555c1cc8077b08cf8bf78b10c143 -SIZE (Sys-Hostname-Long-1.4.tar.gz) = 4991 +SHA256 (Sys-Hostname-Long-1.5.tar.gz) = e9186df3706a877efd6149f2c711d6cf87dd6cf72f6ab935ba8121b225b265cb +SIZE (Sys-Hostname-Long-1.5.tar.gz) = 5474 Modified: trunk/sysutils/p5-Sys-Hostname-Long/pkg-descr =================================================================== --- trunk/sysutils/p5-Sys-Hostname-Long/pkg-descr 2016-05-26 00:01:06 UTC (rev 21440) +++ trunk/sysutils/p5-Sys-Hostname-Long/pkg-descr 2016-05-26 00:02:17 UTC (rev 21441) @@ -1,5 +1,5 @@ How to get the host full name in perl on multiple operating systems -(mac, windows, unix* etc) +(OS X, Windows, Unix* etc) Attempt via many methods to get the systems full name. The Sys::Hostname class is the best and standard way to get the system hostname. Modified: trunk/sysutils/p5-Sys-Hostname-Long/pkg-plist =================================================================== --- trunk/sysutils/p5-Sys-Hostname-Long/pkg-plist 2016-05-26 00:01:06 UTC (rev 21440) +++ trunk/sysutils/p5-Sys-Hostname-Long/pkg-plist 2016-05-26 00:02:17 UTC (rev 21441) @@ -1,7 +1,3 @@ %%SITE_PERL%%/Sys/Hostname/Long.pm %%SITE_PERL%%/Sys/Hostname/testall.pl - at dirrm %%SITE_PERL%%/%%PERL_ARCH%%/auto/Sys/Hostname/Long - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/auto/Sys/Hostname - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/auto/Sys - at dirrmtry %%SITE_PERL%%/Sys/Hostname - at dirrmtry %%SITE_PERL%%/Sys +%%PERL5_MAN3%%/Sys::Hostname::Long.3.gz From laffer1 at midnightbsd.org Wed May 25 20:03:07 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:03:07 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21442] trunk/sysutils/p5-File-Which: 1.21 Message-ID: <201605260003.u4Q037EB060287@stargazer.midnightbsd.org> Revision: 21442 http://svnweb.midnightbsd.org/mports/?rev=21442 Author: laffer1 Date: 2016-05-25 20:03:06 -0400 (Wed, 25 May 2016) Log Message: ----------- 1.21 Modified Paths: -------------- trunk/sysutils/p5-File-Which/Makefile trunk/sysutils/p5-File-Which/distinfo trunk/sysutils/p5-File-Which/pkg-plist Modified: trunk/sysutils/p5-File-Which/Makefile =================================================================== --- trunk/sysutils/p5-File-Which/Makefile 2016-05-26 00:02:17 UTC (rev 21441) +++ trunk/sysutils/p5-File-Which/Makefile 2016-05-26 00:03:06 UTC (rev 21442) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= File-Which -PORTVERSION= 1.09 +PORTVERSION= 1.21 CATEGORIES= sysutils perl5 MASTER_SITES= CPAN PKGNAMEPREFIX= p5- @@ -13,7 +13,4 @@ PERL_CONFIGURE= yes -MAN1= pwhich.1 -MAN3= File::Which.3 - .include Modified: trunk/sysutils/p5-File-Which/distinfo =================================================================== --- trunk/sysutils/p5-File-Which/distinfo 2016-05-26 00:02:17 UTC (rev 21441) +++ trunk/sysutils/p5-File-Which/distinfo 2016-05-26 00:03:06 UTC (rev 21442) @@ -1,2 +1,2 @@ -SHA256 (File-Which-1.09.tar.gz) = b72fec6590160737cba97293c094962adf4f7d44d9e68dde7062ecec13f4b2c3 -SIZE (File-Which-1.09.tar.gz) = 15637 +SHA256 (File-Which-1.21.tar.gz) = 9def5f10316bfd944e56b7f8a2501be1d44c288325309462aa9345e340854bcc +SIZE (File-Which-1.21.tar.gz) = 21456 Modified: trunk/sysutils/p5-File-Which/pkg-plist =================================================================== --- trunk/sysutils/p5-File-Which/pkg-plist 2016-05-26 00:02:17 UTC (rev 21441) +++ trunk/sysutils/p5-File-Which/pkg-plist 2016-05-26 00:03:06 UTC (rev 21442) @@ -1,5 +1,2 @@ -bin/pwhich %%SITE_PERL%%/File/Which.pm - at dirrm %%SITE_PERL%%/%%PERL_ARCH%%/auto/File/Which - at dirrmtry %%SITE_PERL%%/%%PERL_ARCH%%/auto/File - at dirrmtry %%SITE_PERL%%/File +%%PERL5_MAN3%%/File::Which.3.gz From laffer1 at midnightbsd.org Wed May 25 20:05:51 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:05:51 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21443] trunk/sysutils/synergy: 1.7.5 Message-ID: <201605260005.u4Q05pPC060835@stargazer.midnightbsd.org> Revision: 21443 http://svnweb.midnightbsd.org/mports/?rev=21443 Author: laffer1 Date: 2016-05-25 20:05:51 -0400 (Wed, 25 May 2016) Log Message: ----------- 1.7.5 Modified Paths: -------------- trunk/sysutils/synergy/Makefile trunk/sysutils/synergy/distinfo trunk/sysutils/synergy/files/patch-CMakeLists.txt Modified: trunk/sysutils/synergy/Makefile =================================================================== --- trunk/sysutils/synergy/Makefile 2016-05-26 00:03:06 UTC (rev 21442) +++ trunk/sysutils/synergy/Makefile 2016-05-26 00:05:51 UTC (rev 21443) @@ -2,7 +2,7 @@ # $FreeBSD: ports/sysutils/synergy/Makefile,v 1.14 2007/07/25 01:25:03 kevlo Exp $ PORTNAME= synergy -PORTVERSION= 1.7.4 +PORTVERSION= 1.7.5 CATEGORIES= sysutils MAINTAINER= ports at MidnightBSD.org Modified: trunk/sysutils/synergy/distinfo =================================================================== --- trunk/sysutils/synergy/distinfo 2016-05-26 00:03:06 UTC (rev 21442) +++ trunk/sysutils/synergy/distinfo 2016-05-26 00:05:51 UTC (rev 21443) @@ -1,2 +1,2 @@ -SHA256 (synergy-v1.7.4-stable_GH0.tar.gz) = 215dc3918b9f3ddfb57cc963f8df6751e5e834fd90c0a8b2767091589b012bdf -SIZE (synergy-v1.7.4-stable_GH0.tar.gz) = 13665193 +SHA256 (synergy-v1.7.5-stable_GH0.tar.gz) = b50c79f5c8aca2048cb0e11ba37f75722d1acdda23b0352e25ad66aff999f192 +SIZE (synergy-v1.7.5-stable_GH0.tar.gz) = 13668296 Modified: trunk/sysutils/synergy/files/patch-CMakeLists.txt =================================================================== --- trunk/sysutils/synergy/files/patch-CMakeLists.txt 2016-05-26 00:03:06 UTC (rev 21442) +++ trunk/sysutils/synergy/files/patch-CMakeLists.txt 2016-05-26 00:05:51 UTC (rev 21443) @@ -1,12 +1,12 @@ ---- CMakeLists.txt.orig 2015-05-26 23:56:21.000000000 +0800 -+++ CMakeLists.txt 2015-08-03 14:02:26.524577000 +0800 -@@ -74,10 +74,6 @@ +--- CMakeLists.txt.orig 2016-01-11 08:43:40.989031000 -0800 ++++ CMakeLists.txt 2016-01-11 08:44:16.000036000 -0800 +@@ -75,10 +75,6 @@ # Depending on the platform, pass in the required defines. if (UNIX) - # warnings as errors: - # we have a problem with people checking in code with warnings. -- set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Werror") +- set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Werror -Wno-unused-local-typedef") - if (NOT APPLE) set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fPIC") From laffer1 at midnightbsd.org Wed May 25 20:08:17 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:08:17 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21444] trunk/dns/bind99: bind 9.9.8P4 Message-ID: <201605260008.u4Q08Hs9061008@stargazer.midnightbsd.org> Revision: 21444 http://svnweb.midnightbsd.org/mports/?rev=21444 Author: laffer1 Date: 2016-05-25 20:08:17 -0400 (Wed, 25 May 2016) Log Message: ----------- bind 9.9.8P4 Modified Paths: -------------- trunk/dns/bind99/Makefile trunk/dns/bind99/distinfo Modified: trunk/dns/bind99/Makefile =================================================================== --- trunk/dns/bind99/Makefile 2016-05-26 00:05:51 UTC (rev 21443) +++ trunk/dns/bind99/Makefile 2016-05-26 00:08:17 UTC (rev 21444) @@ -3,7 +3,7 @@ PORTNAME= bind PORTVERSION= ${ISCVERSION:S/-P/P/} -PORTREVISION= 4 +PORTREVISION= 5 CATEGORIES= dns net ipv6 MASTER_SITES= ISC/bind9/${ISCVERSION} PKGNAMESUFFIX= 99 @@ -15,7 +15,7 @@ LICENSE= iscl # ISC releases things like 9.8.0-P1, which our versioning doesn't like -ISCVERSION= 9.9.8-P3 +ISCVERSION= 9.9.8-P4 MAKE_JOBS_UNSAFE= yes Modified: trunk/dns/bind99/distinfo =================================================================== --- trunk/dns/bind99/distinfo 2016-05-26 00:05:51 UTC (rev 21443) +++ trunk/dns/bind99/distinfo 2016-05-26 00:08:17 UTC (rev 21444) @@ -1,2 +1,4 @@ -SHA256 (bind-9.9.8-P3.tar.gz) = 6a489f98dffaf31cfd8b572aa5cc345e8d775758488a4541f2f0c974c8090a07 -SIZE (bind-9.9.8-P3.tar.gz) = 7998476 +SHA256 (bind-9.9.8-P4.tar.gz) = 5ed0b852e4d1dc90e10751c7fa70a9ee29a619bad61d97250eac8161009d89f2 +SIZE (bind-9.9.8-P4.tar.gz) = 7999697 +SHA256 (9.9.8-P4-rpz2+rl.14038.05.patch.xz) = 5415559171c03a9a02e31284552a4888911eeb692d57def8d631b7d0564dc5f0 +SIZE (9.9.8-P4-rpz2+rl.14038.05.patch.xz) = 39240 From laffer1 at midnightbsd.org Wed May 25 20:11:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:11:00 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21445] trunk/dns/bind910: bind 9.10.3 p4 Message-ID: <201605260011.u4Q0B0Bt061535@stargazer.midnightbsd.org> Revision: 21445 http://svnweb.midnightbsd.org/mports/?rev=21445 Author: laffer1 Date: 2016-05-25 20:11:00 -0400 (Wed, 25 May 2016) Log Message: ----------- bind 9.10.3 p4 Modified Paths: -------------- trunk/dns/bind910/Makefile trunk/dns/bind910/distinfo Modified: trunk/dns/bind910/Makefile =================================================================== --- trunk/dns/bind910/Makefile 2016-05-26 00:08:17 UTC (rev 21444) +++ trunk/dns/bind910/Makefile 2016-05-26 00:11:00 UTC (rev 21445) @@ -5,10 +5,10 @@ PORTVERSION= ${ISCVERSION:S/-P/P/} .if defined(BIND_TOOLS_SLAVE) # dns/bind-tools here -PORTREVISION= 1 +PORTREVISION= 2 .else # dns/bind910 here -PORTREVISION= 2 +PORTREVISION= 3 .endif CATEGORIES= dns net ipv6 MASTER_SITES= ISC/bind9/${ISCVERSION} @@ -29,7 +29,7 @@ LICENSE= iscl # ISC releases things like 9.8.0-P1, which our versioning doesn't like -ISCVERSION= 9.10.3-P3 +ISCVERSION= 9.10.3-P4 MAKE_JOBS_UNSAFE= yes Modified: trunk/dns/bind910/distinfo =================================================================== --- trunk/dns/bind910/distinfo 2016-05-26 00:08:17 UTC (rev 21444) +++ trunk/dns/bind910/distinfo 2016-05-26 00:11:00 UTC (rev 21445) @@ -1,2 +1,2 @@ -SHA256 (bind-9.10.3-P3.tar.gz) = 690810d1fbb72afa629e74638d19cd44e28d2b2e5eb63f55c705ad85d1a4cb83 -SIZE (bind-9.10.3-P3.tar.gz) = 8527540 +SHA256 (bind-9.10.3-P4.tar.gz) = 2ac044b5fbdf45fb45107af0df961b3b7cb5262a3bf1948ed3fe7a170dd13e3e +SIZE (bind-9.10.3-P4.tar.gz) = 8529535 From laffer1 at midnightbsd.org Wed May 25 20:12:17 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:12:17 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21446] trunk/dns/bindgraph: bindgraph 0.3 Message-ID: <201605260012.u4Q0CHoW061641@stargazer.midnightbsd.org> Revision: 21446 http://svnweb.midnightbsd.org/mports/?rev=21446 Author: laffer1 Date: 2016-05-25 20:12:16 -0400 (Wed, 25 May 2016) Log Message: ----------- bindgraph 0.3 Modified Paths: -------------- trunk/dns/bindgraph/Makefile trunk/dns/bindgraph/distinfo Modified: trunk/dns/bindgraph/Makefile =================================================================== --- trunk/dns/bindgraph/Makefile 2016-05-26 00:11:00 UTC (rev 21445) +++ trunk/dns/bindgraph/Makefile 2016-05-26 00:12:16 UTC (rev 21446) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= bindgraph -PORTVERSION= 0.2 +PORTVERSION= 0.3 PORTREVISION= 0 CATEGORIES= dns MASTER_SITES= http://www.linux.it/~md/software/ Modified: trunk/dns/bindgraph/distinfo =================================================================== --- trunk/dns/bindgraph/distinfo 2016-05-26 00:11:00 UTC (rev 21445) +++ trunk/dns/bindgraph/distinfo 2016-05-26 00:12:16 UTC (rev 21446) @@ -1,2 +1,2 @@ -SHA256 (bindgraph-0.2.tgz) = 680ca9a73a9c06e3c4281f52eb7af95871d69f909642ca490d2da437c522bff6 -SIZE (bindgraph-0.2.tgz) = 15808 +SHA256 (bindgraph-0.3.tgz) = 9aa7052da09cb242f107b0bfba09c4b62d337a29a1c9078aae6350efe90ef1fc +SIZE (bindgraph-0.3.tgz) = 16106 From laffer1 at midnightbsd.org Wed May 25 20:14:39 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:14:39 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21447] trunk/dns/mDNSResponder_nss: mDNS responder 576.30.4 Message-ID: <201605260014.u4Q0Ed5A061768@stargazer.midnightbsd.org> Revision: 21447 http://svnweb.midnightbsd.org/mports/?rev=21447 Author: laffer1 Date: 2016-05-25 20:14:39 -0400 (Wed, 25 May 2016) Log Message: ----------- mDNS responder 576.30.4 Modified Paths: -------------- trunk/dns/mDNSResponder_nss/Makefile trunk/dns/mDNSResponder_nss/distinfo trunk/dns/mDNSResponder_nss/files/patch-mDNSPosix__nss_mdns.c Modified: trunk/dns/mDNSResponder_nss/Makefile =================================================================== --- trunk/dns/mDNSResponder_nss/Makefile 2016-05-26 00:12:16 UTC (rev 21446) +++ trunk/dns/mDNSResponder_nss/Makefile 2016-05-26 00:14:39 UTC (rev 21447) @@ -1,10 +1,10 @@ # $MidnightBSD$ -PORTNAME= mDNSResponder_nss -PORTVERSION= 567 +PORTNAME= mDNSResponder +PORTVERSION= 576.30.4 CATEGORIES= dns net MASTER_SITES= http://opensource.apple.com/tarballs/mDNSResponder/ -DISTNAME= ${PORTNAME:S/_nss//}-${PORTVERSION} +PKGNAMESUFFIX= _nss MAINTAINER= ports at MidnightBSD.org COMMENT= Apple mDNS responder - BSD nsswitch module Modified: trunk/dns/mDNSResponder_nss/distinfo =================================================================== --- trunk/dns/mDNSResponder_nss/distinfo 2016-05-26 00:12:16 UTC (rev 21446) +++ trunk/dns/mDNSResponder_nss/distinfo 2016-05-26 00:14:39 UTC (rev 21447) @@ -1,2 +1,2 @@ -SHA256 (mDNSResponder-567.tar.gz) = 3239d9bb1e1e017be1ae12cff90802194b6e0312de628a1f324530b00b833018 -SIZE (mDNSResponder-567.tar.gz) = 2143110 +SHA256 (mDNSResponder-576.30.4.tar.gz) = 4737cb51378377e11d0edb7bcdd1bec79cbdaa7b27ea09c13e3006e58f8d92c0 +SIZE (mDNSResponder-576.30.4.tar.gz) = 2157791 Modified: trunk/dns/mDNSResponder_nss/files/patch-mDNSPosix__nss_mdns.c =================================================================== --- trunk/dns/mDNSResponder_nss/files/patch-mDNSPosix__nss_mdns.c 2016-05-26 00:12:16 UTC (rev 21446) +++ trunk/dns/mDNSResponder_nss/files/patch-mDNSPosix__nss_mdns.c 2016-05-26 00:14:39 UTC (rev 21447) @@ -1,6 +1,6 @@ ---- ./mDNSPosix/nss_mdns.c.orig 2012-04-15 08:07:19.000000000 +0200 -+++ ./mDNSPosix/nss_mdns.c 2013-11-05 11:00:14.000000000 +0100 -@@ -379,7 +379,18 @@ +--- mDNSPosix/nss_mdns.c.orig 2012-04-15 06:07:19 UTC ++++ mDNSPosix/nss_mdns.c +@@ -379,7 +379,18 @@ init_config (); #define ENTNAME hostent #define DATABASE "hosts" @@ -20,7 +20,7 @@ // For nss_status #include // For hostent -@@ -1684,7 +1695,7 @@ +@@ -1684,7 +1695,7 @@ is_applicable_addr ( //---------- // Types and Constants From laffer1 at midnightbsd.org Wed May 25 20:17:34 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:17:34 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21448] trunk/dns/p5-Net-DNS: perl Net::DNS 1.05 Message-ID: <201605260017.u4Q0HYGw062285@stargazer.midnightbsd.org> Revision: 21448 http://svnweb.midnightbsd.org/mports/?rev=21448 Author: laffer1 Date: 2016-05-25 20:17:34 -0400 (Wed, 25 May 2016) Log Message: ----------- perl Net::DNS 1.05 Modified Paths: -------------- trunk/dns/p5-Net-DNS/Makefile trunk/dns/p5-Net-DNS/distinfo trunk/dns/p5-Net-DNS/pkg-plist Modified: trunk/dns/p5-Net-DNS/Makefile =================================================================== --- trunk/dns/p5-Net-DNS/Makefile 2016-05-26 00:14:39 UTC (rev 21447) +++ trunk/dns/p5-Net-DNS/Makefile 2016-05-26 00:17:34 UTC (rev 21448) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= Net-DNS -PORTVERSION= 1.01 +PORTVERSION= 1.05 CATEGORIES= dns net perl5 ipv6 MASTER_SITES= CPAN PKGNAMEPREFIX= p5- @@ -11,8 +11,7 @@ LICENSE= mit -BUILD_DEPENDS= p5-Digest-HMAC>=1.03:${PORTSDIR}/security/p5-Digest-HMAC \ - p5-MIME-Base32>=1.01:${PORTSDIR}/converters/p5-MIME-Base32 +BUILD_DEPENDS= p5-Digest-HMAC>=1.03:${PORTSDIR}/security/p5-Digest-HMAC RUN_DEPENDS:= ${BUILD_DEPENDS} TEST_DEPENDS= p5-Digest-BubbleBabble>=0:${PORTSDIR}/security/p5-Digest-BubbleBabble \ p5-Test-Pod>=0:${PORTSDIR}/devel/p5-Test-Pod @@ -31,9 +30,14 @@ GOST_RUN_DEPENDS= p5-Digest-GOST>=0.06:${PORTSDIR}/security/p5-Digest-GOST IDN_BUILD_DEPENDS= p5-Net-LibIDN>=0.12:${PORTSDIR}/dns/p5-Net-LibIDN IDN_RUN_DEPENDS= p5-Net-LibIDN>=0.12:${PORTSDIR}/dns/p5-Net-LibIDN -IPV6_BUILD_DEPENDS= p5-IO-Socket-INET6>=2.01:${PORTSDIR}/net/p5-IO-Socket-INET6 -IPV6_RUN_DEPENDS= p5-IO-Socket-INET6>=2.01:${PORTSDIR}/net/p5-IO-Socket-INET6 SSHFP_BUILD_DEPENDS= p5-Digest-BubbleBabble>=0.01:${PORTSDIR}/security/p5-Digest-BubbleBabble SSHFP_RUN_DEPENDS= p5-Digest-BubbleBabble>=0.01:${PORTSDIR}/security/p5-Digest-BubbleBabble -.include +.include + +.if ${PORT_OPTIONS:MIPV6} && ${PERL_LEVEL} < 502200 +BUILD_DEPENDS+= p5-IO-Socket-IP>=0.32:${PORTSDIR}/net/p5-IO-Socket-IP +RUN_DEPENDS+= p5-IO-Socket-IP>=0.32:${PORTSDIR}/net/p5-IO-Socket-IP +.endif + +.include Modified: trunk/dns/p5-Net-DNS/distinfo =================================================================== --- trunk/dns/p5-Net-DNS/distinfo 2016-05-26 00:14:39 UTC (rev 21447) +++ trunk/dns/p5-Net-DNS/distinfo 2016-05-26 00:17:34 UTC (rev 21448) @@ -1,2 +1,2 @@ -SHA256 (Net-DNS-1.01.tar.gz) = 8f96b80d46764993dbad92e22cf5fc869ecdc1d09018f2565440d528afd9d92a -SIZE (Net-DNS-1.01.tar.gz) = 239297 +SHA256 (Net-DNS-1.05.tar.gz) = 900198014110af96ebac34af019612dd2ddd6af30178600028c3c940d089d5c8 +SIZE (Net-DNS-1.05.tar.gz) = 253015 Modified: trunk/dns/p5-Net-DNS/pkg-plist =================================================================== --- trunk/dns/p5-Net-DNS/pkg-plist 2016-05-26 00:14:39 UTC (rev 21447) +++ trunk/dns/p5-Net-DNS/pkg-plist 2016-05-26 00:17:34 UTC (rev 21448) @@ -57,6 +57,7 @@ %%SITE_PERL%%/Net/DNS/RR/RRSIG.pm %%SITE_PERL%%/Net/DNS/RR/RT.pm %%SITE_PERL%%/Net/DNS/RR/SIG.pm +%%SITE_PERL%%/Net/DNS/RR/SMIMEA.pm %%SITE_PERL%%/Net/DNS/RR/SOA.pm %%SITE_PERL%%/Net/DNS/RR/SPF.pm %%SITE_PERL%%/Net/DNS/RR/SRV.pm @@ -137,6 +138,7 @@ %%PERL5_MAN3%%/Net::DNS::RR::RRSIG.3.gz %%PERL5_MAN3%%/Net::DNS::RR::RT.3.gz %%PERL5_MAN3%%/Net::DNS::RR::SIG.3.gz +%%PERL5_MAN3%%/Net::DNS::RR::SMIMEA.3.gz %%PERL5_MAN3%%/Net::DNS::RR::SOA.3.gz %%PERL5_MAN3%%/Net::DNS::RR::SPF.3.gz %%PERL5_MAN3%%/Net::DNS::RR::SRV.3.gz From laffer1 at midnightbsd.org Wed May 25 20:46:42 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:46:42 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21449] trunk/dns/unbound: unbound 1.5.8 Message-ID: <201605260046.u4Q0kgVV065320@stargazer.midnightbsd.org> Revision: 21449 http://svnweb.midnightbsd.org/mports/?rev=21449 Author: laffer1 Date: 2016-05-25 20:46:41 -0400 (Wed, 25 May 2016) Log Message: ----------- unbound 1.5.8 Modified Paths: -------------- trunk/dns/unbound/Makefile trunk/dns/unbound/distinfo trunk/dns/unbound/pkg-plist Modified: trunk/dns/unbound/Makefile =================================================================== --- trunk/dns/unbound/Makefile 2016-05-26 00:17:34 UTC (rev 21448) +++ trunk/dns/unbound/Makefile 2016-05-26 00:46:41 UTC (rev 21449) @@ -1,8 +1,8 @@ # $MidnightBSD$ PORTNAME= unbound -PORTVERSION= 1.5.3 -PORTREVISION= 1 +PORTVERSION= 1.5.8 +PORTREVISION= 0 CATEGORIES= dns MASTER_SITES= http://unbound.net/downloads/ @@ -29,13 +29,14 @@ ietf67-design-02.pdf requirements.txt PLIST_SUB+= PYTHON=${PYTHON} MUNIN=${MUNIN} -OPTIONS_DEFINE= THREADS PYTHON GOST ECDSA MUNIN DOCS LIBEVENT FILTER_AAAA +OPTIONS_SUB= yes +OPTIONS_DEFINE= THREADS PYTHON GOST ECDSA MUNIN_PLUGIN DOCS LIBEVENT FILTER_AAAA OPTIONS_DEFAULT=THREADS ECDSA LIBEVENT_DESC= Build against libevent GOST_DESC= Enable GOST support (requires OpenSSL >= 1.0) ECDSA_DESC= Enable ECDSA (elliptic curve) support (OpenSSL >= 1.0) -MUNIN_DESC= Install Munin plugin +MUNIN_PLUGIN_DESC= Install Munin plugin FILTER_AAAA_DESC= Build with AAAA filter functionality (contrib) .include @@ -71,9 +72,9 @@ CONFIGURE_ARGS+=--disable-ecdsa .endif -.if ${PORT_OPTIONS:MMUNIN} +.if ${PORT_OPTIONS:MMUNIN_PLUGIN} SUB_FILES+= pkg-message -MUNIN_ALL= hits queue memory by_type by_class by_opcode by_rcode \ +MUNIN_PLUGIN_ALL= hits queue memory by_type by_class by_opcode by_rcode \ by_flags histogram MUNIN= .else @@ -111,12 +112,12 @@ .if ${PORT_OPTIONS:MPYTHON} @${STRIP_CMD} ${STAGEDIR}${PYTHON_SITELIBDIR}/_unbound.so .endif -.if ${PORT_OPTIONS:MMUNIN} +.if ${PORT_OPTIONS:MMUNIN_PLUGIN} @${MKDIR} ${STAGEDIR}${PREFIX}/share/munin/plugins @${MKDIR} ${STAGEDIR}${PREFIX}/etc/munin/plugins @${INSTALL_SCRIPT} ${WRKDIR}/unbound-${PORTVERSION}/contrib/unbound_munin_\ ${STAGEDIR}${PREFIX}/share/munin/plugins/ - @for i in ${MUNIN_ALL}; do\ + @for i in ${MUNIN_PLUGIN_ALL}; do\ ${LN} -fs ${PREFIX}/share/munin/plugins/unbound_munin_\ ${STAGEDIR}${PREFIX}/etc/munin/plugins/unbound_munin_$$i ;\ done Modified: trunk/dns/unbound/distinfo =================================================================== --- trunk/dns/unbound/distinfo 2016-05-26 00:17:34 UTC (rev 21448) +++ trunk/dns/unbound/distinfo 2016-05-26 00:46:41 UTC (rev 21449) @@ -1,2 +1,2 @@ -SHA256 (unbound-1.5.3.tar.gz) = 76bdc875ed4d1d3f8e4cfe960e6df78ee5c6c7c18abac11331cf93a7ae129eca -SIZE (unbound-1.5.3.tar.gz) = 4821300 +SHA256 (unbound-1.5.8.tar.gz) = 33567a20f73e288f8daa4ec021fbb30fe1824b346b34f12677ad77899ecd09be +SIZE (unbound-1.5.8.tar.gz) = 4895649 Modified: trunk/dns/unbound/pkg-plist =================================================================== --- trunk/dns/unbound/pkg-plist 2016-05-26 00:17:34 UTC (rev 21448) +++ trunk/dns/unbound/pkg-plist 2016-05-26 00:46:41 UTC (rev 21449) @@ -1,9 +1,21 @@ -etc/unbound/unbound.conf.sample +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_class +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_flags +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_opcode +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_rcode +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_by_type +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_histogram +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_hits +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_memory +%%MUNIN_PLUGIN%%etc/munin/plugins/unbound_munin_queue + at sample %%ETCDIR%%/unbound.conf.sample include/unbound.h -lib/libunbound.so.2.3.6 +lib/libunbound.a +lib/libunbound.so lib/libunbound.so.2 -lib/libunbound.so -lib/libunbound.a +lib/libunbound.so.2.4.0 +%%PYTHON%%%%PYTHON_SITELIBDIR%%/_unbound.so +%%PYTHON%%%%PYTHON_SITELIBDIR%%/unbound.py +%%PYTHON%%%%PYTHON_SITELIBDIR%%/unboundmodule.py man/man1/unbound-host.1.gz man/man3/libunbound.3.gz man/man3/ub_cancel.3.gz @@ -48,17 +60,5 @@ sbin/unbound-control sbin/unbound-control-setup sbin/unbound-host -%%PYTHON%%%%PYTHON_SITELIBDIR%%/_unbound.so -%%PYTHON%%%%PYTHON_SITELIBDIR%%/unbound.py -%%PYTHON%%%%PYTHON_SITELIBDIR%%/unboundmodule.py -%%MUNIN%%etc/munin/plugins/unbound_munin_by_class -%%MUNIN%%etc/munin/plugins/unbound_munin_by_flags -%%MUNIN%%etc/munin/plugins/unbound_munin_by_opcode -%%MUNIN%%etc/munin/plugins/unbound_munin_by_rcode -%%MUNIN%%etc/munin/plugins/unbound_munin_by_type -%%MUNIN%%etc/munin/plugins/unbound_munin_histogram -%%MUNIN%%etc/munin/plugins/unbound_munin_hits -%%MUNIN%%etc/munin/plugins/unbound_munin_memory -%%MUNIN%%etc/munin/plugins/unbound_munin_queue -%%MUNIN%%share/munin/plugins/unbound_munin_ - at exec chown unbound %D/etc/unbound +%%MUNIN_PLUGIN%%share/munin/plugins/unbound_munin_ + at dir(unbound,,) %%ETCDIR%% From laffer1 at midnightbsd.org Wed May 25 20:57:23 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 20:57:23 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21450] trunk/java/openjdk6/Makefile: bump for cups update Message-ID: <201605260057.u4Q0vNJd066426@stargazer.midnightbsd.org> Revision: 21450 http://svnweb.midnightbsd.org/mports/?rev=21450 Author: laffer1 Date: 2016-05-25 20:57:23 -0400 (Wed, 25 May 2016) Log Message: ----------- bump for cups update Modified Paths: -------------- trunk/java/openjdk6/Makefile Modified: trunk/java/openjdk6/Makefile =================================================================== --- trunk/java/openjdk6/Makefile 2016-05-26 00:46:41 UTC (rev 21449) +++ trunk/java/openjdk6/Makefile 2016-05-26 00:57:23 UTC (rev 21450) @@ -2,12 +2,13 @@ PORTNAME= openjdk6 PORTVERSION= b36 +PORTREVISION= 1 PORTEPOCH= 1 CATEGORIES= java devel MASTER_SITES= APACHE/ant/binaries/:ant \ http://download.java.net/openjdk/jtreg/promoted/4.1/b05/:jtreg \ https://java.net/downloads/openjdk6/ \ - LOCAL/jkim + FREEBSD_LOCAL/jkim DISTNAME= openjdk-6-src-${PORTVERSION}-${OPENJDK_BUILDDATE} DISTFILES= ${ANTFILE}:ant \ ${DISTNAME}${EXTRACT_SUFX} @@ -20,7 +21,7 @@ BUILD_DEPENDS= ${LOCALBASE}/bin/zip:${PORTSDIR}/archivers/zip \ ${LOCALBASE}/bin/unzip:${PORTSDIR}/archivers/unzip \ - ${LOCALBASE}/include/cups/cups.h:${PORTSDIR}/print/cups-client + ${LOCALBASE}/include/cups/cups.h:${PORTSDIR}/print/cups LIB_DEPENDS= libfreetype.so:${PORTSDIR}/print/freetype2 RUN_DEPENDS= javavm:${PORTSDIR}/java/javavmwrapper \ ${LOCALBASE}/share/fonts/dejavu:${PORTSDIR}/x11-fonts/dejavu From laffer1 at midnightbsd.org Wed May 25 21:16:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:16:00 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21451] trunk/math/lapack: fix lapack make Message-ID: <201605260116.u4Q1G0kJ068689@stargazer.midnightbsd.org> Revision: 21451 http://svnweb.midnightbsd.org/mports/?rev=21451 Author: laffer1 Date: 2016-05-25 21:15:59 -0400 (Wed, 25 May 2016) Log Message: ----------- fix lapack make Modified Paths: -------------- trunk/math/lapack/Makefile trunk/math/lapack/distinfo trunk/math/lapack/files/manpages trunk/math/lapack/files/patch-SRC+Makefile trunk/math/lapack/files/patch-TESTING+LIN+Makefile trunk/math/lapack/files/patch-TESTING+Makefile trunk/math/lapack/pkg-plist Modified: trunk/math/lapack/Makefile =================================================================== --- trunk/math/lapack/Makefile 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/Makefile 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,8 +1,8 @@ # $MidnightBSD$ PORTNAME?= lapack -PORTVERSION= 3.4.2 -PORTREVISION= 1 +PORTVERSION= 3.5.0 +PORTREVISION= 0 CATEGORIES= math MASTER_SITES= NL/lapack/ DISTFILES= lapack-${PORTVERSION}.tgz @@ -12,11 +12,12 @@ DIST_SUBDIR= lapack MAINTAINER?= ports at MidnightBSD.org -COMMENT?= A library of Fortran 77 subroutines for linear algebra +COMMENT?= Library of Fortran 77 subroutines for linear algebra + LICENSE= bsd3 +LICENSE_FILE= ${WRKSRC}/LICENSE -USE_GCC= any -USE_FORTRAN= yes +USES= fortran OPTIONS_DEFINE= PROFILE SHARED STATIC OPTIONS_DEFAULT= SHARED STATIC @@ -25,11 +26,10 @@ STATIC_DESC= Build (non-PIC) archives MAKE_ENV= BLASLIB="${BLASLIB}" -MAKE_JOBS_SAFE= yes PLIST_SUB= SVERSION="${SVERSION}" -WRKSRC = ${WRKDIR}/lapack-${PORTVERSION} -WRKSRC_PROFILE = ${WRKSRC}_PROFILE +WRKSRC= ${WRKDIR}/lapack-${PORTVERSION} +WRKSRC_PROFILE= ${WRKSRC}_PROFILE WRKSRC_SHARED= ${WRKSRC}_SHARED WRKSRC_STATIC= ${WRKSRC} @@ -39,30 +39,42 @@ ALL_TARGET= blaslib BLASLIB= ../../libblas.a LIBS= blas -PLIST_SUB+= BLAS="" LAPACK="@comment " XLAPACK="@comment " +PLIST_SUB+= BLAS="" LAPACK="@comment " XLAPACK="@comment " LAPACKE="@comment " SVERSION= 2 TEST_TARGET= blas_testing +.elif defined(LAPACKE_SLAVEPORT) +ALL_TARGET= lapackelib +LAPACKELIB= liblapacke.a +LAPACKETMGLIB= liblapacke_tmg.a +MAKE_ENV+= LAPACKELIB="${LAPACKELIB}" LAPACKETMGLIB="${LAPACKETMGLIB}" +LIB_DEPENDS+= libblas.so:${PORTSDIR}/math/blas \ + liblapack.so:${PORTSDIR}/math/lapack +LIBS= lapacke lapacke_tmg +INCLS= lapacke lapacke_utils lapacke_mangling +PLIST_SUB+= BLAS="@comment " LAPACK="@comment " XLAPACK="@comment " LAPACKE="" +SVERSION= 1 .else ALL_TARGET= lib BLASLIB?= -L${LOCALBASE}/lib -lblas -LIB_DEPENDS+= blas.2:${PORTSDIR}/math/blas +LIB_DEPENDS+= libblas.so:${PORTSDIR}/math/blas LIBS= lapack tmglib SVERSION= 4 TEST_TARGET= lapack_testing .if defined(MAINTAINER_MODE) || defined(PACKAGE_BUILDING) S= ${PYTHON_CMD} -USE_PYTHON_BUILD= yes +USES+= python:build .else S= \# .endif .if defined(XLAPACK_SLAVEPORT) -LIB_DEPENDS+= xblas.0:${PORTSDIR}/math/xblas +LIB_DEPENDS+= libxblas.so:${PORTSDIR}/math/xblas MAKE_ENV+= USEXBLAS=yes XBLASLIB="${XBLASLIB}" P= x -PLIST_SUB+= BLAS="@comment " LAPACK="@comment " XLAPACK="" +PLIST_SUB+= BLAS="@comment " LAPACK="@comment " XLAPACK="" LAPACKE="@comment " XBLASLIB?= -L${LOCALBASE}/lib -lxblas .else -PLIST_SUB+= BLAS="@comment " LAPACK="" XLAPACK="@comment " +PLIST_FILES+= ${MAN3L:S|^|man/man3/|:S|$|.gz|} +PLIST_SUB+= BLAS="@comment " LAPACK="" XLAPACK="@comment " LAPACKE="@comment " .if defined(MAINTAINER_MODE) BUILD_DEPENDS += doxygen:${PORTSDIR}/devel/doxygen MAN_TARGET= build-manpages @@ -79,6 +91,10 @@ FFLAGS_PROFILE?= -pg FFLAGS_SHARED ?= ${PICFLAG} +.if ${PORT_OPTIONS:MPROFILE} +LDFLAGS+= -static +.endif + .if ${PORT_OPTIONS:MPROFILE} && !exists(/usr/lib/libc_p.a) IGNORE= you have chosen WITH_PROFILE, but have not installed the\ base system profiling libraries @@ -102,7 +118,9 @@ s@^(OPTS[[:blank:]]*=)(.*)@\1 $${FFLAGS} $${EXTRAFLAGS}@; \ s@^NOOPT[[:blank:]]*=.*@& $${EXTRAFLAGS}@; \ s@^(LOADOPTS[[:blank:]]*=)(.*)@\1 $${LDFLAGS} $${EXTRAFLAGS}@; \ - \@(BLAS|RAN)LIB[[:blank:]]*=@d;' \ + s@^(CC[[:blank:]]*=)(.*)@@; \ + s@^(CFLAGS[[:blank:]]*)(=)(.*)@\1 += $${EXTRAFLAGS}@; \ + \@(BLAS|LAPACKE|RAN)LIB[[:blank:]]*=@d;' \ ${WRKSRC}/make.inc.example > ${WRKSRC}/make.inc @${REINPLACE_CMD} -e 's@\./lapack_testing\.py@${S} &@' \ ${WRKSRC}/Makefile @@ -115,9 +133,9 @@ do-build: ${MAN_TARGET} build-profile build-shared build-static .for o in PROFILE SHARED STATIC -build-${o:L}: patch +build-${o:tl}: patch .if ${PORT_OPTIONS:M${o}} - ${PRINTF} "\n\nBuilding ${o:L} libraries:\n\n\n" + ${PRINTF} "\n\nBuilding ${o:tl} libraries:\n\n\n" cd ${WRKSRC_${o}}; ${SETENV} ${MAKE_ENV} EXTRAFLAGS="${FFLAGS_${o}}" \ ${MAKE} ${_MAKE_JOBS} ${MAKE_ARGS} ARCH="${AR}" ${ALL_TARGET} @@ -148,45 +166,50 @@ TESTS ?= test-profile .endif +.if !defined(LAPACKE_SLAVEPORT) check regression-test test: ${TESTS} - .for o in PROFILE SHARED STATIC -test-${o:L}: build-${o:L} +test-${o:tl}: build-${o:tl} .if ${PORT_OPTIONS:M${o}} - @${PRINTF} "\n\nTesting ${o:L} libraries:\n\n\n" + @${PRINTF} "\n\nTesting ${o:tl} libraries:\n\n\n" @cd ${WRKSRC_${o}}; ${SETENV} ${MAKE_ENV} EXTRAFLAGS="${FFLAGS_${o}}" \ ${MAKE} ${_MAKE_JOBS} ${MAKE_ARGS} ARCH="${AR}" ${TEST_TARGET} .if defined(BLAS_SLAVEPORT) @${CAT} ${WRKSRC_${o}}/BLAS/*.out .endif - .endif .endfor +.endif do-install: .for L in ${LIBS} .if ${PORT_OPTIONS:MSTATIC} - @${INSTALL_DATA} ${WRKSRC}/lib${L}.a ${PREFIX}/lib/lib${P}${L}.a + @${INSTALL_DATA} ${WRKSRC}/lib${L}.a ${STAGEDIR}${PREFIX}/lib/lib${P}${L}.a .endif .if ${PORT_OPTIONS:MSHARED} - @${INSTALL_DATA} ${WRKSRC_SHARED}/lib${L}.a ${PREFIX}/lib/lib${P}${L}_pic.a - @${INSTALL_DATA} ${WRKSRC_SHARED}/lib${P}${L}.so.${SVERSION} ${PREFIX}/lib - @${LN} -sf lib${P}${L}.so.${SVERSION} ${PREFIX}/lib/lib${P}${L}.so + @${INSTALL_DATA} ${WRKSRC_SHARED}/lib${L}.a ${STAGEDIR}${PREFIX}/lib/lib${P}${L}_pic.a + @${INSTALL_DATA} ${WRKSRC_SHARED}/lib${P}${L}.so.${SVERSION} ${STAGEDIR}${PREFIX}/lib + @${LN} -sf lib${P}${L}.so.${SVERSION} ${STAGEDIR}${PREFIX}/lib/lib${P}${L}.so .endif .if ${PORT_OPTIONS:MPROFILE} - @${INSTALL_DATA} ${WRKSRC_PROFILE}/lib${L}.a ${PREFIX}/lib/lib${P}${L}_p.a + @${INSTALL_DATA} ${WRKSRC_PROFILE}/lib${L}.a ${STAGEDIR}${PREFIX}/lib/lib${P}${L}_p.a .endif .endfor +.if defined(LAPACKE_SLAVEPORT) +.for I in ${INCLS} + @${INSTALL_DATA} ${WRKSRC}/lapacke/include/${I}.h ${STAGEDIR}${PREFIX}/include +.endfor +.endif .include -.if !(defined(BLAS_SLAVEPORT) || defined(XLAPACK_SLAVEPORT)) +.if !(defined(BLAS_SLAVEPORT) || defined(XLAPACK_SLAVEPORT) || defined(LAPACKE_SLAVEPORT)) .include "${FILESDIR}/manpages" post-install: - @cd ${WRKDIR}/man ; ${ECHO_CMD} ${MAN3:S|^|man3/|} \ - | ${XARGS} -J @ ${INSTALL_MAN} @ ${MAN3PREFIX}/man/man3 + @cd ${WRKDIR}/man ; ${ECHO_CMD} ${MAN3L:S|^|man3/|} \ + | ${XARGS} -J @ ${INSTALL_MAN} @ ${STAGEDIR}${MAN3PREFIX}/man/man3 .if defined(MAINTAINER_MODE) package-manpages: build-manpages @@ -193,7 +216,7 @@ @${RM} -f ${WRKDIR}/lapack-manpages-${PORTVERSION}.tar.gz ; \ cd ${WRKSRC}/DOCS/man; \ ${TAR} -czvf ${WRKDIR}/lapack-manpages-${PORTVERSION}.tar.gz \ - ${MAN3:S|^|man3/|} + ${MAN3L:S|^|man3/|} .endif .endif Modified: trunk/math/lapack/distinfo =================================================================== --- trunk/math/lapack/distinfo 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/distinfo 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,4 +1,4 @@ -SHA256 (lapack/lapack-3.4.2.tgz) = 60a65daaf16ec315034675942618a2230521ea7adf85eea788ee54841072faf0 -SIZE (lapack/lapack-3.4.2.tgz) = 6168281 -SHA256 (lapack/manpages-3.4.2.tgz) = 65181ed22a87cde3cfee3bc9e4135434e3ee9f5fc5651a37c0ca4e4b737254de -SIZE (lapack/manpages-3.4.2.tgz) = 1378304 +SHA256 (lapack/lapack-3.5.0.tgz) = 9ad8f0d3f3fb5521db49f2dd716463b8fb2b6bc9dc386a9956b8c6144f726352 +SIZE (lapack/lapack-3.5.0.tgz) = 6313139 +SHA256 (lapack/manpages-3.5.0.tgz) = 055da7402ea807cc16f6c50b71ac63d290f83a5f2885aa9f679b7ad11dd8903d +SIZE (lapack/manpages-3.5.0.tgz) = 1394730 Modified: trunk/math/lapack/files/manpages =================================================================== --- trunk/math/lapack/files/manpages 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/files/manpages 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,4 +1,4 @@ -MAN3= \ +MAN3L= \ INSTALL_ilaver.f.3 \ INSTALL_lsame.f.3 \ LAPACK_version.f.3 \ Modified: trunk/math/lapack/files/patch-SRC+Makefile =================================================================== --- trunk/math/lapack/files/patch-SRC+Makefile 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/files/patch-SRC+Makefile 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,6 +1,6 @@ ---- SRC/Makefile~ 2011-11-18 23:21:16.000000000 +0900 -+++ SRC/Makefile 2011-11-18 23:22:26.000000000 +0900 -@@ -154,7 +154,7 @@ +--- SRC/Makefile.orig 2015-01-15 16:32:42.000000000 +0100 ++++ SRC/Makefile 2015-01-15 16:33:52.000000000 +0100 +@@ -159,7 +159,7 @@ DSLASRC = spotrs.o sgetrs.o spotrf.o sgetrf.o @@ -9,7 +9,7 @@ SXLASRC = sgesvxx.o sgerfsx.o sla_gerfsx_extended.o sla_geamv.o \ sla_gercond.o sla_gerpvgrw.o ssysvxx.o ssyrfsx.o \ sla_syrfsx_extended.o sla_syamv.o sla_syrcond.o sla_syrpvgrw.o \ -@@ -162,7 +162,7 @@ +@@ -167,7 +167,7 @@ sla_porpvgrw.o sgbsvxx.o sgbrfsx.o sla_gbrfsx_extended.o \ sla_gbamv.o sla_gbrcond.o sla_gbrpvgrw.o sla_lin_berr.o slarscl2.o \ slascl2.o sla_wwaddw.o @@ -18,7 +18,7 @@ CLASRC = \ cbdsqr.o cgbbrd.o cgbcon.o cgbequ.o cgbrfs.o cgbsv.o cgbsvx.o \ -@@ -226,7 +226,7 @@ +@@ -238,7 +238,7 @@ cgeqrt.o cgeqrt2.o cgeqrt3.o cgemqrt.o \ ctpqrt.o ctpqrt2.o ctpmqrt.o ctprfb.o @@ -27,7 +27,7 @@ CXLASRC = cgesvxx.o cgerfsx.o cla_gerfsx_extended.o cla_geamv.o \ cla_gercond_c.o cla_gercond_x.o cla_gerpvgrw.o \ csysvxx.o csyrfsx.o cla_syrfsx_extended.o cla_syamv.o \ -@@ -238,7 +238,7 @@ +@@ -250,7 +250,7 @@ chesvxx.o cherfsx.o cla_herfsx_extended.o cla_heamv.o \ cla_hercond_c.o cla_hercond_x.o cla_herpvgrw.o \ cla_lin_berr.o clarscl2.o clascl2.o cla_wwaddw.o @@ -36,7 +36,7 @@ ZCLASRC = cpotrs.o cgetrs.o cpotrf.o cgetrf.o -@@ -302,7 +302,7 @@ +@@ -318,7 +318,7 @@ dgeqrt.o dgeqrt2.o dgeqrt3.o dgemqrt.o \ dtpqrt.o dtpqrt2.o dtpmqrt.o dtprfb.o @@ -45,7 +45,7 @@ DXLASRC = dgesvxx.o dgerfsx.o dla_gerfsx_extended.o dla_geamv.o \ dla_gercond.o dla_gerpvgrw.o dsysvxx.o dsyrfsx.o \ dla_syrfsx_extended.o dla_syamv.o dla_syrcond.o dla_syrpvgrw.o \ -@@ -310,7 +310,7 @@ +@@ -326,7 +326,7 @@ dla_porpvgrw.o dgbsvxx.o dgbrfsx.o dla_gbrfsx_extended.o \ dla_gbamv.o dla_gbrcond.o dla_gbrpvgrw.o dla_lin_berr.o dlarscl2.o \ dlascl2.o dla_wwaddw.o @@ -54,7 +54,7 @@ ZLASRC = \ zbdsqr.o zgbbrd.o zgbcon.o zgbequ.o zgbrfs.o zgbsv.o zgbsvx.o \ -@@ -379,7 +379,7 @@ +@@ -402,7 +402,7 @@ zgeqrt.o zgeqrt2.o zgeqrt3.o zgemqrt.o \ ztpqrt.o ztpqrt2.o ztpmqrt.o ztprfb.o @@ -63,7 +63,7 @@ ZXLASRC = zgesvxx.o zgerfsx.o zla_gerfsx_extended.o zla_geamv.o \ zla_gercond_c.o zla_gercond_x.o zla_gerpvgrw.o zsysvxx.o zsyrfsx.o \ zla_syrfsx_extended.o zla_syamv.o zla_syrcond_c.o zla_syrcond_x.o \ -@@ -389,14 +389,14 @@ +@@ -412,14 +412,14 @@ zla_gbrpvgrw.o zhesvxx.o zherfsx.o zla_herfsx_extended.o \ zla_heamv.o zla_hercond_c.o zla_hercond_x.o zla_herpvgrw.o \ zla_lin_berr.o zlarscl2.o zlascl2.o zla_wwaddw.o @@ -81,7 +81,7 @@ all: ../$(LAPACKLIB) -@@ -433,12 +433,12 @@ +@@ -456,12 +456,12 @@ $(ZLASRC): $(FRC) $(ZCLASRC): $(FRC) $(DSLASRC): $(FRC) Modified: trunk/math/lapack/files/patch-TESTING+LIN+Makefile =================================================================== --- trunk/math/lapack/files/patch-TESTING+LIN+Makefile 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/files/patch-TESTING+LIN+Makefile 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,5 +1,5 @@ ---- TESTING/LIN/Makefile~ 2011-11-01 07:21:11.000000000 +0900 -+++ TESTING/LIN/Makefile 2011-11-18 23:32:05.000000000 +0900 +--- TESTING/LIN/Makefile.orig 2015-01-15 16:35:28.000000000 +0100 ++++ TESTING/LIN/Makefile 2015-01-15 16:36:26.000000000 +0100 @@ -34,11 +34,6 @@ # ####################################################################### @@ -14,78 +14,69 @@ alasum.o alasvm.o chkxer.o icopy.o ilaenv.o xlaenv.o xerbla.o @@ -76,13 +71,13 @@ strt02.o strt03.o strt05.o strt06.o \ - stzt01.o stzt02.o sgennd.o + stzt01.o stzt02.o sgennd.o sqrt04.o sqrt05.o schkqrt.o serrqrt.o schkqrtp.o serrqrtp.o -ifdef USEXBLAS +.ifdef USEXBLAS SLINTST += serrvxx.o sdrvgex.o sdrvsyx.o serrgex.o sdrvgbx.o sdrvpox.o \ - sebchvxx.o serrsyx.o serrpox.o + sebchvxx.o serrsyx.o serrpox.o -else +.else SLINTST += serrvx.o sdrvge.o sdrvsy.o serrge.o sdrvgb.o sdrvpo.o \ - serrsy.o serrpo.o + serrsy.o serrpo.o -endif +.endif CLINTST = cchkaa.o \ cchkeq.o cchkgb.o cchkge.o cchkgt.o \ -@@ -116,13 +111,13 @@ - ctrt02.o ctrt03.o ctrt05.o ctrt06.o \ - ctzt01.o ctzt02.o sget06.o cgennd.o +@@ -117,13 +112,13 @@ + ctzt01.o ctzt02.o sget06.o cgennd.o \ + cqrt04.o cqrt05.o cchkqrt.o cerrqrt.o cchkqrtp.o cerrqrtp.o -ifdef USEXBLAS +.ifdef USEXBLAS - CLINTST += cerrvxx.o cdrvgex.o cdrvsyx.o cdrvgbx.o cerrgex.o cdrvpox.o cdrvhex.o \ - cerrpox.o cebchvxx.o cerrsyx.o cerrhex.o + CLINTST += cerrvxx.o cdrvgex.o cdrvsyx.o cdrvgbx.o cerrgex.o cdrvpox.o \ + cdrvhex.o cerrpox.o cebchvxx.o cerrsyx.o cerrhex.o -else +.else - CLINTST += cerrvx.o cdrvge.o cdrvsy.o cdrvgb.o cerrge.o cdrvpo.o cdrvhe.o \ - cerrpo.o cerrsy.o cerrhe.o + CLINTST += cerrvx.o cdrvge.o cdrvsy.o cdrvgb.o cerrge.o cdrvpo.o \ + cdrvhe.o cerrpo.o cerrsy.o cerrhe.o -endif +.endif DLINTST = dchkaa.o \ dchkeq.o dchkgb.o dchkge.o dchkgt.o \ -@@ -153,13 +148,13 @@ - dtrt02.o dtrt03.o dtrt05.o dtrt06.o \ - dtzt01.o dtzt02.o dgennd.o +@@ -155,13 +150,13 @@ + dtzt01.o dtzt02.o dgennd.o \ + dqrt04.o dqrt05.o dchkqrt.o derrqrt.o dchkqrtp.o derrqrtp.o -ifdef USEXBLAS +.ifdef USEXBLAS DLINTST += derrvxx.o ddrvgex.o ddrvsyx.o ddrvgbx.o derrgex.o ddrvpox.o derrpox.o \ - debchvxx.o derrsyx.o + debchvxx.o derrsyx.o -else +.else DLINTST += derrvx.o ddrvge.o ddrvsy.o ddrvgb.o derrge.o ddrvpo.o derrpo.o \ - derrsy.o + derrsy.o -endif +.endif ZLINTST = zchkaa.o \ zchkeq.o zchkgb.o zchkge.o zchkgt.o \ -@@ -193,13 +188,13 @@ - ztrt02.o ztrt03.o ztrt05.o ztrt06.o \ - ztzt01.o ztzt02.o dget06.o zgennd.o +@@ -196,13 +191,13 @@ + ztzt01.o ztzt02.o dget06.o zgennd.o \ + zqrt04.o zqrt05.o zchkqrt.o zerrqrt.o zchkqrtp.o zerrqrtp.o -ifdef USEXBLAS +.ifdef USEXBLAS ZLINTST += zerrvxx.o zdrvgex.o zdrvsyx.o zdrvgbx.o zerrgex.o zdrvpox.o zdrvhex.o \ - zerrpox.o zebchvxx.o zerrsyx.o zerrhex.o + zerrpox.o zebchvxx.o zerrsyx.o zerrhex.o -else +.else - ZLINTST += zerrvx.o zdrvge.o zdrvsy.o zdrvgb.o zerrge.o zdrvpo.o zdrvhe.o \ - zerrpo.o zerrsy.o zerrhe.o + ZLINTST += zerrvx.o zdrvge.o zdrvsy.o zdrvgb.o zerrge.o zdrvpo.o \ + zdrvhe.o zerrpo.o zerrsy.o zerrhe.o -endif +.endif DSLINTST = dchkab.o \ ddrvab.o ddrvac.o derrab.o derrac.o dget08.o \ -@@ -250,7 +245,7 @@ - ../../$(TMGLIB) ../../$(LAPACKLIB) $(XBLASLIB) $(BLASLIB) -o $@ - - xlintstd : $(ALINTST) $(DLINTST) $(DZLNTST) ../../$(LAPACKLIB) -- $(LOADER) $(LOADOPTS) $^ \ -+ $(LOADER) $(LOADOPTS) $(ALINTST) $(DLINTST) $(DZLNTST) \ - ../../$(TMGLIB) ../../$(LAPACKLIB) $(XBLASLIB) $(BLASLIB) -o $@ - - xlintstz : $(ALINTST) $(ZLINTST) $(DZLNTST) ../../$(LAPACKLIB) Modified: trunk/math/lapack/files/patch-TESTING+Makefile =================================================================== --- trunk/math/lapack/files/patch-TESTING+Makefile 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/files/patch-TESTING+Makefile 2016-05-26 01:15:59 UTC (rev 21451) @@ -1,5 +1,5 @@ ---- TESTING/Makefile~ 2011-11-18 23:12:35.000000000 +0900 -+++ TESTING/Makefile 2011-11-18 23:12:48.000000000 +0900 +--- TESTING/Makefile.orig 2015-01-15 16:34:38.000000000 +0100 ++++ TESTING/Makefile 2015-01-15 16:35:05.000000000 +0100 @@ -37,11 +37,6 @@ include ../make.inc Modified: trunk/math/lapack/pkg-plist =================================================================== --- trunk/math/lapack/pkg-plist 2016-05-26 00:57:23 UTC (rev 21450) +++ trunk/math/lapack/pkg-plist 2016-05-26 01:15:59 UTC (rev 21451) @@ -23,3 +23,16 @@ %%XLAPACK%%%%SHARED%%lib/libxtmglib.so %%XLAPACK%%%%SHARED%%lib/libxtmglib.so.%%SVERSION%% %%XLAPACK%%%%PROFILE%%lib/libxtmglib_p.a +%%LAPACKE%%include/lapacke.h +%%LAPACKE%%include/lapacke_utils.h +%%LAPACKE%%include/lapacke_mangling.h +%%LAPACKE%%%%STATIC%%lib/liblapacke.a +%%LAPACKE%%%%SHARED%%lib/liblapacke_pic.a +%%LAPACKE%%%%SHARED%%lib/liblapacke.so +%%LAPACKE%%%%SHARED%%lib/liblapacke.so.%%SVERSION%% +%%LAPACKE%%%%PROFILE%%lib/liblapacke_p.a +%%LAPACKE%%%%STATIC%%lib/liblapacke_tmg.a +%%LAPACKE%%%%SHARED%%lib/liblapacke_tmg_pic.a +%%LAPACKE%%%%SHARED%%lib/liblapacke_tmg.so +%%LAPACKE%%%%SHARED%%lib/liblapacke_tmg.so.%%SVERSION%% +%%LAPACKE%%%%PROFILE%%lib/liblapacke_tmg_p.a From laffer1 at midnightbsd.org Wed May 25 21:20:18 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:20:18 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21452] trunk/math/blas/Makefile: masterdir lapakc Message-ID: <201605260120.u4Q1KIrB069320@stargazer.midnightbsd.org> Revision: 21452 http://svnweb.midnightbsd.org/mports/?rev=21452 Author: laffer1 Date: 2016-05-25 21:20:18 -0400 (Wed, 25 May 2016) Log Message: ----------- masterdir lapakc Modified Paths: -------------- trunk/math/blas/Makefile Modified: trunk/math/blas/Makefile =================================================================== --- trunk/math/blas/Makefile 2016-05-26 01:15:59 UTC (rev 21451) +++ trunk/math/blas/Makefile 2016-05-26 01:20:18 UTC (rev 21452) @@ -1,59 +1,14 @@ # $MidnightBSD$ PORTNAME= blas -PORTVERSION= 1.0 PORTREVISION= 3 -CATEGORIES= math -MASTER_SITES= http://www.netlib.org/blas/ \ - http://www.mirrorservice.org/sites/netlib.bell-labs.com/netlib/blas/ \ - ftp://ftp.mirrorservice.org/sites/netlib.bell-labs.com/netlib/blas/ \ - http://netlib.sandia.gov/blas/ \ - http://www.netlib.no/netlib/blas/ -DISTNAME= ${PORTNAME} -EXTRACT_SUFX= .tgz MAINTAINER= ports at MidnightBSD.org -COMMENT= Basic Linear Algebra, level 1, 2, and 3 -LICENSE= unknown +COMMENT= Basic Linear Algebra Subroutines -FAKE_OPTS= trueprefix +DESCR= ${.CURDIR}/pkg-descr +BLAS_SLAVEPORT= yes -USE_LDCONFIG= yes -USE_FORTRAN= yes -WRKSRC= ${WRKDIR}/BLAS -SHLIB_MAJOR= 2 +MASTERDIR= ${.CURDIR}/../lapack -PLIST_FILES= lib/libblas.a lib/libblas.so lib/libblas.so.${SHLIB_MAJOR} - -LDFLAGS+= ${FFLAGS} -LDADD ?= -lgfortran -lm -SRCCONF= ${NONEXISTENT} -MAKE_ENV+= LDADD="${LDADD}" LDFLAGS="${LDFLAGS}" \ - SHLIB_MAJOR="${SHLIB_MAJOR}" SRCCONF="${SRCCONF}" -.for _u in AR NM RANLIB -MAKE_ENV+= ${_u}="${LOCALBASE}/bin/${_u:L}" -.endfor - -OPTIONS= PROFILE "Build and install a profiling library" Off - -.include - -.if defined(WITH_PROFILE) -.if defined(NOPROFILE) || defined(NO_PROFILE) || defined(WITHOUT_PROFILE) -IGNORE = you have defined WITH_PROFILE, but have also defined\ -WITHOUT_PROFILE, NOPROFILE, or NO_PROFILE -.elif !exists(/usr/lib/libc_p.a) -IGNORE = you have chosen WITH_PROFILE, but have not installed the\ -base system profiling libraries -.endif -PLIST_FILES+= lib/libblas_p.a -.else -MAKE_ENV+= NO_PROFILE= -.endif - -.include - -post-patch: - @${CP} ${FILESDIR}/makefile.lib ${WRKSRC}/Makefile - -.include +.include "${MASTERDIR}/Makefile" From laffer1 at midnightbsd.org Wed May 25 21:29:43 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:29:43 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21453] trunk/Mk/extensions/fortran.mk: update the fortran Message-ID: <201605260129.u4Q1Thwv070170@stargazer.midnightbsd.org> Revision: 21453 http://svnweb.midnightbsd.org/mports/?rev=21453 Author: laffer1 Date: 2016-05-25 21:29:42 -0400 (Wed, 25 May 2016) Log Message: ----------- update the fortran Modified Paths: -------------- trunk/Mk/extensions/fortran.mk Modified: trunk/Mk/extensions/fortran.mk =================================================================== --- trunk/Mk/extensions/fortran.mk 2016-05-26 01:20:18 UTC (rev 21452) +++ trunk/Mk/extensions/fortran.mk 2016-05-26 01:29:42 UTC (rev 21453) @@ -1,5 +1,47 @@ # $MidnightBSD$ +# $FreeBSD: head/Mk/Uses/fortran.mk 399326 2015-10-15 07:36:38Z bapt $ +# +# Fortran support +# +# Feature: fortran +# Usage: USES=fortran +# Valid ARGS: gcc (default), ifort +# -# All fortran logic is included in gcc.mk currently. +.if !defined(_INCLUDE_USES_FORTRAN_MK) +_INCLUDE_USES_FORTRAN_MK= yes -.include "gcc.mk" +.if empty(fortran_ARGS) +fortran_ARGS= gcc +.endif + +.if ${fortran_ARGS} == gcc +.include "${PORTSDIR}/Mk/components/default-versions.mk" +_GCC_VER= ${GCC_DEFAULT:S/.//} +.if ${GCC_DEFAULT} == ${LANG_GCC_IS} +BUILD_DEPENDS+= gfortran${_GCC_VER}:${PORTSDIR}/lang/gcc +RUN_DEPENDS+= gfortran${_GCC_VER}:${PORTSDIR}/lang/gcc +.else +BUILD_DEPENDS+= gfortran${_GCC_VER}:${PORTSDIR}/lang/gcc${_GCC_VER} +RUN_DEPENDS+= gfortran${_GCC_VER}:${PORTSDIR}/lang/gcc${_GCC_VER} +.endif +USE_BINUTILS= yes +F77= gfortran${_GCC_VER} +FC= gfortran${_GCC_VER} +FFLAGS+= -Wl,-rpath=${LOCALBASE}/lib/gcc${_GCC_VER} +FCFLAGS+= -Wl,-rpath=${LOCALBASE}/lib/gcc${_GCC_VER} +LDFLAGS+= -Wl,-rpath=${LOCALBASE}/lib/gcc${_GCC_VER} \ + -L${LOCALBASE}/lib/gcc${_GCC_VER} -B${LOCALBASE}/bin +.elif ${fortran_ARGS} == ifort +BUILD_DEPENDS+= ${LOCALBASE}/intel_fc_80/bin/ifort:${PORTSDIR}/lang/ifc +RUN_DEPENDS+= ${LOCALBASE}/intel_fc_80/bin/ifort:${PORTSDIR}/lang/ifc +F77= ${LOCALBASE}/intel_fc_80/bin/ifort +FC= ${LOCALBASE}/intel_fc_80/bin/ifort +.else +IGNORE= USES=fortran: invalid arguments: ${fortran_ARGS} +.endif + +CONFIGURE_ENV+= F77="${F77}" FC="${FC}" FFLAGS="${FFLAGS}" FCFLAGS="${FCFLAGS}" +MAKE_ENV+= F77="${F77}" FC="${FC}" FFLAGS="${FFLAGS}" FCFLAGS="${FCFLAGS}" + +.endif From laffer1 at midnightbsd.org Wed May 25 21:47:11 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:47:11 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21454] trunk/lang/gawk: 4.1.3 Message-ID: <201605260147.u4Q1lBee072496@stargazer.midnightbsd.org> Revision: 21454 http://svnweb.midnightbsd.org/mports/?rev=21454 Author: laffer1 Date: 2016-05-25 21:47:11 -0400 (Wed, 25 May 2016) Log Message: ----------- 4.1.3 Modified Paths: -------------- trunk/lang/gawk/Makefile trunk/lang/gawk/distinfo trunk/lang/gawk/pkg-plist Added Paths: ----------- trunk/lang/gawk/files/patch-Makefile.in Removed Paths: ------------- trunk/lang/gawk/files/patch-Makefile trunk/lang/gawk/files/patch-extension_Makefile.in Modified: trunk/lang/gawk/Makefile =================================================================== --- trunk/lang/gawk/Makefile 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/Makefile 2016-05-26 01:47:11 UTC (rev 21454) @@ -1,12 +1,12 @@ # $MidnightBSD$ PORTNAME= gawk -PORTVERSION= 4.1.1 +PORTVERSION= 4.1.3 CATEGORIES= lang MASTER_SITES= GNU MAINTAINER= ports at MidnightBSD.org -COMMENT= The GNU version of Awk +COMMENT= GNU version of Awk LICENSE= gpl3 Modified: trunk/lang/gawk/distinfo =================================================================== --- trunk/lang/gawk/distinfo 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/distinfo 2016-05-26 01:47:11 UTC (rev 21454) @@ -1,2 +1,2 @@ -SHA256 (gawk-4.1.1.tar.xz) = efd4c6aafb1ce996309fc903ceb625e7012221c464eb72483dbb23adef1ee8db -SIZE (gawk-4.1.1.tar.xz) = 2196904 +SHA256 (gawk-4.1.3.tar.xz) = e3cf55e91e31ea2845f8338bedd91e40671fc30e4d82ea147d220e687abda625 +SIZE (gawk-4.1.3.tar.xz) = 2311268 Deleted: trunk/lang/gawk/files/patch-Makefile =================================================================== --- trunk/lang/gawk/files/patch-Makefile 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/files/patch-Makefile 2016-05-26 01:47:11 UTC (rev 21454) @@ -1,11 +0,0 @@ ---- Makefile.in.orig 2014-04-08 18:12:38.000000000 +0200 -+++ Makefile.in 2014-04-21 14:23:45.000000000 +0200 -@@ -1151,7 +1151,7 @@ uninstall-am: uninstall-binPROGRAMS unin - install-exec-hook: - (cd $(DESTDIR)$(bindir); \ - $(LN) gawk$(EXEEXT) gawk-$(VERSION)$(EXEEXT) 2>/dev/null ; \ -- if [ ! -f awk ]; \ -+ if ! /usr/bin/which -s awk; \ - then $(LN_S) gawk$(EXEEXT) awk; \ - fi; exit 0) - Copied: trunk/lang/gawk/files/patch-Makefile.in (from rev 21439, trunk/lang/gawk/files/patch-Makefile) =================================================================== --- trunk/lang/gawk/files/patch-Makefile.in (rev 0) +++ trunk/lang/gawk/files/patch-Makefile.in 2016-05-26 01:47:11 UTC (rev 21454) @@ -0,0 +1,11 @@ +--- Makefile.in.orig 2014-04-08 18:12:38.000000000 +0200 ++++ Makefile.in 2014-04-21 14:23:45.000000000 +0200 +@@ -1151,7 +1151,7 @@ uninstall-am: uninstall-binPROGRAMS unin + install-exec-hook: + (cd $(DESTDIR)$(bindir); \ + $(LN) gawk$(EXEEXT) gawk-$(VERSION)$(EXEEXT) 2>/dev/null ; \ +- if [ ! -f awk ]; \ ++ if ! /usr/bin/which -s awk; \ + then $(LN_S) gawk$(EXEEXT) awk; \ + fi; exit 0) + Deleted: trunk/lang/gawk/files/patch-extension_Makefile.in =================================================================== --- trunk/lang/gawk/files/patch-extension_Makefile.in 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/files/patch-extension_Makefile.in 2016-05-26 01:47:11 UTC (rev 21454) @@ -1,12 +0,0 @@ ---- extension/Makefile.in.orig 2014-04-08 18:13:03.000000000 +0200 -+++ extension/Makefile.in 2014-04-21 14:26:04.000000000 +0200 -@@ -1230,9 +1230,6 @@ uninstall-man: uninstall-man3 - - - install-data-hook: -- for i in $(pkgextension_LTLIBRARIES) ; do \ -- $(RM) $(pkgextensiondir)/$$i ; \ -- done - - # Keep the uninstall check working: - uninstall-so: Modified: trunk/lang/gawk/pkg-plist =================================================================== --- trunk/lang/gawk/pkg-plist 2016-05-26 01:29:42 UTC (rev 21453) +++ trunk/lang/gawk/pkg-plist 2016-05-26 01:47:11 UTC (rev 21454) @@ -43,11 +43,13 @@ share/awk/noassign.awk share/awk/ord.awk share/awk/passwd.awk +share/awk/processarray.awk share/awk/quicksort.awk share/awk/readable.awk share/awk/readfile.awk share/awk/rewind.awk share/awk/round.awk +share/awk/shellquote.awk share/awk/strtonum.awk share/awk/walkarray.awk share/awk/zerofile.awk @@ -64,6 +66,3 @@ %%NLS%%share/locale/pl/LC_MESSAGES/gawk.mo %%NLS%%share/locale/sv/LC_MESSAGES/gawk.mo %%NLS%%share/locale/vi/LC_MESSAGES/gawk.mo - at dirrm share/awk - at dirrm libexec/awk - at dirrm lib/gawk From laffer1 at midnightbsd.org Wed May 25 21:47:50 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:47:50 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21455] trunk/lang/gawk/files/patch-Makefile.in: fixup patchset Message-ID: <201605260147.u4Q1loSX072585@stargazer.midnightbsd.org> Revision: 21455 http://svnweb.midnightbsd.org/mports/?rev=21455 Author: laffer1 Date: 2016-05-25 21:47:50 -0400 (Wed, 25 May 2016) Log Message: ----------- fixup patchset Modified Paths: -------------- trunk/lang/gawk/files/patch-Makefile.in Modified: trunk/lang/gawk/files/patch-Makefile.in =================================================================== --- trunk/lang/gawk/files/patch-Makefile.in 2016-05-26 01:47:11 UTC (rev 21454) +++ trunk/lang/gawk/files/patch-Makefile.in 2016-05-26 01:47:50 UTC (rev 21455) @@ -1,11 +1,11 @@ ---- Makefile.in.orig 2014-04-08 18:12:38.000000000 +0200 -+++ Makefile.in 2014-04-21 14:23:45.000000000 +0200 -@@ -1151,7 +1151,7 @@ uninstall-am: uninstall-binPROGRAMS unin - install-exec-hook: +--- Makefile.in.orig 2015-05-19 13:38:35 UTC ++++ Makefile.in +@@ -1178,7 +1178,7 @@ install-exec-hook: (cd $(DESTDIR)$(bindir); \ - $(LN) gawk$(EXEEXT) gawk-$(VERSION)$(EXEEXT) 2>/dev/null ; \ -- if [ ! -f awk ]; \ + name=`echo gawk | sed '$(transform)'` ; \ + $(LN) $${name}$(EXEEXT) gawk-$(VERSION)$(EXEEXT) 2>/dev/null ; \ +- if [ ! -f awk$(EXEEXT) ]; \ + if ! /usr/bin/which -s awk; \ - then $(LN_S) gawk$(EXEEXT) awk; \ + then $(LN_S) $${name}$(EXEEXT) awk$(EXEEXT); \ fi; exit 0) From laffer1 at midnightbsd.org Wed May 25 21:49:59 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 21:49:59 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21456] trunk/lang/cython: cython 0.23.4 Message-ID: <201605260149.u4Q1nxDB072718@stargazer.midnightbsd.org> Revision: 21456 http://svnweb.midnightbsd.org/mports/?rev=21456 Author: laffer1 Date: 2016-05-25 21:49:59 -0400 (Wed, 25 May 2016) Log Message: ----------- cython 0.23.4 Modified Paths: -------------- trunk/lang/cython/Makefile trunk/lang/cython/distinfo Modified: trunk/lang/cython/Makefile =================================================================== --- trunk/lang/cython/Makefile 2016-05-26 01:47:50 UTC (rev 21455) +++ trunk/lang/cython/Makefile 2016-05-26 01:49:59 UTC (rev 21456) @@ -1,7 +1,7 @@ # $MidnightBSD$ PORTNAME= cython -PORTVERSION= 0.23 +PORTVERSION= 0.23.4 CATEGORIES= lang python MASTER_SITES= http://www.cython.org/release/ \ CHEESESHOP Modified: trunk/lang/cython/distinfo =================================================================== --- trunk/lang/cython/distinfo 2016-05-26 01:47:50 UTC (rev 21455) +++ trunk/lang/cython/distinfo 2016-05-26 01:49:59 UTC (rev 21456) @@ -1,2 +1,2 @@ -SHA256 (Cython-0.23.tar.gz) = 9fd01e8301c24fb3ba0411ad8eb16f5d9f9f8e66b1281fbe7aba2a9bd9d343dc -SIZE (Cython-0.23.tar.gz) = 1621481 +SHA256 (Cython-0.23.4.tar.gz) = fec42fecee35d6cc02887f1eef4e4952c97402ed2800bfe41bbd9ed1a0730d8e +SIZE (Cython-0.23.4.tar.gz) = 1628326 From laffer1 at midnightbsd.org Wed May 25 23:43:56 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 23:43:56 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21457] trunk/textproc: add elasticsearch 2.x Message-ID: <201605260343.u4Q3huen085667@stargazer.midnightbsd.org> Revision: 21457 http://svnweb.midnightbsd.org/mports/?rev=21457 Author: laffer1 Date: 2016-05-25 23:43:55 -0400 (Wed, 25 May 2016) Log Message: ----------- add elasticsearch 2.x Modified Paths: -------------- trunk/textproc/Makefile Added Paths: ----------- trunk/textproc/elasticsearch2/ trunk/textproc/elasticsearch2/Makefile trunk/textproc/elasticsearch2/distinfo trunk/textproc/elasticsearch2/files/ trunk/textproc/elasticsearch2/files/elasticsearch.in trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml trunk/textproc/elasticsearch2/files/pkg-message.in trunk/textproc/elasticsearch2/pkg-descr trunk/textproc/elasticsearch2/pkg-plist Modified: trunk/textproc/Makefile =================================================================== --- trunk/textproc/Makefile 2016-05-26 01:49:59 UTC (rev 21456) +++ trunk/textproc/Makefile 2016-05-26 03:43:55 UTC (rev 21457) @@ -24,6 +24,7 @@ SUBDIR += easydiff SUBDIR += ebook-tools SUBDIR += elasticsearch +SUBDIR += elasticsearch2 SUBDIR += enchant SUBDIR += exempi SUBDIR += expat2 Added: trunk/textproc/elasticsearch2/Makefile =================================================================== --- trunk/textproc/elasticsearch2/Makefile (rev 0) +++ trunk/textproc/elasticsearch2/Makefile 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,85 @@ +# Created by: Tom Judge +# $FreeBSD: head/textproc/elasticsearch2/Makefile 407192 2016-01-25 06:37:37Z pi $ +# $MidnightBSD$ + +PORTNAME= elasticsearch +PORTVERSION= 2.1.1 +CATEGORIES= textproc java devel +MASTER_SITES= http://download.elasticsearch.org/${PORTNAME}/${PORTNAME}/ \ + http://mirrors.rit.edu/zi/ +PKGNAMESUFFIX= 2 + +MAINTAINER= ports at MidnightBSD.org +COMMENT= Full-text search engine for Java + +LICENSE= apache2 + +CONFLICTS= elasticsearch-[0-9]* + +USES= cpe +NO_ARCH= yes +USE_JAVA= yes +NO_BUILD= yes +JAVA_VERSION= 1.7+ +USE_RC_SUBR= ${PORTNAME} + +OPTIONS_DEFINE= DOCS + +.include + +LUCENEVER= 5.3.1 +CONFIG_FILES= elasticsearch.yml logging.yml +BINS= elasticsearch.in.sh \ + elasticsearch \ + plugin + +DOCS= LICENSE.txt \ + NOTICE.txt \ + README.textile + +SIGAR_ARCH= ${ARCH:S|i386|x86|} +SEARCHUSER?= elasticsearch +SEARCHGROUP?= ${SEARCHUSER} +USERS= ${SEARCHUSER} +GROUPS= ${SEARCHGROUP} +ELASTIC_DBDIR= /var/db/elasticsearch +ELASTIC_LOGDIR= /var/log/elasticsearch + +SUB_LIST= SEARCHUSER=${SEARCHUSER} \ + SEARCHGROUP=${SEARCHGROUP} \ + PORTVERSION=${PORTVERSION} +SUB_FILES= pkg-message +PLIST_SUB= SEARCHUSER=${SEARCHUSER} \ + SEARCHGROUP=${SEARCHGROUP} \ + LUCENEVER=${LUCENEVER} \ + PORTVERSION=${PORTVERSION} \ + ELASTIC_DBDIR=${ELASTIC_DBDIR} \ + ELASTIC_LOGDIR=${ELASTIC_LOGDIR} + +post-patch: + ${REINPLACE_CMD} -e "s|%%PREFIX%%|${PREFIX}|g" ${WRKSRC}/config/elasticsearch.yml + ${REINPLACE_CMD} -e "s|%%PREFIX%%|${PREFIX}|g" ${WRKSRC}/bin/elasticsearch.in.sh + +do-install: + @${MKDIR} ${STAGEDIR}${PREFIX}/etc/elasticsearch +.for f in ${CONFIG_FILES} + ${INSTALL} -m 440 ${WRKSRC}/config/${f} ${STAGEDIR}${ETCDIR}/${f}.sample +.endfor + @${MKDIR} ${STAGEDIR}${PREFIX}/lib/elasticsearch/bin +.for f in ${BINS} + ${INSTALL_SCRIPT} ${WRKSRC}/bin/${f} ${STAGEDIR}${PREFIX}/lib/elasticsearch/bin +.endfor + @${MKDIR} ${STAGEDIR}${PREFIX}/lib/elasticsearch/lib + (cd ${WRKSRC}/lib && ${COPYTREE_SHARE} . ${STAGEDIR}${PREFIX}/lib/elasticsearch/lib/ "-name *\.jar") + + @${MKDIR} ${STAGEDIR}${PREFIX}/lib/elasticsearch/plugins + @${MKDIR} ${STAGEDIR}${PREFIX}/libexec/elasticsearch + @${MKDIR} ${STAGEDIR}${ELASTIC_DBDIR} ${STAGEDIR}${ELASTIC_LOGDIR} + cd ${STAGEDIR}${PREFIX}/bin && ${LN} -s ${PREFIX}/lib/elasticsearch/bin/plugin elasticsearch-plugin + @${MKDIR} ${STAGEDIR}${DOCSDIR} +.for f in ${DOCS} + ${INSTALL_DATA} ${WRKSRC}/${f} ${STAGEDIR}${DOCSDIR} +.endfor + + +.include Property changes on: trunk/textproc/elasticsearch2/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/distinfo =================================================================== --- trunk/textproc/elasticsearch2/distinfo (rev 0) +++ trunk/textproc/elasticsearch2/distinfo 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,2 @@ +SHA256 (elasticsearch-2.1.1.tar.gz) = ebd69c0483f20ba7e51caa9606d4e3ce5fe2667e1216c799f0cdbb815c317ce6 +SIZE (elasticsearch-2.1.1.tar.gz) = 29007342 Property changes on: trunk/textproc/elasticsearch2/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/files/elasticsearch.in =================================================================== --- trunk/textproc/elasticsearch2/files/elasticsearch.in (rev 0) +++ trunk/textproc/elasticsearch2/files/elasticsearch.in 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,112 @@ +#!/bin/sh +# +# $FreeBSD: head/textproc/elasticsearch2/files/elasticsearch.in 401977 2015-11-19 21:50:18Z tj $ +# +# PROVIDE: elasticsearch +# REQUIRE: NETWORKING SERVERS +# BEFORE: DAEMON +# KEYWORD: shutdown +# +# Add the following line to /etc/rc.conf to enable elasticsearch: +# +# elasticsearch_enable="YES" +# +# elasticsearch_user (username): Set to elasticsearch by default. +# Set it to required username. +# elasticsearch_group (group): Set to elasticsearch by default. +# Set it to required group. +# elasticsearch_config (path): Set to /usr/local/etc/elasticsearch/elasticsearch.yml by default. +# Set it to the config file location. +# elasticsearch_min_mem (num): Minumum JVM heap size, 256m by default. +# elasticsearch_max_mem (num): Maximum JVM heap size, 1g by default. +# elasticsearch_props (args): Additional java properties or arguments. +# elasticsearch_tmp (path): Set to /var/tmp/elasticsearch by default. +# Set it to the path to be used for temp files. +# +. /etc/rc.subr + +name=elasticsearch +rcvar=elasticsearch_enable + +load_rc_config ${name} + +: ${elasticsearch_enable:="NO"} +: ${elasticsearch_user:=%%SEARCHUSER%%} +: ${elasticsearch_group:=%%SEARCHGROUP%%} +: ${elasticsearch_config:="%%PREFIX%%/etc/elasticsearch"} +: ${elasticsearch_tmp:="/var/tmp/elasticsearch"} + +required_files="${elasticsearch_config}/elasticsearch.yml" +pidfile="/var/run/${name}.pid" + +extra_commands="console status" +console_cmd="elasticsearch_console" +start_precmd="elasticsearch_precmd" +status_cmd="elasticsearch_status" +stop_cmd="elasticsearch_stop" +command="%%PREFIX%%/lib/elasticsearch/bin/elasticsearch" +command_args="-d --pidfile=${pidfile}" + +elasticsearch_precmd() +{ + touch ${pidfile} + chown ${elasticsearch_user}:${elasticsearch_group} ${pidfile} + /usr/bin/install -d -o ${elasticsearch_user} -g ${elasticsearch_group} -m 750 ${elasticsearch_tmp} + /usr/bin/install -d -o ${elasticsearch_user} -g ${elasticsearch_group} -m 750 /var/db/elasticsearch + /usr/bin/install -d -o ${elasticsearch_user} -g ${elasticsearch_group} -m 750 /var/log/elasticsearch +} + +elasticsearch_console() +{ + command_args="" + run_rc_command "start" +} + + +elasticsearch_stop() +{ + rc_pid=$(elasticsearch_check_pidfile $pidfile) + + if [ -z "$rc_pid" ]; then + [ -n "$rc_fast" ] && return 0 + echo "${name} not running? (check $pidfile)." + return 1 + fi + + echo "Stopping ${name}." + kill ${rc_pid} 2> /dev/null +} + +elasticsearch_status() +{ + rc_pid=$(elasticsearch_check_pidfile $pidfile) + + if [ -z "$rc_pid" ]; then + [ -n "$rc_fast" ] && return 0 + echo "${name} not running? (check $pidfile)." + return 1 + fi + echo "${name} is running as pid ${rc_pid}." +} + +elasticsearch_check_pidfile() +{ + _pidfile=$1 + if [ -z "$_pidfile" ]; then + err 3 'USAGE: elasticsearch_check_pidfile pidfile' + fi + if [ ! -f $_pidfile ]; then + debug "pid file ($_pidfile): not readable." + return + fi + read _pid _junk < $_pidfile + if [ -z "$_pid" ]; then + debug "pid file ($_pidfile): no pid in file." + return + fi + if [ -n "`%%LOCALBASE%%/bin/jps -l | grep -e "^$_pid"`" ]; then + echo -n $_pid + fi +} + +run_rc_command "$1" Property changes on: trunk/textproc/elasticsearch2/files/elasticsearch.in ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh =================================================================== --- trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh (rev 0) +++ trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,23 @@ +--- bin/elasticsearch.in.sh.orig 2015-10-21 04:41:12.000000000 -0400 ++++ bin/elasticsearch.in.sh 2015-12-15 12:00:37.323441838 -0500 +@@ -1,5 +1,20 @@ + #!/bin/sh + ++if [ `uname -o` == "FreeBSD" ]; then ++ . /etc/rc.subr ++ load_rc_config elasticsearch ++ ES_MIN_MEM=${elasticsearch_min_mem} ++ ES_MAX_MEM=${elasticsearch_max_mem} ++ ES_HEAP_NEW_SIZE=${elasticsearch_heap_newsize} ++ ES_DIRECT_SIZE=${elasticsearch_direct_size} ++ ES_USE_IPV4=${elasticsearch_use_ipv4} ++ ES_GC_OPTS=${elasticsearch_gc_opts} ++ ES_GC_LOG_FILE=${elasticsearch_gc_logfile} ++ JAVA_OPTS="$JAVA_OPTS -Des.path.conf=${elasticsearch_config:="/usr/local/etc/elasticsearch"}" ++ JAVA_OPTS="$JAVA_OPTS -Des.path.scripts=${elasticsearch_scripts:="/usr/local/libexec/elasticsearch"}" ++ PATH=${PATH}:/usr/local/bin ++fi ++ + # check in case a user was using this mechanism + if [ "x$ES_CLASSPATH" != "x" ]; then + cat >&2 << EOF Property changes on: trunk/textproc/elasticsearch2/files/patch-bin-elasticsearch.in.sh ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml =================================================================== --- trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml (rev 0) +++ trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,15 @@ +--- config/elasticsearch.yml.orig 2015-10-21 04:41:12.000000000 -0400 ++++ config/elasticsearch.yml 2015-11-19 12:34:39.766910803 -0500 +@@ -31,10 +31,12 @@ + # Path to directory where to store the data (separate multiple locations by comma): + # + # path.data: /path/to/data ++path.data: /var/db/elasticsearch + # + # Path to log files: + # + # path.logs: /path/to/logs ++path.logs: /var/log/elasticsearch + # + # ----------------------------------- Memory ----------------------------------- + # Property changes on: trunk/textproc/elasticsearch2/files/patch-config-elasticsearch.yml ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/files/pkg-message.in =================================================================== --- trunk/textproc/elasticsearch2/files/pkg-message.in (rev 0) +++ trunk/textproc/elasticsearch2/files/pkg-message.in 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,6 @@ +====================================================================== + +Please see %%ETCDIR%% for sample versions of +elasticsearch.yml and logging.yml. + +====================================================================== Property changes on: trunk/textproc/elasticsearch2/files/pkg-message.in ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/pkg-descr =================================================================== --- trunk/textproc/elasticsearch2/pkg-descr (rev 0) +++ trunk/textproc/elasticsearch2/pkg-descr 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,4 @@ +Elasticsearch aims to be a Distributed, RESTful, Search Engine built on top of +Apache Lucene. + +WWW: http://www.elastic.co/ Property changes on: trunk/textproc/elasticsearch2/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/elasticsearch2/pkg-plist =================================================================== --- trunk/textproc/elasticsearch2/pkg-plist (rev 0) +++ trunk/textproc/elasticsearch2/pkg-plist 2016-05-26 03:43:55 UTC (rev 21457) @@ -0,0 +1,61 @@ + at sample(%%SEARCHUSER%%,%%SEARCHGROUP%%,440) %%ETCDIR%%/elasticsearch.yml.sample + at sample(%%SEARCHUSER%%,%%SEARCHGROUP%%,440) %%ETCDIR%%/logging.yml.sample + at unexec if [ -d %%ELASTIC_LOGDIR%% ]; then echo "You should remove %%ELASTIC_LOGDIR%% if you don't need it any more."; fi + at unexec if [ -d %%ELASTIC_DBDIR%% ]; then echo "You should remove %%ELASTIC_DBDIR%% if you don't need it any more."; fi +bin/elasticsearch-plugin +lib/elasticsearch/lib/HdrHistogram-2.1.6.jar +lib/elasticsearch/lib/antlr-runtime-3.5.jar +lib/elasticsearch/lib/apache-log4j-extras-1.2.17.jar +lib/elasticsearch/lib/asm-4.1.jar +lib/elasticsearch/lib/asm-commons-4.1.jar +lib/elasticsearch/lib/commons-cli-1.3.1.jar +lib/elasticsearch/lib/compiler-0.8.13.jar +lib/elasticsearch/lib/compress-lzf-1.0.2.jar +lib/elasticsearch/lib/elasticsearch-%%PORTVERSION%%.jar +lib/elasticsearch/lib/groovy-all-2.4.4-indy.jar +lib/elasticsearch/lib/guava-18.0.jar +lib/elasticsearch/lib/hppc-0.7.1.jar +lib/elasticsearch/lib/jackson-core-2.6.2.jar +lib/elasticsearch/lib/jackson-dataformat-cbor-2.6.2.jar +lib/elasticsearch/lib/jackson-dataformat-smile-2.6.2.jar +lib/elasticsearch/lib/jackson-dataformat-yaml-2.6.2.jar +lib/elasticsearch/lib/jna-4.1.0.jar +lib/elasticsearch/lib/joda-convert-1.2.jar +lib/elasticsearch/lib/joda-time-2.8.2.jar +lib/elasticsearch/lib/jsr166e-1.1.0.jar +lib/elasticsearch/lib/jts-1.13.jar +lib/elasticsearch/lib/log4j-1.2.17.jar +lib/elasticsearch/lib/lucene-analyzers-common-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-backward-codecs-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-core-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-expressions-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-grouping-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-highlighter-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-join-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-memory-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-misc-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-queries-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-queryparser-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-sandbox-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-spatial-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-spatial3d-%%LUCENEVER%%.jar +lib/elasticsearch/lib/lucene-suggest-%%LUCENEVER%%.jar +lib/elasticsearch/lib/netty-3.10.5.Final.jar +lib/elasticsearch/lib/snakeyaml-1.15.jar +lib/elasticsearch/lib/spatial4j-0.5.jar +lib/elasticsearch/lib/t-digest-3.0.jar +lib/elasticsearch/bin/elasticsearch.in.sh +lib/elasticsearch/bin/elasticsearch +lib/elasticsearch/bin/plugin +%%PORTDOCS%%%%DOCSDIR%%/LICENSE.txt +%%PORTDOCS%%%%DOCSDIR%%/NOTICE.txt +%%PORTDOCS%%%%DOCSDIR%%/README.textile + at dir lib/elasticsearch/lib + at dir lib/elasticsearch/bin + at dir lib/elasticsearch/plugins + at dir lib/elasticsearch + at dir libexec/elasticsearch + at dir(%%SEARCHUSER%%,%%SEARCHGROUP%%,750) %%ELASTIC_LOGDIR%% + at dir(%%SEARCHUSER%%,%%SEARCHGROUP%%,750) %%ELASTIC_DBDIR%% + at postunexec if [ -d %%ELASTIC_LOGDIR%% ]; then echo "You should remove %%ELASTIC_LOGDIR%% if you don't need it any more."; fi + at postunexec if [ -d %%ELASTIC_DBDIR%% ]; then echo "You should remove %%ELASTIC_DBDIR%% if you don't need it any more."; fi Property changes on: trunk/textproc/elasticsearch2/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 00:02:18 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 00:02:18 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21459] trunk/sysutils: add logstash based on freebsd port Message-ID: <201605260402.u4Q42I0F088305@stargazer.midnightbsd.org> Revision: 21459 http://svnweb.midnightbsd.org/mports/?rev=21459 Author: laffer1 Date: 2016-05-26 00:02:18 -0400 (Thu, 26 May 2016) Log Message: ----------- add logstash based on freebsd port Modified Paths: -------------- trunk/sysutils/Makefile Added Paths: ----------- trunk/sysutils/logstash/ trunk/sysutils/logstash/Makefile trunk/sysutils/logstash/distinfo trunk/sysutils/logstash/files/ trunk/sysutils/logstash/files/logstash.conf.sample trunk/sysutils/logstash/files/logstash.in trunk/sysutils/logstash/pkg-descr trunk/sysutils/logstash/pkg-message trunk/sysutils/logstash/pkg-plist Modified: trunk/sysutils/Makefile =================================================================== --- trunk/sysutils/Makefile 2016-05-26 03:57:22 UTC (rev 21458) +++ trunk/sysutils/Makefile 2016-05-26 04:02:18 UTC (rev 21459) @@ -62,6 +62,7 @@ SUBDIR += libsunacl SUBDIR += linux-f10-procps SUBDIR += lmmon +SUBDIR += logstash SUBDIR += lsof SUBDIR += mbmon SUBDIR += mdf2iso Added: trunk/sysutils/logstash/Makefile =================================================================== --- trunk/sysutils/logstash/Makefile (rev 0) +++ trunk/sysutils/logstash/Makefile 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,55 @@ +# Created by: Daniel Solsona , Guido Falsi +# $FreeBSD: head/sysutils/logstash/Makefile 402867 2015-12-03 02:45:41Z junovitch $ +# $MidnightBSD$ + +PORTNAME= logstash +PORTVERSION= 2.1.0 +CATEGORIES= sysutils java +MASTER_SITES= http://download.elastic.co/logstash/logstash/ + +MAINTAINER= ports at MidnightBSD.org +COMMENT= Tool for managing events and logs + +LICENSE= apache2 + +RUN_DEPENDS= ${LOCALBASE}/bin/bash:${PORTSDIR}/shells/bash + +USES= cpe +CPE_VENDOR= elasticsearch +USE_JAVA= yes +JAVA_VERSION= 1.7+ +JAVA_EXTRACT= yes +JAVA_RUN= yes +NO_BUILD= yes + +LOGSTASH_DIR= ${PREFIX}/${PORTNAME} + +USE_RC_SUBR= logstash + +LOGSTASH_HOME?= ${PREFIX}/${PORTNAME} +LOGSTASH_RUN?= /var/run/${PORTNAME} +LOGSTASH_DATA_DIR?= /var/db/${PORTNAME} + +SUB_LIST= LOGSTASH_DATA_DIR=${LOGSTASH_DATA_DIR} JAVA_HOME=${JAVA_HOME} \ + LOGSTASH_HOME=${LOGSTASH_HOME} + +LOGSTASH_BIN_FILES= logstash +LOGSTASH_JRUBY_SUBDIR= vendor/jruby/bin +LOGSTASH_JRUBY_BIN_FILES= ast irb jirb jruby jruby.sh rdoc testrb gem \ + jgem jirb_swing jruby.bash jrubyc rake ri + +do-install: + @${FIND} ${WRKSRC} -name '*.bat' -delete + ${MKDIR} ${STAGEDIR}${ETCDIR} + ${MKDIR} ${STAGEDIR}${LOGSTASH_RUN} + ${MKDIR} ${STAGEDIR}${LOGSTASH_DATA_DIR} + @(cd ${WRKSRC} && ${COPYTREE_SHARE} . ${STAGEDIR}${LOGSTASH_DIR}) + ${INSTALL_DATA} ${FILESDIR}/logstash.conf.sample ${STAGEDIR}${ETCDIR} +.for x in ${LOGSTASH_BIN_FILES} + @${CHMOD} ${BINMODE} ${STAGEDIR}${LOGSTASH_DIR}/bin/${x} +.endfor +.for x in ${LOGSTASH_JRUBY_BIN_FILES} + @${CHMOD} ${BINMODE} ${STAGEDIR}${LOGSTASH_DIR}/${LOGSTASH_JRUBY_SUBDIR}/${x} +.endfor + +.include Property changes on: trunk/sysutils/logstash/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/distinfo =================================================================== --- trunk/sysutils/logstash/distinfo (rev 0) +++ trunk/sysutils/logstash/distinfo 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,2 @@ +SHA256 (logstash-2.1.0.tar.gz) = 1f132e0fc9fc46ebe836951bb44c5cd1a5f8e3f653bb44bded55300cc6c892dc +SIZE (logstash-2.1.0.tar.gz) = 73512846 Property changes on: trunk/sysutils/logstash/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/files/logstash.conf.sample =================================================================== --- trunk/sysutils/logstash/files/logstash.conf.sample (rev 0) +++ trunk/sysutils/logstash/files/logstash.conf.sample 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,45 @@ +input { + + file { + type => "syslog" + # path => [ "/var/log/*.log", "/var/log/messages", "/var/log/syslog" ] + path => "/var/log/messages" + start_position => "beginning" + } +} + +filter { +# An filter may change the regular expression used to match a record or a field, +# alter the value of parsed fields, add or remove fields, etc. +# +# if [type] == "syslog" { +# grok { +# match => { "message" => "%{SYSLOGTIMESTAMP:syslog_timestamp} %{SYSLOGHOST:syslog_hostname} (%{DATA:syslog_program}(?:\[%{POSINT:syslog_pid}\])?: %{GREEDYDATA:syslog_message}|%{GREEDYDATA:syslog_message})" } +# add_field => [ "received_at", "%{@timestamp}" ] +# add_field => [ "received_from", "%{@source_host}" ] +# } +# +# if !("_grokparsefailure" in [tags]) { +# mutate { +# replace => [ "@source_host", "%{syslog_hostname}" ] +# replace => [ "@message", "%{syslog_message}" ] +# } +# } +# mutate { +# remove_field => [ "syslog_hostname", "syslog_message" ] +# } +# date { +# match => [ "syslog_timestamp","MMM d HH:mm:ss", "MMM dd HH:mm:ss", "ISO8601" ] +# } +# syslog_pri { } +# } +} + +output { + # Emit events to stdout for easy debugging of what is going through + # logstash. + # stdout { codec => rubydebug } + + # This will use elasticsearch to store your logs. + # elasticsearch { hosts => [ "localhost:9200" ] } +} Property changes on: trunk/sysutils/logstash/files/logstash.conf.sample ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/files/logstash.in =================================================================== --- trunk/sysutils/logstash/files/logstash.in (rev 0) +++ trunk/sysutils/logstash/files/logstash.in 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,100 @@ +#!/bin/sh + +# Configuration settings for logstash in /etc/rc.conf: +# +# PROVIDE: logstash +# REQUIRE: DAEMON +# BEFORE: LOGIN +# KEYWORD: shutdown +# +# logstash_enable (bool): +# Default value: "NO" +# Flag that determines whether Logstash is enabled. +# +# logstash_home (string): +# Default value: "/usr/local/logstash" +# Logstash installation directory. +# +# logstash_config (string): +# Default value: /usr/local/etc/${name}/${name}.conf +# Logstash configuration file path. +# +# logstash_log (bool): +# Set to "NO" by default. +# Set it to "YES" to enable logstash logging to file +# Default output to /var/log/logstash.log +# +# logstash_log_file (string): +# Default value: "${logdir}/${name}.log" +# Log file path. +# +# logstash_java_home (string): +# Default value: "/usr/local/openjdk6" +# Root directory of the desired Java SDK. +# The JAVA_HOME environment variable is set with the contents of this +# variable. +# +# logstash_java_opts (string): +# Default value: "" +# Options to pass to the Java Virtual Machine. +# The JAVA_OPTS environment variable is set with the contents of this +# variable. +# +# logstash_elastic_datadir (string): +# Default value: "/var/db/logstash". +# Data directory of the embedded ElasticSearch instance. +# + +. /etc/rc.subr + +name=logstash +rcvar=logstash_enable + +load_rc_config ${name} + +logdir="/var/log" + +: ${logstash_enable="NO"} +: ${logstash_home="%%LOGSTASH_HOME%%"} +: ${logstash_config="%%ETCDIR%%/${name}.conf"} +: ${logstash_log="NO"} +: ${logstash_log_file="${logdir}/${name}.log"} +: ${logstash_java_home="%%JAVA_HOME%%"} +: ${logstash_java_opts=""} +: ${logstash_elastic_datadir="%%LOGSTASH_DATA_DIR%%"} + +piddir=/var/run/${name} +pidfile=${piddir}/${name}.pid + +if [ -d $piddir ]; then + mkdir -p $piddir +fi + +logstash_cmd="${logstash_home}/bin/logstash" +procname="${logstash_java_home}/bin/java" + +logstash_chdir=${logstash_home} +logstash_log_options="" +logstash_elastic_options="" + +if checkyesno logstash_log; then + logstash_log_options=" --log ${logstash_log_file}" +fi + +logstash_args="agent -f ${logstash_config} ${logstash_log_options}" +logstash_elastic_options="-Des.path.data=${logstash_elastic_datadir}" + +JAVA_OPTS="${logstash_java_opts} ${logstash_elastic_options}" +JAVA_HOME="${logstash_java_home}" +export JAVA_OPTS +export JAVA_HOME + +command="/usr/sbin/daemon" +command_args="-f -p ${pidfile} ${logstash_cmd} ${logstash_args}" +required_files="${logstash_home} ${logstash_java_home} ${logstash_cmd} ${logstash_config}" + +# Include /usr/local/bin in path because Logstash startup scripts +# assume bash is in path. +PATH=/usr/local/bin:$PATH + +run_rc_command "$1" Property changes on: trunk/sysutils/logstash/files/logstash.in ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/pkg-descr =================================================================== --- trunk/sysutils/logstash/pkg-descr (rev 0) +++ trunk/sysutils/logstash/pkg-descr 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,6 @@ +Logstash is a tool for managing events and logs. You can use it to collect +logs, parse them, and store them for later use (like, for searching). Speaking +of searching, logstash comes with a web interface for searching and drilling +into all of your logs. + +WWW: http://logstash.net/ Property changes on: trunk/sysutils/logstash/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/pkg-message =================================================================== --- trunk/sysutils/logstash/pkg-message (rev 0) +++ trunk/sysutils/logstash/pkg-message 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,14 @@ +To start logstash as an agent during startup, add + + logstash_enable="YES" + +to your /etc/rc.conf. + +Extra options can be found in startup script. + +NOTE: Since version 1.5.0, logstash is started in agent mode. +The Kibana web application is no longer embedded in this Logstash +distribution. + +NOTE: Since version 2, logstash does not support an embedded +ElasticSearch instance. Property changes on: trunk/sysutils/logstash/pkg-message ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/sysutils/logstash/pkg-plist =================================================================== --- trunk/sysutils/logstash/pkg-plist (rev 0) +++ trunk/sysutils/logstash/pkg-plist 2016-05-26 04:02:18 UTC (rev 21459) @@ -0,0 +1,9285 @@ + at sample %%ETCDIR%%/logstash.conf.sample +logstash/CHANGELOG.md +logstash/CONTRIBUTORS +logstash/Gemfile +logstash/Gemfile.jruby-1.9.lock +logstash/LICENSE +logstash/NOTICE.TXT +logstash/bin/logstash +logstash/bin/logstash.lib.sh +logstash/bin/plugin +logstash/bin/rspec +logstash/lib/bootstrap/bundler.rb +logstash/lib/bootstrap/environment.rb +logstash/lib/bootstrap/rspec.rb +logstash/lib/bootstrap/rubygems.rb +logstash/lib/bootstrap/util/compress.rb +logstash/lib/pluginmanager/command.rb +logstash/lib/pluginmanager/gemfile.rb +logstash/lib/pluginmanager/install.rb +logstash/lib/pluginmanager/list.rb +logstash/lib/pluginmanager/main.rb +logstash/lib/pluginmanager/pack.rb +logstash/lib/pluginmanager/pack_command.rb +logstash/lib/pluginmanager/uninstall.rb +logstash/lib/pluginmanager/unpack.rb +logstash/lib/pluginmanager/update.rb +logstash/lib/pluginmanager/util.rb +logstash/vendor/bundle/jruby/1.9/bin/aws-rb +logstash/vendor/bundle/jruby/1.9/bin/aws.rb +logstash/vendor/bundle/jruby/1.9/bin/bundle +logstash/vendor/bundle/jruby/1.9/bin/bundler +logstash/vendor/bundle/jruby/1.9/bin/coderay +logstash/vendor/bundle/jruby/1.9/bin/file-deps +logstash/vendor/bundle/jruby/1.9/bin/fpm +logstash/vendor/bundle/jruby/1.9/bin/gelfd +logstash/vendor/bundle/jruby/1.9/bin/geoip +logstash/vendor/bundle/jruby/1.9/bin/globtail +logstash/vendor/bundle/jruby/1.9/bin/httparty +logstash/vendor/bundle/jruby/1.9/bin/lock_jars +logstash/vendor/bundle/jruby/1.9/bin/minitar +logstash/vendor/bundle/jruby/1.9/bin/nokogiri +logstash/vendor/bundle/jruby/1.9/bin/pry +logstash/vendor/bundle/jruby/1.9/bin/puma +logstash/vendor/bundle/jruby/1.9/bin/pumactl +logstash/vendor/bundle/jruby/1.9/bin/rackup +logstash/vendor/bundle/jruby/1.9/bin/rmvn +logstash/vendor/bundle/jruby/1.9/bin/rubygems-cabin-test +logstash/vendor/bundle/jruby/1.9/bin/sequel +logstash/vendor/bundle/jruby/1.9/bin/tt +logstash/vendor/bundle/jruby/1.9/bin/user_agent_parser +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/CHANGELOG.md +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/Gemfile +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/LICENSE.txt +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/README.md +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/Rakefile +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/addressable.gemspec +logstash/vendor/bundle/jruby/1.9/gems/addressable-2.3.8/data/unicode.data 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+logstash/vendor/jruby/lib/ruby/shared/rubygems/core_ext/kernel_gem.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/core_ext/kernel_require.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/defaults.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/defaults/jruby.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/dependency.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/dependency_installer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/dependency_list.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/deprecate.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/doctor.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/errors.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/exceptions.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/build_error.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/builder.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/cmake_builder.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/configure_builder.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/ext_conf_builder.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ext/rake_builder.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/gem_runner.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/gemcutter_utilities.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/indexer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/install_default_message.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/install_message.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/install_update_options.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/installer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/installer_test_case.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/local_remote_options.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/mock_gem_ui.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/name_tuple.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/digest_io.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/file_source.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/io_source.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/old.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/source.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_header.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_reader.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_reader/entry.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_test_case.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package/tar_writer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/package_task.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/path_support.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/platform.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/psych_additions.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/psych_tree.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/rdoc.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/remote_fetcher.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request/connection_pools.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request/http_pool.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request/https_pool.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set/gem_dependency_api.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set/lockfile.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set/lockfile/parser.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/request_set/lockfile/tokenizer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/requirement.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/activation_request.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/api_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/api_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/best_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/composed_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/conflict.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/current_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/dependency_request.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/git_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/git_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/index_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/index_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/installed_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/installer_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/local_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/lock_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/lock_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/requirement_list.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/spec_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/stats.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/vendor_set.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/resolver/vendor_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security/policies.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security/policy.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security/signer.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/security/trust_dir.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/server.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/git.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/installed.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/local.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/lock.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/specific_file.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source/vendor.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source_list.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source_local.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/source_specific_file.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/spec_fetcher.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/AddTrustExternalCARoot-2048.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/AddTrustExternalCARoot.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/Class3PublicPrimaryCertificationAuthority.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/DigiCertHighAssuranceEVRootCA.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/Entrust_net-Secure-Server-Certification-Authority.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/EntrustnetSecureServerCertificationAuthority.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/GeoTrustGlobalCA.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/GeoTrust_Global_CA.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/ssl_certs/VerisignClass3PublicPrimaryCertificationAuthority-G2.pem +logstash/vendor/jruby/lib/ruby/shared/rubygems/stub_specification.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/syck_hack.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/test_case.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/test_utilities.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/text.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/uninstaller.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/uri_formatter.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/user_interaction.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/util.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/util/list.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/util/stringio.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/validator.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/version.rb +logstash/vendor/jruby/lib/ruby/shared/rubygems/version_option.rb +logstash/vendor/jruby/lib/ruby/shared/securerandom.rb +logstash/vendor/jruby/lib/ruby/shared/syslog.rb +logstash/vendor/jruby/lib/ruby/shared/tempfile.rb +logstash/vendor/jruby/lib/ruby/shared/tmpdir.rb +logstash/vendor/jruby/lib/ruby/shared/ubygems.rb +logstash/vendor/jruby/tool/nailgun/Makefile.in +logstash/vendor/jruby/tool/nailgun/README.txt +logstash/vendor/jruby/tool/nailgun/configure +logstash/vendor/jruby/tool/nailgun/ng.exe +logstash/vendor/jruby/tool/nailgun/src/c/ng.c + at dir logstash/vendor/bundle/jruby/1.9/build_info + at dir logstash/vendor/bundle/jruby/1.9/cache + at dir logstash/vendor/bundle/jruby/1.9/doc + at dir logstash/vendor/bundle/jruby/1.9/extensions + at dir logstash/vendor/bundle/jruby/1.9/gems/manticore-0.4.4-java/spec/ssl + at dir logstash/vendor/bundle/jruby/1.9/gems/redis-3.2.2/test/db + at dir logstash/vendor/bundle/ruby/1.9.1/build_info + at dir logstash/vendor/bundle/ruby/1.9.1/cache + at dir logstash/vendor/bundle/ruby/1.9.1/doc + at dir logstash/vendor/bundle/ruby/1.9.1/extensions + at dir /var/db/logstash + at dir /var/run/logstash Property changes on: trunk/sysutils/logstash/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 08:48:01 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 08:48:01 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21460] trunk/sysutils/devcpu-data: update the microcode files Message-ID: <201605261248.u4QCm196047009@stargazer.midnightbsd.org> Revision: 21460 http://svnweb.midnightbsd.org/mports/?rev=21460 Author: laffer1 Date: 2016-05-26 08:48:00 -0400 (Thu, 26 May 2016) Log Message: ----------- update the microcode files Modified Paths: -------------- trunk/sysutils/devcpu-data/Makefile trunk/sysutils/devcpu-data/distinfo trunk/sysutils/devcpu-data/pkg-plist Modified: trunk/sysutils/devcpu-data/Makefile =================================================================== --- trunk/sysutils/devcpu-data/Makefile 2016-05-26 04:02:18 UTC (rev 21459) +++ trunk/sysutils/devcpu-data/Makefile 2016-05-26 12:48:00 UTC (rev 21460) @@ -1,12 +1,12 @@ # $MidnightBSD$ PORTNAME= data -PORTVERSION= 1.5 +PORTVERSION= 1.6 CATEGORIES= sysutils -MASTER_SITES= http://downloadmirror.intel.com/24661/eng/:intel \ +MASTER_SITES= http://downloadmirror.intel.com/25512/eng/:intel \ http://www.amd64.org/microcode/:amd PKGNAMEPREFIX= devcpu- -DISTFILES= microcode-20150121.tgz:intel amd-ucode-2014-12-01.tar.bz2:amd +DISTFILES= microcode-20151106.tgz:intel amd-ucode-2014-12-01.tar.bz2:amd MAINTAINER= ports at MidnightBSD.org COMMENT= Intel and AMD CPUs microcode updates Modified: trunk/sysutils/devcpu-data/distinfo =================================================================== --- trunk/sysutils/devcpu-data/distinfo 2016-05-26 04:02:18 UTC (rev 21459) +++ trunk/sysutils/devcpu-data/distinfo 2016-05-26 12:48:00 UTC (rev 21460) @@ -1,4 +1,4 @@ -SHA256 (microcode-20150121.tgz) = 23353b93bb421971496cea5e9f9d390ce0ed22580a8cc45ae7b3b322dcd8f6b3 -SIZE (microcode-20150121.tgz) = 850761 +SHA256 (microcode-20151106.tgz) = 096e39489eef67666be652e81fa372a06b74f39ea3d565dc0287242c668717e7 +SIZE (microcode-20151106.tgz) = 892805 SHA256 (amd-ucode-2014-12-01.tar.bz2) = e8f37ed12955585a625ee7cd48d89f9a04ceb2afa36081b52cc59d08a3bb8293 SIZE (amd-ucode-2014-12-01.tar.bz2) = 20585 Modified: trunk/sysutils/devcpu-data/pkg-plist =================================================================== --- trunk/sysutils/devcpu-data/pkg-plist 2016-05-26 04:02:18 UTC (rev 21459) +++ trunk/sysutils/devcpu-data/pkg-plist 2016-05-26 12:48:00 UTC (rev 21460) @@ -110,7 +110,7 @@ %%DATADIR%%/m111067AA0B.fw %%DATADIR%%/m1220652_0000000e.fw %%DATADIR%%/m12206a7_00000029.fw -%%DATADIR%%/m12306a9_0000001b.fw +%%DATADIR%%/m12306a9_0000001c.fw %%DATADIR%%/m13106e5_00000007.fw %%DATADIR%%/m16f25d.fw %%DATADIR%%/m16f6d0.fw @@ -124,8 +124,9 @@ %%DATADIR%%/m206f6d1.fw %%DATADIR%%/m206fbBA.fw %%DATADIR%%/m206fda4.fw +%%DATADIR%%/m2240671_00000013.fw %%DATADIR%%/m22f6809.fw -%%DATADIR%%/m32306c3_0000001c.fw +%%DATADIR%%/m32306c3_0000001e.fw %%DATADIR%%/m3240661_00000012.fw %%DATADIR%%/m34f6404.fw %%DATADIR%%/m401067660F.fw @@ -138,10 +139,11 @@ %%DATADIR%%/m5ff4807.fw %%DATADIR%%/m6d206d6_00000619.fw %%DATADIR%%/m6d206d7_00000710.fw -%%DATADIR%%/m6f306f2_00000029.fw -%%DATADIR%%/m7240651_0000001c.fw +%%DATADIR%%/m6f306f2_00000036.fw +%%DATADIR%%/m7240651_0000001d.fw %%DATADIR%%/m801066144.fw %%DATADIR%%/m801067660F.fw +%%DATADIR%%/m80306f4_00000009.fw %%DATADIR%%/m8069547.fw %%DATADIR%%/m806ec59.fw %%DATADIR%%/m806fa95.fw @@ -154,7 +156,7 @@ %%DATADIR%%/mA01067AA0B.fw %%DATADIR%%/mbdf4117.fw %%DATADIR%%/mbdf4903.fw -%%DATADIR%%/mc0306d4_00000018.fw +%%DATADIR%%/mc0306d4_00000022.fw %%DATADIR%%/med306e4_00000428.fw %%DATADIR%%/med306e6_00000600.fw %%DATADIR%%/med306e7_0000070d.fw From laffer1 at midnightbsd.org Thu May 26 23:13:19 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:13:19 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21461] trunk/print: add pycups Message-ID: <201605270313.u4R3DJCe043121@stargazer.midnightbsd.org> Revision: 21461 http://svnweb.midnightbsd.org/mports/?rev=21461 Author: laffer1 Date: 2016-05-26 23:13:18 -0400 (Thu, 26 May 2016) Log Message: ----------- add pycups Modified Paths: -------------- trunk/print/Makefile Added Paths: ----------- trunk/print/py-pycups/ trunk/print/py-pycups/Makefile trunk/print/py-pycups/distinfo trunk/print/py-pycups/pkg-descr Modified: trunk/print/Makefile =================================================================== --- trunk/print/Makefile 2016-05-26 12:48:00 UTC (rev 21460) +++ trunk/print/Makefile 2016-05-27 03:13:18 UTC (rev 21461) @@ -48,6 +48,7 @@ SUBDIR += pdflib SUBDIR += pecl-pdflib SUBDIR += psutils +SUBDIR += py-pycups SUBDIR += qpdf SUBDIR += t1utils SUBDIR += tex-basic-engines Added: trunk/print/py-pycups/Makefile =================================================================== --- trunk/print/py-pycups/Makefile (rev 0) +++ trunk/print/py-pycups/Makefile 2016-05-27 03:13:18 UTC (rev 21461) @@ -0,0 +1,37 @@ +# Created by: Michael Johnson +# $FreeBSD: head/print/py-pycups/Makefile 410825 2016-03-11 11:53:42Z tijl $ +# $MidnightBSD$ + +PORTNAME= pycups +PORTVERSION= 1.9.73 +CATEGORIES= print python +MASTER_SITES= CHEESESHOP +PKGNAMEPREFIX= ${PYTHON_PKGNAMEPREFIX} + +MAINTAINER= ports at MidnightBSD.org +COMMENT= CUPS bindings for Python + +LICENSE= gpl2 gpl3 +LICENSE_COMB= dual + +LIB_DEPENDS= libcups.so:${PORTSDIR}/print/cups + +USE_PYTHON= autoplist concurrent distutils +USES= iconv localbase python tar:bzip2 + +.include + +post-patch: + @${REINPLACE_CMD} -e 's|^\(VERSION=\).*$$|\1${PORTVERSION}|' ${WRKSRC}/Makefile +.if empty(ICONV_LIB) + @${REINPLACE_CMD} -e 's| or sys.platform.startswith("freebsd"):|:|' ${WRKSRC}/setup.py +.endif + +pre-configure: + @${REINPLACE_CMD} -e 's|/usr/local|${LOCALBASE}|g' ${WRKSRC}/cupsconnection.c + @${REINPLACE_CMD} -e 's|#ifdef __SVR4|#ifdef __FreeBSD__|' ${WRKSRC}/cupsppd.c + +post-install: + ${STRIP_CMD} ${FAKE_DESTDIR}${PYTHON_SITELIBDIR}/cups.so + +.include Property changes on: trunk/print/py-pycups/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/print/py-pycups/distinfo =================================================================== --- trunk/print/py-pycups/distinfo (rev 0) +++ trunk/print/py-pycups/distinfo 2016-05-27 03:13:18 UTC (rev 21461) @@ -0,0 +1,2 @@ +SHA256 (pycups-1.9.73.tar.bz2) = c381be011889ca6f728598578c89c8ac9f7ab1e95b614474df9f2fa831ae5335 +SIZE (pycups-1.9.73.tar.bz2) = 52732 Property changes on: trunk/print/py-pycups/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/print/py-pycups/pkg-descr =================================================================== --- trunk/print/py-pycups/pkg-descr (rev 0) +++ trunk/print/py-pycups/pkg-descr 2016-05-27 03:13:18 UTC (rev 21461) @@ -0,0 +1,4 @@ +CUPS bindings for Python + +WWW: https://pypi.python.org/pypi/pycups +WWW: http://cyberelk.net/tim/software/pycups/ Property changes on: trunk/print/py-pycups/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:14:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:14:00 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21462] trunk/math/lapack/files: add patches Message-ID: <201605270314.u4R3E0aG043227@stargazer.midnightbsd.org> Revision: 21462 http://svnweb.midnightbsd.org/mports/?rev=21462 Author: laffer1 Date: 2016-05-26 23:14:00 -0400 (Thu, 26 May 2016) Log Message: ----------- add patches Added Paths: ----------- trunk/math/lapack/files/patch-Makefile trunk/math/lapack/files/patch-lapacke+Makefile trunk/math/lapack/files/patch-lapacke+src+Makefile Added: trunk/math/lapack/files/patch-Makefile =================================================================== --- trunk/math/lapack/files/patch-Makefile (rev 0) +++ trunk/math/lapack/files/patch-Makefile 2016-05-27 03:14:00 UTC (rev 21462) @@ -0,0 +1,11 @@ +--- Makefile.orig 2012-09-09 00:53:46.000000000 +0900 ++++ Makefile 2012-09-09 00:53:57.000000000 +0900 +@@ -23,7 +23,7 @@ + lapacklib: lapack_install + ( cd SRC; $(MAKE) ) + +-lapackelib: lapacklib ++lapackelib: + ( cd lapacke; $(MAKE) ) + + lapacke_example: lapackelib Property changes on: trunk/math/lapack/files/patch-Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/math/lapack/files/patch-lapacke+Makefile =================================================================== --- trunk/math/lapack/files/patch-lapacke+Makefile (rev 0) +++ trunk/math/lapack/files/patch-lapacke+Makefile 2016-05-27 03:14:00 UTC (rev 21462) @@ -0,0 +1,30 @@ +--- lapacke/Makefile.orig 2012-09-09 00:48:05.000000000 +0900 ++++ lapacke/Makefile 2012-09-09 00:48:54.000000000 +0900 +@@ -45,20 +45,20 @@ + all: lapacke + + lapacke: +- cd include && cp lapacke_mangling_with_flags.h lapacke_mangling.h +- cd src && $(MAKE) +- cd utils && $(MAKE) ++ cd ${.CURDIR}/include && cp lapacke_mangling_with_flags.h lapacke_mangling.h ++ cd ${.CURDIR}/src && $(MAKE) ++ cd ${.CURDIR}/utils && $(MAKE) + + lapacke_example: +- cd example && $(MAKE) ++ cd ${.CURDIR}/example && $(MAKE) + + clean: cleanlib + + cleanlib: +- cd src && $(MAKE) clean +- cd utils && $(MAKE) clean ++ cd ${.CURDIR}/src && $(MAKE) clean ++ cd ${.CURDIR}/utils && $(MAKE) clean + + cleanall: clean + rm -f $(LAPACKE) +- cd example && $(MAKE) clean ++ cd ${.CURDIR}/example && $(MAKE) clean + Property changes on: trunk/math/lapack/files/patch-lapacke+Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/math/lapack/files/patch-lapacke+src+Makefile =================================================================== --- trunk/math/lapack/files/patch-lapacke+src+Makefile (rev 0) +++ trunk/math/lapack/files/patch-lapacke+src+Makefile 2016-05-27 03:14:00 UTC (rev 21462) @@ -0,0 +1,29 @@ +--- lapacke/src/Makefile.orig 2012-04-03 05:16:32.000000000 +0900 ++++ lapacke/src/Makefile 2012-09-09 01:28:00.000000000 +0900 +@@ -2042,19 +2042,23 @@ + + ALLOBJ = $(SRC_OBJ) $(MATGEN_OBJ) + +-ifdef USEXBLAS ++.ifdef USEXBLAS + ALLXOBJ = $(SXLASRC) $(DXLASRC) $(CXLASRC) $(ZXLASRC) +-endif ++.endif + + + OBJ_FILES := $(C_FILES:.o=.o) + +-all: ../../$(LAPACKELIB) ++all: ../../$(LAPACKELIB) ../../$(LAPACKETMGLIB) + + ../../$(LAPACKELIB): $(ALLOBJ) $(ALLXOBJ) + $(ARCH) $(ARCHFLAGS) ../../$(LAPACKELIB) $(ALLOBJ) $(ALLXOBJ) + $(RANLIB) ../../$(LAPACKELIB) + ++../../$(LAPACKETMGLIB): $(MATGEN_OBJ) ++ $(ARCH) $(ARCHFLAGS) ../../$(LAPACKETMGLIB) $(MATGEN_OBJ) ++ $(RANLIB) ../../$(LAPACKETMGLIB) ++ + .c.o: + $(CC) -c $(CFLAGS) -I ../include -o $@ $< + Property changes on: trunk/math/lapack/files/patch-lapacke+src+Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:14:42 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:14:42 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21463] trunk/graphics/ImageMagick/files: add patches Message-ID: <201605270314.u4R3Egu2043326@stargazer.midnightbsd.org> Revision: 21463 http://svnweb.midnightbsd.org/mports/?rev=21463 Author: laffer1 Date: 2016-05-26 23:14:42 -0400 (Thu, 26 May 2016) Log Message: ----------- add patches Added Paths: ----------- trunk/graphics/ImageMagick/files/ trunk/graphics/ImageMagick/files/patch-config_policy.xml Added: trunk/graphics/ImageMagick/files/patch-config_policy.xml =================================================================== --- trunk/graphics/ImageMagick/files/patch-config_policy.xml (rev 0) +++ trunk/graphics/ImageMagick/files/patch-config_policy.xml 2016-05-27 03:14:42 UTC (rev 21463) @@ -0,0 +1,12 @@ +--- config/policy.xml.orig 2016-05-09 19:28:58.000000000 +0200 ++++ config/policy.xml 2016-05-10 17:44:26.720503000 +0200 +@@ -64,4 +64,9 @@ + + + ++ ++ ++ ++ ++ + Property changes on: trunk/graphics/ImageMagick/files/patch-config_policy.xml ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:19:37 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:19:37 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7574] trunk/lib/libpmc: lower warns level Message-ID: <201605270319.u4R3JbVr043909@stargazer.midnightbsd.org> Revision: 7574 http://svnweb.midnightbsd.org/src/?rev=7574 Author: laffer1 Date: 2016-05-26 23:19:37 -0400 (Thu, 26 May 2016) Log Message: ----------- lower warns level Modified Paths: -------------- trunk/lib/libpmc/Makefile Removed Paths: ------------- trunk/lib/libpmc/pmc.xscale.3 Modified: trunk/lib/libpmc/Makefile =================================================================== --- trunk/lib/libpmc/Makefile 2016-05-23 03:00:30 UTC (rev 7573) +++ trunk/lib/libpmc/Makefile 2016-05-27 03:19:37 UTC (rev 7574) @@ -5,6 +5,8 @@ SRCS= libpmc.c pmclog.c INCS= pmc.h pmclog.h +WARNS= 3 + MAN= pmc.3 MAN+= pmc_allocate.3 MAN+= pmc_attach.3 @@ -23,7 +25,6 @@ MAN+= pmc.soft.3 # PMC-dependent manual pages -.if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64" MAN+= pmc.atom.3 MAN+= pmc.core.3 MAN+= pmc.core2.3 @@ -41,9 +42,6 @@ MAN+= pmc.westmere.3 MAN+= pmc.westmereuc.3 MAN+= pmc.tsc.3 -.elif ${MACHINE_CPUARCH} == "arm" && ${CPUTYPE} == "xscale" -MAN+= pmc.xscale.3 -.endif MLINKS+= \ pmc_allocate.3 pmc_release.3 \ Deleted: trunk/lib/libpmc/pmc.xscale.3 =================================================================== --- trunk/lib/libpmc/pmc.xscale.3 2016-05-23 03:00:30 UTC (rev 7573) +++ trunk/lib/libpmc/pmc.xscale.3 2016-05-27 03:19:37 UTC (rev 7574) @@ -1,157 +0,0 @@ -.\" Copyright (c) 2009, 2010 Rui Paulo. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" $MidnightBSD$ -.\" -.Dd December 23, 2009 -.Dt PMC.XSCALE 3 -.Os -.Sh NAME -.Nm pmc.xscale -.Nd measurement events for -.Tn Intel -.Tn XScale -family CPUs -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -.Tn Intel XScale -CPUs are ARM CPUs based on the ARMv5e core. -.Pp -Second generation cores have 2 counters, while third generation cores -have 4 counters. -Third generation cores also have an increased number of PMC events. -.Pp -.Tn Intel XScale -PMCs are documented in -.Rs -.%B "3rd Generation Intel XScale Microarchitecture Developer's Manual" -.%D May 2007 -.Re -.Ss Event Specifiers (Programmable PMCs) -.Tn Intel XScale -programmable PMCs support the following events: -.Bl -tag -width indent -.It Li IC_FETCH -External memory fetch due to L1 instruction cache miss. -.It Li IC_MISS -Instruction cache or TLB miss. -.It Li DATA_DEPENDENCY_STALLED -A data dependency stalled -.It Li ITLB_MISS -Instruction TLB miss. -.It Li DTLB_MISS -Data TLB miss. -.It Li BRANCH_RETIRED -Branch instruction retired (executed). -.It Li BRANCH_MISPRED -Branch mispredicted. -.It Li INSTR_RETIRED -Instructions retired (executed). -.It Li DC_FULL_CYCLE -L1 data cache buffer full stall. -Event occurs on every cycle the -condition is present. -.It Li DC_FULL_CONTIG -L1 data cache buffer full stall. -Event occurs once for each contiguous sequence of this type of stall. -.It Li DC_ACCESS -L1 data cache access, not including cache operations. -.It Li DC_MISS -L1 data cache miss, not including cache operations. -.It Li DC_WRITEBACK -L1 data cache write-back. -Occurs for each cache line that's written back from the cache. -.It Li PC_CHANGE -Software changed the program counter. -.It Li BRANCH_RETIRED_ALL -Branch instruction retired (executed). -This event counts all branch instructions, indirect or direct. -.It Li INSTR_CYCLE -Count the number of microarchitecture cycles each instruction requires -to issue. -.It Li CP_STALL -Coprocessor stalled the instruction pipeline. -.It Li PC_CHANGE_ALL -Software changed the program counter (includes exceptions). -.It Li PIPELINE_FLUSH -Pipeline flushes due to mispredictions or exceptions. -.It Li BACKEND_STALL -Backend stalled the instruction pipeline. -.It Li MULTIPLIER_USE -Multiplier used. -.It Li MULTIPLIER_STALLED -Multiplier stalled the instruction pipeline. -.It Li DATA_CACHE_STALLED -Data cache stalled the instruction pipeline. -.It Li L2_CACHE_REQ -L2 cache request, not including cache operations. -.It Li L2_CACHE_MISS -L2 cache miss, not including cache operations. -.It Li ADDRESS_BUS_TRANS -Address bus transaction. -.It Li SELF_ADDRESS_BUS_TRANS -Self initiated address bus transaction. -.It Li DATA_BUS_TRANS -Data bus transaction. -.El -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "BRANCH_MISPRED" -.It Em Alias Ta Em Event Ta -.It Li branches Ta Li BRANCH_RETIRED Ta -.It Li branch-mispredicts Ta Li BRANCH_MISPRED Ta -.It Li dc-misses Ta Li DC_MISS Ta -.It Li ic-misses Ta Li IC_MISS Ta -.It Li instructions Ta Li INSTR_RETIRED Ta -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc_cpuinfo 3 , -.Xr pmclog 3 , -.Xr pmc.soft 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -Intel XScale support first appeared in -.Fx 9.0 . -.Sh AUTHORS -The -.Lb libpmc -library was written by -.An "Joseph Koshy" -.Aq jkoshy at FreeBSD.org . -.Pp -Intel XScale support was added by -.An "Rui Paulo" -.Aq rpaulo at FreeBSD.org . -.Sh CAVEATS -The Intel XScale code does not yet support sampling. From laffer1 at midnightbsd.org Thu May 26 23:21:51 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:21:51 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7575] trunk/sys/modules/pmc/: delete pmc Message-ID: <201605270321.u4R3Lpas044420@stargazer.midnightbsd.org> Revision: 7575 http://svnweb.midnightbsd.org/src/?rev=7575 Author: laffer1 Date: 2016-05-26 23:21:51 -0400 (Thu, 26 May 2016) Log Message: ----------- delete pmc Removed Paths: ------------- trunk/sys/modules/pmc/ From laffer1 at midnightbsd.org Thu May 26 23:22:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:22:00 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7576] trunk/sys/modules/Makefile: remove pmc Message-ID: <201605270322.u4R3M0c9044471@stargazer.midnightbsd.org> Revision: 7576 http://svnweb.midnightbsd.org/src/?rev=7576 Author: laffer1 Date: 2016-05-26 23:22:00 -0400 (Thu, 26 May 2016) Log Message: ----------- remove pmc Modified Paths: -------------- trunk/sys/modules/Makefile Modified: trunk/sys/modules/Makefile =================================================================== --- trunk/sys/modules/Makefile 2016-05-27 03:21:51 UTC (rev 7575) +++ trunk/sys/modules/Makefile 2016-05-27 03:22:00 UTC (rev 7576) @@ -256,7 +256,6 @@ ${_pflog} \ ${_pfsync} \ plip \ - ${_pmc} \ portalfs \ ppbus \ ppc \ From laffer1 at midnightbsd.org Thu May 26 23:22:54 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:22:54 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7577] trunk/sys/modules/hwpmc/Makefile: remove sparc Message-ID: <201605270322.u4R3MsVW044548@stargazer.midnightbsd.org> Revision: 7577 http://svnweb.midnightbsd.org/src/?rev=7577 Author: laffer1 Date: 2016-05-26 23:22:54 -0400 (Thu, 26 May 2016) Log Message: ----------- remove sparc Modified Paths: -------------- trunk/sys/modules/hwpmc/Makefile Property Changed: ---------------- trunk/sys/modules/hwpmc/Makefile Modified: trunk/sys/modules/hwpmc/Makefile =================================================================== --- trunk/sys/modules/hwpmc/Makefile 2016-05-27 03:22:00 UTC (rev 7576) +++ trunk/sys/modules/hwpmc/Makefile 2016-05-27 03:22:54 UTC (rev 7577) @@ -18,8 +18,4 @@ SRCS+= device_if.h bus_if.h .endif -.if ${MACHINE_CPUARCH} == "sparc64" -SRCS+= hwpmc_sparc64.c -.endif - .include Property changes on: trunk/sys/modules/hwpmc/Makefile ___________________________________________________________________ Deleted: cvs2svn:cvs-rev ## -1 +0,0 ## -1.3 \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:31:33 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:31:33 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7578] trunk/sys: update kernel support to include ivy bridge intel chips for hwpmc(4) Message-ID: <201605270331.u4R3VXxo045610@stargazer.midnightbsd.org> Revision: 7578 http://svnweb.midnightbsd.org/src/?rev=7578 Author: laffer1 Date: 2016-05-26 23:31:33 -0400 (Thu, 26 May 2016) Log Message: ----------- update kernel support to include ivy bridge intel chips for hwpmc(4) Modified Paths: -------------- trunk/sys/dev/hwpmc/hwpmc_amd.c trunk/sys/dev/hwpmc/hwpmc_amd.h trunk/sys/dev/hwpmc/hwpmc_arm.c trunk/sys/dev/hwpmc/hwpmc_core.c trunk/sys/dev/hwpmc/hwpmc_core.h trunk/sys/dev/hwpmc/hwpmc_ia64.c trunk/sys/dev/hwpmc/hwpmc_intel.c trunk/sys/dev/hwpmc/hwpmc_logging.c trunk/sys/dev/hwpmc/hwpmc_mips.c trunk/sys/dev/hwpmc/hwpmc_mips24k.c trunk/sys/dev/hwpmc/hwpmc_mips24k.h trunk/sys/dev/hwpmc/hwpmc_mod.c trunk/sys/dev/hwpmc/hwpmc_pentium.c trunk/sys/dev/hwpmc/hwpmc_pentium.h trunk/sys/dev/hwpmc/hwpmc_piv.c trunk/sys/dev/hwpmc/hwpmc_piv.h trunk/sys/dev/hwpmc/hwpmc_powerpc.c trunk/sys/dev/hwpmc/hwpmc_ppro.c trunk/sys/dev/hwpmc/hwpmc_ppro.h trunk/sys/dev/hwpmc/hwpmc_soft.c trunk/sys/dev/hwpmc/hwpmc_soft.h trunk/sys/dev/hwpmc/hwpmc_sparc64.c trunk/sys/dev/hwpmc/hwpmc_tsc.c trunk/sys/dev/hwpmc/hwpmc_tsc.h trunk/sys/dev/hwpmc/hwpmc_uncore.c trunk/sys/dev/hwpmc/hwpmc_uncore.h trunk/sys/dev/hwpmc/hwpmc_x86.c trunk/sys/dev/hwpmc/hwpmc_xscale.c trunk/sys/dev/hwpmc/hwpmc_xscale.h trunk/sys/dev/hwpmc/pmc_events.h trunk/sys/sys/pmc.h trunk/sys/sys/pmckern.h Modified: trunk/sys/dev/hwpmc/hwpmc_amd.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_amd.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_amd.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2008 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_amd.c 241272 2012-10-06 18:59:12Z avg $"); /* Support for the AMD K7 and later processors */ @@ -839,7 +840,7 @@ for (i = 0; i < AMD_NPMCS; i++) { KASSERT(pac->pc_amdpmcs[i].phw_pmc == NULL, ("[amd,%d] CPU%d/PMC%d in use", __LINE__, cpu, i)); - KASSERT(AMD_PMC_IS_STOPPED(AMD_PMC_EVSEL_0 + (i-1)), + KASSERT(AMD_PMC_IS_STOPPED(AMD_PMC_EVSEL_0 + i), ("[amd,%d] CPU%d/PMC%d not stopped", __LINE__, cpu, i)); } #endif Modified: trunk/sys/dev/hwpmc/hwpmc_amd.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_amd.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_amd.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_amd.h 184802 2008-11-09 17:37:54Z jkoshy $ */ /* Machine dependent interfaces */ Modified: trunk/sys/dev/hwpmc/hwpmc_arm.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_arm.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_arm.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_arm.c 250581 2013-05-12 22:01:22Z hiren $"); #include #include @@ -75,12 +76,10 @@ KASSERT(TRAPF_USERMODE(tf) == 0,("[arm,%d] not a kernel backtrace", __LINE__)); + td = curthread; pc = PMC_TRAPFRAME_TO_PC(tf); *cc++ = pc; - if ((td = curthread) == NULL) - return (1); - if (maxsamples <= 1) return (1); @@ -126,12 +125,10 @@ KASSERT(TRAPF_USERMODE(tf), ("[x86,%d] Not a user trap frame tf=%p", __LINE__, (void *) tf)); + td = curthread; pc = PMC_TRAPFRAME_TO_PC(tf); *cc++ = pc; - if ((td = curthread) == NULL) - return (1); - if (maxsamples <= 1) return (1); Modified: trunk/sys/dev/hwpmc/hwpmc_core.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_core.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_core.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -25,11 +26,11 @@ */ /* - * Intel Core, Core 2 and Atom PMCs. + * Intel Core PMCs. */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_core.c 250373 2013-05-08 16:43:52Z hiren $"); #include #include @@ -52,7 +53,8 @@ #define CORE_CPUID_EDX 0x3 #define IAF_PMC_CAPS \ - (PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INTERRUPT) + (PMC_CAP_READ | PMC_CAP_WRITE | PMC_CAP_INTERRUPT | \ + PMC_CAP_USER | PMC_CAP_SYSTEM) #define IAF_RI_TO_MSR(RI) ((RI) + (1 << 30)) #define IAP_PMC_CAPS (PMC_CAP_INTERRUPT | PMC_CAP_USER | PMC_CAP_SYSTEM | \ @@ -546,7 +548,7 @@ enum pmc_event iap_ev; unsigned char iap_evcode; unsigned char iap_umask; - unsigned char iap_flags; + unsigned int iap_flags; }; #define IAP_F_CC (1 << 0) /* CPU: Core */ @@ -556,8 +558,12 @@ #define IAP_F_I7 (1 << 4) /* CPU: Core i7 */ #define IAP_F_I7O (1 << 4) /* CPU: Core i7 (old) */ #define IAP_F_WM (1 << 5) /* CPU: Westmere */ -#define IAP_F_SB (1 << 6) /* CPU: Sandy Brdige */ -#define IAP_F_FM (1 << 7) /* Fixed mask */ +#define IAP_F_SB (1 << 6) /* CPU: Sandy Bridge */ +#define IAP_F_IB (1 << 7) /* CPU: Ivy Bridge */ +#define IAP_F_SBX (1 << 8) /* CPU: Sandy Bridge Xeon */ +#define IAP_F_IBX (1 << 9) /* CPU: Ivy Bridge Xeon */ +#define IAP_F_HW (1 << 10) /* CPU: Haswell */ +#define IAP_F_FM (1 << 11) /* Fixed mask */ #define IAP_F_ALLCPUSCORE2 \ (IAP_F_CC | IAP_F_CC2 | IAP_F_CC2E | IAP_F_CA) @@ -597,12 +603,15 @@ IAPDESCR(02H_81H, 0x02, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(03H_00H, 0x03, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB), - IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_WM | IAP_F_SB), + IAPDESCR(03H_01H, 0x03, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(03H_02H, 0x03, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(03H_04H, 0x03, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), - IAPDESCR(03H_08H, 0x03, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB), - IAPDESCR(03H_10H, 0x03, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB), + IAPDESCR(03H_08H, 0x03, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(03H_10H, 0x03, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_SB | + IAP_F_SBX), IAPDESCR(03H_20H, 0x03, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(04H_00H, 0x04, 0x00, IAP_F_FM | IAP_F_CC), @@ -612,8 +621,10 @@ IAPDESCR(04H_08H, 0x04, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(05H_00H, 0x05, 0x00, IAP_F_FM | IAP_F_CC), - IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB), - IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_WM | IAP_F_SB), + IAPDESCR(05H_01H, 0x05, 0x01, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(05H_02H, 0x05, 0x02, IAP_F_FM | IAP_F_I7O | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(05H_03H, 0x05, 0x03, IAP_F_FM | IAP_F_I7O), IAPDESCR(06H_00H, 0x06, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2 | @@ -625,28 +636,36 @@ IAPDESCR(06H_0FH, 0x06, 0x0F, IAP_F_FM | IAP_F_I7O), IAPDESCR(07H_00H, 0x07, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(07H_01H, 0x07, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(07H_01H, 0x07, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), IAPDESCR(07H_02H, 0x07, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(07H_03H, 0x07, 0x03, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(07H_06H, 0x07, 0x06, IAP_F_FM | IAP_F_CA), - IAPDESCR(07H_08H, 0x07, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_SB), + IAPDESCR(07H_08H, 0x07, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_SB | + IAP_F_SBX), IAPDESCR(08H_01H, 0x08, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW), IAPDESCR(08H_02H, 0x08, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW), IAPDESCR(08H_04H, 0x08, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_WM | IAP_F_SB), + IAP_F_WM | IAP_F_SB | IAP_F_SBX | IAP_F_HW), IAPDESCR(08H_05H, 0x08, 0x05, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_06H, 0x08, 0x06, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_07H, 0x08, 0x07, IAP_F_FM | IAP_F_CA), IAPDESCR(08H_08H, 0x08, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(08H_09H, 0x08, 0x09, IAP_F_FM | IAP_F_CA), - IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7O), - IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7), + IAPDESCR(08H_0EH, 0x08, 0x0E, IAP_F_FM | IAP_F_HW), + IAPDESCR(08H_10H, 0x08, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX | IAP_F_HW), + IAPDESCR(08H_20H, 0x08, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_HW), + IAPDESCR(08H_40H, 0x08, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW), + IAPDESCR(08H_60H, 0x08, 0x60, IAP_F_FM | IAP_F_HW), + IAPDESCR(08H_80H, 0x08, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_HW), + IAPDESCR(08H_81H, 0x08, 0x81, IAP_F_FM | IAP_F_IB | IAP_F_IBX), + IAPDESCR(08H_82H, 0x08, 0x82, IAP_F_FM | IAP_F_IB | IAP_F_IBX), + IAPDESCR(08H_84H, 0x08, 0x84, IAP_F_FM | IAP_F_IB | IAP_F_IBX), IAPDESCR(09H_01H, 0x09, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), IAPDESCR(09H_02H, 0x09, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7O), @@ -662,11 +681,15 @@ IAPDESCR(0CH_02H, 0x0C, 0x02, IAP_F_FM | IAP_F_CC2), IAPDESCR(0CH_03H, 0x0C, 0x03, IAP_F_FM | IAP_F_CA), - IAPDESCR(0DH_03H, 0x0D, 0x03, IAP_F_FM | IAP_F_SB), - IAPDESCR(0DH_40H, 0x0D, 0x40, IAP_F_FM | IAP_F_SB), + IAPDESCR(0DH_03H, 0x0D, 0x03, IAP_F_FM | IAP_F_SB | IAP_F_SBX | IAP_F_HW), + IAPDESCR(0DH_40H, 0x0D, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX), - IAPDESCR(0EH_01H, 0x0E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(0EH_01H, 0x0E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(0EH_02H, 0x0E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(0EH_10H, 0x0E, 0x10, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(0EH_20H, 0x0E, 0x20, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(0EH_40H, 0x0E, 0x40, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(0FH_01H, 0x0F, 0x01, IAP_F_FM | IAP_F_I7), IAPDESCR(0FH_02H, 0x0F, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -676,20 +699,25 @@ IAPDESCR(0FH_80H, 0x0F, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(10H_00H, 0x10, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(10H_01H, 0x10, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM | IAP_F_SB), + IAPDESCR(10H_01H, 0x10, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM | IAP_F_SB | IAP_F_SBX), IAPDESCR(10H_02H, 0x10, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(10H_04H, 0x10, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(10H_08H, 0x10, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(10H_10H, 0x10, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(10H_20H, 0x10, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(10H_40H, 0x10, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(10H_80H, 0x10, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(10H_10H, 0x10, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(10H_20H, 0x10, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(10H_40H, 0x10, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(10H_80H, 0x10, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), IAPDESCR(10H_81H, 0x10, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(11H_00H, 0x11, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(11H_01H, 0x11, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_SB), - IAPDESCR(11H_02H, 0x11, 0x02, IAP_F_FM | IAP_F_SB), + IAPDESCR(11H_01H, 0x11, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(11H_02H, 0x11, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX), IAPDESCR(11H_81H, 0x11, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(12H_00H, 0x12, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), @@ -710,11 +738,12 @@ IAPDESCR(13H_81H, 0x13, 0x81, IAP_F_FM | IAP_F_CA), IAPDESCR(14H_00H, 0x14, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), - IAPDESCR(14H_01H, 0x14, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM | IAP_F_SB), + IAPDESCR(14H_01H, 0x14, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(14H_02H, 0x14, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(17H_01H, 0x17, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(17H_01H, 0x17, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_SBX), IAPDESCR(18H_00H, 0x18, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(18H_01H, 0x18, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -736,20 +765,45 @@ IAPDESCR(23H, 0x23, IAP_M_CORE, IAP_F_ALLCPUSCORE2), IAPDESCR(24H, 0x24, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), - IAPDESCR(24H_01H, 0x24, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(24H_01H, 0x24, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(24H_02H, 0x24, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(24H_03H, 0x24, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_04H, 0x24, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_08H, 0x24, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_0CH, 0x24, 0x0C, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_10H, 0x24, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_20H, 0x24, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_30H, 0x24, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_40H, 0x24, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_80H, 0x24, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(24H_C0H, 0x24, 0xC0, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(24H_03H, 0x24, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_04H, 0x24, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_08H, 0x24, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_0CH, 0x24, 0x0C, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_10H, 0x24, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_20H, 0x24, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_21H, 0x24, 0x21, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_22H, 0x24, 0x22, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_24H, 0x24, 0x24, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_27H, 0x24, 0x27, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_30H, 0x24, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(24H_40H, 0x24, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_41H, 0x24, 0x41, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_42H, 0x24, 0x42, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_44H, 0x24, 0x44, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_50H, 0x24, 0x50, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_80H, 0x24, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_C0H, 0x24, 0xC0, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(24H_E1H, 0x24, 0xE1, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_E2H, 0x24, 0xE2, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_E4H, 0x24, 0xE4, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_E7H, 0x24, 0xE7, IAP_F_FM | IAP_F_HW), IAPDESCR(24H_AAH, 0x24, 0xAA, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(24H_FFH, 0x24, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(24H_F8H, 0x24, 0xF8, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_3FH, 0x24, 0x3F, IAP_F_FM | IAP_F_HW), + IAPDESCR(24H_FFH, 0x24, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_HW), IAPDESCR(25H, 0x25, IAP_M_CORE, IAP_F_ALLCPUSCORE2), @@ -767,25 +821,34 @@ IAPDESCR(26H_FFH, 0x26, 0xFF, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H, 0x27, IAP_M_CORE | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), - IAPDESCR(27H_01H, 0x27, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(27H_01H, 0x27, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(27H_02H, 0x27, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(27H_04H, 0x27, 0x04, IAP_F_FM | IAP_F_I7O | IAP_F_SB), - IAPDESCR(27H_08H, 0x27, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(27H_04H, 0x27, 0x04, IAP_F_FM | IAP_F_I7O | IAP_F_SB | + IAP_F_SBX), + IAPDESCR(27H_08H, 0x27, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(27H_0EH, 0x27, 0x0E, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(27H_0FH, 0x27, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAPDESCR(27H_0FH, 0x27, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(27H_10H, 0x27, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H_20H, 0x27, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H_40H, 0x27, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(27H_50H, 0x27, 0x50, IAP_F_FM | IAP_F_HW), IAPDESCR(27H_80H, 0x27, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H_E0H, 0x27, 0xE0, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(27H_F0H, 0x27, 0xF0, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(28H, 0x28, IAP_M_CORE | IAP_M_MESI, IAP_F_ALLCPUSCORE2), - IAPDESCR(28H_01H, 0x28, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(28H_02H, 0x28, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(28H_04H, 0x28, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(28H_08H, 0x28, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(28H_0FH, 0x28, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(28H_01H, 0x28, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(28H_02H, 0x28, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SBX), + IAPDESCR(28H_04H, 0x28, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(28H_08H, 0x28, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(28H_0FH, 0x28, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI, IAP_F_CC), IAPDESCR(29H, 0x29, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, @@ -798,9 +861,9 @@ IAPDESCR(2EH_01H, 0x2E, 0x01, IAP_F_FM | IAP_F_WM), IAPDESCR(2EH_02H, 0x2E, 0x02, IAP_F_FM | IAP_F_WM), IAPDESCR(2EH_41H, 0x2E, 0x41, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(2EH_4FH, 0x2E, 0x4F, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(30H, 0x30, IAP_M_CORE | IAP_M_MESI | IAP_M_PREFETCH, IAP_F_ALLCPUSCORE2), @@ -813,9 +876,11 @@ IAPDESCR(3BH_C0H, 0x3B, 0xC0, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(3CH_00H, 0x3C, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), IAPDESCR(3CH_01H, 0x3C, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), IAPDESCR(3CH_02H, 0x3C, 0x02, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(3DH_01H, 0x3D, 0x01, IAP_F_FM | IAP_F_I7O), @@ -856,20 +921,26 @@ IAPDESCR(47H_00H, 0x47, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(48H_00H, 0x48, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(48H_01H, 0x48, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(48H_01H, 0x48, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(48H_02H, 0x48, 0x02, IAP_F_FM | IAP_F_I7O), IAPDESCR(49H_00H, 0x49, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(49H_01H, 0x49, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), IAPDESCR(49H_02H, 0x49, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(49H_04H, 0x49, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | + IAP_F_HW), + IAPDESCR(49H_04H, 0x49, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(49H_0EH, 0x49, 0x0E, IAP_F_FM | IAP_F_HW), IAPDESCR(49H_10H, 0x49, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7), - IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7O), - IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(49H_20H, 0x49, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_HW), + IAPDESCR(49H_40H, 0x49, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW), + IAPDESCR(49H_60H, 0x49, 0x60, IAP_F_FM | IAP_F_HW), + IAPDESCR(49H_80H, 0x49, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7 | IAP_F_HW), IAPDESCR(4BH_00H, 0x4B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(4BH_01H, 0x4B, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_I7O), @@ -879,14 +950,15 @@ IAPDESCR(4CH_00H, 0x4C, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(4CH_01H, 0x4C, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(4CH_02H, 0x4C, 0x02, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(4CH_02H, 0x4C, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(4DH_01H, 0x4D, 0x01, IAP_F_FM | IAP_F_I7O), IAPDESCR(4EH_01H, 0x4E, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(4EH_02H, 0x4E, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(4EH_04H, 0x4E, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(4EH_10H, 0x4E, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -897,40 +969,52 @@ IAPDESCR(4FH_10H, 0x4F, 0x10, IAP_F_FM | IAP_F_WM), IAPDESCR(51H_01H, 0x51, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(51H_02H, 0x51, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(51H_04H, 0x51, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(51H_08H, 0x51, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(52H_01H, 0x52, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(53H_01H, 0x53, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(59H_20H, 0x59, 0x20, IAP_F_FM | IAP_F_SB), - IAPDESCR(59H_40H, 0x59, 0x40, IAP_F_FM | IAP_F_SB), - IAPDESCR(59H_80H, 0x59, 0x80, IAP_F_FM | IAP_F_SB), + IAPDESCR(58H_01H, 0x58, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(58H_02H, 0x58, 0x02, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(58H_04H, 0x58, 0x04, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(58H_08H, 0x58, 0x08, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), - IAPDESCR(5BH_0CH, 0x5B, 0x0C, IAP_F_FM | IAP_F_SB), - IAPDESCR(5BH_0FH, 0x5B, 0x0F, IAP_F_FM | IAP_F_SB), - IAPDESCR(5BH_40H, 0x5B, 0x40, IAP_F_FM | IAP_F_SB), - IAPDESCR(5BH_4FH, 0x5B, 0x4F, IAP_F_FM | IAP_F_SB), + IAPDESCR(59H_20H, 0x59, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(59H_40H, 0x59, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(59H_80H, 0x59, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_SBX), - IAPDESCR(5CH_01H, 0x5C, 0x01, IAP_F_FM | IAP_F_SB), - IAPDESCR(5CH_02H, 0x5C, 0x02, IAP_F_FM | IAP_F_SB), - - IAPDESCR(5EH_01H, 0x5E, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(5BH_0CH, 0x5B, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(5BH_0FH, 0x5B, 0x0F, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(5BH_40H, 0x5B, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(5BH_4FH, 0x5B, 0x4F, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(5CH_01H, 0x5C, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(5CH_02H, 0x5C, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + + IAPDESCR(5EH_01H, 0x5E, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + + IAPDESCR(5FH_01H, 0x5F, 0x01, IAP_F_FM | IAP_F_IB), + IAPDESCR(5FH_04H, 0x5F, 0x04, IAP_F_IBX), + IAPDESCR(60H, 0x60, IAP_M_AGENT | IAP_M_CORE, IAP_F_ALLCPUSCORE2), IAPDESCR(60H_01H, 0x60, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), - IAPDESCR(60H_02H, 0x60, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(60H_02H, 0x60, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_IB | + IAP_F_IBX | IAP_F_HW), IAPDESCR(60H_04H, 0x60, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(60H_08H, 0x60, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(61H, 0x61, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2), IAPDESCR(61H_00H, 0x61, 0x00, IAP_F_FM | IAP_F_CC), @@ -942,9 +1026,9 @@ IAP_F_CA | IAP_F_CC2), IAPDESCR(63H, 0x63, IAP_M_CORE, IAP_F_CC), IAPDESCR(63H_01H, 0x63, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(63H_02H, 0x63, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(64H, 0x64, IAP_M_CORE, IAP_F_CA | IAP_F_CC2), IAPDESCR(64H_40H, 0x64, 0x40, IAP_F_FM | IAP_F_CC), @@ -985,13 +1069,22 @@ IAPDESCR(78H, 0x78, IAP_M_CORE, IAP_F_CC), IAPDESCR(78H, 0x78, IAP_M_CORE | IAP_M_SNOOPTYPE, IAP_F_CA | IAP_F_CC2), - IAPDESCR(79H_02H, 0x79, 0x02, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_04H, 0x79, 0x04, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_08H, 0x79, 0x08, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_10H, 0x79, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_20H, 0x79, 0x20, IAP_F_FM | IAP_F_SB), - IAPDESCR(79H_30H, 0x79, 0x30, IAP_F_FM | IAP_F_SB), - + IAPDESCR(79H_02H, 0x79, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_04H, 0x79, 0x04, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_08H, 0x79, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_10H, 0x79, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_20H, 0x79, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_30H, 0x79, 0x30, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_18H, 0x79, 0x18, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_24H, 0x79, 0x24, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(79H_3CH, 0x79, 0x3C, IAP_F_FM | IAP_F_IB | IAP_F_IBX | IAP_F_HW), + IAPDESCR(7AH, 0x7A, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2), IAPDESCR(7BH, 0x7B, IAP_M_AGENT, IAP_F_CA | IAP_F_CC2), @@ -1006,7 +1099,7 @@ IAPDESCR(80H_00H, 0x80, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(80H_01H, 0x80, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(80H_02H, 0x80, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM | IAP_F_SB), + IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(80H_03H, 0x80, 0x03, IAP_F_FM | IAP_F_CA | IAP_F_I7 | IAP_F_WM), IAPDESCR(80H_04H, 0x80, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1027,14 +1120,17 @@ IAPDESCR(85H_00H, 0x85, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(85H_01H, 0x85, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(85H_02H, 0x85, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(85H_04H, 0x85, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), - IAPDESCR(85H_10H, 0x85, 0x10, IAP_F_FM | IAP_F_I7O | IAP_F_SB), - IAPDESCR(85H_20H, 0x85, 0x20, IAP_F_FM | IAP_F_I7O), - IAPDESCR(85H_40H, 0x85, 0x40, IAP_F_FM | IAP_F_I7O), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(85H_0EH, 0x85, 0x0E, IAP_F_FM | IAP_F_HW), + IAPDESCR(85H_10H, 0x85, 0x10, IAP_F_FM | IAP_F_I7O | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(85H_20H, 0x85, 0x20, IAP_F_FM | IAP_F_I7O | IAP_F_HW), + IAPDESCR(85H_40H, 0x85, 0x40, IAP_F_FM | IAP_F_I7O | IAP_F_HW), + IAPDESCR(85H_60H, 0x85, 0x60, IAP_F_FM | IAP_F_HW), IAPDESCR(85H_80H, 0x85, 0x80, IAP_F_FM | IAP_F_WM | IAP_F_I7O), IAPDESCR(86H_00H, 0x86, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), @@ -1041,53 +1137,57 @@ IAPDESCR(87H_00H, 0x87, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(87H_01H, 0x87, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(87H_02H, 0x87, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(87H_04H, 0x87, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(87H_08H, 0x87, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(87H_0FH, 0x87, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(88H_00H, 0x88, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(88H_01H, 0x88, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_02H, 0x88, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_04H, 0x88, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_07H, 0x88, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(88H_08H, 0x88, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_10H, 0x88, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_20H, 0x88, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_30H, 0x88, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(88H_40H, 0x88, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(88H_7FH, 0x88, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(88H_80H, 0x88, 0x80, IAP_F_FM | IAP_F_SB), - IAPDESCR(88H_FFH, 0x88, 0xFF, IAP_F_FM | IAP_F_SB), + IAPDESCR(88H_80H, 0x88, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(88H_FFH, 0x88, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_00H, 0x89, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(89H_01H, 0x89, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_02H, 0x89, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(89H_04H, 0x89, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_07H, 0x89, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(89H_08H, 0x89, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_10H, 0x89, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_20H, 0x89, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_30H, 0x89, 0x30, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(89H_40H, 0x89, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(89H_7FH, 0x89, 0x7F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(89H_80H, 0x89, 0x80, IAP_F_FM | IAP_F_SB), - IAPDESCR(89H_FFH, 0x89, 0xFF, IAP_F_FM | IAP_F_SB), + IAPDESCR(89H_80H, 0x89, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(89H_FFH, 0x89, 0xFF, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(8AH_00H, 0x8A, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(8BH_00H, 0x8B, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), @@ -1102,7 +1202,8 @@ IAPDESCR(93H_00H, 0x93, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(94H_00H, 0x94, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(9CH_01H, 0x9C, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(9CH_01H, 0x9C, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(97H_00H, 0x97, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(98H_00H, 0x98, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1109,40 +1210,50 @@ IAPDESCR(A0H_00H, 0xA0, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(A1H_01H, 0xA1, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A1H_02H, 0xA1, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A1H_04H, 0xA1, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A1H_08H, 0xA1, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), - IAPDESCR(A1H_0CH, 0xA1, 0x0C, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A1H_0CH, 0xA1, 0x0C, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), IAPDESCR(A1H_10H, 0xA1, 0x10, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A1H_20H, 0xA1, 0x20, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), - IAPDESCR(A1H_30H, 0xA1, 0x30, IAP_F_FM | IAP_F_SB), - IAPDESCR(A1H_40H, 0xA1, 0x40, IAP_F_FM | IAP_F_SB), - IAPDESCR(A1H_80H, 0xA1, 0x80, IAP_F_FM | IAP_F_SB), - + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A1H_30H, 0xA1, 0x30, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(A1H_40H, 0xA1, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A1H_80H, 0xA1, 0x80, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A2H_00H, 0xA2, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(A2H_01H, 0xA2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A2H_02H, 0xA2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(A2H_04H, 0xA2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A2H_08H, 0xA2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A2H_10H, 0xA2, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(A2H_20H, 0xA2, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(A2H_40H, 0xA2, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(A2H_80H, 0xA2, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), + IAPDESCR(A3H_01H, 0xA3, 0x01, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A3H_02H, 0xA3, 0x02, IAP_F_FM | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A3H_04H, 0xA3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(A3H_05H, 0xA3, 0x05, IAP_F_FM | IAP_F_HW), + IAPDESCR(A3H_08H, 0xA3, 0x08, IAP_F_FM | IAP_F_IBX | IAP_F_HW), + IAPDESCR(A6H_01H, 0xA6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(A7H_01H, 0xA7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(A8H_01H, 0xA8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1153,25 +1264,27 @@ IAPDESCR(AAH_08H, 0xAA, 0x08, IAP_F_FM | IAP_F_CC2), IAPDESCR(ABH_01H, 0xAB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(ABH_02H, 0xAB, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), - IAPDESCR(ACH_02H, 0xAC, 0x02, IAP_F_FM | IAP_F_SB), - IAPDESCR(ACH_08H, 0xAC, 0x08, IAP_F_FM | IAP_F_SB), - IAPDESCR(ACH_0AH, 0xAC, 0x0A, IAP_F_FM | IAP_F_SB), + IAPDESCR(ACH_02H, 0xAC, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(ACH_08H, 0xAC, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(ACH_0AH, 0xAC, 0x0A, IAP_F_FM | IAP_F_SB | IAP_F_SBX), IAPDESCR(AEH_01H, 0xAE, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B0H_00H, 0xB0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(B0H_01H, 0xB0, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), - IAPDESCR(B0H_02H, 0xB0, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(B0H_02H, 0xB0, 0x02, IAP_F_FM | IAP_F_WM | IAP_F_I7O | IAP_F_IB | + IAP_F_IBX | IAP_F_HW), IAPDESCR(B0H_04H, 0xB0, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B0H_08H, 0xB0, 0x08, IAP_F_FM | IAP_F_WM | IAP_F_I7O | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B0H_10H, 0xB0, 0x10, IAP_F_FM | IAP_F_WM | IAP_F_I7O), IAPDESCR(B0H_20H, 0xB0, 0x20, IAP_F_FM | IAP_F_I7O), IAPDESCR(B0H_40H, 0xB0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1179,9 +1292,9 @@ IAPDESCR(B1H_00H, 0xB1, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(B1H_01H, 0xB1, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(B1H_02H, 0xB1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B1H_04H, 0xB1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B1H_08H, 0xB1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B1H_10H, 0xB1, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1193,7 +1306,7 @@ IAP_F_WM), IAPDESCR(B2H_01H, 0xB2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(B3H_01H, 0xB3, 0x01, IAP_F_FM | IAP_F_ALLCPUSCORE2 | IAP_F_WM | IAP_F_I7O), @@ -1215,10 +1328,10 @@ IAPDESCR(B4H_02H, 0xB4, 0x02, IAP_F_FM | IAP_F_WM), IAPDESCR(B4H_04H, 0xB4, 0x04, IAP_F_FM | IAP_F_WM), - IAPDESCR(B6H_01H, 0xB6, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(B6H_01H, 0xB6, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_SBX), IAPDESCR(B7H_01H, 0xB7, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(B8H_01H, 0xB8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(B8H_02H, 0xB8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1228,17 +1341,29 @@ IAPDESCR(BAH_02H, 0xBA, 0x02, IAP_F_FM | IAP_F_I7O), IAPDESCR(BBH_01H, 0xBB, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), - IAPDESCR(BDH_01H, 0xBD, 0x01, IAP_F_FM | IAP_F_SB), - IAPDESCR(BDH_20H, 0xBD, 0x20, IAP_F_FM | IAP_F_SB), + IAPDESCR(BCH_11H, 0xBC, 0x11, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_12H, 0xBC, 0x12, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_14H, 0xBC, 0x14, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_18H, 0xBC, 0x18, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_21H, 0xBC, 0x21, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_22H, 0xBC, 0x22, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_24H, 0xBC, 0x24, IAP_F_FM | IAP_F_HW), + IAPDESCR(BCH_28H, 0xBC, 0x28, IAP_F_FM | IAP_F_HW), - IAPDESCR(BFH_05H, 0xBF, 0x05, IAP_F_FM | IAP_F_SB), + IAPDESCR(BDH_01H, 0xBD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(BDH_20H, 0xBD, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(BFH_05H, 0xBF, 0x05, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(C0H_00H, 0xC0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C0H_01H, 0xC0, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C0H_02H, 0xC0, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM | IAP_F_SB), IAPDESCR(C0H_04H, 0xC0, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | @@ -1247,17 +1372,23 @@ IAPDESCR(C1H_00H, 0xC1, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C1H_01H, 0xC1, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), - IAPDESCR(C1H_02H, 0xC1, 0x02, IAP_F_FM | IAP_F_SB), - IAPDESCR(C1H_08H, 0xC1, 0x08, IAP_F_FM | IAP_F_SB), - IAPDESCR(C1H_10H, 0xC1, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(C1H_20H, 0xC1, 0x20, IAP_F_FM | IAP_F_SB), + IAPDESCR(C1H_02H, 0xC1, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_SBX), + IAPDESCR(C1H_08H, 0xC1, 0x08, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C1H_10H, 0xC1, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C1H_20H, 0xC1, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(C1H_40H, 0xC1, 0x40, IAP_F_FM | IAP_F_HW), IAPDESCR(C1H_FEH, 0xC1, 0xFE, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C2H_00H, 0xC2, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C2H_01H, 0xC2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C2H_02H, 0xC2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C2H_04H, 0xC2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(C2H_07H, 0xC2, 0x07, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1269,36 +1400,50 @@ IAPDESCR(C3H_01H, 0xC3, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(C3H_02H, 0xC3, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C3H_04H, 0xC3, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C3H_10H, 0xC3, 0x10, IAP_F_FM | IAP_F_I7O), - IAPDESCR(C3H_20H, 0xC3, 0x20, IAP_F_FM | IAP_F_SB), + IAPDESCR(C3H_20H, 0xC3, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_00H, 0xC4, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_01H, 0xC4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_02H, 0xC4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_04H, 0xC4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_08H, 0xC4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C4H_0CH, 0xC4, 0x0C, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(C4H_0FH, 0xC4, 0x0F, IAP_F_FM | IAP_F_CA), - IAPDESCR(C4H_10H, 0xC4, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(C4H_20H, 0xC4, 0x20, IAP_F_FM | IAP_F_SB), - IAPDESCR(C4H_40H, 0xC4, 0x40, IAP_F_FM | IAP_F_SB), + IAPDESCR(C4H_10H, 0xC4, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C4H_20H, 0xC4, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C4H_40H, 0xC4, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C5H_00H, 0xC5, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), - IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), + IAPDESCR(C5H_01H, 0xC5, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(C5H_02H, 0xC5, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(C5H_04H, 0xC5, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB), - IAPDESCR(C5H_10H, 0xC5, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(C5H_20H, 0xC5, 0x20, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(C5H_04H, 0xC5, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(C5H_10H, 0xC5, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), + IAPDESCR(C5H_20H, 0xC5, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), IAPDESCR(C6H_00H, 0xC6, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(C6H_01H, 0xC6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1325,13 +1470,15 @@ IAPDESCR(CAH_00H, 0xCA, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(CAH_01H, 0xCA, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(CAH_02H, 0xCA, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CAH_04H, 0xCA, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CAH_08H, 0xCA, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), - IAPDESCR(CAH_10H, 0xCA, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(CAH_1EH, 0xCA, 0x1E, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(CAH_10H, 0xCA, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(CAH_1EH, 0xCA, 0x1E, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CBH_01H, 0xCB, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), @@ -1352,11 +1499,14 @@ IAPDESCR(CCH_02H, 0xCC, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(CCH_03H, 0xCC, 0x03, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(CCH_20H, 0xCC, 0x20, IAP_F_FM | IAP_F_SB), + IAPDESCR(CCH_20H, 0xCC, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(CDH_00H, 0xCD, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), - IAPDESCR(CDH_01H, 0xCD, 0x01, IAP_F_FM | IAP_F_SB), - IAPDESCR(CDH_02H, 0xCD, 0x02, IAP_F_FM | IAP_F_SB), + IAPDESCR(CDH_01H, 0xCD, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(CDH_02H, 0xCD, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX), IAPDESCR(CEH_00H, 0xCE, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(CFH_00H, 0xCF, 0x00, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1363,37 +1513,52 @@ IAPDESCR(D0H_00H, 0xD0, 0x00, IAP_F_FM | IAP_F_CC), IAPDESCR(D0H_01H, 0xD0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(D0H_02H, 0xD0, 0x02, IAP_F_FM | IAP_F_SB), - IAPDESCR(D0H_10H, 0xD0, 0x10, IAP_F_FM | IAP_F_SB), - IAPDESCR(D0H_20H, 0xD0, 0x20, IAP_F_FM | IAP_F_SB), - IAPDESCR(D0H_40H, 0xD0, 0x40, IAP_F_FM | IAP_F_SB), - IAPDESCR(D0H_80H, 0xD0, 0X80, IAP_F_FM | IAP_F_SB), - - IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_02H, 0xD0, 0x02, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_10H, 0xD0, 0x10, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_20H, 0xD0, 0x20, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_40H, 0xD0, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + IAPDESCR(D0H_80H, 0xD0, 0X80, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), + + IAPDESCR(D1H_01H, 0xD1, 0x01, IAP_F_FM | IAP_F_WM | IAP_F_SB | + IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(D1H_02H, 0xD1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(D1H_04H, 0xD1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(D1H_08H, 0xD1, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM), - IAPDESCR(D1H_40H, 0xD1, 0x40, IAP_F_FM | IAP_F_SB), + IAPDESCR(D1H_10H, 0xD1, 0x10, IAP_F_HW), + IAPDESCR(D1H_20H, 0xD1, 0x20, IAP_F_FM | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(D1H_40H, 0xD1, 0x40, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_01H, 0xD2, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_02H, 0xD2, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_04H, 0xD2, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_08H, 0xD2, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_I7 | IAP_F_WM | IAP_F_SB), + IAP_F_I7 | IAP_F_WM | IAP_F_SB | IAP_F_IB | IAP_F_IBX | IAP_F_HW), IAPDESCR(D2H_0FH, 0xD2, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(D2H_10H, 0xD2, 0x10, IAP_F_FM | IAP_F_CC2E), + IAPDESCR(D3H_01H, 0xD3, 0x01, IAP_F_FM | IAP_F_IB | IAP_F_SBX | + IAP_F_IBX | IAP_F_HW), + IAPDESCR(D3H_04H, 0xD3, 0x04, IAP_F_FM | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(D3H_10H, 0xD3, 0x10, IAP_F_IBX), + IAPDESCR(D3H_20H, 0xD3, 0x20, IAP_F_IBX), + IAPDESCR(D4H_01H, 0xD4, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | IAP_F_I7 | IAP_F_WM), IAPDESCR(D4H_02H, 0xD4, 0x02, IAP_F_FM | IAP_F_CA | IAP_F_CC2 | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(D4H_04H, 0xD4, 0x04, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D4H_08H, 0xD4, 0x08, IAP_F_FM | IAP_F_CA | IAP_F_CC2), IAPDESCR(D4H_0FH, 0xD4, 0x0F, IAP_F_FM | IAP_F_CA | IAP_F_CC2), @@ -1445,8 +1610,9 @@ IAPDESCR(E6H_00H, 0xE6, 0x00, IAP_F_FM | IAP_F_CC | IAP_F_CC2), IAPDESCR(E6H_01H, 0xE6, 0x01, IAP_F_FM | IAP_F_CA | IAP_F_I7 | - IAP_F_WM), + IAP_F_WM | IAP_F_SBX), IAPDESCR(E6H_02H, 0xE6, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), + IAPDESCR(E6H_1FH, 0xE6, 0x1F, IAP_F_FM | IAP_F_IBX | IAP_F_HW), IAPDESCR(E8H_01H, 0xE8, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(E8H_02H, 0xE8, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1456,39 +1622,43 @@ IAPDESCR(F0H_00H, 0xF0, 0x00, IAP_F_FM | IAP_F_ALLCPUSCORE2), IAPDESCR(F0H_01H, 0xF0, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_02H, 0xF0, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_04H, 0xF0, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_08H, 0xF0, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_10H, 0xF0, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_20H, 0xF0, 0x20, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_40H, 0xF0, 0x40, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F0H_80H, 0xF0, 0x80, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), - IAPDESCR(F1H_01H, 0xF1, 0x01, IAP_F_FM | IAP_F_SB), + IAPDESCR(F1H_01H, 0xF1, 0x01, IAP_F_FM | IAP_F_SB | IAP_F_IB | + IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F1H_02H, 0xF1, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F1H_04H, 0xF1, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F1H_07H, 0xF1, 0x07, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX | IAP_F_HW), IAPDESCR(F2H_01H, 0xF2, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(F2H_02H, 0xF2, 0x02, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), IAPDESCR(F2H_04H, 0xF2, 0x04, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(F2H_05H, 0xF2, 0x05, IAP_F_FM | IAP_F_HW), + IAPDESCR(F2H_06H, 0xF2, 0x06, IAP_F_FM | IAP_F_HW), IAPDESCR(F2H_08H, 0xF2, 0x08, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), - IAPDESCR(F2H_0AH, 0xF2, 0x0A, IAP_F_FM | IAP_F_SB), + IAP_F_SB | IAP_F_IB | IAP_F_SBX | IAP_F_IBX), + IAPDESCR(F2H_0AH, 0xF2, 0x0A, IAP_F_FM | IAP_F_SB | IAP_F_SBX | + IAP_F_IBX), IAPDESCR(F2H_0FH, 0xF2, 0x0F, IAP_F_FM | IAP_F_I7 | IAP_F_WM), IAPDESCR(F3H_01H, 0xF3, 0x01, IAP_F_FM | IAP_F_I7O), @@ -1503,7 +1673,7 @@ IAPDESCR(F4H_04H, 0xF4, 0x04, IAP_F_FM | IAP_F_WM | IAP_F_I7O), IAPDESCR(F4H_08H, 0xF4, 0x08, IAP_F_FM | IAP_F_I7O), IAPDESCR(F4H_10H, 0xF4, 0x10, IAP_F_FM | IAP_F_I7 | IAP_F_WM | - IAP_F_SB), + IAP_F_SB | IAP_F_SBX), IAPDESCR(F6H_01H, 0xF6, 0x01, IAP_F_FM | IAP_F_I7 | IAP_F_WM), @@ -1644,7 +1814,7 @@ case PMC_EV_IAP_EVENT_60H_01H: case PMC_EV_IAP_EVENT_60H_02H: case PMC_EV_IAP_EVENT_60H_04H: - case PMC_EV_IAP_EVENT_60H_08H: + case PMC_EV_IAP_EVENT_60H_08H: case PMC_EV_IAP_EVENT_B3H_01H: case PMC_EV_IAP_EVENT_B3H_02H: case PMC_EV_IAP_EVENT_B3H_04H: @@ -1675,21 +1845,35 @@ } static int -iap_event_sandybridge_ok_on_counter(enum pmc_event pe, int ri) +iap_event_sb_sbx_ib_ibx_ok_on_counter(enum pmc_event pe, int ri) { uint32_t mask; - + switch (pe) { - /* - * Events valid only on counter 2. - */ + /* Events valid only on counter 0. */ + case PMC_EV_IAP_EVENT_B7H_01H: + mask = 0x1; + break; + /* Events valid only on counter 1. */ + case PMC_EV_IAP_EVENT_C0H_01H: + mask = 0x1; + break; + /* Events valid only on counter 2. */ case PMC_EV_IAP_EVENT_48H_01H: - mask = 0x2; + case PMC_EV_IAP_EVENT_A2H_02H: + mask = 0x4; break; + /* Events valid only on counter 3. */ + case PMC_EV_IAP_EVENT_A3H_08H: + case PMC_EV_IAP_EVENT_BBH_01H: + case PMC_EV_IAP_EVENT_CDH_01H: + case PMC_EV_IAP_EVENT_CDH_02H: + mask = 0x8; + break; default: mask = ~0; /* Any row index is ok. */ } - + return (mask & (1 << ri)); } @@ -1758,12 +1942,12 @@ * A small number of events are not supported in all the * processors based on a given microarchitecture. */ - if (ev == PMC_EV_IAP_EVENT_0FH_01H || ev == PMC_EV_IAP_EVENT_0FH_80H) { + if (ev == PMC_EV_IAP_EVENT_0FH_01H || ev == PMC_EV_IAP_EVENT_0FH_80H) { model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4); - if (core_cputype == PMC_CPU_INTEL_COREI7 && model != 0x2E) - return (EINVAL); + if (core_cputype == PMC_CPU_INTEL_COREI7 && model != 0x2E) + return (EINVAL); } - + switch (core_cputype) { case PMC_CPU_INTEL_COREI7: if (iap_event_corei7_ok_on_counter(ev, ri) == 0) @@ -1770,7 +1954,11 @@ return (EINVAL); break; case PMC_CPU_INTEL_SANDYBRIDGE: - if (iap_event_sandybridge_ok_on_counter(ev, ri) == 0) + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + case PMC_CPU_INTEL_IVYBRIDGE: + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + case PMC_CPU_INTEL_HASWELL: + if (iap_event_sb_sbx_ib_ibx_ok_on_counter(ev, ri) == 0) return (EINVAL); break; case PMC_CPU_INTEL_WESTMERE: @@ -1804,9 +1992,21 @@ case PMC_CPU_INTEL_COREI7: cpuflag = IAP_F_I7; break; - case PMC_CPU_INTEL_SANDYBRIDGE: + case PMC_CPU_INTEL_HASWELL: + cpuflag = IAP_F_HW; + break; + case PMC_CPU_INTEL_IVYBRIDGE: + cpuflag = IAP_F_IB; + break; + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + cpuflag = IAP_F_IBX; + break; + case PMC_CPU_INTEL_SANDYBRIDGE: cpuflag = IAP_F_SB; break; + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + cpuflag = IAP_F_SBX; + break; case PMC_CPU_INTEL_WESTMERE: cpuflag = IAP_F_WM; break; @@ -1894,7 +2094,8 @@ * Only Atom and SandyBridge CPUs support the 'ANY' qualifier. */ if (core_cputype == PMC_CPU_INTEL_ATOM || - core_cputype == PMC_CPU_INTEL_SANDYBRIDGE) + core_cputype == PMC_CPU_INTEL_SANDYBRIDGE || + core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON) evsel |= (config & IAP_ANY); else if (config & IAP_ANY) return (EINVAL); @@ -1909,10 +2110,17 @@ if (core_cputype == PMC_CPU_INTEL_COREI7 && ev == PMC_EV_IAP_EVENT_BBH_01H) return (EINVAL); - if ( a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK) + if ((core_cputype == PMC_CPU_INTEL_COREI7 || + core_cputype == PMC_CPU_INTEL_WESTMERE) && + a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_I7WM) return (EINVAL); - pm->pm_md.pm_iap.pm_iap_rsp = - a->pm_md.pm_iap.pm_iap_rsp & IA_OFFCORE_RSP_MASK; + else if ((core_cputype == PMC_CPU_INTEL_SANDYBRIDGE || + core_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON || + core_cputype == PMC_CPU_INTEL_IVYBRIDGE || + core_cputype == PMC_CPU_INTEL_IVYBRIDGE_XEON) && + a->pm_md.pm_iap.pm_iap_rsp & ~IA_OFFCORE_RSP_MASK_SBIB) + return (EINVAL); + pm->pm_md.pm_iap.pm_iap_rsp = a->pm_md.pm_iap.pm_iap_rsp; } if (caps & PMC_CAP_THRESHOLD) @@ -2256,7 +2464,7 @@ if (error) continue; - wrmsr(IAP_EVSEL0 + ri, msr | (pm->pm_md.pm_iap.pm_iap_evsel | + wrmsr(IAP_EVSEL0 + ri, msr | (pm->pm_md.pm_iap.pm_iap_evsel | IAP_EN)); } @@ -2336,8 +2544,8 @@ /* Reload sampling count. */ wrmsr(IAF_CTR0 + n, v); - PMCDBG(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu, error, - (uintmax_t) v, (uintmax_t) rdpmc(IAF_RI_TO_MSR(n))); + PMCDBG(MDP,INT, 1, "iaf-intr cpu=%d error=%d v=%jx(%jx)", cpu, + error, (uintmax_t) v, (uintmax_t) rdpmc(IAF_RI_TO_MSR(n))); } /* @@ -2406,8 +2614,12 @@ PMCDBG(MDP,INI,1,"core-init cputype=%d ncpu=%d ipa-version=%d", md->pmd_cputype, maxcpu, ipa_version); - if (ipa_version < 1 || ipa_version > 3) /* Unknown PMC architecture. */ + if (ipa_version < 1 || ipa_version > 3) { + /* Unknown PMC architecture. */ + printf("hwpc_core: unknown PMC architecture: %d\n", + ipa_version); return (EPROGMISMATCH); + } core_cputype = md->pmd_cputype; Modified: trunk/sys/dev/hwpmc/hwpmc_core.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_core.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_core.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_core.h 241609 2012-10-16 13:27:20Z fabient $ */ #ifndef _DEV_HWPMC_CORE_H_ @@ -46,7 +47,7 @@ */ struct pmc_md_iap_op_pmcallocate { uint32_t pm_iap_config; - uint32_t pm_iap_rsp; + uint64_t pm_iap_rsp; }; #define IAP_EVSEL(C) ((C) & 0xFF) @@ -60,7 +61,8 @@ #define IAP_INV (1 << 23) #define IAP_CMASK(C) (((C) & 0xFF) << 24) -#define IA_OFFCORE_RSP_MASK 0xF7FF +#define IA_OFFCORE_RSP_MASK_I7WM 0x000000F7FF +#define IA_OFFCORE_RSP_MASK_SBIB 0x3F807F8FFF #ifdef _KERNEL @@ -167,7 +169,7 @@ struct pmc_md_iap_pmc { uint32_t pm_iap_evsel; - uint32_t pm_iap_rsp; + uint64_t pm_iap_rsp; }; /* Modified: trunk/sys/dev/hwpmc/hwpmc_ia64.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_ia64.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_ia64.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_ia64.c 185168 2008-11-22 12:34:49Z jkoshy $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_intel.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_intel.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_intel.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_intel.c 250373 2013-05-08 16:43:52Z hiren $"); #include #include @@ -68,7 +69,7 @@ (uintmax_t) rcr4()); /* always turn off the RDPMC instruction */ - load_cr4(rcr4() & ~CR4_PCE); + load_cr4(rcr4() & ~CR4_PCE); return 0; } @@ -131,8 +132,14 @@ nclasses = 3; break; case 0x1A: - case 0x1E: /* Per Intel document 253669-032 9/2009, pages A-2 and A-57 */ - case 0x1F: /* Per Intel document 253669-032 9/2009, pages A-2 and A-57 */ + case 0x1E: /* + * Per Intel document 253669-032 9/2009, + * pages A-2 and A-57 + */ + case 0x1F: /* + * Per Intel document 253669-032 9/2009, + * pages A-2 and A-57 + */ case 0x2E: cputype = PMC_CPU_INTEL_COREI7; nclasses = 5; @@ -146,6 +153,22 @@ cputype = PMC_CPU_INTEL_SANDYBRIDGE; nclasses = 5; break; + case 0x2D: /* Per Intel document 253669-044US 08/2012. */ + cputype = PMC_CPU_INTEL_SANDYBRIDGE_XEON; + nclasses = 3; + break; + case 0x3A: /* Per Intel document 253669-043US 05/2012. */ + cputype = PMC_CPU_INTEL_IVYBRIDGE; + nclasses = 3; + break; + case 0x3E: /* Per Intel document 325462-045US 01/2013. */ + cputype = PMC_CPU_INTEL_IVYBRIDGE_XEON; + nclasses = 3; + break; + case 0x3C: /* Per Intel document 325462-045US 01/2013. */ + cputype = PMC_CPU_INTEL_HASWELL; + nclasses = 5; + break; } break; #if defined(__i386__) || defined(__amd64__) @@ -164,7 +187,7 @@ /* Allocate base class and initialize machine dependent struct */ pmc_mdep = pmc_mdep_alloc(nclasses); - pmc_mdep->pmd_cputype = cputype; + pmc_mdep->pmd_cputype = cputype; pmc_mdep->pmd_switch_in = intel_switch_in; pmc_mdep->pmd_switch_out = intel_switch_out; @@ -184,8 +207,12 @@ case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_IVYBRIDGE: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + case PMC_CPU_INTEL_HASWELL: error = pmc_core_initialize(pmc_mdep, ncpus); break; @@ -224,6 +251,9 @@ KASSERT(0, ("[intel,%d] Unknown CPU type", __LINE__)); } + if (error) + goto error; + /* * Init the uncore class. */ @@ -233,6 +263,7 @@ * Intel Corei7 and Westmere processors. */ case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_HASWELL: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: error = pmc_uncore_initialize(pmc_mdep, ncpus); @@ -263,8 +294,12 @@ case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_HASWELL: + case PMC_CPU_INTEL_IVYBRIDGE: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + case PMC_CPU_INTEL_IVYBRIDGE_XEON: pmc_core_finalize(md); break; @@ -294,6 +329,7 @@ #if defined(__i386__) || defined(__amd64__) switch (md->pmd_cputype) { case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_HASWELL: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: pmc_uncore_finalize(md); Modified: trunk/sys/dev/hwpmc/hwpmc_logging.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_logging.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_logging.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005-2007 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -34,7 +35,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_logging.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_mips.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_mips.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_mips.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010, George V. Neville-Neil * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_mips.c 204635 2010-03-03 15:05:58Z gnn $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_mips24k.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_mips24k.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_mips24k.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010 George V. Neville-Neil * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_mips24k.c 204635 2010-03-03 15:05:58Z gnn $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_mips24k.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_mips24k.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_mips24k.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010 George V. Neville-Neil * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_mips24k.h 204635 2010-03-03 15:05:58Z gnn $ */ #ifndef _DEV_HWPMC_MIPS24K_H_ Modified: trunk/sys/dev/hwpmc/hwpmc_mod.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_mod.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_mod.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2008 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -30,7 +31,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_mod.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_pentium.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_pentium.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_pentium.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2005 Joseph Koshy * All rights reserved. @@ -25,7 +26,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_pentium.c 184802 2008-11-09 17:37:54Z jkoshy $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_pentium.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_pentium.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_pentium.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_pentium.h 184802 2008-11-09 17:37:54Z jkoshy $ */ /* Machine dependent interfaces */ Modified: trunk/sys/dev/hwpmc/hwpmc_piv.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_piv.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_piv.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2007 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_piv.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_piv.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_piv.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_piv.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_piv.h 184802 2008-11-09 17:37:54Z jkoshy $ */ /* Machine dependent interfaces */ Modified: trunk/sys/dev/hwpmc/hwpmc_powerpc.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_powerpc.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_powerpc.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2011 Justin Hibbits * Copyright (c) 2005, Joseph Koshy @@ -27,7 +28,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_powerpc.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_ppro.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_ppro.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_ppro.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2005,2008 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_ppro.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_ppro.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_ppro.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_ppro.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_ppro.h 184802 2008-11-09 17:37:54Z jkoshy $ */ /* Machine dependent interfaces */ Modified: trunk/sys/dev/hwpmc/hwpmc_soft.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_soft.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_soft.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2012 Fabien Thomas * All rights reserved. @@ -25,7 +26,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_soft.c 250600 2013-05-13 15:18:36Z fabient $"); #include #include @@ -124,6 +125,9 @@ if (ps == NULL) return (EINVAL); pmc_soft_ev_release(ps); + /* Module unload is protected by pmc SX lock. */ + if (ps->ps_alloc != NULL) + ps->ps_alloc(); return (0); } @@ -311,6 +315,8 @@ soft_release_pmc(int cpu, int ri, struct pmc *pmc) { struct pmc_hw *phw; + enum pmc_event ev; + struct pmc_soft *ps; (void) pmc; @@ -324,9 +330,16 @@ KASSERT(phw->phw_pmc == NULL, ("[soft,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); - /* - * Nothing to do. - */ + ev = pmc->pm_event; + + /* Check if event is registered. */ + ps = pmc_soft_ev_acquire(ev); + KASSERT(ps != NULL, + ("[soft,%d] unregistered event %d", __LINE__, ev)); + pmc_soft_ev_release(ps); + /* Module unload is protected by pmc SX lock. */ + if (ps->ps_release != NULL) + ps->ps_release(); return (0); } Modified: trunk/sys/dev/hwpmc/hwpmc_soft.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_soft.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_soft.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2012 Fabien Thomas * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_soft.h 236238 2012-05-29 14:50:21Z fabient $ */ #ifndef _DEV_HWPMC_SOFT_H_ Modified: trunk/sys/dev/hwpmc/hwpmc_sparc64.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_sparc64.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_sparc64.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005, Joseph Koshy * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_sparc64.c 185168 2008-11-22 12:34:49Z jkoshy $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_tsc.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_tsc.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_tsc.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -25,7 +26,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_tsc.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_tsc.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_tsc.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_tsc.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_tsc.h 184802 2008-11-09 17:37:54Z jkoshy $ */ #ifndef _DEV_HWPMC_TSC_H_ Modified: trunk/sys/dev/hwpmc/hwpmc_uncore.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_uncore.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_uncore.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010 Fabien Thomas * All rights reserved. @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_uncore.c 250038 2013-04-29 04:38:43Z hiren $"); #include #include @@ -51,10 +52,12 @@ PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE) #define SELECTSEL(x) \ - (((x) == PMC_CPU_INTEL_SANDYBRIDGE) ? UCP_CB0_EVSEL0 : UCP_EVSEL0) + (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \ + UCP_CB0_EVSEL0 : UCP_EVSEL0) #define SELECTOFF(x) \ - (((x) == PMC_CPU_INTEL_SANDYBRIDGE) ? UCF_OFFSET_SB : UCF_OFFSET) + (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \ + UCF_OFFSET_SB : UCF_OFFSET) static enum pmc_cputype uncore_cputype; @@ -469,7 +472,8 @@ #define UCP_F_I7 (1 << 0) /* CPU: Core i7 */ #define UCP_F_WM (1 << 1) /* CPU: Westmere */ #define UCP_F_SB (1 << 2) /* CPU: Sandy Bridge */ -#define UCP_F_FM (1 << 3) /* Fixed mask */ +#define UCP_F_HW (1 << 3) /* CPU: Haswell */ +#define UCP_F_FM (1 << 4) /* Fixed mask */ #define UCP_F_ALLCPUS \ (UCP_F_I7 | UCP_F_WM) @@ -573,15 +577,16 @@ UCPDESCR(21H_04H, 0x21, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), UCPDESCR(22H_01H, 0x22, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB), + UCP_F_SB | UCP_F_HW), UCPDESCR(22H_02H, 0x22, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB), + UCP_F_SB | UCP_F_HW), UCPDESCR(22H_04H, 0x22, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM | - UCP_F_SB), - UCPDESCR(22H_08H, 0x22, 0x08, UCP_F_FM | UCP_F_SB), - UCPDESCR(22H_20H, 0x22, 0x20, UCP_F_FM | UCP_F_SB), - UCPDESCR(22H_40H, 0x22, 0x40, UCP_F_FM | UCP_F_SB), - UCPDESCR(22H_80H, 0x22, 0x80, UCP_F_FM | UCP_F_SB), + UCP_F_SB | UCP_F_HW), + UCPDESCR(22H_08H, 0x22, 0x08, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(22H_10H, 0x22, 0x10, UCP_F_FM | UCP_F_HW), + UCPDESCR(22H_20H, 0x22, 0x20, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(22H_40H, 0x22, 0x40, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(22H_80H, 0x22, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), UCPDESCR(23H_01H, 0x23, 0x01, UCP_F_FM | UCP_F_I7 | UCP_F_WM), UCPDESCR(23H_02H, 0x23, 0x02, UCP_F_FM | UCP_F_I7 | UCP_F_WM), @@ -671,14 +676,19 @@ UCPDESCR(33H_04H, 0x33, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), UCPDESCR(33H_07H, 0x33, 0x07, UCP_F_FM | UCP_F_WM), - UCPDESCR(34H_01H, 0x34, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + UCPDESCR(34H_01H, 0x34, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(34H_02H, 0x34, 0x02, UCP_F_FM | UCP_F_WM | UCP_F_SB), UCPDESCR(34H_04H, 0x34, 0x04, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_08H, 0x34, 0x08, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_10H, 0x34, 0x10, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_20H, 0x34, 0x20, UCP_F_FM | UCP_F_WM | UCP_F_SB), - UCPDESCR(34H_40H, 0x34, 0x40, UCP_F_FM | UCP_F_SB), - UCPDESCR(34H_80H, 0x34, 0x80, UCP_F_FM | UCP_F_SB), + UCPDESCR(34H_06H, 0x34, 0x06, UCP_F_FM | UCP_F_HW), + UCPDESCR(34H_08H, 0x34, 0x08, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), + UCPDESCR(34H_10H, 0x34, 0x10, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), + UCPDESCR(34H_20H, 0x34, 0x20, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), + UCPDESCR(34H_40H, 0x34, 0x40, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(34H_80H, 0x34, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), UCPDESCR(35H_01H, 0x35, 0x01, UCP_F_FM | UCP_F_WM), UCPDESCR(35H_02H, 0x35, 0x02, UCP_F_FM | UCP_F_WM), @@ -745,27 +755,31 @@ UCPDESCR(66H_04H, 0x66, 0x04, UCP_F_FM | UCP_F_I7 | UCP_F_WM), UCPDESCR(67H_01H, 0x67, 0x01, UCP_F_FM | UCP_F_WM), - - UCPDESCR(80H_01H, 0x80, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + + UCPDESCR(80H_01H, 0x80, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(80H_02H, 0x80, 0x02, UCP_F_FM | UCP_F_WM), UCPDESCR(80H_04H, 0x80, 0x04, UCP_F_FM | UCP_F_WM), UCPDESCR(80H_08H, 0x80, 0x08, UCP_F_FM | UCP_F_WM), - - UCPDESCR(81H_01H, 0x81, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + + UCPDESCR(81H_01H, 0x81, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(81H_02H, 0x81, 0x02, UCP_F_FM | UCP_F_WM), UCPDESCR(81H_04H, 0x81, 0x04, UCP_F_FM | UCP_F_WM), UCPDESCR(81H_08H, 0x81, 0x08, UCP_F_FM | UCP_F_WM), - UCPDESCR(81H_20H, 0x81, 0x20, UCP_F_FM | UCP_F_SB), - UCPDESCR(81H_80H, 0x81, 0x80, UCP_F_FM | UCP_F_SB), + UCPDESCR(81H_20H, 0x81, 0x20, UCP_F_FM | UCP_F_SB | UCP_F_HW), + UCPDESCR(81H_80H, 0x81, 0x80, UCP_F_FM | UCP_F_SB | UCP_F_HW), UCPDESCR(82H_01H, 0x82, 0x01, UCP_F_FM | UCP_F_WM), - - UCPDESCR(83H_01H, 0x83, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + + UCPDESCR(83H_01H, 0x83, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(83H_02H, 0x83, 0x02, UCP_F_FM | UCP_F_WM), UCPDESCR(83H_04H, 0x83, 0x04, UCP_F_FM | UCP_F_WM), UCPDESCR(83H_08H, 0x83, 0x08, UCP_F_FM | UCP_F_WM), - - UCPDESCR(84H_01H, 0x84, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB), + + UCPDESCR(84H_01H, 0x84, 0x01, UCP_F_FM | UCP_F_WM | UCP_F_SB | + UCP_F_HW), UCPDESCR(84H_02H, 0x84, 0x02, UCP_F_FM | UCP_F_WM), UCPDESCR(84H_04H, 0x84, 0x04, UCP_F_FM | UCP_F_WM), UCPDESCR(84H_08H, 0x84, 0x08, UCP_F_FM | UCP_F_WM), @@ -788,13 +802,16 @@ return (1ULL << uncore_ucp_width) - rlc; } +/* + * Counter specific event information for Sandybridge and Haswell + */ static int -ucp_event_sandybridge_ok_on_counter(enum pmc_event pe, int ri) +ucp_event_sb_hw_ok_on_counter(enum pmc_event pe, int ri) { uint32_t mask; - + switch (pe) { - /* + /* * Events valid only on counter 0. */ case PMC_EV_UCP_EVENT_80H_01H: @@ -801,11 +818,11 @@ case PMC_EV_UCP_EVENT_83H_01H: mask = (1 << 0); break; - + default: mask = ~0; /* Any row index is ok. */ } - + return (mask & (1 << ri)); } @@ -831,15 +848,16 @@ ev = pm->pm_event; switch (uncore_cputype) { + case PMC_CPU_INTEL_HASWELL: case PMC_CPU_INTEL_SANDYBRIDGE: - if (ucp_event_sandybridge_ok_on_counter(ev, ri) == 0) + if (ucp_event_sb_hw_ok_on_counter(ev, ri) == 0) return (EINVAL); break; default: break; } - + /* * Look for an event descriptor with matching CPU and event id * fields. @@ -849,6 +867,9 @@ case PMC_CPU_INTEL_COREI7: cpuflag = UCP_F_I7; break; + case PMC_CPU_INTEL_HASWELL: + cpuflag = UCP_F_HW; + break; case PMC_CPU_INTEL_SANDYBRIDGE: cpuflag = UCP_F_SB; break; @@ -1025,9 +1046,9 @@ evsel = pm->pm_md.pm_ucp.pm_ucp_evsel; - PMCDBG(MDP,STA,2, - "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", - cpu, ri, SELECTSEL(uncore_cputype) + ri, evsel); + PMCDBG(MDP,STA,2, + "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", + cpu, ri, SELECTSEL(uncore_cputype) + ri, evsel); /* Event specific configuration. */ switch (pm->pm_event) { @@ -1047,12 +1068,12 @@ case PMC_EV_UCP_EVENT_0CH_08H_S: wrmsr(MSR_GQ_SNOOP_MESF,0x4); break; - default: + default: break; } wrmsr(SELECTSEL(uncore_cputype) + ri, evsel); - + do { cc->pc_resync = 0; cc->pc_globalctrl |= (1ULL << ri); Modified: trunk/sys/dev/hwpmc/hwpmc_uncore.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_uncore.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_uncore.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2010 Fabien Thomas * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_uncore.h 237444 2012-06-22 14:58:40Z gnn $ */ #ifndef _DEV_HWPMC_UNCORE_H_ Modified: trunk/sys/dev/hwpmc/hwpmc_x86.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_x86.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_x86.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005,2008 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_x86.c 250581 2013-05-12 22:01:22Z hiren $"); #include #include @@ -161,6 +162,7 @@ KASSERT(TRAPF_USERMODE(tf) == 0,("[x86,%d] not a kernel backtrace", __LINE__)); + td = curthread; pc = PMC_TRAPFRAME_TO_PC(tf); fp = PMC_TRAPFRAME_TO_FP(tf); sp = PMC_TRAPFRAME_TO_KERNEL_SP(tf); @@ -168,9 +170,6 @@ *cc++ = pc; r = fp + sizeof(uintptr_t); /* points to return address */ - if ((td = curthread) == NULL) - return (1); - if (nframes <= 1) return (1); @@ -252,7 +251,7 @@ return (NULL); /* disallow sampling if we do not have an LAPIC */ - if (!lapic_enable_pmc()) + if (md != NULL && !lapic_enable_pmc()) for (i = 0; i < md->pmd_nclass; i++) { if (i == PMC_CLASS_INDEX_SOFT) continue; Modified: trunk/sys/dev/hwpmc/hwpmc_xscale.c =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_xscale.c 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_xscale.c 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2009 Rui Paulo * All rights reserved. @@ -26,7 +27,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_xscale.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/sys/dev/hwpmc/hwpmc_xscale.h =================================================================== --- trunk/sys/dev/hwpmc/hwpmc_xscale.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/hwpmc_xscale.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2009 Rui Paulo * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/hwpmc_xscale.h 200928 2009-12-23 23:16:54Z rpaulo $ */ #ifndef _DEV_HWPMC_XSCALE_H_ Modified: trunk/sys/dev/hwpmc/pmc_events.h =================================================================== --- trunk/sys/dev/hwpmc/pmc_events.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/dev/hwpmc/pmc_events.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005 Joseph Koshy * All rights reserved. @@ -23,13 +24,13 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/sys/dev/hwpmc/pmc_events.h 250038 2013-04-29 04:38:43Z hiren $ */ #ifndef _DEV_HWPMC_PMC_EVENTS_H_ #define _DEV_HWPMC_PMC_EVENTS_H_ -/* +/* * Note: Documentation on adding events can be found both in * the source tree at src/share/doc/papers/hwpmc/hwpmc.ms * as well as on-line at: @@ -506,10 +507,15 @@ __PMC_EV(IAP, EVENT_08H_07H) \ __PMC_EV(IAP, EVENT_08H_08H) \ __PMC_EV(IAP, EVENT_08H_09H) \ +__PMC_EV(IAP, EVENT_08H_0EH) \ __PMC_EV(IAP, EVENT_08H_10H) \ __PMC_EV(IAP, EVENT_08H_20H) \ __PMC_EV(IAP, EVENT_08H_40H) \ +__PMC_EV(IAP, EVENT_08H_60H) \ __PMC_EV(IAP, EVENT_08H_80H) \ +__PMC_EV(IAP, EVENT_08H_81H) \ +__PMC_EV(IAP, EVENT_08H_82H) \ +__PMC_EV(IAP, EVENT_08H_84H) \ __PMC_EV(IAP, EVENT_09H_01H) \ __PMC_EV(IAP, EVENT_09H_02H) \ __PMC_EV(IAP, EVENT_09H_04H) \ @@ -524,6 +530,9 @@ __PMC_EV(IAP, EVENT_0DH_40H) \ __PMC_EV(IAP, EVENT_0EH_01H) \ __PMC_EV(IAP, EVENT_0EH_02H) \ +__PMC_EV(IAP, EVENT_0EH_10H) \ +__PMC_EV(IAP, EVENT_0EH_20H) \ +__PMC_EV(IAP, EVENT_0EH_40H) \ __PMC_EV(IAP, EVENT_0FH_01H) \ __PMC_EV(IAP, EVENT_0FH_02H) \ __PMC_EV(IAP, EVENT_0FH_08H) \ @@ -575,6 +584,14 @@ __PMC_EV(IAP, EVENT_20H_01H) \ __PMC_EV(IAP, EVENT_21H) \ __PMC_EV(IAP, EVENT_22H) \ +__PMC_EV(IAP, EVENT_22H_01H) \ +__PMC_EV(IAP, EVENT_22H_02H) \ +__PMC_EV(IAP, EVENT_22H_04H) \ +__PMC_EV(IAP, EVENT_22H_08H) \ +__PMC_EV(IAP, EVENT_22H_10H) \ +__PMC_EV(IAP, EVENT_22H_20H) \ +__PMC_EV(IAP, EVENT_22H_40H) \ +__PMC_EV(IAP, EVENT_22H_80H) \ __PMC_EV(IAP, EVENT_23H) \ __PMC_EV(IAP, EVENT_24H) \ __PMC_EV(IAP, EVENT_24H_01H) \ @@ -585,11 +602,26 @@ __PMC_EV(IAP, EVENT_24H_0CH) \ __PMC_EV(IAP, EVENT_24H_10H) \ __PMC_EV(IAP, EVENT_24H_20H) \ +__PMC_EV(IAP, EVENT_24H_21H) \ +__PMC_EV(IAP, EVENT_24H_22H) \ +__PMC_EV(IAP, EVENT_24H_24H) \ +__PMC_EV(IAP, EVENT_24H_27H) \ __PMC_EV(IAP, EVENT_24H_30H) \ __PMC_EV(IAP, EVENT_24H_40H) \ +__PMC_EV(IAP, EVENT_24H_41H) \ +__PMC_EV(IAP, EVENT_24H_42H) \ +__PMC_EV(IAP, EVENT_24H_44H) \ +__PMC_EV(IAP, EVENT_24H_50H) \ __PMC_EV(IAP, EVENT_24H_80H) \ __PMC_EV(IAP, EVENT_24H_AAH) \ +__PMC_EV(IAP, EVENT_24H_3FH) \ +__PMC_EV(IAP, EVENT_24H_BFH) \ __PMC_EV(IAP, EVENT_24H_C0H) \ +__PMC_EV(IAP, EVENT_24H_E1H) \ +__PMC_EV(IAP, EVENT_24H_E2H) \ +__PMC_EV(IAP, EVENT_24H_E4H) \ +__PMC_EV(IAP, EVENT_24H_E7H) \ +__PMC_EV(IAP, EVENT_24H_F8H) \ __PMC_EV(IAP, EVENT_24H_FFH) \ __PMC_EV(IAP, EVENT_25H) \ __PMC_EV(IAP, EVENT_26H) \ @@ -614,6 +646,7 @@ __PMC_EV(IAP, EVENT_27H_10H) \ __PMC_EV(IAP, EVENT_27H_20H) \ __PMC_EV(IAP, EVENT_27H_40H) \ +__PMC_EV(IAP, EVENT_27H_50H) \ __PMC_EV(IAP, EVENT_27H_80H) \ __PMC_EV(IAP, EVENT_27H_E0H) \ __PMC_EV(IAP, EVENT_27H_F0H) \ @@ -670,6 +703,7 @@ __PMC_EV(IAP, EVENT_48H_01H) \ __PMC_EV(IAP, EVENT_48H_02H) \ __PMC_EV(IAP, EVENT_49H_00H) \ +__PMC_EV(IAP, EVENT_49H_0EH) \ __PMC_EV(IAP, EVENT_49H_01H) \ __PMC_EV(IAP, EVENT_49H_02H) \ __PMC_EV(IAP, EVENT_49H_04H) \ @@ -676,6 +710,7 @@ __PMC_EV(IAP, EVENT_49H_10H) \ __PMC_EV(IAP, EVENT_49H_20H) \ __PMC_EV(IAP, EVENT_49H_40H) \ +__PMC_EV(IAP, EVENT_49H_60H) \ __PMC_EV(IAP, EVENT_49H_80H) \ __PMC_EV(IAP, EVENT_4BH_00H) \ __PMC_EV(IAP, EVENT_4BH_01H) \ @@ -701,6 +736,10 @@ __PMC_EV(IAP, EVENT_51H_08H) \ __PMC_EV(IAP, EVENT_52H_01H) \ __PMC_EV(IAP, EVENT_53H_01H) \ +__PMC_EV(IAP, EVENT_58H_01H) \ +__PMC_EV(IAP, EVENT_58H_02H) \ +__PMC_EV(IAP, EVENT_58H_04H) \ +__PMC_EV(IAP, EVENT_58H_08H) \ __PMC_EV(IAP, EVENT_59H_20H) \ __PMC_EV(IAP, EVENT_59H_40H) \ __PMC_EV(IAP, EVENT_59H_80H) \ @@ -711,6 +750,8 @@ __PMC_EV(IAP, EVENT_5CH_01H) \ __PMC_EV(IAP, EVENT_5CH_02H) \ __PMC_EV(IAP, EVENT_5EH_01H) \ +__PMC_EV(IAP, EVENT_5FH_01H) \ +__PMC_EV(IAP, EVENT_5FH_04H) \ __PMC_EV(IAP, EVENT_60H) \ __PMC_EV(IAP, EVENT_60H_01H) \ __PMC_EV(IAP, EVENT_60H_02H) \ @@ -746,6 +787,9 @@ __PMC_EV(IAP, EVENT_79H_10H) \ __PMC_EV(IAP, EVENT_79H_20H) \ __PMC_EV(IAP, EVENT_79H_30H) \ +__PMC_EV(IAP, EVENT_79H_18H) \ +__PMC_EV(IAP, EVENT_79H_24H) \ +__PMC_EV(IAP, EVENT_79H_3CH) \ __PMC_EV(IAP, EVENT_7AH) \ __PMC_EV(IAP, EVENT_7BH) \ __PMC_EV(IAP, EVENT_7DH) \ @@ -773,9 +817,11 @@ __PMC_EV(IAP, EVENT_85H_01H) \ __PMC_EV(IAP, EVENT_85H_02H) \ __PMC_EV(IAP, EVENT_85H_04H) \ +__PMC_EV(IAP, EVENT_85H_0EH) \ __PMC_EV(IAP, EVENT_85H_10H) \ __PMC_EV(IAP, EVENT_85H_20H) \ __PMC_EV(IAP, EVENT_85H_40H) \ +__PMC_EV(IAP, EVENT_85H_60H) \ __PMC_EV(IAP, EVENT_85H_80H) \ __PMC_EV(IAP, EVENT_86H_00H) \ __PMC_EV(IAP, EVENT_87H_00H) \ @@ -844,6 +890,11 @@ __PMC_EV(IAP, EVENT_A2H_20H) \ __PMC_EV(IAP, EVENT_A2H_40H) \ __PMC_EV(IAP, EVENT_A2H_80H) \ +__PMC_EV(IAP, EVENT_A3H_01H) \ +__PMC_EV(IAP, EVENT_A3H_02H) \ +__PMC_EV(IAP, EVENT_A3H_04H) \ +__PMC_EV(IAP, EVENT_A3H_05H) \ +__PMC_EV(IAP, EVENT_A3H_08H) \ __PMC_EV(IAP, EVENT_A6H_01H) \ __PMC_EV(IAP, EVENT_A7H_01H) \ __PMC_EV(IAP, EVENT_A8H_01H) \ @@ -901,6 +952,14 @@ __PMC_EV(IAP, EVENT_BAH_01H) \ __PMC_EV(IAP, EVENT_BAH_02H) \ __PMC_EV(IAP, EVENT_BBH_01H) \ +__PMC_EV(IAP, EVENT_BCH_11H) \ +__PMC_EV(IAP, EVENT_BCH_12H) \ +__PMC_EV(IAP, EVENT_BCH_14H) \ +__PMC_EV(IAP, EVENT_BCH_18H) \ +__PMC_EV(IAP, EVENT_BCH_21H) \ +__PMC_EV(IAP, EVENT_BCH_22H) \ +__PMC_EV(IAP, EVENT_BCH_24H) \ +__PMC_EV(IAP, EVENT_BCH_28H) \ __PMC_EV(IAP, EVENT_BDH_01H) \ __PMC_EV(IAP, EVENT_BDH_20H) \ __PMC_EV(IAP, EVENT_BFH_05H) \ @@ -915,6 +974,7 @@ __PMC_EV(IAP, EVENT_C1H_08H) \ __PMC_EV(IAP, EVENT_C1H_10H) \ __PMC_EV(IAP, EVENT_C1H_20H) \ +__PMC_EV(IAP, EVENT_C1H_40H) \ __PMC_EV(IAP, EVENT_C1H_FEH) \ __PMC_EV(IAP, EVENT_C2H_00H) \ __PMC_EV(IAP, EVENT_C2H_01H) \ @@ -994,6 +1054,8 @@ __PMC_EV(IAP, EVENT_D1H_02H) \ __PMC_EV(IAP, EVENT_D1H_04H) \ __PMC_EV(IAP, EVENT_D1H_08H) \ +__PMC_EV(IAP, EVENT_D1H_10H) \ +__PMC_EV(IAP, EVENT_D1H_20H) \ __PMC_EV(IAP, EVENT_D1H_40H) \ __PMC_EV(IAP, EVENT_D2H_01H) \ __PMC_EV(IAP, EVENT_D2H_02H) \ @@ -1001,6 +1063,10 @@ __PMC_EV(IAP, EVENT_D2H_08H) \ __PMC_EV(IAP, EVENT_D2H_0FH) \ __PMC_EV(IAP, EVENT_D2H_10H) \ +__PMC_EV(IAP, EVENT_D3H_01H) \ +__PMC_EV(IAP, EVENT_D3H_04H) \ +__PMC_EV(IAP, EVENT_D3H_10H) \ +__PMC_EV(IAP, EVENT_D3H_20H) \ __PMC_EV(IAP, EVENT_D4H_01H) \ __PMC_EV(IAP, EVENT_D4H_02H) \ __PMC_EV(IAP, EVENT_D4H_04H) \ @@ -1041,6 +1107,7 @@ __PMC_EV(IAP, EVENT_E6H_00H) \ __PMC_EV(IAP, EVENT_E6H_01H) \ __PMC_EV(IAP, EVENT_E6H_02H) \ +__PMC_EV(IAP, EVENT_E6H_1FH) \ __PMC_EV(IAP, EVENT_E8H_01H) \ __PMC_EV(IAP, EVENT_E8H_02H) \ __PMC_EV(IAP, EVENT_E8H_03H) \ @@ -1061,6 +1128,8 @@ __PMC_EV(IAP, EVENT_F2H_01H) \ __PMC_EV(IAP, EVENT_F2H_02H) \ __PMC_EV(IAP, EVENT_F2H_04H) \ +__PMC_EV(IAP, EVENT_F2H_05H) \ +__PMC_EV(IAP, EVENT_F2H_06H) \ __PMC_EV(IAP, EVENT_F2H_08H) \ __PMC_EV(IAP, EVENT_F2H_0AH) \ __PMC_EV(IAP, EVENT_F2H_0FH) \ @@ -1127,7 +1196,7 @@ __PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_NOT_TAKEN", \ IAP_EVENT_C4H_02H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.MISPRED_TAKEN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_NOT_TAKEN",IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.PRED_NOT_TAKEN", IAP_EVENT_C4H_01H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.PRED_TAKEN", IAP_EVENT_C4H_04H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.TAKEN", IAP_EVENT_C4H_0CH) \ __PMC_EV_ALIAS("BR_MISSP_EXEC", IAP_EVENT_89H_00H) \ @@ -1348,139 +1417,139 @@ /* * Aliases for Core PMC events. */ -#define __PMC_EV_ALIAS_CORE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("BAClears", IAP_EVENT_E6H_00H) \ -__PMC_EV_ALIAS("BTB_Misses", IAP_EVENT_E2H_00H) \ -__PMC_EV_ALIAS("Br_BAC_Missp_Exec", IAP_EVENT_8AH_00H) \ -__PMC_EV_ALIAS("Br_Bogus", IAP_EVENT_E4H_00H) \ -__PMC_EV_ALIAS("Br_Call_Exec", IAP_EVENT_92H_00H) \ -__PMC_EV_ALIAS("Br_Call_Missp_Exec", IAP_EVENT_93H_00H) \ -__PMC_EV_ALIAS("Br_Cnd_Exec", IAP_EVENT_8BH_00H) \ -__PMC_EV_ALIAS("Br_Cnd_Missp_Exec", IAP_EVENT_8CH_00H) \ -__PMC_EV_ALIAS("Br_Ind_Call_Exec", IAP_EVENT_94H_00H) \ -__PMC_EV_ALIAS("Br_Ind_Exec", IAP_EVENT_8DH_00H) \ -__PMC_EV_ALIAS("Br_Ind_Missp_Exec", IAP_EVENT_8EH_00H) \ -__PMC_EV_ALIAS("Br_Inst_Exec", IAP_EVENT_88H_00H) \ -__PMC_EV_ALIAS("Br_Instr_Decoded", IAP_EVENT_E0H_00H) \ -__PMC_EV_ALIAS("Br_Instr_Ret", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("Br_MisPred_Ret", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("Br_MisPred_Taken_Ret", IAP_EVENT_CAH_00H) \ -__PMC_EV_ALIAS("Br_Missp_Exec", IAP_EVENT_89H_00H) \ -__PMC_EV_ALIAS("Br_Ret_BAC_Missp_Exec", IAP_EVENT_91H_00H) \ -__PMC_EV_ALIAS("Br_Ret_Exec", IAP_EVENT_8FH_00H) \ -__PMC_EV_ALIAS("Br_Ret_Missp_Exec", IAP_EVENT_90H_00H) \ -__PMC_EV_ALIAS("Br_Taken_Ret", IAP_EVENT_C9H_00H) \ -__PMC_EV_ALIAS("Bus_BNR_Clocks", IAP_EVENT_61H_00H) \ -__PMC_EV_ALIAS("Bus_DRDY_Clocks", IAP_EVENT_62H_00H) \ -__PMC_EV_ALIAS("Bus_Data_Rcv", IAP_EVENT_64H_40H) \ -__PMC_EV_ALIAS("Bus_Locks_Clocks", IAP_EVENT_63H) \ -__PMC_EV_ALIAS("Bus_Not_In_Use", IAP_EVENT_7DH) \ -__PMC_EV_ALIAS("Bus_Req_Outstanding", IAP_EVENT_60H) \ -__PMC_EV_ALIAS("Bus_Snoop_Stall", IAP_EVENT_7EH_00H) \ -__PMC_EV_ALIAS("Bus_Snoops", IAP_EVENT_77H) \ -__PMC_EV_ALIAS("Bus_Trans_Any", IAP_EVENT_70H) \ -__PMC_EV_ALIAS("Bus_Trans_Brd", IAP_EVENT_65H) \ -__PMC_EV_ALIAS("Bus_Trans_Burst", IAP_EVENT_6EH) \ -__PMC_EV_ALIAS("Bus_Trans_Def", IAP_EVENT_6DH) \ -__PMC_EV_ALIAS("Bus_Trans_IO", IAP_EVENT_6CH) \ -__PMC_EV_ALIAS("Bus_Trans_Ifetch", IAP_EVENT_68H) \ -__PMC_EV_ALIAS("Bus_Trans_Inval", IAP_EVENT_69H) \ -__PMC_EV_ALIAS("Bus_Trans_Mem", IAP_EVENT_6FH) \ -__PMC_EV_ALIAS("Bus_Trans_P", IAP_EVENT_6BH) \ -__PMC_EV_ALIAS("Bus_Trans_Pwr", IAP_EVENT_6AH) \ -__PMC_EV_ALIAS("Bus_Trans_RFO", IAP_EVENT_66H) \ -__PMC_EV_ALIAS("Bus_Trans_WB", IAP_EVENT_67H) \ -__PMC_EV_ALIAS("Cycles_Div_Busy", IAP_EVENT_14H_00H) \ -__PMC_EV_ALIAS("Cycles_Int_Masked", IAP_EVENT_C6H_00H) \ -__PMC_EV_ALIAS("Cycles_Int_Pending_Masked", IAP_EVENT_C7H_00H) \ -__PMC_EV_ALIAS("DCU_Snoop_To_Share", IAP_EVENT_78H) \ -__PMC_EV_ALIAS("DCache_Cache_LD", IAP_EVENT_40H) \ -__PMC_EV_ALIAS("DCache_Cache_Lock", IAP_EVENT_42H) \ -__PMC_EV_ALIAS("DCache_Cache_ST", IAP_EVENT_41H) \ -__PMC_EV_ALIAS("DCache_M_Evict", IAP_EVENT_47H_00H) \ -__PMC_EV_ALIAS("DCache_M_Repl", IAP_EVENT_46H_00H) \ -__PMC_EV_ALIAS("DCache_Pend_Miss", IAP_EVENT_48H_00H) \ -__PMC_EV_ALIAS("DCache_Repl", IAP_EVENT_45H_0FH) \ -__PMC_EV_ALIAS("Data_Mem_Cache_Ref", IAP_EVENT_44H_02H) \ -__PMC_EV_ALIAS("Data_Mem_Ref", IAP_EVENT_43H_01H) \ -__PMC_EV_ALIAS("Dbus_Busy", IAP_EVENT_22H) \ -__PMC_EV_ALIAS("Dbus_Busy_Rd", IAP_EVENT_23H) \ -__PMC_EV_ALIAS("Div", IAP_EVENT_13H_00H) \ -__PMC_EV_ALIAS("Dtlb_Miss", IAP_EVENT_49H_00H) \ -__PMC_EV_ALIAS("ESP_Uops", IAP_EVENT_D7H_00H) \ -__PMC_EV_ALIAS("EST_Trans", IAP_EVENT_3AH) \ -__PMC_EV_ALIAS("FP_Assist", IAP_EVENT_11H_00H) \ -__PMC_EV_ALIAS("FP_Comp_Instr_Ret", IAP_EVENT_C1H_00H) \ -__PMC_EV_ALIAS("FP_Comps_Op_Exe", IAP_EVENT_10H_00H) \ -__PMC_EV_ALIAS("FP_MMX_Trans", IAP_EVENT_CCH_01H) \ -__PMC_EV_ALIAS("Fused_Ld_Uops_Ret", IAP_EVENT_DAH_01H) \ -__PMC_EV_ALIAS("Fused_St_Uops_Ret", IAP_EVENT_DAH_02H) \ -__PMC_EV_ALIAS("Fused_Uops_Ret", IAP_EVENT_DAH_00H) \ -__PMC_EV_ALIAS("HW_Int_Rx", IAP_EVENT_C8H_00H) \ -__PMC_EV_ALIAS("ICache_Misses", IAP_EVENT_81H_00H) \ -__PMC_EV_ALIAS("ICache_Reads", IAP_EVENT_80H_00H) \ -__PMC_EV_ALIAS("IFU_Mem_Stall", IAP_EVENT_86H_00H) \ -__PMC_EV_ALIAS("ILD_Stall", IAP_EVENT_87H_00H) \ -__PMC_EV_ALIAS("ITLB_Misses", IAP_EVENT_85H_00H) \ -__PMC_EV_ALIAS("Instr_Decoded", IAP_EVENT_D0H_00H) \ -__PMC_EV_ALIAS("Instr_Ret", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("L1_Pref_Req", IAP_EVENT_4FH_00H) \ -__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \ -__PMC_EV_ALIAS("L2_IFetch", IAP_EVENT_28H) \ -__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \ -__PMC_EV_ALIAS("L2_Lines_In", IAP_EVENT_24H) \ -__PMC_EV_ALIAS("L2_Lines_Out", IAP_EVENT_26H) \ -__PMC_EV_ALIAS("L2_M_Lines_In", IAP_EVENT_25H) \ -__PMC_EV_ALIAS("L2_M_Lines_Out", IAP_EVENT_27H) \ -__PMC_EV_ALIAS("L2_No_Request_Cycles", IAP_EVENT_32H) \ -__PMC_EV_ALIAS("L2_Reject_Cycles", IAP_EVENT_30H) \ -__PMC_EV_ALIAS("L2_Rqsts", IAP_EVENT_2EH) \ -__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \ -__PMC_EV_ALIAS("LD_Blocks", IAP_EVENT_03H_00H) \ -__PMC_EV_ALIAS("LLC_Misses", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("LLC_Reference", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("MMX_Assist", IAP_EVENT_CDH_00H) \ -__PMC_EV_ALIAS("MMX_FP_Trans", IAP_EVENT_CCH_00H) \ -__PMC_EV_ALIAS("MMX_Instr_Exec", IAP_EVENT_B0H_00H) \ -__PMC_EV_ALIAS("MMX_Instr_Ret", IAP_EVENT_CEH_00H) \ -__PMC_EV_ALIAS("Misalign_Mem_Ref", IAP_EVENT_05H_00H) \ -__PMC_EV_ALIAS("Mul", IAP_EVENT_12H_00H) \ -__PMC_EV_ALIAS("NonHlt_Ref_Cycles", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("Pref_Rqsts_Dn", IAP_EVENT_F8H_00H) \ -__PMC_EV_ALIAS("Pref_Rqsts_Up", IAP_EVENT_F0H_00H) \ -__PMC_EV_ALIAS("Resource_Stall", IAP_EVENT_A2H_00H) \ -__PMC_EV_ALIAS("SD_Drains", IAP_EVENT_04H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_P_Comp_Ret", IAP_EVENT_D9H_02H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_P_Ret", IAP_EVENT_D8H_02H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_S_Comp_Ret", IAP_EVENT_D9H_03H) \ -__PMC_EV_ALIAS("SIMD_FP_DP_S_Ret", IAP_EVENT_D8H_03H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_P_Comp_Ret", IAP_EVENT_D9H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_Ret", IAP_EVENT_D8H_00H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_S_Comp_Ret", IAP_EVENT_D9H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_SP_S_Ret", IAP_EVENT_D8H_01H) \ -__PMC_EV_ALIAS("SIMD_Int_128_Ret", IAP_EVENT_D8H_04H) \ -__PMC_EV_ALIAS("SIMD_Int_Pari_Exec", IAP_EVENT_B3H_20H) \ -__PMC_EV_ALIAS("SIMD_Int_Pck_Exec", IAP_EVENT_B3H_04H) \ -__PMC_EV_ALIAS("SIMD_Int_Plog_Exec", IAP_EVENT_B3H_10H) \ -__PMC_EV_ALIAS("SIMD_Int_Pmul_Exec", IAP_EVENT_B3H_01H) \ -__PMC_EV_ALIAS("SIMD_Int_Psft_Exec", IAP_EVENT_B3H_02H) \ -__PMC_EV_ALIAS("SIMD_Int_Sat_Exec", IAP_EVENT_B1H_00H) \ -__PMC_EV_ALIAS("SIMD_Int_Upck_Exec", IAP_EVENT_B3H_08H) \ -__PMC_EV_ALIAS("SMC_Detected", IAP_EVENT_C3H_00H) \ -__PMC_EV_ALIAS("SSE_NTStores_Miss", IAP_EVENT_4BH_03H) \ -__PMC_EV_ALIAS("SSE_NTStores_Ret", IAP_EVENT_07H_03H) \ -__PMC_EV_ALIAS("SSE_PrefNta_Miss", IAP_EVENT_4BH_00H) \ -__PMC_EV_ALIAS("SSE_PrefNta_Ret", IAP_EVENT_07H_00H) \ -__PMC_EV_ALIAS("SSE_PrefT1_Miss", IAP_EVENT_4BH_01H) \ -__PMC_EV_ALIAS("SSE_PrefT1_Ret", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("SSE_PrefT2_Miss", IAP_EVENT_4BH_02H) \ -__PMC_EV_ALIAS("SSE_PrefT2_Ret", IAP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("Seg_Reg_Loads", IAP_EVENT_06H_00H) \ -__PMC_EV_ALIAS("Serial_Execution_Cycles", IAP_EVENT_3CH_02H) \ -__PMC_EV_ALIAS("Thermal_Trip", IAP_EVENT_3BH_C0H) \ -__PMC_EV_ALIAS("Unfusion", IAP_EVENT_DBH_00H) \ -__PMC_EV_ALIAS("Unhalted_Core_Cycles", IAP_EVENT_3CH_00H) \ +#define __PMC_EV_ALIAS_CORE() \ +__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ +__PMC_EV_ALIAS("BAClears", IAP_EVENT_E6H_00H) \ +__PMC_EV_ALIAS("BTB_Misses", IAP_EVENT_E2H_00H) \ +__PMC_EV_ALIAS("Br_BAC_Missp_Exec", IAP_EVENT_8AH_00H) \ +__PMC_EV_ALIAS("Br_Bogus", IAP_EVENT_E4H_00H) \ +__PMC_EV_ALIAS("Br_Call_Exec", IAP_EVENT_92H_00H) \ +__PMC_EV_ALIAS("Br_Call_Missp_Exec", IAP_EVENT_93H_00H) \ +__PMC_EV_ALIAS("Br_Cnd_Exec", IAP_EVENT_8BH_00H) \ +__PMC_EV_ALIAS("Br_Cnd_Missp_Exec", IAP_EVENT_8CH_00H) \ +__PMC_EV_ALIAS("Br_Ind_Call_Exec", IAP_EVENT_94H_00H) \ +__PMC_EV_ALIAS("Br_Ind_Exec", IAP_EVENT_8DH_00H) \ +__PMC_EV_ALIAS("Br_Ind_Missp_Exec", IAP_EVENT_8EH_00H) \ +__PMC_EV_ALIAS("Br_Inst_Exec", IAP_EVENT_88H_00H) \ +__PMC_EV_ALIAS("Br_Instr_Decoded", IAP_EVENT_E0H_00H) \ +__PMC_EV_ALIAS("Br_Instr_Ret", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("Br_MisPred_Ret", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("Br_MisPred_Taken_Ret", IAP_EVENT_CAH_00H) \ +__PMC_EV_ALIAS("Br_Missp_Exec", IAP_EVENT_89H_00H) \ +__PMC_EV_ALIAS("Br_Ret_BAC_Missp_Exec", IAP_EVENT_91H_00H) \ +__PMC_EV_ALIAS("Br_Ret_Exec", IAP_EVENT_8FH_00H) \ +__PMC_EV_ALIAS("Br_Ret_Missp_Exec", IAP_EVENT_90H_00H) \ +__PMC_EV_ALIAS("Br_Taken_Ret", IAP_EVENT_C9H_00H) \ +__PMC_EV_ALIAS("Bus_BNR_Clocks", IAP_EVENT_61H_00H) \ +__PMC_EV_ALIAS("Bus_DRDY_Clocks", IAP_EVENT_62H_00H) \ +__PMC_EV_ALIAS("Bus_Data_Rcv", IAP_EVENT_64H_40H) \ +__PMC_EV_ALIAS("Bus_Locks_Clocks", IAP_EVENT_63H) \ +__PMC_EV_ALIAS("Bus_Not_In_Use", IAP_EVENT_7DH) \ +__PMC_EV_ALIAS("Bus_Req_Outstanding", IAP_EVENT_60H) \ +__PMC_EV_ALIAS("Bus_Snoop_Stall", IAP_EVENT_7EH_00H) \ +__PMC_EV_ALIAS("Bus_Snoops", IAP_EVENT_77H) \ +__PMC_EV_ALIAS("Bus_Trans_Any", IAP_EVENT_70H) \ +__PMC_EV_ALIAS("Bus_Trans_Brd", IAP_EVENT_65H) \ +__PMC_EV_ALIAS("Bus_Trans_Burst", IAP_EVENT_6EH) \ +__PMC_EV_ALIAS("Bus_Trans_Def", IAP_EVENT_6DH) \ +__PMC_EV_ALIAS("Bus_Trans_IO", IAP_EVENT_6CH) \ +__PMC_EV_ALIAS("Bus_Trans_Ifetch", IAP_EVENT_68H) \ +__PMC_EV_ALIAS("Bus_Trans_Inval", IAP_EVENT_69H) \ +__PMC_EV_ALIAS("Bus_Trans_Mem", IAP_EVENT_6FH) \ +__PMC_EV_ALIAS("Bus_Trans_P", IAP_EVENT_6BH) \ +__PMC_EV_ALIAS("Bus_Trans_Pwr", IAP_EVENT_6AH) \ +__PMC_EV_ALIAS("Bus_Trans_RFO", IAP_EVENT_66H) \ +__PMC_EV_ALIAS("Bus_Trans_WB", IAP_EVENT_67H) \ +__PMC_EV_ALIAS("Cycles_Div_Busy", IAP_EVENT_14H_00H) \ +__PMC_EV_ALIAS("Cycles_Int_Masked", IAP_EVENT_C6H_00H) \ +__PMC_EV_ALIAS("Cycles_Int_Pending_Masked", IAP_EVENT_C7H_00H) \ +__PMC_EV_ALIAS("DCU_Snoop_To_Share", IAP_EVENT_78H) \ +__PMC_EV_ALIAS("DCache_Cache_LD", IAP_EVENT_40H) \ +__PMC_EV_ALIAS("DCache_Cache_Lock", IAP_EVENT_42H) \ +__PMC_EV_ALIAS("DCache_Cache_ST", IAP_EVENT_41H) \ +__PMC_EV_ALIAS("DCache_M_Evict", IAP_EVENT_47H_00H) \ +__PMC_EV_ALIAS("DCache_M_Repl", IAP_EVENT_46H_00H) \ +__PMC_EV_ALIAS("DCache_Pend_Miss", IAP_EVENT_48H_00H) \ +__PMC_EV_ALIAS("DCache_Repl", IAP_EVENT_45H_0FH) \ +__PMC_EV_ALIAS("Data_Mem_Cache_Ref", IAP_EVENT_44H_02H) \ +__PMC_EV_ALIAS("Data_Mem_Ref", IAP_EVENT_43H_01H) \ +__PMC_EV_ALIAS("Dbus_Busy", IAP_EVENT_22H) \ +__PMC_EV_ALIAS("Dbus_Busy_Rd", IAP_EVENT_23H) \ +__PMC_EV_ALIAS("Div", IAP_EVENT_13H_00H) \ +__PMC_EV_ALIAS("Dtlb_Miss", IAP_EVENT_49H_00H) \ +__PMC_EV_ALIAS("ESP_Uops", IAP_EVENT_D7H_00H) \ +__PMC_EV_ALIAS("EST_Trans", IAP_EVENT_3AH) \ +__PMC_EV_ALIAS("FP_Assist", IAP_EVENT_11H_00H) \ +__PMC_EV_ALIAS("FP_Comp_Instr_Ret", IAP_EVENT_C1H_00H) \ +__PMC_EV_ALIAS("FP_Comps_Op_Exe", IAP_EVENT_10H_00H) \ +__PMC_EV_ALIAS("FP_MMX_Trans", IAP_EVENT_CCH_01H) \ +__PMC_EV_ALIAS("Fused_Ld_Uops_Ret", IAP_EVENT_DAH_01H) \ +__PMC_EV_ALIAS("Fused_St_Uops_Ret", IAP_EVENT_DAH_02H) \ +__PMC_EV_ALIAS("Fused_Uops_Ret", IAP_EVENT_DAH_00H) \ +__PMC_EV_ALIAS("HW_Int_Rx", IAP_EVENT_C8H_00H) \ +__PMC_EV_ALIAS("ICache_Misses", IAP_EVENT_81H_00H) \ +__PMC_EV_ALIAS("ICache_Reads", IAP_EVENT_80H_00H) \ +__PMC_EV_ALIAS("IFU_Mem_Stall", IAP_EVENT_86H_00H) \ +__PMC_EV_ALIAS("ILD_Stall", IAP_EVENT_87H_00H) \ +__PMC_EV_ALIAS("ITLB_Misses", IAP_EVENT_85H_00H) \ +__PMC_EV_ALIAS("Instr_Decoded", IAP_EVENT_D0H_00H) \ +__PMC_EV_ALIAS("Instr_Ret", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("L1_Pref_Req", IAP_EVENT_4FH_00H) \ +__PMC_EV_ALIAS("L2_ADS", IAP_EVENT_21H) \ +__PMC_EV_ALIAS("L2_IFetch", IAP_EVENT_28H) \ +__PMC_EV_ALIAS("L2_LD", IAP_EVENT_29H) \ +__PMC_EV_ALIAS("L2_Lines_In", IAP_EVENT_24H) \ +__PMC_EV_ALIAS("L2_Lines_Out", IAP_EVENT_26H) \ +__PMC_EV_ALIAS("L2_M_Lines_In", IAP_EVENT_25H) \ +__PMC_EV_ALIAS("L2_M_Lines_Out", IAP_EVENT_27H) \ +__PMC_EV_ALIAS("L2_No_Request_Cycles", IAP_EVENT_32H) \ +__PMC_EV_ALIAS("L2_Reject_Cycles", IAP_EVENT_30H) \ +__PMC_EV_ALIAS("L2_Rqsts", IAP_EVENT_2EH) \ +__PMC_EV_ALIAS("L2_ST", IAP_EVENT_2AH) \ +__PMC_EV_ALIAS("LD_Blocks", IAP_EVENT_03H_00H) \ +__PMC_EV_ALIAS("LLC_Misses", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("LLC_Reference", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("MMX_Assist", IAP_EVENT_CDH_00H) \ +__PMC_EV_ALIAS("MMX_FP_Trans", IAP_EVENT_CCH_00H) \ +__PMC_EV_ALIAS("MMX_Instr_Exec", IAP_EVENT_B0H_00H) \ +__PMC_EV_ALIAS("MMX_Instr_Ret", IAP_EVENT_CEH_00H) \ +__PMC_EV_ALIAS("Misalign_Mem_Ref", IAP_EVENT_05H_00H) \ +__PMC_EV_ALIAS("Mul", IAP_EVENT_12H_00H) \ +__PMC_EV_ALIAS("NonHlt_Ref_Cycles", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("Pref_Rqsts_Dn", IAP_EVENT_F8H_00H) \ +__PMC_EV_ALIAS("Pref_Rqsts_Up", IAP_EVENT_F0H_00H) \ +__PMC_EV_ALIAS("Resource_Stall", IAP_EVENT_A2H_00H) \ +__PMC_EV_ALIAS("SD_Drains", IAP_EVENT_04H_00H) \ +__PMC_EV_ALIAS("SIMD_FP_DP_P_Comp_Ret", IAP_EVENT_D9H_02H) \ +__PMC_EV_ALIAS("SIMD_FP_DP_P_Ret", IAP_EVENT_D8H_02H) \ +__PMC_EV_ALIAS("SIMD_FP_DP_S_Comp_Ret", IAP_EVENT_D9H_03H) \ +__PMC_EV_ALIAS("SIMD_FP_DP_S_Ret", IAP_EVENT_D8H_03H) \ +__PMC_EV_ALIAS("SIMD_FP_SP_P_Comp_Ret", IAP_EVENT_D9H_00H) \ +__PMC_EV_ALIAS("SIMD_FP_SP_Ret", IAP_EVENT_D8H_00H) \ +__PMC_EV_ALIAS("SIMD_FP_SP_S_Comp_Ret", IAP_EVENT_D9H_01H) \ +__PMC_EV_ALIAS("SIMD_FP_SP_S_Ret", IAP_EVENT_D8H_01H) \ +__PMC_EV_ALIAS("SIMD_Int_128_Ret", IAP_EVENT_D8H_04H) \ +__PMC_EV_ALIAS("SIMD_Int_Pari_Exec", IAP_EVENT_B3H_20H) \ +__PMC_EV_ALIAS("SIMD_Int_Pck_Exec", IAP_EVENT_B3H_04H) \ +__PMC_EV_ALIAS("SIMD_Int_Plog_Exec", IAP_EVENT_B3H_10H) \ +__PMC_EV_ALIAS("SIMD_Int_Pmul_Exec", IAP_EVENT_B3H_01H) \ +__PMC_EV_ALIAS("SIMD_Int_Psft_Exec", IAP_EVENT_B3H_02H) \ +__PMC_EV_ALIAS("SIMD_Int_Sat_Exec", IAP_EVENT_B1H_00H) \ +__PMC_EV_ALIAS("SIMD_Int_Upck_Exec", IAP_EVENT_B3H_08H) \ +__PMC_EV_ALIAS("SMC_Detected", IAP_EVENT_C3H_00H) \ +__PMC_EV_ALIAS("SSE_NTStores_Miss", IAP_EVENT_4BH_03H) \ +__PMC_EV_ALIAS("SSE_NTStores_Ret", IAP_EVENT_07H_03H) \ +__PMC_EV_ALIAS("SSE_PrefNta_Miss", IAP_EVENT_4BH_00H) \ +__PMC_EV_ALIAS("SSE_PrefNta_Ret", IAP_EVENT_07H_00H) \ +__PMC_EV_ALIAS("SSE_PrefT1_Miss", IAP_EVENT_4BH_01H) \ +__PMC_EV_ALIAS("SSE_PrefT1_Ret", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("SSE_PrefT2_Miss", IAP_EVENT_4BH_02H) \ +__PMC_EV_ALIAS("SSE_PrefT2_Ret", IAP_EVENT_07H_02H) \ +__PMC_EV_ALIAS("Seg_Reg_Loads", IAP_EVENT_06H_00H) \ +__PMC_EV_ALIAS("Serial_Execution_Cycles", IAP_EVENT_3CH_02H) \ +__PMC_EV_ALIAS("Thermal_Trip", IAP_EVENT_3BH_C0H) \ +__PMC_EV_ALIAS("Unfusion", IAP_EVENT_DBH_00H) \ +__PMC_EV_ALIAS("Unhalted_Core_Cycles", IAP_EVENT_3CH_00H) \ __PMC_EV_ALIAS("Uops_Ret", IAP_EVENT_C2H_00H) /* @@ -1812,7 +1881,7 @@ */ #define __PMC_EV_ALIAS_COREI7() \ __PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("SB_DRAIN.ANY", IAP_EVENT_04H_07H) \ +__PMC_EV_ALIAS("SB_DRAIN.ANY", IAP_EVENT_04H_07H) \ __PMC_EV_ALIAS("STORE_BLOCKS.AT_RET", IAP_EVENT_06H_04H) \ __PMC_EV_ALIAS("STORE_BLOCKS.L1D_BLOCK", IAP_EVENT_06H_08H) \ __PMC_EV_ALIAS("PARTIAL_ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ @@ -1821,11 +1890,11 @@ __PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ __PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_MISS", IAP_EVENT_08H_20H) \ __PMC_EV_ALIAS("DTLB_LOAD_MISSES.LARGE_WALK_COMPLETED", \ - IAP_EVENT_08H_80H) \ + IAP_EVENT_08H_80H) \ __PMC_EV_ALIAS("MEM_INST_RETIRED.LOADS", IAP_EVENT_0BH_01H) \ __PMC_EV_ALIAS("MEM_INST_RETIRED.STORES", IAP_EVENT_0BH_02H) \ __PMC_EV_ALIAS("MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD", \ - IAP_EVENT_0BH_10H) \ + IAP_EVENT_0BH_10H) \ __PMC_EV_ALIAS("MEM_STORE_RETIRED.DTLB_MISS", IAP_EVENT_0CH_01H) \ __PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ __PMC_EV_ALIAS("UOPS_ISSUED.STALLED_CYCLES", IAP_EVENT_0EH_01H) \ @@ -2124,7 +2193,7 @@ __PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED", IAP_EVENT_10H_10H) \ __PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR", IAP_EVENT_10H_20H) \ __PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SINGLE_PRECISION", \ - IAP_EVENT_10H_40H) \ + IAP_EVENT_10H_40H) \ __PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_DOUBLE_PRECISION", \ IAP_EVENT_10H_80H) \ __PMC_EV_ALIAS("SIMD_INT_128.PACKED_MPY", IAP_EVENT_12H_01H) \ @@ -2303,11 +2372,11 @@ __PMC_EV_ALIAS("MACHINE_CLEARS.CYCLES", IAP_EVENT_C3H_01H) \ __PMC_EV_ALIAS("MACHINE_CLEARS.MEM_ORDER", IAP_EVENT_C3H_02H) \ __PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ANY_P", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ANY_P", IAP_EVENT_C4H_00H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ __PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ANY_P", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ANY_P", IAP_EVENT_C5H_00H) \ __PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ __PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ __PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ @@ -2379,219 +2448,1101 @@ __PMC_EV_ALIAS("SIMD_INT_64.SHUFFLE_MOVE", IAP_EVENT_FDH_40H) /* - * Aliases for Sandy Bridge PMC events (253669-039US May 2011) + * Aliases for Haswell core PMC events */ +#define __PMC_EV_ALIAS_HASWELL() \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_4K", IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K", \ + IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_0EH) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_10H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_4K", IAP_EVENT_08H_20H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT_2M", IAP_EVENT_08H_40H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_60H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.PDE_CACHE_MISS", IAP_EVENT_08H_80H) \ +__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SiNGLE_MUL", IAP_EVENT_0EH_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_MISS", IAP_EVENT_24H_21H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_41H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_E1H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HIT", IAP_EVENT_24H_42H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_22H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_E2H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_44H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_24H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_MISS", IAP_EVENT_24H_27H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_REFERENCES", IAP_EVENT_24H_E7H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_E4H) \ +__PMC_EV_ALIAS("L2_RQSTS.L2_PF_HIT", IAP_EVENT_24H_50H) \ +__PMC_EV_ALIAS("L2_RQSTS.L2_PF_MISS", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_F8H) \ +__PMC_EV_ALIAS("L2_RQSTS.MISS", IAP_EVENT_24H_3FH) \ +__PMC_EV_ALIAS("L2_RQSTS.REFERENCES", IAP_EVENT_24H_FFH) \ +__PMC_EV_ALIAS("L2_DEMAND_RQSTS.WB_HIT", IAP_EVENT_27H_50H) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_4K", \ + IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M", \ + IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_0EH) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_4K", IAP_EVENT_49H_20H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT_2M", IAP_EVENT_49H_40H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_60H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.PDE_CACHE_MISS", IAP_EVENT_49H_80H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ + IAP_EVENT_58H_04H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_NOT_ELIMINATED", \ + IAP_EVENT_58H_08H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SMID_ELIMINATED", IAP_EVENT_58H_02H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CORE_RD", \ + IAP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_4_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED_4K", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("TLB_MISSES.WALK_COMPLETED_2M_4M", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_0EH) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_4K", IAP_EVENT_85H_20H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT_2M", IAP_EVENT_85H_40H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_60H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_2", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_3", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_4", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_5", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_6", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED_PORT.PORT_7", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_LDM_PENDING", IAP_EVENT_A3H_02H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.STALLS_L2_PENDING", IAP_EVENT_A3H_05H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_08H) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L1", IAP_EVENT_BCH_11H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L1", IAP_EVENT_BCH_21H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L2", IAP_EVENT_BCH_12H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L2", IAP_EVENT_BCH_22H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_L3", IAP_EVENT_BCH_14H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_L3", IAP_EVENT_BCH_24H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.DTLB_MEMORY", IAP_EVENT_BCH_18H) \ +__PMC_EV_ALIAS("PAGE_WALKER_LOADS.ITLB_MEMORY", IAP_EVENT_BCH_28H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.ANY_WB_ASSIST", IAP_EVENT_C1H_40H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_MISS", IAP_EVENT_D1H_10H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ + IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ + IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ + IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ + IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ + IAP_EVENT_D3H_01H) \ +__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_1FH) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_05H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_06H) -#define __PMC_EV_ALIAS_SANDYBRIDGE() \ -__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ -__PMC_EV_ALIAS("LD_BLOCKS.DATA_UNKNOWN", IAP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ -__PMC_EV_ALIAS("LD_BLOCKS.ALL_BLOCK", IAP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ -__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ALL_STA_BLOCK", IAP_EVENT_07H_08H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ -__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ -__PMC_EV_ALIAS("INT_MISC.RAT_STALL_CYCLES", IAP_EVENT_0DH_40H) \ -__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", IAP_EVENT_10H_10H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", IAP_EVENT_10H_20H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ -__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ -__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ -__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ -__PMC_EV_ALIAS("INSTS_WRITTEN_TO_IQ.INSTS", IAP_EVENT_17H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ -__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ -__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ -__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_E", IAP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ -__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ -__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ -__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ -__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_49H_01H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ -__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ -__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ -__PMC_EV_ALIAS("LOAD_HIT_PER.HW_PF", IAP_EVENT_4CH_02H) \ -__PMC_EV_ALIAS("HW_PRE_REQ.DL1_MISS", IAP_EVENT_4EH_02H) \ -__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ -__PMC_EV_ALIAS("L1D.ALLOCATED_IN_M", IAP_EVENT_51H_02H) \ -__PMC_EV_ALIAS("L1D.EVICTION", IAP_EVENT_51H_04H) \ -__PMC_EV_ALIAS("L1D.ALL_M_REPLACEMENT", IAP_EVENT_51H_08H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP", IAP_EVENT_59H_20H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW", IAP_EVENT_59H_40H) \ -__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.MUL_SINGLE_UOP", IAP_EVENT_59H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_FL_EMPTY", IAP_EVENT_5BH_0CH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_PRF_CONTROL", IAP_EVENT_5BH_0FH) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.BOB_FULL", IAP_EVENT_5BH_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS2.OOO_RSRC", IAP_EVENT_5BH_4FH) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ -__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ -__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", IAP_EVENT_60H_01H)\ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", IAP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", IAP_EVENT_60H_08H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", IAP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ -__PMC_EV_ALIAS("IQD.MITE_UOPS", IAP_EVENT_79H_04H) \ -__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ -__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ -__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ -__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ -__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ -__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ -__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ -__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ -__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", IAP_EVENT_88H_04H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ -__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ -__PMC_EV_ALIAS("BR_INST_EXE.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", IAP_EVENT_89H_04H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ -__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ -__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.LB", IAP_EVENT_A2H_04H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.FCSW", IAP_EVENT_A2H_20H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ -__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ -__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.OTHER_CANCEL", IAP_EVENT_ACH_02H) \ -__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ -__PMC_EV_ALIAS("DSB_FILL.ALL_CANCEL", IAP_EVENT_ACH_0AH) \ -__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED.THREAD", IAP_EVENT_B1H_01H) \ -__PMC_EV_ALIAS("UOPS_DISPATCHED.CORE", IAP_EVENT_B1H_02H) \ -__PMC_EV_ALIAS("OFFCORE_REQUESTS_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ -__PMC_EV_ALIAS("AGU_BYPASS_CANCEL.COUNT", IAP_EVENT_B6H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ -__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ -__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ -__PMC_EV_ALIAS("L1D_BLOCKS.BANK_CONFLICT_CYCLES", IAP_EVENT_BFH_05H) \ -__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ -__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ -__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.ITLB_MISS_RETIRED", IAP_EVENT_C1H_02H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ -__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ -__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ -__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCH", IAP_EVENT_C4H_00H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ -__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ -__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ -__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ -__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ -__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ -__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ -__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ -__PMC_EV_ALIAS("MEM_UOP_RETIRED_ALL", IAP_EVENT_D0H_80H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", IAP_EVENT_D2H_01H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", IAP_EVENT_D2H_02H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", IAP_EVENT_D2H_04H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", IAP_EVENT_D2H_08H) \ -__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.LLC_MISS", IAP_EVENT_D4H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ -__PMC_EV_ALIAS("L2_TRANS.RF0", IAP_EVENT_F0H_02H) \ -__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ -__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ -__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ -__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ -__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ -__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ -__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ -__PMC_EV_ALIAS("L2_LINES-IN.ALL", IAP_EVENT_F1H_07H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ -__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) \ -__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) +#define __PMC_EV_ALIAS_IVYBRIDGE() \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK", \ + IAP_EVENT_08H_81H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED", \ + IAP_EVENT_08H_82H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION", \ + IAP_EVENT_08H_84H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ +__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", \ + IAP_EVENT_58H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_NOT_ELIMINATED", \ + IAP_EVENT_58H_02H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_04H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_ELIMINATED", IAP_EVENT_58H_08H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("TLB_ACCESS.LOAD_STLB_HIT", IAP_EVENT_5FH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ + IAP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_4_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ + IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ + IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ + IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ + IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ + IAP_EVENT_D3H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) +/* + * Aliases for Ivy Bridge Xeon PMC events (325462-045US January 2013) + */ +#define __PMC_EV_ALIAS_IVYBRIDGE_XEON() \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK", \ + IAP_EVENT_08H_81H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED", \ + IAP_EVENT_08H_82H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION", \ + IAP_EVENT_08H_84H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.FLAGS_MERGE", IAP_EVENT_0EH_10H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SLOW_LEA", IAP_EVENT_0EH_20H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.SINGLE_MUL", IAP_EVENT_0EH_40H) \ +__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_NOT_ELIMINATED", IAP_EVENT_58H_01H)\ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_NOT_ELIMINATED", \ + IAP_EVENT_58H_02H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.INT_ELIMINATED", IAP_EVENT_58H_04H) \ +__PMC_EV_ALIAS("MOVE_ELIMINATION.SIMD_ELIMINATED", IAP_EVENT_58H_08H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_5FH_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD", \ + IAP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_ANY_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_DSB_CYCLES_4_UOPS", IAP_EVENT_79H_18H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_ANY_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.ALL_MITE_CYCLES_4_UOPS", IAP_EVENT_79H_24H) \ +__PMC_EV_ALIAS("IDQ.MITE_ALL_UOPS", IAP_EVENT_79H_3CH) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_LDM_PENDING", IAP_EVENT_A3H_02H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_NO_EXECUTE", IAP_EVENT_A3H_04H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_08H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_CODE_RD", IAP_EVENT_B0H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.THREAD", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_EXECUTED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_MISS", IAP_EVENT_D1H_20H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ + IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ + IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ + IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ + IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ + IAP_EVENT_D3H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM", \ + IAP_EVENT_D3H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_HITM", \ + IAP_EVENT_D3H_10H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_FWD", \ + IAP_EVENT_D3H_20H) \ +__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_1FH) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) +/* + * Aliases for Sandy Bridge PMC events (253669-039US May 2011) + */ +#define __PMC_EV_ALIAS_SANDYBRIDGE() \ +__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ +__PMC_EV_ALIAS("LD_BLOCKS.DATA_UNKNOWN", IAP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ +__PMC_EV_ALIAS("LD_BLOCKS.ALL_BLOCK", IAP_EVENT_03H_10H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ALL_STA_BLOCK", IAP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ +__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ +__PMC_EV_ALIAS("INT_MISC.RAT_STALL_CYCLES", IAP_EVENT_0DH_40H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", \ + IAP_EVENT_10H_10H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", \ + IAP_EVENT_10H_20H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ +__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ +__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ +__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("INSTS_WRITTEN_TO_IQ.INSTS", IAP_EVENT_17H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_E", IAP_EVENT_27H_04H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("HW_PRE_REQ.DL1_MISS", IAP_EVENT_4EH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("L1D.ALLOCATED_IN_M", IAP_EVENT_51H_02H) \ +__PMC_EV_ALIAS("L1D.EVICTION", IAP_EVENT_51H_04H) \ +__PMC_EV_ALIAS("L1D.ALL_M_REPLACEMENT", IAP_EVENT_51H_08H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP", IAP_EVENT_59H_20H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW", IAP_EVENT_59H_40H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.MUL_SINGLE_UOP", IAP_EVENT_59H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_FL_EMPTY", IAP_EVENT_5BH_0CH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_PRF_CONTROL", IAP_EVENT_5BH_0FH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.BOB_FULL", IAP_EVENT_5BH_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.OOO_RSRC", IAP_EVENT_5BH_4FH) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IQD.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXE.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.LB", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.FCSW", IAP_EVENT_A2H_20H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.OTHER_CANCEL", IAP_EVENT_ACH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ +__PMC_EV_ALIAS("DSB_FILL.ALL_CANCEL", IAP_EVENT_ACH_0AH) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED.THREAD", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ +__PMC_EV_ALIAS("AGU_BYPASS_CANCEL.COUNT", IAP_EVENT_B6H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("L1D_BLOCKS.BANK_CONFLICT_CYCLES", IAP_EVENT_BFH_05H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.PREC_DIST", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("INST_RETIRED.X87", IAP_EVENT_C0H_02H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.ITLB_MISS_RETIRED", IAP_EVENT_C1H_02H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCH", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED_ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS", \ + IAP_EVENT_D2H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT", \ + IAP_EVENT_D2H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM", \ + IAP_EVENT_D2H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE", \ + IAP_EVENT_D2H_08H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_HIT_RETIRED.LLC_MISS", \ + IAP_EVENT_D4H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) \ +__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) + +/* + * Aliases for Sandy Bridge Xeon PMC events (253669-044US August 2012) + */ +#define __PMC_EV_ALIAS_SANDYBRIDGE_XEON() \ +__PMC_EV_ALIAS_INTEL_ARCHITECTURAL() \ +__PMC_EV_ALIAS("LD_BLOCKS.DATA_UNKNOWN", IAP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("LD_BLOCKS.STORE_FORWARD", IAP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS.NO_SR", IAP_EVENT_03H_08H) \ +__PMC_EV_ALIAS("LD_BLOCKS.ALL_BLOCK", IAP_EVENT_03H_10H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.LOADS", IAP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("MISALIGN_MEM_REF.STORES", IAP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ADDRESS_ALIAS", IAP_EVENT_07H_01H) \ +__PMC_EV_ALIAS("LD_BLOCKS_PARTIAL.ALL_STA_BLOCK", IAP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_08H_01H)\ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_COMPLETED", IAP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.WALK_DURATION", IAP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("DTLB_LOAD_MISSES.STLB_HIT", IAP_EVENT_08H_10H) \ +__PMC_EV_ALIAS("INT_MISC.RECOVERY_CYCLES", IAP_EVENT_0DH_03H) \ +__PMC_EV_ALIAS("INT_MISC.RAT_STALL_CYCLES", IAP_EVENT_0DH_40H) \ +__PMC_EV_ALIAS("UOPS_ISSUED.ANY", IAP_EVENT_0EH_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.X87", IAP_EVENT_10H_01H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE", \ + IAP_EVENT_10H_10H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE", \ + IAP_EVENT_10H_20H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_PACKED_SINGLE", IAP_EVENT_10H_40H) \ +__PMC_EV_ALIAS("FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE", IAP_EVENT_10H_80H) \ +__PMC_EV_ALIAS("SIMD_FP_256.PACKED_SINGLE", IAP_EVENT_11H_01H) \ +__PMC_EV_ALIAS("SIMD_FP_256.PACKED_DOUBLE", IAP_EVENT_11H_02H) \ +__PMC_EV_ALIAS("ARITH.FPU_DIV_ACTIVE", IAP_EVENT_14H_01H) \ +__PMC_EV_ALIAS("INSTS_WRITTEN_TO_IQ.INSTS", IAP_EVENT_17H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.DEMAND_DATA_RD_HIT", IAP_EVENT_24H_01H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_DEMAND_DATA_RD", IAP_EVENT_24H_03H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_HITS", IAP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("L2_RQSTS.RFO_MISS", IAP_EVENT_24H_08H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_RFO", IAP_EVENT_24H_0CH) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_HIT", IAP_EVENT_24H_10H) \ +__PMC_EV_ALIAS("L2_RQSTS.CODE_RD_MISS", IAP_EVENT_24H_20H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_CODE_RD", IAP_EVENT_24H_30H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_HIT", IAP_EVENT_24H_40H) \ +__PMC_EV_ALIAS("L2_RQSTS.PF_MISS", IAP_EVENT_24H_80H) \ +__PMC_EV_ALIAS("L2_RQSTS.ALL_PF", IAP_EVENT_24H_C0H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.MISS", IAP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_E", IAP_EVENT_27H_04H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.HIT_M", IAP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("L2_STORE_LOCK_RQSTS.ALL", IAP_EVENT_27H_0FH) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.MISS", IAP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_S", IAP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_E", IAP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.HIT_M", IAP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("L2_L1D_WB_RQSTS.ALL", IAP_EVENT_28H_0FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.REFERENCE", IAP_EVENT_2EH_4FH) \ +__PMC_EV_ALIAS("LONGEST_LAT_CACHE.MISS", IAP_EVENT_2EH_41H) \ +__PMC_EV_ALIAS("CPU_CLK_UNHALTED.THREAD_P", IAP_EVENT_3CH_00H) \ +__PMC_EV_ALIAS("CPU_CLK_THREAD_UNHALTED.REF_XCLK", IAP_EVENT_3CH_01H) \ +__PMC_EV_ALIAS("L1D_PEND_MISS.PENDING", IAP_EVENT_48H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.MISS_CAUSES_A_WALK", \ + IAP_EVENT_49H_01H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_COMPLETED", IAP_EVENT_49H_02H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.WALK_DURATION", IAP_EVENT_49H_04H) \ +__PMC_EV_ALIAS("DTLB_STORE_MISSES.STLB_HIT", IAP_EVENT_49H_10H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.SW_PF", IAP_EVENT_4CH_01H) \ +__PMC_EV_ALIAS("LOAD_HIT_PRE.HW_PF", IAP_EVENT_4CH_02H) \ +__PMC_EV_ALIAS("HW_PRE_REQ.DL1_MISS", IAP_EVENT_4EH_02H) \ +__PMC_EV_ALIAS("L1D.REPLACEMENT", IAP_EVENT_51H_01H) \ +__PMC_EV_ALIAS("L1D.ALLOCATED_IN_M", IAP_EVENT_51H_02H) \ +__PMC_EV_ALIAS("L1D.EVICTION", IAP_EVENT_51H_04H) \ +__PMC_EV_ALIAS("L1D.ALL_M_REPLACEMENT", IAP_EVENT_51H_08H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP", IAP_EVENT_59H_20H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW", IAP_EVENT_59H_40H) \ +__PMC_EV_ALIAS("PARTIAL_RAT_STALLS.MUL_SINGLE_UOP", IAP_EVENT_59H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_FL_EMPTY", IAP_EVENT_5BH_0CH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.ALL_PRF_CONTROL", IAP_EVENT_5BH_0FH) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.BOB_FULL", IAP_EVENT_5BH_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS2.OOO_RSRC", IAP_EVENT_5BH_4FH) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING0", IAP_EVENT_5CH_01H) \ +__PMC_EV_ALIAS("CPL_CYCLES.RING123", IAP_EVENT_5CH_02H) \ +__PMC_EV_ALIAS("RS_EVENTS.EMPTY_CYCLES", IAP_EVENT_5EH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD", \ + IAP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO", \ + IAP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD", \ + IAP_EVENT_60H_08H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", \ + IAP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("LOCK_CYCLES.CACHE_LOCK_DURATION", IAP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("IDQ.EMPTY", IAP_EVENT_79H_02H) \ +__PMC_EV_ALIAS("IDQ.MITE_UOPS", IAP_EVENT_79H_04H) \ +__PMC_EV_ALIAS("IDQ.DSB_UOPS", IAP_EVENT_79H_08H) \ +__PMC_EV_ALIAS("IDQ.MS_DSB_UOPS", IAP_EVENT_79H_10H) \ +__PMC_EV_ALIAS("IDQ.MS_MITE_UOPS", IAP_EVENT_79H_20H) \ +__PMC_EV_ALIAS("IDQ.MS_UOPS", IAP_EVENT_79H_30H) \ +__PMC_EV_ALIAS("ICACHE.MISSES", IAP_EVENT_80H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.MISS_CAUSES_A_WALK", IAP_EVENT_85H_01H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_COMPLETED", IAP_EVENT_85H_02H) \ +__PMC_EV_ALIAS("ITLB_MISSES.WALK_DURATION", IAP_EVENT_85H_04H) \ +__PMC_EV_ALIAS("ITLB_MISSES.STLB_HIT", IAP_EVENT_85H_10H) \ +__PMC_EV_ALIAS("ILD_STALL.LCP", IAP_EVENT_87H_01H) \ +__PMC_EV_ALIAS("ILD_STALL.IQ_FULL", IAP_EVENT_87H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.COND", IAP_EVENT_88H_01H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_JMP", IAP_EVENT_88H_02H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_88H_04H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.RETURN_NEAR", IAP_EVENT_88H_08H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_88H_10H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_88H_20H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.NONTAKEN", IAP_EVENT_88H_40H) \ +__PMC_EV_ALIAS("BR_INST_EXEC.TAKEN", IAP_EVENT_88H_80H) \ +__PMC_EV_ALIAS("BR_INST_EXE.ALL_BRANCHES", IAP_EVENT_88H_FFH) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.COND", IAP_EVENT_89H_01H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET", \ + IAP_EVENT_89H_04H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.RETURN_NEAR", IAP_EVENT_89H_08H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.DIRECT_NEAR_CALL", IAP_EVENT_89H_10H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.INDIRECT_NEAR_CALL", IAP_EVENT_89H_20H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.NONTAKEN", IAP_EVENT_89H_40H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.TAKEN", IAP_EVENT_89H_80H) \ +__PMC_EV_ALIAS("BR_MISP_EXEC.ALL_BRANCHES", IAP_EVENT_89H_FFH) \ +__PMC_EV_ALIAS("IDQ_UOPS_NOT_DELIVERED.CORE", IAP_EVENT_9CH_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_0", IAP_EVENT_A1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_1", IAP_EVENT_A1H_02H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_LD", IAP_EVENT_A1H_04H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2_STA", IAP_EVENT_A1H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_2", IAP_EVENT_A1H_0CH) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_LD", IAP_EVENT_A1H_10H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3_STA", IAP_EVENT_A1H_20H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_3", IAP_EVENT_A1H_30H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_4", IAP_EVENT_A1H_40H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED_PORT.PORT_5", IAP_EVENT_A1H_80H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ANY", IAP_EVENT_A2H_01H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.LB", IAP_EVENT_A2H_02H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.RS", IAP_EVENT_A2H_04H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.SB", IAP_EVENT_A2H_08H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.ROB", IAP_EVENT_A2H_10H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.FCSW", IAP_EVENT_A2H_20H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.MXCSR", IAP_EVENT_A2H_40H) \ +__PMC_EV_ALIAS("RESOURCE_STALLS.OTHER", IAP_EVENT_A2H_80H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L2_PENDING", IAP_EVENT_A3H_01H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_L1D_PENDING", IAP_EVENT_A3H_02H) \ +__PMC_EV_ALIAS("CYCLE_ACTIVITY.CYCLES_NO_DISPATCH", IAP_EVENT_A3H_04H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.COUNT", IAP_EVENT_ABH_01H) \ +__PMC_EV_ALIAS("DSB2MITE_SWITCHES.PENALTY_CYCLES", IAP_EVENT_ABH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.OTHER_CANCEL", IAP_EVENT_ACH_02H) \ +__PMC_EV_ALIAS("DSB_FILL.EXCEED_DSB_LINES", IAP_EVENT_ACH_08H) \ +__PMC_EV_ALIAS("DSB_FILL.ALL_CANCEL", IAP_EVENT_ACH_0AH) \ +__PMC_EV_ALIAS("ITLB.ITLB_FLUSH", IAP_EVENT_AEH_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_DATA_RD", IAP_EVENT_B0H_01H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.DEMAND_RFO", IAP_EVENT_B0H_04H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS.ALL_DATA_RD", IAP_EVENT_B0H_08H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED.THREAD", IAP_EVENT_B1H_01H) \ +__PMC_EV_ALIAS("UOPS_DISPATCHED.CORE", IAP_EVENT_B1H_02H) \ +__PMC_EV_ALIAS("OFFCORE_REQUESTS_BUFFER.SQ_FULL", IAP_EVENT_B2H_01H) \ +__PMC_EV_ALIAS("AGU_BYPASS_CANCEL.COUNT", IAP_EVENT_B6H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_0", IAP_EVENT_B7H_01H) \ +__PMC_EV_ALIAS("OFF_CORE_RESPONSE_1", IAP_EVENT_BBH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.DTLB_THREAD", IAP_EVENT_BDH_01H) \ +__PMC_EV_ALIAS("TLB_FLUSH.STLB_ANY", IAP_EVENT_BDH_20H) \ +__PMC_EV_ALIAS("L1D_BLOCKS.BANK_CONFLICT_CYCLES", IAP_EVENT_BFH_05H) \ +__PMC_EV_ALIAS("INST_RETIRED.ANY_P", IAP_EVENT_C0H_00H) \ +__PMC_EV_ALIAS("INST_RETIRED.ALL", IAP_EVENT_C0H_01H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.ITLB_MISS_RETIRED", IAP_EVENT_C1H_02H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_STORE", IAP_EVENT_C1H_08H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.AVX_TO_SSE", IAP_EVENT_C1H_10H) \ +__PMC_EV_ALIAS("OTHER_ASSISTS.SSE_TO_AVX", IAP_EVENT_C1H_20H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.ALL", IAP_EVENT_C2H_01H) \ +__PMC_EV_ALIAS("UOPS_RETIRED.RETIRE_SLOTS", IAP_EVENT_C2H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MEMORY_ORDERING", IAP_EVENT_C3H_02H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.SMC", IAP_EVENT_C3H_04H) \ +__PMC_EV_ALIAS("MACHINE_CLEARS.MASKMOV", IAP_EVENT_C3H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCH", IAP_EVENT_C4H_00H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.CONDITIONAL", IAP_EVENT_C4H_01H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_CALL", IAP_EVENT_C4H_02H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.ALL_BRANCHES", IAP_EVENT_C4H_04H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_RETURN", IAP_EVENT_C4H_08H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NOT_TAKEN", IAP_EVENT_C4H_10H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.NEAR_TAKEN", IAP_EVENT_C4H_20H) \ +__PMC_EV_ALIAS("BR_INST_RETIRED.FAR_BRANCH", IAP_EVENT_C4H_40H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_00H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.CONDITIONAL", IAP_EVENT_C5H_01H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NEAR_CALL", IAP_EVENT_C5H_02H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.ALL_BRANCHES", IAP_EVENT_C5H_04H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.NOT_TAKEN", IAP_EVENT_C5H_10H) \ +__PMC_EV_ALIAS("BR_MISP_RETIRED.TAKEN", IAP_EVENT_C5H_20H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_OUTPUT", IAP_EVENT_CAH_02H) \ +__PMC_EV_ALIAS("FP_ASSIST.X87_INPUT", IAP_EVENT_CAH_04H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_OUTPUT", IAP_EVENT_CAH_08H) \ +__PMC_EV_ALIAS("FP_ASSIST.SIMD_INPUT", IAP_EVENT_CAH_10H) \ +__PMC_EV_ALIAS("FP_ASSIST.ANY", IAP_EVENT_CAH_1EH) \ +__PMC_EV_ALIAS("ROB_MISC_EVENTS.LBR_INSERTS", IAP_EVENT_CCH_20H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.LOAD_LATENCY", IAP_EVENT_CDH_01H) \ +__PMC_EV_ALIAS("MEM_TRANS_RETIRED.PRECISE_STORE", IAP_EVENT_CDH_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOADS", IAP_EVENT_D0H_01H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STORES", IAP_EVENT_D0H_02H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.STLB_MISS", IAP_EVENT_D0H_10H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.LOCK", IAP_EVENT_D0H_20H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED.SPLIT", IAP_EVENT_D0H_40H) \ +__PMC_EV_ALIAS("MEM_UOP_RETIRED_ALL", IAP_EVENT_D0H_80H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L1_HIT", IAP_EVENT_D1H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.L2_HIT", IAP_EVENT_D1H_02H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_HIT", IAP_EVENT_D1H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.LLC_MISS", IAP_EVENT_D1H_20H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_RETIRED.HIT_LFB", IAP_EVENT_D1H_40H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM", \ + IAP_EVENT_D3H_01H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM", \ + IAP_EVENT_D3H_04H) \ +__PMC_EV_ALIAS("MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS", IAP_EVENT_D4H_02H)\ +__PMC_EV_ALIAS("BACLEARS.ANY", IAP_EVENT_E6H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.DEMAND_DATA_RD", IAP_EVENT_F0H_01H) \ +__PMC_EV_ALIAS("L2_TRANS.RFO", IAP_EVENT_F0H_02H) \ +__PMC_EV_ALIAS("L2_TRANS.CODE_RD", IAP_EVENT_F0H_04H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_PF", IAP_EVENT_F0H_08H) \ +__PMC_EV_ALIAS("L2_TRANS.L1D_WB", IAP_EVENT_F0H_10H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_FILL", IAP_EVENT_F0H_20H) \ +__PMC_EV_ALIAS("L2_TRANS.L2_WB", IAP_EVENT_F0H_40H) \ +__PMC_EV_ALIAS("L2_TRANS.ALL_REQUESTS", IAP_EVENT_F0H_80H) \ +__PMC_EV_ALIAS("L2_LINES_IN.I", IAP_EVENT_F1H_01H) \ +__PMC_EV_ALIAS("L2_LINES_IN.S", IAP_EVENT_F1H_02H) \ +__PMC_EV_ALIAS("L2_LINES_IN.E", IAP_EVENT_F1H_04H) \ +__PMC_EV_ALIAS("L2_LINES_IN.ALL", IAP_EVENT_F1H_07H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_CLEAN", IAP_EVENT_F2H_01H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DEMAND_DIRTY", IAP_EVENT_F2H_02H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_CLEAN", IAP_EVENT_F2H_04H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.PF_DIRTY", IAP_EVENT_F2H_08H) \ +__PMC_EV_ALIAS("L2_LINES_OUT.DIRTY_ALL", IAP_EVENT_F2H_0AH) \ +__PMC_EV_ALIAS("SQ_MISC.SPLIT_LOCK", IAP_EVENT_F4H_10H) + /* timestamp counters. */ #define __PMC_EV_TSC() \ __PMC_EV(TSC, TSC) @@ -2692,6 +3643,7 @@ __PMC_EV(UCP, EVENT_22H_02H) \ __PMC_EV(UCP, EVENT_22H_04H) \ __PMC_EV(UCP, EVENT_22H_08H) \ +__PMC_EV(UCP, EVENT_22H_10H) \ __PMC_EV(UCP, EVENT_22H_20H) \ __PMC_EV(UCP, EVENT_22H_40H) \ __PMC_EV(UCP, EVENT_22H_80H) \ @@ -2769,6 +3721,7 @@ __PMC_EV(UCP, EVENT_34H_01H) \ __PMC_EV(UCP, EVENT_34H_02H) \ __PMC_EV(UCP, EVENT_34H_04H) \ +__PMC_EV(UCP, EVENT_34H_06H) \ __PMC_EV(UCP, EVENT_34H_08H) \ __PMC_EV(UCP, EVENT_34H_10H) \ __PMC_EV(UCP, EVENT_34H_20H) \ @@ -2858,104 +3811,105 @@ __PMC_EV_ALIAS("GQ_CYCLES_FULL.PEER_PROBE_TRACKER", UCP_EVENT_00H_04H) \ __PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.READ_TRACKER", UCP_EVENT_01H_01H) \ __PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.WRITE_TRACKER", UCP_EVENT_01H_02H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", UCP_EVENT_01H_04H) \ -__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", \ + UCP_EVENT_01H_04H) \ +__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ __PMC_EV_ALIAS("GQ_ALLOC.RT_TO_RTID_ACQUIRED", UCP_EVENT_03H_08H) \ __PMC_EV_ALIAS("GQ_ALLOC.WT_TO_RTID_ACQUIRED", UCP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ +__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ __PMC_EV_ALIAS("GQ_ALLOC.PEER_PROBE_TRACKER", UCP_EVENT_03H_40H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.I_STATE", UCP_EVENT_06H_01H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.S_STATE", UCP_EVENT_06H_02H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_S_STATE", UCP_EVENT_06H_04H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_I_STATE", UCP_EVENT_06H_08H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.CONFLICT", UCP_EVENT_06H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.I_STATE", UCP_EVENT_07H_01H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.S_STATE", UCP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H)\ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H)\ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.CONFLICT", UCP_EVENT_07H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.HITM", UCP_EVENT_07H_24H) \ -__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ -__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ -__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ -__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ -__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ -__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ -__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ -__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ -__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ +__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ +__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ +__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ +__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ +__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ +__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ +__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ +__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ +__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ +__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ +__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ __PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.REMOTE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ -__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH0", UCP_EVENT_27H_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH1", UCP_EVENT_27H_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH2", UCP_EVENT_27H_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH0", UCP_EVENT_27H_08H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH1", UCP_EVENT_27H_10H) \ -__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH2", UCP_EVENT_27H_20H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ +__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH0", UCP_EVENT_27H_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH1", UCP_EVENT_27H_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.READ.CH2", UCP_EVENT_27H_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH0", UCP_EVENT_27H_08H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH1", UCP_EVENT_27H_10H) \ +__PMC_EV_ALIAS("QMC_NORMAL_FULL.WRITE.CH2", UCP_EVENT_27H_20H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH0", UCP_EVENT_2DH_01H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH1", UCP_EVENT_2DH_02H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH2", UCP_EVENT_2DH_04H) \ @@ -2964,71 +3918,113 @@ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH1", UCP_EVENT_2EH_02H) \ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH2", UCP_EVENT_2EH_04H) \ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.ANY", UCP_EVENT_2EH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ -__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", UCP_EVENT_40H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", UCP_EVENT_40H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", UCP_EVENT_40H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", UCP_EVENT_40H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", UCP_EVENT_40H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", UCP_EVENT_40H_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ +__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", \ + UCP_EVENT_40H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", \ + UCP_EVENT_40H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", \ + UCP_EVENT_40H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", \ + UCP_EVENT_40H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", \ + UCP_EVENT_40H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", \ + UCP_EVENT_40H_20H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_0", UCP_EVENT_40H_07H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_1", UCP_EVENT_40H_38H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", UCP_EVENT_41H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", UCP_EVENT_41H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", UCP_EVENT_41H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", UCP_EVENT_41H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", UCP_EVENT_41H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", UCP_EVENT_41H_20H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", \ + UCP_EVENT_41H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", \ + UCP_EVENT_41H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", \ + UCP_EVENT_41H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", \ + UCP_EVENT_41H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", \ + UCP_EVENT_41H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", \ + UCP_EVENT_41H_20H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_0", UCP_EVENT_41H_07H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_1", UCP_EVENT_41H_38H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ __PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_0", UCP_EVENT_43H_01H) \ __PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_1", UCP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ __PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) +/* + * Aliases for Haswell uncore PMC events + */ +#define __PMC_EV_ALIAS_HASWELLUC() \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.MISS", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.INVAL", UCP_EVENT_22H_02H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.HIT", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.HITM", UCP_EVENT_22H_08H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.INVAL_M", UCP_EVENT_22H_10H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.EXTERNAL_FILTER", \ + UCP_EVENT_22H_20H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.XCORE_FILTER", UCP_EVENT_22H_40H) \ +__PMC_EV_ALIAS("UNC_CBO_XSNP_RESPONSE.EVICTION_FILTER", \ + UCP_EVENT_22H_80H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.ES", UCP_EVENT_34H_06H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.READ_FILTER", UCP_EVENT_34H_10H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.WRITE_FILTER", UCP_EVENT_34H_20H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.EXTSNP_FILTER", UCP_EVENT_34H_40H) \ +__PMC_EV_ALIAS("UNC_CBO_CACHE_LOOKUP.ANY_REQUEST_FILTER", \ + UCP_EVENT_34H_80H) \ +__PMC_EV_ALIAS("UNC_ARB_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ +__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ +__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ +__PMC_EV_ALIAS("UNC_ARB_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ +__PMC_EV_ALIAS("UNC_ARB_COH_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ +__PMC_EV_ALIAS("UNC_ARB_COH_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) + + #define __PMC_EV_ALIAS_WESTMEREUC() \ __PMC_EV_ALIAS("GQ_CYCLES_FULL.READ_TRACKER", UCP_EVENT_00H_01H) \ __PMC_EV_ALIAS("GQ_CYCLES_FULL.WRITE_TRACKER", UCP_EVENT_00H_02H) \ @@ -3035,110 +4031,111 @@ __PMC_EV_ALIAS("GQ_CYCLES_FULL.PEER_PROBE_TRACKER", UCP_EVENT_00H_04H) \ __PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.READ_TRACKER", UCP_EVENT_01H_01H) \ __PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.WRITE_TRACKER", UCP_EVENT_01H_02H) \ -__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", UCP_EVENT_01H_04H) \ -__PMC_EV_ALIAS("GQ_OCCUPANCY.READ_TRACKER", UCP_EVENT_02H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ -__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ +__PMC_EV_ALIAS("GQ_CYCLES_NOT_EMPTY.PEER_PROBE_TRACKER", \ + UCP_EVENT_01H_04H) \ +__PMC_EV_ALIAS("GQ_OCCUPANCY.READ_TRACKER", UCP_EVENT_02H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.READ_TRACKER", UCP_EVENT_03H_01H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_L3_MISS", UCP_EVENT_03H_02H) \ +__PMC_EV_ALIAS("GQ_ALLOC.RT_TO_L3_RESP", UCP_EVENT_03H_04H) \ __PMC_EV_ALIAS("GQ_ALLOC.RT_TO_RTID_ACQUIRED", UCP_EVENT_03H_08H) \ __PMC_EV_ALIAS("GQ_ALLOC.WT_TO_RTID_ACQUIRED", UCP_EVENT_03H_10H) \ -__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ +__PMC_EV_ALIAS("GQ_ALLOC.WRITE_TRACKER", UCP_EVENT_03H_20H) \ __PMC_EV_ALIAS("GQ_ALLOC.PEER_PROBE_TRACKER", UCP_EVENT_03H_40H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ -__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ -__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QPI", UCP_EVENT_04H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_QMC", UCP_EVENT_04H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_L3", UCP_EVENT_04H_04H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_02", UCP_EVENT_04H_08H) \ +__PMC_EV_ALIAS("GQ_DATA.FROM_CORES_13", UCP_EVENT_04H_10H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_QPI_QMC", UCP_EVENT_05H_01H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_L3", UCP_EVENT_05H_02H) \ +__PMC_EV_ALIAS("GQ_DATA.TO_CORES", UCP_EVENT_05H_04H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.I_STATE", UCP_EVENT_06H_01H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.S_STATE", UCP_EVENT_06H_02H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_S_STATE", UCP_EVENT_06H_04H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.FWD_I_STATE", UCP_EVENT_06H_08H) \ __PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.CONFLICT", UCP_EVENT_06H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_LOCAL_HOME.WB", UCP_EVENT_06H_20H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.I_STATE", UCP_EVENT_07H_01H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.S_STATE", UCP_EVENT_07H_02H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_S_STATE", UCP_EVENT_07H_04H)\ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.FWD_I_STATE", UCP_EVENT_07H_08H)\ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.CONFLICT", UCP_EVENT_07H_10H) \ -__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ +__PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.WB", UCP_EVENT_07H_20H) \ __PMC_EV_ALIAS("SNP_RESP_TO_REMOTE_HOME.HITM", UCP_EVENT_07H_24H) \ -__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ -__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ -__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ -__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ -__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ -__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ -__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ -__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ -__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ -__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ -__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ -__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ -__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ -__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ -__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S", UCP_EVENT_0CH_01H) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I", UCP_EVENT_0CH_02H) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_E", UCP_EVENT_0CH_04H_E) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_F", UCP_EVENT_0CH_04H_F) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_M", UCP_EVENT_0CH_04H_M) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_S", UCP_EVENT_0CH_04H_S) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_E", UCP_EVENT_0CH_08H_E) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_F", UCP_EVENT_0CH_08H_F) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_M", UCP_EVENT_0CH_08H_M) \ -__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_S", UCP_EVENT_0CH_08H_S) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ -__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("L3_HITS.READ", UCP_EVENT_08H_01H) \ +__PMC_EV_ALIAS("L3_HITS.WRITE", UCP_EVENT_08H_02H) \ +__PMC_EV_ALIAS("L3_HITS.PROBE", UCP_EVENT_08H_04H) \ +__PMC_EV_ALIAS("L3_HITS.ANY", UCP_EVENT_08H_03H) \ +__PMC_EV_ALIAS("L3_MISS.READ", UCP_EVENT_09H_01H) \ +__PMC_EV_ALIAS("L3_MISS.WRITE", UCP_EVENT_09H_02H) \ +__PMC_EV_ALIAS("L3_MISS.PROBE", UCP_EVENT_09H_04H) \ +__PMC_EV_ALIAS("L3_MISS.ANY", UCP_EVENT_09H_03H) \ +__PMC_EV_ALIAS("L3_LINES_IN.M_STATE", UCP_EVENT_0AH_01H) \ +__PMC_EV_ALIAS("L3_LINES_IN.E_STATE", UCP_EVENT_0AH_02H) \ +__PMC_EV_ALIAS("L3_LINES_IN.S_STATE", UCP_EVENT_0AH_04H) \ +__PMC_EV_ALIAS("L3_LINES_IN.F_STATE", UCP_EVENT_0AH_08H) \ +__PMC_EV_ALIAS("L3_LINES_IN.ANY", UCP_EVENT_0AH_0FH) \ +__PMC_EV_ALIAS("L3_LINES_OUT.M_STATE", UCP_EVENT_0BH_01H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.E_STATE", UCP_EVENT_0BH_02H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.S_STATE", UCP_EVENT_0BH_04H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.I_STATE", UCP_EVENT_0BH_08H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.F_STATE", UCP_EVENT_0BH_10H) \ +__PMC_EV_ALIAS("L3_LINES_OUT.ANY", UCP_EVENT_0BH_1FH) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S", UCP_EVENT_0CH_01H) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I", UCP_EVENT_0CH_02H) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_E", UCP_EVENT_0CH_04H_E) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_F", UCP_EVENT_0CH_04H_F) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_M", UCP_EVENT_0CH_04H_M) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_S_HIT_S", UCP_EVENT_0CH_04H_S) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_E", UCP_EVENT_0CH_08H_E) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_F", UCP_EVENT_0CH_08H_F) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_M", UCP_EVENT_0CH_08H_M) \ +__PMC_EV_ALIAS("GQ_SNOOP.GOTO_I_HIT_S", UCP_EVENT_0CH_08H_S) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_READS", UCP_EVENT_20H_01H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.IOH_WRITES", UCP_EVENT_20H_02H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_READS", UCP_EVENT_20H_04H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.REMOTE_WRITES", UCP_EVENT_20H_08H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_READS", UCP_EVENT_20H_10H) \ +__PMC_EV_ALIAS("QHL_REQUESTS.LOCAL_WRITES", UCP_EVENT_20H_20H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.IOH", UCP_EVENT_21H_01H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.REMOTE", UCP_EVENT_21H_02H) \ +__PMC_EV_ALIAS("QHL_CYCLES_FULL.LOCAL", UCP_EVENT_21H_04H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.IOH", UCP_EVENT_22H_01H) \ __PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.REMOTE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ -__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ -__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ -__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ -__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ -__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ -__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ -__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ -__PMC_EV_ALIAS("QMC_OCCUPANCY.ANY", UCP_EVENT_2AH_07H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ -__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ -__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ -__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ +__PMC_EV_ALIAS("QHL_CYCLES_NOT_EMPTY.LOCAL", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.IOH", UCP_EVENT_23H_01H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.REMOTE", UCP_EVENT_23H_02H) \ +__PMC_EV_ALIAS("QHL_OCCUPANCY.LOCAL", UCP_EVENT_23H_04H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.2WAY", UCP_EVENT_24H_02H) \ +__PMC_EV_ALIAS("QHL_ADDRESS_CONFLICTS.3WAY", UCP_EVENT_24H_04H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.IOH", UCP_EVENT_25H_01H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.REMOTE", UCP_EVENT_25H_02H) \ +__PMC_EV_ALIAS("QHL_CONFLICT_CYCLES.LOCAL", UCP_EVENT_25H_04H) \ +__PMC_EV_ALIAS("QHL_TO_QMC_BYPASS", UCP_EVENT_26H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH0", UCP_EVENT_28H_01H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH1", UCP_EVENT_28H_02H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.READ.CH2", UCP_EVENT_28H_04H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH0", UCP_EVENT_28H_08H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH1", UCP_EVENT_28H_10H) \ +__PMC_EV_ALIAS("QMC_ISOC_FULL.WRITE.CH2", UCP_EVENT_28H_20H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH0", UCP_EVENT_29H_01H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH1", UCP_EVENT_29H_02H) \ +__PMC_EV_ALIAS("QMC_BUSY.READ.CH2", UCP_EVENT_29H_04H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH0", UCP_EVENT_29H_08H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH1", UCP_EVENT_29H_10H) \ +__PMC_EV_ALIAS("QMC_BUSY.WRITE.CH2", UCP_EVENT_29H_20H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH0", UCP_EVENT_2AH_01H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH1", UCP_EVENT_2AH_02H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.CH2", UCP_EVENT_2AH_04H) \ +__PMC_EV_ALIAS("QMC_OCCUPANCY.ANY", UCP_EVENT_2AH_07H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH0", UCP_EVENT_2BH_01H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH1", UCP_EVENT_2BH_02H) \ +__PMC_EV_ALIAS("QMC_ISSOC_OCCUPANCY.CH2", UCP_EVENT_2BH_04H) \ +__PMC_EV_ALIAS("QMC_ISSOC_READS.ANY", UCP_EVENT_2BH_07H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH0", UCP_EVENT_2CH_01H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH1", UCP_EVENT_2CH_02H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.CH2", UCP_EVENT_2CH_04H) \ +__PMC_EV_ALIAS("QMC_NORMAL_READS.ANY", UCP_EVENT_2CH_07H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH0", UCP_EVENT_2DH_01H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH1", UCP_EVENT_2DH_02H) \ __PMC_EV_ALIAS("QMC_HIGH_PRIORITY_READS.CH2", UCP_EVENT_2DH_04H) \ @@ -3147,89 +4144,101 @@ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH1", UCP_EVENT_2EH_02H) \ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.CH2", UCP_EVENT_2EH_04H) \ __PMC_EV_ALIAS("QMC_CRITICAL_PRIORITY_READS.ANY", UCP_EVENT_2EH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ -__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ -__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ -__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ -__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ -__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH0", UCP_EVENT_32H_01H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH1", UCP_EVENT_32H_02H) \ -__PMC_EV_ALIAS("IMC_RETRY.CH2", UCP_EVENT_32H_04H) \ -__PMC_EV_ALIAS("IMC_RETRY.ANY", UCP_EVENT_32H_07H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.IOH", UCP_EVENT_33H_01H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.REMOTE", UCP_EVENT_33H_02H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ -__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.ANY", UCP_EVENT_33H_07H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.IOH_ORDER", UCP_EVENT_34H_01H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_ORDER", UCP_EVENT_34H_02H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_ORDER", UCP_EVENT_34H_04H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.IOH_CONFLICT", UCP_EVENT_34H_08H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_CONFLICT", UCP_EVENT_34H_10H) \ -__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_CONFLICT", UCP_EVENT_34H_20H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.IOH", UCP_EVENT_35H_01H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.REMOTE", UCP_EVENT_35H_02H) \ -__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.LOCAL", UCP_EVENT_35H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", UCP_EVENT_40H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", UCP_EVENT_40H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", UCP_EVENT_40H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", UCP_EVENT_40H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", UCP_EVENT_40H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", UCP_EVENT_40H_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH0", UCP_EVENT_2FH_01H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH1", UCP_EVENT_2FH_02H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.CH2", UCP_EVENT_2FH_04H) \ +__PMC_EV_ALIAS("QMC_WRITES.FULL.ANY", UCP_EVENT_2FH_07H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH0", UCP_EVENT_2FH_08H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH1", UCP_EVENT_2FH_10H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.CH2", UCP_EVENT_2FH_20H) \ +__PMC_EV_ALIAS("QMC_WRITES.PARTIAL.ANY", UCP_EVENT_2FH_38H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH0", UCP_EVENT_30H_01H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH1", UCP_EVENT_30H_02H) \ +__PMC_EV_ALIAS("QMC_CANCEL.CH2", UCP_EVENT_30H_04H) \ +__PMC_EV_ALIAS("QMC_CANCEL.ANY", UCP_EVENT_30H_07H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH0", UCP_EVENT_31H_01H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH1", UCP_EVENT_31H_02H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.CH2", UCP_EVENT_31H_04H) \ +__PMC_EV_ALIAS("QMC_PRIORITY_UPDATES.ANY", UCP_EVENT_31H_07H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH0", UCP_EVENT_32H_01H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH1", UCP_EVENT_32H_02H) \ +__PMC_EV_ALIAS("IMC_RETRY.CH2", UCP_EVENT_32H_04H) \ +__PMC_EV_ALIAS("IMC_RETRY.ANY", UCP_EVENT_32H_07H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.IOH", UCP_EVENT_33H_01H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.REMOTE", UCP_EVENT_33H_02H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.LOCAL", UCP_EVENT_33H_04H) \ +__PMC_EV_ALIAS("QHL_FRC_ACK_CNFLTS.ANY", UCP_EVENT_33H_07H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.IOH_ORDER", UCP_EVENT_34H_01H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_ORDER", UCP_EVENT_34H_02H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_ORDER", UCP_EVENT_34H_04H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.IOH_CONFLICT", UCP_EVENT_34H_08H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.REMOTE_CONFLICT", UCP_EVENT_34H_10H) \ +__PMC_EV_ALIAS("QHL_SLEEPS.LOCAL_CONFLICT", UCP_EVENT_34H_20H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.IOH", UCP_EVENT_35H_01H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.REMOTE", UCP_EVENT_35H_02H) \ +__PMC_EV_ALIAS("ADDR_OPCODE_MATCH.LOCAL", UCP_EVENT_35H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_0", \ + UCP_EVENT_40H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_0", \ + UCP_EVENT_40H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_0", \ + UCP_EVENT_40H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.HOME.LINK_1", \ + UCP_EVENT_40H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.SNOOP.LINK_1", \ + UCP_EVENT_40H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.NDR.LINK_1", \ + UCP_EVENT_40H_20H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_0", UCP_EVENT_40H_07H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_SINGLE_FLIT.LINK_1", UCP_EVENT_40H_38H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", UCP_EVENT_41H_01H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", UCP_EVENT_41H_02H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", UCP_EVENT_41H_04H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", UCP_EVENT_41H_08H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", UCP_EVENT_41H_10H) \ -__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", UCP_EVENT_41H_20H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_0", \ + UCP_EVENT_41H_01H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_0", \ + UCP_EVENT_41H_02H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_0", \ + UCP_EVENT_41H_04H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.DRS.LINK_1", \ + UCP_EVENT_41H_08H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCB.LINK_1", \ + UCP_EVENT_41H_10H) \ +__PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.NCS.LINK_1", \ + UCP_EVENT_41H_20H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_0", UCP_EVENT_41H_07H) \ __PMC_EV_ALIAS("QPI_TX_STALLED_MULTI_FLIT.LINK_1", UCP_EVENT_41H_38H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_0", UCP_EVENT_42H_01H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_1", UCP_EVENT_42H_04H) \ -__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_0", UCP_EVENT_42H_01H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_0", UCP_EVENT_42H_02H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.FULL.LINK_1", UCP_EVENT_42H_04H) \ +__PMC_EV_ALIAS("QPI_TX_HEADER.BUSY.LINK_1", UCP_EVENT_42H_08H) \ __PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_0", UCP_EVENT_43H_01H) \ __PMC_EV_ALIAS("QPI_RX_NO_PPT_CREDIT.STALLS.LINK_1", UCP_EVENT_43H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ -__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ -__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ -__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ -__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ -__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ -__PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) \ -__PMC_EV_ALIAS("DRAM_THERMAL_THROTTLED", UCP_EVENT_67H_01H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH0", UCP_EVENT_60H_01H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH1", UCP_EVENT_60H_02H) \ +__PMC_EV_ALIAS("DRAM_OPEN.CH2", UCP_EVENT_60H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH0", UCP_EVENT_61H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH1", UCP_EVENT_61H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_CLOSE.CH2", UCP_EVENT_61H_04H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH0", UCP_EVENT_62H_01H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH1", UCP_EVENT_62H_02H) \ +__PMC_EV_ALIAS("DRAM_PAGE_MISS.CH2", UCP_EVENT_62H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH0", UCP_EVENT_63H_01H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH0", UCP_EVENT_63H_02H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH1", UCP_EVENT_63H_04H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH1", UCP_EVENT_63H_08H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.CH2", UCP_EVENT_63H_10H) \ +__PMC_EV_ALIAS("DRAM_READ_CAS.AUTOPRE_CH2", UCP_EVENT_63H_20H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH0", UCP_EVENT_64H_01H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH0", UCP_EVENT_64H_02H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH1", UCP_EVENT_64H_04H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH1", UCP_EVENT_64H_08H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.CH2", UCP_EVENT_64H_10H) \ +__PMC_EV_ALIAS("DRAM_WRITE_CAS.AUTOPRE_CH2", UCP_EVENT_64H_20H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH0", UCP_EVENT_65H_01H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH1", UCP_EVENT_65H_02H) \ +__PMC_EV_ALIAS("DRAM_REFRESH.CH2", UCP_EVENT_65H_04H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH0", UCP_EVENT_66H_01H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH1", UCP_EVENT_66H_02H) \ +__PMC_EV_ALIAS("DRAM_PRE_ALL.CH2", UCP_EVENT_66H_04H) \ +__PMC_EV_ALIAS("DRAM_THERMAL_THROTTLED", UCP_EVENT_67H_01H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_0", UCP_EVENT_80H_01H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_1", UCP_EVENT_80H_02H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_TEMP.CORE_2", UCP_EVENT_80H_04H) \ @@ -3238,41 +4247,41 @@ __PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_1", UCP_EVENT_81H_02H) \ __PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_2", UCP_EVENT_81H_04H) \ __PMC_EV_ALIAS("THERMAL_THROTTLED_TEMP.CORE_3", UCP_EVENT_81H_08H) \ -__PMC_EV_ALIAS("PROCHOT_ASSERTION", UCP_EVENT_82H_01H) \ +__PMC_EV_ALIAS("PROCHOT_ASSERTION", UCP_EVENT_82H_01H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_0", UCP_EVENT_83H_01H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_1", UCP_EVENT_83H_02H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_2", UCP_EVENT_83H_04H) \ __PMC_EV_ALIAS("THERMAL_THROTTLING_PROCHOT.CORE_3", UCP_EVENT_83H_08H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_0", UCP_EVENT_84H_01H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_1", UCP_EVENT_84H_02H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_2", UCP_EVENT_84H_04H) \ -__PMC_EV_ALIAS("TURBO_MODE.CORE_3", UCP_EVENT_84H_08H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_0", UCP_EVENT_84H_01H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_1", UCP_EVENT_84H_02H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_2", UCP_EVENT_84H_04H) \ +__PMC_EV_ALIAS("TURBO_MODE.CORE_3", UCP_EVENT_84H_08H) \ __PMC_EV_ALIAS("CYCLES_UNHALTED_L3_FLL_ENABLE", UCP_EVENT_85H_02H) \ __PMC_EV_ALIAS("CYCLES_UNHALTED_L3_FLL_DISABLE", UCP_EVENT_86H_01H) -#define __PMC_EV_ALIAS_SANDYBRIDGEUC() \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITI", UCP_EVENT_22H_01H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITFSE", UCP_EVENT_22H_02H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSHITFSE", UCP_EVENT_22H_04H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSFWDM", UCP_EVENT_22H_08H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_EXTERNAL", UCP_EVENT_22H_20H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_XCORE", UCP_EVENT_22H_40H) \ -__PMC_EV_ALIAS("CB0_XSNP_RESPONSE_AND_XCORE2", UCP_EVENT_22H_80H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.E", UCP_EVENT_34H_02H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.S", UCP_EVENT_34H_04H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_READ", UCP_EVENT_34H_10H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP_AND_READ2", UCP_EVENT_34H_20H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_EXTSNP", UCP_EVENT_34H_40H) \ -__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_ANY", UCP_EVENT_34H_80H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ -__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ -__PMC_EV_ALIAS("IMPH_C0H_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ -__PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) +#define __PMC_EV_ALIAS_SANDYBRIDGEUC() \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITI", UCP_EVENT_22H_01H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPIHITFSE", UCP_EVENT_22H_02H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSHITFSE", UCP_EVENT_22H_04H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.RSPSFWDM", UCP_EVENT_22H_08H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_EXTERNAL", UCP_EVENT_22H_20H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE.AND_XCORE", UCP_EVENT_22H_40H) \ +__PMC_EV_ALIAS("CB0_XSNP_RESPONSE_AND_XCORE2", UCP_EVENT_22H_80H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.M", UCP_EVENT_34H_01H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.E", UCP_EVENT_34H_02H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.S", UCP_EVENT_34H_04H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.I", UCP_EVENT_34H_08H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_READ", UCP_EVENT_34H_10H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP_AND_READ2", UCP_EVENT_34H_20H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_EXTSNP", UCP_EVENT_34H_40H) \ +__PMC_EV_ALIAS("CB0_CACHE_LOOKUP.AND_ANY", UCP_EVENT_34H_80H) \ +__PMC_EV_ALIAS("IMPH_CB0_TRK_OCCUPANCY.ALL", UCP_EVENT_80H_01H) \ +__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.ALL", UCP_EVENT_81H_01H) \ +__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.WRITES", UCP_EVENT_81H_20H) \ +__PMC_EV_ALIAS("IMPH_CB0_TRK_REQUEST.EVICTIONS", UCP_EVENT_81H_80H) \ +__PMC_EV_ALIAS("IMPH_C0H_TRK_OCCUPANCY.ALL", UCP_EVENT_83H_01H) \ +__PMC_EV_ALIAS("IMPC_C0H_TRK_REQUEST.ALL", UCP_EVENT_84H_01H) /* * Intel XScale events from: @@ -3420,226 +4429,230 @@ #define PMC_EV_MIPS24K_FIRST PMC_EV_MIPS24K_CYCLE #define PMC_EV_MIPS24K_LAST PMC_EV_MIPS24K_WBB_FULL_PIPELINE_STALLS -#define __PMC_EV_PPC7450() \ - __PMC_EV(PPC7450, CYCLE) \ - __PMC_EV(PPC7450, INSTR_COMPLETED) \ - __PMC_EV(PPC7450, TLB_BIT_TRANSITIONS) \ - __PMC_EV(PPC7450, INSTR_DISPATCHED) \ - __PMC_EV(PPC7450, PMON_EXCEPT) \ - __PMC_EV(PPC7450, PMON_SIG) \ - __PMC_EV(PPC7450, VPU_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, VFPU_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, VIU1_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, VIU2_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, MTVSCR_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, MTVRSAVE_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, VPU_INSTR_WAIT_CYCLES) \ - __PMC_EV(PPC7450, VFPU_INSTR_WAIT_CYCLES) \ - __PMC_EV(PPC7450, VIU1_INSTR_WAIT_CYCLES) \ - __PMC_EV(PPC7450, VIU2_INSTR_WAIT_CYCLES) \ - __PMC_EV(PPC7450, MFVSCR_SYNC_CYCLES) \ - __PMC_EV(PPC7450, VSCR_SAT_SET) \ - __PMC_EV(PPC7450, STORE_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, L1_INSTR_CACHE_MISSES) \ - __PMC_EV(PPC7450, L1_DATA_SNOOPS) \ - __PMC_EV(PPC7450, UNRESOLVED_BRANCHES) \ - __PMC_EV(PPC7450, SPEC_BUFFER_CYCLES) \ - __PMC_EV(PPC7450, BRANCH_UNIT_STALL_CYCLES) \ - __PMC_EV(PPC7450, TRUE_BRANCH_TARGET_HITS) \ - __PMC_EV(PPC7450, BRANCH_LINK_STAC_PREDICTED) \ - __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_DISPATCHES) \ - __PMC_EV(PPC7450, CYCLES_THREE_INSTR_DISPATCHED) \ - __PMC_EV(PPC7450, THRESHOLD_INSTR_QUEUE_ENTRIES_CYCLES) \ +#define __PMC_EV_PPC7450() \ + __PMC_EV(PPC7450, CYCLE) \ + __PMC_EV(PPC7450, INSTR_COMPLETED) \ + __PMC_EV(PPC7450, TLB_BIT_TRANSITIONS) \ + __PMC_EV(PPC7450, INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, PMON_EXCEPT) \ + __PMC_EV(PPC7450, PMON_SIG) \ + __PMC_EV(PPC7450, VPU_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, VFPU_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, VIU1_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, VIU2_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, MTVSCR_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, MTVRSAVE_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, VPU_INSTR_WAIT_CYCLES) \ + __PMC_EV(PPC7450, VFPU_INSTR_WAIT_CYCLES) \ + __PMC_EV(PPC7450, VIU1_INSTR_WAIT_CYCLES) \ + __PMC_EV(PPC7450, VIU2_INSTR_WAIT_CYCLES) \ + __PMC_EV(PPC7450, MFVSCR_SYNC_CYCLES) \ + __PMC_EV(PPC7450, VSCR_SAT_SET) \ + __PMC_EV(PPC7450, STORE_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, L1_INSTR_CACHE_MISSES) \ + __PMC_EV(PPC7450, L1_DATA_SNOOPS) \ + __PMC_EV(PPC7450, UNRESOLVED_BRANCHES) \ + __PMC_EV(PPC7450, SPEC_BUFFER_CYCLES) \ + __PMC_EV(PPC7450, BRANCH_UNIT_STALL_CYCLES) \ + __PMC_EV(PPC7450, TRUE_BRANCH_TARGET_HITS) \ + __PMC_EV(PPC7450, BRANCH_LINK_STAC_PREDICTED) \ + __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_DISPATCHES) \ + __PMC_EV(PPC7450, CYCLES_THREE_INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, THRESHOLD_INSTR_QUEUE_ENTRIES_CYCLES) \ __PMC_EV(PPC7450, THRESHOLD_VEC_INSTR_QUEUE_ENTRIES_CYCLES) \ - __PMC_EV(PPC7450, CYCLES_NO_COMPLETED_INSTRS) \ - __PMC_EV(PPC7450, IU2_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, BRANCHES_COMPLETED) \ - __PMC_EV(PPC7450, EIEIO_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, MTSPR_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, SC_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, LS_LM_COMPLETED) \ - __PMC_EV(PPC7450, ITLB_HW_TABLE_SEARCH_CYCLES) \ - __PMC_EV(PPC7450, DTLB_HW_SEARCH_CYCLES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, L1_INSTR_CACHE_ACCESSES) \ - __PMC_EV(PPC7450, INSTR_BKPT_MATCHES) \ - __PMC_EV(PPC7450, L1_DATA_CACHE_LOAD_MISS_CYCLES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_ON_MODIFIED) \ - __PMC_EV(PPC7450, LOAD_MISS_ALIAS) \ - __PMC_EV(PPC7450, LOAD_MISS_ALIAS_ON_TOUCH) \ - __PMC_EV(PPC7450, TOUCH_ALIAS) \ - __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_CASTOUT_QUEUE) \ - __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_CASTOUT) \ - __PMC_EV(PPC7450, L1_DATA_SNOOP_HITS) \ - __PMC_EV(PPC7450, WRITE_THROUGH_STORES) \ - __PMC_EV(PPC7450, CACHE_INHIBITED_STORES) \ - __PMC_EV(PPC7450, L1_DATA_LOAD_HIT) \ - __PMC_EV(PPC7450, L1_DATA_TOUCH_HIT) \ - __PMC_EV(PPC7450, L1_DATA_STORE_HIT) \ - __PMC_EV(PPC7450, L1_DATA_TOTAL_HITS) \ - __PMC_EV(PPC7450, DST_INSTR_DISPATCHED) \ - __PMC_EV(PPC7450, REFRESHED_DSTS) \ - __PMC_EV(PPC7450, SUCCESSFUL_DST_TABLE_SEARCHES) \ - __PMC_EV(PPC7450, DSS_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, DST_STREAM_0_CACHE_LINE_FETCHES) \ - __PMC_EV(PPC7450, VTQ_SUSPENDS_DUE_TO_CTX_CHANGE) \ - __PMC_EV(PPC7450, VTQ_LINE_FETCH_HIT) \ - __PMC_EV(PPC7450, VEC_LOAD_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, FP_STORE_INSTR_COMPLETED_IN_LSU) \ - __PMC_EV(PPC7450, FPU_RENORMALIZATION) \ - __PMC_EV(PPC7450, FPU_DENORMALIZATION) \ - __PMC_EV(PPC7450, FP_STORE_CAUSES_STALL_IN_LSU) \ - __PMC_EV(PPC7450, LD_ST_TRUE_ALIAS_STALL) \ - __PMC_EV(PPC7450, LSU_INDEXED_ALIAS_STALL) \ - __PMC_EV(PPC7450, LSU_ALIAS_VS_FSQ_WB0_WB1) \ - __PMC_EV(PPC7450, LSU_ALIAS_VS_CSQ) \ - __PMC_EV(PPC7450, LSU_LOAD_HIT_LINE_ALIAS_VS_CSQ0) \ - __PMC_EV(PPC7450, LSU_LOAD_MISS_LINE_ALIAS_VS_CSQ0) \ - __PMC_EV(PPC7450, LSU_TOUCH_LINE_ALIAS_VS_FSQ_WB0_WB1) \ - __PMC_EV(PPC7450, LSU_TOUCH_ALIAS_VS_CSQ) \ - __PMC_EV(PPC7450, LSU_LMQ_FULL_STALL) \ - __PMC_EV(PPC7450, FP_LOAD_INSTR_COMPLETED_IN_LSU) \ + __PMC_EV(PPC7450, CYCLES_NO_COMPLETED_INSTRS) \ + __PMC_EV(PPC7450, IU2_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, BRANCHES_COMPLETED) \ + __PMC_EV(PPC7450, EIEIO_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, MTSPR_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, SC_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, LS_LM_COMPLETED) \ + __PMC_EV(PPC7450, ITLB_HW_TABLE_SEARCH_CYCLES) \ + __PMC_EV(PPC7450, DTLB_HW_SEARCH_CYCLES_OVER_THRESHOLD) \ + __PMC_EV(PPC7450, L1_INSTR_CACHE_ACCESSES) \ + __PMC_EV(PPC7450, INSTR_BKPT_MATCHES) \ + __PMC_EV(PPC7450, L1_DATA_CACHE_LOAD_MISS_CYCLES_OVER_THRESHOLD)\ + __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_ON_MODIFIED) \ + __PMC_EV(PPC7450, LOAD_MISS_ALIAS) \ + __PMC_EV(PPC7450, LOAD_MISS_ALIAS_ON_TOUCH) \ + __PMC_EV(PPC7450, TOUCH_ALIAS) \ + __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_CASTOUT_QUEUE) \ + __PMC_EV(PPC7450, L1_DATA_SNOOP_HIT_CASTOUT) \ + __PMC_EV(PPC7450, L1_DATA_SNOOP_HITS) \ + __PMC_EV(PPC7450, WRITE_THROUGH_STORES) \ + __PMC_EV(PPC7450, CACHE_INHIBITED_STORES) \ + __PMC_EV(PPC7450, L1_DATA_LOAD_HIT) \ + __PMC_EV(PPC7450, L1_DATA_TOUCH_HIT) \ + __PMC_EV(PPC7450, L1_DATA_STORE_HIT) \ + __PMC_EV(PPC7450, L1_DATA_TOTAL_HITS) \ + __PMC_EV(PPC7450, DST_INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, REFRESHED_DSTS) \ + __PMC_EV(PPC7450, SUCCESSFUL_DST_TABLE_SEARCHES) \ + __PMC_EV(PPC7450, DSS_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, DST_STREAM_0_CACHE_LINE_FETCHES) \ + __PMC_EV(PPC7450, VTQ_SUSPENDS_DUE_TO_CTX_CHANGE) \ + __PMC_EV(PPC7450, VTQ_LINE_FETCH_HIT) \ + __PMC_EV(PPC7450, VEC_LOAD_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, FP_STORE_INSTR_COMPLETED_IN_LSU) \ + __PMC_EV(PPC7450, FPU_RENORMALIZATION) \ + __PMC_EV(PPC7450, FPU_DENORMALIZATION) \ + __PMC_EV(PPC7450, FP_STORE_CAUSES_STALL_IN_LSU) \ + __PMC_EV(PPC7450, LD_ST_TRUE_ALIAS_STALL) \ + __PMC_EV(PPC7450, LSU_INDEXED_ALIAS_STALL) \ + __PMC_EV(PPC7450, LSU_ALIAS_VS_FSQ_WB0_WB1) \ + __PMC_EV(PPC7450, LSU_ALIAS_VS_CSQ) \ + __PMC_EV(PPC7450, LSU_LOAD_HIT_LINE_ALIAS_VS_CSQ0) \ + __PMC_EV(PPC7450, LSU_LOAD_MISS_LINE_ALIAS_VS_CSQ0) \ + __PMC_EV(PPC7450, LSU_TOUCH_LINE_ALIAS_VS_FSQ_WB0_WB1) \ + __PMC_EV(PPC7450, LSU_TOUCH_ALIAS_VS_CSQ) \ + __PMC_EV(PPC7450, LSU_LMQ_FULL_STALL) \ + __PMC_EV(PPC7450, FP_LOAD_INSTR_COMPLETED_IN_LSU) \ __PMC_EV(PPC7450, FP_LOAD_SINGLE_INSTR_COMPLETED_IN_LSU) \ - __PMC_EV(PPC7450, FP_LOAD_DOUBLE_COMPLETED_IN_LSU) \ - __PMC_EV(PPC7450, LSU_RA_LATCH_STALL) \ - __PMC_EV(PPC7450, LSU_LOAD_VS_STORE_QUEUE_ALIAS_STALL) \ - __PMC_EV(PPC7450, LSU_LMQ_INDEX_ALIAS) \ - __PMC_EV(PPC7450, LSU_STORE_QUEUE_INDEX_ALIAS) \ - __PMC_EV(PPC7450, LSU_CSQ_FORWARDING) \ - __PMC_EV(PPC7450, LSU_MISALIGNED_LOAD_FINISH) \ - __PMC_EV(PPC7450, LSU_MISALIGN_STORE_COMPLETED) \ - __PMC_EV(PPC7450, LSU_MISALIGN_STALL) \ - __PMC_EV(PPC7450, FP_ONE_QUARTER_FPSCR_RENAMES_BUSY) \ - __PMC_EV(PPC7450, FP_ONE_HALF_FPSCR_RENAMES_BUSY) \ - __PMC_EV(PPC7450, FP_THREE_QUARTERS_FPSCR_RENAMES_BUSY) \ - __PMC_EV(PPC7450, FP_ALL_FPSCR_RENAMES_BUSY) \ - __PMC_EV(PPC7450, FP_DENORMALIZED_RESULT) \ - __PMC_EV(PPC7450, L1_DATA_TOTAL_MISSES) \ - __PMC_EV(PPC7450, DISPATCHES_TO_FPR_ISSUE_QUEUE) \ - __PMC_EV(PPC7450, LSU_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, LOAD_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, SS_SM_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, TLBIE_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, LWARX_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, MFSPR_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, REFETCH_SERIALIZATION) \ + __PMC_EV(PPC7450, FP_LOAD_DOUBLE_COMPLETED_IN_LSU) \ + __PMC_EV(PPC7450, LSU_RA_LATCH_STALL) \ + __PMC_EV(PPC7450, LSU_LOAD_VS_STORE_QUEUE_ALIAS_STALL) \ + __PMC_EV(PPC7450, LSU_LMQ_INDEX_ALIAS) \ + __PMC_EV(PPC7450, LSU_STORE_QUEUE_INDEX_ALIAS) \ + __PMC_EV(PPC7450, LSU_CSQ_FORWARDING) \ + __PMC_EV(PPC7450, LSU_MISALIGNED_LOAD_FINISH) \ + __PMC_EV(PPC7450, LSU_MISALIGN_STORE_COMPLETED) \ + __PMC_EV(PPC7450, LSU_MISALIGN_STALL) \ + __PMC_EV(PPC7450, FP_ONE_QUARTER_FPSCR_RENAMES_BUSY) \ + __PMC_EV(PPC7450, FP_ONE_HALF_FPSCR_RENAMES_BUSY) \ + __PMC_EV(PPC7450, FP_THREE_QUARTERS_FPSCR_RENAMES_BUSY) \ + __PMC_EV(PPC7450, FP_ALL_FPSCR_RENAMES_BUSY) \ + __PMC_EV(PPC7450, FP_DENORMALIZED_RESULT) \ + __PMC_EV(PPC7450, L1_DATA_TOTAL_MISSES) \ + __PMC_EV(PPC7450, DISPATCHES_TO_FPR_ISSUE_QUEUE) \ + __PMC_EV(PPC7450, LSU_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, LOAD_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, SS_SM_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, TLBIE_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, LWARX_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, MFSPR_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, REFETCH_SERIALIZATION) \ __PMC_EV(PPC7450, COMPLETION_QUEUE_ENTRIES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, CYCLES_ONE_INSTR_DISPATCHED) \ - __PMC_EV(PPC7450, CYCLES_TWO_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, ITLB_NON_SPECULATIVE_MISSES) \ + __PMC_EV(PPC7450, CYCLES_ONE_INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, CYCLES_TWO_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, ITLB_NON_SPECULATIVE_MISSES) \ __PMC_EV(PPC7450, CYCLES_WAITING_FROM_L1_INSTR_CACHE_MISS) \ - __PMC_EV(PPC7450, L1_DATA_LOAD_ACCESS_MISS) \ - __PMC_EV(PPC7450, L1_DATA_TOUCH_MISS) \ - __PMC_EV(PPC7450, L1_DATA_STORE_MISS) \ - __PMC_EV(PPC7450, L1_DATA_TOUCH_MISS_CYCLES) \ - __PMC_EV(PPC7450, L1_DATA_CYCLES_USED) \ - __PMC_EV(PPC7450, DST_STREAM_1_CACHE_LINE_FETCHES) \ - __PMC_EV(PPC7450, VTQ_STREAM_CANCELED_PREMATURELY) \ - __PMC_EV(PPC7450, VTQ_RESUMES_DUE_TO_CTX_CHANGE) \ - __PMC_EV(PPC7450, VTQ_LINE_FETCH_MISS) \ - __PMC_EV(PPC7450, VTQ_LINE_FETCH) \ - __PMC_EV(PPC7450, TLBIE_SNOOPS) \ - __PMC_EV(PPC7450, L1_INSTR_CACHE_RELOADS) \ - __PMC_EV(PPC7450, L1_DATA_CACHE_RELOADS) \ - __PMC_EV(PPC7450, L1_DATA_CACHE_CASTOUTS_TO_L2) \ - __PMC_EV(PPC7450, STORE_MERGE_GATHER) \ - __PMC_EV(PPC7450, CACHEABLE_STORE_MERGE_TO_32_BYTES) \ - __PMC_EV(PPC7450, DATA_BKPT_MATCHES) \ - __PMC_EV(PPC7450, FALL_THROUGH_BRANCHES_PROCESSED) \ - __PMC_EV(PPC7450, FIRST_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ - __PMC_EV(PPC7450, SECOND_SPECULATION_BUFFER_ACTIVE) \ - __PMC_EV(PPC7450, BPU_STALL_ON_LR_DEPENDENCY) \ - __PMC_EV(PPC7450, BTIC_MISS) \ - __PMC_EV(PPC7450, BRANCH_LINK_STACK_CORRECTLY_RESOLVED) \ - __PMC_EV(PPC7450, FPR_ISSUE_STALLED) \ - __PMC_EV(PPC7450, SWITCHES_BETWEEN_PRIV_USER) \ - __PMC_EV(PPC7450, LSU_COMPLETES_FP_STORE_SINGLE) \ - __PMC_EV(PPC7450, VR_ISSUE_QUEUE_DISPATCHES) \ - __PMC_EV(PPC7450, VR_STALLS) \ + __PMC_EV(PPC7450, L1_DATA_LOAD_ACCESS_MISS) \ + __PMC_EV(PPC7450, L1_DATA_TOUCH_MISS) \ + __PMC_EV(PPC7450, L1_DATA_STORE_MISS) \ + __PMC_EV(PPC7450, L1_DATA_TOUCH_MISS_CYCLES) \ + __PMC_EV(PPC7450, L1_DATA_CYCLES_USED) \ + __PMC_EV(PPC7450, DST_STREAM_1_CACHE_LINE_FETCHES) \ + __PMC_EV(PPC7450, VTQ_STREAM_CANCELED_PREMATURELY) \ + __PMC_EV(PPC7450, VTQ_RESUMES_DUE_TO_CTX_CHANGE) \ + __PMC_EV(PPC7450, VTQ_LINE_FETCH_MISS) \ + __PMC_EV(PPC7450, VTQ_LINE_FETCH) \ + __PMC_EV(PPC7450, TLBIE_SNOOPS) \ + __PMC_EV(PPC7450, L1_INSTR_CACHE_RELOADS) \ + __PMC_EV(PPC7450, L1_DATA_CACHE_RELOADS) \ + __PMC_EV(PPC7450, L1_DATA_CACHE_CASTOUTS_TO_L2) \ + __PMC_EV(PPC7450, STORE_MERGE_GATHER) \ + __PMC_EV(PPC7450, CACHEABLE_STORE_MERGE_TO_32_BYTES) \ + __PMC_EV(PPC7450, DATA_BKPT_MATCHES) \ + __PMC_EV(PPC7450, FALL_THROUGH_BRANCHES_PROCESSED) \ + __PMC_EV(PPC7450, \ + FIRST_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ + __PMC_EV(PPC7450, SECOND_SPECULATION_BUFFER_ACTIVE) \ + __PMC_EV(PPC7450, BPU_STALL_ON_LR_DEPENDENCY) \ + __PMC_EV(PPC7450, BTIC_MISS) \ + __PMC_EV(PPC7450, BRANCH_LINK_STACK_CORRECTLY_RESOLVED) \ + __PMC_EV(PPC7450, FPR_ISSUE_STALLED) \ + __PMC_EV(PPC7450, SWITCHES_BETWEEN_PRIV_USER) \ + __PMC_EV(PPC7450, LSU_COMPLETES_FP_STORE_SINGLE) \ + __PMC_EV(PPC7450, VR_ISSUE_QUEUE_DISPATCHES) \ + __PMC_EV(PPC7450, VR_STALLS) \ __PMC_EV(PPC7450, GPR_RENAME_BUFFER_ENTRIES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, FPR_ISSUE_QUEUE_ENTRIES) \ - __PMC_EV(PPC7450, FPU_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, STWCX_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, LS_LM_INSTR_PIECES) \ - __PMC_EV(PPC7450, ITLB_HW_SEARCH_CYCLES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, DTLB_MISSES) \ - __PMC_EV(PPC7450, CANCELLED_L1_INSTR_CACHE_MISSES) \ - __PMC_EV(PPC7450, L1_DATA_CACHE_OP_HIT) \ - __PMC_EV(PPC7450, L1_DATA_LOAD_MISS_CYCLES) \ - __PMC_EV(PPC7450, L1_DATA_PUSHES) \ - __PMC_EV(PPC7450, L1_DATA_TOTAL_MISS) \ - __PMC_EV(PPC7450, VT2_FETCHES) \ - __PMC_EV(PPC7450, TAKEN_BRANCHES_PROCESSED) \ - __PMC_EV(PPC7450, BRANCH_FLUSHES) \ - __PMC_EV(PPC7450, SECOND_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ - __PMC_EV(PPC7450, THIRD_SPECULATION_BUFFER_ACTIVE) \ - __PMC_EV(PPC7450, BRANCH_UNIT_STALL_ON_CTR_DEPENDENCY) \ - __PMC_EV(PPC7450, FAST_BTIC_HIT) \ - __PMC_EV(PPC7450, BRANCH_LINK_STACK_MISPREDICTED) \ - __PMC_EV(PPC7450, CYCLES_THREE_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, CYCLES_NO_INSTR_DISPATCHED) \ + __PMC_EV(PPC7450, FPR_ISSUE_QUEUE_ENTRIES) \ + __PMC_EV(PPC7450, FPU_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, STWCX_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, LS_LM_INSTR_PIECES) \ + __PMC_EV(PPC7450, ITLB_HW_SEARCH_CYCLES_OVER_THRESHOLD) \ + __PMC_EV(PPC7450, DTLB_MISSES) \ + __PMC_EV(PPC7450, CANCELLED_L1_INSTR_CACHE_MISSES) \ + __PMC_EV(PPC7450, L1_DATA_CACHE_OP_HIT) \ + __PMC_EV(PPC7450, L1_DATA_LOAD_MISS_CYCLES) \ + __PMC_EV(PPC7450, L1_DATA_PUSHES) \ + __PMC_EV(PPC7450, L1_DATA_TOTAL_MISS) \ + __PMC_EV(PPC7450, VT2_FETCHES) \ + __PMC_EV(PPC7450, TAKEN_BRANCHES_PROCESSED) \ + __PMC_EV(PPC7450, BRANCH_FLUSHES) \ + __PMC_EV(PPC7450, \ + SECOND_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ + __PMC_EV(PPC7450, THIRD_SPECULATION_BUFFER_ACTIVE) \ + __PMC_EV(PPC7450, BRANCH_UNIT_STALL_ON_CTR_DEPENDENCY) \ + __PMC_EV(PPC7450, FAST_BTIC_HIT) \ + __PMC_EV(PPC7450, BRANCH_LINK_STACK_MISPREDICTED) \ + __PMC_EV(PPC7450, CYCLES_THREE_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, CYCLES_NO_INSTR_DISPATCHED) \ __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_ENTRIES_OVER_THRESHOLD) \ - __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_STALLED) \ - __PMC_EV(PPC7450, IU1_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, DSSALL_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, TLBSYNC_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, SYNC_INSTR_COMPLETED) \ - __PMC_EV(PPC7450, SS_SM_INSTR_PIECES) \ - __PMC_EV(PPC7450, DTLB_HW_SEARCH_CYCLES) \ - __PMC_EV(PPC7450, SNOOP_RETRIES) \ - __PMC_EV(PPC7450, SUCCESSFUL_STWCX) \ - __PMC_EV(PPC7450, DST_STREAM_3_CACHE_LINE_FETCHES) \ - __PMC_EV(PPC7450, THIRD_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ - __PMC_EV(PPC7450, MISPREDICTED_BRANCHES) \ - __PMC_EV(PPC7450, FOLDED_BRANCHES) \ - __PMC_EV(PPC7450, FP_STORE_DOUBLE_COMPLETES_IN_LSU) \ - __PMC_EV(PPC7450, L2_CACHE_HITS) \ - __PMC_EV(PPC7450, L3_CACHE_HITS) \ - __PMC_EV(PPC7450, L2_INSTR_CACHE_MISSES) \ - __PMC_EV(PPC7450, L3_INSTR_CACHE_MISSES) \ - __PMC_EV(PPC7450, L2_DATA_CACHE_MISSES) \ - __PMC_EV(PPC7450, L3_DATA_CACHE_MISSES) \ - __PMC_EV(PPC7450, L2_LOAD_HITS) \ - __PMC_EV(PPC7450, L2_STORE_HITS) \ - __PMC_EV(PPC7450, L3_LOAD_HITS) \ - __PMC_EV(PPC7450, L3_STORE_HITS) \ - __PMC_EV(PPC7450, L2_TOUCH_HITS) \ - __PMC_EV(PPC7450, L3_TOUCH_HITS) \ - __PMC_EV(PPC7450, SNOOP_MODIFIED) \ - __PMC_EV(PPC7450, SNOOP_VALID) \ - __PMC_EV(PPC7450, INTERVENTION) \ - __PMC_EV(PPC7450, L2_CACHE_MISSES) \ - __PMC_EV(PPC7450, L3_CACHE_MISSES) \ - __PMC_EV(PPC7450, L2_CACHE_CASTOUTS) \ - __PMC_EV(PPC7450, L3_CACHE_CASTOUTS) \ - __PMC_EV(PPC7450, L2SQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, L3SQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, RAQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, WAQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, L1_EXTERNAL_INTERVENTIONS) \ - __PMC_EV(PPC7450, L2_EXTERNAL_INTERVENTIONS) \ - __PMC_EV(PPC7450, L3_EXTERNAL_INTERVENTIONS) \ - __PMC_EV(PPC7450, EXTERNAL_INTERVENTIONS) \ - __PMC_EV(PPC7450, EXTERNAL_PUSHES) \ - __PMC_EV(PPC7450, EXTERNAL_SNOOP_RETRY) \ - __PMC_EV(PPC7450, DTQ_FULL_CYCLES) \ - __PMC_EV(PPC7450, BUS_RETRY) \ - __PMC_EV(PPC7450, L2_VALID_REQUEST) \ - __PMC_EV(PPC7450, BORDQ_FULL) \ - __PMC_EV(PPC7450, BUS_TAS_FOR_READS) \ - __PMC_EV(PPC7450, BUS_TAS_FOR_WRITES) \ - __PMC_EV(PPC7450, BUS_READS_NOT_RETRIED) \ - __PMC_EV(PPC7450, BUS_WRITES_NOT_RETRIED) \ - __PMC_EV(PPC7450, BUS_READS_WRITES_NOT_RETRIED) \ - __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_L1_RETRY) \ - __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_PREVIOUS_ADJACENT) \ - __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_COLLISION) \ + __PMC_EV(PPC7450, GPR_ISSUE_QUEUE_STALLED) \ + __PMC_EV(PPC7450, IU1_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, DSSALL_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, TLBSYNC_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, SYNC_INSTR_COMPLETED) \ + __PMC_EV(PPC7450, SS_SM_INSTR_PIECES) \ + __PMC_EV(PPC7450, DTLB_HW_SEARCH_CYCLES) \ + __PMC_EV(PPC7450, SNOOP_RETRIES) \ + __PMC_EV(PPC7450, SUCCESSFUL_STWCX) \ + __PMC_EV(PPC7450, DST_STREAM_3_CACHE_LINE_FETCHES) \ + __PMC_EV(PPC7450, \ + THIRD_SPECULATIVE_BRANCH_BUFFER_RESOLVED_CORRECTLY) \ + __PMC_EV(PPC7450, MISPREDICTED_BRANCHES) \ + __PMC_EV(PPC7450, FOLDED_BRANCHES) \ + __PMC_EV(PPC7450, FP_STORE_DOUBLE_COMPLETES_IN_LSU) \ + __PMC_EV(PPC7450, L2_CACHE_HITS) \ + __PMC_EV(PPC7450, L3_CACHE_HITS) \ + __PMC_EV(PPC7450, L2_INSTR_CACHE_MISSES) \ + __PMC_EV(PPC7450, L3_INSTR_CACHE_MISSES) \ + __PMC_EV(PPC7450, L2_DATA_CACHE_MISSES) \ + __PMC_EV(PPC7450, L3_DATA_CACHE_MISSES) \ + __PMC_EV(PPC7450, L2_LOAD_HITS) \ + __PMC_EV(PPC7450, L2_STORE_HITS) \ + __PMC_EV(PPC7450, L3_LOAD_HITS) \ + __PMC_EV(PPC7450, L3_STORE_HITS) \ + __PMC_EV(PPC7450, L2_TOUCH_HITS) \ + __PMC_EV(PPC7450, L3_TOUCH_HITS) \ + __PMC_EV(PPC7450, SNOOP_MODIFIED) \ + __PMC_EV(PPC7450, SNOOP_VALID) \ + __PMC_EV(PPC7450, INTERVENTION) \ + __PMC_EV(PPC7450, L2_CACHE_MISSES) \ + __PMC_EV(PPC7450, L3_CACHE_MISSES) \ + __PMC_EV(PPC7450, L2_CACHE_CASTOUTS) \ + __PMC_EV(PPC7450, L3_CACHE_CASTOUTS) \ + __PMC_EV(PPC7450, L2SQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, L3SQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, RAQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, WAQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, L1_EXTERNAL_INTERVENTIONS) \ + __PMC_EV(PPC7450, L2_EXTERNAL_INTERVENTIONS) \ + __PMC_EV(PPC7450, L3_EXTERNAL_INTERVENTIONS) \ + __PMC_EV(PPC7450, EXTERNAL_INTERVENTIONS) \ + __PMC_EV(PPC7450, EXTERNAL_PUSHES) \ + __PMC_EV(PPC7450, EXTERNAL_SNOOP_RETRY) \ + __PMC_EV(PPC7450, DTQ_FULL_CYCLES) \ + __PMC_EV(PPC7450, BUS_RETRY) \ + __PMC_EV(PPC7450, L2_VALID_REQUEST) \ + __PMC_EV(PPC7450, BORDQ_FULL) \ + __PMC_EV(PPC7450, BUS_TAS_FOR_READS) \ + __PMC_EV(PPC7450, BUS_TAS_FOR_WRITES) \ + __PMC_EV(PPC7450, BUS_READS_NOT_RETRIED) \ + __PMC_EV(PPC7450, BUS_WRITES_NOT_RETRIED) \ + __PMC_EV(PPC7450, BUS_READS_WRITES_NOT_RETRIED) \ + __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_L1_RETRY) \ + __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_PREVIOUS_ADJACENT) \ + __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_COLLISION) \ __PMC_EV(PPC7450, BUS_RETRY_DUE_TO_INTERVENTION_ORDERING) \ - __PMC_EV(PPC7450, SNOOP_REQUESTS) \ - __PMC_EV(PPC7450, PREFETCH_ENGINE_REQUEST) \ - __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_LOAD) \ - __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_STORE) \ + __PMC_EV(PPC7450, SNOOP_REQUESTS) \ + __PMC_EV(PPC7450, PREFETCH_ENGINE_REQUEST) \ + __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_LOAD) \ + __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_STORE) \ __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_INSTR_FETCH) \ - __PMC_EV(PPC7450, PREFETCH_ENGINE_COLLISION_VS_LOAD_STORE_INSTR_FETCH) \ + __PMC_EV(PPC7450, \ + PREFETCH_ENGINE_COLLISION_VS_LOAD_STORE_INSTR_FETCH) \ __PMC_EV(PPC7450, PREFETCH_ENGINE_FULL) #define PMC_EV_PPC7450_FIRST PMC_EV_PPC7450_CYCLE Modified: trunk/sys/sys/pmc.h =================================================================== --- trunk/sys/sys/pmc.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/sys/pmc.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -593,12 +593,12 @@ #include -#define PMC_HASH_SIZE 16 -#define PMC_MTXPOOL_SIZE 32 +#define PMC_HASH_SIZE 1024 +#define PMC_MTXPOOL_SIZE 2048 #define PMC_LOG_BUFFER_SIZE 4 -#define PMC_NLOGBUFFERS 64 -#define PMC_NSAMPLES 512 -#define PMC_CALLCHAIN_DEPTH 8 +#define PMC_NLOGBUFFERS 1024 +#define PMC_NSAMPLES 1024 +#define PMC_CALLCHAIN_DEPTH 16 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "." Modified: trunk/sys/sys/pmckern.h =================================================================== --- trunk/sys/sys/pmckern.h 2016-05-27 03:22:54 UTC (rev 7577) +++ trunk/sys/sys/pmckern.h 2016-05-27 03:31:33 UTC (rev 7578) @@ -87,9 +87,9 @@ * Soft PMC. */ -#define PMC_SOFT_DEFINE(prov, mod, func, name) \ +#define PMC_SOFT_DEFINE_EX(prov, mod, func, name, alloc, release) \ struct pmc_soft pmc_##prov##_##mod##_##func##_##name = \ - { 0, { #prov "_" #mod "_" #func "." #name, 0 } }; \ + { 0, alloc, release, { #prov "_" #mod "_" #func "." #name, 0 } }; \ SYSINIT(pmc_##prov##_##mod##_##func##_##name##_init, SI_SUB_KDTRACE, \ SI_ORDER_SECOND + 1, pmc_soft_ev_register, \ &pmc_##prov##_##mod##_##func##_##name ); \ @@ -97,6 +97,9 @@ SI_SUB_KDTRACE, SI_ORDER_SECOND + 1, pmc_soft_ev_deregister, \ &pmc_##prov##_##mod##_##func##_##name ) +#define PMC_SOFT_DEFINE(prov, mod, func, name) \ + PMC_SOFT_DEFINE_EX(prov, mod, func, name, NULL, NULL) + #define PMC_SOFT_DECLARE(prov, mod, func, name) \ extern struct pmc_soft pmc_##prov##_##mod##_##func##_##name @@ -147,6 +150,8 @@ struct pmc_soft { int ps_running; + void (*ps_alloc)(void); + void (*ps_release)(void); struct pmc_dyn_event_descr ps_ev; }; @@ -201,8 +206,7 @@ /* Check if a process is using HWPMCs.*/ #define PMC_PROC_IS_USING_PMCS(p) \ - (__predict_false(atomic_load_acq_int(&(p)->p_flag) & \ - P_HWPMC)) + (__predict_false(p->p_flag & P_HWPMC)) /* Check if a thread have pending user capture. */ #define PMC_IS_PENDING_CALLCHAIN(p) \ From laffer1 at midnightbsd.org Thu May 26 23:36:07 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:36:07 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7579] stable/0.8/lib/libpmc/Makefile: set warns to 3 so it can build with clang Message-ID: <201605270336.u4R3a7dI046152@stargazer.midnightbsd.org> Revision: 7579 http://svnweb.midnightbsd.org/src/?rev=7579 Author: laffer1 Date: 2016-05-26 23:36:07 -0400 (Thu, 26 May 2016) Log Message: ----------- set warns to 3 so it can build with clang Modified Paths: -------------- stable/0.8/lib/libpmc/Makefile Modified: stable/0.8/lib/libpmc/Makefile =================================================================== --- stable/0.8/lib/libpmc/Makefile 2016-05-27 03:31:33 UTC (rev 7578) +++ stable/0.8/lib/libpmc/Makefile 2016-05-27 03:36:07 UTC (rev 7579) @@ -5,6 +5,8 @@ SRCS= libpmc.c pmclog.c INCS= pmc.h pmclog.h +WARNS= 3 + MAN= pmc.3 MAN+= pmc_allocate.3 MAN+= pmc_attach.3 From laffer1 at midnightbsd.org Thu May 26 23:40:40 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:40:40 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7580] trunk/lib/libpmc: add haswell and ivy chips Message-ID: <201605270340.u4R3eeks046688@stargazer.midnightbsd.org> Revision: 7580 http://svnweb.midnightbsd.org/src/?rev=7580 Author: laffer1 Date: 2016-05-26 23:40:40 -0400 (Thu, 26 May 2016) Log Message: ----------- add haswell and ivy chips Modified Paths: -------------- trunk/lib/libpmc/Makefile trunk/lib/libpmc/libpmc.c trunk/lib/libpmc/libpmcinternal.h trunk/lib/libpmc/pmc.3 trunk/lib/libpmc/pmc.atom.3 trunk/lib/libpmc/pmc.core.3 trunk/lib/libpmc/pmc.core2.3 trunk/lib/libpmc/pmc.corei7.3 trunk/lib/libpmc/pmc.corei7uc.3 trunk/lib/libpmc/pmc.h trunk/lib/libpmc/pmc.iaf.3 trunk/lib/libpmc/pmc.k7.3 trunk/lib/libpmc/pmc.k8.3 trunk/lib/libpmc/pmc.mips.3 trunk/lib/libpmc/pmc.p4.3 trunk/lib/libpmc/pmc.p5.3 trunk/lib/libpmc/pmc.p6.3 trunk/lib/libpmc/pmc.sandybridge.3 trunk/lib/libpmc/pmc.sandybridgeuc.3 trunk/lib/libpmc/pmc.soft.3 trunk/lib/libpmc/pmc.tsc.3 trunk/lib/libpmc/pmc.ucf.3 trunk/lib/libpmc/pmc.westmere.3 trunk/lib/libpmc/pmc.westmereuc.3 trunk/lib/libpmc/pmc_allocate.3 trunk/lib/libpmc/pmc_attach.3 trunk/lib/libpmc/pmc_capabilities.3 trunk/lib/libpmc/pmc_configure_logfile.3 trunk/lib/libpmc/pmc_disable.3 trunk/lib/libpmc/pmc_event_names_of_class.3 trunk/lib/libpmc/pmc_get_driver_stats.3 trunk/lib/libpmc/pmc_get_msr.3 trunk/lib/libpmc/pmc_init.3 trunk/lib/libpmc/pmc_name_of_capability.3 trunk/lib/libpmc/pmc_read.3 trunk/lib/libpmc/pmc_set.3 trunk/lib/libpmc/pmc_start.3 trunk/lib/libpmc/pmclog.3 trunk/lib/libpmc/pmclog.c trunk/lib/libpmc/pmclog.h Added Paths: ----------- trunk/lib/libpmc/pmc.haswell.3 trunk/lib/libpmc/pmc.haswelluc.3 trunk/lib/libpmc/pmc.ivybridge.3 trunk/lib/libpmc/pmc.ivybridgexeon.3 trunk/lib/libpmc/pmc.sandybridgexeon.3 Modified: trunk/lib/libpmc/Makefile =================================================================== --- trunk/lib/libpmc/Makefile 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/Makefile 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,4 +1,5 @@ # $MidnightBSD$ +# $FreeBSD: release/9.2.0/lib/libpmc/Makefile 249655 2013-04-19 19:28:48Z hiren $ LIB= pmc @@ -5,7 +6,7 @@ SRCS= libpmc.c pmclog.c INCS= pmc.h pmclog.h -WARNS= 3 +WARNS=3 MAN= pmc.3 MAN+= pmc_allocate.3 @@ -28,7 +29,11 @@ MAN+= pmc.atom.3 MAN+= pmc.core.3 MAN+= pmc.core2.3 +MAN+= pmc.haswell.3 +MAN+= pmc.haswelluc.3 MAN+= pmc.iaf.3 +MAN+= pmc.ivybridge.3 +MAN+= pmc.ivybridgexeon.3 MAN+= pmc.ucf.3 MAN+= pmc.k7.3 MAN+= pmc.k8.3 @@ -39,6 +44,7 @@ MAN+= pmc.corei7uc.3 MAN+= pmc.sandybridge.3 MAN+= pmc.sandybridgeuc.3 +MAN+= pmc.sandybridgexeon.3 MAN+= pmc.westmere.3 MAN+= pmc.westmereuc.3 MAN+= pmc.tsc.3 Modified: trunk/lib/libpmc/libpmc.c =================================================================== --- trunk/lib/libpmc/libpmc.c 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/libpmc.c 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003-2008 Joseph Koshy * All rights reserved. @@ -25,7 +26,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/lib/libpmc/libpmc.c 249655 2013-04-19 19:28:48Z hiren $"); #include #include @@ -182,11 +183,31 @@ __PMC_EV_ALIAS_COREI7() }; +static const struct pmc_event_descr haswell_event_table[] = +{ + __PMC_EV_ALIAS_HASWELL() +}; + +static const struct pmc_event_descr ivybridge_event_table[] = +{ + __PMC_EV_ALIAS_IVYBRIDGE() +}; + +static const struct pmc_event_descr ivybridge_xeon_event_table[] = +{ + __PMC_EV_ALIAS_IVYBRIDGE_XEON() +}; + static const struct pmc_event_descr sandybridge_event_table[] = { __PMC_EV_ALIAS_SANDYBRIDGE() }; +static const struct pmc_event_descr sandybridge_xeon_event_table[] = +{ + __PMC_EV_ALIAS_SANDYBRIDGE_XEON() +}; + static const struct pmc_event_descr westmere_event_table[] = { __PMC_EV_ALIAS_WESTMERE() @@ -197,6 +218,11 @@ __PMC_EV_ALIAS_COREI7UC() }; +static const struct pmc_event_descr haswelluc_event_table[] = +{ + __PMC_EV_ALIAS_HASWELLUC() +}; + static const struct pmc_event_descr sandybridgeuc_event_table[] = { __PMC_EV_ALIAS_SANDYBRIDGEUC() @@ -221,7 +247,11 @@ PMC_MDEP_TABLE(core, IAP, PMC_CLASS_SOFT, PMC_CLASS_TSC); PMC_MDEP_TABLE(core2, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(corei7, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); +PMC_MDEP_TABLE(haswell, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); +PMC_MDEP_TABLE(ivybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); +PMC_MDEP_TABLE(ivybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(sandybridge, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); +PMC_MDEP_TABLE(sandybridge_xeon, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC); PMC_MDEP_TABLE(westmere, IAP, PMC_CLASS_SOFT, PMC_CLASS_IAF, PMC_CLASS_TSC, PMC_CLASS_UCF, PMC_CLASS_UCP); PMC_MDEP_TABLE(k7, K7, PMC_CLASS_SOFT, PMC_CLASS_TSC); PMC_MDEP_TABLE(k8, K8, PMC_CLASS_SOFT, PMC_CLASS_TSC); @@ -257,10 +287,15 @@ PMC_CLASS_TABLE_DESC(core, IAP, core, iap); PMC_CLASS_TABLE_DESC(core2, IAP, core2, iap); PMC_CLASS_TABLE_DESC(corei7, IAP, corei7, iap); +PMC_CLASS_TABLE_DESC(haswell, IAP, haswell, iap); +PMC_CLASS_TABLE_DESC(ivybridge, IAP, ivybridge, iap); +PMC_CLASS_TABLE_DESC(ivybridge_xeon, IAP, ivybridge_xeon, iap); PMC_CLASS_TABLE_DESC(sandybridge, IAP, sandybridge, iap); +PMC_CLASS_TABLE_DESC(sandybridge_xeon, IAP, sandybridge_xeon, iap); PMC_CLASS_TABLE_DESC(westmere, IAP, westmere, iap); PMC_CLASS_TABLE_DESC(ucf, UCF, ucf, ucf); PMC_CLASS_TABLE_DESC(corei7uc, UCP, corei7uc, ucp); +PMC_CLASS_TABLE_DESC(haswelluc, UCP, haswelluc, ucp); PMC_CLASS_TABLE_DESC(sandybridgeuc, UCP, sandybridgeuc, ucp); PMC_CLASS_TABLE_DESC(westmereuc, UCP, westmereuc, ucp); #endif @@ -362,7 +397,7 @@ /* Event masks for events */ struct pmc_masks { const char *pm_name; - const uint32_t pm_value; + const uint64_t pm_value; }; #define PMCMASK(N,V) { .pm_name = #N, .pm_value = (V) } #define NULLMASK { .pm_name = NULL } @@ -369,7 +404,7 @@ #if defined(__amd64__) || defined(__i386__) static int -pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint32_t *evmask) +pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint64_t *evmask) { const struct pmc_masks *pm; char *q, *r; @@ -558,8 +593,16 @@ #define atom_aliases_without_iaf core2_aliases_without_iaf #define corei7_aliases core2_aliases #define corei7_aliases_without_iaf core2_aliases_without_iaf +#define haswell_aliases core2_aliases +#define haswell_aliases_without_iaf core2_aliases_without_iaf +#define ivybridge_aliases core2_aliases +#define ivybridge_aliases_without_iaf core2_aliases_without_iaf +#define ivybridge_xeon_aliases core2_aliases +#define ivybridge_xeon_aliases_without_iaf core2_aliases_without_iaf #define sandybridge_aliases core2_aliases #define sandybridge_aliases_without_iaf core2_aliases_without_iaf +#define sandybridge_xeon_aliases core2_aliases +#define sandybridge_xeon_aliases_without_iaf core2_aliases_without_iaf #define westmere_aliases core2_aliases #define westmere_aliases_without_iaf core2_aliases_without_iaf @@ -660,7 +703,7 @@ NULLMASK }; -static struct pmc_masks iap_rsp_mask[] = { +static struct pmc_masks iap_rsp_mask_i7_wm[] = { PMCMASK(DMND_DATA_RD, (1 << 0)), PMCMASK(DMND_RFO, (1 << 1)), PMCMASK(DMND_IFETCH, (1 << 2)), @@ -679,12 +722,68 @@ NULLMASK }; +static struct pmc_masks iap_rsp_mask_sb_sbx_ib[] = { + PMCMASK(REQ_DMND_DATA_RD, (1ULL << 0)), + PMCMASK(REQ_DMND_RFO, (1ULL << 1)), + PMCMASK(REQ_DMND_IFETCH, (1ULL << 2)), + PMCMASK(REQ_WB, (1ULL << 3)), + PMCMASK(REQ_PF_DATA_RD, (1ULL << 4)), + PMCMASK(REQ_PF_RFO, (1ULL << 5)), + PMCMASK(REQ_PF_IFETCH, (1ULL << 6)), + PMCMASK(REQ_PF_LLC_DATA_RD, (1ULL << 7)), + PMCMASK(REQ_PF_LLC_RFO, (1ULL << 8)), + PMCMASK(REQ_PF_LLC_IFETCH, (1ULL << 9)), + PMCMASK(REQ_BUS_LOCKS, (1ULL << 10)), + PMCMASK(REQ_STRM_ST, (1ULL << 11)), + PMCMASK(REQ_OTHER, (1ULL << 15)), + PMCMASK(RES_ANY, (1ULL << 16)), + PMCMASK(RES_SUPPLIER_SUPP, (1ULL << 17)), + PMCMASK(RES_SUPPLIER_LLC_HITM, (1ULL << 18)), + PMCMASK(RES_SUPPLIER_LLC_HITE, (1ULL << 19)), + PMCMASK(RES_SUPPLIER_LLC_HITS, (1ULL << 20)), + PMCMASK(RES_SUPPLIER_LLC_HITF, (1ULL << 21)), + PMCMASK(RES_SUPPLIER_LOCAL, (1ULL << 22)), + PMCMASK(RES_SNOOP_SNP_NONE, (1ULL << 31)), + PMCMASK(RES_SNOOP_SNP_NO_NEEDED,(1ULL << 32)), + PMCMASK(RES_SNOOP_SNP_MISS, (1ULL << 33)), + PMCMASK(RES_SNOOP_HIT_NO_FWD, (1ULL << 34)), + PMCMASK(RES_SNOOP_HIT_FWD, (1ULL << 35)), + PMCMASK(RES_SNOOP_HITM, (1ULL << 36)), + PMCMASK(RES_NON_DRAM, (1ULL << 37)), + NULLMASK +}; + +static struct pmc_masks iap_rsp_mask_haswell[] = { + PMCMASK(REQ_DMND_DATA_RD, (1ULL << 0)), + PMCMASK(REQ_DMND_RFO, (1ULL << 1)), + PMCMASK(REQ_DMND_IFETCH, (1ULL << 2)), + PMCMASK(REQ_PF_DATA_RD, (1ULL << 4)), + PMCMASK(REQ_PF_RFO, (1ULL << 5)), + PMCMASK(REQ_PF_IFETCH, (1ULL << 6)), + PMCMASK(REQ_OTHER, (1ULL << 15)), + PMCMASK(RES_ANY, (1ULL << 16)), + PMCMASK(RES_SUPPLIER_SUPP, (1ULL << 17)), + PMCMASK(RES_SUPPLIER_LLC_HITM, (1ULL << 18)), + PMCMASK(RES_SUPPLIER_LLC_HITE, (1ULL << 19)), + PMCMASK(RES_SUPPLIER_LLC_HITS, (1ULL << 20)), + PMCMASK(RES_SUPPLIER_LLC_HITF, (1ULL << 21)), + PMCMASK(RES_SUPPLIER_LOCAL, (1ULL << 22)), + PMCMASK(RES_SNOOP_SNP_NONE, (1ULL << 31)), + PMCMASK(RES_SNOOP_SNP_NO_NEEDED,(1ULL << 32)), + PMCMASK(RES_SNOOP_SNP_MISS, (1ULL << 33)), + PMCMASK(RES_SNOOP_HIT_NO_FWD, (1ULL << 34)), + PMCMASK(RES_SNOOP_HIT_FWD, (1ULL << 35)), + PMCMASK(RES_SNOOP_HITM, (1ULL << 36)), + PMCMASK(RES_NON_DRAM, (1ULL << 37)), + NULLMASK +}; + static int iap_allocate_pmc(enum pmc_event pe, char *ctrspec, struct pmc_op_pmcallocate *pmc_config) { char *e, *p, *q; - uint32_t cachestate, evmask, rsp; + uint64_t cachestate, evmask, rsp; int count, n; pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE | @@ -750,9 +849,22 @@ } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_COREI7 || cpu_info.pm_cputype == PMC_CPU_INTEL_WESTMERE) { if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { - n = pmc_parse_mask(iap_rsp_mask, p, &rsp); + n = pmc_parse_mask(iap_rsp_mask_i7_wm, p, &rsp); } else return (-1); + } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_SANDYBRIDGE || + cpu_info.pm_cputype == PMC_CPU_INTEL_SANDYBRIDGE_XEON || + cpu_info.pm_cputype == PMC_CPU_INTEL_IVYBRIDGE || + cpu_info.pm_cputype == PMC_CPU_INTEL_IVYBRIDGE_XEON ) { + if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { + n = pmc_parse_mask(iap_rsp_mask_sb_sbx_ib, p, &rsp); + } else + return (-1); + } else if (cpu_info.pm_cputype == PMC_CPU_INTEL_HASWELL) { + if (KWPREFIXMATCH(p, IAP_KW_RSP "=")) { + n = pmc_parse_mask(iap_rsp_mask_haswell, p, &rsp); + } else + return (-1); } else return (-1); @@ -1069,7 +1181,8 @@ { char *e, *p, *q; int n; - uint32_t count, evmask; + uint32_t count; + uint64_t evmask; const struct pmc_masks *pm, *pmask; pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); @@ -1551,7 +1664,8 @@ char *e, *p, *q; int count, has_tag, has_busreqtype, n; - uint32_t evmask, cccractivemask; + uint32_t cccractivemask; + uint64_t evmask; const struct pmc_masks *pm, *pmask; pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); @@ -1979,7 +2093,7 @@ struct pmc_op_pmcallocate *pmc_config) { char *e, *p, *q; - uint32_t evmask; + uint64_t evmask; int count, n; const struct pmc_masks *pm, *pmask; @@ -2203,7 +2317,7 @@ (void)ctrspec; (void)pmc_config; - if (pe < PMC_EV_SOFT_FIRST || pe > PMC_EV_SOFT_LAST) + if ((int)pe < PMC_EV_SOFT_FIRST || (int)pe > PMC_EV_SOFT_LAST) return (-1); pmc_config->pm_caps |= (PMC_CAP_READ | PMC_CAP_WRITE); @@ -2611,10 +2725,26 @@ ev = corei7_event_table; count = PMC_EVENT_TABLE_SIZE(corei7); break; + case PMC_CPU_INTEL_HASWELL: + ev = haswell_event_table; + count = PMC_EVENT_TABLE_SIZE(haswell); + break; + case PMC_CPU_INTEL_IVYBRIDGE: + ev = ivybridge_event_table; + count = PMC_EVENT_TABLE_SIZE(ivybridge); + break; + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + ev = ivybridge_xeon_event_table; + count = PMC_EVENT_TABLE_SIZE(ivybridge_xeon); + break; case PMC_CPU_INTEL_SANDYBRIDGE: ev = sandybridge_event_table; count = PMC_EVENT_TABLE_SIZE(sandybridge); break; + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + ev = sandybridge_xeon_event_table; + count = PMC_EVENT_TABLE_SIZE(sandybridge_xeon); + break; case PMC_CPU_INTEL_WESTMERE: ev = westmere_event_table; count = PMC_EVENT_TABLE_SIZE(westmere); @@ -2636,6 +2766,10 @@ ev = corei7uc_event_table; count = PMC_EVENT_TABLE_SIZE(corei7uc); break; + case PMC_CPU_INTEL_HASWELL: + ev = haswelluc_event_table; + count = PMC_EVENT_TABLE_SIZE(haswelluc); + break; case PMC_CPU_INTEL_SANDYBRIDGE: ev = sandybridgeuc_event_table; count = PMC_EVENT_TABLE_SIZE(sandybridgeuc); @@ -2899,11 +3033,25 @@ pmc_class_table[n++] = &corei7uc_class_table_descr; PMC_MDEP_INIT_INTEL_V2(corei7); break; + case PMC_CPU_INTEL_HASWELL: + pmc_class_table[n++] = &ucf_class_table_descr; + pmc_class_table[n++] = &haswelluc_class_table_descr; + PMC_MDEP_INIT_INTEL_V2(haswell); + break; + case PMC_CPU_INTEL_IVYBRIDGE: + PMC_MDEP_INIT_INTEL_V2(ivybridge); + break; + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + PMC_MDEP_INIT_INTEL_V2(ivybridge_xeon); + break; case PMC_CPU_INTEL_SANDYBRIDGE: pmc_class_table[n++] = &ucf_class_table_descr; pmc_class_table[n++] = &sandybridgeuc_class_table_descr; PMC_MDEP_INIT_INTEL_V2(sandybridge); break; + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + PMC_MDEP_INIT_INTEL_V2(sandybridge_xeon); + break; case PMC_CPU_INTEL_WESTMERE: pmc_class_table[n++] = &ucf_class_table_descr; pmc_class_table[n++] = &westmereuc_class_table_descr; @@ -3030,10 +3178,26 @@ ev = corei7_event_table; evfence = corei7_event_table + PMC_EVENT_TABLE_SIZE(corei7); break; + case PMC_CPU_INTEL_HASWELL: + ev = haswell_event_table; + evfence = haswell_event_table + PMC_EVENT_TABLE_SIZE(haswell); + break; + case PMC_CPU_INTEL_IVYBRIDGE: + ev = ivybridge_event_table; + evfence = ivybridge_event_table + PMC_EVENT_TABLE_SIZE(ivybridge); + break; + case PMC_CPU_INTEL_IVYBRIDGE_XEON: + ev = ivybridge_xeon_event_table; + evfence = ivybridge_xeon_event_table + PMC_EVENT_TABLE_SIZE(ivybridge_xeon); + break; case PMC_CPU_INTEL_SANDYBRIDGE: ev = sandybridge_event_table; evfence = sandybridge_event_table + PMC_EVENT_TABLE_SIZE(sandybridge); break; + case PMC_CPU_INTEL_SANDYBRIDGE_XEON: + ev = sandybridge_xeon_event_table; + evfence = sandybridge_xeon_event_table + PMC_EVENT_TABLE_SIZE(sandybridge_xeon); + break; case PMC_CPU_INTEL_WESTMERE: ev = westmere_event_table; evfence = westmere_event_table + PMC_EVENT_TABLE_SIZE(westmere); @@ -3088,7 +3252,7 @@ } else if (pe == PMC_EV_TSC_TSC) { ev = tsc_event_table; evfence = tsc_event_table + PMC_EVENT_TABLE_SIZE(tsc); - } else if (pe >= PMC_EV_SOFT_FIRST && pe <= PMC_EV_SOFT_LAST) { + } else if ((int)pe >= PMC_EV_SOFT_FIRST && (int)pe <= PMC_EV_SOFT_LAST) { ev = soft_event_table; evfence = soft_event_table + soft_event_info.pm_nevent; } Modified: trunk/lib/libpmc/libpmcinternal.h =================================================================== --- trunk/lib/libpmc/libpmcinternal.h 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/libpmcinternal.h 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2008 Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/lib/libpmc/libpmcinternal.h 185363 2008-11-27 09:00:47Z jkoshy $ */ #ifndef LIBPMC_INTERNAL_H Modified: trunk/lib/libpmc/pmc.3 =================================================================== --- trunk/lib/libpmc/pmc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd November 24, 2008 .Dt PMC 3 Modified: trunk/lib/libpmc/pmc.atom.3 =================================================================== --- trunk/lib/libpmc/pmc.atom.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.atom.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.atom.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd November 12, 2008 .Dt PMC.ATOM 3 Modified: trunk/lib/libpmc/pmc.core.3 =================================================================== --- trunk/lib/libpmc/pmc.core.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.core.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.core.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd November 12, 2008 .Dt PMC.CORE 3 Modified: trunk/lib/libpmc/pmc.core2.3 =================================================================== --- trunk/lib/libpmc/pmc.core2.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.core2.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.core2.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd June 8, 2009 .Dt PMC.CORE2 3 Modified: trunk/lib/libpmc/pmc.corei7.3 =================================================================== --- trunk/lib/libpmc/pmc.corei7.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.corei7.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.corei7.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd March 24, 2010 .Dt PMC.COREI7 3 Modified: trunk/lib/libpmc/pmc.corei7uc.3 =================================================================== --- trunk/lib/libpmc/pmc.corei7uc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.corei7uc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.corei7uc.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd March 24, 2010 .Dt PMC.COREI7UC 3 Modified: trunk/lib/libpmc/pmc.h =================================================================== --- trunk/lib/libpmc/pmc.h 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.h 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2003,2004 Joseph Koshy * All rights reserved. @@ -23,7 +24,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/lib/libpmc/pmc.h 229392 2012-01-03 16:35:00Z fabient $ */ #ifndef _PMC_H_ Added: trunk/lib/libpmc/pmc.haswell.3 =================================================================== --- trunk/lib/libpmc/pmc.haswell.3 (rev 0) +++ trunk/lib/libpmc/pmc.haswell.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,975 @@ +.\" Copyright (c) 2013 Hiren Panchasara +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.haswell.3 249655 2013-04-19 19:28:48Z hiren $ +.\" +.Dd March 22, 2013 +.Dt PMC.HASWELL 3 +.Os +.Sh NAME +.Nm pmc.haswell +.Nd measurement events for +.Tn Intel +.Tn Haswsell +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Haswell" +CPUs contain PMCs conforming to version 2 of the +.Tn Intel +performance measurement architecture. +These CPUs may contain up to two classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_IAP" +.It Li PMC_CLASS_IAF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_IAP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Haswell PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual" +.%T "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C" +.%N "Order Number: 325462-045US" +.%D January 2013 +.%Q "Intel Corporation" +.Re +.Ss HASWELL FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.iaf 3 . +.Ss HASWELL PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta Yes +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta Yes +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta Yes +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li rsp= Ns Ar value +Configure the Off-core Response bits. +.Bl -tag -width indent +.It Li DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full +and partial cachelines as well as demand data page table entry +cacheline reads. Does not count L2 data read prefetches or +instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. +Does not count L2 code read prefetches. +.It Li REQ_WB +Counts the number of writeback (modified to exclusive) transactions. +.It Li REQ_PF_DATA_RD +Counts the number of data cacheline reads generated by L2 prefetchers. +.It Li REQ_PF_RFO +Counts the number of RFO requests generated by L2 prefetchers. +.It Li REQ_PF_IFETCH +Counts the number of code reads generated by L2 prefetchers. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. +.El +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.It Li os +Configure the PMC to count events happening at processor privilege +level 0. +.It Li usr +Configure the PMC to count events occurring at privilege levels 1, 2 +or 3. +.El +.Pp +If neither of the +.Dq Li os +or +.Dq Li usr +qualifiers are specified, the default is to enable both. +.Ss Event Specifiers (Programmable PMCs) +Haswell programmable PMCs support the following events: +.Bl -tag -width indent +.It Li LD_BLOCKS.STORE_FORWARD +.Pq Event 03H , Umask 02H +Loads blocked by overlapping with store buffer that +cannot be forwarded. +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H , Umask 01H +Speculative cache-line split load uops dispatched to +L1D. +.It Li MISALIGN_MEM_REF.STORES +.Pq Event 05H , Umask 02H +Speculative cache-line split Store-address uops +dispatched to L1D. +.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS +.Pq Event 07H , Umask 01H +False dependencies in MOB due to partial compare +on address. +.It Li DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK +.Pq Event 08H , Umask 01H +Misses in all TLB levels that cause a page walk of any +page size. +.It Li DTLB_LOAD_MISSES.WALK_COMPLETED_4K +.Pq Event 08H , Umask 02H +Completed page walks due to demand load misses +that caused 4K page walks in any TLB levels. +.It Li DTLB_LOAD_MISSES.WALK_COMPLETED_2M_4K +.Pq Event 08H , Umask 02H +Completed page walks due to demand load misses +that caused 2M/4M page walks in any TLB levels. +.It Li DTLB_LOAD_MISSES.WALK_COMPLETED +.Pq Event 08H , Umask 0EH +Completed page walks in any TLB of any page size +due to demand load misses +.It Li DTLB_LOAD_MISSES.WALK_DURATION +.Pq Event 08H , Umask 10H +Cycle PMH is busy with a walk. +.It Li DTLB_LOAD_MISSES.STLB_HIT_4K +.Pq Event 08H , Umask 20H +Load misses that missed DTLB but hit STLB (4K). +.It Li DTLB_LOAD_MISSES.STLB_HIT_2M +.Pq Event 08H , Umask 40H +Load misses that missed DTLB but hit STLB (2M). +.It Li DTLB_LOAD_MISSES.STLB_HIT +.Pq Event 08H , Umask 60H +Number of cache load STLB hits. No page walk. +.It Li DTLB_LOAD_MISSES.PDE_CACHE_MISS +.Pq Event 08H , Umask 80H +DTLB demand load misses with low part of linear-to- +physical address translation missed +.It Li INT_MISC.RECOVERY_CYCLES +.Pq Event 0DH , Umask 03H +Cycles waiting to recover after Machine Clears +except JEClear. Set Cmask= 1. +.It Li UOPS_ISSUED.ANY +.Pq Event 0EH , Umask 01H +ncrements each cycle the # of Uops issued by the +RAT to RS. +Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles +of this core. +.It Li UOPS_ISSUED.FLAGS_MERGE +.Pq Event 0EH , Umask 10H +Number of flags-merge uops allocated. Such uops +adds delay. +.It Li UOPS_ISSUED.SLOW_LEA +.Pq Event 0EH , Umask 20H +Number of slow LEA or similar uops allocated. Such +uop has 3 sources (e.g. 2 sources + immediate) +regardless if as a result of LEA instruction or not. +.It Li UOPS_ISSUED.SiNGLE_MUL +.Pq Event 0EH , Umask 40H +Number of multiply packed/scalar single precision +uops allocated. +.It Li L2_RQSTS.DEMAND_DATA_RD_MISS +.Pq Event 24H , Umask 21H +Demand Data Read requests that missed L2, no +rejects. +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H , Umask 41H +Demand Data Read requests that hit L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_DATA_RD +.Pq Event 24H , Umask E1H +Counts any demand and L1 HW prefetch data load +requests to L2. +.It Li L2_RQSTS.RFO_HIT +.Pq Event 24H , Umask 42H +Counts the number of store RFO requests that hit +the L2 cache. +.It Li L2_RQSTS.RFO_MISS +.Pq Event 24H , Umask 22H +Counts the number of store RFO requests that miss +the L2 cache. +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H , Umask E2H +Counts all L2 store RFO requests. +.It Li L2_RQSTS.CODE_RD_HIT +.Pq Event 24H , Umask 44H +Number of instruction fetches that hit the L2 cache. +.It Li L2_RQSTS.CODE_RD_MISS +.Pq Event 24H , Umask 24H +Number of instruction fetches that missed the L2 +cache. +.It Li L2_RQSTS.ALL_DEMAND_MISS +.Pq Event 24H , Umask 27H +Demand requests that miss L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_REFERENCES +.Pq Event 24H , Umask E7H +Demand requests to L2 cache. +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H , Umask E4H +Counts all L2 code requests. +.It Li L2_RQSTS.L2_PF_HIT +.Pq Event 24H , Umask 50H +Counts all L2 HW prefetcher requests that hit L2. +.It Li L2_RQSTS.L2_PF_MISS +.Pq Event 24H , Umask 30H +Counts all L2 HW prefetcher requests that missed +L2. +.It Li L2_RQSTS.ALL_PF +.Pq Event 24H , Umask F8H +Counts all L2 HW prefetcher requests. +.It Li L2_RQSTS.MISS +.Pq Event 24H , Umask 3FH +All requests that missed L2. +.It Li L2_RQSTS.REFERENCES +.Pq Event 24H , Umask FFH +All requests to L2 cache. +.It Li L2_DEMAND_RQSTS.WB_HIT +.Pq Event 27H , Umask 50H +Not rejected writebacks that hit L2 cache +.It Li LONGEST_LAT_CACHE.REFERENCE +.Pq Event 2EH , Umask 4FH +This event counts requests originating from the core +that reference a cache line in the last level cache. +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH , Umask 41H +This event counts each cache miss condition for +references to the last level cache. +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH , Umask 00H +Counts the number of thread cycles while the thread +is not in a halt state. The thread enters the halt state +when it is running the HLT instruction. The core +frequency may change from time to time due to +power or thermal throttling. +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH , Umask 01H +Increments at the frequency of XCLK (100 MHz) +when not halted. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H , Umask 01H +Increments the number of outstanding L1D misses +every cycle. Set Cmaks = 1 and Edge =1 to count +occurrences. +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H , Umask 01H +Miss in all TLB levels causes an page walk of any +page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_COMPLETED_4K +.Pq Event 49H , Umask 02H +Completed page walks due to store misses in one or +more TLB levels of 4K page structure. +.It Li DTLB_STORE_MISSES.WALK_COMPLETED_2M_4M +.Pq Event 49H , Umask 04H +Completed page walks due to store misses in one or +more TLB levels of 2M/4M page structure. +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H , Umask 0EH +Completed page walks due to store miss in any TLB +levels of any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H , Umask 10H +Cycles PMH is busy with this walk. +.It Li DTLB_STORE_MISSES.STLB_HIT_4K +.Pq Event 49H , Umask 20H +Store misses that missed DTLB but hit STLB (4K). +.It Li DTLB_STORE_MISSES.STLB_HIT_2M +.Pq Event 49H , Umask 40H +Store misses that missed DTLB but hit STLB (2M). +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H , Umask 60H +Store operations that miss the first TLB level but hit +the second and do not cause page walks. +.It Li DTLB_STORE_MISSES.PDE_CACHE_MISS +.Pq Event 49H , Umask 80H +DTLB store misses with low part of linear-to-physical +address translation missed. +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH , Umask 01H +Non-SW-prefetch load dispatches that hit fill buffer +allocated for S/W prefetch. +.It Li LOAD_HIT_PRE.HW_PF +.Pq Event 4CH , Umask 02H +Non-SW-prefetch load dispatches that hit fill buffer +allocated for H/W prefetch. +.It Li L1D.REPLACEMENT +.Pq Event 51H , Umask 01H +Counts the number of lines brought into the L1 data +cache. +.It Li MOVE_ELIMINATION.INT_NOT_ELIMINATED +.Pq Event 58H , Umask 04H +Number of integer Move Elimination candidate uops +that were not eliminated. +.It Li MOVE_ELIMINATION.SMID_NOT_ELIMINATED +.Pq Event 58H , Umask 08H +Number of SIMD Move Elimination candidate uops +that were not eliminated. +.It Li MOVE_ELIMINATION.INT_ELIMINATED +.Pq Event 58H , Umask 01H +Unhalted core cycles when the thread is in ring 0. +.It Li MOVE_ELIMINATION.SMID_ELIMINATED +.Pq Event 58H , Umask 02H +Number of SIMD Move Elimination candidate uops +that were eliminated. +.It Li CPL_CYCLES.RING0 +.Pq Event 5CH , Umask 02H +Unhalted core cycles when the thread is in ring 0. +.It Li CPL_CYCLES.RING123 +.Pq Event 5CH , Umask 01H +Unhalted core cycles when the thread is not in ring 0. +.It Li RS_EVENTS.EMPTY_CYCLES +.Pq Event 5EH , Umask 01H +Cycles the RS is empty for the thread. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD +.Pq Event 60H , Umask 01H +Offcore outstanding Demand Data Read transactions +in SQ to uncore. Set Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CORE_RD +.Pq Event 60H , Umask 02H +Offcore outstanding Demand code Read transactions +in SQ to uncore. Set Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO +.Pq Event 60H , Umask 04H +Offcore outstanding RFO store transactions in SQ to +uncore. Set Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD +.Pq Event 60H , Umask 08H +Offcore outstanding cacheable data read +transactions in SQ to uncore. Set Cmask=1 to count +cycles. +.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION +.Pq Event 63H , Umask 01H +Cycles in which the L1D and L2 are locked, due to a +UC lock or split lock. +.It Li LOCK_CYCLES.CACHE_LOCK_DURATION +.Pq Event 63H , Umask 02H +Cycles in which the L1D is locked. +.It Li IDQ.EMPTY +.Pq Event 79H , Umask 02H +Counts cycles the IDQ is empty. +.It Li IDQ.MITE_UOPS +.Pq Event 79H , Umask 04H +Increment each cycle # of uops delivered to IDQ from +MITE path. +Set Cmask = 1 to count cycles. +.It Li IDQ.DSB_UOPS +.Pq Event 79H , Umask 08H +Increment each cycle. # of uops delivered to IDQ +from DSB path. +Set Cmask = 1 to count cycles. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H , Umask 10H +Increment each cycle # of uops delivered to IDQ +when MS_busy by DSB. Set Cmask = 1 to count +cycles. Add Edge=1 to count # of delivery. +.It Li IDQ.MS_MITE_UOPS +.Pq Event 79H , Umask 20H +ncrement each cycle # of uops delivered to IDQ +when MS_busy by MITE. Set Cmask = 1 to count +cycles. +.It Li IDQ.MS_UOPS +.Pq Event 79H , Umask 30H +Increment each cycle # of uops delivered to IDQ from +MS by either DSB or MITE. Set Cmask = 1 to count +cycles. +.It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered at least one uops. Set +Cmask = 1. +.It Li IDQ.ALL_DSB_CYCLES_4_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered four uops. Set Cmask +=4. +.It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered at least one uops. Set +Cmask = 1. +.It Li IDQ.ALL_MITE_CYCLES_4_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered four uops. Set Cmask +=4. +.It Li IDQ.MITE_ALL_UOPS +.Pq Event 79H , Umask 3CH +# of uops delivered to IDQ from any path. +.It Li ICACHE.MISSES +.Pq Event 80H , Umask 02H +Number of Instruction Cache, Streaming Buffer and +Victim Cache Misses. Includes UC accesses. +.It Li ITLB_MISSES.MISS_CAUSES_A_WALK +.Pq Event 85H , Umask 01H +Misses in ITLB that causes a page walk of any page +size. +.It Li ITLB_MISSES.WALK_COMPLETED_4K +.Pq Event 85H , Umask 02H +Completed page walks due to misses in ITLB 4K page +entries. +.It Li TLB_MISSES.WALK_COMPLETED_2M_4M +.Pq Event 85H , Umask 04H +Completed page walks due to misses in ITLB 2M/4M +page entries. +.It Li ITLB_MISSES.WALK_COMPLETED +.Pq Event 85H , Umask 0EH +Completed page walks in ITLB of any page size. +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H , Umask 10H +Cycle PMH is busy with a walk. +.It Li ITLB_MISSES.STLB_HIT_4K +.Pq Event 85H , Umask 20H +ITLB misses that hit STLB (4K). +.It Li ITLB_MISSES.STLB_HIT_2M +.Pq Event 85H , Umask 40H +ITLB misses that hit STLB (2K). +.It Li ITLB_MISSES.STLB_HIT +.Pq Event 85H , Umask 60H +TLB misses that hit STLB. No page walk. +.It Li ILD_STALL.LCP +.Pq Event 87H , Umask 01H +Stalls caused by changing prefix length of the +instruction. +.It Li ILD_STALL.IQ_FULL +.Pq Event 87H , Umask 04H +Stall cycles due to IQ is full. +.It Li BR_INST_EXEC.COND +.Pq Event 88H , Umask 01H +Qualify conditional near branch instructions +executed, but not necessarily retired. +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H , Umask 02H +Qualify all unconditional near branch instructions +excluding calls and indirect branches. +.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 88H , Umask 04H +Qualify executed indirect near branch instructions +that are not calls nor returns. +.It Li BR_INST_EXEC.RETURN_NEAR +.Pq Event 88H , Umask 08H +Qualify indirect near branches that have a return +mnemonic. +.It Li BR_INST_EXEC.DIRECT_NEAR_CALL +.Pq Event 88H , Umask 10H +Qualify unconditional near call branch instructions, +excluding non call branch, executed. +.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL +.Pq Event 88H , Umask 20H +Qualify indirect near calls, including both register and +memory indirect, executed. +.It Li BR_INST_EXEC.NONTAKEN +.Pq Event 88H , Umask 40H +Qualify non-taken near branches executed. +.It Li BR_INST_EXEC.TAKEN +.Pq Event 88H , Umask 80H +Qualify taken near branches executed. Must combine +with 01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_INST_EXEC.ALL_BRANCHES +.Pq Event 88H , Umask FFH +Counts all near executed branches (not necessarily +retired). +.It Li BR_MISP_EXEC.COND +.Pq Event 89H , Umask 01H +Qualify conditional near branch instructions +mispredicted. +.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 89H , Umask 04H +Qualify mispredicted indirect near branch +instructions that are not calls nor returns. +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H , Umask 08H +Qualify mispredicted indirect near branches that +have a return mnemonic. +.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL +.Pq Event 89H , Umask 10H +Qualify mispredicted unconditional near call branch +instructions, excluding non call branch, executed. +.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL +.Pq Event 89H , Umask 20H +Qualify mispredicted indirect near calls, including +both register and memory indirect, executed. +.It Li BR_MISP_EXEC.NONTAKEN +.Pq Event 89H , Umask 40H +Qualify mispredicted non-taken near branches +executed. +.It Li BR_MISP_EXEC.TAKEN +.Pq Event 89H , Umask 80H +Qualify mispredicted taken near branches executed. +Must combine with 01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_MISP_EXEC.ALL_BRANCHES +.Pq Event 89H , Umask FFH +Counts all near executed branches (not necessarily +retired). +.It Li IDQ_UOPS_NOT_DELIVERED.CORE +.Pq Event 9CH , Umask 01H +Count number of non-delivered uops to RAT per +thread. +.It Li UOPS_EXECUTED_PORT.PORT_0 +.Pq Event A1H , Umask 01H +Cycles which a Uop is dispatched on port 0 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_1 +.Pq Event A1H , Umask 02H +Cycles which a Uop is dispatched on port 1 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_2 +.Pq Event A1H , Umask 04H +Cycles which a Uop is dispatched on port 2 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_3 +.Pq Event A1H , Umask 08H +Cycles which a Uop is dispatched on port 3 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_4 +.Pq Event A1H , Umask 10H +Cycles which a Uop is dispatched on port 4 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_5 +.Pq Event A1H , Umask 20H +Cycles which a Uop is dispatched on port 5 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_6 +.Pq Event A1H , Umask 40H +Cycles which a Uop is dispatched on port 6 in this +thread. +.It Li UOPS_EXECUTED_PORT.PORT_7 +.Pq Event A1H , Umask 80H +Cycles which a Uop is dispatched on port 7 in this +thread. +.It Li RESOURCE_STALLS.ANY +.Pq Event A2H , Umask 01H +Cycles Allocation is stalled due to Resource Related +reason. +.It Li RESOURCE_STALLS.RS +.Pq Event A2H , Umask 04H +Cycles stalled due to no eligible RS entry available. +.It Li RESOURCE_STALLS.SB +.Pq Event A2H , Umask 08H +Cycles stalled due to no store buffers available (not +including draining form sync). +.It Li RESOURCE_STALLS.ROB +.Pq Event A2H , Umask 10H +Cycles stalled due to re-order buffer full. +.It Li CYCLE_ACTIVITY.CYCLES_L2_PENDING +.Pq Event A3H , Umask 01H +Cycles with pending L2 miss loads. Set Cmask=2 to +count cycle. +.It Li CYCLE_ACTIVITY.CYCLES_LDM_PENDING +.Pq Event A3H , Umask 02H +Cycles with pending memory loads. Set Cmask=2 to +count cycle. +.It Li CYCLE_ACTIVITY.STALLS_L2_PENDING +.Pq Event A3H , Umask 05H +Number of loads missed L2. +.It Li CYCLE_ACTIVITY.CYCLES_L1D_PENDING +.Pq Event A3H , Umask 08H +Cycles with pending L1 cache miss loads. Set +Cmask=8 to count cycle. +.It Li ITLB.ITLB_FLUSH +.Pq Event AEH , Umask 01H +Counts the number of ITLB flushes, includes +4k/2M/4M pages. +.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD +.Pq Event B0H , Umask 01H +Demand data read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_CODE_RD +.Pq Event B0H , Umask 02H +Demand code read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H , Umask 04H +Demand RFO read requests sent to uncore, including +regular RFOs, locks, ItoM. +.It Li OFFCORE_REQUESTS.ALL_DATA_RD +.Pq Event B0H , Umask 08H +Data read requests sent to uncore (demand and +prefetch). +.It Li UOPS_EXECUTED.CORE +.Pq Event B1H , Umask 02H +Counts total number of uops to be executed per-core +each cycle. +.It Li OFF_CORE_RESPONSE_0 +.Pq Event B7H , Umask 01H +Requires MSR 01A6H +.It Li OFF_CORE_RESPONSE_1 +.Pq Event BBH , Umask 01H +Requires MSR 01A7H +.It Li PAGE_WALKER_LOADS.DTLB_L1 +.Pq Event BCH , Umask 11H +Number of DTLB page walker loads that hit in the +L1+FB. +.It Li PAGE_WALKER_LOADS.ITLB_L1 +.Pq Event BCH , Umask 21H +Number of ITLB page walker loads that hit in the +L1+FB. +.It Li PAGE_WALKER_LOADS.DTLB_L2 +.Pq Event BCH , Umask 12H +Number of DTLB page walker loads that hit in the L2. +.It Li PAGE_WALKER_LOADS.ITLB_L2 +.Pq Event BCH , Umask 22H +Number of ITLB page walker loads that hit in the L2. +.It Li PAGE_WALKER_LOADS.DTLB_L3 +.Pq Event BCH , Umask 14H +Number of DTLB page walker loads that hit in the L3. +.It Li PAGE_WALKER_LOADS.ITLB_L3 +.Pq Event BCH , Umask 24H +Number of ITLB page walker loads that hit in the L3. +.It Li PAGE_WALKER_LOADS.DTLB_MEMORY +.Pq Event BCH , Umask 18H +Number of DTLB page walker loads from memory. +.It Li PAGE_WALKER_LOADS.ITLB_MEMORY +.Pq Event BCH , Umask 28H +Number of ITLB page walker loads from memory. +.It Li TLB_FLUSH.DTLB_THREAD +.Pq Event BDH , Umask 01H +DTLB flush attempts of the thread-specific entries. +.It Li TLB_FLUSH.STLB_ANY +.Pq Event BDH , Umask 20H +Count number of STLB flush attempts. +.It Li INST_RETIRED.ANY_P +.Pq Event C0H , Umask 00H +Number of instructions at retirement. +.It Li INST_RETIRED.ALL +.Pq Event C0H , Umask 01H +Precise instruction retired event with HW to reduce +effect of PEBS shadow in IP distribution. +.It Li OTHER_ASSISTS.AVX_TO_SSE +.Pq Event C1H , Umask 08H +Number of transitions from AVX-256 to legacy SSE +when penalty applicable. +.It Li OTHER_ASSISTS.SSE_TO_AVX +.Pq Event C1H , Umask 10H +Number of transitions from SSE to AVX-256 when +penalty applicable. +.It Li OTHER_ASSISTS.ANY_WB_ASSIST +.Pq Event C1H , Umask 40H +Number of microcode assists invoked by HW upon +uop writeback. +.It Li UOPS_RETIRED.ALL +.Pq Event C2H , Umask 01H +Counts the number of micro-ops retired, Use +cmask=1 and invert to count active cycles or stalled +cycles. +.It Li UOPS_RETIRED.RETIRE_SLOTS +.Pq Event C2H , Umask 02H +Counts the number of retirement slots used each +cycle. +.It Li MACHINE_CLEARS.MEMORY_ORDERING +.Pq Event C3H , Umask 02H +Counts the number of machine clears due to memory +order conflicts. +.It Li MACHINE_CLEARS.SMC +.Pq Event C3H , Umask 04H +Number of self-modifying-code machine clears +detected. +.It Li MACHINE_CLEARS.MASKMOV +.Pq Event C3H , Umask 20H +Counts the number of executed AVX masked load +operations that refer to an illegal address range with +the mask bits set to 0. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 00H +Branch instructions at retirement. +.It Li BR_INST_RETIRED.CONDITIONAL +.Pq Event C4H , Umask 01H +Counts the number of conditional branch instructions Supports PEBS +retired. +.It Li BR_INST_RETIRED.NEAR_CALL +.Pq Event C4H , Umask 02H +Direct and indirect near call instructions retired. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 04H +Counts the number of branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_RETURN +.Pq Event C4H , Umask 08H +Counts the number of near return instructions +retired. +.It Li BR_INST_RETIRED.NOT_TAKEN +.Pq Event C4H , Umask 10H +Counts the number of not taken branch instructions +retired. + It Li BR_INST_RETIRED.NEAR_TAKEN +.Pq Event C4H , Umask 20H +Number of near taken branches retired. +.It Li BR_INST_RETIRED.FAR_BRANCH +.Pq Event C4H , Umask 40H +Number of far branches retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 00H +Mispredicted branch instructions at retirement +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 01H +Mispredicted conditional branch instructions retired. +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 04H +Mispredicted macro branch instructions retired. +.It Li FP_ASSIST.X87_OUTPUT +.Pq Event CAH , Umask 02H +Number of X87 FP assists due to Output values. +.It Li FP_ASSIST.X87_INPUT +.Pq Event CAH , Umask 04H +Number of X87 FP assists due to input values. +.It Li FP_ASSIST.SIMD_OUTPUT +.Pq Event CAH , Umask 08H +Number of SIMD FP assists due to Output values. +.It Li FP_ASSIST.SIMD_INPUT +.Pq Event CAH , Umask 10H +Number of SIMD FP assists due to input values. +.It Li FP_ASSIST.ANY +.Pq Event CAH , Umask 1EH +Cycles with any input/output SSE* or FP assists. +.It Li ROB_MISC_EVENTS.LBR_INSERTS +.Pq Event CCH , Umask 20H +Count cases of saving new LBR records by hardware. +.It Li MEM_TRANS_RETIRED.LOAD_LATENCY +.Pq Event CDH , Umask 01H +Randomly sampled loads whose latency is above a +user defined threshold. A small fraction of the overall +loads are sampled due to randomization. +.It Li MEM_UOP_RETIRED.LOADS +.Pq Event D0H , Umask 01H +Qualify retired memory uops that are loads. Combine Supports PEBS and +with umask 10H, 20H, 40H, 80H. +.It Li MEM_UOP_RETIRED.STORES +.Pq Event D0H , Umask 02H +Qualify retired memory uops that are stores. +Combine with umask 10H, 20H, 40H, 80H. +.It Li MEM_UOP_RETIRED.STLB_MISS +.Pq Event D0H , Umask 10H +Qualify retired memory uops with STLB miss. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.LOCK +.Pq Event D0H , Umask 20H +Qualify retired memory uops with lock. Must combine Supports PEBS and +with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.SPLIT +.Pq Event D0H , Umask 40H +Qualify retired memory uops with line split. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.ALL +.Pq Event D0H , Umask 80H +Qualify any retired memory uops. Must combine with Supports PEBS and +umask 01H, 02H, to produce counts. +.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT +.Pq Event D1H , Umask 01H +Retired load uops with L1 cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT +.Pq Event D1H , Umask 02H +Retired load uops with L2 cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT +.Pq Event D1H , Umask 04H +Retired load uops with LLC cache hits as data +sources. +.It Li MEM_LOAD_UOPS_RETIRED.L2_MISS +.Pq Event D1H , Umask 10H +Retired load uops missed L2. Unknown data source +excluded. +.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB +.Pq Event D1H , Umask 40H +Retired load uops which data sources were load uops +missed L1 but hit FB due to preceding miss to the +same cache line with data not ready. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS +.Pq Event D2H , Umask 01H +Retired load uops which data sources were LLC hit +and cross-core snoop missed in on-pkg core cache. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT +.Pq Event D2H , Umask 02H +Retired load uops which data sources were LLC and +cross-core snoop hits in on-pkg core cache. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM +.Pq Event D2H , Umask 04H +Retired load uops which data sources were HitM +responses from shared LLC. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE +.Pq Event D2H , Umask 08H +Retired load uops which data sources were hits in +LLC without snoops required. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM +.Pq Event D3H , Umask 01H +Retired load uops which data sources missed LLC but +serviced from local dram. +.It Li BACLEARS.ANY +.Pq Event E6H , Umask 1FH +Number of front end re-steers due to BPU +misprediction. +.It Li L2_TRANS.DEMAND_DATA_RD +.Pq Event F0H , Umask 01H +Demand Data Read requests that access L2 cache. +.It Li L2_TRANS.RFO +.Pq Event F0H , Umask 02H +RFO requests that access L2 cache. +.It Li L2_TRANS.CODE_RD +.Pq Event F0H , Umask 04H +L2 cache accesses when fetching instructions. +.It Li L2_TRANS.ALL_PF +.Pq Event F0H , Umask 08H +Any MLC or LLC HW prefetch accessing L2, including +rejects. +.It Li L2_TRANS.L1D_WB +.Pq Event F0H , Umask 10H +L1D writebacks that access L2 cache. +.It Li L2_TRANS.L2_FILL +.Pq Event F0H , Umask 20H +L2 fill requests that access L2 cache. +.It Li L2_TRANS.L2_WB +.Pq Event F0H , Umask 40H +L2 writebacks that access L2 cache. +.It Li L2_TRANS.ALL_REQUESTS +.Pq Event F0H , Umask 80H +Transactions accessing L2 pipe. +.It Li L2_LINES_IN.I +.Pq Event F1H , Umask 01H +L2 cache lines in I state filling L2. +.It Li L2_LINES_IN.S +.Pq Event F1H , Umask 02H +L2 cache lines in S state filling L2. +.It Li L2_LINES_IN.E +.Pq Event F1H , Umask 04H +L2 cache lines in E state filling L2. +.It Li L2_LINES_IN.ALL +.Pq Event F1H , Umask 07H +L2 cache lines filling L2. +.It Li L2_LINES_OUT.DEMAND_CLEAN +.Pq Event F2H , Umask 05H +Clean L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.DEMAND_DIRTY +.Pq Event F2H , Umask 06H +Dirty L2 cache lines evicted by demand. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.iaf 3 , +.Xr pmc.ucf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.haswelluc 3 , +.Xr pmc.ivybridge 3 , +.Xr pmc.ivybridgexeon 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Haswell +microarchitecture was written by +.An "Hiren Panchasara" +.Aq hiren.panchasara at gmail.com . Property changes on: trunk/lib/libpmc/pmc.haswell.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/lib/libpmc/pmc.haswelluc.3 =================================================================== --- trunk/lib/libpmc/pmc.haswelluc.3 (rev 0) +++ trunk/lib/libpmc/pmc.haswelluc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,237 @@ +.\" Copyright (c) 2013 Hiren Panchasara +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.haswelluc.3 249655 2013-04-19 19:28:48Z hiren $ +.\" +.Dd March 22, 2013 +.Dt PMC.HASWELLUC 3 +.Os +.Sh NAME +.Nm pmc.haswelluc +.Nd uncore measurement events for +.Tn Intel +.Tn Haswell +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Haswell" +CPUs contain PMCs conforming to version 3 of the +.Tn Intel +performance measurement architecture. +These CPUs contain two classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_UCP" +.It Li PMC_CLASS_UCF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_UCP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Haswell PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developers Manual" +.%T "Combined Volumes: 1, 2A, 2B, 2C, 3A, 3B and 3C" +.%N "Order Number: 325462-045US" +.%D January 2013 +.%Q "Intel Corporation" +.Re +.Ss HASWELL UNCORE FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.ucf 3 . +Not all CPUs in this family implement fixed-function counters. +.Ss HASWELL UNCORE PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta \&No +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta \&No +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta \&No +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.El +.Ss Event Specifiers (Programmable PMCs) +Haswell programmable PMCs support the following events: +.Bl -tag -width indent +.It Li UNC_CBO_XSNP_RESPONSE.MISS +.Pq Event 22H , Umask 01H +A snoop misses in some processor core. +.It Li UNC_CBO_XSNP_RESPONSE.INVAL +.Pq Event 22H , Umask 02H +A snoop invalidates a non-modified line in some +processor core. +.It Li UNC_CBO_XSNP_RESPONSE.HIT +.Pq Event 22H , Umask 04H +A snoop hits a non-modified line in some processor +core. +.It Li UNC_CBO_XSNP_RESPONSE.HITM +.Pq Event 22H , Umask 08H +A snoop hits a modified line in some processor core. +.It Li UNC_CBO_XSNP_RESPONSE.INVAL_M +.Pq Event 22H , Umask 10H +A snoop invalidates a modified line in some processor +core. +.It Li UNC_CBO_XSNP_RESPONSE.EXTERNAL_FILTER +.Pq Event 22H , Umask 20H +Filter on cross-core snoops initiated by this Cbox due +to external snoop request. +.It Li UNC_CBO_XSNP_RESPONSE.XCORE_FILTER +.Pq Event 22H , Umask 40H +Filter on cross-core snoops initiated by this Cbox due +to processor core memory request. +.It Li UNC_CBO_XSNP_RESPONSE.EVICTION_FILTER +.Pq Event 22H , Umask 80H +Filter on cross-core snoops initiated by this Cbox due +to LLC eviction. +.It Li UNC_CBO_CACHE_LOOKUP.M +.Pq Event 34H , Umask 01H +LLC lookup request that access cache and found line in +M-state. +.It Li UNC_CBO_CACHE_LOOKUP.ES +.Pq Event 34H , Umask 06H +LLC lookup request that access cache and found line in +E or S state. +.It Li UNC_CBO_CACHE_LOOKUP.I +.Pq Event 34H , Umask 08H +LLC lookup request that access cache and found line in +I-state. +.It Li UNC_CBO_CACHE_LOOKUP.READ_FILTER +.Pq Event 34H , Umask 10H +Filter on processor core initiated cacheable read +requests. Must combine with at least one of 01H, 02H, +04H, 08H. +.It Li UNC_CBO_CACHE_LOOKUP.WRITE_FILTER +.Pq Event 34H , Umask 20H +Filter on processor core initiated cacheable write +requests. Must combine with at least one of 01H, 02H, +04H, 08H. +.It Li UNC_CBO_CACHE_LOOKUP.EXTSNP_FILTER +.Pq Event 34H , Umask 40H +Filter on external snoop requests. Must combine with +at least one of 01H, 02H, 04H, 08H. +.It Li UNC_CBO_CACHE_LOOKUP.ANY_REQUEST_FILTER +.Pq Event 34H , Umask 80H +Filter on any IRQ or IPQ initiated requests including +uncacheable, non-coherent requests. Must combine +with at least one of 01H, 02H, 04H, 08H. +.It Li UNC_ARB_TRK_OCCUPANCY.ALL +.Pq Event 80H , Umask 01H +Counts cycles weighted by the number of requests +waiting for data returning from the memory controller. +Accounts for coherent and non-coherent requests +initiated by IA cores, processor graphic units, or LLC. +.It Li UNC_ARB_TRK_REQUEST.ALL +.Pq Event 81H , Umask 01H +Counts the number of coherent and in-coherent +requests initiated by IA cores, processor graphic units, +or LLC. +.It Li UNC_ARB_TRK_REQUEST.WRITES +.Pq Event 81H , Umask 20H +Counts the number of allocated write entries, include +full, partial, and LLC evictions. +.It Li UNC_ARB_TRK_REQUEST.EVICTIONS +.Pq Event 81H , Umask 80H +Counts the number of LLC evictions allocated. +.It Li UNC_ARB_COH , Umask TRK_OCCUPANCY.ALL +.Pq Event 83H , Umask 01H +Cycles weighted by number of requests pending in +Coherency Tracker. +.It Li UNC_ARB_COH , Umask TRK_REQUEST.ALL +.Pq Event 84H , Umask 01H +Number of requests allocated in Coherency Tracker. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.haswell 3 , +.Xr pmc.iaf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc.ucf 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Haswell +microarchitecture was added by +.An "Hiren Panchasara" +.Aq hiren.panchasara at gmail.com . Property changes on: trunk/lib/libpmc/pmc.haswelluc.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Modified: trunk/lib/libpmc/pmc.iaf.3 =================================================================== --- trunk/lib/libpmc/pmc.iaf.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.iaf.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.iaf.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd November 14, 2008 .Dt PMC.IAF 3 Added: trunk/lib/libpmc/pmc.ivybridge.3 =================================================================== --- trunk/lib/libpmc/pmc.ivybridge.3 (rev 0) +++ trunk/lib/libpmc/pmc.ivybridge.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,882 @@ +.\" Copyright (c) 2012 Fabien Thomas. All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.ivybridge.3 249492 2013-04-15 03:09:59Z hiren $ +.\" +.Dd October 19, 2012 +.Dt PMC.IVYBRIDGE 3 +.Os +.Sh NAME +.Nm pmc.ivybridge +.Nd measurement events for +.Tn Intel +.Tn Ivy Bridge +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Ivy Bridge" +CPUs contain PMCs conforming to version 2 of the +.Tn Intel +performance measurement architecture. +These CPUs may contain up to three classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_IAP" +.It Li PMC_CLASS_IAF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_IAP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Ivy Bridge PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual" +Intel(R) 64 and IA-32 Architectures Software Developers Manual" +.%T "Volume 3B: System Programming Guide, Part 2" +.%N "Order Number: 253669-043US" +.%D May 2012 +.%Q "Intel Corporation" +.Re +.Ss IVYBRIDGE FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.iaf 3 . +.Ss IVYBRIDGE PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta Yes +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta Yes +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta Yes +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li rsp= Ns Ar value +Configure the Off-core Response bits. +.Bl -tag -width indent +.It Li REQ_DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full and partial +cachelines as well as demand data page table entry cacheline reads. Does not +count L2 data read prefetches or instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. +Does not count L2 code read prefetches. +.It Li REQ_WB +Counts the number of writeback (modified to exclusive) transactions. +.It Li REQ_PF_DATA_RD +Counts the number of data cacheline reads generated by L2 prefetchers. +.It Li REQ_PF_RFO +Counts the number of RFO requests generated by L2 prefetchers. +.It Li REQ_PF_IFETCH +Counts the number of code reads generated by L2 prefetchers. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. +.El +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.It Li os +Configure the PMC to count events happening at processor privilege +level 0. +.It Li usr +Configure the PMC to count events occurring at privilege levels 1, 2 +or 3. +.El +.Pp +If neither of the +.Dq Li os +or +.Dq Li usr +qualifiers are specified, the default is to enable both. +.Ss Event Specifiers (Programmable PMCs) +Ivy Bridge programmable PMCs support the following events: +.Bl -tag -width indent +.It Li LD_BLOCKS.STORE_FORWARD +.Pq Event 03H , Umask 02H +loads blocked by overlapping with store buffer that cannot be forwarded . +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H , Umask 01H +Speculative cache-line split load uops dispatched to L1D. +.It Li MISALIGN_MEM_REF.STORES +.Pq Event 05H , Umask 02H +Speculative cache-line split Store- address uops dispatched to L1D. +.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS +.Pq Event 07H , Umask 01H +False dependencies in MOB due to partial compare on address. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK +.Pq Event 08H , Umask 81H +Misses in all TLB levels that cause a page walk of any page size from demand loads. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED +.Pq Event 08H , Umask 82H +Misses in all TLB levels that caused page walk completed of any size by demand loads. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION +.Pq Event 08H , Umask 84H +Cycle PMH is busy with a walk due to demand loads. +.It Li UOPS_ISSUED.ANY +.Pq Event 0EH , Umask 01H +Increments each cycle the # of Uops issued by the RAT to RS. +Set Cmask = 1, Inv = 1to count stalled cycles. +Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles of this core. +.It Li UOPS_ISSUED.FLAGS_MERGE +.Pq Event 0EH , Umask 10H +Number of flags-merge uops allocated. Such uops adds delay. +.It Li UOPS_ISSUED.SLOW_LEA +.Pq Event 0EH , Umask 20H +Number of slow LEA or similar uops allocated. Such uop has 3 sources (e.g. 2 +sources + immediate) regardless if as a result of LEA instruction or not. +.It Li UOPS_ISSUED.SINGLE_MUL +.Pq Event 0EH , Umask 40H +Number of multiply packed/scalar single precision uops allocated. +.It Li ARITH.FPU_DIV_ACTIVE +.Pq Event 14H , Umask 01H +Cycles that the divider is active, includes INT and FP. Set 'edge =1, +cmask=1' to count the number of divides. +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H , Umask 01H +Demand Data Read requests that hit L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_DATA_RD +.Pq Event 24H , Umask 03H +Counts any demand and L1 HW prefetch data load requests to L2. +.It Li L2_RQSTS.RFO_HITS +.Pq Event 24H , Umask 04H +Counts the number of store RFO requests that hit the L2 cache. +.It Li L2_RQSTS.RFO_MISS +.Pq Event 24H , Umask 08H +Counts the number of store RFO requests that miss the L2 cache. +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H , Umask 0CH +Counts all L2 store RFO requests. +.It Li L2_RQSTS.CODE_RD_HIT +.Pq Event 24H , Umask 10H +Number of instruction fetches that hit the L2 cache. +.It Li L2_RQSTS.CODE_RD_MISS +.Pq Event 24H , Umask 20H +Number of instruction fetches that missed the L2 cache. +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H , Umask 30H +Counts all L2 code requests. +.It Li L2_RQSTS.PF_HIT +.Pq Event 24H , Umask 40H +Counts all L2 HW prefetcher requests that hit L2. +.It Li L2_RQSTS.PF_MISS +.Pq Event 24H , Umask 80H +Counts all L2 HW prefetcher requests that missed L2. +.It Li L2_RQSTS.ALL_PF +.Pq Event 24H , Umask C0H +Counts all L2 HW prefetcher requests. +.It Li L2_STORE_LOCK_RQSTS.MISS +.Pq Event 27H , Umask 01H +RFOs that miss cache lines. +.It Li L2_STORE_LOCK_RQSTS.HIT_M +.Pq Event 27H , Umask 08H +RFOs that hit cache lines in M state. +.It Li L2_STORE_LOCK_RQSTS.ALL +.Pq Event 27H , Umask 0FH +RFOs that access cache lines in any state. +.It Li L2_L1D_WB_RQSTS.MISS +.Pq Event 28H , Umask 01H +Not rejected writebacks that missed LLC. +.It Li L2_L1D_WB_RQSTS.HIT_E +.Pq Event 28H , Umask 04H +Not rejected writebacks from L1D to L2 cache lines in E state. +.It Li L2_L1D_WB_RQSTS.HIT_M +.Pq Event 28H , Umask 08H +Not rejected writebacks from L1D to L2 cache lines in M state. +.It Li L2_L1D_WB_RQSTS.ALL +.Pq Event 28H , Umask 0FH +Not rejected writebacks from L1D to L2 cache lines in any state. +.It Li LONGEST_LAT_CACHE.REFERENCE +.Pq Event 2EH , Umask 4FH +This event counts requests originating from the core that reference a cache +line in the last level cache. +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH , Umask 41H +This event counts each cache miss condition for references to the last level +cache. +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH , Umask 00H +Counts the number of thread cycles while the thread is not in a halt state. +The thread enters the halt state when it is running the HLT instruction. The +core frequency may change from time to time due to power or thermal +throttling. +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH , Umask 01H +Increments at the frequency of XCLK (100 MHz) when not halted. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H , Umask 01H +Increments the number of outstanding L1D misses every cycle. Set Cmaks = 1 +and Edge =1 to count occurrences. +Counter 2 only. +Set Cmask = 1 to count cycles. +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H , Umask 01H +Miss in all TLB levels causes an page walk of any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H , Umask 02H +Miss in all TLB levels causes a page walk that completes of any page size +(4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H , Umask 04H +Cycles PMH is busy with this walk. +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H , Umask 10H +Store operations that miss the first TLB level but hit the second and do not +cause page walks. +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH , Umask 01H +Non-SW-prefetch load dispatches that hit fill buffer allocated for S/W prefetch. +.It Li LOAD_HIT_PRE.HW_PF +.Pq Event 4CH , Umask 02H +Non-SW-prefetch load dispatches that hit fill buffer allocated for H/W prefetch. +.It Li L1D.REPLACEMENT +.Pq Event 51H , Umask 01H +Counts the number of lines brought into the L1 data cache. +.It Li MOVE_ELIMINATION.INT_NOT_ELIMINATED +.Pq Event 58H , Umask 01H +Number of integer Move Elimination candidate uops that were not eliminated. +.It Li MOVE_ELIMINATION.SIMD_NOT_ELIMINATED +.Pq Event 58H , Umask 02H +Number of SIMD Move Elimination candidate uops that were not eliminated. +.It Li MOVE_ELIMINATION.INT_ELIMINATED +.Pq Event 58H , Umask 04H +Number of integer Move Elimination candidate uops that were eliminated. +.It Li MOVE_ELIMINATION.SIMD_ELIMINATED +.Pq Event 58H , Umask 08H +Number of SIMD Move Elimination candidate uops that were eliminated. +.It Li CPL_CYCLES.RING0 +.Pq Event 5CH , Umask 01H +Unhalted core cycles when the thread is in ring 0. +Use Edge to count transition. +.It Li CPL_CYCLES.RING123 +.Pq Event 5CH , Umask 02H +Unhalted core cycles when the thread is not in ring 0. +.It Li RS_EVENTS.EMPTY_CYCLES +.Pq Event 5EH , Umask 01H +Cycles the RS is empty for the thread. +.It Li TLB_ACCESS.LOAD_STLB_HIT +.Pq Event 5FH , Umask 01H +Counts load operations that missed 1st level DTLB but hit the 2nd level. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD +.Pq Event 60H , Umask 01H +Offcore outstanding Demand Data Read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD +.Pq Event 60H , Umask 02H +Offcore outstanding Demand Code Read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO +.Pq Event 60H , Umask 04H +Offcore outstanding RFO store transactions in SQ to uncore. Set Cmask=1 to +count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD +.Pq Event 60H , Umask 08H +Offcore outstanding cacheable data read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION +.Pq Event 63H , Umask 01H +Cycles in which the L1D and L2 are locked, due to a UC lock or split lock. +.It Li LOCK_CYCLES.CACHE_LOCK_DURATION +.Pq Event 63H , Umask 02H +Cycles in which the L1D is locked. +.It Li IDQ.EMPTY +.Pq Event 79H , Umask 02H +Counts cycles the IDQ is empty. +.It Li IDQ.MITE_UOPS +.Pq Event 79H , Umask 04H +Increment each cycle # of uops delivered to IDQ from MITE path. +Can combine Umask 04H and 20H. +Set Cmask = 1 to count cycles. +.It Li IDQ.DSB_UOPS +.Pq Event 79H , Umask 08H +Increment each cycle. # of uops delivered to IDQ from DSB path. +Can combine Umask 08H and 10H +Set Cmask = 1 to count cycles. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H , Umask 10H +Increment each cycle # of uops delivered to IDQ when MS_busy by DSB. Set +Cmask = 1 to count cycles. Add Edge=1 to count # of delivery. +Can combine Umask 04H, 08H. +.It Li IDQ.MS_MITE_UOPS +.Pq Event 79H , Umask 20H +Increment each cycle # of uops delivered to IDQ when MS_busy by MITE. Set +Cmask = 1 to count cycles. +Can combine Umask 04H, 08H. +.It Li IDQ.MS_UOPS +.Pq Event 79H , Umask 30H +Increment each cycle # of uops delivered to IDQ from MS by either DSB or +MITE. Set Cmask = 1 to count cycles. +Can combine Umask 04H, 08H. +.It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered at least one uops. Set Cmask = 1. +.It Li IDQ.ALL_DSB_CYCLES_4_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered four uops. Set Cmask = 4. +.It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered at least one uops. Set Cmask = 1. +.It Li IDQ.ALL_MITE_CYCLES_4_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered four uops. Set Cmask = 4. +.It Li IDQ.MITE_ALL_UOPS +.Pq Event 79H , Umask 3CH +# of uops delivered to IDQ from any path. +.It Li ICACHE.MISSES +.Pq Event 80H , Umask 02H +Number of Instruction Cache, Streaming Buffer and Victim Cache Misses. +Includes UC accesses. +.It Li ITLB_MISSES.MISS_CAUSES_A_WALK +.Pq Event 85H , Umask 01H +Misses in all ITLB levels that cause page walks. +.It Li ITLB_MISSES.WALK_COMPLETED +.Pq Event 85H , Umask 02H +Misses in all ITLB levels that cause completed page walks. +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H , Umask 04H +Cycle PMH is busy with a walk. +.It Li ITLB_MISSES.STLB_HIT +.Pq Event 85H , Umask 10H +Number of cache load STLB hits. No page walk. +.It Li ILD_STALL.LCP +.Pq Event 87H , Umask 01H +Stalls caused by changing prefix length of the instruction. +.It Li ILD_STALL.IQ_FULL +.Pq Event 87H , Umask 04H +Stall cycles due to IQ is full. +.It Li BR_INST_EXEC.COND +.Pq Event 88H , Umask 01H +Qualify conditional near branch instructions executed, but not necessarily +retired. +Must combine with umask 40H, 80H. +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H , Umask 02H +Qualify all unconditional near branch instructions excluding calls and +indirect branches. +Must combine with umask 80H. +.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 88H , Umask 04H +Qualify executed indirect near branch instructions that are not calls nor +returns. +Must combine with umask 80H. +.It Li BR_INST_EXEC.RETURN_NEAR +.Pq Event 88H , Umask 08H +Qualify indirect near branches that have a return mnemonic. +Must combine with umask 80H. +.It Li BR_INST_EXEC.DIRECT_NEAR_CALL +.Pq Event 88H , Umask 10H +Qualify unconditional near call branch instructions, excluding non call +branch, executed. +Must combine with umask 80H. +.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL +.Pq Event 88H , Umask 20H +Qualify indirect near calls, including both register and memory indirect, +executed. +Must combine with umask 80H. +.It Li BR_INST_EXEC.NONTAKEN +.Pq Event 88H , Umask 40H +Qualify non-taken near branches executed. +Applicable to umask 01H only. +.It Li BR_INST_EXEC.TAKEN +.Pq Event 88H , Umask 80H +Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H, +10H, 20H. +.It Li BR_INST_EXEC.ALL_BRANCHES +.Pq Event 88H , Umask FFH +Counts all near executed branches (not necessarily retired). +.It Li BR_MISP_EXEC.COND +.Pq Event 89H , Umask 01H +Qualify conditional near branch instructions mispredicted. +Must combine with umask 40H, 80H. +.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 89H , Umask 04H +Qualify mispredicted indirect near branch instructions that are not calls +nor returns. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H , Umask 08H +Qualify mispredicted indirect near branches that have a return mnemonic. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL +.Pq Event 89H , Umask 10H +Qualify mispredicted unconditional near call branch instructions, excluding +non call branch, executed. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL +.Pq Event 89H , Umask 20H +Qualify mispredicted indirect near calls, including both register and memory +indirect, executed. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.NONTAKEN +.Pq Event 89H , Umask 40H +Qualify mispredicted non-taken near branches executed. +Applicable to umask 01H only. +.It Li BR_MISP_EXEC.TAKEN +.Pq Event 89H , Umask 80H +Qualify mispredicted taken near branches executed. Must combine with +01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_MISP_EXEC.ALL_BRANCHES +.Pq Event 89H , Umask FFH +Counts all near executed branches (not necessarily retired). +.It Li IDQ_UOPS_NOT_DELIVERED.CORE +.Pq Event 9CH , Umask 01H +Count number of non-delivered uops to RAT per thread. +Use Cmask to qualify uop b/w. +.It Li UOPS_DISPATCHED_PORT.PORT_0 +.Pq Event A1H , Umask 01H +Cycles which a Uop is dispatched on port 0. +.It Li UOPS_DISPATCHED_PORT.PORT_1 +.Pq Event A1H , Umask 02H +Cycles which a Uop is dispatched on port 1. +.It Li UOPS_DISPATCHED_PORT.PORT_2_LD +.Pq Event A1H , Umask 04H +Cycles which a load uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2_STA +.Pq Event A1H , Umask 08H +Cycles which a store address uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2 +.Pq Event A1H , Umask 0CH +Cycles which a Uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_3_LD +.Pq Event A1H , Umask 10H +Cycles which a load uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3_STA +.Pq Event A1H , Umask 20H +Cycles which a store address uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3 +.Pq Event A1H , Umask 30H +Cycles which a Uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_4 +.Pq Event A1H , Umask 40H +Cycles which a Uop is dispatched on port 4. +.It Li UOPS_DISPATCHED_PORT.PORT_5 +.Pq Event A1H , Umask 80H +Cycles which a Uop is dispatched on port 5. +.It Li RESOURCE_STALLS.ANY +.Pq Event A2H , Umask 01H +Cycles Allocation is stalled due to Resource Related reason. +.It Li RESOURCE_STALLS.RS +.Pq Event A2H , Umask 04H +Cycles stalled due to no eligible RS entry available. +.It Li RESOURCE_STALLS.SB +.Pq Event A2H , Umask 08H +Cycles stalled due to no store buffers available. (not including draining +form sync). +.It Li RESOURCE_STALLS.ROB +.Pq Event A2H , Umask 10H +Cycles stalled due to re-order buffer full. +.It Li DSB2MITE_SWITCHES.COUNT +.Pq Event ABH , Umask 01H +Number of DSB to MITE switches. +.It Li DSB2MITE_SWITCHES.PENALTY_CYCLES +.Pq Event ABH , Umask 02H +Cycles DSB to MITE switches caused delay. +.It Li DSB_FILL.EXCEED_DSB_LINES +.Pq Event ACH , Umask 08H +DSB Fill encountered > 3 DSB lines. +.It Li ITLB.ITLB_FLUSH +.Pq Event AEH , Umask 01H +Counts the number of ITLB flushes, includes 4k/2M/4M pages. +.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD +.Pq Event B0H , Umask 01H +Demand data read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_CODE_RD +.Pq Event B0H , Umask 02H +Demand code read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H , Umask 04H +Demand RFO read requests sent to uncore, including regular RFOs, locks, +ItoM. +.It Li OFFCORE_REQUESTS.ALL_DATA_RD +.Pq Event B0H , Umask 08H +Data read requests sent to uncore (demand and prefetch). +.It Li UOPS_EXECUTED.THREAD +.Pq Event B1H , Umask 01H +Counts total number of uops to be executed per-thread each cycle. Set Cmask += 1, INV =1 to count stall cycles. +.It Li UOPS_EXECUTED.CORE +.Pq Event B1H , Umask 02H +Counts total number of uops to be executed per-core each cycle. +Do not need to set ANY. +.It Li OFF_CORE_RESPONSE_0 +.Pq Event B7H , Umask 01H +Off-core Response Performance Monitoring. +PMC0 only. +Requires programming MSR 01A6H. +.It Li OFF_CORE_RESPONSE_1 +.Pq Event BBH , Umask 01H +Off-core Response Performance Monitoring. +PMC3 only. +Requires programming MSR 01A7H. +.It Li TLB_FLUSH.DTLB_THREAD +.Pq Event BDH , Umask 01H +DTLB flush attempts of the thread- specific entries. +.It Li TLB_FLUSH.STLB_ANY +.Pq Event BDH , Umask 20H +Count number of STLB flush attempts. +.It Li INST_RETIRED.ANY_P +.Pq Event C0H , Umask 00H +Number of instructions at retirement. +.It Li INST_RETIRED.ALL +.Pq Event C0H , Umask 01H +Precise instruction retired event with HW to reduce effect of PEBS shadow in +IP distribution. +PMC1 only. +Must quiesce other PMCs. +.It Li OTHER_ASSISTS.AVX_STORE +.Pq Event C1H , Umask 08H +Number of assists associated with 256-bit AVX store operations. +.It Li OTHER_ASSISTS.AVX_TO_SSE +.Pq Event C1H , Umask 10H +Number of transitions from AVX- 256 to legacy SSE when penalty applicable. +.It Li OTHER_ASSISTS.SSE_TO_AVX +.Pq Event C1H , Umask 20H +Number of transitions from SSE to AVX-256 when penalty applicable. +.It Li UOPS_RETIRED.ALL +.Pq Event C2H , Umask 01H +Counts the number of micro-ops retired, Use cmask=1 and invert to count +active cycles or stalled cycles. +Supports PEBS, use Any=1 for core granular. +.It Li UOPS_RETIRED.RETIRE_SLOTS +.Pq Event C2H , Umask 02H +Counts the number of retirement slots used each cycle. +.It Li MACHINE_CLEARS.MEMORY_ORDERING +.Pq Event C3H , Umask 02H +Counts the number of machine clears due to memory order conflicts. +.It Li MACHINE_CLEARS.SMC +.Pq Event C3H , Umask 04H +Number of self-modifying-code machine clears detected. +.It Li MACHINE_CLEARS.MASKMOV +.Pq Event C3H , Umask 20H +Counts the number of executed AVX masked load operations that refer to an +illegal address range with the mask bits set to 0. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 00H +Branch instructions at retirement. +.It Li BR_INST_RETIRED.CONDITIONAL +.Pq Event C4H , Umask 01H +Counts the number of conditional branch instructions retired. +Supports PEBS. +.It Li BR_INST_RETIRED.NEAR_CALL +.Pq Event C4H , Umask 02H +Direct and indirect near call instructions retired. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 04H +Counts the number of branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_RETURN +.Pq Event C4H , Umask 08H +Counts the number of near return instructions retired. +.It Li BR_INST_RETIRED.NOT_TAKEN +.Pq Event C4H , Umask 10H +Counts the number of not taken branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_TAKEN +.Pq Event C4H , Umask 20H +Number of near taken branches retired. +.It Li BR_INST_RETIRED.FAR_BRANCH +.Pq Event C4H , Umask 40H +Number of far branches retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 00H +Mispredicted branch instructions at retirement. +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 01H +Mispredicted conditional branch instructions retired. +Supports PEBS. +.It Li BR_MISP_RETIRED.NEAR_CALL +.Pq Event C5H , Umask 02H +Direct and indirect mispredicted near call instructions retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 04H +Mispredicted macro branch instructions retired. +.It Li BR_MISP_RETIRED.NOT_TAKEN +.Pq Event C5H , Umask 10H +Mispredicted not taken branch instructions retired. +.It Li BR_MISP_RETIRED.TAKEN +.Pq Event C5H , Umask 20H +Mispredicted taken branch instructions retired. +.It Li FP_ASSIST.X87_OUTPUT +.Pq Event CAH , Umask 02H +Number of X87 FP assists due to Output values. +.It Li FP_ASSIST.X87_INPUT +.Pq Event CAH , Umask 04H +Number of X87 FP assists due to input values. +.It Li FP_ASSIST.SIMD_OUTPUT +.Pq Event CAH , Umask 08H +Number of SIMD FP assists due to Output values. +.It Li FP_ASSIST.SIMD_INPUT +.Pq Event CAH , Umask 10H +Number of SIMD FP assists due to input values. +.It Li FP_ASSIST.ANY +.Pq Event CAH , Umask 1EH +Cycles with any input/output SSE* or FP assists. +.It Li ROB_MISC_EVENTS.LBR_INSERTS +.Pq Event CCH , Umask 20H +Count cases of saving new LBR records by hardware. +.It Li MEM_TRANS_RETIRED.LOAD_LATENCY +.Pq Event CDH , Umask 01H +Sample loads with specified latency threshold. +PMC3 only. +Specify threshold in MSR 0x3F6. +.It Li MEM_TRANS_RETIRED.PRECISE_STORE +.Pq Event CDH , Umask 02H +Sample stores and collect precise store operation via PEBS record. +PMC3 only. +.It Li MEM_UOP_RETIRED.LOADS +.Pq Event D0H , Umask 01H +Qualify retired memory uops that are loads. Combine with umask 10H, 20H, +40H, 80H. +Supports PEBS. +.It Li MEM_UOP_RETIRED.STORES +.Pq Event D0H , Umask 02H +Qualify retired memory uops that are stores. Combine with umask 10H, 20H, +40H, 80H. +.It Li MEM_UOP_RETIRED.STLB_MISS +.Pq Event D0H , Umask 10H +Qualify retired memory uops with STLB miss. Must combine with umask 01H, +02H, to produce counts. +.It Li MEM_UOP_RETIRED.LOCK +.Pq Event D0H , Umask 20H +Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to +produce counts. +.It Li MEM_UOP_RETIRED.SPLIT +.Pq Event D0H , Umask 40H +Qualify retired memory uops with line split. Must combine with umask 01H, +02H, to produce counts. +.It Li MEM_UOP_RETIRED.ALL +.Pq Event D0H , Umask 80H +Qualify any retired memory uops. Must combine with umask 01H, 02H, to +produce counts. +.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT +.Pq Event D1H , Umask 01H +Retired load uops with L1 cache hits as data sources. +Supports PEBS. +.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT +.Pq Event D1H , Umask 02H +Retired load uops with L2 cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT +.Pq Event D1H , Umask 04H +Retired load uops with LLC cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB +.Pq Event D1H , Umask 40H +Retired load uops which data sources were load uops missed L1 but hit FB due +to preceding miss to the same cache line with data not ready. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS +.Pq Event D2H , Umask 01H +Retired load uops which data sources were LLC hit and cross-core snoop +missed in on-pkg core cache. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT +.Pq Event D2H , Umask 02H +Retired load uops which data sources were LLC and cross-core snoop hits in +on-pkg core cache. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM +.Pq Event D2H , Umask 04H +Retired load uops which data sources were HitM responses from shared LLC. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE +.Pq Event D2H , Umask 08H +Retired load uops which data sources were hits in LLC without snoops +required. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM +.Pq Event D3H , Umask 01H +Retired load uops which data sources missed LLC but serviced from local +dram. +Supports PEBS. +.It Li L2_TRANS.DEMAND_DATA_RD +.Pq Event F0H , Umask 01H +Demand Data Read requests that access L2 cache. +.It Li L2_TRANS.RFO +.Pq Event F0H , Umask 02H +RFO requests that access L2 cache. +.It Li L2_TRANS.CODE_RD +.Pq Event F0H , Umask 04H +L2 cache accesses when fetching instructions. +.It Li L2_TRANS.ALL_PF +.Pq Event F0H , Umask 08H +Any MLC or LLC HW prefetch accessing L2, including rejects. +.It Li L2_TRANS.L1D_WB +.Pq Event F0H , Umask 10H +L1D writebacks that access L2 cache. +.It Li L2_TRANS.L2_FILL +.Pq Event F0H , Umask 20H +L2 fill requests that access L2 cache. +.It Li L2_TRANS.L2_WB +.Pq Event F0H , Umask 40H +L2 writebacks that access L2 cache. +.It Li L2_TRANS.ALL_REQUESTS +.Pq Event F0H , Umask 80H +Transactions accessing L2 pipe. +.It Li L2_LINES_IN.I +.Pq Event F1H , Umask 01H +L2 cache lines in I state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.S +.Pq Event F1H , Umask 02H +L2 cache lines in S state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.E +.Pq Event F1H , Umask 04H +L2 cache lines in E state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.ALL +.Pq Event F1H , Umask 07H +L2 cache lines filling L2. +Counting does not cover rejects. +.It Li L2_LINES_OUT.DEMAND_CLEAN +.Pq Event F2H , Umask 01H +Clean L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.DEMAND_DIRTY +.Pq Event F2H , Umask 02H +Dirty L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.PF_CLEAN +.Pq Event F2H , Umask 04H +Clean L2 cache lines evicted by the MLC prefetcher. +.It Li L2_LINES_OUT.PF_DIRTY +.Pq Event F2H , Umask 08H +Dirty L2 cache lines evicted by the MLC prefetcher. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.iaf 3 , +.Xr pmc.ucf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.ivybridgexeon 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Ivy Bridge +microarchitecture was written by +.An "Fabien Thomas" +.Aq fabient at FreeBSD.org . Property changes on: trunk/lib/libpmc/pmc.ivybridge.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/lib/libpmc/pmc.ivybridgexeon.3 =================================================================== --- trunk/lib/libpmc/pmc.ivybridgexeon.3 (rev 0) +++ trunk/lib/libpmc/pmc.ivybridgexeon.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,911 @@ +.\" Copyright (c) 2013 Hiren Panchasara +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.ivybridgexeon.3 249492 2013-04-15 03:09:59Z hiren $ +.\" +.Dd Jan 25, 2013 +.Dt PMC.IVYBRIDGEXEON 3 +.Os +.Sh NAME +.Nm pmc.ivybridgexeon +.Nd measurement events for +.Tn Intel +.Tn Ivy Bridge Xeon +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Ivy Bridge Xeon" +CPUs contain PMCs conforming to version 2 of the +.Tn Intel +performance measurement architecture. +These CPUs may contain up to three classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_IAP" +.It Li PMC_CLASS_IAF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_IAP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Ivy Bridge Xeon PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual" +.%N "Order Number: 325462-045US" +.%D January 2013 +.%Q "Intel Corporation" +.Re +.Ss IVYBRIDGE FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.iaf 3 . +.Ss IVYBRIDGE PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta Yes +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta Yes +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta Yes +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li rsp= Ns Ar value +Configure the Off-core Response bits. +.Bl -tag -width indent +.It Li REQ_DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full and partial +cachelines as well as demand data page table entry cacheline reads. Does not +count L2 data read prefetches or instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. +Does not count L2 code read prefetches. +.It Li REQ_WB +Counts the number of writeback (modified to exclusive) transactions. +.It Li REQ_PF_DATA_RD +Counts the number of data cacheline reads generated by L2 prefetchers. +.It Li REQ_PF_RFO +Counts the number of RFO requests generated by L2 prefetchers. +.It Li REQ_PF_IFETCH +Counts the number of code reads generated by L2 prefetchers. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. +.El +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.It Li os +Configure the PMC to count events happening at processor privilege +level 0. +.It Li usr +Configure the PMC to count events occurring at privilege levels 1, 2 +or 3. +.El +.Pp +If neither of the +.Dq Li os +or +.Dq Li usr +qualifiers are specified, the default is to enable both. +.Ss Event Specifiers (Programmable PMCs) +Ivy Bridge programmable PMCs support the following events: +.Bl -tag -width indent +.It Li LD_BLOCKS.STORE_FORWARD +.Pq Event 03H , Umask 02H +loads blocked by overlapping with store buffer that cannot be forwarded . +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H , Umask 01H +Speculative cache-line split load uops dispatched to L1D. +.It Li MISALIGN_MEM_REF.STORES +.Pq Event 05H , Umask 02H +Speculative cache-line split Store- address uops dispatched to L1D. +.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS +.Pq Event 07H , Umask 01H +False dependencies in MOB due to partial compare on address. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_MISS_CAUSES_A_WALK +.Pq Event 08H , Umask 81H +Misses in all TLB levels that cause a page walk of any page size from demand loads. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_WALK_COMPLETED +.Pq Event 08H , Umask 82H +Misses in all TLB levels that caused page walk completed of any size by demand loads. +.It Li DTLB_LOAD_MISSES.DEMAND_LD_WALK_DURATION +.Pq Event 08H , Umask 84H +Cycle PMH is busy with a walk due to demand loads. +.It Li UOPS_ISSUED.ANY +.Pq Event 0EH , Umask 01H +Increments each cycle the # of Uops issued by the RAT to RS. +Set Cmask = 1, Inv = 1to count stalled cycles. +Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles of this core. +.It Li UOPS_ISSUED.FLAGS_MERGE +.Pq Event 0EH , Umask 10H +Number of flags-merge uops allocated. Such uops adds delay. +.It Li UOPS_ISSUED.SLOW_LEA +.Pq Event 0EH , Umask 20H +Number of slow LEA or similar uops allocated. Such uop has 3 sources (e.g. 2 +sources + immediate) regardless if as a result of LEA instruction or not. +.It Li UOPS_ISSUED.SINGLE_MUL +.Pq Event 0EH , Umask 40H +Number of multiply packed/scalar single precision uops allocated. +.It Li ARITH.FPU_DIV_ACTIVE +.Pq Event 14H , Umask 01H +Cycles that the divider is active, includes INT and FP. Set 'edge =1, +cmask=1' to count the number of divides. +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H , Umask 01H +Demand Data Read requests that hit L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_DATA_RD +.Pq Event 24H , Umask 03H +Counts any demand and L1 HW prefetch data load requests to L2. +.It Li L2_RQSTS.RFO_HITS +.Pq Event 24H , Umask 04H +Counts the number of store RFO requests that hit the L2 cache. +.It Li L2_RQSTS.RFO_MISS +.Pq Event 24H , Umask 08H +Counts the number of store RFO requests that miss the L2 cache. +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H , Umask 0CH +Counts all L2 store RFO requests. +.It Li L2_RQSTS.CODE_RD_HIT +.Pq Event 24H , Umask 10H +Number of instruction fetches that hit the L2 cache. +.It Li L2_RQSTS.CODE_RD_MISS +.Pq Event 24H , Umask 20H +Number of instruction fetches that missed the L2 cache. +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H , Umask 30H +Counts all L2 code requests. +.It Li L2_RQSTS.PF_HIT +.Pq Event 24H , Umask 40H +Counts all L2 HW prefetcher requests that hit L2. +.It Li L2_RQSTS.PF_MISS +.Pq Event 24H , Umask 80H +Counts all L2 HW prefetcher requests that missed L2. +.It Li L2_RQSTS.ALL_PF +.Pq Event 24H , Umask C0H +Counts all L2 HW prefetcher requests. +.It Li L2_STORE_LOCK_RQSTS.MISS +.Pq Event 27H , Umask 01H +RFOs that miss cache lines. +.It Li L2_STORE_LOCK_RQSTS.HIT_M +.Pq Event 27H , Umask 08H +RFOs that hit cache lines in M state. +.It Li L2_STORE_LOCK_RQSTS.ALL +.Pq Event 27H , Umask 0FH +RFOs that access cache lines in any state. +.It Li L2_L1D_WB_RQSTS.MISS +.Pq Event 28H , Umask 01H +Not rejected writebacks that missed LLC. +.It Li L2_L1D_WB_RQSTS.HIT_E +.Pq Event 28H , Umask 04H +Not rejected writebacks from L1D to L2 cache lines in E state. +.It Li L2_L1D_WB_RQSTS.HIT_M +.Pq Event 28H , Umask 08H +Not rejected writebacks from L1D to L2 cache lines in M state. +.It Li L2_L1D_WB_RQSTS.ALL +.Pq Event 28H , Umask 0FH +Not rejected writebacks from L1D to L2 cache lines in any state. +.It Li LONGEST_LAT_CACHE.REFERENCE +.Pq Event 2EH , Umask 4FH +This event counts requests originating from the core that reference a cache +line in the last level cache. +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH , Umask 41H +This event counts each cache miss condition for references to the last level +cache. +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH , Umask 00H +Counts the number of thread cycles while the thread is not in a halt state. +The thread enters the halt state when it is running the HLT instruction. The +core frequency may change from time to time due to power or thermal +throttling. +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH , Umask 01H +Increments at the frequency of XCLK (100 MHz) when not halted. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H , Umask 01H +Increments the number of outstanding L1D misses every cycle. Set Cmaks = 1 +and Edge =1 to count occurrences. +Counter 2 only. +Set Cmask = 1 to count cycles. +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H , Umask 01H +Miss in all TLB levels causes an page walk of any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H , Umask 02H +Miss in all TLB levels causes a page walk that completes of any page size +(4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H , Umask 04H +Cycles PMH is busy with this walk. +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H , Umask 10H +Store operations that miss the first TLB level but hit the second and do not +cause page walks. +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH , Umask 01H +Non-SW-prefetch load dispatches that hit fill buffer allocated for S/W prefetch. +.It Li LOAD_HIT_PRE.HW_PF +.Pq Event 4CH , Umask 02H +Non-SW-prefetch load dispatches that hit fill buffer allocated for H/W prefetch. +.It Li L1D.REPLACEMENT +.Pq Event 51H , Umask 01H +Counts the number of lines brought into the L1 data cache. +.It Li MOVE_ELIMINATION.INT_NOT_ELIMINATED +.Pq Event 58H , Umask 01H +Number of integer Move Elimination candidate uops that were not eliminated. +.It Li MOVE_ELIMINATION.SIMD_NOT_ELIMINATED +.Pq Event 58H , Umask 02H +Number of SIMD Move Elimination candidate uops that were not eliminated. +.It Li MOVE_ELIMINATION.INT_ELIMINATED +.Pq Event 58H , Umask 04H +Number of integer Move Elimination candidate uops that were eliminated. +.It Li MOVE_ELIMINATION.SIMD_ELIMINATED +.Pq Event 58H , Umask 08H +Number of SIMD Move Elimination candidate uops that were eliminated. +.It Li CPL_CYCLES.RING0 +.Pq Event 5CH , Umask 01H +Unhalted core cycles when the thread is in ring 0. +Use Edge to count transition. +.It Li CPL_CYCLES.RING123 +.Pq Event 5CH , Umask 02H +Unhalted core cycles when the thread is not in ring 0. +.It Li RS_EVENTS.EMPTY_CYCLES +.Pq Event 5EH , Umask 01H +Cycles the RS is empty for the thread. +.It Li DTLB_LOAD_MISSES.STLB_HIT +.Pq Event 5FH , Umask 04H +Counts load operations that missed 1st level DTLB but hit the 2nd level. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD +.Pq Event 60H , Umask 01H +Offcore outstanding Demand Data Read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_CODE_RD +.Pq Event 60H , Umask 02H +Offcore outstanding Demand Code Read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO +.Pq Event 60H , Umask 04H +Offcore outstanding RFO store transactions in SQ to uncore. Set Cmask=1 to +count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD +.Pq Event 60H , Umask 08H +Offcore outstanding cacheable data read transactions in SQ to uncore. Set +Cmask=1 to count cycles. +.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION +.Pq Event 63H , Umask 01H +Cycles in which the L1D and L2 are locked, due to a UC lock or split lock. +.It Li LOCK_CYCLES.CACHE_LOCK_DURATION +.Pq Event 63H , Umask 02H +Cycles in which the L1D is locked. +.It Li IDQ.EMPTY +.Pq Event 79H , Umask 02H +Counts cycles the IDQ is empty. +.It Li IDQ.MITE_UOPS +.Pq Event 79H , Umask 04H +Increment each cycle # of uops delivered to IDQ from MITE path. +Can combine Umask 04H and 20H. +Set Cmask = 1 to count cycles. +.It Li IDQ.DSB_UOPS +.Pq Event 79H , Umask 08H +Increment each cycle. # of uops delivered to IDQ from DSB path. +Can combine Umask 08H and 10H +Set Cmask = 1 to count cycles. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H , Umask 10H +Increment each cycle # of uops delivered to IDQ when MS_busy by DSB. Set +Cmask = 1 to count cycles. Add Edge=1 to count # of delivery. +Can combine Umask 04H, 08H. +.It Li IDQ.MS_MITE_UOPS +.Pq Event 79H , Umask 20H +Increment each cycle # of uops delivered to IDQ when MS_busy by MITE. Set +Cmask = 1 to count cycles. +Can combine Umask 04H, 08H. +.It Li IDQ.MS_UOPS +.Pq Event 79H , Umask 30H +Increment each cycle # of uops delivered to IDQ from MS by either DSB or +MITE. Set Cmask = 1 to count cycles. +Can combine Umask 04H, 08H. +.It Li IDQ.ALL_DSB_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered at least one uops. Set Cmask = 1. +.It Li IDQ.ALL_DSB_CYCLES_4_UOPS +.Pq Event 79H , Umask 18H +Counts cycles DSB is delivered four uops. Set Cmask = 4. +.It Li IDQ.ALL_MITE_CYCLES_ANY_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered at least one uops. Set Cmask = 1. +.It Li IDQ.ALL_MITE_CYCLES_4_UOPS +.Pq Event 79H , Umask 24H +Counts cycles MITE is delivered four uops. Set Cmask = 4. +.It Li IDQ.MITE_ALL_UOPS +.Pq Event 79H , Umask 3CH +# of uops delivered to IDQ from any path. +.It Li ICACHE.MISSES +.Pq Event 80H , Umask 02H +Number of Instruction Cache, Streaming Buffer and Victim Cache Misses. +Includes UC accesses. +.It Li ITLB_MISSES.MISS_CAUSES_A_WALK +.Pq Event 85H , Umask 01H +Misses in all ITLB levels that cause page walks. +.It Li ITLB_MISSES.WALK_COMPLETED +.Pq Event 85H , Umask 02H +Misses in all ITLB levels that cause completed page walks. +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H , Umask 04H +Cycle PMH is busy with a walk. +.It Li ITLB_MISSES.STLB_HIT +.Pq Event 85H , Umask 10H +Number of cache load STLB hits. No page walk. +.It Li ILD_STALL.LCP +.Pq Event 87H , Umask 01H +Stalls caused by changing prefix length of the instruction. +.It Li ILD_STALL.IQ_FULL +.Pq Event 87H , Umask 04H +Stall cycles due to IQ is full. +.It Li BR_INST_EXEC.COND +.Pq Event 88H , Umask 01H +Qualify conditional near branch instructions executed, but not necessarily +retired. +Must combine with umask 40H, 80H. +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H , Umask 02H +Qualify all unconditional near branch instructions excluding calls and +indirect branches. +Must combine with umask 80H. +.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 88H , Umask 04H +Qualify executed indirect near branch instructions that are not calls nor +returns. +Must combine with umask 80H. +.It Li BR_INST_EXEC.RETURN_NEAR +.Pq Event 88H , Umask 08H +Qualify indirect near branches that have a return mnemonic. +Must combine with umask 80H. +.It Li BR_INST_EXEC.DIRECT_NEAR_CALL +.Pq Event 88H , Umask 10H +Qualify unconditional near call branch instructions, excluding non call +branch, executed. +Must combine with umask 80H. +.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL +.Pq Event 88H , Umask 20H +Qualify indirect near calls, including both register and memory indirect, +executed. +Must combine with umask 80H. +.It Li BR_INST_EXEC.NONTAKEN +.Pq Event 88H , Umask 40H +Qualify non-taken near branches executed. +Applicable to umask 01H only. +.It Li BR_INST_EXEC.TAKEN +.Pq Event 88H , Umask 80H +Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H, +10H, 20H. +.It Li BR_INST_EXEC.ALL_BRANCHES +.Pq Event 88H , Umask FFH +Counts all near executed branches (not necessarily retired). +.It Li BR_MISP_EXEC.COND +.Pq Event 89H , Umask 01H +Qualify conditional near branch instructions mispredicted. +Must combine with umask 40H, 80H. +.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 89H , Umask 04H +Qualify mispredicted indirect near branch instructions that are not calls +nor returns. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H , Umask 08H +Qualify mispredicted indirect near branches that have a return mnemonic. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL +.Pq Event 89H , Umask 10H +Qualify mispredicted unconditional near call branch instructions, excluding +non call branch, executed. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL +.Pq Event 89H , Umask 20H +Qualify mispredicted indirect near calls, including both register and memory +indirect, executed. +Must combine with umask 80H. +.It Li BR_MISP_EXEC.NONTAKEN +.Pq Event 89H , Umask 40H +Qualify mispredicted non-taken near branches executed. +Applicable to umask 01H only. +.It Li BR_MISP_EXEC.TAKEN +.Pq Event 89H , Umask 80H +Qualify mispredicted taken near branches executed. Must combine with +01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_MISP_EXEC.ALL_BRANCHES +.Pq Event 89H , Umask FFH +Counts all near executed branches (not necessarily retired). +.It Li IDQ_UOPS_NOT_DELIVERED.CORE +.Pq Event 9CH , Umask 01H +Count number of non-delivered uops to RAT per thread. +Use Cmask to qualify uop b/w. +.It Li UOPS_DISPATCHED_PORT.PORT_0 +.Pq Event A1H , Umask 01H +Cycles which a Uop is dispatched on port 0. +.It Li UOPS_DISPATCHED_PORT.PORT_1 +.Pq Event A1H , Umask 02H +Cycles which a Uop is dispatched on port 1. +.It Li UOPS_DISPATCHED_PORT.PORT_2_LD +.Pq Event A1H , Umask 04H +Cycles which a load uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2_STA +.Pq Event A1H , Umask 08H +Cycles which a store address uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2 +.Pq Event A1H , Umask 0CH +Cycles which a Uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_3_LD +.Pq Event A1H , Umask 10H +Cycles which a load uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3_STA +.Pq Event A1H , Umask 20H +Cycles which a store address uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3 +.Pq Event A1H , Umask 30H +Cycles which a Uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_4 +.Pq Event A1H , Umask 40H +Cycles which a Uop is dispatched on port 4. +.It Li UOPS_DISPATCHED_PORT.PORT_5 +.Pq Event A1H , Umask 80H +Cycles which a Uop is dispatched on port 5. +.It Li RESOURCE_STALLS.ANY +.Pq Event A2H , Umask 01H +Cycles Allocation is stalled due to Resource Related reason. +.It Li RESOURCE_STALLS.RS +.Pq Event A2H , Umask 04H +Cycles stalled due to no eligible RS entry available. +.It Li RESOURCE_STALLS.SB +.Pq Event A2H , Umask 08H +Cycles stalled due to no store buffers available. (not including draining +form sync). +.It Li RESOURCE_STALLS.ROB +.Pq Event A2H , Umask 10H +Cycles stalled due to re-order buffer full. +.It Li CYCLE_ACTIVITY.CYCLES_L2_PENDING +.Pq Event A3H , Umask 01H +Cycles with pending L2 miss loads. Set AnyThread to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_LDM_PENDING +.Pq Event A3H , Umask 02H +Cycles with pending memory loads. Set AnyThread to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_NO_EXECUTE +.Pq Event A3H , Umask 04H +Cycles of dispatch stalls. Set AnyThread to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_L1D_PENDING +.Pq Event A3H , Umask 08H +Cycles with pending L1 cache miss loads. Set AnyThread to count per core. +.It Li DSB2MITE_SWITCHES.COUNT +.Pq Event ABH , Umask 01H +Number of DSB to MITE switches. +.It Li DSB2MITE_SWITCHES.PENALTY_CYCLES +.Pq Event ABH , Umask 02H +Cycles DSB to MITE switches caused delay. +.It Li DSB_FILL.EXCEED_DSB_LINES +.Pq Event ACH , Umask 08H +DSB Fill encountered > 3 DSB lines. +.It Li ITLB.ITLB_FLUSH +.Pq Event AEH , Umask 01H +Counts the number of ITLB flushes, includes 4k/2M/4M pages. +.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD +.Pq Event B0H , Umask 01H +Demand data read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_CODE_RD +.Pq Event B0H , Umask 02H +Demand code read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H , Umask 04H +Demand RFO read requests sent to uncore, including regular RFOs, locks, +ItoM. +.It Li OFFCORE_REQUESTS.ALL_DATA_RD +.Pq Event B0H , Umask 08H +Data read requests sent to uncore (demand and prefetch). +.It Li UOPS_EXECUTED.THREAD +.Pq Event B1H , Umask 01H +Counts total number of uops to be executed per-thread each cycle. Set Cmask += 1, INV =1 to count stall cycles. +.It Li UOPS_EXECUTED.CORE +.Pq Event B1H , Umask 02H +Counts total number of uops to be executed per-core each cycle. +Do not need to set ANY. +.It Li OFF_CORE_RESPONSE_0 +.Pq Event B7H , Umask 01H +Off-core Response Performance Monitoring. +PMC0 only. +Requires programming MSR 01A6H. +.It Li OFF_CORE_RESPONSE_1 +.Pq Event BBH , Umask 01H +Off-core Response Performance Monitoring. +PMC3 only. +Requires programming MSR 01A7H. +.It Li TLB_FLUSH.DTLB_THREAD +.Pq Event BDH , Umask 01H +DTLB flush attempts of the thread- specific entries. +.It Li TLB_FLUSH.STLB_ANY +.Pq Event BDH , Umask 20H +Count number of STLB flush attempts. +.It Li INST_RETIRED.ANY_P +.Pq Event C0H , Umask 00H +Number of instructions at retirement. +.It Li INST_RETIRED.ALL +.Pq Event C0H , Umask 01H +Precise instruction retired event with HW to reduce effect of PEBS shadow in +IP distribution. +PMC1 only. +Must quiesce other PMCs. +.It Li OTHER_ASSISTS.AVX_STORE +.Pq Event C1H , Umask 08H +Number of assists associated with 256-bit AVX store operations. +.It Li OTHER_ASSISTS.AVX_TO_SSE +.Pq Event C1H , Umask 10H +Number of transitions from AVX- 256 to legacy SSE when penalty applicable. +.It Li OTHER_ASSISTS.SSE_TO_AVX +.Pq Event C1H , Umask 20H +Number of transitions from SSE to AVX-256 when penalty applicable. +.It Li UOPS_RETIRED.ALL +.Pq Event C2H , Umask 01H +Counts the number of micro-ops retired, Use cmask=1 and invert to count +active cycles or stalled cycles. +Supports PEBS, use Any=1 for core granular. +.It Li UOPS_RETIRED.RETIRE_SLOTS +.Pq Event C2H , Umask 02H +Counts the number of retirement slots used each cycle. +.It Li MACHINE_CLEARS.MEMORY_ORDERING +.Pq Event C3H , Umask 02H +Counts the number of machine clears due to memory order conflicts. +.It Li MACHINE_CLEARS.SMC +.Pq Event C3H , Umask 04H +Number of self-modifying-code machine clears detected. +.It Li MACHINE_CLEARS.MASKMOV +.Pq Event C3H , Umask 20H +Counts the number of executed AVX masked load operations that refer to an +illegal address range with the mask bits set to 0. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 00H +Branch instructions at retirement. +.It Li BR_INST_RETIRED.CONDITIONAL +.Pq Event C4H , Umask 01H +Counts the number of conditional branch instructions retired. +Supports PEBS. +.It Li BR_INST_RETIRED.NEAR_CALL +.Pq Event C4H , Umask 02H +Direct and indirect near call instructions retired. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 04H +Counts the number of branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_RETURN +.Pq Event C4H , Umask 08H +Counts the number of near return instructions retired. +.It Li BR_INST_RETIRED.NOT_TAKEN +.Pq Event C4H , Umask 10H +Counts the number of not taken branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_TAKEN +.Pq Event C4H , Umask 20H +Number of near taken branches retired. +.It Li BR_INST_RETIRED.FAR_BRANCH +.Pq Event C4H , Umask 40H +Number of far branches retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 00H +Mispredicted branch instructions at retirement. +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 01H +Mispredicted conditional branch instructions retired. +Supports PEBS. +.It Li BR_MISP_RETIRED.NEAR_CALL +.Pq Event C5H , Umask 02H +Direct and indirect mispredicted near call instructions retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 04H +Mispredicted macro branch instructions retired. +.It Li BR_MISP_RETIRED.NOT_TAKEN +.Pq Event C5H , Umask 10H +Mispredicted not taken branch instructions retired. +.It Li BR_MISP_RETIRED.TAKEN +.Pq Event C5H , Umask 20H +Mispredicted taken branch instructions retired. +.It Li FP_ASSIST.X87_OUTPUT +.Pq Event CAH , Umask 02H +Number of X87 FP assists due to Output values. +.It Li FP_ASSIST.X87_INPUT +.Pq Event CAH , Umask 04H +Number of X87 FP assists due to input values. +.It Li FP_ASSIST.SIMD_OUTPUT +.Pq Event CAH , Umask 08H +Number of SIMD FP assists due to Output values. +.It Li FP_ASSIST.SIMD_INPUT +.Pq Event CAH , Umask 10H +Number of SIMD FP assists due to input values. +.It Li FP_ASSIST.ANY +.Pq Event CAH , Umask 1EH +Cycles with any input/output SSE* or FP assists. +.It Li ROB_MISC_EVENTS.LBR_INSERTS +.Pq Event CCH , Umask 20H +Count cases of saving new LBR records by hardware. +.It Li MEM_TRANS_RETIRED.LOAD_LATENCY +.Pq Event CDH , Umask 01H +Sample loads with specified latency threshold. +PMC3 only. +Specify threshold in MSR 0x3F6. +.It Li MEM_TRANS_RETIRED.PRECISE_STORE +.Pq Event CDH , Umask 02H +Sample stores and collect precise store operation via PEBS record. +PMC3 only. +.It Li MEM_UOP_RETIRED.LOADS +.Pq Event D0H , Umask 01H +Qualify retired memory uops that are loads. Combine with umask 10H, 20H, +40H, 80H. +Supports PEBS. +.It Li MEM_UOP_RETIRED.STORES +.Pq Event D0H , Umask 02H +Qualify retired memory uops that are stores. Combine with umask 10H, 20H, +40H, 80H. +.It Li MEM_UOP_RETIRED.STLB_MISS +.Pq Event D0H , Umask 10H +Qualify retired memory uops with STLB miss. Must combine with umask 01H, +02H, to produce counts. +.It Li MEM_UOP_RETIRED.LOCK +.Pq Event D0H , Umask 20H +Qualify retired memory uops with lock. Must combine with umask 01H, 02H, to +produce counts. +.It Li MEM_UOP_RETIRED.SPLIT +.Pq Event D0H , Umask 40H +Qualify retired memory uops with line split. Must combine with umask 01H, +02H, to produce counts. +.It Li MEM_UOP_RETIRED.ALL +.Pq Event D0H , Umask 80H +Qualify any retired memory uops. Must combine with umask 01H, 02H, to +produce counts. +.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT +.Pq Event D1H , Umask 01H +Retired load uops with L1 cache hits as data sources. +Supports PEBS. +.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT +.Pq Event D1H , Umask 02H +Retired load uops with L2 cache hits as data sources. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT +.Pq Event D1H , Umask 04H +Retired load uops whose data source was LLC hit with no snoop required. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_MISS +.Pq Event D1H , Umask 20H +Retired load uops whose data source is LLC miss. +.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB +.Pq Event D1H , Umask 40H +Retired load uops which data sources were load uops missed L1 but hit FB due +to preceding miss to the same cache line with data not ready. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS +.Pq Event D2H , Umask 01H +Retired load uops which data sources were LLC hit and cross-core snoop +missed in on-pkg core cache. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT +.Pq Event D2H , Umask 02H +Retired load uops which data sources were LLC and cross-core snoop hits in +on-pkg core cache. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM +.Pq Event D2H , Umask 04H +Retired load uops which data sources were HitM responses from shared LLC. +.It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE +.Pq Event D2H , Umask 08H +Retired load uops which data sources were hits in LLC without snoops +required. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.LOCAL_DRAM +.Pq Event D3H , Umask 01H +Retired load uops which data sources missed LLC but serviced from local +dram. +Supports PEBS. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_DRAM +.Pq Event D3H , Umask 04H +Retired load uops whose data source was remote DRAM. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_HITM +.Pq Event D3H , Umask 10H +Retired load uops whose data source was remote HITM. +.It Li MEM_LOAD_UOPS_LLC_MISS_RETIRED.REMOTE_FWD +.Pq Event D3H , Umask 20H +Retired load uops whose data source was forwards from a remote cache. +.It Li BACLEARS.ANY +.Pq Event E6H , Umask 1FH +Number of front end re-steers due to BPU misprediction. +.It Li L2_TRANS.DEMAND_DATA_RD +.Pq Event F0H , Umask 01H +Demand Data Read requests that access L2 cache. +.It Li L2_TRANS.RFO +.Pq Event F0H , Umask 02H +RFO requests that access L2 cache. +.It Li L2_TRANS.CODE_RD +.Pq Event F0H , Umask 04H +L2 cache accesses when fetching instructions. +.It Li L2_TRANS.ALL_PF +.Pq Event F0H , Umask 08H +Any MLC or LLC HW prefetch accessing L2, including rejects. +.It Li L2_TRANS.L1D_WB +.Pq Event F0H , Umask 10H +L1D writebacks that access L2 cache. +.It Li L2_TRANS.L2_FILL +.Pq Event F0H , Umask 20H +L2 fill requests that access L2 cache. +.It Li L2_TRANS.L2_WB +.Pq Event F0H , Umask 40H +L2 writebacks that access L2 cache. +.It Li L2_TRANS.ALL_REQUESTS +.Pq Event F0H , Umask 80H +Transactions accessing L2 pipe. +.It Li L2_LINES_IN.I +.Pq Event F1H , Umask 01H +L2 cache lines in I state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.S +.Pq Event F1H , Umask 02H +L2 cache lines in S state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.E +.Pq Event F1H , Umask 04H +L2 cache lines in E state filling L2. +Counting does not cover rejects. +.It Li L2_LINES_IN.ALL +.Pq Event F1H , Umask 07H +L2 cache lines filling L2. +Counting does not cover rejects. +.It Li L2_LINES_OUT.DEMAND_CLEAN +.Pq Event F2H , Umask 01H +Clean L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.DEMAND_DIRTY +.Pq Event F2H , Umask 02H +Dirty L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.PF_CLEAN +.Pq Event F2H , Umask 04H +Clean L2 cache lines evicted by the MLC prefetcher. +.It Li L2_LINES_OUT.PF_DIRTY +.Pq Event F2H , Umask 08H +Dirty L2 cache lines evicted by the MLC prefetcher. +.It Li L2_LINES_OUT.DIRTY_ALL +.Pq Event F2H , Umask 0AH +Dirty L2 cache lines filling the L2. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.iaf 3 , +.Xr pmc.ucf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.ivybridge 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Ivy Bridge Xeon +microarchitecture was written by +.An "Hiren Panchasara" +.Aq hiren.panchasara at gmail.com . Property changes on: trunk/lib/libpmc/pmc.ivybridgexeon.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Modified: trunk/lib/libpmc/pmc.k7.3 =================================================================== --- trunk/lib/libpmc/pmc.k7.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.k7.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.k7.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.K7 3 Modified: trunk/lib/libpmc/pmc.k8.3 =================================================================== --- trunk/lib/libpmc/pmc.k8.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.k8.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.k8.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.K8 3 Modified: trunk/lib/libpmc/pmc.mips.3 =================================================================== --- trunk/lib/libpmc/pmc.mips.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.mips.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.mips.3 234717 2012-04-26 20:11:57Z gjb $ .\" .Dd February 25, 2012 .Dt PMC.MIPS 3 Modified: trunk/lib/libpmc/pmc.p4.3 =================================================================== --- trunk/lib/libpmc/pmc.p4.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.p4.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.p4.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.P4 3 Modified: trunk/lib/libpmc/pmc.p5.3 =================================================================== --- trunk/lib/libpmc/pmc.p5.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.p5.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.p5.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC 3 Modified: trunk/lib/libpmc/pmc.p6.3 =================================================================== --- trunk/lib/libpmc/pmc.p6.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.p6.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.p6.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.P6 3 Modified: trunk/lib/libpmc/pmc.sandybridge.3 =================================================================== --- trunk/lib/libpmc/pmc.sandybridge.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.sandybridge.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -22,14 +22,14 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.sandybridge.3 249492 2013-04-15 03:09:59Z hiren $ .\" -.Dd February 12, 2012 -.Dt PMC.SANDYBRIDGE 3 -.Os +.Dd October 19, 2012 +.Dt PMC.SANDYBRIDGE 3 +.Os .Sh NAME .Nm pmc.sandybridge -.Nd measurement events for +.Nd measurement events for .Tn Intel .Tn Sandy Bridge family CPUs @@ -56,10 +56,10 @@ .El .Pp The number of PMCs available in each class and their widths need to be -determined at run time by calling +determined at run time by calling .Xr pmc_cpuinfo 3 . .Pp -Intel Sandy Bridge PMCs are documented in +Intel Sandy Bridge PMCs are documented in .Rs .%B "Intel(R) 64 and IA-32 Architectures Software Developers Manual" .%T "Volume 3B: System Programming Guide, Part 2" @@ -75,7 +75,7 @@ .Bl -column "PMC_CAP_INTERRUPT" "Support" .It Em Capability Ta Em Support .It PMC_CAP_CASCADE Ta \&No -.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_EDGE Ta Yes .It PMC_CAP_INTERRUPT Ta Yes .It PMC_CAP_INVERT Ta Yes .It PMC_CAP_READ Ta Yes @@ -93,55 +93,80 @@ .It Li rsp= Ns Ar value Configure the Off-core Response bits. .Bl -tag -width indent -.It Li DMND_DATA_RD -Counts the number of demand and DCU prefetch data reads of full -and partial cachelines as well as demand data page table entry -cacheline reads. -Does not count L2 data read prefetches or instruction fetches. -.It Li DMND_RFO -Counts the number of demand and DCU prefetch reads for ownership -(RFO) requests generated by a write to data cacheline. -Does not count L2 RFO. -.It Li DMND_IFETCH -Counts the number of demand and DCU prefetch instruction cacheline -reads. +.It Li REQ_DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full and partial +cachelines as well as demand data page table entry cacheline reads. Does not +count L2 data read prefetches or instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. Does not count L2 code read prefetches. -.It Li WB +.It Li REQ_WB Counts the number of writeback (modified to exclusive) transactions. -.It Li PF_DATA_RD +.It Li REQ_PF_DATA_RD Counts the number of data cacheline reads generated by L2 prefetchers. -.It Li PF_RFO +.It Li REQ_PF_RFO Counts the number of RFO requests generated by L2 prefetchers. -.It Li PF_IFETCH +.It Li REQ_PF_IFETCH Counts the number of code reads generated by L2 prefetchers. -.It Li OTHER -Counts one of the following transaction types, including L3 invalidate, -I/O, full or partial writes, WC or non-temporal stores, CLFLUSH, Fences, -lock, unlock, split lock. -.It Li UNCORE_HIT -L3 Hit: local or remote home requests that hit L3 cache in the uncore -with no coherency actions required (snooping). -.It Li OTHER_CORE_HIT_SNP -L3 Hit: local or remote home requests that hit L3 cache in the uncore -and was serviced by another core with a cross core snoop where no modified -copies were found (clean). -.It Li OTHER_CORE_HITM -L3 Hit: local or remote home requests that hit L3 cache in the uncore -and was serviced by another core with a cross core snoop where modified -copies were found (HITM). -.It Li REMOTE_CACHE_FWD -L3 Miss: local homed requests that missed the L3 cache and was serviced -by forwarded data following a cross package snoop where no modified -copies found. -(Remote home requests are not counted) -.It Li REMOTE_DRAM -L3 Miss: remote home requests that missed the L3 cache and were serviced -by remote DRAM. -.It Li LOCAL_DRAM -L3 Miss: local home requests that missed the L3 cache and were serviced -by local DRAM. -.It Li NON_DRAM -Non-DRAM requests that were serviced by IOH. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. .El .It Li cmask= Ns Ar value Configure the PMC to increment only if the number of configured @@ -177,222 +202,222 @@ Sandy Bridge programmable PMCs support the following events: .Bl -tag -width indent .It Li LD_BLOCKS.DATA_UNKNOWN -.Pq EVENT_03H, Umask 01H +.Pq EVENT_03H, Umask 01H Blocked loads due to store buffer blocks with unknown data. .It Li LD_BLOCKS.STORE_FORWARD -.Pq Event 03H, Umask 02H +.Pq Event 03H, Umask 02H Loads blocked by overlapping with store buffer that cannot be forwarded. .It Li LD_BLOCKS.NO_SR -.Pq Event 03H, Umask 08H +.Pq Event 03H, Umask 08H # of Split loads blocked due to resource not available. -.It Li LD_BLOCKS.ALL_BLOCK -.Pq EVENT_03H, Umask 10H +.It Li LD_BLOCKS.ALL_BLOCK +.Pq EVENT_03H, Umask 10H Number of cases where any load is blocked but has no DCU miss. -.It Li MISALIGN_MEM_REF.LOADS -.Pq Event 05H, Umask 01H +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H, Umask 01H Speculative cache-line split load uops dispatched to L1D. .It Li MISALIGN_MEM_REF.STORES -.Pq Event 05H, Umask 02H +.Pq Event 05H, Umask 02H Speculative cache-line split Store-address uops dispatched to L1D. .It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS -.Pq Event 07H, Umask 01H +.Pq Event 07H, Umask 01H False dependencies in MOB due to partial compare on address. -.It Li LD_BLOCKS_PARTIAL.ALL_STA_BLOCK -.Pq Event 07H, Umask 08H -The number of times that load operations are temporarily blocked because of -older stores, with addresses that are not yet known. +.It Li LD_BLOCKS_PARTIAL.ALL_STA_BLOCK +.Pq Event 07H, Umask 08H +The number of times that load operations are temporarily blocked because of +older stores, with addresses that are not yet known. A load operation may incur more than one block of this type. .It LI DTLB_LOAD_MISSES.MISS_CAUSES_A_WALK -.Pq Event 08H, Umask 01H +.Pq Event 08H, Umask 01H Misses in all TLB levels that cause a page walk of any page size. -.It Li DTLB_LOAD_MISSES.WALK_COMPLETED -.Pq Event 08H, Umask 02H +.It Li DTLB_LOAD_MISSES.WALK_COMPLETED +.Pq Event 08H, Umask 02H Misses in all TLB levels that caused page walk completed of any size. -.It Li DTLB_LOAD_MISSES.WALK_DURATION -.Pq Event 08H, Umask 04H +.It Li DTLB_LOAD_MISSES.WALK_DURATION +.Pq Event 08H, Umask 04H Cycle PMH is busy with a walk. .It Li DTLB_LOAD_MISSES.STLB_HIT -.Pq Event 08H, Umask 10H -Number of cache load STLB hits. +.Pq Event 08H, Umask 10H +Number of cache load STLB hits. No page walk. -.It Li INT_MISC.RECOVERY_CYCLES -.Pq Event 0DH, Umask 03H -Cycles waiting to recover after Machine Clears or JEClear. +.It Li INT_MISC.RECOVERY_CYCLES +.Pq Event 0DH, Umask 03H +Cycles waiting to recover after Machine Clears or JEClear. Set Cmask = 1. Set Edge to count occurrences -.It Li INT_MISC.RAT_STALL_CYCLES -.Pq Event 0DH, Umask 40H +.It Li INT_MISC.RAT_STALL_CYCLES +.Pq Event 0DH, Umask 40H Cycles RAT external stall is sent to IDQ for this thread. .It Li UOPS_ISSUED.ANY -.Pq Event 0EH, Umask 01H -Increments each cycle the # of Uops issued by the RAT to RS. +.Pq Event 0EH, Umask 01H +Increments each cycle the # of Uops issued by the RAT to RS. Set Cmask = 1, Inv = 1, Any= 1 to count stalled cycles of this core. Set Cmask = 1, Inv = 1 to count stalled cycles -.It Li FP_COMP_OPS_EXE.X87 -.Pq Event 10H, Umask 01H +.It Li FP_COMP_OPS_EXE.X87 +.Pq Event 10H, Umask 01H Counts number of X87 uops executed. -.It Li FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE -.Pq Event 10H, Umask 10H +.It Li FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE +.Pq Event 10H, Umask 10H Counts number of SSE* double precision FP packed uops executed. .It Li FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE -.Pq Event 10H, Umask 20H +.Pq Event 10H, Umask 20H Counts number of SSE* single precision FP scalar uops executed. .It Li FP_COMP_OPS_EXE.SSE_PACKED_SINGLE .Pq Event 10H, Umask 40H Counts number of SSE* single precision FP packed uops executed. -.It LiFP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE +.It LiFP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE .Pq Event 10H, Umask 80H Counts number of SSE* double precision FP scalar uops executed. .It Li SIMD_FP_256.PACKED_SINGLE -.Pq Event 11H, Umask 01H +.Pq Event 11H, Umask 01H Counts 256-bit packed single-precision floating-point instructions. .It Li SIMD_FP_256.PACKED_DOUBLE .Pq Event 11H, Umask 02H Counts 256-bit packed double-precision floating-point instructions. .It Li ARITH.FPU_DIV_ACTIVE -.Pq Event 14H, Umask 01H +.Pq Event 14H, Umask 01H Cycles that the divider is active, includes INT and FP. Set 'edge =1, cmask=1' to count the number of divides. -.It Li INSTS_WRITTEN_TO_IQ.INSTS -.Pq Event 17H, Umask 01H +.It Li INSTS_WRITTEN_TO_IQ.INSTS +.Pq Event 17H, Umask 01H Counts the number of instructions written into the IQ every cycle. -.It Li L2_RQSTS.DEMAND_DATA_RD_HIT -.Pq Event 24H, Umask 01H +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H, Umask 01H Demand Data Read requests that hit L2 cache. .It Li L2_RQSTS.ALL_DEMAND_DATA_RD -.Pq Event 24H, Umask 03H +.Pq Event 24H, Umask 03H Counts any demand and L1 HW prefetch data load requests to L2. .It Li L2_RQSTS.RFO_HITS .Pq Event 24H, Umask 04H Counts the number of store RFO requests that hit the L2 cache. -.It Li L2_RQSTS.RFO_MISS +.It Li L2_RQSTS.RFO_MISS .Pq Event 24H, Umask 08H Counts the number of store RFO requests that miss the L2 cache. -.It Li L2_RQSTS.ALL_RFO -.Pq Event 24H, Umask 0CH +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H, Umask 0CH Counts all L2 store RFO requests. -.It Li L2_RQSTS.CODE_RD_HIT +.It Li L2_RQSTS.CODE_RD_HIT .Pq Event 24H, Umask 10H Number of instruction fetches that hit the L2 cache. -.It Li L2_RQSTS.CODE_RD_MISS +.It Li L2_RQSTS.CODE_RD_MISS .Pq Event 24H, Umask 20H Number of instruction fetches that missed the L2 cache. -.It Li L2_RQSTS.ALL_CODE_RD -.Pq Event 24H, Umask 30H +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H, Umask 30H Counts all L2 code requests. -.It Li L2_RQSTS.PF_HIT -.Pq Event 24H, Umask 40H +.It Li L2_RQSTS.PF_HIT +.Pq Event 24H, Umask 40H Requests from L2 Hardware prefetcher that hit L2. -.It Li L2_RQSTS.PF_MISS +.It Li L2_RQSTS.PF_MISS .Pq Event 24H, Umask 80H Requests from L2 Hardware prefetcher that missed L2. -.It Li L2_RQSTS.ALL_PF +.It Li L2_RQSTS.ALL_PF .Pq Event 24H, Umask C0H Any requests from L2 Hardware prefetchers. -.It Li L2_STORE_LOCK_RQSTS.MISS -.Pq Event 27H, Umask 01H +.It Li L2_STORE_LOCK_RQSTS.MISS +.Pq Event 27H, Umask 01H RFOs that miss cache lines. -.It Li L2_STORE_LOCK_RQSTS.HIT_E -.Pq Event 27H, Umask 04H +.It Li L2_STORE_LOCK_RQSTS.HIT_E +.Pq Event 27H, Umask 04H RFOs that hit cache lines in E state. .It Li L2_STORE_LOCK_RQSTS.HIT_M .Pq EVENT_27H, Umask 08H RFOs that hit cache lines in M state. -.It Li L2_STORE_LOCK_RQSTS.ALL -.Pq EVENT_27H, Umask 0FH +.It Li L2_STORE_LOCK_RQSTS.ALL +.Pq EVENT_27H, Umask 0FH RFOs that access cache lines in any state. -.It Li L2_L1D_WB_RQSTS.HIT_E -.Pq Event 28H, Umask 04H +.It Li L2_L1D_WB_RQSTS.HIT_E +.Pq Event 28H, Umask 04H Not rejected writebacks from L1D to L2 cache lines in E state. -.It Li L2_L1D_WB_RQSTS.HIT_M -.Pq Event 28H, Umask 08H +.It Li L2_L1D_WB_RQSTS.HIT_M +.Pq Event 28H, Umask 08H Not rejected writebacks from L1D to L2 cache lines in M state. -.It Li LONGEST_LAT_CACHE.REFERENCE +.It Li LONGEST_LAT_CACHE.REFERENCE .Pq Event 2EH, Umask 4FH -This event counts requests originating from the core that reference a cache +This event counts requests originating from the core that reference a cache line in the last level cache. -.It Li LONGEST_LAT_CACHE.MISS -.Pq Event 2EH, Umask 41H -This event counts each cache miss condition for references to the last level +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH, Umask 41H +This event counts each cache miss condition for references to the last level cache. -.It Li CPU_CLK_UNHALTED.THREAD_P -.Pq Event 3CH, Umask 00H -Counts the number of thread cycles while the thread is not in a halt state. -The thread enters the halt state when it is running the HLT instruction. -The core frequency may change from time to time due to power or thermal +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH, Umask 00H +Counts the number of thread cycles while the thread is not in a halt state. +The thread enters the halt state when it is running the HLT instruction. +The core frequency may change from time to time due to power or thermal throttling. -.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK -.Pq Event 3CH, Umask 01H +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH, Umask 01H Increments at the frequency of XCLK (100 MHz) when not halted. -.It Li L1D_PEND_MISS.PENDING -.Pq Event 48H, Umask 01H -Increments the number of outstanding L1D misses every cycle. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H, Umask 01H +Increments the number of outstanding L1D misses every cycle. Set Cmask = 1 and Edge =1 to count occurrences. Counter 2 only; Set Cmask = 1 to count cycles. -.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK -.Pq Event 49H, Umask 01H Miss in all TLB levels causes an page walk of any +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H, Umask 01H Miss in all TLB levels causes an page walk of any page size (4K/2M/4M/1G). -.It Li DTLB_STORE_MISSES.WALK_COMPLETED -.Pq Event 49H, Umask 02H -Miss in all TLB levels causes a page walk that completes of any page size +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H, Umask 02H +Miss in all TLB levels causes a page walk that completes of any page size (4K/2M/4M/1G). -.It Li DTLB_STORE_MISSES.WALK_DURATION -.Pq Event 49H, Umask 04H +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H, Umask 04H Cycles PMH is busy with this walk. -.It Li DTLB_STORE_MISSES.STLB_HIT -.Pq Event 49H, Umask 10H -Store operations that miss the first TLB level but hit the second and do not +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H, Umask 10H +Store operations that miss the first TLB level but hit the second and do not cause page walks. -.It Li LOAD_HIT_PRE.SW_PF -.Pq Event 4CH, Umask 01H +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH, Umask 01H Not SW-prefetch load dispatches that hit fill buffer allocated for S/W prefetch. -.It Li LOAD_HIT_PER.HW_PF -.Pq Event 4CH, Umask 02H +.It Li LOAD_HIT_PER.HW_PF +.Pq Event 4CH, Umask 02H Not SW-prefetch load dispatches that hit fill buffer allocated for H/W prefetch. -.It Li HW_PRE_REQ.DL1_MISS -.Pq Event 4EH, Umask 02H -Hardware Prefetch requests that miss the L1D cache. -A request is being counted each time it access the cache & miss it, including +.It Li HW_PRE_REQ.DL1_MISS +.Pq Event 4EH, Umask 02H +Hardware Prefetch requests that miss the L1D cache. +A request is being counted each time it access the cache & miss it, including if a block is applicable or if hit the Fill Buffer for example. This accounts for both L1 streamer and IP-based (IPP) HW prefetchers. -.It Li L1D.REPLACEMENT +.It Li L1D.REPLACEMENT .Pq Event 51H, Umask 01H Counts the number of lines brought into the L1 data cache. -.It Li L1D.ALLOCATED_IN_M -.Pq Event 51H, Umask 02H +.It Li L1D.ALLOCATED_IN_M +.Pq Event 51H, Umask 02H Counts the number of allocations of modified L1D cache lines. .It Li L1D.EVICTION .Pq Event 51H, Umask 04H -Counts the number of modified lines evicted from the L1 data cache due to +Counts the number of modified lines evicted from the L1 data cache due to replacement. .It Li L1D.ALL_M_REPLACEMENT -.Pq Event 51H, Umask 08H -Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line +.Pq Event 51H, Umask 08H +Cache lines in M state evicted out of L1D due to Snoop HitM or dirty line replacement. .It Li PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP -.Pq Event 59H, Umask 20H +.Pq Event 59H, Umask 20H Increments the number of flags-merge uops in flight each cycle. Set Cmask = 1 to count cycles. .It Li PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW -.Pq Event 59H, Umask 40H +.Pq Event 59H, Umask 40H Cycles with at least one slow LEA uop allocated. .It Li PARTIAL_RAT_STALLS.MUL_SINGLE_UOP -.Pq Event 59H, Umask 80H +.Pq Event 59H, Umask 80H Number of Multiply packed/scalar single precision uops allocated. -.It Li RESOURCE_STALLS2.ALL_FL_EMPTY -.Pq Event 5BH, Umask 0CH +.It Li RESOURCE_STALLS2.ALL_FL_EMPTY +.Pq Event 5BH, Umask 0CH Cycles stalled due to free list empty. -.It Li RESOURCE_STALLS2.ALL_PRF_CONTROL -.Pq Event 5BH, Umask 0FH +.It Li RESOURCE_STALLS2.ALL_PRF_CONTROL +.Pq Event 5BH, Umask 0FH Cycles stalled due to control structures full for physical registers. -.It Li RESOURCE_STALLS2.BOB_FULL -.Pq Event 5BH, Umask 40H +.It Li RESOURCE_STALLS2.BOB_FULL +.Pq Event 5BH, Umask 40H Cycles Allocator is stalled due to Branch Order Buffer. .It Li RESOURCE_STALLS2.OOO_RSRC -.Pq Event 5BH, Umask 4FH +.Pq Event 5BH, Umask 4FH Cycles stalled due to out of order resources full. .It Li CPL_CYCLES.RING0 -.Pq Event 5CH, Umask 01H +.Pq Event 5CH, Umask 01H Unhalted core cycles when the thread is in ring 0. Use Edge to count transition .It Li CPL_CYCLES.RING123 @@ -399,54 +424,54 @@ .Pq Event 5CH, Umask 02H Unhalted core cycles when the thread is not in ring 0. .It Li RS_EVENTS.EMPTY_CYCLES -.Pq Event 5EH, Umask 01H +.Pq Event 5EH, Umask 01H Cycles the RS is empty for the thread. .It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD -.Pq Event 60H, Umask 01H +.Pq Event 60H, Umask 01H Offcore outstanding Demand Data Read transactions in SQ to uncore. Set Cmask=1 to count cycles. .It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO -.Pq Event 60H, Umask 04H +.Pq Event 60H, Umask 04H Offcore outstanding RFO store transactions in SQ to uncore. Set Cmask=1 to count cycles. .It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD -.Pq Event 60H, Umask 08H +.Pq Event 60H, Umask 08H Offcore outstanding cacheable data read transactions in SQ to uncore. Set Cmask=1 to count cycles. .It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION -.Pq Event 63H, Umask 01H +.Pq Event 63H, Umask 01H Cycles in which the L1D and L2 are locked, due to a UC lock or split lock. .It Li LOCK_CYCLES.CACHE_LOCK_DURATION .Pq Event 63H, Umask 02H Cycles in which the L1D is locked. .It Li IDQ.EMPTY -.Pq Event 79H, Umask 02H +.Pq Event 79H, Umask 02H Counts cycles the IDQ is empty. -.It Li IQD.MITE_UOPS -.Pq Event 79H, Umask 04H -Increment each cycle # of uops delivered to IDQ from MITE path. +.It Li IQD.MITE_UOPS +.Pq Event 79H, Umask 04H +Increment each cycle # of uops delivered to IDQ from MITE path. Set Cmask = 1 to count cycles. Can combine Umask 04H and 20H .It Li IDQ.DSB_UOPS -.Pq Event 79H, Umask 08H -Increment each cycle. -# of uops delivered to IDQ from DSB path. +.Pq Event 79H, Umask 08H +Increment each cycle. +# of uops delivered to IDQ from DSB path. Set Cmask = 1 to count cycles. Can combine Umask 08H and 10H -.It Li IDQ.MS_DSB_UOPS -.Pq Event 79H, Umask 10H -Increment each cycle # of uops delivered to IDQ when MS busy by DSB. -Set Cmask = 1 to count cycles MS is busy. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H, Umask 10H +Increment each cycle # of uops delivered to IDQ when MS busy by DSB. +Set Cmask = 1 to count cycles MS is busy. Set Cmask=1 and Edge=1 to count MS activations. Can combine Umask 08H and 10H .It Li IDQ.MS_MITE_UOPS -.Pq Event 79H, Umask 20H -Increment each cycle # of uops delivered to IDQ when MS is busy by MITE. +.Pq Event 79H, Umask 20H +Increment each cycle # of uops delivered to IDQ when MS is busy by MITE. Set Cmask = 1 to count cycles. Can combine Umask 04H and 20H -.It Li IDQ.MS_UOPS -.Pq Event 79H, Umask 30H -Increment each cycle # of uops delivered to IDQ from MS by either DSB or MITE. +.It Li IDQ.MS_UOPS +.Pq Event 79H, Umask 30H +Increment each cycle # of uops delivered to IDQ from MS by either DSB or MITE. Set Cmask = 1 to count cycles. Can combine Umask 04H, 08H and 30H .It Li ICACHE.MISSES @@ -457,38 +482,38 @@ .Pq Event 85H, Umask 01H Misses in all ITLB levels that cause page walks. .It Li ITLB_MISSES.WALK_COMPLETED -.Pq Event 85H, Umask 02H +.Pq Event 85H, Umask 02H Misses in all ITLB levels that cause completed page walks. -.It Li ITLB_MISSES.WALK_DURATION -.Pq Event 85H, Umask 04H +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H, Umask 04H Cycle PMH is busy with a walk. .It Li ITLB_MISSES.STLB_HIT -.Pq Event 85H, Umask 10H -Number of cache load STLB hits. +.Pq Event 85H, Umask 10H +Number of cache load STLB hits. No page walk. .It Li ILD_STALL.LCP -.Pq Event 87H, Umask 01H +.Pq Event 87H, Umask 01H Stalls caused by changing prefix length of the instruction. .It Li ILD_STALL.IQ_FULL -.Pq Event 87H, Umask 04H +.Pq Event 87H, Umask 04H Stall cycles due to IQ is full. .It Li BR_INST_EXEC.COND -.Pq Event 88H, Umask 01H -Qualify conditional near branch instructions executed, but not necessarily +.Pq Event 88H, Umask 01H +Qualify conditional near branch instructions executed, but not necessarily retired. Must combine with umask 40H, 80H -.It Li BR_INST_EXEC.DIRECT_JMP -.Pq Event 88H, Umask 02H -Qualify all unconditional near branch instructions excluding calls and indirect +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H, Umask 02H +Qualify all unconditional near branch instructions excluding calls and indirect branches. Must combine with umask 80H .It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET -.Pq Event 88H, Umask 04H -Qualify executed indirect near branch instructions that are not calls nor +.Pq Event 88H, Umask 04H +Qualify executed indirect near branch instructions that are not calls nor returns. Must combine with umask 80H .It Li BR_INST_EXEC.RETURN_NEAR -.Pq Event 88H, Umask 08H +.Pq Event 88H, Umask 08H Qualify indirect near branches that have a return mnemonic. Must combine with umask 80H .It Li BR_INST_EXEC.DIRECT_NEAR_CALL @@ -497,49 +522,49 @@ executed. Must combine with umask 80H .It Li BR_INST_EXEC.INDIRECT_NEAR_CALL -.Pq Event 88H, Umask 20H -Qualify indirect near calls, including both register and memory indirect, +.Pq Event 88H, Umask 20H +Qualify indirect near calls, including both register and memory indirect, executed. Must combine with umask 80H .It Li BR_INST_EXEC.NONTAKEN -.Pq Event 88H, Umask 40H +.Pq Event 88H, Umask 40H Qualify non-taken near branches executed. Applicable to umask 01H only .It Li BR_INST_EXEC.TAKEN -.Pq Event 88H, Umask 80H -Qualify taken near branches executed. +.Pq Event 88H, Umask 80H +Qualify taken near branches executed. Must combine with 01H,02H, 04H, 08H, 10H, 20H .It Li BR_INST_EXE.ALL_BRANCHES -.Pq Event 88H, Umask FFH +.Pq Event 88H, Umask FFH Counts all near executed branches (not necessarily retired). .It Li BR_MISP_EXEC.COND -.Pq Event 89H, Umask 01H -Qualify conditional near branch instructions mispredicted. +.Pq Event 89H, Umask 01H +Qualify conditional near branch instructions mispredicted. Must combine with umask 40H, 80H .It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET -.Pq Event 89H, Umask 04H -Qualify mispredicted indirect near branch instructions that are not calls nor +.Pq Event 89H, Umask 04H +Qualify mispredicted indirect near branch instructions that are not calls nor returns. Must combine with umask 80H -.It Li BR_MISP_EXEC.RETURN_NEAR -.Pq Event 89H, Umask 08H +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H, Umask 08H Qualify mispredicted indirect near branches that have a return mnemonic. Must combine with umask 80H .It Li BR_MISP_EXEC.DIRECT_NEAR_CALL -.Pq Event 89H, Umask 10H -Qualify mispredicted unconditional near call branch instructions, excluding non +.Pq Event 89H, Umask 10H +Qualify mispredicted unconditional near call branch instructions, excluding non call branch, executed. Must combine with umask 80H .It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL -.Pq Event 89H, Umask 20H -Qualify mispredicted indirect near calls, including both register and memory +.Pq Event 89H, Umask 20H +Qualify mispredicted indirect near calls, including both register and memory indirect, executed. Must combine with umask 80H .It Li BR_MISP_EXEC.NONTAKEN -.Pq Event 89H, Umask 40H +.Pq Event 89H, Umask 40H Qualify mispredicted non-taken near branches executed. Applicable to umask 01H only -.It Li BR_MISP_EXEC.TAKEN +.It Li BR_MISP_EXEC.TAKEN .Pq Event 89H, Umask 80H Qualify mispredicted taken near branches executed. Must combine with 01H,02H, 04H, 08H, 10H, 20H @@ -547,7 +572,7 @@ .Pq Event 89H, Umask FFH Counts all near executed branches (not necessarily retired). .It Li IDQ_UOPS_NOT_DELIVERED.CORE -.Pq Event 9CH, Umask 01H +.Pq Event 9CH, Umask 01H Count number of non-delivered uops to RAT per thread. Use Cmask to qualify uop b/w .It Li UOPS_DISPATCHED_PORT.PORT_0 @@ -557,28 +582,28 @@ .Pq Event A1H, Umask 02H Cycles which a Uop is dispatched on port 1. .It Li UOPS_DISPATCHED_PORT.PORT_2_LD -.Pq Event A1H, Umask 04H +.Pq Event A1H, Umask 04H Cycles which a load uop is dispatched on port 2. .It Li UOPS_DISPATCHED_PORT.PORT_2_STA .Pq Event A1H, Umask 08H Cycles which a store address uop is dispatched on port 2. .It Li UOPS_DISPATCHED_PORT.PORT_2 -.Pq Event A1H, Umask 0CH +.Pq Event A1H, Umask 0CH Cycles which a Uop is dispatched on port 2. .It Li UOPS_DISPATCHED_PORT.PORT_3_LD -.Pq Event A1H, Umask 10H +.Pq Event A1H, Umask 10H Cycles which a load uop is dispatched on port 3. -.It Li UOPS_DISPATCHED_PORT.PORT_3_STA -.Pq Event A1H, Umask 20H +.It Li UOPS_DISPATCHED_PORT.PORT_3_STA +.Pq Event A1H, Umask 20H Cycles which a store address uop is dispatched on port 3. -.It Li UOPS_DISPATCHED_PORT.PORT_3 -.Pq Event A1H, Umask 30H +.It Li UOPS_DISPATCHED_PORT.PORT_3 +.Pq Event A1H, Umask 30H .Pq Cycles which a Uop is dispatched on port 3. -.It Li UOPS_DISPATCHED_PORT.PORT_4 +.It Li UOPS_DISPATCHED_PORT.PORT_4 .Pq Event A1H, Umask 40H Cycles which a Uop is dispatched on port 4. .It Li UOPS_DISPATCHED_PORT.PORT_5 -.Pq Event A1H, Umask 80H +.Pq Event A1H, Umask 80H Cycles which a Uop is dispatched on port 5. .It Li RESOURCE_STALLS.ANY .Pq Event A2H, Umask 01H @@ -587,30 +612,30 @@ .Pq Event A2H, Umask 02H Counts the cycles of stall due to lack of load buffers. .It Li RESOURCE_STALLS.LB -.Pq Event A2H, Umask 04H +.Pq Event A2H, Umask 04H Cycles stalled due to no eligible RS entry available. .It Li RESOURCE_STALLS.SB -.Pq Event A2H, Umask 08H -Cycles stalled due to no store buffers available. +.Pq Event A2H, Umask 08H +Cycles stalled due to no store buffers available. (not including draining form sync) .It Li RESOURCE_STALLS.ROB .Pq Event A2H, Umask 10H Cycles stalled due to re-order buffer full. .It Li RESOURCE_STALLS.FCSW -.Pq Event A2H, Umask 20H +.Pq Event A2H, Umask 20H Cycles stalled due to writing the FPU control word. .It Li RESOURCE_STALLS.MXCSR .Pq Event A2H, Umask 40H -Cycles stalled due to the MXCSR register rename occurring to close to a previous +Cycles stalled due to the MXCSR register rename occurring to close to a previous MXCSR rename. .It Li RESOURCE_STALLS.OTHER -.Pq Event A2H, Umask 80H +.Pq Event A2H, Umask 80H Cycles stalled while execution was stalled due to other resource issues. .It Li DSB2MITE_SWITCHES.COUNT .Pq Event ABH, Umask 01H Number of DSB to MITE switches. .It Li DSB2MITE_SWITCHES.PENALTY_CYCLES -.Pq Event ABH, Umask 02H +.Pq Event ABH, Umask 02H Cycles DSB to MITE switches caused delay. .It Li DSB_FILL.OTHER_CANCEL .Pq Event ACH, Umask 02H @@ -619,43 +644,43 @@ .Pq Event ACH, Umask 08H DSB Fill encountered > 3 DSB lines. .It Li DSB_FILL.ALL_CANCEL -.Pq Event ACH, Umask 0AH -Cases of cancelling valid Decode Stream Buffer (DSB) fill not because of exceeding +.Pq Event ACH, Umask 0AH +Cases of cancelling valid Decode Stream Buffer (DSB) fill not because of exceeding way limit. .It Li ITLB.ITLB_FLUSH .Pq Event AEH, Umask 01H Counts the number of ITLB flushes, includes 4k/2M/4M pages. .It Li OFFCORE_REQUESTS.DEMAND_DATA_RD -.Pq Event B0H, Umask 01H +.Pq Event B0H, Umask 01H Demand data read requests sent to uncore. -.It Li OFFCORE_REQUESTS.DEMAND_RFO -.Pq Event B0H, Umask 04H +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H, Umask 04H Demand RFO read requests sent to uncore, including regular RFOs, locks, ItoM. .It Li OFFCORE_REQUESTS.ALL_DATA_RD -.Pq Event B0H, Umask 08H +.Pq Event B0H, Umask 08H Data read requests sent to uncore (demand and prefetch). .It Li UOPS_DISPATCHED.THREAD -.Pq Event B1H, Umask 01H +.Pq Event B1H, Umask 01H Counts total number of uops to be dispatched per-thread each cycle. Set Cmask = 1, INV =1 to count stall cycles. .It Li UOPS_DISPATCHED.CORE -.Pq Event B1H, Umask 02H +.Pq Event B1H, Umask 02H Counts total number of uops to be dispatched per-core each cycle. Do not need to set ANY .It Li OFFCORE_REQUESTS_BUFFER.SQ_FULL -.Pq Event B2H, Umask 01H +.Pq Event B2H, Umask 01H Offcore requests buffer cannot take more entries for this thread core. .It Li AGU_BYPASS_CANCEL.COUNT -.Pq Event B6H, Umask 01H -Counts executed load operations with all the following traits: 1. addressing -of the format [base + offset], 2. the offset is between 1 and 2047, 3. the -address specified in the base register is in one page and the address +.Pq Event B6H, Umask 01H +Counts executed load operations with all the following traits: 1. addressing +of the format [base + offset], 2. the offset is between 1 and 2047, 3. the +address specified in the base register is in one page and the address [base+offset] is in another page. -.It Li OFF_CORE_RESPONSE_0 +.It Li OFF_CORE_RESPONSE_0 .Pq Event B7H, Umask 01H Off-core Response Performance Monitoring; PMC0 only. Requires programming MSR 01A6H -.It Li OFF_CORE_RESPONSE_1 +.It Li OFF_CORE_RESPONSE_1 .Pq Event BBH, Umask 01H Off-core Response Performance Monitoring. PMC3 only. Requires programming MSR 01A7H @@ -663,96 +688,96 @@ .Pq Event BDH, Umask 01H DTLB flush attempts of the thread-specific entries. .It Li TLB_FLUSH.STLB_ANY -.Pq Event BDH, Umask 20H +.Pq Event BDH, Umask 20H Count number of STLB flush attempts. .It Li L1D_BLOCKS.BANK_CONFLICT_CYCLES -.Pq Event BFH, Umask 05H +.Pq Event BFH, Umask 05H Cycles when dispatched loads are cancelled due to L1D bank conflicts with other load ports. cmask=1 .It Li INST_RETIRED.ANY_P -.Pq Event C0H, Umask 00H +.Pq Event C0H, Umask 00H Number of instructions at retirement. .It Li INST_RETIRED.PREC_DIST .Pq Event C0H, Umask 01H -Precise instruction retired event with HW to reduce effect of PEBS shadow in IP +Precise instruction retired event with HW to reduce effect of PEBS shadow in IP distribution PMC1 only; Must quiesce other PMCs. .It Li INST_RETIRED.X87 -.Pq Event C0H, Umask 02H +.Pq Event C0H, Umask 02H X87 instruction retired event. .It Li OTHER_ASSISTS.ITLB_MISS_RETIRED -.Pq Event C1H, Umask 02H +.Pq Event C1H, Umask 02H Instructions that experienced an ITLB miss. .It Li OTHER_ASSISTS.AVX_STORE -.Pq Event C1H, Umask 08H +.Pq Event C1H, Umask 08H Number of assists associated with 256-bit AVX store operations. .It Li OTHER_ASSISTS.AVX_TO_SSE -.Pq Event C1H, Umask 10H +.Pq Event C1H, Umask 10H Number of transitions from AVX256 to legacy SSE when penalty applicable. .It Li OTHER_ASSISTS.SSE_TO_AVX -.Pq Event C1H, Umask 20H +.Pq Event C1H, Umask 20H Number of transitions from SSE to AVX-256 when penalty applicable. .It Li UOPS_RETIRED.ALL -.Pq Event C2H, Umask 01H +.Pq Event C2H, Umask 01H Counts the number of micro-ops retired. Use cmask=1 and invert to count active cycles or stalled cycles. .It Li UOPS_RETIRED.RETIRE_SLOTS -.Pq Event C2H, Umask 02H +.Pq Event C2H, Umask 02H Counts the number of retirement slots used each cycle. .It Li MACHINE_CLEARS.MEMORY_ORDERING -.Pq Event C3H, Umask 02H +.Pq Event C3H, Umask 02H Counts the number of machine clears due to memory order conflicts. -.It Li MACHINE_CLEARS.SMC +.It Li MACHINE_CLEARS.SMC .Pq Event C3H, Umask 04H Counts the number of times that a program writes to a code section. .It Li MACHINE_CLEARS.MASKMOV .Pq Event C3H, Umask 20H -Counts the number of executed AVX masked load operations that refer to an +Counts the number of executed AVX masked load operations that refer to an illegal address range with the mask bits set to 0. .It Li BR_INST_RETIRED.ALL_BRANCH .Pq Event C4H, Umask 00H Branch instructions at retirement. .It Li BR_INST_RETIRED.CONDITIONAL -.Pq Event C4H, Umask 01H +.Pq Event C4H, Umask 01H Counts the number of conditional branch instructions retired. .It Li BR_INST_RETIRED.NEAR_CALL -.Pq Event C4H, Umask 02H +.Pq Event C4H, Umask 02H Direct and indirect near call instructions retired. .It Li BR_INST_RETIRED.ALL_BRANCHES .Pq Event C4H, Umask 04H Counts the number of branch instructions retired. .It Li BR_INST_RETIRED.NEAR_RETURN -.Pq Event C4H, Umask 08H +.Pq Event C4H, Umask 08H Counts the number of near return instructions retired. .It Li BR_INST_RETIRED.NOT_TAKEN -.Pq Event C4H, Umask 10H +.Pq Event C4H, Umask 10H Counts the number of not taken branch instructions retired. .It Li BR_INST_RETIRED.NEAR_TAKEN -.Pq Event C4H, Umask 20H +.Pq Event C4H, Umask 20H Number of near taken branches retired. .It Li BR_INST_RETIRED.FAR_BRANCH -.Pq Event C4H, Umask 40H +.Pq Event C4H, Umask 40H Number of far branches retired. .It Li BR_MISP_RETIRED.ALL_BRANCHES -.Pq Event C5H, Umask 00H +.Pq Event C5H, Umask 00H Mispredicted branch instructions at retirement. .It Li BR_MISP_RETIRED.CONDITIONAL -.Pq Event C5H, Umask 01H +.Pq Event C5H, Umask 01H Mispredicted conditional branch instructions retired. .It Li BR_MISP_RETIRED.NEAR_CALL -.Pq Event C5H, Umask 02H +.Pq Event C5H, Umask 02H Direct and indirect mispredicted near call instructions retired. .It Li BR_MISP_RETIRED.ALL_BRANCH -.Pq Event C5H, Umask 04H +.Pq Event C5H, Umask 04H Mispredicted macro branch instructions retired. .It Li BR_MISP_RETIRED.NOT_TAKEN -.Pq Event C5H, Umask 10H +.Pq Event C5H, Umask 10H Mispredicted not taken branch instructions retired. .It Li BR_MISP_RETIRED.TAKEN -.Pq Event C5H, Umask 20H +.Pq Event C5H, Umask 20H Mispredicted taken branch instructions retired. .It Li FP_ASSIST.X87_OUTPUT -.Pq Event CAH, Umask 02H +.Pq Event CAH, Umask 02H Number of X87 assists due to output value. .It Li FP_ASSIST.X87_INPUT .Pq Event CAH, Umask 04H @@ -761,30 +786,30 @@ .Pq Event CAH, Umask 08H Number of SIMD FP assists due to Output values. .It Li FP_ASSIST.SIMD_INPUT -.Pq Event CAH, Umask 10H +.Pq Event CAH, Umask 10H Number of SIMD FP assists due to input values. .It Li FP_ASSIST.ANY -.Pq Event CAH, Umask 1EH +.Pq Event CAH, Umask 1EH Cycles with any input/output SSE* or FP assists. .It Li ROB_MISC_EVENTS.LBR_INSERTS -.Pq Event CCH, Umask 20H +.Pq Event CCH, Umask 20H Count cases of saving new LBR records by hardware. .It Li MEM_TRANS_RETIRED.LOAD_LATENCY .Pq Event CDH, Umask 01H -Sample loads with specified latency threshold. -PMC3 only. +Sample loads with specified latency threshold. +PMC3 only. Specify threshold in MSR 0x3F6. .It Li MEM_TRANS_RETIRED.PRECISE_STORE -.Pq Event CDH, Umask 02H -Sample stores and collect precise store operation via PEBS record. +.Pq Event CDH, Umask 02H +Sample stores and collect precise store operation via PEBS record. PMC3 only. .It Li MEM_UOP_RETIRED.LOADS .Pq Event D0H, Umask 01H -Qualify retired memory uops that are loads. +Qualify retired memory uops that are loads. Combine with umask 10H, 20H, 40H, 80H. .It Li MEM_UOP_RETIRED.STORES .Pq Event D0H, Umask 02H -Qualify retired memory uops that are stores. +Qualify retired memory uops that are stores. Combine with umask 10H, 20H, 40H, 80H. .It Li MEM_UOP_RETIRED.STLB_MISS .Pq Event D0H, Umask 10H @@ -797,101 +822,101 @@ .It Li MEM_UOP_RETIRED.SPLIT .Pq Event D0H, Umask 40H Qualify retired memory uops with line split. -Must combine with umask 01H, 02H, to produce counts. +Must combine with umask 01H, 02H, to produce counts. .It Li MEM_UOP_RETIRED_ALL -.Pq Event D0H, Umask 80H +.Pq Event D0H, Umask 80H Qualify any retired memory uops. Must combine with umask 01H, 02H, to produce counts. .It Li MEM_LOAD_UOPS_RETIRED.L1_HIT -.Pq Event D1H, Umask 01H +.Pq Event D1H, Umask 01H Retired load uops with L1 cache hits as data sources. Must combine with umask 01H, 02H, to produce counts. .It Li MEM_LOAD_UOPS_RETIRED.L2_HIT -.Pq Event D1H, Umask 02H +.Pq Event D1H, Umask 02H Retired load uops with L2 cache hits as data sources. .It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT -.Pq Event D1H, Umask 04H -Retired load uops which data sources were data hits in LLC without snoops +.Pq Event D1H, Umask 04H +Retired load uops which data sources were data hits in LLC without snoops required. .It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB -.Pq Event D1H, Umask 40H -Retired load uops which data sources were load uops missed L1 but hit FB due +.Pq Event D1H, Umask 40H +Retired load uops which data sources were load uops missed L1 but hit FB due to preceding miss to the same cache line with data not ready. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_MISS -.Pq Event D2H, Umask 01H -Retired load uops which data sources were LLC hit and cross-core snoop missed in +.Pq Event D2H, Umask 01H +Retired load uops which data sources were LLC hit and cross-core snoop missed in on-pkg core cache. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HIT -.Pq Event D2H, Umask 02H -Retired load uops which data sources were LLC and cross-core snoop hits in +.Pq Event D2H, Umask 02H +Retired load uops which data sources were LLC and cross-core snoop hits in on-pkg core cache. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_HITM -.Pq Event D2H, Umask 04H +.Pq Event D2H, Umask 04H Retired load uops which data sources were HitM responses from shared LLC. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.XSNP_NONE .Pq Event D2H, Umask 08H Retired load uops which data sources were hits in LLC without snoops required. .It Li MEM_LOAD_UOPS_LLC_HIT_RETIRED.LLC_MISS -.Pq Event D4H, Umask 02H +.Pq Event D4H, Umask 02H Retired load uops with unknown information as data source in cache serviced the load. .It Li L2_TRANS.DEMAND_DATA_RD -.Pq Event F0H, Umask 01H +.Pq Event F0H, Umask 01H Demand Data Read requests that access L2 cache. .It Li L2_TRANS.RF0 -.Pq Event F0H, Umask 02H +.Pq Event F0H, Umask 02H RFO requests that access L2 cache. .It Li L2_TRANS.CODE_RD -.Pq Event F0H, Umask 04H +.Pq Event F0H, Umask 04H L2 cache accesses when fetching instructions. .It Li L2_TRANS.ALL_PF -.Pq Event F0H, Umask 08H +.Pq Event F0H, Umask 08H L2 or LLC HW prefetches that access L2 cache. .It Li L2_TRANS.L1D_WB -.Pq Event F0H, Umask 10H +.Pq Event F0H, Umask 10H L1D writebacks that access L2 cache. .It Li L2_TRANS.L2_FILL -.Pq Event F0H, Umask 20H +.Pq Event F0H, Umask 20H L2 fill requests that access L2 cache. .It Li L2_TRANS.L2_WB -.Pq Event F0H, Umask 40H +.Pq Event F0H, Umask 40H L2 writebacks that access L2 cache. .It Li L2_TRANS.ALL_REQUESTS -.Pq Event F0H, Umask 80H +.Pq Event F0H, Umask 80H Transactions accessing L2 pipe. .It Li L2_LINES_IN.I .Pq Event F1H, Umask 01H -L2 cache lines in I state filling L2. +L2 cache lines in I state filling L2. Counting does not cover rejects. .It Li L2_LINES_IN.S -.Pq Event F1H, Umask 02H -L2 cache lines in S state filling L2. +.Pq Event F1H, Umask 02H +L2 cache lines in S state filling L2. Counting does not cover rejects. .It Li L2_LINES_IN.E -.Pq Event F1H, Umask 04H -L2 cache lines in E state filling L2. +.Pq Event F1H, Umask 04H +L2 cache lines in E state filling L2. Counting does not cover rejects. .It Li L2_LINES-IN.ALL -.Pq Event F1H, Umask 07H -L2 cache lines filling L2. +.Pq Event F1H, Umask 07H +L2 cache lines filling L2. Counting does not cover rejects. .It Li L2_LINES_OUT.DEMAND_CLEAN -.Pq Event F2H, Umask 01H +.Pq Event F2H, Umask 01H Clean L2 cache lines evicted by demand. .It Li L2_LINES_OUT.DEMAND_DIRTY -.Pq Event F2H, Umask 02H +.Pq Event F2H, Umask 02H Dirty L2 cache lines evicted by demand. .It Li L2_LINES_OUT.PF_CLEAN .Pq Event F2H, Umask 04H Clean L2 cache lines evicted by L2 prefetch. .It Li L2_LINES_OUT.PF_DIRTY -.Pq Event F2H, Umask 08H +.Pq Event F2H, Umask 08H Dirty L2 cache lines evicted by L2 prefetch. .It Li L2_LINES_OUT.DIRTY_ALL .Pq Event F2H, Umask 0AH -Dirty L2 cache lines filling the L2. +Dirty L2 cache lines filling the L2. Counting does not cover rejects. .It Li SQ_MISC.SPLIT_LOCK -.Pq Event F4H, Umask 10H +.Pq Event F4H, Umask 10H Split locks in SQ. .El .Sh SEE ALSO @@ -901,6 +926,8 @@ .Xr pmc.corei7 3 , .Xr pmc.corei7uc 3 , .Xr pmc.iaf 3 , +.Xr pmc.ivybridge 3 , +.Xr pmc.ivybridgexeon 3 , .Xr pmc.k7 3 , .Xr pmc.k8 3 , .Xr pmc.p4 3 , @@ -907,6 +934,7 @@ .Xr pmc.p5 3 , .Xr pmc.p6 3 , .Xr pmc.sandybridgeuc 3 , +.Xr pmc.sandybridgexeon 3 , .Xr pmc.soft 3 , .Xr pmc.tsc 3 , .Xr pmc.ucf 3 , @@ -926,8 +954,7 @@ library was written by .An "Joseph Koshy" .Aq jkoshy at FreeBSD.org. -The support for the -.Lb Sandy Bridge +The support for the Sandy Bridge microarchitecture was written by .An "Davide Italiano" .Aq davide at FreeBSD.org . Modified: trunk/lib/libpmc/pmc.sandybridgeuc.3 =================================================================== --- trunk/lib/libpmc/pmc.sandybridgeuc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.sandybridgeuc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -22,9 +22,9 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.sandybridgeuc.3 242594 2012-11-05 01:05:14Z sbruno $ .\" -.Dd February 12, 2012 +.Dd October 19, 2012 .Dt PMC.SANDYBRIDGEUC 3 .Os .Sh NAME @@ -208,6 +208,7 @@ .Xr pmc.p5 3 , .Xr pmc.p6 3 , .Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgexeon 3 , .Xr pmc.soft 3 , .Xr pmc.tsc 3 , .Xr pmc.ucf 3 , Added: trunk/lib/libpmc/pmc.sandybridgexeon.3 =================================================================== --- trunk/lib/libpmc/pmc.sandybridgexeon.3 (rev 0) +++ trunk/lib/libpmc/pmc.sandybridgexeon.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -0,0 +1,1024 @@ +.\" Copyright (c) 2012 Hiren Panchasara +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +.\" SUCH DAMAGE. +.\" +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.sandybridgexeon.3 249964 2013-04-27 01:48:09Z bryanv $ +.\" +.Dd October 18, 2012 +.Dt PMC.SANDYBRIDGEXEON 3 +.Os +.Sh NAME +.Nm pmc.sandybridgexeon +.Nd measurement events for +.Tn Intel +.Tn Sandy Bridge Xeon +family CPUs +.Sh LIBRARY +.Lb libpmc +.Sh SYNOPSIS +.In pmc.h +.Sh DESCRIPTION +.Tn Intel +.Tn "Sandy Bridge Xeon" +CPUs contain PMCs conforming to version 2 of the +.Tn Intel +performance measurement architecture. +These CPUs may contain up to two classes of PMCs: +.Bl -tag -width "Li PMC_CLASS_IAP" +.It Li PMC_CLASS_IAF +Fixed-function counters that count only one hardware event per counter. +.It Li PMC_CLASS_IAP +Programmable counters that may be configured to count one of a defined +set of hardware events. +.El +.Pp +The number of PMCs available in each class and their widths need to be +determined at run time by calling +.Xr pmc_cpuinfo 3 . +.Pp +Intel Sandy Bridge Xeon PMCs are documented in +.Rs +.%B "Intel(R) 64 and IA-32 Architectures Software Developer's Manual" +.%T "Volume 3B: System Programming Guide, Part 2" +.%N "Order Number: 253669-043US" +.%D August 2012 +.%Q "Intel Corporation" +.Re +.Ss SANDYBRIDGE XEON FIXED FUNCTION PMCS +These PMCs and their supported events are documented in +.Xr pmc.iaf 3 . +.Ss SANDYBRIDGE XEON PROGRAMMABLE PMCS +The programmable PMCs support the following capabilities: +.Bl -column "PMC_CAP_INTERRUPT" "Support" +.It Em Capability Ta Em Support +.It PMC_CAP_CASCADE Ta \&No +.It PMC_CAP_EDGE Ta Yes +.It PMC_CAP_INTERRUPT Ta Yes +.It PMC_CAP_INVERT Ta Yes +.It PMC_CAP_READ Ta Yes +.It PMC_CAP_PRECISE Ta \&No +.It PMC_CAP_SYSTEM Ta Yes +.It PMC_CAP_TAGGING Ta \&No +.It PMC_CAP_THRESHOLD Ta Yes +.It PMC_CAP_USER Ta Yes +.It PMC_CAP_WRITE Ta Yes +.El +.Ss Event Qualifiers +Event specifiers for these PMCs support the following common +qualifiers: +.Bl -tag -width indent +.It Li rsp= Ns Ar value +Configure the Off-core Response bits. +.Bl -tag -width indent +.It Li REQ_DMND_DATA_RD +Counts the number of demand and DCU prefetch data reads of full and partial +cachelines as well as demand data page table entry cacheline reads. Does not +count L2 data read prefetches or instruction fetches. +.It Li REQ_DMND_RFO +Counts the number of demand and DCU prefetch reads for ownership (RFO) +requests generated by a write to data cacheline. Does not count L2 RFO +prefetches. +.It Li REQ_DMND_IFETCH +Counts the number of demand and DCU prefetch instruction cacheline reads. +Does not count L2 code read prefetches. +.It Li REQ_WB +Counts the number of writeback (modified to exclusive) transactions. +.It Li REQ_PF_DATA_RD +Counts the number of data cacheline reads generated by L2 prefetchers. +.It Li REQ_PF_RFO +Counts the number of RFO requests generated by L2 prefetchers. +.It Li REQ_PF_IFETCH +Counts the number of code reads generated by L2 prefetchers. +.It Li REQ_PF_LLC_DATA_RD +L2 prefetcher to L3 for loads. +.It Li REQ_PF_LLC_RFO +RFO requests generated by L2 prefetcher +.It Li REQ_PF_LLC_IFETCH +L2 prefetcher to L3 for instruction fetches. +.It Li REQ_BUS_LOCKS +Bus lock and split lock requests. +.It Li REQ_STRM_ST +Streaming store requests. +.It Li REQ_OTHER +Any other request that crosses IDI, including I/O. +.It Li RES_ANY +Catch all value for any response types. +.It Li RES_SUPPLIER_NO_SUPP +No Supplier Information available. +.It Li RES_SUPPLIER_LLC_HITM +M-state initial lookup stat in L3. +.It Li RES_SUPPLIER_LLC_HITE +E-state. +.It Li RES_SUPPLIER_LLC_HITS +S-state. +.It Li RES_SUPPLIER_LLC_HITF +F-state. +.It Li RES_SUPPLIER_LOCAL +Local DRAM Controller. +.It Li RES_SNOOP_SNP_NONE +No details on snoop-related information. +.It Li RES_SNOOP_SNP_NO_NEEDED +No snoop was needed to satisfy the request. +.It Li RES_SNOOP_SNP_MISS +A snoop was needed and it missed all snooped caches: +-For LLC Hit, ReslHitl was returned by all cores +-For LLC Miss, Rspl was returned by all sockets and data was returned from +DRAM. +.It Li RES_SNOOP_HIT_NO_FWD +A snoop was needed and it hits in at least one snooped cache. Hit denotes a +cache-line was valid before snoop effect. This includes: +-Snoop Hit w/ Invalidation (LLC Hit, RFO) +-Snoop Hit, Left Shared (LLC Hit/Miss, IFetch/Data_RD) +-Snoop Hit w/ Invalidation and No Forward (LLC Miss, RFO Hit S) +In the LLC Miss case, data is returned from DRAM. +.It Li RES_SNOOP_HIT_FWD +A snoop was needed and data was forwarded from a remote socket. +This includes: +-Snoop Forward Clean, Left Shared (LLC Hit/Miss, IFetch/Data_RD/RFT). +.It Li RES_SNOOP_HITM +A snoop was needed and it HitM-ed in local or remote cache. HitM denotes a +cache-line was in modified state before effect as a results of snoop. This +includes: +-Snoop HitM w/ WB (LLC miss, IFetch/Data_RD) +-Snoop Forward Modified w/ Invalidation (LLC Hit/Miss, RFO) +-Snoop MtoS (LLC Hit, IFetch/Data_RD). +.It Li RES_NON_DRAM +Target was non-DRAM system address. This includes MMIO transactions. +.El +.It Li cmask= Ns Ar value +Configure the PMC to increment only if the number of configured +events measured in a cycle is greater than or equal to +.Ar value . +.It Li edge +Configure the PMC to count the number of de-asserted to asserted +transitions of the conditions expressed by the other qualifiers. +If specified, the counter will increment only once whenever a +condition becomes true, irrespective of the number of clocks during +which the condition remains true. +.It Li inv +Invert the sense of comparison when the +.Dq Li cmask +qualifier is present, making the counter increment when the number of +events per cycle is less than the value specified by the +.Dq Li cmask +qualifier. +.It Li os +Configure the PMC to count events happening at processor privilege +level 0. +.It Li usr +Configure the PMC to count events occurring at privilege levels 1, 2 +or 3. +.El +.Pp +If neither of the +.Dq Li os +or +.Dq Li usr +qualifiers are specified, the default is to enable both. +.Ss Event Specifiers (Programmable PMCs) +Sandy Bridge Xeon programmable PMCs support the following events: +.Bl -tag -width indent +.It Li LD_BLOCKS.DATA_UNKNOWN +.Pq Event 03H , Umask 01H +blocked loads due to store buffer blocks with unknown data. +.It Li LD_BLOCKS.STORE_FORWARD +.Pq Event 03H , Umask 02H +loads blocked by overlapping with store buffer that cannot +be forwarded . +.It Li LD_BLOCKS.NO_SR +.Pq Event 03H , Umask 08H +# of Split loads blocked due to resource not available. +.It Li LD_BLOCKS.ALL_BLOCK +.Pq Event 03H , Umask 10H +Number of cases where any load is blocked but has no +DCU miss. +.It Li MISALIGN_MEM_REF.LOADS +.Pq Event 05H , Umask 01H +Speculative cache-line split load uops dispatched to +L1D. +.It Li MISALIGN_MEM_REF.STORES +.Pq Event 05H , Umask 02H +Speculative cache-line split Store- address uops +dispatched to L1D. +.It Li LD_BLOCKS_PARTIAL.ADDRESS_ALIAS +.Pq Event 07H , Umask 01H +False dependencies in MOB due to partial compare on +address. +.It Li LD_BLOCKS_PARTIAL.ALL_STALL_BLOCK +.Pq Event 07H , Umask 08H +The number of times that load operations are temporarily +blocked because of older stores, with addresses that are +not yet known. A load operation may incur more than one +block of this type. +.It Li TLB_LOAD_MISSES.MISS_CAUSES_A_WALK +.Pq Event 08H , Umask 01H +Misses in all TLB levels that cause a page walk of any +page size. +.It Li TLB_LOAD_MISSES.WALK_COMPLETED +.Pq Event 08H , Umask 02H +Misses in all TLB levels that caused page walk completed +of any size. +.It Li DTLB_LOAD_MISSES.WALK_DURATION +.Pq Event 08H , Umask 04H +Cycle PMH is busy with a walk. +.It Li DTLB_LOAD_MISSES.STLB_HIT +.Pq Event 08H , Umask 10H +Number of cache load STLB hits. No page walk. +.It Li INT_MISC.RECOVERY_CYCLES +.Pq Event 0DH , Umask 03H +Cycles waiting to recover after Machine Clears or EClear. +Set Cmask= 1. +.It Li INT_MISC.RAT_STALL_CYCLES +.Pq Event 0DH , Umask 40H +Cycles RAT external stall is sent to IDQ for this thread. +.It Li UOPS_ISSUED.ANY +.Pq Event 0EH , Umask 01H +Increments each cycle the # of Uops issued by the +RAT to RS. +Set Cmask = 1, Inv = 1, Any= 1to count stalled cycles +of this core. +.It Li FP_COMP_OPS_EXE.X87 +.Pq Event 10H , Umask 01H +Counts number of X87 uops executed. +.It Li FP_COMP_OPS_EXE.SSE_FP_PACKED_DOUBLE +.Pq Event 10H , Umask 10H +Counts number of SSE* double precision FP packed +uops executed. +.It Li FP_COMP_OPS_EXE.SSE_FP_SCALAR_SINGLE +.Pq Event 10H , Umask 20H +Counts number of SSE* single precision FP scalar +uops executed. +.It Li FP_COMP_OPS_EXE.SSE_PACKED_SINGLE +.Pq Event 10H , Umask 40H +Counts number of SSE* single precision FP packed +uops executed. +.It Li FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE +.Pq Event 10H , Umask 80H +Counts number of SSE* double precision FP scalar +uops executed. +.It Li SIMD_FP_256.PACKED_SINGLE +.Pq Event 11H , Umask 01H +Counts 256-bit packed single-precision floating- +point instructions. +.It Li SIMD_FP_256.PACKED_DOUBLE +.Pq Event 11H , Umask 02H +Counts 256-bit packed double-precision floating- +point instructions. +.It Li ARITH.FPU_DIV_ACTIVE +.Pq Event 14H , Umask 01H +Cycles that the divider is active, includes INT and FP. +Set 'edge =1, cmask=1' to count the number of +divides. +.It Li INSTS_WRITTEN_TO_IQ.INSTS +.Pq Event 17H , Umask 01H +Counts the number of instructions written into the +IQ every cycle. +.It Li L2_RQSTS.DEMAND_DATA_RD_HIT +.Pq Event 24H , Umask 01H +Demand Data Read requests that hit L2 cache. +.It Li L2_RQSTS.ALL_DEMAND_DATA_RD +.Pq Event 24H , Umask 03H +Counts any demand and L1 HW prefetch data load +requests to L2. +.It Li L2_RQSTS.RFO_HITS +.Pq Event 24H , Umask 04H +Counts the number of store RFO requests that +hit the L2 cache. +.It Li L2_RQSTS.RFO_MISS +.Pq Event 24H , Umask 08H +Counts the number of store RFO requests that +miss the L2 cache. +.It Li L2_RQSTS.ALL_RFO +.Pq Event 24H , Umask 0CH +Counts all L2 store RFO requests. +.It Li L2_RQSTS.CODE_RD_HIT +.Pq Event 24H , Umask 10H +Number of instruction fetches that hit the L2 +cache. +.It Li L2_RQSTS.CODE_RD_MISS +.Pq Event 24H , Umask 20H +Number of instruction fetches that missed the L2 +cache. +.It Li L2_RQSTS.ALL_CODE_RD +.Pq Event 24H , Umask 30H +Counts all L2 code requests. +.It Li L2_RQSTS.PF_HIT +.Pq Event 24H , Umask 40H +Requests from L2 Hardware prefetcher that hit L2. +.It Li L2_RQSTS.PF_MISS +.Pq Event 24H , Umask 80H +Requests from L2 Hardware prefetcher that missed +L2. +.It Li L2_RQSTS.ALL_PF +.Pq Event 24H , Umask C0H +Any requests from L2 Hardware prefetchers. +.It Li L2_STORE_LOCK_RQSTS.MISS +.Pq Event 27H , Umask 01H +ROs that miss cache lines. +.It Li L2_STORE_LOCK_RQSTS.HIT_E +.Pq Event 27H , Umask 04H +RFOs that hit cache lines in E state. +.It Li L2_STORE_LOCK_RQSTS.HIT_M +.Pq Event 27H , Umask 08H +RFOs that hit cache lines in M state. +.It Li L2_STORE_LOCK_RQSTS.ALL +.Pq Event 27H , Umask 0FH +RFOs that access cache lines in any state. +.It Li L2_L1D_WB_RQSTS.MISS +.Pq Event 28H , Umask 01H +Not rejected writebacks from L1D to L2 cache lines +that missed L2. +.It Li L2_L1D_WB_RQSTS.HIT_S +.Pq Event 28H , Umask 02H +Not rejected writebacks from L1D to L2 cache lines +in S state. +.It Li L2_L1D_WB_RQSTS.HIT_E +.Pq Event 28H , Umask 04H +Not rejected writebacks from L1D to L2 cache lines +in E state. +.It Li L2_L1D_WB_RQSTS.HIT_M +.Pq Event 28H , Umask 08H +Not rejected writebacks from L1D to L2 cache lines +in M state. +.It Li L2_L1D_WB_RQSTS.ALL +.Pq Event 28H , Umask 0FH +Not rejected writebacks from L1D to L2 cache. +.It Li LONGEST_LAT_CACHE.REFERENCE +.Pq Event 2EH , Umask 4FH +This event counts requests originating from the +core that reference +a cache line in the last level cache. +.It Li LONGEST_LAT_CACHE.MISS +.Pq Event 2EH , Umask 41H +This event counts each cache miss condition for +references to the last level cache. +.It Li CPU_CLK_UNHALTED.THREAD_P +.Pq Event 3CH , Umask 00H +Counts the number of thread cycles while the +thread is not in a halt state. The thread enters +the halt state when it is running the HLT +instruction. The core frequency may change from +time to time due to power or thermal throttling. +.It Li CPU_CLK_THREAD_UNHALTED.REF_XCLK +.Pq Event 3CH , Umask 01H +Increments at the frequency of XCLK (100 MHz) +when not halted. +.It Li L1D_PEND_MISS.PENDING +.Pq Event 48H , Umask 01H +Increments the number of outstanding L1D misses +every cycle. +Set Cmaks = 1 and Edge =1 to count occurrences. +.It Li DTLB_STORE_MISSES.MISS_CAUSES_A_WALK +.Pq Event 49H , Umask 01H +Miss in all TLB levels causes an page walk of +any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_COMPLETED +.Pq Event 49H , Umask 02H +Miss in all TLB levels causes a page walk that +completes of any page size (4K/2M/4M/1G). +.It Li DTLB_STORE_MISSES.WALK_DURATION +.Pq Event 49H , Umask 04H +Cycles PMH is busy with this walk. +.It Li DTLB_STORE_MISSES.STLB_HIT +.Pq Event 49H , Umask 10H +Store operations that miss the first TLB level +but hit the second and do not cause page walks. +.It Li LOAD_HIT_PRE.SW_PF +.Pq Event 4CH , Umask 01H +Not SW-prefetch load dispatches that hit fill +buffer allocated for S/W prefetch. +.It Li LOAD_HIT_PER.HW_PF +.Pq Event 4CH , Umask 02H +Not SW-prefetch load dispatches that hit fill +buffer allocated for H/W prefetch. +.It Li HW_PRE_REQ.DL1_MISS +.Pq Event 4EH , Umask 02H +Hardware Prefetch requests that miss the L1D +cache. A request is being counted each time +it access the cache & miss it, including if +a block is applicable or if hit the Fill +Buffer for example. +.It Li L1D.REPLACEMENT +.Pq Event 51H , Umask 01H +Counts the number of lines brought into the +L1 data cache. +.It Li L1D.ALLOCATED_IN_M +.Pq Event 51H , Umask 02H +Counts the number of allocations of modified +L1D cache lines. +.It Li L1D.EVICTION +.Pq Event 51H , Umask 04H +Counts the number of modified lines evicted +from the L1 data cache due to replacement. +.It Li L1D.ALL_M_REPLACEMENT +.Pq Event 51H , Umask 08H +Cache lines in M state evicted out of L1D due +to Snoop HitM or dirty line replacement. +.It Li PARTIAL_RAT_STALLS.FLAGS_MERGE_UOP +.Pq Event 59H , Umask 0CH +Increments the number of flags-merge uops in +flight each cycle. +Set Cmask = 1 to count cycles. +.It Li PARTIAL_RAT_STALLS.SLOW_LEA_WINDOW +.Pq Event 59H , Umask 0FH +Cycles with at least one slow LEA uop allocated. +.It Li PARTIAL_RAT_STALLS.MUL_SINGLE_UOP +.Pq Event 59H , Umask 40H +Number of Multiply packed/scalar single precision +uops allocated. +.It Li RESOURCE_STALLS2.ALL_FL_EMPTY +.Pq Event 5BH , Umask 0CH +Cycles stalled due to free list empty. +.It Li RESOURCE_STALLS2.ALL_PRF_CONTROL +.Pq Event 5BH , Umask 0FH +Cycles stalled due to control structures full for +physical registers. +.It Li RESOURCE_STALLS2.BOB_FULL +.Pq Event 5BH , Umask 40H +Cycles Allocator is stalled due Branch Order Buffer. +.It Li RESOURCE_STALLS2.OOO_RSRC +.Pq Event 5BH , Umask 4FH +Cycles stalled due to out of order resources full. +.It Li CPL_CYCLES.RING0 +.Pq Event 5CH , Umask 01H +Unhalted core cycles when the thread is in ring 0. +.It Li CPL_CYCLES.RING123 +.Pq Event 5CH , Umask 02H +Unhalted core cycles when the thread is not in ring +0. +.It Li RS_EVENTS.EMPTY_CYCLES +.Pq Event 5EH , Umask 01H +Cycles the RS is empty for the thread. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD +.Pq Event 60H , Umask 01H +Offcore outstanding Demand Data Read +transactions in SQ to uncore. Set Cmask=1 to count +cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.DEMAND_RFO +.Pq Event 60H , Umask 04H +Offcore outstanding RFO store transactions in SQ to +uncore. Set Cmask=1 to count cycles. +.It Li OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD +.Pq Event 60H , Umask 08H +Offcore outstanding cacheable data read +transactions in SQ to uncore. Set Cmask=1 to count +cycles. +.It Li LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION +.Pq Event 63H , Umask 01H +Cycles in which the L1D and L2 are locked, due to a +UC lock or split lock. +.It Li LOCK_CYCLES.CACHE_LOCK_DURATION +.Pq Event 63H , Umask 02H +Cycles in which the L1D is locked. +.It Li IDQ.EMPTY +.Pq Event 79H , Umask 02H +Counts cycles the IDQ is empty. +.It Li IDQ.MITE_UOPS +.Pq Event 79H , Umask 04H +Increment each cycle # of uops delivered to IDQ +from MITE path. +Set Cmask = 1 to count cycles. +.It Li IDQ.DSB_UOPS +.Pq Event 79H , Umask 08H +Increment each cycle. # of uops delivered to IDQ +from DSB path. +Set Cmask = 1 to count cycles. +.It Li IDQ.MS_DSB_UOPS +.Pq Event 79H , Umask 10H +Increment each cycle # of uops delivered to IDQ +when MS busy by DSB. Set Cmask = 1 to count +cycles MS is busy. Set Cmask=1 and Edge =1 to +count MS activations. +.It Li IDQ.MS_MITE_UOPS +.Pq Event 79H , Umask 20H +Increment each cycle # of uops delivered to IDQ +when MS is busy by MITE. Set Cmask = 1 to count +cycles. +.It Li IDQ.MS_UOPS +.Pq Event 79H , Umask 30H +Increment each cycle # of uops delivered to IDQ +from MS by either DSB or MITE. Set Cmask = 1 to +count cycles. +.It Li ICACHE.MISSES +.Pq Event 80H , Umask 02H +Number of Instruction Cache, Streaming Buffer and +Victim Cache Misses. Includes UC accesses. +.It Li ITLB_MISSES.MISS_CAUSES_A_WALK +.Pq Event 85H , Umask 01H +Misses in all ITLB levels that cause page walks. +.It Li ITLB_MISSES.WALK_COMPLETED +.Pq Event 85H , Umask 02H +Misses in all ITLB levels that cause completed page +walks. +.It Li ITLB_MISSES.WALK_DURATION +.Pq Event 85H , Umask 04H +Cycle PMH is busy with a walk. +.It Li ITLB_MISSES.STLB_HIT +.Pq Event 85H , Umask 10H +Number of cache load STLB hits. No page walk. +.It Li ILD_STALL.LCP +.Pq Event 87H , Umask 01H +Stalls caused by changing prefix length of the +instruction. +.It Li ILD_STALL.IQ_FULL +.Pq Event 87H , Umask 04H +Stall cycles due to IQ is full. +.It Li BR_INST_EXEC.COND +.Pq Event 88H , Umask 01H +Qualify conditional near branch instructions +executed, but not necessarily retired. +.It Li BR_INST_EXEC.DIRECT_JMP +.Pq Event 88H , Umask 02H +Qualify all unconditional near branch instructions +excluding calls and indirect branches. +.It Li BR_INST_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 88H , Umask 04H +Qualify executed indirect near branch instructions +that are not calls nor returns. +.It Li BR_INST_EXEC.RETURN_NEAR +.Pq Event 88H , Umask 08H +Qualify indirect near branches that have a return +mnemonic. +.It Li BR_INST_EXEC.DIRECT_NEAR_CALL +.Pq Event 88H , Umask 10H +Qualify unconditional near call branch instructions, +excluding non call branch, executed. +.It Li BR_INST_EXEC.INDIRECT_NEAR_CALL +.Pq Event 88H , Umask 20H +Qualify indirect near calls, including both register +and memory indirect, executed. +.It Li BR_INST_EXEC.NONTAKEN +.Pq Event 88H , Umask 40H +Qualify non-taken near branches executed. +.It Li BR_INST_EXEC.TAKEN +.Pq Event 88H , Umask 80H +Qualify taken near branches executed. Must +combine with 01H,02H, 04H, 08H, 10H, 20H. +.It Li BR_INST_EXE.ALL_BRANCHES +.Pq Event 88H , Umask FFH +Counts all near executed branches (not necessarily +retired). +.It Li BR_MISP_EXEC.COND +.Pq Event 89H , Umask 01H +Qualify conditional near branch instructions +mispredicted. +.It Li BR_MISP_EXEC.INDIRECT_JMP_NON_CALL_RET +.Pq Event 89H , Umask 04H +Qualify mispredicted indirect near branch +instructions that are not calls nor returns. +.It Li BR_MISP_EXEC.RETURN_NEAR +.Pq Event 89H , Umask 08H +Qualify mispredicted indirect near branches that +have a return mnemonic. +.It Li BR_MISP_EXEC.DIRECT_NEAR_CALL +.Pq Event 89H , Umask 10H +Qualify mispredicted unconditional near call branch +instructions, excluding non call branch, executed. +.It Li BR_MISP_EXEC.INDIRECT_NEAR_CALL +.Pq Event 89H , Umask 20H +Qualify mispredicted indirect near calls, including +both register and memory indirect, executed. +.It Li BR_MISP_EXEC.NONTAKEN +.Pq Event 89H , Umask 40H +Qualify mispredicted non-taken near branches +executed,. +.It Li BR_MISP_EXEC.TAKEN +.Pq Event 89H , Umask 80H +Qualify mispredicted taken near branches executed. +Must combine with 01H,02H, 04H, 08H, 10H, 20H +.It Li BR_MISP_EXEC.ALL_BRANCHES +.Pq Event 89H , Umask FFH +Counts all near executed branches (not necessarily +retired). +.It Li IDQ_UOPS_NOT_DELIVERED.CORE +.Pq Event 9CH , Umask 01H +Count number of non-delivered uops to RAT per +thread. +.It Li UOPS_DISPATCHED_PORT.PORT_0 +.Pq Event A1H , Umask 01H +Cycles which a Uop is dispatched on port 0. +.It Li UOPS_DISPATCHED_PORT.PORT_1 +.Pq Event A1H , Umask 02H +Cycles which a Uop is dispatched on port 1. +.It Li UOPS_DISPATCHED_PORT.PORT_2_LD +.Pq Event A1H , Umask 04H +Cycles which a load uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2_STA +.Pq Event A1H , Umask 08H +Cycles which a store address uop is dispatched on +port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_2 +.Pq Event A1H , Umask 0CH +Cycles which a Uop is dispatched on port 2. +.It Li UOPS_DISPATCHED_PORT.PORT_3_LD +.Pq Event A1H , Umask 10H +Cycles which a load uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3_STA +.Pq Event A1H , Umask 20H +Cycles which a store address uop is dispatched on +port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_3 +.Pq Event A1H , Umask 30H +Cycles which a Uop is dispatched on port 3. +.It Li UOPS_DISPATCHED_PORT.PORT_4 +.Pq Event A1H , Umask 40H +Cycles which a Uop is dispatched on port 4. +.It Li UOPS_DISPATCHED_PORT.PORT_5 +.Pq Event A1H , Umask 80H +Cycles which a Uop is dispatched on port 5. +.It Li RESOURCE_STALLS.ANY +.Pq Event A2H , Umask 01H +Cycles Allocation is stalled due to Resource Related +reason. +.It Li RESOURCE_STALLS.LB +.Pq Event A2H , Umask 01H +Counts the cycles of stall due to lack of load buffers. +.It Li RESOURCE_STALLS.RS +.Pq Event A2H , Umask 04H +Cycles stalled due to no eligible RS entry available. +.It Li RESOURCE_STALLS.SB +.Pq Event A2H , Umask 08H +Cycles stalled due to no store buffers available. (not +including draining form sync). +.It Li RESOURCE_STALLS.ROB +.Pq Event A2H , Umask 10H +Cycles stalled due to re-order buffer full. +.It Li RESOURCE_STALLS.FCSW +.Pq Event A2H , Umask 20H +Cycles stalled due to writing the FPU control word. +.It Li RESOURCE_STALLS.MXCSR +.Pq Event A2H , Umask 40H +Cycles stalled due to the MXCSR register rename +occurring to close to a previous MXCSR rename. +.It Li RESOURCE_STALLS.OTHER +.Pq Event A2H , Umask 80H +Cycles stalled while execution was stalled due to +other resource issues. +.It Li CYCLE_ACTIVITY.CYCLES_L2_PENDING +.Pq Event A3H , Umask 01H +Cycles with pending L2 miss loads. Set AnyThread +to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_L1D_PENDING +.Pq Event A3H , Umask 02H +Cycles with pending L1 cache miss loads.Set +AnyThread to count per core. +.It Li CYCLE_ACTIVITY.CYCLES_NO_DISPATCH +.Pq Event A3H , Umask 04H +Cycles of dispatch stalls. Set AnyThread to count per +core. +.It Li DSB2MITE_SWITCHES.COUNT +.Pq Event ABH , Umask 01H +Number of DSB to MITE switches. +.It Li DSB2MITE_SWITCHES.PENALTY_CYCLES +.Pq Event ABH , Umask 02H +Cycles DSB to MITE switches caused delay. +.It Li DSB_FILL.OTHER_CANCEL +.Pq Event ACH , Umask 02H +Cases of cancelling valid DSB fill not because of +exceeding way limit. +.It Li DSB_FILL.EXCEED_DSB_LINES +.Pq Event ACH , Umask 08H +DSB Fill encountered > 3 DSB lines. +.It Li DSB_FILL.ALL_CANCEL +.Pq Event ACH , Umask 0AH +Cases of cancelling valid Decode Stream Buffer +(DSB) fill not because of exceeding way limit. +.It Li ITLB.ITLB_FLUSH +.Pq Event AEH , Umask 01H +Counts the number of ITLB flushes, includes +4k/2M/4M pages. +.It Li OFFCORE_REQUESTS.DEMAND_DATA_RD +.Pq Event B0H , Umask 01H +Demand data read requests sent to uncore. +.It Li OFFCORE_REQUESTS.DEMAND_RFO +.Pq Event B0H , Umask 04H +Demand RFO read requests sent to uncore, including +regular RFOs, locks, ItoM. +.It Li OFFCORE_REQUESTS.ALL_DATA_RD +.Pq Event B0H , Umask 08H +Data read requests sent to uncore (demand and +prefetch). +.It Li UOPS_DISPATCHED.THREAD +.Pq Event B1H , Umask 01H +Counts total number of uops to be dispatched per- +thread each cycle. Set Cmask = 1, INV =1 to count +stall cycles. +.It Li UOPS_DISPATCHED.CORE +.Pq Event B1H , Umask 02H +Counts total number of uops to be dispatched per- +core each cycle. +.It Li OFFCORE_REQUESTS_BUFFER.SQ_FULL +.Pq Event B2H , Umask 01H +Offcore requests buffer cannot take more entries +for this thread core. +.It Li AGU_BYPASS_CANCEL.COUNT +.Pq Event B6H , Umask 01H +Counts executed load operations with all the +following traits: 1. addressing of the format [base + +offset], 2. the offset is between 1 and 2047, 3. the +address specified in the base register is in one page +and the address [base+offset] is in another page. +.It Li OFF_CORE_RESPONSE_0 +.Pq Event B7H , Umask 01H +(Event B7H, Umask 01H) Off-core Response Performance +Monitoring; PMC0 only. Requires programming MSR 01A6H +.It Li OFF_CORE_RESPONSE_1 +.Pq Event BBH , Umask 01H +(Event BBH, Umask 01H) Off-core Response Performance +Monitoring; PMC3 only. Requires programming MSR 01A7H +.It Li TLB_FLUSH.DTLB_THREAD +.Pq Event BDH , Umask 01H +DTLB flush attempts of the thread-specific entries. +.It Li TLB_FLUSH.STLB_ANY +.Pq Event BDH , Umask 20H +Count number of STLB flush attempts. +.It Li L1D_BLOCKS.BANK_CONFLICT_CYCLES +.Pq Event BFH , Umask 05H +Cycles when dispatched loads are cancelled due to +L1D bank conflicts with other load ports. +.It Li INST_RETIRED.ANY_P +.Pq Event C0H , Umask 00H +Number of instructions at retirement. +.It Li INST_RETIRED.ALL +.Pq Event C0H , Umask 01H +Precise instruction retired event with HW to reduce +effect of PEBS shadow in IP distribution. +.It Li OTHER_ASSISTS.ITLB_MISS_RETIRED +.Pq Event C1H , Umask 02H +Instructions that experienced an ITLB miss. +.It Li OTHER_ASSISTS.AVX_STORE +.Pq Event C1H , Umask 08H +Number of assists associated with 256-bit AVX +store operations. +.It Li OTHER_ASSISTS.AVX_TO_SSE +.Pq Event C1H , Umask 10H +Number of transitions from AVX-256 to legacy SSE +when penalty applicable. +.It Li OTHER_ASSISTS.SSE_TO_AVX +.Pq Event C1H , Umask 20H +Number of transitions from SSE to AVX-256 when +penalty applicable. +.It Li UOPS_RETIRED.ALL +.Pq Event C2H , Umask 01H +Counts the number of micro-ops retired, Use +cmask=1 and invert to count active cycles or stalled +cycles. +.It Li UOPS_RETIRED.RETIRE_SLOTS +.Pq Event C2H , Umask 02H +Counts the number of retirement slots used each +cycle. +.It Li MACHINE_CLEARS.MEMORY_ORDERING +.Pq Event C3H , Umask 02H +Counts the number of machine clears due to +memory order conflicts. +.It Li MACHINE_CLEARS.SMC +.Pq Event C3H , Umask 04H +Counts the number of times that a program writes +to a code section. +.It Li MACHINE_CLEARS.MASKMOV +.Pq Event C3H , Umask 20H +Counts the number of executed AVX masked load +operations that refer to an illegal address range +with the mask bits set to 0. +.It Li BR_INST_RETIRED.ALL_BRANCH +.Pq Event C4H , Umask 00H +Branch instructions at retirement. +.It Li BR_INST_RETIRED.CONDITIONAL +.Pq Event C4H , Umask 01H +Counts the number of conditional branch +instructions retired. +.It Li BR_INST_RETIRED.NEAR_CALL +.Pq Event C4H , Umask 02H +Direct and indirect near call instructions retired. +.It Li BR_INST_RETIRED.ALL_BRANCHES +.Pq Event C4H , Umask 04H +Counts the number of branch instructions retired. +.It Li BR_INST_RETIRED.NEAR_RETURN +.Pq Event C4H , Umask 08H +Counts the number of near return instructions +retired. +.It Li BR_INST_RETIRED.NOT_TAKEN +.Pq Event C4H , Umask 10H +Counts the number of not taken branch instructions +retired. +.It Li BR_INST_RETIRED.NEAR_TAKEN +.Pq Event C4H , Umask 20H +Number of near taken branches retired. +.It Li BR_INST_RETIRED.FAR_BRANCH +.Pq Event C4H , Umask 40H +Number of far branches retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 00H +Mispredicted branch instructions at retirement. +.It Li BR_MISP_RETIRED.CONDITIONAL +.Pq Event C5H , Umask 01H +Mispredicted conditional branch instructions retired. +.It Li BR_MISP_RETIRED.NEAR_CALL +.Pq Event C5H , Umask 02H +Direct and indirect mispredicted near call +instructions retired. +.It Li BR_MISP_RETIRED.ALL_BRANCHES +.Pq Event C5H , Umask 04H +Mispredicted macro branch instructions retired. +.It Li BR_MISP_RETIRED.NOT_TAKEN +.Pq Event C5H , Umask 10H +Mispredicted not taken branch instructions retired. +.It Li BR_MISP_RETIRED.TAKEN +.Pq Event C5H , Umask 20H +Mispredicted taken branch instructions retired. +.It Li FP_ASSIST.X87_OUTPUT +.Pq Event CAH , Umask 02H +Number of X87 assists due to output value. +.It Li FP_ASSIST.X87_INPUT +.Pq Event CAH , Umask 04H +Number of X87 assists due to input value. +.It Li FP_ASSIST.SIMD_OUTPUT +.Pq Event CAH , Umask 08H + Number of SIMD FP assists due to output values. +.It Li FP_ASSIST.SIMD_INPUT +.Pq Event CAH , Umask 10H +Number of SIMD FP assists due to input values. +.It Li FP_ASSIST.ANY 1EH +.Pq Event CAH , Umask +Cycles with any input/output SSE* or FP assists. +.It Li ROB_MISC_EVENTS.LBR_INSERTS +.Pq Event CCH , Umask 20H +Count cases of saving new LBR records by +hardware. +.It Li MEM_TRANS_RETIRED.LOAD_LATENCY +.Pq Event CDH , Umask 01H +Sample loads with specified latency threshold. +PMC3 only. +.It Li MEM_TRANS_RETIRED.PRECISE_STORE +.Pq Event CDH , Umask 02H +Sample stores and collect precise store operation +via PEBS record. PMC3 only. +.It Li MEM_UOP_RETIRED.LOADS +.Pq Event D0H , Umask 10H +Qualify retired memory uops that are loads. +Combine with umask 10H, 20H, 40H, 80H. +.It Li MEM_UOP_RETIRED.STORES +.Pq Event D0H , Umask 02H +Qualify retired memory uops that are stores. +Combine with umask 10H, 20H, 40H, 80H. +.It Li MEM_UOP_RETIRED.STLB_MISS +.Pq Event D0H , Umask +Qualify retired memory uops with STLB miss. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.LOCK +.Pq Event D0H , Umask +Qualify retired memory uops with lock. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED.SPLIT +.Pq Event D0H , Umask +Qualify retired memory uops with line split. Must +combine with umask 01H, 02H, to produce counts. +.It Li MEM_UOP_RETIRED_ALL +.Pq Event D0H , Umask +Qualify any retired memory uops. Must combine +with umask 01H, 02H, to produce counts. +.It Li MEM_LOAD_UOPS_RETIRED.L1_HIT +.Pq Event D1H , Umask 01H +Retired load uops with L1 cache hits as data +sources. +.It Li MEM_LOAD_UOPS_RETIRED.L2_HIT +.Pq Event D1H , Umask 02H +Retired load uops with L2 cache hits as data +sources. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_HIT +.Pq Event D1H , Umask 04H +Retired load uops which data sources were data hits +in LLC without snoops required. +.It Li MEM_LOAD_UOPS_RETIRED.LLC_MISS +.Pq Event D1H , Umask 20H +Retired load uops which data sources were data +missed LLC (excluding unknown data source). +.It Li MEM_LOAD_UOPS_RETIRED.HIT_LFB +.Pq Event D1H , Umask 40H +Retired load uops which data sources were load +uops missed L1 but hit FB due to preceding miss to +the same cache line with data not ready. +.It Li MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS +.Pq Event D4H , Umask 02H +Retired load uops with unknown information as data +source in cache serviced the load. +.It Li BACLEARS.ANY +.Pq Event E6H , Umask 01H +Counts the number of times the front end is re- +steered, mainly when the BPU cannot provide a +correct prediction and this is corrected by other +branch handling mechanisms at the front end. +.It Li L2_TRANS.DEMAND_DATA_RD +.Pq Event F0H , Umask 01H +Demand Data Read requests that access L2 cache. +.It Li L2_TRANS.RFO +.Pq Event F0H , Umask 02H +RFO requests that access L2 cache. +.It Li L2_TRANS.CODE_RD +.Pq Event F0H , Umask 04H +L2 cache accesses when fetching instructions. +.It Li L2_TRANS.ALL_PF +.Pq Event F0H , Umask 08H +L2 or LLC HW prefetches that access L2 cache. +.It Li L2_TRANS.L1D_WB +.Pq Event F0H , Umask 10H +L1D writebacks that access L2 cache. +.It Li L2_TRANS.L2_FILL +.Pq Event F0H , Umask 20H +L2 fill requests that access L2 cache. +.It Li L2_TRANS.L2_WB +.Pq Event F0H , Umask 40H +L2 writebacks that access L2 cache. +.It Li L2_TRANS.ALL_REQUESTS +.Pq Event F0H , Umask 80H +Transactions accessing L2 pipe. +.It Li L2_LINES_IN.I +.Pq Event F1H , Umask 01H +L2 cache lines in I state filling L2. +.It Li L2_LINES_IN.S +.Pq Event F1H , Umask 02H +L2 cache lines in S state filling L2. +.It Li L2_LINES_IN.E +.Pq Event F1H , Umask 04H +L2 cache lines in E state filling L2. +.It Li L2_LINES-IN.ALL +.Pq Event F1H , Umask 07H +L2 cache lines filling L2. +.It Li L2_LINES_OUT.DEMAND_CLEAN +.Pq Event F2H , Umask 01H +Clean L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.DEMAND_DIRTY +.Pq Event F2H , Umask 02H +Dirty L2 cache lines evicted by demand. +.It Li L2_LINES_OUT.PF_CLEAN +.Pq Event F2H , Umask 04H +Clean L2 cache lines evicted by L2 prefetch. +.It Li L2_LINES_OUT.PF_DIRTY +.Pq Event F2H , Umask 08H +Dirty L2 cache lines evicted by L2 prefetch. +.It Li L2_LINES_OUT.DIRTY_ALL +.Pq Event F2H , Umask 0AH +Dirty L2 cache lines filling the L2. +.It Li SQ_MISC.SPLIT_LOCK +.Pq Event F4H , Umask 10H +Split locks in SQ. +.El +.Sh SEE ALSO +.Xr pmc 3 , +.Xr pmc.atom 3 , +.Xr pmc.core 3 , +.Xr pmc.iaf 3 , +.Xr pmc.ucf 3 , +.Xr pmc.k7 3 , +.Xr pmc.k8 3 , +.Xr pmc.p4 3 , +.Xr pmc.p5 3 , +.Xr pmc.p6 3 , +.Xr pmc.corei7 3 , +.Xr pmc.corei7uc 3 , +.Xr pmc.ivybridge 3 , +.Xr pmc.ivybridgexeon 3 , +.Xr pmc.sandybridge 3 , +.Xr pmc.sandybridgeuc 3 , +.Xr pmc.westmere 3 , +.Xr pmc.westmereuc 3 , +.Xr pmc.soft 3 , +.Xr pmc.tsc 3 , +.Xr pmc_cpuinfo 3 , +.Xr pmclog 3 , +.Xr hwpmc 4 +.Sh HISTORY +The +.Nm pmc +library first appeared in +.Fx 6.0 . +.Sh AUTHORS +The +.Lb libpmc +library was written by +.An "Joseph Koshy" +.Aq jkoshy at FreeBSD.org . +The support for the Sandy Bridge Xeon +microarchitecture was written by +.An "Hiren Panchasara" +.Aq hiren.panchasara at gmail.com . Property changes on: trunk/lib/libpmc/pmc.sandybridgexeon.3 ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Modified: trunk/lib/libpmc/pmc.soft.3 =================================================================== --- trunk/lib/libpmc/pmc.soft.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.soft.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,9 +21,9 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.soft.3 250600 2013-05-13 15:18:36Z fabient $ .\" -.Dd March 28, 2012 +.Dd February 26, 2013 .Os .Dt PMC.SOFT 3 .Sh NAME @@ -61,6 +61,8 @@ Hard clock ticks. .It Li CLOCK.STAT Stat clock ticks. +.It Li CLOCK.PROF +Profiling clock ticks. .It Li LOCK.FAILED Lock acquisition failed. .It Li PAGE_FAULT.ALL Modified: trunk/lib/libpmc/pmc.tsc.3 =================================================================== --- trunk/lib/libpmc/pmc.tsc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.tsc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.tsc.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd October 4, 2008 .Dt PMC.TSC 3 Modified: trunk/lib/libpmc/pmc.ucf.3 =================================================================== --- trunk/lib/libpmc/pmc.ucf.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.ucf.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.ucf.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd March 30, 2010 .Dt PMC.UCF 3 Modified: trunk/lib/libpmc/pmc.westmere.3 =================================================================== --- trunk/lib/libpmc/pmc.westmere.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.westmere.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.westmere.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd February 25, 2012 .Dt PMC.WESTMERE 3 Modified: trunk/lib/libpmc/pmc.westmereuc.3 =================================================================== --- trunk/lib/libpmc/pmc.westmereuc.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc.westmereuc.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.westmereuc.3 236238 2012-05-29 14:50:21Z fabient $ .\" .Dd March 24, 2010 .Dt PMC.WESTMEREUC 3 Modified: trunk/lib/libpmc/pmc_allocate.3 =================================================================== --- trunk/lib/libpmc/pmc_allocate.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_allocate.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_allocate.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd September 22, 2008 .Dt PMC_ALLOCATE 3 Modified: trunk/lib/libpmc/pmc_attach.3 =================================================================== --- trunk/lib/libpmc/pmc_attach.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_attach.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_attach.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_ATTACH 3 Modified: trunk/lib/libpmc/pmc_capabilities.3 =================================================================== --- trunk/lib/libpmc/pmc_capabilities.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_capabilities.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_capabilities.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd September 22, 2008 .Dt PMC_CAPABILITIES 3 Modified: trunk/lib/libpmc/pmc_configure_logfile.3 =================================================================== --- trunk/lib/libpmc/pmc_configure_logfile.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_configure_logfile.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_configure_logfile.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 24, 2007 .Dt PMC_CONFIGURE_LOGFILE 3 Modified: trunk/lib/libpmc/pmc_disable.3 =================================================================== --- trunk/lib/libpmc/pmc_disable.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_disable.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_disable.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd September 22, 2008 .Dt PMC_ENABLE 3 Modified: trunk/lib/libpmc/pmc_event_names_of_class.3 =================================================================== --- trunk/lib/libpmc/pmc_event_names_of_class.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_event_names_of_class.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_event_names_of_class.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 23, 2007 .Dt PMC_EVENT_NAMES_OF_CLASS 3 Modified: trunk/lib/libpmc/pmc_get_driver_stats.3 =================================================================== --- trunk/lib/libpmc/pmc_get_driver_stats.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_get_driver_stats.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_get_driver_stats.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_GET_DRIVER_STATS 3 Modified: trunk/lib/libpmc/pmc_get_msr.3 =================================================================== --- trunk/lib/libpmc/pmc_get_msr.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_get_msr.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_get_msr.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_GET_MSR 3 Modified: trunk/lib/libpmc/pmc_init.3 =================================================================== --- trunk/lib/libpmc/pmc_init.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_init.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_init.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 24, 2007 .Dt PMC_INIT 3 Modified: trunk/lib/libpmc/pmc_name_of_capability.3 =================================================================== --- trunk/lib/libpmc/pmc_name_of_capability.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_name_of_capability.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_name_of_capability.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 24, 2007 .Dt PMC_NAME_OF_CAPABILITY 3 Modified: trunk/lib/libpmc/pmc_read.3 =================================================================== --- trunk/lib/libpmc/pmc_read.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_read.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_read.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_READ 3 Modified: trunk/lib/libpmc/pmc_set.3 =================================================================== --- trunk/lib/libpmc/pmc_set.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_set.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_set.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd November 25, 2007 .Dt PMC_SET 3 Modified: trunk/lib/libpmc/pmc_start.3 =================================================================== --- trunk/lib/libpmc/pmc_start.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmc_start.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc_start.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd September 22, 2008 .Dt PMC_START 3 Modified: trunk/lib/libpmc/pmclog.3 =================================================================== --- trunk/lib/libpmc/pmclog.3 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmclog.3 2016-05-27 03:40:40 UTC (rev 7580) @@ -21,7 +21,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $MidnightBSD$ +.\" $FreeBSD: release/9.2.0/lib/libpmc/pmclog.3 232151 2012-02-25 10:10:43Z brueffer $ .\" .Dd March 26, 2006 .Dt PMCLOG 3 Modified: trunk/lib/libpmc/pmclog.c =================================================================== --- trunk/lib/libpmc/pmclog.c 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmclog.c 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005-2007 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -29,7 +30,7 @@ */ #include -__MBSDID("$MidnightBSD$"); +__FBSDID("$FreeBSD: release/9.2.0/lib/libpmc/pmclog.c 236238 2012-05-29 14:50:21Z fabient $"); #include #include Modified: trunk/lib/libpmc/pmclog.h =================================================================== --- trunk/lib/libpmc/pmclog.h 2016-05-27 03:36:07 UTC (rev 7579) +++ trunk/lib/libpmc/pmclog.h 2016-05-27 03:40:40 UTC (rev 7580) @@ -1,3 +1,4 @@ +/* $MidnightBSD$ */ /*- * Copyright (c) 2005-2007 Joseph Koshy * Copyright (c) 2007 The FreeBSD Foundation @@ -27,7 +28,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $MidnightBSD$ + * $FreeBSD: release/9.2.0/lib/libpmc/pmclog.h 236238 2012-05-29 14:50:21Z fabient $ */ #ifndef _PMCLOG_H_ From laffer1 at midnightbsd.org Thu May 26 23:42:18 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:42:18 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7581] trunk/UPDATING: document hwpmc changes Message-ID: <201605270342.u4R3gIb3046782@stargazer.midnightbsd.org> Revision: 7581 http://svnweb.midnightbsd.org/src/?rev=7581 Author: laffer1 Date: 2016-05-26 23:42:17 -0400 (Thu, 26 May 2016) Log Message: ----------- document hwpmc changes Modified Paths: -------------- trunk/UPDATING Modified: trunk/UPDATING =================================================================== --- trunk/UPDATING 2016-05-27 03:40:40 UTC (rev 7580) +++ trunk/UPDATING 2016-05-27 03:42:17 UTC (rev 7581) @@ -1,5 +1,10 @@ Updating Information for MidnightBSD users. +20160526: + Add support for Ivybridge and Haswell Intel CPUs to hwpmc(4). + + Fix libpmc(3) build with clang compiler. + 20160519: Kernel Security updates From laffer1 at midnightbsd.org Thu May 26 23:45:41 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:45:41 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21464] trunk/graphics/ImageMagick7: add ImageMagick7 Message-ID: <201605270345.u4R3jfOm047368@stargazer.midnightbsd.org> Revision: 21464 http://svnweb.midnightbsd.org/mports/?rev=21464 Author: laffer1 Date: 2016-05-26 23:45:40 -0400 (Thu, 26 May 2016) Log Message: ----------- add ImageMagick7 Added Paths: ----------- trunk/graphics/ImageMagick7/ trunk/graphics/ImageMagick7/Makefile trunk/graphics/ImageMagick7/distinfo trunk/graphics/ImageMagick7/pkg-descr trunk/graphics/ImageMagick7/pkg-plist Added: trunk/graphics/ImageMagick7/Makefile =================================================================== --- trunk/graphics/ImageMagick7/Makefile (rev 0) +++ trunk/graphics/ImageMagick7/Makefile 2016-05-27 03:45:40 UTC (rev 21464) @@ -0,0 +1,443 @@ +# $MidnightBSD$ +# $FreeBSD: head/graphics/ImageMagick7/Makefile 409613 2016-02-26 15:33:49Z kwm $ + +PORTNAME= ImageMagick +DISTVERSION= 7.0.0-0~beta${DATE} +PORTREVISION= 0 +CATEGORIES= graphics perl5 +MASTER_SITES= http://www.imagemagick.org/download/ \ + http://www.imagemagick.org/download/beta/ \ + FREEBSD_LOCAL/kwm \ + http://www.imagemagick.org/download/legacy/ \ + http://servingzone.com/mirrors/ImageMagick/ \ + http://mirror.checkdomain.de/imagemagick/ \ + http://image_magick.veidrodis.com/image_magick/ \ + http://imagemagick.spd.co.il/ \ + http://www.champground.com/imagemagick/ \ + http://ftp.surfnet.nl/pub/ImageMagick/ \ + http://mirror.searchdaimon.com/ImageMagick/ \ + http://mirror.is.co.za/pub/imagemagick/ \ + http://imagemagick.mirrorcatalogs.com/ \ + ftp://ftp.imagemagick.org/pub/ImageMagick/ \ + ftp://mirror.aarnet.edu.au/pub/imagemagick/ \ + ftp://mirror.checkdomain.de/imagemagick/ \ + ftp://ftp.kddlabs.co.jp/graphics/ImageMagick/ \ + ftp://ftp.u-aizu.ac.jp/pub/graphics/image/ImageMagick/imagemagick.org/ \ + ftp://ftp.nluug.nl/pub/ImageMagick/ \ + ftp://mirror.searchdaimon.com/ImageMagick/ \ + ftp://sunsite.icm.edu.pl/packages/ImageMagick/ \ + ftp://ftp.tpnet.pl/pub/graphics/ImageMagick/ \ + ftp://ftp.sunet.se/pub/multimedia/graphics/ImageMagick/ \ + ftp://ftp.is.co.za/pub/imagemagick/ \ + ftp://ftp.fifi.org/pub/ImageMagick/ +PKGNAMESUFFIX= 7 + +MAINTAINER= ports at MidnightBSD.org +COMMENT= Image processing tools (unstable version) + +LICENSE= apache2 +LICENSE_FILE= ${WRKSRC}/LICENSE + +DATE= 20160225 +WRKSRC= ${WRKDIR}/${PORTNAME}-7.0.0-0 + +LIB_DEPENDS= libltdl.so:${PORTSDIR}/devel/libltdl + +CONFLICTS_INSTALL= execline-[0-9]* # bin/import + +# This port uses .la files, keep libtool:keepla! (magick/module.c) +USES= cpe gmake libtool:keepla pathfix perl5 pkgconfig:both shebangfix tar:xz +CPE_PRODUCT= imagemagick +CPE_VENDOR= imagemagick +SHEBANG_FILES= www/source/examples.pl +GNU_CONFIGURE= yes +CONFIGURE_ENV= MAKE=${MAKE_CMD} +CONFIGURE_ARGS= --without-dps +USE_LDCONFIG= yes +USE_GNOME= libxml2 + +# make sure LOCALBASE is placed at the end of the compiler lookup so the configure +# script can find openjpeg2 headers before the openjpeg15 headers +CPPFLAGS+= -isystem${LOCALBASE}/include +LDFLAGS+= -Wl,-Y${LOCALBASE}/lib + +SAMPLE_FILES= coder.xml colors.xml delegates.xml log.xml magic.xml mime.xml \ + policy.xml quantization-table.xml thresholds.xml type-dejavu.xml \ + type-ghostscript.xml type-windows.xml type.xml + +#PLIST_SUB= PORTVERSION=${PORTVERSION:R} +PLIST_SUB+= PORTVERSION=${PORTVERSION:R:R} SITE_ARCH=${SITE_ARCH_REL} \ + PERL5_MAN3=man/man3 + +OPTIONS_DEFINE= BZIP2 DOCS DJVU FFTW FONTCONFIG FPX FREETYPE \ + GRAPHVIZ GSLIB JPEG2000 JBIG JPEG LCMS2 LZMA LQR MODULES \ + OPENEXR OPENMP PANGO PDF PERL PNG SVG TESTS TIFF WEBP WMF \ + THREADS X11 16BIT_PIXEL HDRI +OPTIONS_DEFAULT= 16BIT_PIXEL BZIP2 FFTW FONTCONFIG FPX FREETYPE \ + JPEG2000 JBIG JPEG LCMS2 LZMA LQR MODULES PDF PERL PNG SVG \ + TIFF WEBP WMF THREADS X11 HDRI + +16BIT_PIXEL_DESC= 16bit pixel support +JPEG2000_DESC= OpenJPEG 2000 support via openjpeg +DJVU_DESC= DJVU format support (needs THREADS) +GSLIB_DESC= libgs (Postscript SHLIB) support +HDRI_DESC= High dynamic range images support +MODULES_DESC= Modules support +SVG_DESC= SVG vector image format support (via librsvg) +TESTS_DESC= Run bundled self-tests after build +#SIMD_CONFIGURE_WITH= gcc-arch +CONFIGURE_ARGS+= --without-gcc-arch + +.include + +.if ${PORT_OPTIONS:MHDRI} +CONFIGURE_ARGS+= --enable-hdri +_HDRI=HDRI +.else +CONFIGURE_ARGS+= --disable-hdri +_HDRI="" +.endif +PLIST_SUB+= HDRI=${_HDRI} + +.if ${PORT_OPTIONS:MTHREADS} +_IMAGEMAGICK_THREADS=yes +_IMAGEMAGICK_THREADS_MSG=with threads +. if exists(${PERL}) +PERL_THREADED!= ${SH} -c 'case `perl --version` in *freebsd-thread*) ${ECHO_CMD} yes ;; esac'; ${ECHO_CMD} +. else +# if ${PERL} doesn't exists, assume we dealing with threaded perl. +PERL_THREADED= yes +. endif +.else +_IMAGEMAGICK_THREADS=no +_IMAGEMAGICK_THREADS_MSG=without threads +_IMAGEMAGICK_THREADS_IGNORE_MSG=. Define WITH_THREADS +.endif + +.if ${PORT_OPTIONS:MPERL} +CONFIGURE_ARGS+= --with-perl=${PERL} \ + --with-perl-options="MAKE=${MAKE_CMD}" +PLIST_SUB+= WITH_PERL='' +# PerlMagick does not work with threads, if perl is not threaded, and vice versa +. if defined(PERL_THREADED) +_IMAGEMAGICK_THREADS_PERL_MSG=Perl is threaded +_IMAGEMAGICK_THREADS=yes +. else +_IMAGEMAGICK_THREADS_PERL_MSG=Perl is non-threaded +_IMAGEMAGICK_THREADS_IGNORE_MSG=. ${_IMAGEMAGICK_THREADS_PERL_MSG}. Reinstall Perl with threads or undefine WITH_IMAGEMAGICK_PERL +. if ${_IMAGEMAGICK_THREADS} == "yes" +IGNORE=${_IMAGEMAGICK_THREADS_IGNORE_MSG} or undefine WITH_THREADS +. endif +_IMAGEMAGICK_THREADS=no +. endif +.else +CONFIGURE_ARGS+= --without-perl +PLIST_SUB+= WITH_PERL='@comment ' +.endif + +.if ${_IMAGEMAGICK_THREADS} == "yes" +CONFIGURE_ARGS+= --with-threads +CONFIGURE_ENV+= PTHREAD_LIBS="-lpthread" +LDFLAGS+= -lpthread +.else +CONFIGURE_ARGS+= --without-threads +_IMAGEMAGICK_THREADS=no +.endif + +# OpenMP +.if ${PORT_OPTIONS:MOPENMP} +. if ${_IMAGEMAGICK_THREADS} == "no" +IGNORE=OpenMP requires threads${_IMAGEMAGICK_THREADS_IGNORE_MSG} +. else +CONFIGURE_ARGS+= --enable-openmp +USES+= compiler:openmp +. endif +.else +CONFIGURE_ARGS+= --disable-openmp +.endif + +.if ${PORT_OPTIONS:M16BIT_PIXEL} +_QBIT=Q16 +.else +# Faster, but poor quality +CONFIGURE_ARGS+= --with-quantum-depth=8 +_QBIT=Q8 +.endif +PLIST_SUB+= QBIT=${_QBIT} + +.if defined(WITH_WINDOWS_FONT_DIR) +CONFIGURE_ARGS+= --with-windows-font-dir=${WITH_WINDOWS_FONT_DIR} +.endif + +# Loadable coders, smaller executable, but PerlMagick not really works +# ('make test' there works) +.if ${PORT_OPTIONS:MMODULES} +CONFIGURE_ARGS+= --with-modules +PLIST_SUB+= MODULES='' +.else +CONFIGURE_ARGS+= --without-modules +PLIST_SUB+= MODULES='@comment ' +.endif + +.if ${PORT_OPTIONS:MOPENEXR} +. if ${_IMAGEMAGICK_THREADS} == "no" +IGNORE=OpenEXR requires threads. ${_IMAGEMAGICK_THREADS_IGNORE_MSG} +. else +LIB_DEPENDS+= libIlmImf.so:${PORTSDIR}/graphics/OpenEXR +PLIST_SUB+= OPENEXR="" +. endif +.else +CONFIGURE_ARGS+= --without-openexr +PLIST_SUB+= OPENEXR="@comment " +.endif + +.if ${PORT_OPTIONS:MDJVU} +. if ${_IMAGEMAGICK_THREADS} == "no" +IGNORE=DjVu requires threads${_IMAGEMAGICK_THREADS_IGNORE_MSG} +. endif +LIB_DEPENDS+= libdjvulibre.so:${PORTSDIR}/graphics/djvulibre +PLIST_SUB+= DJVU="" +.else +CONFIGURE_ARGS+= --without-djvu +PLIST_SUB+= DJVU="@comment " +.endif + +.if ${PORT_OPTIONS:MJPEG} +USES+= jpeg +PLIST_SUB+= JPEG="" +.else +CONFIGURE_ARGS+= --without-jpeg +PLIST_SUB+= JPEG="@comment " +.endif + +.if ${PORT_OPTIONS:MPNG} +LIB_DEPENDS+= libpng.so:${PORTSDIR}/graphics/png +PLIST_SUB+= PNG="" +.else +CONFIGURE_ARGS+= --without-png +PLIST_SUB+= PNG="@comment " +.endif + +.if ${PORT_OPTIONS:MTIFF} +LIB_DEPENDS+= libtiff.so:${PORTSDIR}/graphics/tiff +PLIST_SUB+= TIFF="" +.else +CONFIGURE_ARGS+= --without-tiff +PLIST_SUB+= TIFF="@comment " +.endif + +.if ${PORT_OPTIONS:MGSLIB} +CONFIGURE_ARGS+= --with-gslib +. if ${PORT_OPTIONS:MX11} +USES+= ghostscript:x11 +. else +USES+= ghostscript +. endif +.else +CONFIGURE_ARGS+= --without-gslib +.endif + +.if ${PORT_OPTIONS:MLQR} +CONFIGURE_ARGS+= --with-lqr +LIB_DEPENDS+= liblqr-1.so:${PORTSDIR}/graphics/liblqr-1 +.else +CONFIGURE_ARGS+= --without-lqr +.endif + +.if ${PORT_OPTIONS:MFFTW} +CONFIGURE_ARGS+= --with-fftw +LIB_DEPENDS+= libfftw3.so:${PORTSDIR}/math/fftw3 +.else +CONFIGURE_ARGS+= --without-fftw +.endif + +# Produce BZip compressed MIFF images +.if empty(PORT_OPTIONS:MBZIP2) +CONFIGURE_ARGS+= --without-bzlib +.endif + +# FPX (FlashPIX) images +.if ${PORT_OPTIONS:MFPX} +LIB_DEPENDS+= libfpx.so:${PORTSDIR}/graphics/libfpx +CONFIGURE_ARGS+= --with-fpx +PLIST_SUB+= FPX="" +.else +CONFIGURE_ARGS+= --without-fpx +PLIST_SUB+= FPX="@comment " +.endif + +# JBIG images (lossless compression for bi-level images) +.if ${PORT_OPTIONS:MJBIG} +LIB_DEPENDS+= libjbig.so:${PORTSDIR}/graphics/jbigkit +PLIST_SUB+= JBIG="" +.else +CONFIGURE_ARGS+= --without-jbig +PLIST_SUB+= JBIG="@comment " +.endif + +# JPEG2000 images (wavelet-based lossy compression) +.if ${PORT_OPTIONS:MJPEG2000} +LIB_DEPENDS+= libopenjp2.so:${PORTSDIR}/graphics/openjpeg +PLIST_SUB+= JPEG2000="" +.else +CONFIGURE_ARGS+= --without-openjp2 +PLIST_SUB+= JPEG2000="@comment " +.endif + +# GraphViz dot graphs +.if ${PORT_OPTIONS:MGRAPHVIZ} +LIB_DEPENDS+= libgvc.so:${PORTSDIR}/graphics/graphviz +CFLAGS+= -I${LOCALBASE}/include/graphviz +LDFLAGS+= -L${LOCALBASE}/lib/graphviz +.else +CONFIGURE_ARGS+= --without-gvc +.endif + +# LZMA support +# needs manula override for base system... +.if ! ${PORT_OPTIONS:MLZMA} +CONFIGURE_ARGS+= --without-lzma +.endif + +# LCMS (Little CMS) color management version 2 and 1 (mutually exclusive) +.if ${PORT_OPTIONS:MLCMS2} +LIB_DEPENDS+= liblcms2.so:${PORTSDIR}/graphics/lcms2 +.else +CONFIGURE_ARGS+= --without-lcms +.endif + +# Freetype (TrueType Font) support +.if ${PORT_OPTIONS:MFREETYPE} +LIB_DEPENDS+= libfreetype.so:${PORTSDIR}/print/freetype2 +CONFIGURE_ARGS+= --with-freetype +.else +CONFIGURE_ARGS+= --without-freetype +.endif + +# Webp support +.if ${PORT_OPTIONS:MWEBP} +LIB_DEPENDS+= libwebp.so:${PORTSDIR}/graphics/webp +CONFIGURE_ARGS+= --with-webp +PLIST_SUB+= WEBP="" +.else +CONFIGURE_ARGS+= --without-webp +PLIST_SUB+= WEBP="@comment " +.endif + +# Fontconfig support +.if ${PORT_OPTIONS:MFONTCONFIG} +LIB_DEPENDS+= libfontconfig.so:${PORTSDIR}/x11-fonts/fontconfig +CONFIGURE_ARGS+= --with-fontconfig +.else +CONFIGURE_ARGS+= --without-fontconfig +.endif + +# WMF (Windows Meta File) images +.if ${PORT_OPTIONS:MWMF} +. if ${PORT_OPTIONS:MX11} +LIB_DEPENDS+= libwmf.so:${PORTSDIR}/graphics/libwmf +. else +LIB_DEPENDS+= libwmf.so:${PORTSDIR}/graphics/libwmf-nox11 +. endif +CONFIGURE_ARGS+= --with-wmf=yes +PLIST_SUB+= WMF="" +.else +CONFIGURE_ARGS+= --without-wmf +PLIST_SUB+= WMF="@comment " +.endif + +# SVG (Scalable Vector Graphics) requires both libxml2 and X11 +.if ${PORT_OPTIONS:MSVG} && ${PORT_OPTIONS:MX11} +LIB_DEPENDS+= librsvg-2.so:${PORTSDIR}/graphics/librsvg2 +CONFIGURE_ARGS+= --with-rsvg +.else +CONFIGURE_ARGS+= --without-rsvg +.endif + +# Pango support +.if ${PORT_OPTIONS:MPANGO} && ${PORT_OPTIONS:MX11} +USE_GNOME+= pango +PLIST_SUB+= PANGO="" +.else +CONFIGURE_ARGS+= --without-pango +PLIST_SUB+= PANGO="@comment " +.endif + +# PDF (Adobe Portable Document Format) support +.if ${PORT_OPTIONS:MPDF} +. if ${PORT_OPTIONS:MX11} +USES+= ghostscript:x11 +. else +USES+= ghostscript +. endif +.endif + +.if ! ${PORT_OPTIONS:MX11} +CONFIGURE_ARGS+= --without-x +CONFLICTS+= ImageMagick7-* +PLIST_SUB+= X11='@comment ' +PKGNAMESUFFIX= 7-nox11 +.else +CONFLICTS+= ImageMagick7-nox11-* +CONFLICTS+= display-[0-9]* +CONFIGURE_ARGS+= --with-x +USE_XORG= xext xt +PLIST_SUB+= X11='' +.endif + +.if ${PORT_OPTIONS:MDOCS} +INSTALL_TARGET= install-strip install-docDATA install-data-html +.else +INSTALL_TARGET= install-strip +.endif + +.if ${PORT_OPTIONS:MTESTS} +. if ${PORT_OPTIONS:MX11} +USES+= ghostscript:x11,build +. else +USES+= ghostscript:build +. endif +.endif + +.if defined(USER) && ${USER} == kwm +upload: + scp ${DISTDIR}/${DISTNAME}.tar.xz \ + kwm at freefall.freebsd.org:public_distfiles/ +.endif + +post-patch: +# strip library name of variable parts that can change due to +# the HDRI and Q16 option + @${REINPLACE_CMD} -e 's|_ at MAGICK_ABI_SUFFIX@||g; \ + s|\. at MAGICK_ABI_SUFFIX@||g' \ + ${WRKSRC}/Makefile.in + @${REINPLACE_CMD} -e 's|@\. at MAGICK_ABI_SUFFIX@|@|g' \ + ${WRKSRC}/PerlMagick/Makefile.PL.in \ + ${WRKSRC}/PerlMagick/quantum/Makefile.PL.in \ + ${WRKSRC}/Magick++/lib/Magick++.pc.in \ + ${WRKSRC}/MagickCore/MagickCore.pc.in \ + ${WRKSRC}/MagickWand/MagickWand.pc.in + +pre-configure: +.if defined(_IMAGEMAGICK_THREADS_PERL_MSG) + @${ECHO_CMD} '###################################################################' + @${ECHO_CMD} NOTICE: ${_IMAGEMAGICK_THREADS_PERL_MSG}. Building ImageMagick ${_IMAGEMAGICK_THREADS_MSG}. + @${ECHO_CMD} '###################################################################' +.endif + +.if ${PORT_OPTIONS:MSVG} && ! ${PORT_OPTIONS:MX11} + @${ECHO_CMD} NOTICE: SVG format support disabled, requires X11 +.endif + +post-install: +.for i in ${SAMPLE_FILES} + @${MV} ${STAGEDIR}${PREFIX}/etc/ImageMagick-7/${i} \ + ${STAGEDIR}${PREFIX}/etc/ImageMagick-7/${i}.sample +.endfor + +post-install-TESTS-on: test + +do-test: + -cd ${WRKSRC} && ${SETENV} ${MAKE_ENV} limits -m 20m ${MAKE} ${_MAKE_JOBS} check + +.include Property changes on: trunk/graphics/ImageMagick7/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/graphics/ImageMagick7/distinfo =================================================================== --- trunk/graphics/ImageMagick7/distinfo (rev 0) +++ trunk/graphics/ImageMagick7/distinfo 2016-05-27 03:45:40 UTC (rev 21464) @@ -0,0 +1,2 @@ +SHA256 (ImageMagick-7.0.0-0~beta20160225.tar.xz) = 35f9ed811415633ab4ed6fa4dd6ada625421e87d38dae98e5afc7d30e2a5e5c6 +SIZE (ImageMagick-7.0.0-0~beta20160225.tar.xz) = 8292428 Property changes on: trunk/graphics/ImageMagick7/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/graphics/ImageMagick7/pkg-descr =================================================================== --- trunk/graphics/ImageMagick7/pkg-descr (rev 0) +++ trunk/graphics/ImageMagick7/pkg-descr 2016-05-27 03:45:40 UTC (rev 21464) @@ -0,0 +1,19 @@ + +*** This is a UNSTABLE development snapshot. API/ABI breakage guaranteed *** + +*** This port is a best efford and updates might be irregular *** + +ImageMagick is a package for display and interactive manipulation of +images. The package includes tools for image conversion, annotation, +compositing, animation, and creating montages. ImageMagick can read and +write many of the more popular image formats (e.g. JPEG, TIFF, PNM, XPM, +Photo CD, etc.). + +The package can be built _without_ the GUI (X11) support at all -- it +will not have the display, import, and animate functionality, but remain +extremely useful for image manipulation. + +The optional "display" utility conflicts with the utility of the +same name from the misc/display port/package. + +WWW: http://www.ImageMagick.org/ Property changes on: trunk/graphics/ImageMagick7/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/graphics/ImageMagick7/pkg-plist =================================================================== --- trunk/graphics/ImageMagick7/pkg-plist (rev 0) +++ trunk/graphics/ImageMagick7/pkg-plist 2016-05-27 03:45:40 UTC (rev 21464) @@ -0,0 +1,1538 @@ +bin/Magick++-config +bin/MagickCore-config +bin/MagickWand-config +bin/animate +bin/compare +bin/composite +bin/conjure +bin/convert +bin/display +bin/identify +bin/import +bin/magick +bin/magick-script +bin/mogrify +bin/montage +bin/stream + at sample etc/ImageMagick-7/coder.xml.sample + at sample etc/ImageMagick-7/colors.xml.sample + at sample etc/ImageMagick-7/delegates.xml.sample + at sample etc/ImageMagick-7/log.xml.sample + at sample etc/ImageMagick-7/magic.xml.sample + at sample etc/ImageMagick-7/mime.xml.sample + at sample etc/ImageMagick-7/policy.xml.sample + at sample etc/ImageMagick-7/quantization-table.xml.sample + at sample etc/ImageMagick-7/thresholds.xml.sample + at sample etc/ImageMagick-7/type-dejavu.xml.sample + at sample etc/ImageMagick-7/type-ghostscript.xml.sample + at sample etc/ImageMagick-7/type-windows.xml.sample + at sample etc/ImageMagick-7/type.xml.sample +include/ImageMagick-7/Magick++.h +include/ImageMagick-7/Magick++/Blob.h +include/ImageMagick-7/Magick++/CoderInfo.h +include/ImageMagick-7/Magick++/Color.h +include/ImageMagick-7/Magick++/Drawable.h +include/ImageMagick-7/Magick++/Exception.h +include/ImageMagick-7/Magick++/Functions.h +include/ImageMagick-7/Magick++/Geometry.h +include/ImageMagick-7/Magick++/Image.h +include/ImageMagick-7/Magick++/Include.h +include/ImageMagick-7/Magick++/Montage.h +include/ImageMagick-7/Magick++/Pixels.h +include/ImageMagick-7/Magick++/ResourceLimits.h +include/ImageMagick-7/Magick++/STL.h +include/ImageMagick-7/Magick++/Statistic.h +include/ImageMagick-7/Magick++/TypeMetric.h +include/ImageMagick-7/MagickCore/MagickCore.h +include/ImageMagick-7/MagickCore/accelerate.h +include/ImageMagick-7/MagickCore/animate.h +include/ImageMagick-7/MagickCore/annotate.h +include/ImageMagick-7/MagickCore/artifact.h +include/ImageMagick-7/MagickCore/attribute.h +include/ImageMagick-7/MagickCore/blob.h +include/ImageMagick-7/MagickCore/cache-view.h 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+%%PORTDOCS%%%%DOCSDIR%%-7/www/api/drawing-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/drawing-wand.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/effect.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/effect.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/enhance.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/enhance.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/exception.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/exception.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/feature.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/feature.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/fourier.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/fourier.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/fx.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/fx.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/histogram.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/histogram.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/image-view.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/image-view.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/image.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/image.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/layer.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/layer.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/list.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/list.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick++-classes.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-deprecate.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-deprecate.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-image.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-image.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-property.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-property.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick-wand.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/magick.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/memory.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/memory.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/mime.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/mime.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/module.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/module.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/mogrify.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/mogrify.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/monitor.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/monitor.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/montage.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/montage.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/morphology.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/morphology.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/paint.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/paint.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/pixel-iterator.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/pixel-iterator.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/pixel-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/pixel-wand.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/profile.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/profile.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/property.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/property.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/quantize.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/quantize.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/registry.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/registry.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/resize.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/resize.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/resource.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/resource.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/segment.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/segment.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/shear.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/shear.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/signature.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/signature.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/statistic.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/statistic.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/stream.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/stream.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/transform.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/transform.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/version.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/version.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/wand-view.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/api/wand-view.php +%%PORTDOCS%%%%DOCSDIR%%-7/www/architecture.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/binary-releases.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/changelog.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/cipher.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/color-management.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/color.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/command-line-options.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/command-line-processing.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/command-line-tools.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/compare.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/compose.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/composite.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/conjure.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/connected-components.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/contact.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/convert.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/css/README.txt +%%PORTDOCS%%%%DOCSDIR%%-7/www/css/magick.css +%%PORTDOCS%%%%DOCSDIR%%-7/www/display.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/distribute-pixel-cache.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/download.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/escape.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/examples.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/exception.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/export.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/favicon.ico +%%PORTDOCS%%%%DOCSDIR%%-7/www/formats.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/fx.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/gradient.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/high-dynamic-range.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/history.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/identify.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/import.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/index.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/install-source.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/jp2.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/js/README.txt +%%PORTDOCS%%%%DOCSDIR%%-7/www/js/magick.js +%%PORTDOCS%%%%DOCSDIR%%-7/www/license.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/links.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick++.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick-core.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick-vector-graphics.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/miff.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/mogrify.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/montage.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/motion-picture.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/opencl.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/openmp.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/perl-magick.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/porting.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/quantize.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/resources.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/search.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/sitemap.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/analyze.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/coder.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/colors.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/configure.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/contrast.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/core.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/delegates.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/english.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/examples.pl +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/francais.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/incantation.msl +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/locale.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/log.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/magic.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/mgk.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/mime.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/piechart.mvg +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/piechart.svg +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/policy.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/thresholds.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/type-ghostscript.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/type-windows.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/type.xml +%%PORTDOCS%%%%DOCSDIR%%-7/www/source/wand.c +%%PORTDOCS%%%%DOCSDIR%%-7/www/sponsors.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/stream.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/support.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/wand.png +%%PORTDOCS%%%%DOCSDIR%%-7/www/webp.html Property changes on: trunk/graphics/ImageMagick7/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property From laffer1 at midnightbsd.org Thu May 26 23:45:49 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Thu, 26 May 2016 23:45:49 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21465] trunk/graphics/Makefile: add ImageMagick7 Message-ID: <201605270345.u4R3jnsG047440@stargazer.midnightbsd.org> Revision: 21465 http://svnweb.midnightbsd.org/mports/?rev=21465 Author: laffer1 Date: 2016-05-26 23:45:49 -0400 (Thu, 26 May 2016) Log Message: ----------- add ImageMagick7 Modified Paths: -------------- trunk/graphics/Makefile Modified: trunk/graphics/Makefile =================================================================== --- trunk/graphics/Makefile 2016-05-27 03:45:40 UTC (rev 21464) +++ trunk/graphics/Makefile 2016-05-27 03:45:49 UTC (rev 21465) @@ -5,6 +5,7 @@ SUBDIR += GraphicsMagick SUBDIR += Hermes SUBDIR += ImageMagick +SUBDIR += ImageMagick7 SUBDIR += OpenEXR SUBDIR += aalib SUBDIR += agg From laffer1 at midnightbsd.org Fri May 27 00:17:36 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 00:17:36 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21466] trunk/graphics/ImageMagick7: update image magic 7 to a release version Message-ID: <201605270417.u4R4HatB050597@stargazer.midnightbsd.org> Revision: 21466 http://svnweb.midnightbsd.org/mports/?rev=21466 Author: laffer1 Date: 2016-05-27 00:17:35 -0400 (Fri, 27 May 2016) Log Message: ----------- update image magic 7 to a release version Modified Paths: -------------- trunk/graphics/ImageMagick7/Makefile trunk/graphics/ImageMagick7/distinfo trunk/graphics/ImageMagick7/pkg-descr trunk/graphics/ImageMagick7/pkg-plist Added Paths: ----------- trunk/graphics/ImageMagick7/files/ trunk/graphics/ImageMagick7/files/patch-config_policy.xml Modified: trunk/graphics/ImageMagick7/Makefile =================================================================== --- trunk/graphics/ImageMagick7/Makefile 2016-05-27 03:45:49 UTC (rev 21465) +++ trunk/graphics/ImageMagick7/Makefile 2016-05-27 04:17:35 UTC (rev 21466) @@ -2,12 +2,9 @@ # $FreeBSD: head/graphics/ImageMagick7/Makefile 409613 2016-02-26 15:33:49Z kwm $ PORTNAME= ImageMagick -DISTVERSION= 7.0.0-0~beta${DATE} -PORTREVISION= 0 +DISTVERSION= 7.0.1-5 CATEGORIES= graphics perl5 MASTER_SITES= http://www.imagemagick.org/download/ \ - http://www.imagemagick.org/download/beta/ \ - FREEBSD_LOCAL/kwm \ http://www.imagemagick.org/download/legacy/ \ http://servingzone.com/mirrors/ImageMagick/ \ http://mirror.checkdomain.de/imagemagick/ \ @@ -38,15 +35,13 @@ LICENSE= apache2 LICENSE_FILE= ${WRKSRC}/LICENSE -DATE= 20160225 -WRKSRC= ${WRKDIR}/${PORTNAME}-7.0.0-0 - LIB_DEPENDS= libltdl.so:${PORTSDIR}/devel/libltdl CONFLICTS_INSTALL= execline-[0-9]* # bin/import # This port uses .la files, keep libtool:keepla! (magick/module.c) -USES= cpe gmake libtool:keepla pathfix perl5 pkgconfig:both shebangfix tar:xz +USES= cpe gmake libtool:keepla localbase pathfix perl5 \ + pkgconfig:both shebangfix tar:xz CPE_PRODUCT= imagemagick CPE_VENDOR= imagemagick SHEBANG_FILES= www/source/examples.pl @@ -56,17 +51,13 @@ USE_LDCONFIG= yes USE_GNOME= libxml2 -# make sure LOCALBASE is placed at the end of the compiler lookup so the configure -# script can find openjpeg2 headers before the openjpeg15 headers -CPPFLAGS+= -isystem${LOCALBASE}/include -LDFLAGS+= -Wl,-Y${LOCALBASE}/lib - SAMPLE_FILES= coder.xml colors.xml delegates.xml log.xml magic.xml mime.xml \ - policy.xml quantization-table.xml thresholds.xml type-dejavu.xml \ - type-ghostscript.xml type-windows.xml type.xml + policy.xml quantization-table.xml thresholds.xml \ + type-apple.xml type-dejavu.xml type-ghostscript.xml \ + type-windows.xml type.xml #PLIST_SUB= PORTVERSION=${PORTVERSION:R} -PLIST_SUB+= PORTVERSION=${PORTVERSION:R:R} SITE_ARCH=${SITE_ARCH_REL} \ +PLIST_SUB+= PORTVERSION=${PORTVERSION:R} SITE_ARCH=${SITE_ARCH_REL} \ PERL5_MAN3=man/man3 OPTIONS_DEFINE= BZIP2 DOCS DJVU FFTW FONTCONFIG FPX FREETYPE \ @@ -399,12 +390,6 @@ . endif .endif -.if defined(USER) && ${USER} == kwm -upload: - scp ${DISTDIR}/${DISTNAME}.tar.xz \ - kwm at freefall.freebsd.org:public_distfiles/ -.endif - post-patch: # strip library name of variable parts that can change due to # the HDRI and Q16 option Modified: trunk/graphics/ImageMagick7/distinfo =================================================================== --- trunk/graphics/ImageMagick7/distinfo 2016-05-27 03:45:49 UTC (rev 21465) +++ trunk/graphics/ImageMagick7/distinfo 2016-05-27 04:17:35 UTC (rev 21466) @@ -1,2 +1,3 @@ -SHA256 (ImageMagick-7.0.0-0~beta20160225.tar.xz) = 35f9ed811415633ab4ed6fa4dd6ada625421e87d38dae98e5afc7d30e2a5e5c6 -SIZE (ImageMagick-7.0.0-0~beta20160225.tar.xz) = 8292428 +TIMESTAMP = 1463648575 +SHA256 (ImageMagick-7.0.1-5.tar.xz) = 3a1820c11c81d77ec4a8cac5f24d8582cc2e63d00e40d6930892bd405e86d953 +SIZE (ImageMagick-7.0.1-5.tar.xz) = 8282756 Added: trunk/graphics/ImageMagick7/files/patch-config_policy.xml =================================================================== --- trunk/graphics/ImageMagick7/files/patch-config_policy.xml (rev 0) +++ trunk/graphics/ImageMagick7/files/patch-config_policy.xml 2016-05-27 04:17:35 UTC (rev 21466) @@ -0,0 +1,12 @@ +--- config/policy.xml.orig 2016-05-09 19:28:58.000000000 +0200 ++++ config/policy.xml 2016-05-10 17:44:26.720503000 +0200 +@@ -64,4 +64,9 @@ + + + ++ ++ ++ ++ ++ + Property changes on: trunk/graphics/ImageMagick7/files/patch-config_policy.xml ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Modified: trunk/graphics/ImageMagick7/pkg-descr =================================================================== --- trunk/graphics/ImageMagick7/pkg-descr 2016-05-27 03:45:49 UTC (rev 21465) +++ trunk/graphics/ImageMagick7/pkg-descr 2016-05-27 04:17:35 UTC (rev 21466) @@ -1,8 +1,3 @@ - -*** This is a UNSTABLE development snapshot. API/ABI breakage guaranteed *** - -*** This port is a best efford and updates might be irregular *** - ImageMagick is a package for display and interactive manipulation of images. The package includes tools for image conversion, annotation, compositing, animation, and creating montages. ImageMagick can read and Modified: trunk/graphics/ImageMagick7/pkg-plist =================================================================== --- trunk/graphics/ImageMagick7/pkg-plist 2016-05-27 03:45:49 UTC (rev 21465) +++ trunk/graphics/ImageMagick7/pkg-plist 2016-05-27 04:17:35 UTC (rev 21466) @@ -23,6 +23,7 @@ @sample etc/ImageMagick-7/policy.xml.sample @sample etc/ImageMagick-7/quantization-table.xml.sample @sample etc/ImageMagick-7/thresholds.xml.sample + at sample etc/ImageMagick-7/type-apple.xml.sample @sample etc/ImageMagick-7/type-dejavu.xml.sample @sample etc/ImageMagick-7/type-ghostscript.xml.sample @sample etc/ImageMagick-7/type-windows.xml.sample @@ -88,7 +89,6 @@ include/ImageMagick-7/MagickCore/list.h include/ImageMagick-7/MagickCore/locale_.h include/ImageMagick-7/MagickCore/log.h -include/ImageMagick-7/MagickCore/magic-private.h include/ImageMagick-7/MagickCore/magic.h include/ImageMagick-7/MagickCore/magick-baseconfig.h include/ImageMagick-7/MagickCore/magick-config.h @@ -163,7 +163,7 @@ include/ImageMagick-7/MagickWand/stream.h include/ImageMagick-7/MagickWand/wand-view.h include/ImageMagick-7/MagickWand/wandcli.h -lib/ImageMagick-%%PORTVERSION%%/config-%%QBIT%%%%HDRI%%/configure.xml +lib/ImageMagick-7.0.1/config-%%QBIT%%%%HDRI%%/configure.xml %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/aai.la %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/aai.so %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/art.la @@ -316,8 +316,6 @@ %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/pnm.so %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/pango.la %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/pango.so -%%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/preview.la -%%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/preview.so %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/ps.la %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/ps.so %%MODULES%%lib/ImageMagick-%%PORTVERSION%%/modules-%%QBIT%%%%HDRI%%/coders/ps2.la @@ -455,6 +453,7 @@ man/man1/display.1.gz man/man1/identify.1.gz man/man1/import.1.gz +man/man1/magick-script.1.gz man/man1/magick.1.gz man/man1/mogrify.1.gz man/man1/montage.1.gz @@ -1493,8 +1492,10 @@ %%PORTDOCS%%%%DOCSDIR%%-7/www/links.html %%PORTDOCS%%%%DOCSDIR%%-7/www/magick++.html %%PORTDOCS%%%%DOCSDIR%%-7/www/magick-core.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick-script.html %%PORTDOCS%%%%DOCSDIR%%-7/www/magick-vector-graphics.html %%PORTDOCS%%%%DOCSDIR%%-7/www/magick-wand.html +%%PORTDOCS%%%%DOCSDIR%%-7/www/magick.html %%PORTDOCS%%%%DOCSDIR%%-7/www/miff.html %%PORTDOCS%%%%DOCSDIR%%-7/www/mogrify.html %%PORTDOCS%%%%DOCSDIR%%-7/www/montage.html From laffer1 at midnightbsd.org Fri May 27 00:18:13 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 00:18:13 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21467] trunk/print/ghostscript9-base/Makefile: bump port revision Message-ID: <201605270418.u4R4ID4n050682@stargazer.midnightbsd.org> Revision: 21467 http://svnweb.midnightbsd.org/mports/?rev=21467 Author: laffer1 Date: 2016-05-27 00:18:13 -0400 (Fri, 27 May 2016) Log Message: ----------- bump port revision Modified Paths: -------------- trunk/print/ghostscript9-base/Makefile Modified: trunk/print/ghostscript9-base/Makefile =================================================================== --- trunk/print/ghostscript9-base/Makefile 2016-05-27 04:17:35 UTC (rev 21466) +++ trunk/print/ghostscript9-base/Makefile 2016-05-27 04:18:13 UTC (rev 21467) @@ -3,6 +3,7 @@ PORTNAME= ghostscript PORTVERSION= 9.06 +PORTREVISION= 12 CATEGORIES= print MASTER_SITES= http://downloads.ghostscript.com/public/:gs_srcs \ SF/ghostscript/GPL%20Ghostscript/${PORTVERSION}:gs_srcs \ @@ -82,7 +83,7 @@ EXCLUDE_DIRS= freetype jbig2dec jpeg expat jasper lcms lcms2 libpng tiff zlib -CUPS_LIB_DEPENDS= libcups.so:${PORTSDIR}/print/cups-client +CUPS_LIB_DEPENDS= libcups.so:${PORTSDIR}/print/cups .include "Makefile.drivers" .include From laffer1 at midnightbsd.org Fri May 27 00:18:40 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 00:18:40 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21468] trunk/print/ghostscript9-x11/Makefile: bump Message-ID: <201605270418.u4R4IeAc050755@stargazer.midnightbsd.org> Revision: 21468 http://svnweb.midnightbsd.org/mports/?rev=21468 Author: laffer1 Date: 2016-05-27 00:18:40 -0400 (Fri, 27 May 2016) Log Message: ----------- bump Modified Paths: -------------- trunk/print/ghostscript9-x11/Makefile Modified: trunk/print/ghostscript9-x11/Makefile =================================================================== --- trunk/print/ghostscript9-x11/Makefile 2016-05-27 04:18:13 UTC (rev 21467) +++ trunk/print/ghostscript9-x11/Makefile 2016-05-27 04:18:40 UTC (rev 21468) @@ -3,6 +3,7 @@ PORTNAME= ghostscript PORTVERSION= 9.06 +PORTREVISION= 11 CATEGORIES= print MASTER_SITES= http://downloads.ghostscript.com/public/ \ SF/ghostscript/GPL%20Ghostscript/${PORTVERSION}/ From laffer1 at midnightbsd.org Fri May 27 10:13:58 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 10:13:58 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7582] stable/0.8/lib/libmport/Makefile: set warns 3 until we can deal with the hash table algorithm Message-ID: <201605271413.u4REDw7A016321@stargazer.midnightbsd.org> Revision: 7582 http://svnweb.midnightbsd.org/src/?rev=7582 Author: laffer1 Date: 2016-05-27 10:13:57 -0400 (Fri, 27 May 2016) Log Message: ----------- set warns 3 until we can deal with the hash table algorithm Modified Paths: -------------- stable/0.8/lib/libmport/Makefile Modified: stable/0.8/lib/libmport/Makefile =================================================================== --- stable/0.8/lib/libmport/Makefile 2016-05-27 03:42:17 UTC (rev 7581) +++ stable/0.8/lib/libmport/Makefile 2016-05-27 14:13:57 UTC (rev 7582) @@ -15,6 +15,8 @@ SHLIB_MAJOR= 2 MAN= mport.3 +WARNS= 3 + NO_PROFILE= DPADD= ${LIBMD} ${LIBARCHIVE} ${LIBBZP2} ${LIBLZMA} ${LIBZ} ${LIBFETCH} \ From laffer1 at midnightbsd.org Fri May 27 16:07:45 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 16:07:45 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7583] trunk/crypto/netpgp/src/lib/packet-parse.c: alrightythen just drop the 0 case Message-ID: <201605272007.u4RK7jgO056608@stargazer.midnightbsd.org> Revision: 7583 http://svnweb.midnightbsd.org/src/?rev=7583 Author: laffer1 Date: 2016-05-27 16:07:44 -0400 (Fri, 27 May 2016) Log Message: ----------- alrightythen just drop the 0 case Modified Paths: -------------- trunk/crypto/netpgp/src/lib/packet-parse.c Modified: trunk/crypto/netpgp/src/lib/packet-parse.c =================================================================== --- trunk/crypto/netpgp/src/lib/packet-parse.c 2016-05-27 14:13:57 UTC (rev 7582) +++ trunk/crypto/netpgp/src/lib/packet-parse.c 2016-05-27 20:07:44 UTC (rev 7583) @@ -1282,11 +1282,6 @@ free_BN(&p->key.elgamal.g); free_BN(&p->key.elgamal.y); break; - - case 0: - /* nothing to free */ - break; - default: (void) fprintf(stderr, "__ops_pubkey_free: bad alg\n"); } From laffer1 at midnightbsd.org Fri May 27 16:17:36 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 16:17:36 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7584] stable/0.8/secure/lib/libnetpgp/Makefile: lower warns level Message-ID: <201605272017.u4RKHacA057798@stargazer.midnightbsd.org> Revision: 7584 http://svnweb.midnightbsd.org/src/?rev=7584 Author: laffer1 Date: 2016-05-27 16:17:36 -0400 (Fri, 27 May 2016) Log Message: ----------- lower warns level Modified Paths: -------------- stable/0.8/secure/lib/libnetpgp/Makefile Modified: stable/0.8/secure/lib/libnetpgp/Makefile =================================================================== --- stable/0.8/secure/lib/libnetpgp/Makefile 2016-05-27 20:07:44 UTC (rev 7583) +++ stable/0.8/secure/lib/libnetpgp/Makefile 2016-05-27 20:17:36 UTC (rev 7584) @@ -19,7 +19,7 @@ CFLAGS+= -I${.CURDIR} -I${NETPGP_SRC}/include MAN= libnetpgp.3 -WARNS=4 +WARNS=2 .if ${MK_IDEA} == "no" CFLAGS+= -DOPENSSL_NO_IDEA From laffer1 at midnightbsd.org Fri May 27 16:18:09 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 16:18:09 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7585] stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c: fix warnings Message-ID: <201605272018.u4RKI9BE057849@stargazer.midnightbsd.org> Revision: 7585 http://svnweb.midnightbsd.org/src/?rev=7585 Author: laffer1 Date: 2016-05-27 16:18:09 -0400 (Fri, 27 May 2016) Log Message: ----------- fix warnings Modified Paths: -------------- stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c Modified: stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c =================================================================== --- stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c 2016-05-27 20:17:36 UTC (rev 7584) +++ stable/0.8/contrib/openpam/modules/pam_unix/pam_unix.c 2016-05-27 20:18:09 UTC (rev 7585) @@ -73,7 +73,7 @@ struct pam_response *resp; #endif struct passwd *pwd; - const char *user; + const char *user = NULL; char *crypt_password, *password; int pam_err, retry; From laffer1 at midnightbsd.org Fri May 27 19:22:26 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Fri, 27 May 2016 19:22:26 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7586] stable/0.8/libexec/bootpd/bootpgw/bootpgw.c: get rid of warning Message-ID: <201605272322.u4RNMQkb079470@stargazer.midnightbsd.org> Revision: 7586 http://svnweb.midnightbsd.org/src/?rev=7586 Author: laffer1 Date: 2016-05-27 19:22:25 -0400 (Fri, 27 May 2016) Log Message: ----------- get rid of warning Modified Paths: -------------- stable/0.8/libexec/bootpd/bootpgw/bootpgw.c Modified: stable/0.8/libexec/bootpd/bootpgw/bootpgw.c =================================================================== --- stable/0.8/libexec/bootpd/bootpgw/bootpgw.c 2016-05-27 20:18:09 UTC (rev 7585) +++ stable/0.8/libexec/bootpd/bootpgw/bootpgw.c 2016-05-27 23:22:25 UTC (rev 7586) @@ -451,7 +451,7 @@ continue; } if (!(readfds & (1 << s))) { - report(LOG_INFO, "exiting after %ld minutes of inactivity", + report(LOG_INFO, "exiting after %d minutes of inactivity", actualtimeout.tv_sec / 60); exit(0); } From laffer1 at midnightbsd.org Sat May 28 14:36:40 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:36:40 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7587] stable/0.8/bin/mined: drop warns Message-ID: <201605281836.u4SIaef7099279@stargazer.midnightbsd.org> Revision: 7587 http://svnweb.midnightbsd.org/src/?rev=7587 Author: laffer1 Date: 2016-05-28 14:36:40 -0400 (Sat, 28 May 2016) Log Message: ----------- drop warns Modified Paths: -------------- stable/0.8/bin/mined/Makefile stable/0.8/bin/mined/mined1.c Modified: stable/0.8/bin/mined/Makefile =================================================================== --- stable/0.8/bin/mined/Makefile 2016-05-27 23:22:25 UTC (rev 7586) +++ stable/0.8/bin/mined/Makefile 2016-05-28 18:36:40 UTC (rev 7587) @@ -5,4 +5,6 @@ PROG= mined SRCS= mined1.c mined2.c +WARNS= 3 + .include Modified: stable/0.8/bin/mined/mined1.c =================================================================== --- stable/0.8/bin/mined/mined1.c 2016-05-27 23:22:25 UTC (rev 7586) +++ stable/0.8/bin/mined/mined1.c 2016-05-28 18:36:40 UTC (rev 7587) @@ -448,7 +448,7 @@ * ======================================================================== */ #include -__MBSDID("$MidnightBSD: src/bin/mined/mined1.c,v 1.1 2008/08/17 03:26:36 laffer1 Exp $"); +__MBSDID("$MidnightBSD$"); #include "mined.h" #include From laffer1 at midnightbsd.org Sat May 28 14:42:23 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:42:23 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7588] trunk/bin/mined: switch to a void pointer here Message-ID: <201605281842.u4SIgN0m099813@stargazer.midnightbsd.org> Revision: 7588 http://svnweb.midnightbsd.org/src/?rev=7588 Author: laffer1 Date: 2016-05-28 14:42:23 -0400 (Sat, 28 May 2016) Log Message: ----------- switch to a void pointer here Modified Paths: -------------- trunk/bin/mined/mined.h trunk/bin/mined/mined1.c Modified: trunk/bin/mined/mined.h =================================================================== --- trunk/bin/mined/mined.h 2016-05-28 18:36:40 UTC (rev 7587) +++ trunk/bin/mined/mined.h 2016-05-28 18:42:23 UTC (rev 7588) @@ -310,7 +310,7 @@ void abort_mined(void); void raw_mode(FLAG state); void panic(const char *message); -char *alloc(int bytes); +void *alloc(int bytes); void free_space(char *p); void initialize(void); char *basename(char *path); Modified: trunk/bin/mined/mined1.c =================================================================== --- trunk/bin/mined/mined1.c 2016-05-28 18:36:40 UTC (rev 7587) +++ trunk/bin/mined/mined1.c 2016-05-28 18:42:23 UTC (rev 7588) @@ -448,7 +448,7 @@ * ======================================================================== */ #include -__MBSDID("$MidnightBSD: src/bin/mined/mined1.c,v 1.1 2008/08/17 03:26:36 laffer1 Exp $"); +__MBSDID("$MidnightBSD$"); #include "mined.h" #include @@ -1215,10 +1215,10 @@ #endif /* UNIX */ } -char * +void * alloc(int bytes) { - char *p; + void *p; p = malloc((unsigned) bytes); if (p == NIL_PTR) { From laffer1 at midnightbsd.org Sat May 28 14:44:06 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:44:06 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7589] trunk/usr.bin/mail/util.c: fix warning with clang Message-ID: <201605281844.u4SIi6Cs099894@stargazer.midnightbsd.org> Revision: 7589 http://svnweb.midnightbsd.org/src/?rev=7589 Author: laffer1 Date: 2016-05-28 14:44:06 -0400 (Sat, 28 May 2016) Log Message: ----------- fix warning with clang Modified Paths: -------------- trunk/usr.bin/mail/util.c Modified: trunk/usr.bin/mail/util.c =================================================================== --- trunk/usr.bin/mail/util.c 2016-05-28 18:42:23 UTC (rev 7588) +++ trunk/usr.bin/mail/util.c 2016-05-28 18:44:06 UTC (rev 7589) @@ -236,8 +236,8 @@ { strlcpy(dest, src, dsize); - while (*dest) - *dest++ = tolower((unsigned char)*dest); + for (; *dest; dest++) + *dest = tolower((unsigned char)*dest); } /* From laffer1 at midnightbsd.org Sat May 28 14:45:14 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:45:14 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7590] stable/0.8/usr.bin/mail/util.c: fix clang warning Message-ID: <201605281845.u4SIjEeu000455@stargazer.midnightbsd.org> Revision: 7590 http://svnweb.midnightbsd.org/src/?rev=7590 Author: laffer1 Date: 2016-05-28 14:45:14 -0400 (Sat, 28 May 2016) Log Message: ----------- fix clang warning Modified Paths: -------------- stable/0.8/usr.bin/mail/util.c Modified: stable/0.8/usr.bin/mail/util.c =================================================================== --- stable/0.8/usr.bin/mail/util.c 2016-05-28 18:44:06 UTC (rev 7589) +++ stable/0.8/usr.bin/mail/util.c 2016-05-28 18:45:14 UTC (rev 7590) @@ -236,8 +236,8 @@ { strlcpy(dest, src, dsize); - while (*dest) - *dest++ = tolower((unsigned char)*dest); + for (; *dest; dest++) + *dest = tolower((unsigned char)*dest); } /* From laffer1 at midnightbsd.org Sat May 28 14:45:58 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 14:45:58 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7591] stable/0.8/bin/mined: fix some warnings in clang with mined(1) Message-ID: <201605281845.u4SIjwjf000530@stargazer.midnightbsd.org> Revision: 7591 http://svnweb.midnightbsd.org/src/?rev=7591 Author: laffer1 Date: 2016-05-28 14:45:58 -0400 (Sat, 28 May 2016) Log Message: ----------- fix some warnings in clang with mined(1) Modified Paths: -------------- stable/0.8/bin/mined/mined.h stable/0.8/bin/mined/mined1.c Modified: stable/0.8/bin/mined/mined.h =================================================================== --- stable/0.8/bin/mined/mined.h 2016-05-28 18:45:14 UTC (rev 7590) +++ stable/0.8/bin/mined/mined.h 2016-05-28 18:45:58 UTC (rev 7591) @@ -310,7 +310,7 @@ void abort_mined(void); void raw_mode(FLAG state); void panic(const char *message); -char *alloc(int bytes); +void *alloc(int bytes); void free_space(char *p); void initialize(void); char *basename(char *path); Modified: stable/0.8/bin/mined/mined1.c =================================================================== --- stable/0.8/bin/mined/mined1.c 2016-05-28 18:45:14 UTC (rev 7590) +++ stable/0.8/bin/mined/mined1.c 2016-05-28 18:45:58 UTC (rev 7591) @@ -1215,10 +1215,10 @@ #endif /* UNIX */ } -char * +void * alloc(int bytes) { - char *p; + void *p; p = malloc((unsigned) bytes); if (p == NIL_PTR) { From laffer1 at midnightbsd.org Sat May 28 15:02:11 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 15:02:11 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7592] trunk/usr.bin/msearch: fix zeroflag code to work with clang Message-ID: <201605281902.u4SJ2BkP002124@stargazer.midnightbsd.org> Revision: 7592 http://svnweb.midnightbsd.org/src/?rev=7592 Author: laffer1 Date: 2016-05-28 15:02:11 -0400 (Sat, 28 May 2016) Log Message: ----------- fix zeroflag code to work with clang Modified Paths: -------------- trunk/usr.bin/msearch/Makefile trunk/usr.bin/msearch/msearch.c Modified: trunk/usr.bin/msearch/Makefile =================================================================== --- trunk/usr.bin/msearch/Makefile 2016-05-28 18:45:58 UTC (rev 7591) +++ trunk/usr.bin/msearch/Makefile 2016-05-28 19:02:11 UTC (rev 7592) @@ -1,10 +1,9 @@ -# $MidnightBSD: src/usr.bin/msearch/Makefile,v 1.6 2011/08/07 06:25:00 laffer1 Exp $ +# $MidnightBSD$ PROG= msearch CFLAGS+= -I${.CURDIR}/../../lib/libsearch -WARNS?= 1 CSTD= c99 DPADD= ${LIBMSEARCH} ${LIBZ} ${LIBSQLITE3} Modified: trunk/usr.bin/msearch/msearch.c =================================================================== --- trunk/usr.bin/msearch/msearch.c 2016-05-28 18:45:58 UTC (rev 7591) +++ trunk/usr.bin/msearch/msearch.c 2016-05-28 19:02:11 UTC (rev 7592) @@ -25,7 +25,7 @@ */ #include -__MBSDID("$MidnightBSD: src/usr.bin/msearch/msearch.c,v 1.6 2011/08/06 23:02:26 laffer1 Exp $"); +__MBSDID("$MidnightBSD$"); #include #include @@ -101,15 +101,17 @@ while (current != NULL) { if (current->path != NULL) { if (tflag && rflag) { + printf("%0.2f %s", current->weight, current->path); if (zeroflag) - printf("%0.2f %s\0", current->weight, current->path); + fputc('\0', stdout); else - printf("%0.2f %s\n", current->weight, current->path); + fputc('\n', stdout); } else { + printf("%s", current->path); if (zeroflag) - printf("%s\0", current->path); + fputc('\0', stdout); else - printf("%s\n", current->path); + fputc('\n', stdout); } } current = current->next; From laffer1 at midnightbsd.org Sat May 28 15:03:14 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 15:03:14 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7593] stable/0.8/usr.bin/msearch: MFC: fix zeroflag code to work with clang Message-ID: <201605281903.u4SJ3EqN002205@stargazer.midnightbsd.org> Revision: 7593 http://svnweb.midnightbsd.org/src/?rev=7593 Author: laffer1 Date: 2016-05-28 15:03:13 -0400 (Sat, 28 May 2016) Log Message: ----------- MFC: fix zeroflag code to work with clang Modified Paths: -------------- stable/0.8/usr.bin/msearch/Makefile stable/0.8/usr.bin/msearch/msearch.c Modified: stable/0.8/usr.bin/msearch/Makefile =================================================================== --- stable/0.8/usr.bin/msearch/Makefile 2016-05-28 19:02:11 UTC (rev 7592) +++ stable/0.8/usr.bin/msearch/Makefile 2016-05-28 19:03:13 UTC (rev 7593) @@ -1,10 +1,9 @@ -# $MidnightBSD: src/usr.bin/msearch/Makefile,v 1.6 2011/08/07 06:25:00 laffer1 Exp $ +# $MidnightBSD$ PROG= msearch CFLAGS+= -I${.CURDIR}/../../lib/libsearch -WARNS?= 1 CSTD= c99 DPADD= ${LIBMSEARCH} ${LIBZ} ${LIBSQLITE3} Modified: stable/0.8/usr.bin/msearch/msearch.c =================================================================== --- stable/0.8/usr.bin/msearch/msearch.c 2016-05-28 19:02:11 UTC (rev 7592) +++ stable/0.8/usr.bin/msearch/msearch.c 2016-05-28 19:03:13 UTC (rev 7593) @@ -25,7 +25,7 @@ */ #include -__MBSDID("$MidnightBSD: src/usr.bin/msearch/msearch.c,v 1.6 2011/08/06 23:02:26 laffer1 Exp $"); +__MBSDID("$MidnightBSD$"); #include #include @@ -101,15 +101,17 @@ while (current != NULL) { if (current->path != NULL) { if (tflag && rflag) { + printf("%0.2f %s", current->weight, current->path); if (zeroflag) - printf("%0.2f %s\0", current->weight, current->path); + fputc('\0', stdout); else - printf("%0.2f %s\n", current->weight, current->path); + fputc('\n', stdout); } else { + printf("%s", current->path); if (zeroflag) - printf("%s\0", current->path); + fputc('\0', stdout); else - printf("%s\n", current->path); + fputc('\n', stdout); } } current = current->next; From laffer1 at midnightbsd.org Sat May 28 15:32:03 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 15:32:03 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7594] trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile: set warns Message-ID: <201605281932.u4SJW3xV005176@stargazer.midnightbsd.org> Revision: 7594 http://svnweb.midnightbsd.org/src/?rev=7594 Author: laffer1 Date: 2016-05-28 15:32:03 -0400 (Sat, 28 May 2016) Log Message: ----------- set warns Modified Paths: -------------- trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile Modified: trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile =================================================================== --- trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile 2016-05-28 19:03:13 UTC (rev 7593) +++ trunk/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile 2016-05-28 19:32:03 UTC (rev 7594) @@ -13,6 +13,8 @@ ipForward ifIndex linkDown linkUp MAN= snmp_mibII.3 +WARNS= 3 + CFLAGS+= -I${CONTRIB}/lib -I${CONTRIB}/snmpd CFLAGS+= -DHAVE_ERR_H -DHAVE_GETADDRINFO -DHAVE_STRLCPY -DHAVE_SYS_TREE_H From laffer1 at midnightbsd.org Sat May 28 15:32:58 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 15:32:58 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7595] stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile: set warns Message-ID: <201605281932.u4SJWw5k005241@stargazer.midnightbsd.org> Revision: 7595 http://svnweb.midnightbsd.org/src/?rev=7595 Author: laffer1 Date: 2016-05-28 15:32:58 -0400 (Sat, 28 May 2016) Log Message: ----------- set warns Modified Paths: -------------- stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile Modified: stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile =================================================================== --- stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile 2016-05-28 19:32:03 UTC (rev 7594) +++ stable/0.8/usr.sbin/bsnmpd/modules/snmp_mibII/Makefile 2016-05-28 19:32:58 UTC (rev 7595) @@ -13,6 +13,8 @@ ipForward ifIndex linkDown linkUp MAN= snmp_mibII.3 +WARNS= 3 + CFLAGS+= -I${CONTRIB}/lib -I${CONTRIB}/snmpd CFLAGS+= -DHAVE_ERR_H -DHAVE_GETADDRINFO -DHAVE_STRLCPY -DHAVE_SYS_TREE_H From laffer1 at midnightbsd.org Sat May 28 17:33:11 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:33:11 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7596] trunk/sbin/camcontrol/Makefile: drop to warns 3 Message-ID: <201605282133.u4SLXBfp017916@stargazer.midnightbsd.org> Revision: 7596 http://svnweb.midnightbsd.org/src/?rev=7596 Author: laffer1 Date: 2016-05-28 17:33:10 -0400 (Sat, 28 May 2016) Log Message: ----------- drop to warns 3 Modified Paths: -------------- trunk/sbin/camcontrol/Makefile Modified: trunk/sbin/camcontrol/Makefile =================================================================== --- trunk/sbin/camcontrol/Makefile 2016-05-28 19:32:58 UTC (rev 7595) +++ trunk/sbin/camcontrol/Makefile 2016-05-28 21:33:10 UTC (rev 7596) @@ -7,10 +7,7 @@ .else CFLAGS+= -DMINIMALISTIC .endif -# This is verboten -.if ${MACHINE_CPUARCH} == "arm" WARNS?= 3 -.endif DPADD= ${LIBCAM} ${LIBSBUF} ${LIBUTIL} LDADD= -lcam -lsbuf -lutil MAN= camcontrol.8 From laffer1 at midnightbsd.org Sat May 28 17:33:26 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:33:26 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7597] stable/0.8/sbin/camcontrol/Makefile: warns 3 Message-ID: <201605282133.u4SLXQOu017962@stargazer.midnightbsd.org> Revision: 7597 http://svnweb.midnightbsd.org/src/?rev=7597 Author: laffer1 Date: 2016-05-28 17:33:26 -0400 (Sat, 28 May 2016) Log Message: ----------- warns 3 Modified Paths: -------------- stable/0.8/sbin/camcontrol/Makefile Modified: stable/0.8/sbin/camcontrol/Makefile =================================================================== --- stable/0.8/sbin/camcontrol/Makefile 2016-05-28 21:33:10 UTC (rev 7596) +++ stable/0.8/sbin/camcontrol/Makefile 2016-05-28 21:33:26 UTC (rev 7597) @@ -7,10 +7,7 @@ .else CFLAGS+= -DMINIMALISTIC .endif -# This is verboten -.if ${MACHINE_CPUARCH} == "arm" WARNS?= 3 -.endif DPADD= ${LIBCAM} ${LIBSBUF} ${LIBUTIL} LDADD= -lcam -lsbuf -lutil MAN= camcontrol.8 From laffer1 at midnightbsd.org Sat May 28 17:34:29 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:34:29 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7598] trunk/sbin/ggate/Makefile.inc: set warns 3 Message-ID: <201605282134.u4SLYTht018031@stargazer.midnightbsd.org> Revision: 7598 http://svnweb.midnightbsd.org/src/?rev=7598 Author: laffer1 Date: 2016-05-28 17:34:29 -0400 (Sat, 28 May 2016) Log Message: ----------- set warns 3 Modified Paths: -------------- trunk/sbin/ggate/Makefile.inc Modified: trunk/sbin/ggate/Makefile.inc =================================================================== --- trunk/sbin/ggate/Makefile.inc 2016-05-28 21:33:26 UTC (rev 7597) +++ trunk/sbin/ggate/Makefile.inc 2016-05-28 21:34:29 UTC (rev 7598) @@ -1,3 +1,5 @@ # $MidnightBSD$ +WARNS=3 + .include "../Makefile.inc" From laffer1 at midnightbsd.org Sat May 28 17:34:50 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:34:50 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7599] trunk/sbin/ggate/shared/ggate.c: init to 0 Message-ID: <201605282134.u4SLYoO2018083@stargazer.midnightbsd.org> Revision: 7599 http://svnweb.midnightbsd.org/src/?rev=7599 Author: laffer1 Date: 2016-05-28 17:34:50 -0400 (Sat, 28 May 2016) Log Message: ----------- init to 0 Modified Paths: -------------- trunk/sbin/ggate/shared/ggate.c Modified: trunk/sbin/ggate/shared/ggate.c =================================================================== --- trunk/sbin/ggate/shared/ggate.c 2016-05-28 21:34:29 UTC (rev 7598) +++ trunk/sbin/ggate/shared/ggate.c 2016-05-28 21:34:50 UTC (rev 7599) @@ -152,7 +152,7 @@ unsigned g_gate_sectorsize(int fd) { - unsigned secsize; + unsigned secsize = 0; struct stat sb; if (fstat(fd, &sb) == -1) From laffer1 at midnightbsd.org Sat May 28 17:35:10 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:35:10 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7600] stable/0.8/sbin/ggate/shared/ggate.c: init to zero Message-ID: <201605282135.u4SLZA8R018504@stargazer.midnightbsd.org> Revision: 7600 http://svnweb.midnightbsd.org/src/?rev=7600 Author: laffer1 Date: 2016-05-28 17:35:10 -0400 (Sat, 28 May 2016) Log Message: ----------- init to zero Modified Paths: -------------- stable/0.8/sbin/ggate/shared/ggate.c Modified: stable/0.8/sbin/ggate/shared/ggate.c =================================================================== --- stable/0.8/sbin/ggate/shared/ggate.c 2016-05-28 21:34:50 UTC (rev 7599) +++ stable/0.8/sbin/ggate/shared/ggate.c 2016-05-28 21:35:10 UTC (rev 7600) @@ -152,7 +152,7 @@ unsigned g_gate_sectorsize(int fd) { - unsigned secsize; + unsigned secsize = 0; struct stat sb; if (fstat(fd, &sb) == -1) From laffer1 at midnightbsd.org Sat May 28 17:35:41 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:35:41 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7601] stable/0.8/sbin/ggate/shared/ggate.c: init Message-ID: <201605282135.u4SLZfNc018560@stargazer.midnightbsd.org> Revision: 7601 http://svnweb.midnightbsd.org/src/?rev=7601 Author: laffer1 Date: 2016-05-28 17:35:41 -0400 (Sat, 28 May 2016) Log Message: ----------- init Modified Paths: -------------- stable/0.8/sbin/ggate/shared/ggate.c Modified: stable/0.8/sbin/ggate/shared/ggate.c =================================================================== --- stable/0.8/sbin/ggate/shared/ggate.c 2016-05-28 21:35:10 UTC (rev 7600) +++ stable/0.8/sbin/ggate/shared/ggate.c 2016-05-28 21:35:41 UTC (rev 7601) @@ -131,7 +131,7 @@ off_t g_gate_mediasize(int fd) { - off_t mediasize; + off_t mediasize = 0; struct stat sb; if (fstat(fd, &sb) == -1) From laffer1 at midnightbsd.org Sat May 28 17:36:15 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 17:36:15 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7602] trunk/sbin/ggate/shared/ggate.c: init to zero Message-ID: <201605282136.u4SLaFWq018625@stargazer.midnightbsd.org> Revision: 7602 http://svnweb.midnightbsd.org/src/?rev=7602 Author: laffer1 Date: 2016-05-28 17:36:14 -0400 (Sat, 28 May 2016) Log Message: ----------- init to zero Modified Paths: -------------- trunk/sbin/ggate/shared/ggate.c Modified: trunk/sbin/ggate/shared/ggate.c =================================================================== --- trunk/sbin/ggate/shared/ggate.c 2016-05-28 21:35:41 UTC (rev 7601) +++ trunk/sbin/ggate/shared/ggate.c 2016-05-28 21:36:14 UTC (rev 7602) @@ -131,7 +131,7 @@ off_t g_gate_mediasize(int fd) { - off_t mediasize; + off_t mediasize = 0; struct stat sb; if (fstat(fd, &sb) == -1) From laffer1 at midnightbsd.org Sat May 28 21:43:13 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:43:13 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7603] stable/0.8/usr.sbin/ctladm/ctladm.c: init retval Message-ID: <201605290143.u4T1hDHT044751@stargazer.midnightbsd.org> Revision: 7603 http://svnweb.midnightbsd.org/src/?rev=7603 Author: laffer1 Date: 2016-05-28 21:43:12 -0400 (Sat, 28 May 2016) Log Message: ----------- init retval Modified Paths: -------------- stable/0.8/usr.sbin/ctladm/ctladm.c Modified: stable/0.8/usr.sbin/ctladm/ctladm.c =================================================================== --- stable/0.8/usr.sbin/ctladm/ctladm.c 2016-05-28 21:36:14 UTC (rev 7602) +++ stable/0.8/usr.sbin/ctladm/ctladm.c 2016-05-29 01:43:12 UTC (rev 7603) @@ -1026,7 +1026,7 @@ cctl_error_inject(int fd, uint32_t target, uint32_t lun, int argc, char **argv, char *combinedopt) { - int retval; + int retval = 0; struct ctl_error_desc err_desc; uint64_t lba = 0; uint32_t len = 0; From laffer1 at midnightbsd.org Sat May 28 21:44:00 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:44:00 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7604] trunk/usr.sbin/ctladm/ctladm.c: init retval Message-ID: <201605290144.u4T1i0BB044815@stargazer.midnightbsd.org> Revision: 7604 http://svnweb.midnightbsd.org/src/?rev=7604 Author: laffer1 Date: 2016-05-28 21:44:00 -0400 (Sat, 28 May 2016) Log Message: ----------- init retval Modified Paths: -------------- trunk/usr.sbin/ctladm/ctladm.c Modified: trunk/usr.sbin/ctladm/ctladm.c =================================================================== --- trunk/usr.sbin/ctladm/ctladm.c 2016-05-29 01:43:12 UTC (rev 7603) +++ trunk/usr.sbin/ctladm/ctladm.c 2016-05-29 01:44:00 UTC (rev 7604) @@ -1026,7 +1026,7 @@ cctl_error_inject(int fd, uint32_t target, uint32_t lun, int argc, char **argv, char *combinedopt) { - int retval; + int retval = 0; struct ctl_error_desc err_desc; uint64_t lba = 0; uint32_t len = 0; From laffer1 at midnightbsd.org Sat May 28 21:45:56 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:45:56 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7605] stable/0.8/usr.sbin/kbdcontrol/Makefile: drop to warns 3 for clang Message-ID: <201605290145.u4T1juUC045263@stargazer.midnightbsd.org> Revision: 7605 http://svnweb.midnightbsd.org/src/?rev=7605 Author: laffer1 Date: 2016-05-28 21:45:55 -0400 (Sat, 28 May 2016) Log Message: ----------- drop to warns 3 for clang Modified Paths: -------------- stable/0.8/usr.sbin/kbdcontrol/Makefile Modified: stable/0.8/usr.sbin/kbdcontrol/Makefile =================================================================== --- stable/0.8/usr.sbin/kbdcontrol/Makefile 2016-05-29 01:44:00 UTC (rev 7604) +++ stable/0.8/usr.sbin/kbdcontrol/Makefile 2016-05-29 01:45:55 UTC (rev 7605) @@ -5,7 +5,7 @@ MLINKS= kbdmap.5 keymap.5 SRCS= kbdcontrol.c lex.l -WARNS?= 4 +WARNS?= 3 CFLAGS+= -I${.CURDIR} DPADD= ${LIBL} From laffer1 at midnightbsd.org Sat May 28 21:46:35 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:46:35 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7606] trunk/usr.sbin/kbdcontrol/Makefile: fix build with clang Message-ID: <201605290146.u4T1kZ3h045317@stargazer.midnightbsd.org> Revision: 7606 http://svnweb.midnightbsd.org/src/?rev=7606 Author: laffer1 Date: 2016-05-28 21:46:34 -0400 (Sat, 28 May 2016) Log Message: ----------- fix build with clang Modified Paths: -------------- trunk/usr.sbin/kbdcontrol/Makefile Modified: trunk/usr.sbin/kbdcontrol/Makefile =================================================================== --- trunk/usr.sbin/kbdcontrol/Makefile 2016-05-29 01:45:55 UTC (rev 7605) +++ trunk/usr.sbin/kbdcontrol/Makefile 2016-05-29 01:46:34 UTC (rev 7606) @@ -5,7 +5,7 @@ MLINKS= kbdmap.5 keymap.5 SRCS= kbdcontrol.c lex.l -WARNS?= 4 +WARNS?= 3 CFLAGS+= -I${.CURDIR} DPADD= ${LIBL} From laffer1 at midnightbsd.org Sat May 28 21:47:18 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:47:18 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7607] trunk/usr.sbin/ndiscvt/Makefile: lower warns for clang switch Message-ID: <201605290147.u4T1lI3g045366@stargazer.midnightbsd.org> Revision: 7607 http://svnweb.midnightbsd.org/src/?rev=7607 Author: laffer1 Date: 2016-05-28 21:47:17 -0400 (Sat, 28 May 2016) Log Message: ----------- lower warns for clang switch Modified Paths: -------------- trunk/usr.sbin/ndiscvt/Makefile Modified: trunk/usr.sbin/ndiscvt/Makefile =================================================================== --- trunk/usr.sbin/ndiscvt/Makefile 2016-05-29 01:46:34 UTC (rev 7606) +++ trunk/usr.sbin/ndiscvt/Makefile 2016-05-29 01:47:17 UTC (rev 7607) @@ -1,3 +1,4 @@ +# $MidnightBSD$ # $FreeBSD: src/usr.sbin/ndiscvt/Makefile,v 1.7 2005/04/24 20:21:22 wpaul Exp $ .PATH: ${.CURDIR}/../../sys/compat/ndis @@ -10,7 +11,7 @@ MAN= ndiscvt.8 MAN+= ndisgen.8 -WARNS?= 4 +WARNS?= 3 DPADD= ${LIBL} LDADD= -ll From laffer1 at midnightbsd.org Sat May 28 21:47:36 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 21:47:36 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7608] stable/0.8/usr.sbin/ndiscvt/Makefile: lower warns for clang switch Message-ID: <201605290147.u4T1laEh045408@stargazer.midnightbsd.org> Revision: 7608 http://svnweb.midnightbsd.org/src/?rev=7608 Author: laffer1 Date: 2016-05-28 21:47:36 -0400 (Sat, 28 May 2016) Log Message: ----------- lower warns for clang switch Modified Paths: -------------- stable/0.8/usr.sbin/ndiscvt/Makefile Modified: stable/0.8/usr.sbin/ndiscvt/Makefile =================================================================== --- stable/0.8/usr.sbin/ndiscvt/Makefile 2016-05-29 01:47:17 UTC (rev 7607) +++ stable/0.8/usr.sbin/ndiscvt/Makefile 2016-05-29 01:47:36 UTC (rev 7608) @@ -10,7 +10,7 @@ MAN= ndiscvt.8 MAN+= ndisgen.8 -WARNS?= 4 +WARNS?= 3 DPADD= ${LIBL} LDADD= -ll From laffer1 at midnightbsd.org Sat May 28 22:10:32 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 22:10:32 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7609] stable/0.8/usr.sbin/sysinstall/label.c: fix build Message-ID: <201605290210.u4T2AWgK048200@stargazer.midnightbsd.org> Revision: 7609 http://svnweb.midnightbsd.org/src/?rev=7609 Author: laffer1 Date: 2016-05-28 22:10:32 -0400 (Sat, 28 May 2016) Log Message: ----------- fix build Modified Paths: -------------- stable/0.8/usr.sbin/sysinstall/label.c Modified: stable/0.8/usr.sbin/sysinstall/label.c =================================================================== --- stable/0.8/usr.sbin/sysinstall/label.c 2016-05-29 01:47:36 UTC (rev 7608) +++ stable/0.8/usr.sbin/sysinstall/label.c 2016-05-29 02:10:32 UTC (rev 7609) @@ -4,7 +4,7 @@ * This is probably the last program in the `sysinstall' line - the next * generation being essentially a complete rewrite. * - * $MidnightBSD: src/usr.sbin/sysinstall/label.c,v 1.9 2011/03/26 16:53:46 laffer1 Exp $ + * $MidnightBSD$ * $FreeBSD: src/usr.sbin/sysinstall/label.c,v 1.148.8.2 2006/01/24 15:51:33 ceri Exp $ * * Copyright (c) 1995 @@ -924,7 +924,7 @@ } if (msg) { if (req) { - msgConfirm(msg); + msgConfirm("%s", msg); clear_wins(); msg = NULL; } From laffer1 at midnightbsd.org Sat May 28 22:11:03 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Sat, 28 May 2016 22:11:03 -0400 (EDT) Subject: [Midnightbsd-cvs] src [7610] trunk/usr.sbin/sysinstall/label.c: fix build Message-ID: <201605290211.u4T2B3PP048267@stargazer.midnightbsd.org> Revision: 7610 http://svnweb.midnightbsd.org/src/?rev=7610 Author: laffer1 Date: 2016-05-28 22:11:02 -0400 (Sat, 28 May 2016) Log Message: ----------- fix build Modified Paths: -------------- trunk/usr.sbin/sysinstall/label.c Modified: trunk/usr.sbin/sysinstall/label.c =================================================================== --- trunk/usr.sbin/sysinstall/label.c 2016-05-29 02:10:32 UTC (rev 7609) +++ trunk/usr.sbin/sysinstall/label.c 2016-05-29 02:11:02 UTC (rev 7610) @@ -4,7 +4,7 @@ * This is probably the last program in the `sysinstall' line - the next * generation being essentially a complete rewrite. * - * $MidnightBSD: src/usr.sbin/sysinstall/label.c,v 1.9 2011/03/26 16:53:46 laffer1 Exp $ + * $MidnightBSD$ * $FreeBSD: src/usr.sbin/sysinstall/label.c,v 1.148.8.2 2006/01/24 15:51:33 ceri Exp $ * * Copyright (c) 1995 @@ -924,7 +924,7 @@ } if (msg) { if (req) { - msgConfirm(msg); + msgConfirm("%s", msg); clear_wins(); msg = NULL; } From laffer1 at midnightbsd.org Wed May 25 23:57:23 2016 From: laffer1 at midnightbsd.org (laffer1 at midnightbsd.org) Date: Wed, 25 May 2016 23:57:23 -0400 (EDT) Subject: [Midnightbsd-cvs] mports [21458] trunk/textproc: add kibana 4.2-4.4 Message-ID: <201605260357.u4Q3vNWS087540@stargazer.midnightbsd.org> Revision: 21458 http://svnweb.midnightbsd.org/mports/?rev=21458 Author: laffer1 Date: 2016-05-25 23:57:22 -0400 (Wed, 25 May 2016) Log Message: ----------- add kibana 4.2-4.4 Added Paths: ----------- trunk/textproc/kibana42/ trunk/textproc/kibana42/Makefile trunk/textproc/kibana42/distinfo trunk/textproc/kibana42/files/ trunk/textproc/kibana42/files/kibana.in trunk/textproc/kibana42/pkg-descr trunk/textproc/kibana42/pkg-plist trunk/textproc/kibana43/ trunk/textproc/kibana43/Makefile trunk/textproc/kibana43/distinfo trunk/textproc/kibana43/pkg-descr trunk/textproc/kibana43/pkg-plist trunk/textproc/kibana44/ trunk/textproc/kibana44/Makefile trunk/textproc/kibana44/distinfo trunk/textproc/kibana44/pkg-descr trunk/textproc/kibana44/pkg-plist Added: trunk/textproc/kibana42/Makefile =================================================================== --- trunk/textproc/kibana42/Makefile (rev 0) +++ trunk/textproc/kibana42/Makefile 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,34 @@ +# Created by: Sergey Kozlov +# $FreeBSD: head/textproc/kibana42/Makefile 411098 2016-03-14 16:10:26Z feld $ +# $MidnightBSD$ + +PORTNAME= kibana +PORTVERSION?= 4.2.2 +DISTVERSIONSUFFIX= -linux-x86 +PORTREVISION?= 0 +CATEGORIES= textproc www +MASTER_SITES= https://download.elastic.co/kibana/kibana/ \ + http://download.elastic.co/kibana/kibana/ +PKGNAMESUFFIX?= 42 + +MAINTAINER= ports at MidnightBSD.org +COMMENT= Browser based analytics and search interface to ElasticSearch + +LICENSE= apache2 + +RUN_DEPENDS= node012>=0:${PORTSDIR}/www/node012 + +NO_BUILD= yes +NO_ARCH= yes +WWWDIR= ${PREFIX}/www/${PORTNAME}${PKGNAMESUFFIX} +USE_RC_SUBR= ${PORTNAME} + +do-install: + ${CP} ${WRKSRC}/config/kibana.yml ${STAGEDIR}${PREFIX}/etc/kibana.yml.sample + ${MKDIR} ${STAGEDIR}${WWWDIR} + cd ${WRKSRC} && \ + ${RM} -r bin config node && \ + ${RM} -r optimize/* && \ + ${COPYTREE_SHARE} . ${STAGEDIR}${WWWDIR} + +.include Property changes on: trunk/textproc/kibana42/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana42/distinfo =================================================================== --- trunk/textproc/kibana42/distinfo (rev 0) +++ trunk/textproc/kibana42/distinfo 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,2 @@ +SHA256 (kibana-4.2.2-linux-x86.tar.gz) = c0644e435fbf304dc418184bcf9e96886f93bb7c01cd71c99e5fa5cca42b05d8 +SIZE (kibana-4.2.2-linux-x86.tar.gz) = 30043893 Property changes on: trunk/textproc/kibana42/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana42/files/kibana.in =================================================================== --- trunk/textproc/kibana42/files/kibana.in (rev 0) +++ trunk/textproc/kibana42/files/kibana.in 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,42 @@ +#!/bin/sh +# +# $FreeBSD: head/textproc/kibana42/files/kibana.in 402633 2015-11-29 23:49:44Z junovitch $ +# + +# PROVIDE: kibana +# REQUIRE: DAEMON +# KEYWORD: shutdown + +. /etc/rc.subr + +name=kibana +rcvar=kibana_enable + +load_rc_config $name + +: ${kibana_enable:="NO"} +: ${kibana_config:="%%PREFIX%%/etc/kibana.yml"} +: ${kibana_user:="www"} +: ${kibana_group:="www"} +: ${kibana_log:="/var/log/kibana.log"} + +required_files="${kibana_config}" +pidfile="/var/run/${name}/${name}.pid" +start_precmd="kibana_precmd" +procname="%%LOCALBASE%%/bin/node" +command="/usr/sbin/daemon" +command_args="-f -p ${pidfile} env BABEL_DISABLE_CACHE=1 ${procname} %%WWWDIR%%/src/cli serve --config ${kibana_config} --log-file ${kibana_log}" + +kibana_precmd() +{ + if [ ! -d $(dirname ${pidfile}) ]; then + mkdir $(dirname ${pidfile}) + chown ${kibana_user}:${kibana_group} $(dirname ${pidfile}) + fi + + if [ ! -f ${kibana_log} ]; then + install -o ${kibana_user} -g ${kibana_group} -m 640 /dev/null ${kibana_log} + fi +} + +run_rc_command "$1" Property changes on: trunk/textproc/kibana42/files/kibana.in ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana42/pkg-descr =================================================================== --- trunk/textproc/kibana42/pkg-descr (rev 0) +++ trunk/textproc/kibana42/pkg-descr 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,8 @@ +Kibana is an open source (Apache Licensed), browser based analytics and search +dashboard for Elasticsearch. Kibana is a snap to setup and start using. Kibana +strives to be easy to get started with, while also being flexible and powerful, +just like Elasticsearch. + +Kibana 4.2 is compatible with Elasticsearch 2.0.x. + +WWW: https://www.elastic.co/products/kibana Property changes on: trunk/textproc/kibana42/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana42/pkg-plist =================================================================== --- trunk/textproc/kibana42/pkg-plist (rev 0) +++ trunk/textproc/kibana42/pkg-plist 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,11757 @@ + at preunexec rm -rf %D/%%WWWDIR%%/optimize/* 2>&1 >/dev/null || true + at sample etc/kibana.yml.sample +%%WWWDIR%%/LICENSE.txt +%%WWWDIR%%/README.txt +%%WWWDIR%%/node_modules/.bin/autoprefixer +%%WWWDIR%%/node_modules/.bin/babel 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+native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana43/Makefile =================================================================== --- trunk/textproc/kibana43/Makefile (rev 0) +++ trunk/textproc/kibana43/Makefile 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,12 @@ +# Created by: Sergey Kozlov +# $FreeBSD: head/textproc/kibana43/Makefile 411098 2016-03-14 16:10:26Z feld $ +# $MidnightBSD$ + +PORTVERSION= 4.3.2 +PORTREVISION= 1 +PKGNAMESUFFIX= 43 +MASTERDIR= ${.CURDIR}/../kibana42 +PKGDIR= ${.CURDIR} +DISTINFO_FILE= ${.CURDIR}/distinfo + +.include "${MASTERDIR}/Makefile" Property changes on: trunk/textproc/kibana43/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana43/distinfo =================================================================== --- trunk/textproc/kibana43/distinfo (rev 0) +++ trunk/textproc/kibana43/distinfo 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,2 @@ +SHA256 (kibana-4.3.2-linux-x86.tar.gz) = 5b95c261840fa791b5069a88d211777b16ee0fca46153ab3f6330f9eb8e7364e +SIZE (kibana-4.3.2-linux-x86.tar.gz) = 29978015 Property changes on: trunk/textproc/kibana43/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana43/pkg-descr =================================================================== --- trunk/textproc/kibana43/pkg-descr (rev 0) +++ trunk/textproc/kibana43/pkg-descr 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,8 @@ +Kibana is an open source (Apache Licensed), browser based analytics and search +dashboard for Elasticsearch. Kibana is a snap to setup and start using. Kibana +strives to be easy to get started with, while also being flexible and powerful, +just like Elasticsearch. + +Kibana 4.3 is compatible with Elasticsearch 2.1.x. + +WWW: https://www.elastic.co/products/kibana Property changes on: trunk/textproc/kibana43/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana43/pkg-plist =================================================================== --- trunk/textproc/kibana43/pkg-plist (rev 0) +++ trunk/textproc/kibana43/pkg-plist 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,11688 @@ + at preunexec rm -rf %D/%%WWWDIR%%/optimize/* 2>&1 >/dev/null || true + at sample etc/kibana.yml.sample +%%WWWDIR%%/LICENSE.txt +%%WWWDIR%%/README.txt +%%WWWDIR%%/node_modules/.bin/autoprefixer +%%WWWDIR%%/node_modules/.bin/babel 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dir %%WWWDIR%%/installedPlugins + at dir %%WWWDIR%%/node_modules/rimraf/node_modules + at dir(www,www) %%WWWDIR%%/optimize + at dir %%WWWDIR%%/src/ui/public/factories Property changes on: trunk/textproc/kibana43/pkg-plist ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana44/Makefile =================================================================== --- trunk/textproc/kibana44/Makefile (rev 0) +++ trunk/textproc/kibana44/Makefile 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,12 @@ +# Created by: Sergey Kozlov +# $FreeBSD: head/textproc/kibana44/Makefile 411098 2016-03-14 16:10:26Z feld $ +# $MidnightBSD$ + +PORTVERSION= 4.4.1 +PORTREVISION= 1 +PKGNAMESUFFIX= 44 +MASTERDIR= ${.CURDIR}/../kibana42 +PKGDIR= ${.CURDIR} +DISTINFO_FILE= ${.CURDIR}/distinfo + +.include "${MASTERDIR}/Makefile" Property changes on: trunk/textproc/kibana44/Makefile ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:keywords ## -0,0 +1 ## +MidnightBSD=%H \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana44/distinfo =================================================================== --- trunk/textproc/kibana44/distinfo (rev 0) +++ trunk/textproc/kibana44/distinfo 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,2 @@ +SHA256 (kibana-4.4.1-linux-x86.tar.gz) = b0b413db7f50d4cd547a0682ee4475c2fbdef8a44c4b9c3f4a89181a6fe4d733 +SIZE (kibana-4.4.1-linux-x86.tar.gz) = 30207961 Property changes on: trunk/textproc/kibana44/distinfo ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana44/pkg-descr =================================================================== --- trunk/textproc/kibana44/pkg-descr (rev 0) +++ trunk/textproc/kibana44/pkg-descr 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,8 @@ +Kibana is an open source (Apache Licensed), browser based analytics and search +dashboard for Elasticsearch. Kibana is a snap to setup and start using. Kibana +strives to be easy to get started with, while also being flexible and powerful, +just like Elasticsearch. + +Kibana 4.4 is compatible with Elasticsearch 2.2.x. + +WWW: https://www.elastic.co/products/kibana Property changes on: trunk/textproc/kibana44/pkg-descr ___________________________________________________________________ Added: svn:eol-style ## -0,0 +1 ## +native \ No newline at end of property Added: svn:mime-type ## -0,0 +1 ## +text/plain \ No newline at end of property Added: trunk/textproc/kibana44/pkg-plist =================================================================== --- trunk/textproc/kibana44/pkg-plist (rev 0) +++ trunk/textproc/kibana44/pkg-plist 2016-05-26 03:57:22 UTC (rev 21458) @@ -0,0 +1,11924 @@ + at preunexec rm -rf %D/%%WWWDIR%%/optimize/* 2>&1 >/dev/null || true + at sample etc/kibana.yml.sample +%%WWWDIR%%/LICENSE.txt +%%WWWDIR%%/README.txt +%%WWWDIR%%/node_modules/.bin/@bigfunger/decompress-zip +%%WWWDIR%%/node_modules/.bin/autoprefixer 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