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cad/chipvault

Project organizer for VHDL and Verilog RTL hardware designs

Flavor Version Run OSVersion Arch License Restricted Build Fetch Test Scan
200607 641 4.0 i386 No License 0 warn warn untested untested Reset Port

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Events

Machine Phase Type Time Message
m4032b fetch info 2026-06-02 21:57:57.928137 Fetch Started
m4032b fetch warn 2026-06-02 21:58:00.094824 LICENSE is not set.
m4032b fetch warn 2026-06-02 21:58:00.295596 Fetch complete.
m4032b build info 2026-06-02 21:58:00.462948 Build Started
m4032b build warn 2026-06-02 21:58:04.797784 MASTER_SITES contains non-HTTPS URLs: http://chipvault.sourceforge.net/
m4032b build warn 2026-06-02 21:58:04.811004 LICENSE is not set.
m4032b build warn 2026-06-02 21:58:04.905004 Build complete.

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