cad/verilator
Synthesizable Verilog to C++ compiler
| Flavor | Version | Run | OSVersion | Arch | License | Restricted | Build | Fetch | Test | Scan | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 5.026 | 641 | 4.0 | i386 | gpl3 | 0 | skip | skip | skip | skip | Reset Port |
License Permissions: dist-mirror dist-sell pkg-mirror pkg-sell auto-accept
Events
| Machine | Phase | Type | Time | Message |
|---|---|---|---|---|
| master | build | skip | 2026-06-02 16:41:58.687319 | is marked as broken on i386: see https://github.com/verilator/verilator/issues/3037 |
Links
Depends On
- devel/autoconf (build)
- devel/binutils (build)
- devel/bison (build)
- devel/gmake (build)
- lang/perl5.40 (build)
- lang/python311 (build)
- misc/help2man (build)
- shells/bash (build)
- devel/systemc (lib)
- devel/binutils (run)
- devel/gmake (run)
- lang/perl5.40 (run)
- lang/python311 (run)
- lang/python311 (test)
Depend Of
Categories
CVEs
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