[Midnightbsd-cvs] src: arm/arm: Remove unsupported architectures.
laffer1 at midnightbsd.org
laffer1 at midnightbsd.org
Sun Sep 7 21:41:21 EDT 2008
Log Message:
-----------
Remove unsupported architectures.
Removed Files:
-------------
src/sys/arm/arm:
autoconf.c
bcopy_page.S
bcopyinout.S
bcopyinout_xscale.S
blockio.S
bootconfig.c
bus_space_asm_generic.S
busdma_machdep.c
copystr.S
cpufunc.c
cpufunc_asm.S
cpufunc_asm_arm10.S
cpufunc_asm_arm7tdmi.S
cpufunc_asm_arm8.S
cpufunc_asm_arm9.S
cpufunc_asm_armv4.S
cpufunc_asm_ixp12x0.S
cpufunc_asm_sa1.S
cpufunc_asm_sa11x0.S
cpufunc_asm_xscale.S
db_disasm.c
db_interface.c
db_trace.c
disassem.c
dump_machdep.c
elf_machdep.c
exception.S
fiq.c
fiq_subr.S
fusu.S
genassym.c
identcpu.c
in_cksum.c
in_cksum_arm.S
intr.c
irq_dispatch.S
locore.S
machdep.c
mem.c
nexus.c
nexus_io.c
nexus_io_asm.S
pmap.c
setcpsr.S
setstack.s
support.S
swtch.S
sys_machdep.c
trap.c
uio_machdep.c
undefined.c
vectors.S
vm_machdep.c
src/sys/arm/compile:
.cvsignore
src/sys/arm/conf:
.cvsignore
src/sys/arm/include:
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
armreg.h
asm.h
asmacros.h
atomic.h
blockio.h
bootconfig.h
bus.h
bus_dma.h
clock.h
cpu.h
cpuconf.h
cpufunc.h
db_machdep.h
disassem.h
elf.h
endian.h
exec.h
fiq.h
float.h
floatingpoint.h
fp.h
frame.h
ieee.h
ieeefp.h
in_cksum.h
intr.h
katelib.h
kdb.h
limits.h
machdep.h
md_var.h
memdev.h
metadata.h
mutex.h
param.h
pcb.h
pcpu.h
pmap.h
pmc_mdep.h
proc.h
profile.h
psl.h
pte.h
ptrace.h
reg.h
reloc.h
resource.h
runq.h
setjmp.h
sf_buf.h
sigframe.h
signal.h
smp.h
stdarg.h
swi.h
sysarch.h
trap.h
ucontext.h
undefined.h
utrap.h
vmparam.h
src/sys/arm/sa11x0:
assabet_machdep.c
files.sa11x0
sa11x0.c
sa11x0_dmacreg.h
sa11x0_gpioreg.h
sa11x0_io.c
sa11x0_io_asm.S
sa11x0_irq.S
sa11x0_irqhandler.c
sa11x0_ost.c
sa11x0_ostreg.h
sa11x0_ppcreg.h
sa11x0_reg.h
sa11x0_var.h
std.sa11x0
uart_bus_sa1110.c
uart_cpu_sa1110.c
uart_dev_sa1110.c
uart_dev_sa1110.h
src/sys/arm/xscale:
std.xscale
xscalereg.h
xscalevar.h
src/sys/arm/xscale/i80321:
files.i80321
files.iq31244
i80321.c
i80321_intr.h
i80321_mcu.c
i80321_pci.c
i80321_space.c
i80321_timer.c
i80321_wdog.c
i80321reg.h
i80321var.h
iq31244_7seg.c
iq31244_machdep.c
iq80321.c
iq80321reg.h
iq80321var.h
obio.c
obio_space.c
obiovar.h
std.i80321
std.iq31244
uart_bus_i80321.c
uart_cpu_i80321.c
src/sys/ia64/acpica:
OsdEnvironment.c
acpi_machdep.c
acpi_wakeup.c
madt.c
src/sys/ia64/compile:
.cvsignore
src/sys/ia64/conf:
.cvsignore
GENERIC.hints
Makefile
NOTES
SKI
src/sys/ia64/disasm:
disasm.h
disasm_decode.c
disasm_extract.c
disasm_format.c
disasm_int.h
src/sys/ia64/ia32:
ia32_reg.c
ia32_signal.c
ia32_sigtramp.c
ia32_trap.c
src/sys/ia64/ia64:
autoconf.c
busdma_machdep.c
clock.c
context.S
db_interface.c
db_trace.c
dump_machdep.c
efi.c
elf_machdep.c
exception.S
gdb_machdep.c
genassym.c
in_cksum.c
interrupt.c
locore.S
machdep.c
mca.c
mem.c
mp_machdep.c
nexus.c
pal.S
pmap.c
ptrace_machdep.c
sal.c
sapic.c
setjmp.S
ssc.c
sscdisk.c
support.S
sys_machdep.c
syscall.S
trap.c
uio_machdep.c
uma_machdep.c
unaligned.c
unwind.c
vm_machdep.c
src/sys/ia64/include:
_bus.h
_inttypes.h
_limits.h
_regset.h
_stdint.h
_types.h
acpica_machdep.h
asm.h
atomic.h
bootinfo.h
bus.h
bus_dma.h
clock.h
cpu.h
cpufunc.h
db_machdep.h
dig64.h
efi.h
elf.h
endian.h
exec.h
float.h
floatingpoint.h
fpu.h
frame.h
gdb_machdep.h
ia64_cpu.h
ieee.h
ieeefp.h
in_cksum.h
intr.h
intrcnt.h
kdb.h
limits.h
mca.h
md_var.h
memdev.h
mutex.h
nexusvar.h
pal.h
param.h
pcb.h
pci_cfgreg.h
pcpu.h
pmap.h
pmc_mdep.h
proc.h
profile.h
pte.h
ptrace.h
reg.h
reloc.h
resource.h
runq.h
sal.h
sapicreg.h
sapicvar.h
setjmp.h
sf_buf.h
sigframe.h
signal.h
smp.h
stdarg.h
sysarch.h
ucontext.h
unwind.h
varargs.h
vmparam.h
src/sys/ia64/include/pc:
display.h
src/sys/ia64/isa:
isa.c
isa_dma.c
src/sys/ia64/pci:
pci_cfgreg.c
-------------- next part --------------
--- sys/ia64/ia64/interrupt.c
+++ /dev/null
@@ -1,433 +0,0 @@
-/* $FreeBSD: src/sys/ia64/ia64/interrupt.c,v 1.49.2.2 2006/03/10 19:37:33 jhb Exp $ */
-/* $NetBSD: interrupt.c,v 1.23 1998/02/24 07:38:01 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Authors: Keith Bostic, Chris G. Demetriou
- *
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-/*-
- * Additional Copyright (c) 1997 by Matthew Jacob for NASA/Ames Research Center.
- * Redistribute and modify at will, leaving only this additional copyright
- * notice.
- */
-
-#include "opt_ddb.h"
-
-#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/vmmeter.h>
-#include <sys/bus.h>
-#include <sys/malloc.h>
-#include <sys/ktr.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/smp.h>
-#include <sys/sysctl.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/fpu.h>
-#include <machine/frame.h>
-#include <machine/intr.h>
-#include <machine/md_var.h>
-#include <machine/pcb.h>
-#include <machine/reg.h>
-#include <machine/sapicvar.h>
-#include <machine/smp.h>
-
-#ifdef EVCNT_COUNTERS
-struct evcnt clock_intr_evcnt; /* event counter for clock intrs. */
-#else
-#include <sys/interrupt.h>
-#include <machine/intrcnt.h>
-#endif
-
-#ifdef DDB
-#include <ddb/ddb.h>
-#endif
-
-#ifdef SMP
-extern int mp_ipi_test;
-#endif
-
-volatile int mc_expected, mc_received;
-
-static void
-dummy_perf(unsigned long vector, struct trapframe *tf)
-{
- printf("performance interrupt!\n");
-}
-
-void (*perf_irq)(unsigned long, struct trapframe *) = dummy_perf;
-
-static unsigned int ints[MAXCPU];
-SYSCTL_OPAQUE(_debug, OID_AUTO, ints, CTLFLAG_RW, &ints, sizeof(ints), "IU",
- "");
-
-static unsigned int clks[MAXCPU];
-#ifdef SMP
-SYSCTL_OPAQUE(_debug, OID_AUTO, clks, CTLFLAG_RW, &clks, sizeof(clks), "IU",
- "");
-#else
-SYSCTL_INT(_debug, OID_AUTO, clks, CTLFLAG_RW, clks, 0, "");
-#endif
-
-#ifdef SMP
-static unsigned int asts[MAXCPU];
-SYSCTL_OPAQUE(_debug, OID_AUTO, asts, CTLFLAG_RW, &asts, sizeof(asts), "IU",
- "");
-
-static unsigned int rdvs[MAXCPU];
-SYSCTL_OPAQUE(_debug, OID_AUTO, rdvs, CTLFLAG_RW, &rdvs, sizeof(rdvs), "IU",
- "");
-#endif
-
-SYSCTL_NODE(_debug, OID_AUTO, clock, CTLFLAG_RW, 0, "clock statistics");
-
-static int adjust_edges = 0;
-SYSCTL_INT(_debug_clock, OID_AUTO, adjust_edges, CTLFLAG_RD,
- &adjust_edges, 0, "Number of times ITC got more than 12.5% behind");
-
-static int adjust_excess = 0;
-SYSCTL_INT(_debug_clock, OID_AUTO, adjust_excess, CTLFLAG_RD,
- &adjust_excess, 0, "Total number of ignored ITC interrupts");
-
-static int adjust_lost = 0;
-SYSCTL_INT(_debug_clock, OID_AUTO, adjust_lost, CTLFLAG_RD,
- &adjust_lost, 0, "Total number of lost ITC interrupts");
-
-static int adjust_ticks = 0;
-SYSCTL_INT(_debug_clock, OID_AUTO, adjust_ticks, CTLFLAG_RD,
- &adjust_ticks, 0, "Total number of ITC interrupts with adjustment");
-
-int
-interrupt(u_int64_t vector, struct trapframe *tf)
-{
- struct thread *td;
- volatile struct ia64_interrupt_block *ib = IA64_INTERRUPT_BLOCK;
- uint64_t adj, clk, itc;
- int64_t delta;
- int count;
-
- ia64_set_fpsr(IA64_FPSR_DEFAULT);
-
- td = curthread;
- atomic_add_int(&td->td_intr_nesting_level, 1);
-
- /*
- * Handle ExtINT interrupts by generating an INTA cycle to
- * read the vector.
- */
- if (vector == 0) {
- vector = ib->ib_inta;
- printf("ExtINT interrupt: vector=%ld\n", vector);
- if (vector == 15)
- goto stray;
- }
-
- if (vector == CLOCK_VECTOR) {/* clock interrupt */
- /* CTR0(KTR_INTR, "clock interrupt"); */
-
- PCPU_LAZY_INC(cnt.v_intr);
-#ifdef EVCNT_COUNTERS
- clock_intr_evcnt.ev_count++;
-#else
- intrcnt[INTRCNT_CLOCK]++;
-#endif
- clks[PCPU_GET(cpuid)]++;
-
- critical_enter();
-
- adj = PCPU_GET(clockadj);
- itc = ia64_get_itc();
- ia64_set_itm(itc + ia64_clock_reload - adj);
- clk = PCPU_GET(clock);
- delta = itc - clk;
- count = 0;
- while (delta >= ia64_clock_reload) {
- /* Only the BSP runs the real clock */
- if (PCPU_GET(cpuid) == 0)
- hardclock((struct clockframe *)tf);
- else
- hardclock_process((struct clockframe *)tf);
- if (profprocs != 0)
- profclock((struct clockframe *)tf);
- statclock((struct clockframe *)tf);
- delta -= ia64_clock_reload;
- clk += ia64_clock_reload;
- if (adj != 0)
- adjust_ticks++;
- count++;
- }
- if (count > 0) {
- adjust_lost += count - 1;
- if (delta > (ia64_clock_reload >> 3)) {
- if (adj == 0)
- adjust_edges++;
- adj = ia64_clock_reload >> 4;
- } else
- adj = 0;
- } else {
- adj = 0;
- adjust_excess++;
- }
- PCPU_SET(clock, clk);
- PCPU_SET(clockadj, adj);
-
- critical_exit();
-
-#ifdef SMP
- } else if (vector == ipi_vector[IPI_AST]) {
- asts[PCPU_GET(cpuid)]++;
- CTR1(KTR_SMP, "IPI_AST, cpuid=%d", PCPU_GET(cpuid));
- } else if (vector == ipi_vector[IPI_HIGH_FP]) {
- struct thread *thr = PCPU_GET(fpcurthread);
- if (thr != NULL) {
- mtx_lock_spin(&thr->td_md.md_highfp_mtx);
- save_high_fp(&thr->td_pcb->pcb_high_fp);
- thr->td_pcb->pcb_fpcpu = NULL;
- PCPU_SET(fpcurthread, NULL);
- mtx_unlock_spin(&thr->td_md.md_highfp_mtx);
- }
- } else if (vector == ipi_vector[IPI_RENDEZVOUS]) {
- rdvs[PCPU_GET(cpuid)]++;
- CTR1(KTR_SMP, "IPI_RENDEZVOUS, cpuid=%d", PCPU_GET(cpuid));
- smp_rendezvous_action();
- } else if (vector == ipi_vector[IPI_STOP]) {
- u_int32_t mybit = PCPU_GET(cpumask);
-
- CTR1(KTR_SMP, "IPI_STOP, cpuid=%d", PCPU_GET(cpuid));
- savectx(PCPU_GET(pcb));
- stopped_cpus |= mybit;
- while ((started_cpus & mybit) == 0)
- /* spin */;
- started_cpus &= ~mybit;
- stopped_cpus &= ~mybit;
- if (PCPU_GET(cpuid) == 0 && cpustop_restartfunc != NULL) {
- void (*f)(void) = cpustop_restartfunc;
- cpustop_restartfunc = NULL;
- (*f)();
- }
- } else if (vector == ipi_vector[IPI_TEST]) {
- CTR1(KTR_SMP, "IPI_TEST, cpuid=%d", PCPU_GET(cpuid));
- mp_ipi_test++;
-#endif
- } else {
- ints[PCPU_GET(cpuid)]++;
- ia64_dispatch_intr(tf, vector);
- }
-
-stray:
- atomic_subtract_int(&td->td_intr_nesting_level, 1);
- return (TRAPF_USERMODE(tf));
-}
-
-/*
- * Hardware irqs have vectors starting at this offset.
- */
-#define IA64_HARDWARE_IRQ_BASE 0x20
-
-struct ia64_intr {
- struct intr_event *event; /* interrupt event */
- volatile long *cntp; /* interrupt counter */
-};
-
-static struct mtx ia64_intrs_lock;
-static struct ia64_intr *ia64_intrs[256];
-
-extern struct sapic *ia64_sapics[];
-extern int ia64_sapic_count;
-
-static void
-ithds_init(void *dummy)
-{
-
- mtx_init(&ia64_intrs_lock, "intr table", NULL, MTX_SPIN);
-}
-SYSINIT(ithds_init, SI_SUB_INTR, SI_ORDER_SECOND, ithds_init, NULL);
-
-static void
-ia64_send_eoi(uintptr_t vector)
-{
- int irq, i;
-
- irq = vector - IA64_HARDWARE_IRQ_BASE;
- for (i = 0; i < ia64_sapic_count; i++) {
- struct sapic *sa = ia64_sapics[i];
- if (irq >= sa->sa_base && irq <= sa->sa_limit)
- sapic_eoi(sa, vector);
- }
-}
-
-int
-ia64_setup_intr(const char *name, int irq, driver_intr_t handler, void *arg,
- enum intr_type flags, void **cookiep, volatile long *cntp)
-{
- struct ia64_intr *i;
- int errcode;
- intptr_t vector = irq + IA64_HARDWARE_IRQ_BASE;
- char *intrname;
-
- /*
- * XXX - Can we have more than one device on a vector? If so, we have
- * a race condition here that needs to be worked around similar to
- * the fashion done in the i386 inthand_add() function.
- */
-
- /* First, check for an existing hash table entry for this vector. */
- mtx_lock_spin(&ia64_intrs_lock);
- i = ia64_intrs[vector];
- mtx_unlock_spin(&ia64_intrs_lock);
-
- if (i == NULL) {
- /* None was found, so create an entry. */
- i = malloc(sizeof(struct ia64_intr), M_DEVBUF, M_NOWAIT);
- if (i == NULL)
- return ENOMEM;
- if (cntp == NULL)
- i->cntp = intrcnt + irq + INTRCNT_ISA_IRQ;
- else
- i->cntp = cntp;
- if (name != NULL && *name != '\0') {
- /* XXX needs abstraction. Too error phrone. */
- intrname = intrnames + (irq + INTRCNT_ISA_IRQ) *
- INTRNAME_LEN;
- memset(intrname, ' ', INTRNAME_LEN - 1);
- bcopy(name, intrname, strlen(name));
- }
- errcode = intr_event_create(&i->event, (void *)vector, 0,
- (void (*)(void *))ia64_send_eoi, "intr:");
- if (errcode) {
- free(i, M_DEVBUF);
- return errcode;
- }
-
- mtx_lock_spin(&ia64_intrs_lock);
- ia64_intrs[vector] = i;
- mtx_unlock_spin(&ia64_intrs_lock);
- }
-
- /* Second, add this handler. */
- errcode = intr_event_add_handler(i->event, name, handler, arg,
- intr_priority(flags), flags, cookiep);
- if (errcode)
- return errcode;
-
- return (sapic_enable(irq, vector));
-}
-
-int
-ia64_teardown_intr(void *cookie)
-{
-
- return (intr_event_remove_handler(cookie));
-}
-
-void
-ia64_dispatch_intr(void *frame, unsigned long vector)
-{
- struct ia64_intr *i;
- struct intr_event *ie; /* our interrupt event */
- struct intr_handler *ih;
- int error, thread;
-
- /*
- * Find the interrupt thread for this vector.
- */
- i = ia64_intrs[vector];
- if (i == NULL)
- return; /* no event for this vector */
-
- if (i->cntp)
- atomic_add_long(i->cntp, 1);
-
- ie = i->event;
- KASSERT(ie != NULL, ("interrupt vector without an event"));
-
- /*
- * As an optimization, if an event has no handlers, don't
- * schedule it to run.
- */
- if (TAILQ_EMPTY(&ie->ie_handlers))
- return;
-
- /*
- * Execute all fast interrupt handlers directly without Giant. Note
- * that this means that any fast interrupt handler must be MP safe.
- */
- thread = 0;
- critical_enter();
- TAILQ_FOREACH(ih, &ie->ie_handlers, ih_next) {
- if (!(ih->ih_flags & IH_FAST)) {
- thread = 1;
- continue;
- }
- CTR4(KTR_INTR, "%s: exec %p(%p) for %s", __func__,
- ih->ih_handler, ih->ih_argument, ih->ih_name);
- ih->ih_handler(ih->ih_argument);
- }
- critical_exit();
-
- if (thread) {
- error = intr_event_schedule_thread(ie);
- KASSERT(error == 0, ("got an impossible stray interrupt"));
- } else
- ia64_send_eoi(vector);
-}
-
-#ifdef DDB
-
-static void
-db_show_vector(int vector)
-{
- int irq, i;
-
- irq = vector - IA64_HARDWARE_IRQ_BASE;
- for (i = 0; i < ia64_sapic_count; i++) {
- struct sapic *sa = ia64_sapics[i];
- if (irq >= sa->sa_base && irq <= sa->sa_limit)
- sapic_print(sa, irq - sa->sa_base);
- }
-}
-
-DB_SHOW_COMMAND(irq, db_show_irq)
-{
- int vector;
-
- if (have_addr) {
- vector = ((addr >> 4) % 16) * 10 + (addr % 16);
- db_show_vector(vector);
- } else {
- for (vector = IA64_HARDWARE_IRQ_BASE;
- vector < IA64_HARDWARE_IRQ_BASE + 64; vector++)
- db_show_vector(vector);
- }
-}
-
-#endif
--- sys/ia64/ia64/in_cksum.c
+++ /dev/null
@@ -1,241 +0,0 @@
-/* $FreeBSD: src/sys/ia64/ia64/in_cksum.c,v 1.4 2005/01/06 22:18:22 imp Exp $ */
-/* $NetBSD: in_cksum.c,v 1.7 1997/09/02 13:18:15 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1988, 1992, 1993
- * The Regents of the University of California. All rights reserved.
- * Copyright (c) 1996
- * Matt Thomas <matt at 3am-software.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)in_cksum.c 8.1 (Berkeley) 6/10/93
- */
-
-#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-
-#include <sys/param.h>
-#include <sys/mbuf.h>
-#include <sys/systm.h>
-#include <netinet/in_systm.h>
-#include <netinet/in.h>
-#include <netinet/ip.h>
-#include <machine/in_cksum.h>
-
-/*
- * Checksum routine for Internet Protocol family headers
- * (Portable Alpha version).
- *
- * This routine is very heavily used in the network
- * code and should be modified for each CPU to be as fast as possible.
- */
-
-#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
-#define REDUCE32 \
- { \
- q_util.q = sum; \
- sum = q_util.s[0] + q_util.s[1] + q_util.s[2] + q_util.s[3]; \
- }
-#define REDUCE16 \
- { \
- q_util.q = sum; \
- l_util.l = q_util.s[0] + q_util.s[1] + q_util.s[2] + q_util.s[3]; \
- sum = l_util.s[0] + l_util.s[1]; \
- ADDCARRY(sum); \
- }
-
-static const u_int32_t in_masks[] = {
- /*0 bytes*/ /*1 byte*/ /*2 bytes*/ /*3 bytes*/
- 0x00000000, 0x000000FF, 0x0000FFFF, 0x00FFFFFF, /* offset 0 */
- 0x00000000, 0x0000FF00, 0x00FFFF00, 0xFFFFFF00, /* offset 1 */
- 0x00000000, 0x00FF0000, 0xFFFF0000, 0xFFFF0000, /* offset 2 */
- 0x00000000, 0xFF000000, 0xFF000000, 0xFF000000, /* offset 3 */
-};
-
-union l_util {
- u_int16_t s[2];
- u_int32_t l;
-};
-union q_util {
- u_int16_t s[4];
- u_int32_t l[2];
- u_int64_t q;
-};
-
-static u_int64_t
-in_cksumdata(const void *buf, int len)
-{
- const u_int32_t *lw = (const u_int32_t *) buf;
- u_int64_t sum = 0;
- u_int64_t prefilled;
- int offset;
- union q_util q_util;
-
- if ((3 & (long) lw) == 0 && len == 20) {
- sum = (u_int64_t) lw[0] + lw[1] + lw[2] + lw[3] + lw[4];
- REDUCE32;
- return sum;
- }
-
- if ((offset = 3 & (long) lw) != 0) {
- const u_int32_t *masks = in_masks + (offset << 2);
- lw = (u_int32_t *) (((long) lw) - offset);
- sum = *lw++ & masks[len >= 3 ? 3 : len];
- len -= 4 - offset;
- if (len <= 0) {
- REDUCE32;
- return sum;
- }
- }
-#if 0
- /*
- * Force to cache line boundary.
- */
- offset = 32 - (0x1f & (long) lw);
- if (offset < 32 && len > offset) {
- len -= offset;
- if (4 & offset) {
- sum += (u_int64_t) lw[0];
- lw += 1;
- }
- if (8 & offset) {
- sum += (u_int64_t) lw[0] + lw[1];
- lw += 2;
- }
- if (16 & offset) {
- sum += (u_int64_t) lw[0] + lw[1] + lw[2] + lw[3];
- lw += 4;
- }
- }
-#endif
- /*
- * access prefilling to start load of next cache line.
- * then add current cache line
- * save result of prefilling for loop iteration.
- */
- prefilled = lw[0];
- while ((len -= 32) >= 4) {
- u_int64_t prefilling = lw[8];
- sum += prefilled + lw[1] + lw[2] + lw[3]
- + lw[4] + lw[5] + lw[6] + lw[7];
- lw += 8;
- prefilled = prefilling;
- }
- if (len >= 0) {
- sum += prefilled + lw[1] + lw[2] + lw[3]
- + lw[4] + lw[5] + lw[6] + lw[7];
- lw += 8;
- } else {
- len += 32;
- }
- while ((len -= 16) >= 0) {
- sum += (u_int64_t) lw[0] + lw[1] + lw[2] + lw[3];
- lw += 4;
- }
- len += 16;
- while ((len -= 4) >= 0) {
- sum += (u_int64_t) *lw++;
- }
- len += 4;
- if (len > 0)
- sum += (u_int64_t) (in_masks[len] & *lw);
- REDUCE32;
- return sum;
-}
-
-u_short
-in_addword(u_short a, u_short b)
-{
- u_int64_t sum = a + b;
-
- ADDCARRY(sum);
- return (sum);
-}
-
-u_short
-in_pseudo(u_int32_t a, u_int32_t b, u_int32_t c)
-{
- u_int64_t sum;
- union q_util q_util;
- union l_util l_util;
-
- sum = (u_int64_t) a + b + c;
- REDUCE16;
- return (sum);
-}
-
-u_short
-in_cksum_skip(struct mbuf *m, int len, int skip)
-{
- u_int64_t sum = 0;
- int mlen = 0;
- int clen = 0;
- caddr_t addr;
- union q_util q_util;
- union l_util l_util;
-
- len -= skip;
- for (; skip && m; m = m->m_next) {
- if (m->m_len > skip) {
- mlen = m->m_len - skip;
- addr = mtod(m, caddr_t) + skip;
- goto skip_start;
- } else {
- skip -= m->m_len;
- }
- }
-
- for (; m && len; m = m->m_next) {
- if (m->m_len == 0)
- continue;
- mlen = m->m_len;
- addr = mtod(m, caddr_t);
-skip_start:
- if (len < mlen)
- mlen = len;
- if ((clen ^ (long) addr) & 1)
- sum += in_cksumdata(addr, mlen) << 8;
- else
- sum += in_cksumdata(addr, mlen);
-
- clen += mlen;
- len -= mlen;
- }
- REDUCE16;
- return (~sum & 0xffff);
-}
-
-u_int in_cksum_hdr(const struct ip *ip)
-{
- u_int64_t sum = in_cksumdata(ip, sizeof(struct ip));
- union q_util q_util;
- union l_util l_util;
- REDUCE16;
- return (~sum & 0xffff);
-}
--- sys/ia64/ia64/exception.S
+++ /dev/null
@@ -1,1439 +0,0 @@
-/*-
- * Copyright (c) 2003,2004 Marcel Moolenaar
- * Copyright (c) 2000 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/exception.S,v 1.56.2.1 2005/09/13 21:07:14 marcel Exp $");
-
-#include <machine/pte.h>
-#include <assym.s>
-
-/*
- * ar.k7 = kernel memory stack
- * ar.k6 = kernel register stack
- * ar.k5 = EPC gateway page
- * ar.k4 = PCPU data
- */
-
- .text
-
-/*
- * exception_save: save interrupted state
- *
- * Arguments:
- * r16 address of bundle that contains the branch. The
- * return address will be the next bundle.
- * r17 the value to save as ifa in the trapframe. This
- * normally is cr.ifa, but some interruptions set
- * set cr.iim and not cr.ifa.
- *
- * Returns:
- * p15 interrupted from user stack
- * p14 interrupted from kernel stack
- * p13 interrupted from user backing store
- * p12 interrupted from kernel backing store
- * p11 interrupts were enabled
- * p10 interrupts were disabled
- */
-ENTRY_NOPROFILE(exception_save, 0)
-{ .mii
- mov r20=ar.unat
- extr.u r31=sp,61,3
- mov r18=pr
- ;;
-}
-{ .mmi
- cmp.le p14,p15=5,r31
- ;;
-(p15) mov r23=ar.k7 // kernel memory stack
-(p14) mov r23=sp
- ;;
-}
-{ .mii
- mov r21=ar.rsc
- add r30=-SIZEOF_TRAPFRAME,r23
- ;;
- dep r30=0,r30,0,10
- ;;
-}
-{ .mmi
- mov ar.rsc=0
- sub r19=r23,r30
- add r31=8,r30
- ;;
-}
-{ .mlx
- mov r22=cr.iip
- movl r26=exception_save_restart
- ;;
-}
-
- /*
- * We have a 1KB aligned trapframe, pointed to by sp. If we write
- * to the trapframe, we may trigger a data nested TLB fault. By
- * aligning the trapframe on a 1KB boundary, we guarantee that if
- * we get a data nested TLB fault, it will be on the very first
- * write. Since the data nested TLB fault does not preserve any
- * state, we have to be careful what we clobber. Consequently, we
- * have to be careful what we use here. Below a list of registers
- * that are currently alive:
- * r16,r17=arguments
- * r18=pr, r19=length, r20=unat, r21=rsc, r22=iip, r23=TOS
- * r26=restart point
- * r30,r31=trapframe pointers
- * p14,p15=memory stack switch
- */
-exception_save_restart:
-{ .mmi
- st8 [r30]=r19,16 // length
- st8 [r31]=r0,16 // flags
- add r19=16,r19
- ;;
-}
-{ .mmi
- st8.spill [r30]=sp,16 // sp
- st8 [r31]=r20,16 // unat
- sub sp=r23,r19
- ;;
-}
-{ .mmi
- mov r19=ar.rnat
- mov r20=ar.bspstore
- mov r23=rp
- ;;
-}
- // r18=pr, r19=rnat, r20=bspstore, r21=rsc, r22=iip, r23=rp
-{ .mmi
- st8 [r30]=r23,16 // rp
- st8 [r31]=r18,16 // pr
- mov r24=ar.pfs
- ;;
-}
-{ .mmb
- st8 [r30]=r24,16 // pfs
- st8 [r31]=r20,16 // bspstore
- cover
- ;;
-}
-{ .mmi
- mov r18=ar.fpsr
- mov r23=cr.ipsr
- extr.u r24=r20,61,3
- ;;
-}
- // r18=fpsr, r19=rnat, r20=bspstore, r21=rsc, r22=iip, r23=ipsr
-{ .mmi
- st8 [r30]=r19,16 // rnat
- st8 [r31]=r0,16 // __spare
- cmp.le p12,p13=5,r24
- ;;
-}
-{ .mmi
- st8.spill [r30]=r13,16 // tp
- st8 [r31]=r21,16 // rsc
- tbit.nz p11,p10=r23,14 // p11=interrupts enabled
- ;;
-}
-{ .mmi
-(p13) mov r21=ar.k6 // kernel register stack
- ;;
- st8 [r30]=r18,16 // fpsr
-(p13) dep r20=r20,r21,0,9 // align dirty registers
- ;;
-}
- // r20=bspstore, r22=iip, r23=ipsr
-{ .mmi
- st8 [r31]=r23,16 // psr
-(p13) mov ar.bspstore=r20
- nop 0
- ;;
-}
-{ .mmi
- mov r18=ar.bsp
- ;;
- mov r19=cr.ifs
- sub r18=r18,r20
- ;;
-}
-{ .mmi
- st8.spill [r30]=gp,16 // gp
- st8 [r31]=r18,16 // ndirty
- nop 0
- ;;
-}
- // r19=ifs, r22=iip
-{ .mmi
- st8 [r30]=r19,16 // cfm
- st8 [r31]=r22,16 // iip
- nop 0
- ;;
-}
-{ .mmi
- st8 [r30]=r17 // ifa
- mov r18=cr.isr
- add r29=16,r30
- ;;
-}
-{ .mmi
- st8 [r31]=r18 // isr
- add r30=8,r29
- add r31=16,r29
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r30]=r2,16 // r2
- .mem.offset 8,0
- st8.spill [r31]=r3,16 // r3
- add r2=9*8,r29
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r30]=r8,16 // r8
- .mem.offset 8,0
- st8.spill [r31]=r9,16 // r9
- add r3=8,r2
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r30]=r10,16 // r10
- .mem.offset 8,0
- st8.spill [r31]=r11,16 // r11
- add r8=16,r16
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r30]=r14 // r14
- .mem.offset 8,0
- st8.spill [r31]=r15 // r15
- mov r9=r29
-}
-{ .mmb
- mov r10=ar.csd
- mov r11=ar.ssd
- bsw.1
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r2]=r16,16 // r16
- .mem.offset 8,0
- st8.spill [r3]=r17,16 // r17
- mov r14=b6
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r2]=r18,16 // r18
- .mem.offset 8,0
- st8.spill [r3]=r19,16 // r19
- mov r15=b7
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r2]=r20,16 // r20
- .mem.offset 8,0
- st8.spill [r3]=r21,16 // r21
- mov b7=r8
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r2]=r22,16 // r22
- .mem.offset 8,0
- st8.spill [r3]=r23,16 // r23
- ;;
-}
-
- .mem.offset 0,0
- st8.spill [r2]=r24,16 // r24
- .mem.offset 8,0
- st8.spill [r3]=r25,16 // r25
- ;;
- .mem.offset 0,0
- st8.spill [r2]=r26,16 // r26
- .mem.offset 8,0
- st8.spill [r3]=r27,16 // r27
- ;;
- .mem.offset 0,0
- st8.spill [r2]=r28,16 // r28
- .mem.offset 8,0
- st8.spill [r3]=r29,16 // r29
- ;;
- .mem.offset 0,0
- st8.spill [r2]=r30,16 // r30
- .mem.offset 8,0
- st8.spill [r3]=r31,16 // r31
- ;;
-
-{ .mmi
- st8 [r2]=r14,16 // b6
- mov r17=ar.unat
- nop 0
- ;;
-}
-{ .mmi
- st8 [r3]=r15,16 // b7
- mov r16=ar.ccv
- nop 0
- ;;
-}
-{ .mmi
- st8 [r2]=r16,16 // ccv
- st8 [r3]=r10,16 // csd
- nop 0
- ;;
-}
-{ .mmi
- st8 [r2]=r11,24 // ssd
- st8 [r9]=r17
- nop 0
- ;;
-}
-
- stf.spill [r3]=f6,32 // f6
- stf.spill [r2]=f7,32 // f7
- ;;
- stf.spill [r3]=f8,32 // f8
- stf.spill [r2]=f9,32 // f9
- ;;
- stf.spill [r3]=f10,32 // f10
- stf.spill [r2]=f11,32 // f11
- ;;
- stf.spill [r3]=f12,32 // f12
- stf.spill [r2]=f13,32 // f13
- ;;
- stf.spill [r3]=f14 // f14
- stf.spill [r2]=f15 // f15
- ;;
-{ .mmi
- mov ar.rsc=3
- mov r13=ar.k4
- nop 0
- ;;
-}
-{ .mlx
- ssm psr.ic|psr.dfh
- movl gp=__gp
- ;;
-}
-{ .mfb
- srlz.d
- nop 0
- br.sptk b7
- ;;
-}
-END(exception_save)
-
-/*
- * exception_restore: restore interrupted state
- *
- * Arguments:
- * sp+16 trapframe pointer
- */
-ENTRY_NOPROFILE(exception_restore, 0)
-{ .mmi
- rsm psr.i
- add sp=16,sp
- nop 0
- ;;
-}
-{ .mmi
- add r3=SIZEOF_TRAPFRAME-32,sp
- add r2=SIZEOF_TRAPFRAME-16,sp
- add r8=SIZEOF_SPECIAL+16,sp
- ;;
-}
- // The next load can trap. Let it be...
- ldf.fill f15=[r2],-32 // f15
- ldf.fill f14=[r3],-32 // f14
- ;;
- ldf.fill f13=[r2],-32 // f13
- ldf.fill f12=[r3],-32 // f12
- ;;
- ldf.fill f11=[r2],-32 // f11
- ldf.fill f10=[r3],-32 // f10
- ;;
- ldf.fill f9=[r2],-32 // f9
- ldf.fill f8=[r3],-32 // f8
- ;;
- ldf.fill f7=[r2],-24 // f7
- ldf.fill f6=[r3],-16 // f6
- ;;
-
-{ .mmi
- ld8 r8=[r8] // unat (after)
- ;;
- mov ar.unat=r8
- nop 0
- ;;
-}
-
- ld8 r10=[r2],-16 // ssd
- ld8 r11=[r3],-16 // csd
- ;;
- mov ar.ssd=r10
- mov ar.csd=r11
-
- ld8 r14=[r2],-16 // ccv
- ld8 r15=[r3],-16 // b7
- ;;
-
-{ .mmi
- mov ar.ccv=r14
- ld8 r8=[r2],-16 // b6
- mov b7=r15
- ;;
-}
-{ .mmi
- ld8.fill r31=[r3],-16 // r31
- ld8.fill r30=[r2],-16 // r30
- mov b6=r8
- ;;
-}
-
- ld8.fill r29=[r3],-16 // r29
- ld8.fill r28=[r2],-16 // r28
- ;;
- ld8.fill r27=[r3],-16 // r27
- ld8.fill r26=[r2],-16 // r26
- ;;
- ld8.fill r25=[r3],-16 // r25
- ld8.fill r24=[r2],-16 // r24
- ;;
- ld8.fill r23=[r3],-16 // r23
- ld8.fill r22=[r2],-16 // r22
- ;;
- ld8.fill r21=[r3],-16 // r21
- ld8.fill r20=[r2],-16 // r20
- ;;
- ld8.fill r19=[r3],-16 // r19
- ld8.fill r18=[r2],-16 // r18
- ;;
-
-{ .mmb
- ld8.fill r17=[r3],-16 // r17
- ld8.fill r16=[r2],-16 // r16
- bsw.0
- ;;
-}
-{ .mmi
- ld8.fill r15=[r3],-16 // r15
- ld8.fill r14=[r2],-16 // r14
- add r31=16,sp
- ;;
-}
-{ .mmi
- ld8 r16=[sp] // tf_length
- ld8.fill r11=[r3],-16 // r11
- add r30=24,sp
- ;;
-}
-{ .mmi
- ld8.fill r10=[r2],-16 // r10
- ld8.fill r9=[r3],-16 // r9
- add r16=r16,sp // ar.k7
- ;;
-}
-{ .mmi
- ld8.fill r8=[r2],-16 // r8
- ld8.fill r3=[r3] // r3
- ;;
-}
- // We want nested TLB faults from here on...
- rsm psr.ic|psr.i
- ld8.fill r2=[r2] // r2
- nop 0
- ;;
- srlz.d
- ld8.fill sp=[r31],16 // sp
- nop 0
- ;;
-
- ld8 r17=[r30],16 // unat
- ld8 r29=[r31],16 // rp
- ;;
- ld8 r18=[r30],16 // pr
- ld8 r28=[r31],16 // pfs
- mov rp=r29
- ;;
- ld8 r20=[r30],24 // bspstore
- ld8 r21=[r31],24 // rnat
- mov ar.pfs=r28
- ;;
- ld8.fill r29=[r30],16 // tp
- ld8 r22=[r31],16 // rsc
- ;;
-{ .mmi
- ld8 r23=[r30],16 // fpsr
- ld8 r24=[r31],16 // psr
- extr.u r28=r20,61,3
- ;;
-}
-{ .mmi
- ld8.fill r1=[r30],16 // gp
- ld8 r25=[r31],16 // ndirty
- cmp.le p14,p15=5,r28
- ;;
-}
-{ .mmb
- ld8 r26=[r30] // cfm
- ld8 r19=[r31] // ip
- nop 0
- ;;
-}
-{ .mib
- // Switch register stack
- alloc r30=ar.pfs,0,0,0,0 // discard current frame
- shl r31=r25,16 // value for ar.rsc
- nop 0
- ;;
-}
- // The loadrs can fault if the backing store is not currently
- // mapped. We assured forward progress by getting everything we
- // need from the trapframe so that we don't care if the CPU
- // purges that translation when it needs to insert a new one for
- // the backing store.
-{ .mmi
- mov ar.rsc=r31 // setup for loadrs
- mov ar.k7=r16
-(p15) mov r13=r29
- ;;
-}
-exception_restore_restart:
-{ .mmi
- mov r30=ar.bspstore
- ;;
- loadrs // load user regs
- nop 0
- ;;
-}
-{ .mmi
- mov r31=ar.bspstore
- ;;
- mov ar.bspstore=r20
- dep r31=0,r31,0,13 // 8KB aligned
- ;;
-}
-{ .mmb
- mov ar.k6=r31
- mov ar.rnat=r21
- nop 0
- ;;
-}
-{ .mmb
- mov ar.unat=r17
- mov cr.iip=r19
- nop 0
-}
-{ .mmi
- mov cr.ipsr=r24
- mov cr.ifs=r26
- mov pr=r18,0x1fffe
- ;;
-}
-{ .mmb
- mov ar.rsc=r22
- mov ar.fpsr=r23
- rfi
- ;;
-}
-END(exception_restore)
-
-/*
- * Call exception_save_regs to preserve the interrupted state in a
- * trapframe. Note that we don't use a call instruction because we
- * must be careful not to lose track of the RSE state. We then call
- * trap() with the value of _n_ as an argument to handle the
- * exception. We arrange for trap() to return to exception_restore
- * which will restore the interrupted state before executing an rfi to
- * resume it.
- */
-#define CALL(_func_, _n_, _ifa_) \
-{ .mib ; \
- mov r17=_ifa_ ; \
- mov r16=ip ; \
- br.sptk exception_save ; \
-} ; \
-{ .mmi ; \
-(p11) ssm psr.i ;; \
- alloc r15=ar.pfs,0,0,2,0 ; \
- mov out0=_n_ ;; \
-} ; \
-{ .mfb ; \
- add out1=16,sp ; \
- nop 0 ; \
- br.call.sptk rp=_func_ ; \
-} ; \
-{ .mfb ; \
- nop 0 ; \
- nop 0 ; \
- br.sptk exception_restore ; \
-}
-
-#define IVT_ENTRY(name, offset) \
- .org ia64_vector_table + offset; \
- .global ivt_##name; \
- .proc ivt_##name; \
- .prologue; \
- .unwabi @svr4, 'I'; \
- .save rp, r0; \
- .body; \
-ivt_##name:
-
-#define IVT_END(name) \
- .endp ivt_##name
-
-#ifdef COMPAT_IA32
-#define IA32_TRAP ia32_trap
-#else
-#define IA32_TRAP trap
-#endif
-
-/*
- * The IA64 Interrupt Vector Table (IVT) contains 20 slots with 64
- * bundles per vector and 48 slots with 16 bundles per vector.
- */
-
- .section .text.ivt,"ax"
-
- .align 32768
- .global ia64_vector_table
- .size ia64_vector_table, 32768
-ia64_vector_table:
-
-IVT_ENTRY(VHPT_Translation, 0x0000)
- CALL(trap, 0, cr.ifa)
-IVT_END(VHPT_Translation)
-
-IVT_ENTRY(Instruction_TLB, 0x0400)
- mov r16=cr.ifa
- mov r17=pr
- ;;
- thash r18=r16
- ttag r19=r16
- ;;
- add r21=16,r18 // tag
- add r20=24,r18 // collision chain
- ;;
- ld8 r21=[r21] // check VHPT tag
- ld8 r20=[r20] // bucket head
- ;;
- cmp.ne p15,p0=r21,r19
-(p15) br.dpnt.few 1f
- ;;
- ld8 r21=[r18] // read pte
- ;;
- itc.i r21 // insert pte
- ;;
- mov pr=r17,0x1ffff
- rfi // done
- ;;
-1: ld8 r20=[r20] // first entry
- ;;
- rsm psr.dt // turn off data translations
- ;;
- srlz.d // serialize
- ;;
-2: cmp.eq p15,p0=r0,r20 // done?
-(p15) br.cond.spnt.few 9f // bail if done
- ;;
- add r21=16,r20 // tag location
- ;;
- ld8 r21=[r21] // read tag
- ;;
- cmp.ne p15,p0=r21,r19 // compare tags
-(p15) br.cond.sptk.few 3f // if not, read next in chain
- ;;
- ld8 r21=[r20],8 // read pte
- ;;
- ld8 r22=[r20] // read rest of pte
- ;;
- dep r18=0,r18,61,3 // convert vhpt ptr to physical
- ;;
- add r20=16,r18 // address of tag
- ;;
- ld8.acq r23=[r20] // read old tag
- ;;
- dep r23=-1,r23,63,1 // set ti bit
- ;;
- st8.rel [r20]=r23 // store old tag + ti
- ;;
- mf // make sure everyone sees
- ;;
- st8 [r18]=r21,8 // store pte
- ;;
- st8 [r18]=r22,8
- ;;
- st8.rel [r18]=r19 // store new tag
- ;;
- itc.i r21 // and place in TLB
- ;;
- mov pr=r17,0x1ffff // restore predicates
- rfi
-
-3: add r20=24,r20 // next in chain
- ;;
- ld8 r20=[r20] // read chain
- br.cond.sptk.few 2b // loop
-
-9: mov pr=r17,0x1ffff // restore predicates
- ssm psr.dt
- ;;
- srlz.d
- ;;
- CALL(trap, 20, cr.ifa) // Page Not Present trap
-IVT_END(Instruction_TLB)
-
-IVT_ENTRY(Data_TLB, 0x0800)
- mov r16=cr.ifa
- mov r17=pr
- ;;
- thash r18=r16
- ttag r19=r16
- ;;
- add r21=16,r18 // tag
- add r20=24,r18 // collision chain
- ;;
- ld8 r21=[r21] // check VHPT tag
- ld8 r20=[r20] // bucket head
- ;;
- cmp.ne p15,p0=r21,r19
-(p15) br.dpnt.few 1f
- ;;
- ld8 r21=[r18] // read pte
- ;;
- itc.d r21 // insert pte
- ;;
- mov pr=r17,0x1ffff
- rfi // done
- ;;
-1: ld8 r20=[r20] // first entry
- ;;
- rsm psr.dt // turn off data translations
- ;;
- srlz.d // serialize
- ;;
-2: cmp.eq p15,p0=r0,r20 // done?
-(p15) br.cond.spnt.few 9f // bail if done
- ;;
- add r21=16,r20 // tag location
- ;;
- ld8 r21=[r21] // read tag
- ;;
- cmp.ne p15,p0=r21,r19 // compare tags
-(p15) br.cond.sptk.few 3f // if not, read next in chain
- ;;
- ld8 r21=[r20],8 // read pte
- ;;
- ld8 r22=[r20] // read rest of pte
- ;;
- dep r18=0,r18,61,3 // convert vhpt ptr to physical
- ;;
- add r20=16,r18 // address of tag
- ;;
- ld8.acq r23=[r20] // read old tag
- ;;
- dep r23=-1,r23,63,1 // set ti bit
- ;;
- st8.rel [r20]=r23 // store old tag + ti
- ;;
- mf // make sure everyone sees
- ;;
- st8 [r18]=r21,8 // store pte
- ;;
- st8 [r18]=r22,8
- ;;
- st8.rel [r18]=r19 // store new tag
- ;;
- itc.d r21 // and place in TLB
- ;;
- mov pr=r17,0x1ffff // restore predicates
- rfi
-
-3: add r20=24,r20 // next in chain
- ;;
- ld8 r20=[r20] // read chain
- br.cond.sptk.few 2b // loop
-
-9: mov pr=r17,0x1ffff // restore predicates
- ssm psr.dt
- ;;
- srlz.d
- ;;
- CALL(trap, 20, cr.ifa) // Page Not Present trap
-IVT_END(Data_TLB)
-
-IVT_ENTRY(Alternate_Instruction_TLB, 0x0c00)
- mov r16=cr.ifa // where did it happen
- mov r18=pr // save predicates
- ;;
- extr.u r17=r16,61,3 // get region number
- ;;
- cmp.ge p13,p0=5,r17 // RR0-RR5?
- cmp.eq p15,p14=7,r17 // RR7->p15, RR6->p14
-(p13) br.spnt 9f
- ;;
-(p15) movl r17=PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+ \
- PTE_AR_RX
-(p14) movl r17=PTE_PRESENT+PTE_MA_UC+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+ \
- PTE_AR_RX
- ;;
- dep r16=0,r16,50,14 // clear bits above PPN
- ;;
- dep r16=r17,r16,0,12 // put pte bits in 0..11
- ;;
- itc.i r16
- mov pr=r18,0x1ffff // restore predicates
- ;;
- rfi
-9: mov pr=r18,0x1ffff // restore predicates
- CALL(trap, 3, cr.ifa)
-IVT_END(Alternate_Instruction_TLB)
-
-IVT_ENTRY(Alternate_Data_TLB, 0x1000)
- mov r16=cr.ifa // where did it happen
- mov r18=pr // save predicates
- ;;
- extr.u r17=r16,61,3 // get region number
- ;;
- cmp.ge p13,p0=5,r17 // RR0-RR5?
- cmp.eq p15,p14=7,r17 // RR7->p15, RR6->p14
-(p13) br.spnt 9f
- ;;
-(p15) movl r17=PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+ \
- PTE_AR_RW
-(p14) movl r17=PTE_PRESENT+PTE_MA_UC+PTE_ACCESSED+PTE_DIRTY+PTE_PL_KERN+ \
- PTE_AR_RW
- ;;
- dep r16=0,r16,50,14 // clear bits above PPN
- ;;
- dep r16=r17,r16,0,12 // put pte bits in 0..11
- ;;
- itc.d r16
- mov pr=r18,0x1ffff // restore predicates
- ;;
- rfi
-9: mov pr=r18,0x1ffff // restore predicates
- CALL(trap, 4, cr.ifa)
-IVT_END(Alternate_Data_TLB)
-
-IVT_ENTRY(Data_Nested_TLB, 0x1400)
- // See exception_save_restart and exception_restore_restart for the
- // contexts that may cause a data nested TLB. We can only use the
- // banked general registers and predicates, but don't use:
- // p14 & p15 - Set in exception save
- // r16 & r17 - Arguments to exception save
- // r30 - Faulting address (modulo page size)
- // We assume r30 has the virtual addresses that relate to the data
- // nested TLB fault. The address does not have to be exact, as long
- // as it's in the same page. We use physical addressing to avoid
- // double nested faults. Since all virtual addresses we encounter
- // here are direct mapped region 7 addresses, we have no problem
- // constructing physical addresses.
-{ .mlx
- rsm psr.dt
- movl r27=ia64_kptdir
- ;;
-}
-{ .mii
- srlz.d
- dep r27=0,r27,61,3
- extr.u r28=r30,PAGE_SHIFT,61-PAGE_SHIFT
- ;;
-}
-{ .mii
- ld8 r27=[r27]
- shr.u r29=r28,PAGE_SHIFT-5 // dir index
- extr.u r28=r28,0,PAGE_SHIFT-5 // pte index
- ;;
-}
-{ .mmi
- shladd r27=r29,3,r27
- ;;
- mov cr.ifa=r30
- dep r27=0,r27,61,3
- ;;
-}
-{ .mmi
- ld8 r27=[r27]
- mov r29=rr[r30]
- shl r28=r28,5
- ;;
-}
-{ .mii
- add r27=r27,r28 // address of pte
- dep r29=0,r29,0,2
- ;;
- dep r27=0,r27,61,3
- ;;
-}
-{ .mmi
- ld8 r28=[r27]
- ;;
- mov cr.itir=r29
- or r28=PTE_DIRTY+PTE_ACCESSED,r28
- ;;
-}
-{ .mlx
- st8 [r27]=r28
- movl r29=exception_save_restart
- ;;
-}
-{ .mmi
- itc.d r28
- ;;
- ssm psr.dt
- cmp.eq p12,p13=r26,r29
- ;;
-}
-{ .mbb
- srlz.d
-(p12) br.sptk exception_save_restart
-(p13) br.sptk exception_restore_restart
- ;;
-}
-IVT_END(Data_Nested_TLB)
-
-IVT_ENTRY(Instruction_Key_Miss, 0x1800)
- CALL(trap, 6, cr.ifa)
-IVT_END(Instruction_Key_Miss)
-
-IVT_ENTRY(Data_Key_Miss, 0x1c00)
- CALL(trap, 7, cr.ifa)
-IVT_END(Data_Key_Miss)
-
-IVT_ENTRY(Dirty_Bit, 0x2000)
- mov r16=cr.ifa
- mov r17=pr
- ;;
- thash r18=r16
- ;;
- ttag r19=r16
- add r20=24,r18 // collision chain
- ;;
- ld8 r20=[r20] // bucket head
- ;;
- ld8 r20=[r20] // first entry
- ;;
- rsm psr.dt // turn off data translations
- ;;
- srlz.d // serialize
- ;;
-1: cmp.eq p15,p0=r0,r20 // done?
-(p15) br.cond.spnt.few 9f // bail if done
- ;;
- add r21=16,r20 // tag location
- ;;
- ld8 r21=[r21] // read tag
- ;;
- cmp.ne p15,p0=r21,r19 // compare tags
-(p15) br.cond.sptk.few 2f // if not, read next in chain
- ;;
- ld8 r21=[r20] // read pte
- mov r22=PTE_DIRTY+PTE_ACCESSED
- ;;
- or r21=r22,r21 // set dirty & access bit
- ;;
- st8 [r20]=r21,8 // store back
- ;;
- ld8 r22=[r20] // read rest of pte
- ;;
- dep r18=0,r18,61,3 // convert vhpt ptr to physical
- ;;
- add r20=16,r18 // address of tag
- ;;
- ld8.acq r23=[r20] // read old tag
- ;;
- dep r23=-1,r23,63,1 // set ti bit
- ;;
- st8.rel [r20]=r23 // store old tag + ti
- ;;
- mf // make sure everyone sees
- ;;
- st8 [r18]=r21,8 // store pte
- ;;
- st8 [r18]=r22,8
- ;;
- st8.rel [r18]=r19 // store new tag
- ;;
- itc.d r21 // and place in TLB
- ;;
- mov pr=r17,0x1ffff // restore predicates
- rfi
-
-2: add r20=24,r20 // next in chain
- ;;
- ld8 r20=[r20] // read chain
- br.cond.sptk.few 1b // loop
-
-9: mov pr=r17,0x1ffff // restore predicates
- CALL(trap, 8, cr.ifa) // die horribly
-IVT_END(Dirty_Bit)
-
-IVT_ENTRY(Instruction_Access_Bit, 0x2400)
- mov r16=cr.ifa
- mov r17=pr
- ;;
- thash r18=r16
- ;;
- ttag r19=r16
- add r20=24,r18 // collision chain
- ;;
- ld8 r20=[r20] // bucket head
- ;;
- ld8 r20=[r20] // first entry
- ;;
- rsm psr.dt // turn off data translations
- ;;
- srlz.d // serialize
- ;;
-1: cmp.eq p15,p0=r0,r20 // done?
-(p15) br.cond.spnt.few 9f // bail if done
- ;;
- add r21=16,r20 // tag location
- ;;
- ld8 r21=[r21] // read tag
- ;;
- cmp.ne p15,p0=r21,r19 // compare tags
-(p15) br.cond.sptk.few 2f // if not, read next in chain
- ;;
- ld8 r21=[r20] // read pte
- mov r22=PTE_ACCESSED
- ;;
- or r21=r22,r21 // set accessed bit
- ;;
- st8 [r20]=r21,8 // store back
- ;;
- ld8 r22=[r20] // read rest of pte
- ;;
- dep r18=0,r18,61,3 // convert vhpt ptr to physical
- ;;
- add r20=16,r18 // address of tag
- ;;
- ld8.acq r23=[r20] // read old tag
- ;;
- dep r23=-1,r23,63,1 // set ti bit
- ;;
- st8.rel [r20]=r23 // store old tag + ti
- ;;
- mf // make sure everyone sees
- ;;
- st8 [r18]=r21,8 // store pte
- ;;
- st8 [r18]=r22,8
- ;;
- st8.rel [r18]=r19 // store new tag
- ;;
- itc.i r21 // and place in TLB
- ;;
- mov pr=r17,0x1ffff // restore predicates
- rfi // walker will retry the access
-
-2: add r20=24,r20 // next in chain
- ;;
- ld8 r20=[r20] // read chain
- br.cond.sptk.few 1b // loop
-
-9: mov pr=r17,0x1ffff // restore predicates
- CALL(trap, 9, cr.ifa)
-IVT_END(Instruction_Access_Bit)
-
-IVT_ENTRY(Data_Access_Bit, 0x2800)
- mov r16=cr.ifa
- mov r17=pr
- ;;
- thash r18=r16
- ;;
- ttag r19=r16
- add r20=24,r18 // collision chain
- ;;
- ld8 r20=[r20] // bucket head
- ;;
- ld8 r20=[r20] // first entry
- ;;
- rsm psr.dt // turn off data translations
- ;;
- srlz.d // serialize
- ;;
-1: cmp.eq p15,p0=r0,r20 // done?
-(p15) br.cond.spnt.few 9f // bail if done
- ;;
- add r21=16,r20 // tag location
- ;;
- ld8 r21=[r21] // read tag
- ;;
- cmp.ne p15,p0=r21,r19 // compare tags
-(p15) br.cond.sptk.few 2f // if not, read next in chain
- ;;
- ld8 r21=[r20] // read pte
- mov r22=PTE_ACCESSED
- ;;
- or r21=r22,r21 // set accessed bit
- ;;
- st8 [r20]=r21,8 // store back
- ;;
- ld8 r22=[r20] // read rest of pte
- ;;
- dep r18=0,r18,61,3 // convert vhpt ptr to physical
- ;;
- add r20=16,r18 // address of tag
- ;;
- ld8.acq r23=[r20] // read old tag
- ;;
- dep r23=-1,r23,63,1 // set ti bit
- ;;
- st8.rel [r20]=r23 // store old tag + ti
- ;;
- mf // make sure everyone sees
- ;;
- st8 [r18]=r21,8 // store pte
- ;;
- st8 [r18]=r22,8
- ;;
- st8.rel [r18]=r19 // store new tag
- ;;
- itc.d r21 // and place in TLB
- ;;
- mov pr=r17,0x1ffff // restore predicates
- rfi // walker will retry the access
-
-2: add r20=24,r20 // next in chain
- ;;
- ld8 r20=[r20] // read chain
- br.cond.sptk.few 1b // loop
-
-9: mov pr=r17,0x1ffff // restore predicates
- CALL(trap, 10, cr.ifa)
-IVT_END(Data_Access_Bit)
-
-IVT_ENTRY(Break_Instruction, 0x2c00)
-{ .mib
- mov r17=cr.iim
- mov r16=ip
- br.sptk exception_save
- ;;
-}
-{ .mmi
- alloc r15=ar.pfs,0,0,2,0
- ;;
- flushrs
- mov out0=11
- ;;
-}
-{ .mib
-(p11) ssm psr.i
- add out1=16,sp
- br.call.sptk rp=trap
- ;;
-}
-{ .mfb
- nop 0
- nop 0
- br.sptk exception_restore
- ;;
-}
-IVT_END(Break_Instruction)
-
-IVT_ENTRY(External_Interrupt, 0x3000)
-{ .mib
- mov r17=cr.lid // cr.iim and cr.ifa are undefined.
- mov r16=ip
- br.sptk exception_save
- ;;
-}
- alloc r14=ar.pfs,0,0,2,0
- cmp4.eq p14,p0=0,r0
- ;;
-1:
-{ .mii
- mov out0=cr.ivr // Get interrupt vector
- add out1=16,sp
- ;;
- cmp.eq p15,p0=15,out0 // check for spurious vector number
-}
-{ .mbb
- ssm psr.i // re-enable interrupts
-(p15) br.dpnt.few 2f // if spurious, we are done
- br.call.sptk.many rp=interrupt // call high-level handler
- ;;
-}
-{ .mmi
- rsm psr.i // disable interrupts
- ;;
- srlz.d
- nop 0
-}
-{ .mmi
- mov cr.eoi=r0 // ack the interrupt
- ;;
- srlz.d
- nop 0
-}
-{ .mfb
- cmp4.eq p14,p0=0,r8 // Return to kernel mode?
- nop 0
- br.sptk 1b // loop for more
- ;;
-}
-2:
-{ .mbb
- add out0=16,sp
-(p14) br.sptk exception_restore
- br.call.sptk rp=do_ast
- ;;
-}
-{ .mfb
- nop 0
- nop 0
- br.sptk exception_restore
- ;;
-}
-IVT_END(External_Interrupt)
-
-IVT_ENTRY(Reserved_3400, 0x3400)
- CALL(trap, 13, cr.ifa)
-IVT_END(Reserved_3400)
-
-IVT_ENTRY(Reserved_3800, 0x3800)
- CALL(trap, 14, cr.ifa)
-IVT_END(Reserved_3800)
-
-IVT_ENTRY(Reserved_3c00, 0x3c00)
- CALL(trap, 15, cr.ifa)
-IVT_END(Reserved_3c00)
-
-IVT_ENTRY(Reserved_4000, 0x4000)
- CALL(trap, 16, cr.ifa)
-IVT_END(Reserved_4000)
-
-IVT_ENTRY(Reserved_4400, 0x4400)
- CALL(trap, 17, cr.ifa)
-IVT_END(Reserved_4400)
-
-IVT_ENTRY(Reserved_4800, 0x4800)
- CALL(trap, 18, cr.ifa)
-IVT_END(Reserved_4800)
-
-IVT_ENTRY(Reserved_4c00, 0x4c00)
- CALL(trap, 19, cr.ifa)
-IVT_END(Reserved_4c00)
-
-IVT_ENTRY(Page_Not_Present, 0x5000)
- CALL(trap, 20, cr.ifa)
-IVT_END(Page_Not_Present)
-
-IVT_ENTRY(Key_Permission, 0x5100)
- CALL(trap, 21, cr.ifa)
-IVT_END(Key_Permission)
-
-IVT_ENTRY(Instruction_Access_Rights, 0x5200)
- CALL(trap, 22, cr.ifa)
-IVT_END(Instruction_Access_Rights)
-
-IVT_ENTRY(Data_Access_Rights, 0x5300)
- CALL(trap, 23, cr.ifa)
-IVT_END(Data_Access_Rights)
-
-IVT_ENTRY(General_Exception, 0x5400)
- CALL(trap, 24, cr.ifa)
-IVT_END(General_Exception)
-
-IVT_ENTRY(Disabled_FP_Register, 0x5500)
- CALL(trap, 25, cr.ifa)
-IVT_END(Disabled_FP_Register)
-
-IVT_ENTRY(NaT_Consumption, 0x5600)
- CALL(trap, 26, cr.ifa)
-IVT_END(NaT_Consumption)
-
-IVT_ENTRY(Speculation, 0x5700)
- CALL(trap, 27, cr.iim)
-IVT_END(Speculation)
-
-IVT_ENTRY(Reserved_5800, 0x5800)
- CALL(trap, 28, cr.ifa)
-IVT_END(Reserved_5800)
-
-IVT_ENTRY(Debug, 0x5900)
- CALL(trap, 29, cr.ifa)
-IVT_END(Debug)
-
-IVT_ENTRY(Unaligned_Reference, 0x5a00)
- CALL(trap, 30, cr.ifa)
-IVT_END(Unaligned_Reference)
-
-IVT_ENTRY(Unsupported_Data_Reference, 0x5b00)
- CALL(trap, 31, cr.ifa)
-IVT_END(Unsupported_Data_Reference)
-
-IVT_ENTRY(Floating_Point_Fault, 0x5c00)
- CALL(trap, 32, cr.ifa)
-IVT_END(Floating_Point_Fault)
-
-IVT_ENTRY(Floating_Point_Trap, 0x5d00)
- CALL(trap, 33, cr.ifa)
-IVT_END(Floating_Point_Trap)
-
-IVT_ENTRY(Lower_Privilege_Transfer_Trap, 0x5e00)
- CALL(trap, 34, cr.ifa)
-IVT_END(Lower_Privilege_Transfer_Trap)
-
-IVT_ENTRY(Taken_Branch_Trap, 0x5f00)
- CALL(trap, 35, cr.ifa)
-IVT_END(Taken_Branch_Trap)
-
-IVT_ENTRY(Single_Step_Trap, 0x6000)
- CALL(trap, 36, cr.ifa)
-IVT_END(Single_Step_Trap)
-
-IVT_ENTRY(Reserved_6100, 0x6100)
- CALL(trap, 37, cr.ifa)
-IVT_END(Reserved_6100)
-
-IVT_ENTRY(Reserved_6200, 0x6200)
- CALL(trap, 38, cr.ifa)
-IVT_END(Reserved_6200)
-
-IVT_ENTRY(Reserved_6300, 0x6300)
- CALL(trap, 39, cr.ifa)
-IVT_END(Reserved_6300)
-
-IVT_ENTRY(Reserved_6400, 0x6400)
- CALL(trap, 40, cr.ifa)
-IVT_END(Reserved_6400)
-
-IVT_ENTRY(Reserved_6500, 0x6500)
- CALL(trap, 41, cr.ifa)
-IVT_END(Reserved_6500)
-
-IVT_ENTRY(Reserved_6600, 0x6600)
- CALL(trap, 42, cr.ifa)
-IVT_END(Reserved_6600)
-
-IVT_ENTRY(Reserved_6700, 0x6700)
- CALL(trap, 43, cr.ifa)
-IVT_END(Reserved_6700)
-
-IVT_ENTRY(Reserved_6800, 0x6800)
- CALL(trap, 44, cr.ifa)
-IVT_END(Reserved_6800)
-
-IVT_ENTRY(IA_32_Exception, 0x6900)
- CALL(IA32_TRAP, 45, cr.ifa)
-IVT_END(IA_32_Exception)
-
-IVT_ENTRY(IA_32_Intercept, 0x6a00)
- CALL(IA32_TRAP, 46, cr.iim)
-IVT_END(IA_32_Intercept)
-
-IVT_ENTRY(IA_32_Interrupt, 0x6b00)
- CALL(IA32_TRAP, 47, cr.ifa)
-IVT_END(IA_32_Interrupt)
-
-IVT_ENTRY(Reserved_6c00, 0x6c00)
- CALL(trap, 48, cr.ifa)
-IVT_END(Reserved_6c00)
-
-IVT_ENTRY(Reserved_6d00, 0x6d00)
- CALL(trap, 49, cr.ifa)
-IVT_END(Reserved_6d00)
-
-IVT_ENTRY(Reserved_6e00, 0x6e00)
- CALL(trap, 50, cr.ifa)
-IVT_END(Reserved_6e00)
-
-IVT_ENTRY(Reserved_6f00, 0x6f00)
- CALL(trap, 51, cr.ifa)
-IVT_END(Reserved_6f00)
-
-IVT_ENTRY(Reserved_7000, 0x7000)
- CALL(trap, 52, cr.ifa)
-IVT_END(Reserved_7000)
-
-IVT_ENTRY(Reserved_7100, 0x7100)
- CALL(trap, 53, cr.ifa)
-IVT_END(Reserved_7100)
-
-IVT_ENTRY(Reserved_7200, 0x7200)
- CALL(trap, 54, cr.ifa)
-IVT_END(Reserved_7200)
-
-IVT_ENTRY(Reserved_7300, 0x7300)
- CALL(trap, 55, cr.ifa)
-IVT_END(Reserved_7300)
-
-IVT_ENTRY(Reserved_7400, 0x7400)
- CALL(trap, 56, cr.ifa)
-IVT_END(Reserved_7400)
-
-IVT_ENTRY(Reserved_7500, 0x7500)
- CALL(trap, 57, cr.ifa)
-IVT_END(Reserved_7500)
-
-IVT_ENTRY(Reserved_7600, 0x7600)
- CALL(trap, 58, cr.ifa)
-IVT_END(Reserved_7600)
-
-IVT_ENTRY(Reserved_7700, 0x7700)
- CALL(trap, 59, cr.ifa)
-IVT_END(Reserved_7700)
-
-IVT_ENTRY(Reserved_7800, 0x7800)
- CALL(trap, 60, cr.ifa)
-IVT_END(Reserved_7800)
-
-IVT_ENTRY(Reserved_7900, 0x7900)
- CALL(trap, 61, cr.ifa)
-IVT_END(Reserved_7900)
-
-IVT_ENTRY(Reserved_7a00, 0x7a00)
- CALL(trap, 62, cr.ifa)
-IVT_END(Reserved_7a00)
-
-IVT_ENTRY(Reserved_7b00, 0x7b00)
- CALL(trap, 63, cr.ifa)
-IVT_END(Reserved_7b00)
-
-IVT_ENTRY(Reserved_7c00, 0x7c00)
- CALL(trap, 64, cr.ifa)
-IVT_END(Reserved_7c00)
-
-IVT_ENTRY(Reserved_7d00, 0x7d00)
- CALL(trap, 65, cr.ifa)
-IVT_END(Reserved_7d00)
-
-IVT_ENTRY(Reserved_7e00, 0x7e00)
- CALL(trap, 66, cr.ifa)
-IVT_END(Reserved_7e00)
-
-IVT_ENTRY(Reserved_7f00, 0x7f00)
- CALL(trap, 67, cr.ifa)
-IVT_END(Reserved_7f00)
--- sys/ia64/ia64/clock.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*-
- * Copyright (c) 2005 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/clock.c,v 1.25 2005/04/22 05:04:58 marcel Exp $");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/queue.h>
-#include <sys/sysctl.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/timetc.h>
-#include <sys/pcpu.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/efi.h>
-
-static int sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS);
-
-int disable_rtc_set; /* disable resettodr() if != 0 */
-SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
- CTLFLAG_RW, &disable_rtc_set, 0, "");
-
-int wall_cmos_clock; /* wall CMOS clock assumed if != 0 */
-SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
- CTLFLAG_RW, &wall_cmos_clock, 0, "");
-
-int adjkerntz; /* local offset from GMT in seconds */
-SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
- &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
-
-static int
-sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
-{
- int error;
-
- error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, req);
- if (!error && req->newptr)
- resettodr();
- return (error);
-}
-
-uint64_t ia64_clock_reload;
-
-static int clock_initialized = 0;
-
-static short dayyr[12] = {
- 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334
-};
-
-/*
- * Leap years
- *
- * Our well-known calendar, the Gregorian calendar, is intended to be of the
- * same length as the cycle of the seasons (the tropical year). However, the
- * tropical year is approximately 365.2422 days. If the calendar year always
- * consisted of 365 days, it would be short of the tropical year by about
- * 0.2422 days every year. Over a century, the beginning of spring in the
- * northern hemisphere would shift from March 20 to April 13.
- *
- * When Pope Gregory XIII instituted the Gregorian calendar in 1582, the
- * calendar was shifted to make the beginning of spring fall on March 21 and
- * a new system of leap days was introduced. Instead of intercalating a leap
- * day every fourth year, 97 leap days would be introduced every 400 years,
- * according to the following rule:
- *
- * Years evenly divisible by 4 are leap years, with the exception of
- * centurial years that are not evenly divisible by 400.
- *
- * Thus, the average Gregorian calendar year is 365.2425 days in length. This
- * agrees to within half a minute of the length of the tropical year.
- */
-
-static __inline
-int isleap(int yr)
-{
-
- return ((yr % 4) ? 0 : (yr % 100) ? 1 : (yr % 400) ? 0 : 1);
-}
-
-#ifndef SMP
-static timecounter_get_t ia64_get_timecount;
-
-static struct timecounter ia64_timecounter = {
- ia64_get_timecount, /* get_timecount */
- 0, /* no poll_pps */
- ~0u, /* counter_mask */
- 0, /* frequency */
- "ITC" /* name */
-};
-
-static unsigned
-ia64_get_timecount(struct timecounter* tc)
-{
- return ia64_get_itc();
-}
-#endif
-
-void
-pcpu_initclock(void)
-{
-
- PCPU_SET(clockadj, 0);
- PCPU_SET(clock, ia64_get_itc());
- ia64_set_itm(PCPU_GET(clock) + ia64_clock_reload);
- ia64_set_itv(CLOCK_VECTOR); /* highest priority class */
-}
-
-/*
- * Start the real-time and statistics clocks. We use cr.itc and cr.itm
- * to implement a 1000hz clock.
- */
-void
-cpu_initclocks()
-{
-
- if (itc_frequency == 0)
- panic("Unknown clock frequency");
-
- stathz = hz;
- ia64_clock_reload = (itc_frequency + hz/2) / hz;
-
-#ifndef SMP
- ia64_timecounter.tc_frequency = itc_frequency;
- tc_init(&ia64_timecounter);
-#endif
-
- pcpu_initclock();
-}
-
-void
-cpu_startprofclock(void)
-{
-
- /* nothing to do */
-}
-
-void
-cpu_stopprofclock(void)
-{
-
- /* nothing to do */
-}
-
-void
-inittodr(time_t base)
-{
- struct efi_tm tm;
- struct timespec ts;
- long days;
- int yr;
-
- efi_get_time(&tm);
-
- /*
- * This code was written in 2005, so logically EFI cannot return
- * a year smaller than that. Assume the EFI clock is out of whack
- * in that case and reset the EFI clock.
- */
- if (tm.tm_year < 2005) {
- printf("WARNING: CHECK AND RESET THE DATE!\n");
- memset(&tm, 0, sizeof(tm));
- tm.tm_year = 2005;
- tm.tm_mon = tm.tm_mday = 1;
- if (efi_set_time(&tm))
- printf("ERROR: COULD NOT RESET EFI CLOCK!\n");
- }
-
- days = 0L;
- for (yr = 1970; yr < (int)tm.tm_year; yr++)
- days += isleap(yr) ? 366L : 365L;
- days += dayyr[tm.tm_mon - 1] + tm.tm_mday - 1L;
- if (isleap(tm.tm_year) && tm.tm_mon > 2)
- days++;
-
- ts.tv_sec = ((days * 24L + tm.tm_hour) * 60L + tm.tm_min) * 60L
- + tm.tm_sec + ((wall_cmos_clock) ? adjkerntz : 0L);
- ts.tv_nsec = tm.tm_nsec;
-
- /*
- * The EFI clock is supposed to be a real-time clock, whereas the
- * base argument is coming from a saved (as on disk) time. It's
- * impossible for a saved time to represent a time in the future,
- * so we expect the EFI clock to be larger. If not, the EFI clock
- * may not be reliable and we trust the base.
- * Warn if the EFI clock was off by 2 or more days.
- */
- if (ts.tv_sec < base) {
- days = (base - ts.tv_sec) / (60L * 60L * 24L);
- if (days >= 2)
- printf("WARNING: EFI clock lost %ld days!\n", days);
- ts.tv_sec = base;
- ts.tv_nsec = 0;
- }
-
- tc_setclock(&ts);
- clock_initialized = 1;
-}
-
-/*
- * Reset the TODR based on the time value; used when the TODR has a
- * preposterous value and also when the time is reset by the stime
- * system call. Also called when the TODR goes past
- * TODRZERO + 100*(SECYEAR+2*SECDAY) (e.g. on Jan 2 just after midnight)
- * to wrap the TODR around.
- */
-void
-resettodr()
-{
- struct efi_tm tm;
- long t;
- int x;
-
- if (!clock_initialized || disable_rtc_set)
- return;
-
- efi_get_time(&tm);
- tm.tm_nsec = 0;
-
- t = time_second - ((wall_cmos_clock) ? adjkerntz : 0L);
-
- tm.tm_sec = t % 60; t /= 60L;
- tm.tm_min = t % 60; t /= 60L;
- tm.tm_hour = t % 24; t /= 24L;
-
- tm.tm_year = 1970;
- x = (isleap(tm.tm_year)) ? 366 : 365;
- while (t > x) {
- t -= x;
- tm.tm_year++;
- x = (isleap(tm.tm_year)) ? 366 : 365;
- }
-
- x = 11;
- while (t < dayyr[x])
- x--;
- tm.tm_mon = x + 1;
- tm.tm_mday = t - dayyr[x] + 1;
- if (efi_set_time(&tm))
- printf("ERROR: COULD NOT RESET EFI CLOCK!\n");
-}
--- sys/ia64/ia64/sapic.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/sapic.c,v 1.13 2003/09/10 22:49:38 marcel Exp $
- */
-
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/sysctl.h>
-
-#include <machine/intr.h>
-#include <machine/pal.h>
-#include <machine/sapicreg.h>
-#include <machine/sapicvar.h>
-
-static MALLOC_DEFINE(M_SAPIC, "sapic", "I/O SAPIC devices");
-
-static int sysctl_machdep_apic(SYSCTL_HANDLER_ARGS);
-
-SYSCTL_OID(_machdep, OID_AUTO, apic, CTLTYPE_STRING|CTLFLAG_RD,
- NULL, 0, sysctl_machdep_apic, "A", "(x)APIC redirection table entries");
-
-struct sapic *ia64_sapics[16]; /* XXX make this resizable */
-int ia64_sapic_count;
-
-u_int64_t ia64_lapic_address = PAL_PIB_DEFAULT_ADDR;
-
-struct sapic_rte {
- u_int64_t rte_vector :8;
- u_int64_t rte_delivery_mode :3;
- u_int64_t rte_destination_mode :1;
- u_int64_t rte_delivery_status :1;
- u_int64_t rte_polarity :1;
- u_int64_t rte_rirr :1;
- u_int64_t rte_trigger_mode :1;
- u_int64_t rte_mask :1;
- u_int64_t rte_flushen :1;
- u_int64_t rte_reserved :30;
- u_int64_t rte_destination_eid :8;
- u_int64_t rte_destination_id :8;
-};
-
-static u_int32_t
-sapic_read(struct sapic *sa, int which)
-{
- vm_offset_t reg = sa->sa_registers;
-
- *(volatile u_int32_t *) (reg + SAPIC_IO_SELECT) = which;
- ia64_mf();
- return *(volatile u_int32_t *) (reg + SAPIC_IO_WINDOW);
-}
-
-static void
-sapic_write(struct sapic *sa, int which, u_int32_t value)
-{
- vm_offset_t reg = sa->sa_registers;
-
- *(volatile u_int32_t *) (reg + SAPIC_IO_SELECT) = which;
- ia64_mf();
- *(volatile u_int32_t *) (reg + SAPIC_IO_WINDOW) = value;
- ia64_mf();
-}
-
-static void
-sapic_read_rte(struct sapic *sa, int which, struct sapic_rte *rte)
-{
- u_int32_t *p = (u_int32_t *) rte;
- register_t c;
-
- c = intr_disable();
- p[0] = sapic_read(sa, SAPIC_RTE_BASE + 2*which);
- p[1] = sapic_read(sa, SAPIC_RTE_BASE + 2*which + 1);
- intr_restore(c);
-}
-
-static void
-sapic_write_rte(struct sapic *sa, int which, struct sapic_rte *rte)
-{
- u_int32_t *p = (u_int32_t *) rte;
- register_t c;
-
- c = intr_disable();
- sapic_write(sa, SAPIC_RTE_BASE + 2*which, p[0]);
- sapic_write(sa, SAPIC_RTE_BASE + 2*which + 1, p[1]);
- intr_restore(c);
-}
-
-int
-sapic_config_intr(int irq, enum intr_trigger trig, enum intr_polarity pol)
-{
- struct sapic_rte rte;
- struct sapic *sa;
- int i;
-
- for (i = 0; i < ia64_sapic_count; i++) {
- sa = ia64_sapics[i];
- if (irq < sa->sa_base || irq > sa->sa_limit)
- continue;
-
- sapic_read_rte(sa, irq - sa->sa_base, &rte);
- if (trig != INTR_TRIGGER_CONFORM)
- rte.rte_trigger_mode = (trig == INTR_TRIGGER_EDGE) ?
- SAPIC_TRIGGER_EDGE : SAPIC_TRIGGER_LEVEL;
- else
- rte.rte_trigger_mode = (irq < 16) ?
- SAPIC_TRIGGER_EDGE : SAPIC_TRIGGER_LEVEL;
- if (pol != INTR_POLARITY_CONFORM)
- rte.rte_polarity = (pol == INTR_POLARITY_HIGH) ?
- SAPIC_POLARITY_HIGH : SAPIC_POLARITY_LOW;
- else
- rte.rte_polarity = (irq < 16) ? SAPIC_POLARITY_HIGH :
- SAPIC_POLARITY_LOW;
- sapic_write_rte(sa, irq - sa->sa_base, &rte);
- return (0);
- }
-
- return (ENOENT);
-}
-
-struct sapic *
-sapic_create(int id, int base, u_int64_t address)
-{
- struct sapic_rte rte;
- struct sapic *sa;
- int i, max;
-
- sa = malloc(sizeof(struct sapic), M_SAPIC, M_NOWAIT);
- if (!sa)
- return 0;
-
- sa->sa_id = id;
- sa->sa_base = base;
- sa->sa_registers = IA64_PHYS_TO_RR6(address);
-
- max = (sapic_read(sa, SAPIC_VERSION) >> 16) & 0xff;
- sa->sa_limit = base + max;
-
- ia64_sapics[ia64_sapic_count++] = sa;
-
- /*
- * Initialize all RTEs with a default trigger mode and polarity.
- * This may be changed later by calling sapic_config_intr(). We
- * mask all interrupts by default.
- */
- bzero(&rte, sizeof(rte));
- rte.rte_mask = 1;
- for (i = base; i <= sa->sa_limit; i++) {
- rte.rte_trigger_mode = (i < 16) ? SAPIC_TRIGGER_EDGE :
- SAPIC_TRIGGER_LEVEL;
- rte.rte_polarity = (i < 16) ? SAPIC_POLARITY_HIGH :
- SAPIC_POLARITY_LOW;
- sapic_write_rte(sa, i - base, &rte);
- }
-
- return (sa);
-}
-
-int
-sapic_enable(int irq, int vector)
-{
- struct sapic_rte rte;
- struct sapic *sa;
- uint64_t lid = ia64_get_lid();
- int i;
-
- for (i = 0; i < ia64_sapic_count; i++) {
- sa = ia64_sapics[i];
- if (irq < sa->sa_base || irq > sa->sa_limit)
- continue;
-
- sapic_read_rte(sa, irq - sa->sa_base, &rte);
- rte.rte_destination_id = (lid >> 24) & 255;
- rte.rte_destination_eid = (lid >> 16) & 255;
- rte.rte_delivery_mode = SAPIC_DELMODE_LOWPRI;
- rte.rte_vector = vector;
- rte.rte_mask = 0;
- sapic_write_rte(sa, irq - sa->sa_base, &rte);
- return (0);
- }
- return (ENOENT);
-}
-
-void
-sapic_eoi(struct sapic *sa, int vector)
-{
- vm_offset_t reg = sa->sa_registers;
-
- *(volatile u_int32_t *) (reg + SAPIC_APIC_EOI) = vector;
- ia64_mf();
-}
-
-static int
-sysctl_machdep_apic(SYSCTL_HANDLER_ARGS)
-{
- char buf[80];
- struct sapic_rte rte;
- struct sapic *sa;
- int apic, count, error, index, len;
-
- len = sprintf(buf, "\n APIC Idx: Id,EId : RTE\n");
- error = SYSCTL_OUT(req, buf, len);
- if (error)
- return (error);
-
- for (apic = 0; apic < ia64_sapic_count; apic++) {
- sa = ia64_sapics[apic];
- count = sa->sa_limit - sa->sa_base + 1;
- for (index = 0; index < count; index++) {
- sapic_read_rte(sa, index, &rte);
- if (rte.rte_mask != 0)
- continue;
- len = sprintf(buf,
- " 0x%02x %3d: (%02x,%02x): %3d %d %d %s %s %s %s %s\n",
- sa->sa_id, index,
- rte.rte_destination_id, rte.rte_destination_eid,
- rte.rte_vector, rte.rte_delivery_mode,
- rte.rte_destination_mode,
- rte.rte_delivery_status ? "DS" : " ",
- rte.rte_polarity ? "low-active " : "high-active",
- rte.rte_rirr ? "RIRR" : " ",
- rte.rte_trigger_mode ? "level" : "edge ",
- rte.rte_flushen ? "F" : " ");
- error = SYSCTL_OUT(req, buf, len);
- if (error)
- return (error);
- }
- }
-
- return (0);
-}
-
-#ifdef DDB
-
-#include <ddb/ddb.h>
-
-void
-sapic_print(struct sapic *sa, int input)
-{
- struct sapic_rte rte;
-
- sapic_read_rte(sa, input, &rte);
- if (rte.rte_mask == 0) {
- db_printf("%3d %d %d %s %s %s %s %s ID=%x EID=%x\n",
- rte.rte_vector,
- rte.rte_delivery_mode,
- rte.rte_destination_mode,
- rte.rte_delivery_status ? "DS" : " ",
- rte.rte_polarity ? "low-active " : "high-active",
- rte.rte_rirr ? "RIRR" : " ",
- rte.rte_trigger_mode ? "level" : "edge ",
- rte.rte_flushen ? "F" : " ",
- rte.rte_destination_id,
- rte.rte_destination_eid);
- }
-}
-
-#endif
--- sys/ia64/ia64/db_trace.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/*-
- * Copyright (c) 2003, 2004 Marcel Moolenaar
- * Copyright (c) 2000-2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/db_trace.c,v 1.23.2.1 2006/03/13 03:05:37 jeff Exp $
- */
-
-#include <sys/param.h>
-#include <sys/kdb.h>
-#include <sys/proc.h>
-#include <sys/stack.h>
-
-#include <machine/db_machdep.h>
-#include <machine/frame.h>
-#include <machine/md_var.h>
-#include <machine/pcb.h>
-#include <machine/unwind.h>
-#include <machine/vmparam.h>
-
-#include <ddb/ddb.h>
-#include <ddb/db_sym.h>
-#include <ddb/db_access.h>
-#include <ddb/db_variables.h>
-#include <ddb/db_output.h>
-
-int db_md_set_watchpoint(db_expr_t addr, db_expr_t size);
-int db_md_clr_watchpoint(db_expr_t addr, db_expr_t size);
-void db_md_list_watchpoints(void);
-
-static int
-db_backtrace(struct thread *td, struct pcb *pcb, int count)
-{
- struct unw_regstate rs;
- struct trapframe *tf;
- const char *name;
- db_expr_t offset;
- uint64_t bsp, cfm, ip, pfs, reg, sp;
- c_db_sym_t sym;
- int args, error, i, quit;
-
- quit = 0;
- db_setup_paging(db_simple_pager, &quit, db_lines_per_page);
- error = unw_create_from_pcb(&rs, pcb);
- while (!error && count-- && !quit) {
- error = unw_get_cfm(&rs, &cfm);
- if (!error)
- error = unw_get_bsp(&rs, &bsp);
- if (!error)
- error = unw_get_ip(&rs, &ip);
- if (!error)
- error = unw_get_sp(&rs, &sp);
- if (error)
- break;
-
- args = IA64_CFM_SOL(cfm);
- if (args > 8)
- args = 8;
-
- error = unw_step(&rs);
- if (!error) {
- if (!unw_get_cfm(&rs, &pfs)) {
- i = IA64_CFM_SOF(pfs) - IA64_CFM_SOL(pfs);
- if (args > i)
- args = i;
- }
- }
-
- sym = db_search_symbol(ip, DB_STGY_ANY, &offset);
- db_symbol_values(sym, &name, NULL);
- db_printf("%s(", name);
- if (bsp >= IA64_RR_BASE(5)) {
- for (i = 0; i < args; i++) {
- if ((bsp & 0x1ff) == 0x1f8)
- bsp += 8;
- db_read_bytes(bsp, sizeof(reg), (void*)®);
- if (i > 0)
- db_printf(", ");
- db_printf("0x%lx", reg);
- bsp += 8;
- }
- } else
- db_printf("...");
- db_printf(") at ");
-
- db_printsym(ip, DB_STGY_PROC);
- db_printf("\n");
-
- if (error != ERESTART)
- continue;
- if (sp < IA64_RR_BASE(5))
- break;
-
- tf = (struct trapframe *)(sp + 16);
- if ((tf->tf_flags & FRAME_SYSCALL) != 0 ||
- tf->tf_special.iip < IA64_RR_BASE(5))
- break;
-
- /* XXX ask if we should unwind across the trapframe. */
- db_printf("--- trapframe at %p\n", tf);
- unw_delete(&rs);
- error = unw_create_from_frame(&rs, tf);
- }
-
- unw_delete(&rs);
- /*
- * EJUSTRETURN and ERESTART signal the end of a trace and
- * are not really errors.
- */
- return ((error > 0) ? error : 0);
-}
-
-void
-db_trace_self(void)
-{
- struct pcb pcb;
-
- savectx(&pcb);
- db_backtrace(curthread, &pcb, -1);
-}
-
-int
-db_trace_thread(struct thread *td, int count)
-{
- struct pcb *ctx;
-
- ctx = kdb_thr_ctx(td);
- return (db_backtrace(td, ctx, count));
-}
-
-void
-stack_save(struct stack *st)
-{
-
- stack_zero(st);
- /*
- * Nothing for now.
- * Is libuwx reentrant?
- * Can unw_create* sleep?
- */
-}
-
-int
-db_md_set_watchpoint(addr, size)
- db_expr_t addr;
- db_expr_t size;
-{
- return (-1);
-}
-
-
-int
-db_md_clr_watchpoint(addr, size)
- db_expr_t addr;
- db_expr_t size;
-{
- return (-1);
-}
-
-
-void
-db_md_list_watchpoints()
-{
- return;
-}
--- sys/ia64/ia64/setjmp.S
+++ /dev/null
@@ -1,349 +0,0 @@
-// $FreeBSD: src/sys/ia64/ia64/setjmp.S,v 1.3 2005/01/06 22:18:22 imp Exp $
-
-//-
-// Copyright (c) 1999, 2000
-// Intel Corporation.
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions
-// are met:
-//
-// 1. Redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer.
-//
-// 2. Redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the distribution.
-//
-// 3. All advertising materials mentioning features or use of this software
-// must display the following acknowledgement:
-//
-// This product includes software developed by Intel Corporation and
-// its contributors.
-//
-// 4. Neither the name of Intel Corporation or its contributors may be
-// used to endorse or promote products derived from this software
-// without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION AND CONTRIBUTORS ``AS IS''
-// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-// ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR CONTRIBUTORS BE
-// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-// THE POSSIBILITY OF SUCH DAMAGE.
-//
-//
-
-//
-// Module Name:
-//
-// setjmp.s
-//
-// Abstract:
-//
-// Contains an implementation of setjmp and longjmp for the
-// IA-64 architecture.
-
- .file "setjmp.s"
-
-#include <machine/asm.h>
-#include <machine/setjmp.h>
-
-// int setjmp(struct jmp_buffer *)
-//
-// Setup a non-local goto.
-//
-// Description:
-//
-// SetJump stores the current register set in the area pointed to
-// by "save". It returns zero. Subsequent calls to "LongJump" will
-// restore the registers and return non-zero to the same location.
-//
-// On entry, r32 contains the pointer to the jmp_buffer
-//
-
-ENTRY(setjmp, 1)
- //
- // Make sure buffer is aligned at 16byte boundary
- //
- add r10 = -0x10,r0 ;; // mask the lower 4 bits
- and r32 = r32, r10;;
- add r32 = 0x10, r32;; // move to next 16 byte boundary
-
- add r10 = J_PREDS, r32 // skip Unats & pfs save area
- add r11 = J_BSP, r32
- //
- // save immediate context
- //
- mov r2 = ar.bsp // save backing store pointer
- mov r3 = pr // save predicates
- flushrs
- ;;
- //
- // save user Unat register
- //
- mov r16 = ar.lc // save loop count register
- mov r14 = ar.unat // save user Unat register
-
- st8 [r10] = r3, J_LC-J_PREDS
- st8 [r11] = r2, J_R4-J_BSP
- ;;
- st8 [r10] = r16, J_R5-J_LC
- st8 [r32] = r14, J_NATS // Note: Unat at the
- // beginning of the save area
- mov r15 = ar.pfs
- ;;
- //
- // save preserved general registers & NaT's
- //
- st8.spill [r11] = r4, J_R6-J_R4
- ;;
- st8.spill [r10] = r5, J_R7-J_R5
- ;;
- st8.spill [r11] = r6, J_SP-J_R6
- ;;
- st8.spill [r10] = r7, J_F3-J_R7
- ;;
- st8.spill [r11] = sp, J_F2-J_SP
- ;;
- //
- // save spilled Unat and pfs registers
- //
- mov r2 = ar.unat // save Unat register after spill
- ;;
- st8 [r32] = r2, J_PFS-J_NATS // save unat for spilled regs
- ;;
- st8 [r32] = r15 // save pfs
- //
- // save floating registers
- //
- stf.spill [r11] = f2, J_F4-J_F2
- stf.spill [r10] = f3, J_F5-J_F3
- ;;
- stf.spill [r11] = f4, J_F16-J_F4
- stf.spill [r10] = f5, J_F17-J_F5
- ;;
- stf.spill [r11] = f16, J_F18-J_F16
- stf.spill [r10] = f17, J_F19-J_F17
- ;;
- stf.spill [r11] = f18, J_F20-J_F18
- stf.spill [r10] = f19, J_F21-J_F19
- ;;
- stf.spill [r11] = f20, J_F22-J_F20
- stf.spill [r10] = f21, J_F23-J_F21
- ;;
- stf.spill [r11] = f22, J_F24-J_F22
- stf.spill [r10] = f23, J_F25-J_F23
- ;;
- stf.spill [r11] = f24, J_F26-J_F24
- stf.spill [r10] = f25, J_F27-J_F25
- ;;
- stf.spill [r11] = f26, J_F28-J_F26
- stf.spill [r10] = f27, J_F29-J_F27
- ;;
- stf.spill [r11] = f28, J_F30-J_F28
- stf.spill [r10] = f29, J_F31-J_F29
- ;;
- stf.spill [r11] = f30, J_FPSR-J_F30
- stf.spill [r10] = f31, J_B0-J_F31 // size of f31 + fpsr
- //
- // save FPSR register & branch registers
- //
- mov r2 = ar.fpsr // save fpsr register
- mov r3 = b0
- ;;
- st8 [r11] = r2, J_B1-J_FPSR
- st8 [r10] = r3, J_B2-J_B0
- mov r2 = b1
- mov r3 = b2
- ;;
- st8 [r11] = r2, J_B3-J_B1
- st8 [r10] = r3, J_B4-J_B2
- mov r2 = b3
- mov r3 = b4
- ;;
- st8 [r11] = r2, J_B5-J_B3
- st8 [r10] = r3
- mov r2 = b5
- ;;
- st8 [r11] = r2
- ;;
- //
- // return
- //
- mov r8 = r0 // return 0 from setjmp
- mov ar.unat = r14 // restore unat
- br.ret.sptk b0
-
-END(setjmp)
-
-
-//
-// void longjmp(struct jmp_buffer *, int val)
-//
-// Perform a non-local goto.
-//
-// Description:
-//
-// LongJump initializes the register set to the values saved by a
-// previous 'SetJump' and jumps to the return location saved by that
-// 'SetJump'. This has the effect of unwinding the stack and returning
-// for a second time to the 'SetJump'.
-//
-
-ENTRY(longjmp, 2)
- //
- // Make sure buffer is aligned at 16byte boundary
- //
- add r10 = -0x10,r0 ;; // mask the lower 4 bits
- and r32 = r32, r10;;
- add r32 = 0x10, r32;; // move to next 16 byte boundary
-
- //
- // caching the return value as we do invala in the end
- //
- mov r8 = r33 // return value
-
- //
- // get immediate context
- //
- mov r14 = ar.rsc // get user RSC conf
- add r10 = J_PFS, r32 // get address of pfs
- add r11 = J_NATS, r32
- ;;
- ld8 r15 = [r10], J_BSP-J_PFS // get pfs
- ld8 r2 = [r11], J_LC-J_NATS // get unat for spilled regs
- ;;
- mov ar.unat = r2
- ;;
- ld8 r16 = [r10], J_PREDS-J_BSP // get backing store pointer
- mov ar.rsc = r0 // put RSE in enforced lazy
- mov ar.pfs = r15
- ;;
-
- //
- // while returning from longjmp the BSPSTORE and BSP needs to be
- // same and discard all the registers allocated after we did
- // setjmp. Also, we need to generate the RNAT register since we
- // did not flushed the RSE on setjmp.
- //
- mov r17 = ar.bspstore // get current BSPSTORE
- ;;
- cmp.ltu p6,p7 = r17, r16 // is it less than BSP of
-(p6) br.spnt.few .flush_rse
- mov r19 = ar.rnat // get current RNAT
- ;;
- loadrs // invalidate dirty regs
- br.sptk.many .restore_rnat // restore RNAT
-
-.flush_rse:
- flushrs
- ;;
- mov r19 = ar.rnat // get current RNAT
- mov r17 = r16 // current BSPSTORE
- ;;
-.restore_rnat:
- //
- // check if RNAT is saved between saved BSP and curr BSPSTORE
- //
- mov r18 = 0x3f
- ;;
- dep r18 = r18,r16,3,6 // get RNAT address
- ;;
- cmp.ltu p8,p9 = r18, r17 // RNAT saved on RSE
- ;;
-(p8) ld8 r19 = [r18] // get RNAT from RSE
- ;;
- mov ar.bspstore = r16 // set new BSPSTORE
- ;;
- mov ar.rnat = r19 // restore RNAT
- mov ar.rsc = r14 // restore RSC conf
-
-
- ld8 r3 = [r11], J_R4-J_LC // get lc register
- ld8 r2 = [r10], J_R5-J_PREDS // get predicates
- ;;
- mov pr = r2, -1
- mov ar.lc = r3
- //
- // restore preserved general registers & NaT's
- //
- ld8.fill r4 = [r11], J_R6-J_R4
- ;;
- ld8.fill r5 = [r10], J_R7-J_R5
- ld8.fill r6 = [r11], J_SP-J_R6
- ;;
- ld8.fill r7 = [r10], J_F2-J_R7
- ld8.fill sp = [r11], J_F3-J_SP
- ;;
- //
- // restore floating registers
- //
- ldf.fill f2 = [r10], J_F4-J_F2
- ldf.fill f3 = [r11], J_F5-J_F3
- ;;
- ldf.fill f4 = [r10], J_F16-J_F4
- ldf.fill f5 = [r11], J_F17-J_F5
- ;;
- ldf.fill f16 = [r10], J_F18-J_F16
- ldf.fill f17 = [r11], J_F19-J_F17
- ;;
- ldf.fill f18 = [r10], J_F20-J_F18
- ldf.fill f19 = [r11], J_F21-J_F19
- ;;
- ldf.fill f20 = [r10], J_F22-J_F20
- ldf.fill f21 = [r11], J_F23-J_F21
- ;;
- ldf.fill f22 = [r10], J_F24-J_F22
- ldf.fill f23 = [r11], J_F25-J_F23
- ;;
- ldf.fill f24 = [r10], J_F26-J_F24
- ldf.fill f25 = [r11], J_F27-J_F25
- ;;
- ldf.fill f26 = [r10], J_F28-J_F26
- ldf.fill f27 = [r11], J_F29-J_F27
- ;;
- ldf.fill f28 = [r10], J_F30-J_F28
- ldf.fill f29 = [r11], J_F31-J_F29
- ;;
- ldf.fill f30 = [r10], J_FPSR-J_F30
- ldf.fill f31 = [r11], J_B0-J_F31 ;;
-
- //
- // restore branch registers and fpsr
- //
- ld8 r16 = [r10], J_B1-J_FPSR // get fpsr
- ld8 r17 = [r11], J_B2-J_B0 // get return pointer
- ;;
- mov ar.fpsr = r16
- mov b0 = r17
- ld8 r2 = [r10], J_B3-J_B1
- ld8 r3 = [r11], J_B4-J_B2
- ;;
- mov b1 = r2
- mov b2 = r3
- ld8 r2 = [r10], J_B5-J_B3
- ld8 r3 = [r11]
- ;;
- mov b3 = r2
- mov b4 = r3
- ld8 r2 = [r10]
- ld8 r21 = [r32] // get user unat
- ;;
- mov b5 = r2
- mov ar.unat = r21
-
- //
- // invalidate ALAT
- //
- invala ;;
-
- br.ret.sptk b0
-
-END(longjmp)
--- sys/ia64/ia64/unaligned.c
+++ /dev/null
@@ -1,307 +0,0 @@
-/*-
- * Copyright (c) 2003 Marcel Moolenaar
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/unaligned.c,v 1.11 2005/01/27 06:01:44 marcel Exp $
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/sysctl.h>
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-#include <machine/frame.h>
-#include <machine/md_var.h>
-#include <ia64/disasm/disasm.h>
-
-static int ia64_unaligned_print = 0;
-SYSCTL_INT(_debug, OID_AUTO, unaligned_print, CTLFLAG_RW,
- &ia64_unaligned_print, 0, "warn about unaligned accesses");
-
-static int ia64_unaligned_test = 0;
-SYSCTL_INT(_debug, OID_AUTO, unaligned_test, CTLFLAG_RW,
- &ia64_unaligned_test, 0, "test emulation when PSR.ac is set");
-
-static void *
-fpreg_ptr(mcontext_t *mc, int fr)
-{
- union _ia64_fpreg *p;
-
- if (fr <= 1 || fr >= 128)
- return (NULL);
- if (fr >= 32) {
- p = &mc->mc_high_fp.fr32;
- fr -= 32;
- } else if (fr >= 16) {
- p = &mc->mc_preserved_fp.fr16;
- fr -= 16;
- } else if (fr >= 6) {
- p = &mc->mc_scratch_fp.fr6;
- fr -= 6;
- } else {
- p = &mc->mc_preserved_fp.fr2;
- fr -= 2;
- }
- return ((void*)(p + fr));
-}
-
-static void *
-greg_ptr(mcontext_t *mc, int gr)
-{
- uint64_t *p;
- int nslots;
-
- if (gr <= 0 || gr >= 32 + (mc->mc_special.cfm & 0x7f))
- return (NULL);
- if (gr >= 32) {
- nslots = IA64_CFM_SOF(mc->mc_special.cfm) - gr + 32;
- p = (void *)ia64_bsp_adjust(mc->mc_special.bspstore, -nslots);
- gr = 0;
- } else if (gr >= 14) {
- p = &mc->mc_scratch.gr14;
- gr -= 14;
- } else if (gr == 13) {
- p = &mc->mc_special.tp;
- gr = 0;
- } else if (gr == 12) {
- p = &mc->mc_special.sp;
- gr = 0;
- } else if (gr >= 8) {
- p = &mc->mc_scratch.gr8;
- gr -= 8;
- } else if (gr >= 4) {
- p = &mc->mc_preserved.gr4;
- gr -= 4;
- } else if (gr >= 2) {
- p = &mc->mc_scratch.gr2;
- gr -= 2;
- } else {
- p = &mc->mc_special.gp;
- gr = 0;
- }
- return ((void*)(p + gr));
-}
-
-static uint64_t
-rdreg(uint64_t *addr)
-{
- if ((uintptr_t)addr < VM_MAX_ADDRESS)
- return (fuword(addr));
- return (*addr);
-}
-
-static void
-wrreg(uint64_t *addr, uint64_t val)
-{
- if ((uintptr_t)addr < VM_MAX_ADDRESS)
- suword(addr, val);
- else
- *addr = val;
-}
-
-static int
-fixup(struct asm_inst *i, mcontext_t *mc, uint64_t va)
-{
- union {
- double d;
- long double e;
- uint64_t i;
- float s;
- } buf;
- void *reg;
- uint64_t postinc;
-
- switch (i->i_op) {
- case ASM_OP_LD2:
- copyin((void*)va, (void*)&buf.i, 2);
- reg = greg_ptr(mc, (int)i->i_oper[1].o_value);
- if (reg == NULL)
- return (EINVAL);
- wrreg(reg, buf.i & 0xffffU);
- break;
- case ASM_OP_LD4:
- copyin((void*)va, (void*)&buf.i, 4);
- reg = greg_ptr(mc, (int)i->i_oper[1].o_value);
- if (reg == NULL)
- return (EINVAL);
- wrreg(reg, buf.i & 0xffffffffU);
- break;
- case ASM_OP_LD8:
- copyin((void*)va, (void*)&buf.i, 8);
- reg = greg_ptr(mc, (int)i->i_oper[1].o_value);
- if (reg == NULL)
- return (EINVAL);
- wrreg(reg, buf.i);
- break;
- case ASM_OP_LDFD:
- copyin((void*)va, (void*)&buf.d, sizeof(buf.d));
- reg = fpreg_ptr(mc, (int)i->i_oper[1].o_value);
- if (reg == NULL)
- return (EINVAL);
- __asm("ldfd f6=%1;; stf.spill %0=f6" : "=m"(*(double *)reg) :
- "m"(buf.d) : "f6");
- break;
- case ASM_OP_LDFE:
- copyin((void*)va, (void*)&buf.e, sizeof(buf.e));
- reg = fpreg_ptr(mc, (int)i->i_oper[1].o_value);
- if (reg == NULL)
- return (EINVAL);
- __asm("ldfe f6=%1;; stf.spill %0=f6" :
- "=m"(*(long double *)reg) : "m"(buf.e) : "f6");
- break;
- case ASM_OP_LDFS:
- copyin((void*)va, (void*)&buf.s, sizeof(buf.s));
- reg = fpreg_ptr(mc, (int)i->i_oper[1].o_value);
- if (reg == NULL)
- return (EINVAL);
- __asm("ldfs f6=%1;; stf.spill %0=f6" : "=m"(*(float *)reg) :
- "m"(buf.s) : "f6");
- break;
- case ASM_OP_ST2:
- reg = greg_ptr(mc, (int)i->i_oper[2].o_value);
- if (reg == NULL)
- return (EINVAL);
- buf.i = rdreg(reg);
- copyout((void*)&buf.i, (void*)va, 2);
- break;
- case ASM_OP_ST4:
- reg = greg_ptr(mc, (int)i->i_oper[2].o_value);
- if (reg == NULL)
- return (EINVAL);
- buf.i = rdreg(reg);
- copyout((void*)&buf.i, (void*)va, 4);
- break;
- case ASM_OP_ST8:
- reg = greg_ptr(mc, (int)i->i_oper[2].o_value);
- if (reg == NULL)
- return (EINVAL);
- buf.i = rdreg(reg);
- copyout((void*)&buf.i, (void*)va, 8);
- break;
- case ASM_OP_STFD:
- reg = fpreg_ptr(mc, (int)i->i_oper[2].o_value);
- if (reg == NULL)
- return (EINVAL);
- __asm("ldf.fill f6=%1;; stfd %0=f6" : "=m"(buf.d) :
- "m"(*(double *)reg) : "f6");
- copyout((void*)&buf.d, (void*)va, sizeof(buf.d));
- break;
- case ASM_OP_STFE:
- reg = fpreg_ptr(mc, (int)i->i_oper[2].o_value);
- if (reg == NULL)
- return (EINVAL);
- __asm("ldf.fill f6=%1;; stfe %0=f6" : "=m"(buf.e) :
- "m"(*(long double *)reg) : "f6");
- copyout((void*)&buf.e, (void*)va, sizeof(buf.e));
- break;
- case ASM_OP_STFS:
- reg = fpreg_ptr(mc, (int)i->i_oper[2].o_value);
- if (reg == NULL)
- return (EINVAL);
- __asm("ldf.fill f6=%1;; stfs %0=f6" : "=m"(buf.s) :
- "m"(*(float *)reg) : "f6");
- copyout((void*)&buf.s, (void*)va, sizeof(buf.s));
- break;
- default:
- return (ENOENT);
- }
-
- /* Handle post-increment. */
- if (i->i_oper[3].o_type == ASM_OPER_GREG) {
- reg = greg_ptr(mc, (int)i->i_oper[3].o_value);
- if (reg == NULL)
- return (EINVAL);
- postinc = rdreg(reg);
- } else
- postinc = (i->i_oper[3].o_type == ASM_OPER_IMM)
- ? i->i_oper[3].o_value : 0;
- if (postinc != 0) {
- if (i->i_oper[1].o_type == ASM_OPER_MEM)
- reg = greg_ptr(mc, (int)i->i_oper[1].o_value);
- else
- reg = greg_ptr(mc, (int)i->i_oper[2].o_value);
- if (reg == NULL)
- return (EINVAL);
- postinc += rdreg(reg);
- wrreg(reg, postinc);
- }
- return (0);
-}
-
-int
-unaligned_fixup(struct trapframe *tf, struct thread *td)
-{
- mcontext_t context;
- struct asm_bundle bundle;
- int error, slot;
-
- slot = ((tf->tf_special.psr & IA64_PSR_RI) == IA64_PSR_RI_0) ? 0 :
- ((tf->tf_special.psr & IA64_PSR_RI) == IA64_PSR_RI_1) ? 1 : 2;
-
- if (ia64_unaligned_print) {
- uprintf("pid %d (%s): unaligned access: va=0x%lx, pc=0x%lx\n",
- td->td_proc->p_pid, td->td_proc->p_comm,
- tf->tf_special.ifa, tf->tf_special.iip + slot);
- }
-
- /*
- * If PSR.ac is set, the process wants to be signalled about mis-
- * aligned loads and stores. Send it a SIGBUS. In order for us to
- * test the emulation of misaligned loads and stores, we have a
- * sysctl that tells us that we must emulate the load or store,
- * instead of sending the signal. We need the sysctl because if
- * PSR.ac is not set, the CPU may (and likely will) deal with the
- * misaligned load or store itself. As such, we won't get the
- * exception.
- */
- if ((tf->tf_special.psr & IA64_PSR_AC) && !ia64_unaligned_test)
- return (SIGBUS);
-
- if (!asm_decode(tf->tf_special.iip, &bundle))
- return (SIGILL);
-
- get_mcontext(td, &context, 0);
-
- error = fixup(bundle.b_inst + slot, &context, tf->tf_special.ifa);
- if (error == ENOENT) {
- printf("unhandled misaligned memory access:\n\t");
- asm_print_inst(&bundle, slot, tf->tf_special.iip);
- return (SIGILL);
- } else if (error != 0)
- return (SIGBUS);
-
- set_mcontext(td, &context);
-
- /* Advance to the next instruction. */
- if (slot == 2) {
- tf->tf_special.psr &= ~IA64_PSR_RI;
- tf->tf_special.iip += 16;
- } else
- tf->tf_special.psr += IA64_PSR_RI_1;
-
- return (0);
-}
--- sys/ia64/ia64/mp_machdep.c
+++ /dev/null
@@ -1,377 +0,0 @@
-/*-
- * Copyright (c) 2001-2005 Marcel Moolenaar
- * Copyright (c) 2000 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/mp_machdep.c,v 1.55.2.2 2006/02/14 03:40:49 marcel Exp $");
-
-#include "opt_kstack_pages.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/ktr.h>
-#include <sys/proc.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/kernel.h>
-#include <sys/pcpu.h>
-#include <sys/smp.h>
-#include <sys/sysctl.h>
-#include <sys/uuid.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_kern.h>
-
-#include <machine/atomic.h>
-#include <machine/clock.h>
-#include <machine/fpu.h>
-#include <machine/mca.h>
-#include <machine/md_var.h>
-#include <machine/pal.h>
-#include <machine/pcb.h>
-#include <machine/pmap.h>
-#include <machine/sal.h>
-#include <machine/smp.h>
-#include <i386/include/specialreg.h>
-
-MALLOC_DECLARE(M_PMAP);
-
-void ia64_ap_startup(void);
-
-extern uint64_t ia64_lapic_address;
-
-#define LID_SAPIC_ID(x) ((int)((x) >> 24) & 0xff)
-#define LID_SAPIC_EID(x) ((int)((x) >> 16) & 0xff)
-#define LID_SAPIC_SET(id,eid) (((id & 0xff) << 8 | (eid & 0xff)) << 16);
-#define LID_SAPIC_MASK 0xffff0000UL
-
-int mp_ipi_test = 0;
-
-/* Variables used by os_boot_rendez and ia64_ap_startup */
-struct pcpu *ap_pcpu;
-void *ap_stack;
-uint64_t ap_vhpt;
-volatile int ap_delay;
-volatile int ap_awake;
-volatile int ap_spin;
-
-static void cpu_mp_unleash(void *);
-
-void
-ia64_ap_startup(void)
-{
-
- pcpup = ap_pcpu;
- ia64_set_k4((intptr_t)pcpup);
-
- __asm __volatile("mov cr.pta=%0;; srlz.i;;" ::
- "r" (ap_vhpt + (1<<8) + (pmap_vhpt_log2size<<2) + 1));
-
- ap_awake = 1;
- ap_delay = 0;
-
- map_pal_code();
- map_gateway_page();
-
- ia64_set_fpsr(IA64_FPSR_DEFAULT);
-
- /* Wait until it's time for us to be unleashed */
- while (ap_spin)
- DELAY(0);
-
- __asm __volatile("ssm psr.i;; srlz.d;;");
-
- /* Initialize curthread. */
- KASSERT(PCPU_GET(idlethread) != NULL, ("no idle thread"));
- PCPU_SET(curthread, PCPU_GET(idlethread));
-
- /*
- * Correct spinlock nesting. The idle thread context that we are
- * borrowing was created so that it would start out with a single
- * spin lock (sched_lock) held in fork_trampoline(). Since we
- * don't have any locks and explicitly acquire locks when we need
- * to, the nesting count will be off by 1.
- */
- curthread->td_md.md_spinlock_count = 0;
- critical_exit();
-
- /*
- * Get and save the CPU specific MCA records. Should we get the
- * MCA state for each processor, or just the CMC state?
- */
- ia64_mca_save_state(SAL_INFO_MCA);
- ia64_mca_save_state(SAL_INFO_CMC);
-
- ap_awake++;
- while (!smp_started)
- DELAY(0);
-
- CTR1(KTR_SMP, "SMP: cpu%d launched", PCPU_GET(cpuid));
-
- mtx_lock_spin(&sched_lock);
-
- binuptime(PCPU_PTR(switchtime));
- PCPU_SET(switchticks, ticks);
-
- ia64_set_tpr(0);
-
- /* kick off the clock on this AP */
- pcpu_initclock();
-
- cpu_throw(NULL, choosethread());
- /* NOTREACHED */
-}
-
-void
-cpu_mp_setmaxid(void)
-{
-
- /*
- * Count the number of processors in the system by walking the ACPI
- * tables. Note that we record the actual number of processors, even
- * if this is larger than MAXCPU. We only activate MAXCPU processors.
- */
- mp_ncpus = ia64_count_cpus();
-
- /*
- * Set the largest cpuid we're going to use. This is necessary for
- * VM initialization.
- */
- mp_maxid = min(mp_ncpus, MAXCPU) - 1;
-}
-
-int
-cpu_mp_probe(void)
-{
-
- /*
- * If there's only 1 processor, or we don't have a wake-up vector,
- * we're not going to enable SMP. Note that no wake-up vector can
- * also mean that the wake-up mechanism is not supported. In this
- * case we can have multiple processors, but we simply can't wake
- * them up...
- */
- return (mp_ncpus > 1 && ipi_vector[IPI_AP_WAKEUP] != 0);
-}
-
-void
-cpu_mp_add(u_int acpiid, u_int apicid, u_int apiceid)
-{
- struct pcpu *pc;
- u_int64_t lid;
-
- /* Ignore any processor numbers outside our range */
- if (acpiid > mp_maxid)
- return;
-
- KASSERT((all_cpus & (1UL << acpiid)) == 0,
- ("%s: cpu%d already in CPU map", __func__, acpiid));
-
- lid = LID_SAPIC_SET(apicid, apiceid);
-
- if ((ia64_get_lid() & LID_SAPIC_MASK) == lid) {
- KASSERT(acpiid == 0,
- ("%s: the BSP must be cpu0", __func__));
- }
-
- if (acpiid != 0) {
- pc = (struct pcpu *)kmem_alloc(kernel_map, PAGE_SIZE);
- pcpu_init(pc, acpiid, PAGE_SIZE);
- } else
- pc = pcpup;
-
- pc->pc_lid = lid;
- all_cpus |= (1UL << acpiid);
-}
-
-void
-cpu_mp_announce()
-{
- struct pcpu *pc;
- int i;
-
- for (i = 0; i <= mp_maxid; i++) {
- pc = pcpu_find(i);
- if (pc != NULL) {
- printf("cpu%d: SAPIC Id=%x, SAPIC Eid=%x", i,
- LID_SAPIC_ID(pc->pc_lid),
- LID_SAPIC_EID(pc->pc_lid));
- if (i == 0)
- printf(" (BSP)\n");
- else
- printf("\n");
- }
- }
-}
-
-void
-cpu_mp_start()
-{
- struct pcpu *pc;
-
- ap_spin = 1;
-
- SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
- pc->pc_current_pmap = kernel_pmap;
- pc->pc_other_cpus = all_cpus & ~pc->pc_cpumask;
- if (pc->pc_cpuid > 0) {
- ap_pcpu = pc;
- ap_stack = malloc(KSTACK_PAGES * PAGE_SIZE, M_PMAP,
- M_WAITOK);
- ap_vhpt = pmap_vhpt_base[pc->pc_cpuid];
- ap_delay = 2000;
- ap_awake = 0;
-
- if (bootverbose)
- printf("SMP: waking up cpu%d\n", pc->pc_cpuid);
-
- ipi_send(pc, IPI_AP_WAKEUP);
-
- do {
- DELAY(1000);
- } while (--ap_delay > 0);
- pc->pc_awake = ap_awake;
-
- if (!ap_awake)
- printf("SMP: WARNING: cpu%d did not wake up\n",
- pc->pc_cpuid);
- } else {
- pc->pc_awake = 1;
- ipi_self(IPI_TEST);
- }
- }
-}
-
-static void
-cpu_mp_unleash(void *dummy)
-{
- struct pcpu *pc;
- int cpus;
-
- if (mp_ncpus <= 1)
- return;
-
- if (mp_ipi_test != 1)
- printf("SMP: WARNING: sending of a test IPI failed\n");
-
- cpus = 0;
- smp_cpus = 0;
- SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
- cpus++;
- if (pc->pc_awake)
- smp_cpus++;
- }
-
- ap_awake = 1;
- ap_spin = 0;
-
- while (ap_awake != smp_cpus)
- DELAY(0);
-
- if (smp_cpus != cpus || cpus != mp_ncpus) {
- printf("SMP: %d CPUs found; %d CPUs usable; %d CPUs woken\n",
- mp_ncpus, cpus, smp_cpus);
- }
-
- smp_active = 1;
- smp_started = 1;
-}
-
-/*
- * send an IPI to a set of cpus.
- */
-void
-ipi_selected(cpumask_t cpus, int ipi)
-{
- struct pcpu *pc;
-
- SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
- if (cpus & pc->pc_cpumask)
- ipi_send(pc, ipi);
- }
-}
-
-/*
- * send an IPI to all CPUs, including myself.
- */
-void
-ipi_all(int ipi)
-{
- struct pcpu *pc;
-
- SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
- ipi_send(pc, ipi);
- }
-}
-
-/*
- * send an IPI to all CPUs EXCEPT myself.
- */
-void
-ipi_all_but_self(int ipi)
-{
- struct pcpu *pc;
-
- SLIST_FOREACH(pc, &cpuhead, pc_allcpu) {
- if (pc != pcpup)
- ipi_send(pc, ipi);
- }
-}
-
-/*
- * send an IPI to myself.
- */
-void
-ipi_self(int ipi)
-{
-
- ipi_send(pcpup, ipi);
-}
-
-/*
- * Send an IPI to the specified processor. The lid parameter holds the
- * cr.lid (CR64) contents of the target processor. Only the id and eid
- * fields are used here.
- */
-void
-ipi_send(struct pcpu *cpu, int ipi)
-{
- volatile uint64_t *pipi;
- uint64_t vector;
-
- pipi = __MEMIO_ADDR(ia64_lapic_address |
- ((cpu->pc_lid & LID_SAPIC_MASK) >> 12));
- vector = (uint64_t)(ipi_vector[ipi] & 0xff);
- KASSERT(vector != 0, ("IPI %d is not assigned a vector", ipi));
- *pipi = vector;
- CTR3(KTR_SMP, "ipi_send(%p, %ld), cpuid=%d", pipi, vector,
- PCPU_GET(cpuid));
-}
-
-SYSINIT(start_aps, SI_SUB_SMP, SI_ORDER_FIRST, cpu_mp_unleash, NULL);
--- sys/ia64/ia64/trap.c
+++ /dev/null
@@ -1,1051 +0,0 @@
-/*-
- * Copyright (c) 2005 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/trap.c,v 1.113.2.1 2005/09/13 21:07:14 marcel Exp $");
-
-#include "opt_ddb.h"
-#include "opt_ktrace.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kdb.h>
-#include <sys/ktr.h>
-#include <sys/sysproto.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/exec.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/sched.h>
-#include <sys/smp.h>
-#include <sys/vmmeter.h>
-#include <sys/sysent.h>
-#include <sys/signalvar.h>
-#include <sys/syscall.h>
-#include <sys/pioctl.h>
-#include <sys/ptrace.h>
-#include <sys/sysctl.h>
-#include <vm/vm.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_param.h>
-#include <sys/ptrace.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/md_var.h>
-#include <machine/reg.h>
-#include <machine/pal.h>
-#include <machine/fpu.h>
-#include <machine/efi.h>
-#include <machine/pcb.h>
-#ifdef SMP
-#include <machine/smp.h>
-#endif
-
-#ifdef KTRACE
-#include <sys/uio.h>
-#include <sys/ktrace.h>
-#endif
-
-#include <ia64/disasm/disasm.h>
-
-static int print_usertrap = 0;
-SYSCTL_INT(_machdep, OID_AUTO, print_usertrap,
- CTLFLAG_RW, &print_usertrap, 0, "");
-
-static void break_syscall(struct trapframe *tf);
-
-/*
- * EFI-Provided FPSWA interface (Floating Point SoftWare Assist)
- */
-extern struct fpswa_iface *fpswa_iface;
-
-#ifdef WITNESS
-extern char *syscallnames[];
-#endif
-
-static const char *ia64_vector_names[] = {
- "VHPT Translation", /* 0 */
- "Instruction TLB", /* 1 */
- "Data TLB", /* 2 */
- "Alternate Instruction TLB", /* 3 */
- "Alternate Data TLB", /* 4 */
- "Data Nested TLB", /* 5 */
- "Instruction Key Miss", /* 6 */
- "Data Key Miss", /* 7 */
- "Dirty-Bit", /* 8 */
- "Instruction Access-Bit", /* 9 */
- "Data Access-Bit", /* 10 */
- "Break Instruction", /* 11 */
- "External Interrupt", /* 12 */
- "Reserved 13", /* 13 */
- "Reserved 14", /* 14 */
- "Reserved 15", /* 15 */
- "Reserved 16", /* 16 */
- "Reserved 17", /* 17 */
- "Reserved 18", /* 18 */
- "Reserved 19", /* 19 */
- "Page Not Present", /* 20 */
- "Key Permission", /* 21 */
- "Instruction Access Rights", /* 22 */
- "Data Access Rights", /* 23 */
- "General Exception", /* 24 */
- "Disabled FP-Register", /* 25 */
- "NaT Consumption", /* 26 */
- "Speculation", /* 27 */
- "Reserved 28", /* 28 */
- "Debug", /* 29 */
- "Unaligned Reference", /* 30 */
- "Unsupported Data Reference", /* 31 */
- "Floating-point Fault", /* 32 */
- "Floating-point Trap", /* 33 */
- "Lower-Privilege Transfer Trap", /* 34 */
- "Taken Branch Trap", /* 35 */
- "Single Step Trap", /* 36 */
- "Reserved 37", /* 37 */
- "Reserved 38", /* 38 */
- "Reserved 39", /* 39 */
- "Reserved 40", /* 40 */
- "Reserved 41", /* 41 */
- "Reserved 42", /* 42 */
- "Reserved 43", /* 43 */
- "Reserved 44", /* 44 */
- "IA-32 Exception", /* 45 */
- "IA-32 Intercept", /* 46 */
- "IA-32 Interrupt", /* 47 */
- "Reserved 48", /* 48 */
- "Reserved 49", /* 49 */
- "Reserved 50", /* 50 */
- "Reserved 51", /* 51 */
- "Reserved 52", /* 52 */
- "Reserved 53", /* 53 */
- "Reserved 54", /* 54 */
- "Reserved 55", /* 55 */
- "Reserved 56", /* 56 */
- "Reserved 57", /* 57 */
- "Reserved 58", /* 58 */
- "Reserved 59", /* 59 */
- "Reserved 60", /* 60 */
- "Reserved 61", /* 61 */
- "Reserved 62", /* 62 */
- "Reserved 63", /* 63 */
- "Reserved 64", /* 64 */
- "Reserved 65", /* 65 */
- "Reserved 66", /* 66 */
- "Reserved 67", /* 67 */
-};
-
-struct bitname {
- uint64_t mask;
- const char* name;
-};
-
-static void
-printbits(uint64_t mask, struct bitname *bn, int count)
-{
- int i, first = 1;
- uint64_t bit;
-
- for (i = 0; i < count; i++) {
- /*
- * Handle fields wider than one bit.
- */
- bit = bn[i].mask & ~(bn[i].mask - 1);
- if (bn[i].mask > bit) {
- if (first)
- first = 0;
- else
- printf(",");
- printf("%s=%ld", bn[i].name,
- (mask & bn[i].mask) / bit);
- } else if (mask & bit) {
- if (first)
- first = 0;
- else
- printf(",");
- printf("%s", bn[i].name);
- }
- }
-}
-
-struct bitname psr_bits[] = {
- {IA64_PSR_BE, "be"},
- {IA64_PSR_UP, "up"},
- {IA64_PSR_AC, "ac"},
- {IA64_PSR_MFL, "mfl"},
- {IA64_PSR_MFH, "mfh"},
- {IA64_PSR_IC, "ic"},
- {IA64_PSR_I, "i"},
- {IA64_PSR_PK, "pk"},
- {IA64_PSR_DT, "dt"},
- {IA64_PSR_DFL, "dfl"},
- {IA64_PSR_DFH, "dfh"},
- {IA64_PSR_SP, "sp"},
- {IA64_PSR_PP, "pp"},
- {IA64_PSR_DI, "di"},
- {IA64_PSR_SI, "si"},
- {IA64_PSR_DB, "db"},
- {IA64_PSR_LP, "lp"},
- {IA64_PSR_TB, "tb"},
- {IA64_PSR_RT, "rt"},
- {IA64_PSR_CPL, "cpl"},
- {IA64_PSR_IS, "is"},
- {IA64_PSR_MC, "mc"},
- {IA64_PSR_IT, "it"},
- {IA64_PSR_ID, "id"},
- {IA64_PSR_DA, "da"},
- {IA64_PSR_DD, "dd"},
- {IA64_PSR_SS, "ss"},
- {IA64_PSR_RI, "ri"},
- {IA64_PSR_ED, "ed"},
- {IA64_PSR_BN, "bn"},
- {IA64_PSR_IA, "ia"},
-};
-
-static void
-printpsr(uint64_t psr)
-{
- printbits(psr, psr_bits, sizeof(psr_bits)/sizeof(psr_bits[0]));
-}
-
-struct bitname isr_bits[] = {
- {IA64_ISR_CODE, "code"},
- {IA64_ISR_VECTOR, "vector"},
- {IA64_ISR_X, "x"},
- {IA64_ISR_W, "w"},
- {IA64_ISR_R, "r"},
- {IA64_ISR_NA, "na"},
- {IA64_ISR_SP, "sp"},
- {IA64_ISR_RS, "rs"},
- {IA64_ISR_IR, "ir"},
- {IA64_ISR_NI, "ni"},
- {IA64_ISR_SO, "so"},
- {IA64_ISR_EI, "ei"},
- {IA64_ISR_ED, "ed"},
-};
-
-static void printisr(uint64_t isr)
-{
- printbits(isr, isr_bits, sizeof(isr_bits)/sizeof(isr_bits[0]));
-}
-
-static void
-printtrap(int vector, struct trapframe *tf, int isfatal, int user)
-{
- printf("\n");
- printf("%s %s trap (cpu %d):\n", isfatal? "fatal" : "handled",
- user ? "user" : "kernel", PCPU_GET(cpuid));
- printf("\n");
- printf(" trap vector = 0x%x (%s)\n",
- vector, ia64_vector_names[vector]);
- printf(" cr.iip = 0x%lx\n", tf->tf_special.iip);
- printf(" cr.ipsr = 0x%lx (", tf->tf_special.psr);
- printpsr(tf->tf_special.psr);
- printf(")\n");
- printf(" cr.isr = 0x%lx (", tf->tf_special.isr);
- printisr(tf->tf_special.isr);
- printf(")\n");
- printf(" cr.ifa = 0x%lx\n", tf->tf_special.ifa);
- if (tf->tf_special.psr & IA64_PSR_IS) {
- printf(" ar.cflg = 0x%lx\n", ia64_get_cflg());
- printf(" ar.csd = 0x%lx\n", ia64_get_csd());
- printf(" ar.ssd = 0x%lx\n", ia64_get_ssd());
- }
- printf(" curthread = %p\n", curthread);
- if (curthread != NULL)
- printf(" pid = %d, comm = %s\n",
- curthread->td_proc->p_pid, curthread->td_proc->p_comm);
- printf("\n");
-}
-
-/*
- * We got a trap caused by a break instruction and the immediate was 0.
- * This indicates that we may have a break.b with some non-zero immediate.
- * The break.b doesn't cause the immediate to be put in cr.iim. Hence,
- * we need to disassemble the bundle and return the immediate found there.
- * This may be a 0 value anyway. Return 0 for any error condition. This
- * will result in a SIGILL, which is pretty much the best thing to do.
- */
-static uint64_t
-trap_decode_break(struct trapframe *tf)
-{
- struct asm_bundle bundle;
- struct asm_inst *inst;
- int slot;
-
- if (!asm_decode(tf->tf_special.iip, &bundle))
- return (0);
-
- slot = ((tf->tf_special.psr & IA64_PSR_RI) == IA64_PSR_RI_0) ? 0 :
- ((tf->tf_special.psr & IA64_PSR_RI) == IA64_PSR_RI_1) ? 1 : 2;
- inst = bundle.b_inst + slot;
-
- /*
- * Sanity checking: It must be a break instruction and the operand
- * that has the break value must be an immediate.
- */
- if (inst->i_op != ASM_OP_BREAK ||
- inst->i_oper[1].o_type != ASM_OPER_IMM)
- return (0);
-
- return (inst->i_oper[1].o_value);
-}
-
-void
-trap_panic(int vector, struct trapframe *tf)
-{
-
- printtrap(vector, tf, 1, TRAPF_USERMODE(tf));
-#ifdef KDB
- kdb_trap(vector, 0, tf);
-#endif
- panic("trap");
-}
-
-/*
- *
- */
-int
-do_ast(struct trapframe *tf)
-{
-
- disable_intr();
- while (curthread->td_flags & (TDF_ASTPENDING|TDF_NEEDRESCHED)) {
- enable_intr();
- ast(tf);
- disable_intr();
- }
- /*
- * Keep interrupts disabled. We return r10 as a favor to the EPC
- * syscall code so that it can quicky determine if the syscall
- * needs to be restarted or not.
- */
- return (tf->tf_scratch.gr10);
-}
-
-/*
- * Trap is called from exception.s to handle most types of processor traps.
- */
-/*ARGSUSED*/
-void
-trap(int vector, struct trapframe *tf)
-{
- struct proc *p;
- struct thread *td;
- uint64_t ucode;
- int error, sig, user;
- u_int sticks;
-
- user = TRAPF_USERMODE(tf) ? 1 : 0;
-
- PCPU_LAZY_INC(cnt.v_trap);
-
- td = curthread;
- p = td->td_proc;
- ucode = 0;
-
- if (user) {
- ia64_set_fpsr(IA64_FPSR_DEFAULT);
- sticks = td->td_sticks;
- td->td_frame = tf;
- if (td->td_ucred != p->p_ucred)
- cred_update_thread(td);
- } else {
- sticks = 0; /* XXX bogus -Wuninitialized warning */
- KASSERT(cold || td->td_ucred != NULL,
- ("kernel trap doesn't have ucred"));
-#ifdef KDB
- if (kdb_active)
- kdb_reenter();
-#endif
- }
-
- sig = 0;
- switch (vector) {
- case IA64_VEC_VHPT:
- /*
- * This one is tricky. We should hardwire the VHPT, but
- * don't at this time. I think we're mostly lucky that
- * the VHPT is mapped.
- */
- trap_panic(vector, tf);
- break;
-
- case IA64_VEC_ITLB:
- case IA64_VEC_DTLB:
- case IA64_VEC_EXT_INTR:
- /* We never call trap() with these vectors. */
- trap_panic(vector, tf);
- break;
-
- case IA64_VEC_ALT_ITLB:
- case IA64_VEC_ALT_DTLB:
- /*
- * These should never happen, because regions 0-4 use the
- * VHPT. If we get one of these it means we didn't program
- * the region registers correctly.
- */
- trap_panic(vector, tf);
- break;
-
- case IA64_VEC_NESTED_DTLB:
- /*
- * We never call trap() with this vector. We may want to
- * do that in the future in case the nested TLB handler
- * could not find the translation it needs. In that case
- * we could switch to a special (hardwired) stack and
- * come here to produce a nice panic().
- */
- trap_panic(vector, tf);
- break;
-
- case IA64_VEC_IKEY_MISS:
- case IA64_VEC_DKEY_MISS:
- case IA64_VEC_KEY_PERMISSION:
- /*
- * We don't use protection keys, so we should never get
- * these faults.
- */
- trap_panic(vector, tf);
- break;
-
- case IA64_VEC_DIRTY_BIT:
- case IA64_VEC_INST_ACCESS:
- case IA64_VEC_DATA_ACCESS:
- /*
- * We get here if we read or write to a page of which the
- * PTE does not have the access bit or dirty bit set and
- * we can not find the PTE in our datastructures. This
- * either means we have a stale PTE in the TLB, or we lost
- * the PTE in our datastructures.
- */
- trap_panic(vector, tf);
- break;
-
- case IA64_VEC_BREAK:
- if (user) {
- ucode = (int)tf->tf_special.ifa & 0x1FFFFF;
- if (ucode == 0) {
- /*
- * A break.b doesn't cause the immediate to be
- * stored in cr.iim (and saved in the TF in
- * tf_special.ifa). We need to decode the
- * instruction to find out what the immediate
- * was. Note that if the break instruction
- * didn't happen to be a break.b, but any
- * other break with an immediate of 0, we
- * will do unnecessary work to get the value
- * we already had. Not an issue, because a
- * break 0 is invalid.
- */
- ucode = trap_decode_break(tf);
- }
- if (ucode < 0x80000) {
- /* Software interrupts. */
- switch (ucode) {
- case 0: /* Unknown error. */
- sig = SIGILL;
- break;
- case 1: /* Integer divide by zero. */
- sig = SIGFPE;
- ucode = FPE_INTDIV;
- break;
- case 2: /* Integer overflow. */
- sig = SIGFPE;
- ucode = FPE_INTOVF;
- break;
- case 3: /* Range check/bounds check. */
- sig = SIGFPE;
- ucode = FPE_FLTSUB;
- break;
- case 6: /* Decimal overflow. */
- case 7: /* Decimal divide by zero. */
- case 8: /* Packed decimal error. */
- case 9: /* Invalid ASCII digit. */
- case 10: /* Invalid decimal digit. */
- sig = SIGFPE;
- ucode = FPE_FLTINV;
- break;
- case 4: /* Null pointer dereference. */
- case 5: /* Misaligned data. */
- case 11: /* Paragraph stack overflow. */
- sig = SIGSEGV;
- break;
- default:
- sig = SIGILL;
- break;
- }
- } else if (ucode < 0x100000) {
- /* Debugger breakpoint. */
- tf->tf_special.psr &= ~IA64_PSR_SS;
- sig = SIGTRAP;
- } else if (ucode == 0x100000) {
- break_syscall(tf);
- return; /* do_ast() already called. */
- } else if (ucode == 0x180000) {
- mcontext_t mc;
-
- error = copyin((void*)tf->tf_scratch.gr8,
- &mc, sizeof(mc));
- if (!error) {
- set_mcontext(td, &mc);
- return; /* Don't call do_ast()!!! */
- }
- sig = SIGSEGV;
- ucode = tf->tf_scratch.gr8;
- } else
- sig = SIGILL;
- } else {
-#ifdef KDB
- if (kdb_trap(vector, 0, tf))
- return;
- panic("trap");
-#else
- trap_panic(vector, tf);
-#endif
- }
- break;
-
- case IA64_VEC_PAGE_NOT_PRESENT:
- case IA64_VEC_INST_ACCESS_RIGHTS:
- case IA64_VEC_DATA_ACCESS_RIGHTS: {
- vm_offset_t va;
- struct vmspace *vm;
- vm_map_t map;
- vm_prot_t ftype;
- int rv;
-
- rv = 0;
- va = trunc_page(tf->tf_special.ifa);
-
- if (va >= VM_MAX_ADDRESS) {
- /*
- * Don't allow user-mode faults for kernel virtual
- * addresses, including the gateway page.
- */
- if (user)
- goto no_fault_in;
- map = kernel_map;
- } else {
- vm = (p != NULL) ? p->p_vmspace : NULL;
- if (vm == NULL)
- goto no_fault_in;
- map = &vm->vm_map;
- }
-
- if (tf->tf_special.isr & IA64_ISR_X)
- ftype = VM_PROT_EXECUTE;
- else if (tf->tf_special.isr & IA64_ISR_W)
- ftype = VM_PROT_WRITE;
- else
- ftype = VM_PROT_READ;
-
- if (map != kernel_map) {
- /*
- * Keep swapout from messing with us during this
- * critical time.
- */
- PROC_LOCK(p);
- ++p->p_lock;
- PROC_UNLOCK(p);
-
- /* Fault in the user page: */
- rv = vm_fault(map, va, ftype, (ftype & VM_PROT_WRITE)
- ? VM_FAULT_DIRTY : VM_FAULT_NORMAL);
-
- PROC_LOCK(p);
- --p->p_lock;
- PROC_UNLOCK(p);
- } else {
- /*
- * Don't have to worry about process locking or
- * stacks in the kernel.
- */
- rv = vm_fault(map, va, ftype, VM_FAULT_NORMAL);
- }
-
- if (rv == KERN_SUCCESS)
- goto out;
-
- no_fault_in:
- if (!user) {
- /* Check for copyin/copyout fault. */
- if (td != NULL && td->td_pcb->pcb_onfault != 0) {
- tf->tf_special.iip =
- td->td_pcb->pcb_onfault;
- tf->tf_special.psr &= ~IA64_PSR_RI;
- td->td_pcb->pcb_onfault = 0;
- goto out;
- }
- trap_panic(vector, tf);
- }
- ucode = va;
- sig = (rv == KERN_PROTECTION_FAILURE) ? SIGBUS : SIGSEGV;
- break;
- }
-
- case IA64_VEC_GENERAL_EXCEPTION:
- case IA64_VEC_NAT_CONSUMPTION:
- case IA64_VEC_SPECULATION:
- case IA64_VEC_UNSUPP_DATA_REFERENCE:
- if (user) {
- ucode = vector;
- sig = SIGILL;
- } else
- trap_panic(vector, tf);
- break;
-
- case IA64_VEC_DISABLED_FP: {
- struct pcpu *pcpu;
- struct pcb *pcb;
- struct thread *thr;
-
- /* Always fatal in kernel. Should never happen. */
- if (!user)
- trap_panic(vector, tf);
-
- sched_pin();
- thr = PCPU_GET(fpcurthread);
- if (thr == td) {
- /*
- * Short-circuit handling the trap when this CPU
- * already holds the high FP registers for this
- * thread. We really shouldn't get the trap in the
- * first place, but since it's only a performance
- * issue and not a correctness issue, we emit a
- * message for now, enable the high FP registers and
- * return.
- */
- printf("XXX: bogusly disabled high FP regs\n");
- tf->tf_special.psr &= ~IA64_PSR_DFH;
- sched_unpin();
- goto out;
- } else if (thr != NULL) {
- mtx_lock_spin(&thr->td_md.md_highfp_mtx);
- pcb = thr->td_pcb;
- save_high_fp(&pcb->pcb_high_fp);
- pcb->pcb_fpcpu = NULL;
- PCPU_SET(fpcurthread, NULL);
- mtx_unlock_spin(&thr->td_md.md_highfp_mtx);
- thr = NULL;
- }
-
- mtx_lock_spin(&td->td_md.md_highfp_mtx);
- pcb = td->td_pcb;
- pcpu = pcb->pcb_fpcpu;
-
-#ifdef SMP
- if (pcpu != NULL) {
- mtx_unlock_spin(&td->td_md.md_highfp_mtx);
- ipi_send(pcpu, IPI_HIGH_FP);
- while (pcb->pcb_fpcpu == pcpu)
- DELAY(100);
- mtx_lock_spin(&td->td_md.md_highfp_mtx);
- pcpu = pcb->pcb_fpcpu;
- thr = PCPU_GET(fpcurthread);
- }
-#endif
-
- if (thr == NULL && pcpu == NULL) {
- restore_high_fp(&pcb->pcb_high_fp);
- PCPU_SET(fpcurthread, td);
- pcb->pcb_fpcpu = pcpup;
- tf->tf_special.psr &= ~IA64_PSR_MFH;
- tf->tf_special.psr &= ~IA64_PSR_DFH;
- }
-
- mtx_unlock_spin(&td->td_md.md_highfp_mtx);
- sched_unpin();
- goto out;
- }
-
- case IA64_VEC_DEBUG:
- case IA64_VEC_SINGLE_STEP_TRAP:
- tf->tf_special.psr &= ~IA64_PSR_SS;
- if (!user) {
-#ifdef KDB
- if (kdb_trap(vector, 0, tf))
- return;
- panic("trap");
-#else
- trap_panic(vector, tf);
-#endif
- }
- sig = SIGTRAP;
- break;
-
- case IA64_VEC_UNALIGNED_REFERENCE:
- /*
- * If user-land, do whatever fixups, printing, and
- * signalling is appropriate (based on system-wide
- * and per-process unaligned-access-handling flags).
- */
- if (user) {
- sig = unaligned_fixup(tf, td);
- if (sig == 0)
- goto out;
- ucode = tf->tf_special.ifa; /* VA */
- } else {
- /* Check for copyin/copyout fault. */
- if (td != NULL && td->td_pcb->pcb_onfault != 0) {
- tf->tf_special.iip =
- td->td_pcb->pcb_onfault;
- tf->tf_special.psr &= ~IA64_PSR_RI;
- td->td_pcb->pcb_onfault = 0;
- goto out;
- }
- trap_panic(vector, tf);
- }
- break;
-
- case IA64_VEC_FLOATING_POINT_FAULT:
- case IA64_VEC_FLOATING_POINT_TRAP: {
- struct fpswa_bundle bundle;
- struct fpswa_fpctx fpctx;
- struct fpswa_ret ret;
- char *ip;
- u_long fault;
-
- /* Always fatal in kernel. Should never happen. */
- if (!user)
- trap_panic(vector, tf);
-
- if (fpswa_iface == NULL) {
- sig = SIGFPE;
- ucode = 0;
- break;
- }
-
- ip = (char *)tf->tf_special.iip;
- if (vector == IA64_VEC_FLOATING_POINT_TRAP &&
- (tf->tf_special.psr & IA64_PSR_RI) == 0)
- ip -= 16;
- error = copyin(ip, &bundle, sizeof(bundle));
- if (error) {
- sig = SIGBUS; /* EFAULT, basically */
- ucode = 0; /* exception summary */
- break;
- }
-
- /* f6-f15 are saved in exception_save */
- fpctx.mask_low = 0xffc0; /* bits 6 - 15 */
- fpctx.mask_high = 0;
- fpctx.fp_low_preserved = NULL;
- fpctx.fp_low_volatile = &tf->tf_scratch_fp.fr6;
- fpctx.fp_high_preserved = NULL;
- fpctx.fp_high_volatile = NULL;
-
- fault = (vector == IA64_VEC_FLOATING_POINT_FAULT) ? 1 : 0;
-
- /*
- * We have the high FP registers disabled while in the
- * kernel. Enable them for the FPSWA handler only.
- */
- ia64_enable_highfp();
-
- /* The docs are unclear. Is Fpswa reentrant? */
- ret = fpswa_iface->if_fpswa(fault, &bundle,
- &tf->tf_special.psr, &tf->tf_special.fpsr,
- &tf->tf_special.isr, &tf->tf_special.pr,
- &tf->tf_special.cfm, &fpctx);
-
- ia64_disable_highfp();
-
- /*
- * Update ipsr and iip to next instruction. We only
- * have to do that for faults.
- */
- if (fault && (ret.status == 0 || (ret.status & 2))) {
- int ei;
-
- ei = (tf->tf_special.isr >> 41) & 0x03;
- if (ei == 0) { /* no template for this case */
- tf->tf_special.psr &= ~IA64_ISR_EI;
- tf->tf_special.psr |= IA64_ISR_EI_1;
- } else if (ei == 1) { /* MFI or MFB */
- tf->tf_special.psr &= ~IA64_ISR_EI;
- tf->tf_special.psr |= IA64_ISR_EI_2;
- } else if (ei == 2) { /* MMF */
- tf->tf_special.psr &= ~IA64_ISR_EI;
- tf->tf_special.iip += 0x10;
- }
- }
-
- if (ret.status == 0) {
- goto out;
- } else if (ret.status == -1) {
- printf("FATAL: FPSWA err1 %lx, err2 %lx, err3 %lx\n",
- ret.err1, ret.err2, ret.err3);
- panic("fpswa fatal error on fp fault");
- } else {
- sig = SIGFPE;
- ucode = 0; /* XXX exception summary */
- break;
- }
- }
-
- case IA64_VEC_LOWER_PRIVILEGE_TRANSFER:
- /*
- * The lower-privilege transfer trap is used by the EPC
- * syscall code to trigger re-entry into the kernel when the
- * process should be single stepped. The problem is that
- * there's no way to set single stepping directly without
- * using the rfi instruction. So instead we enable the
- * lower-privilege transfer trap and when we get here we
- * know that the process is about to enter userland (and
- * has already lowered its privilege).
- * However, there's another gotcha. When the process has
- * lowered it's privilege it's still running in the gateway
- * page. If we enable single stepping, we'll be stepping
- * the code in the gateway page. In and by itself this is
- * not a problem, but it's an address debuggers won't know
- * anything about. Hence, it can only cause confusion.
- * We know that we need to branch to get out of the gateway
- * page, so what we do here is enable the taken branch
- * trap and just let the process continue. When we branch
- * out of the gateway page we'll get back into the kernel
- * and then we enable single stepping.
- * Since this a rather round-about way of enabling single
- * stepping, don't make things complicated even more by
- * calling userret() and do_ast(). We do that later...
- */
- tf->tf_special.psr &= ~IA64_PSR_LP;
- tf->tf_special.psr |= IA64_PSR_TB;
- return;
-
- case IA64_VEC_TAKEN_BRANCH_TRAP:
- /*
- * Don't assume there aren't any branches other than the
- * branch that takes us out of the gateway page. Check the
- * iip and raise SIGTRAP only when it's an user address.
- */
- if (tf->tf_special.iip >= VM_MAX_ADDRESS)
- return;
- tf->tf_special.psr &= ~IA64_PSR_TB;
- sig = SIGTRAP;
- break;
-
- case IA64_VEC_IA32_EXCEPTION:
- case IA64_VEC_IA32_INTERCEPT:
- case IA64_VEC_IA32_INTERRUPT:
- sig = SIGEMT;
- ucode = tf->tf_special.iip;
- break;
-
- default:
- /* Reserved vectors get here. Should never happen of course. */
- trap_panic(vector, tf);
- break;
- }
-
- KASSERT(sig != 0, ("foo"));
-
- if (print_usertrap)
- printtrap(vector, tf, 1, user);
-
- trapsignal(td, sig, ucode);
-
-out:
- if (user) {
- userret(td, tf, sticks);
- mtx_assert(&Giant, MA_NOTOWNED);
- do_ast(tf);
- }
- return;
-}
-
-/*
- * Handle break instruction based system calls.
- */
-void
-break_syscall(struct trapframe *tf)
-{
- uint64_t *bsp, *tfp;
- uint64_t iip, psr;
- int error, nargs;
-
- /* Save address of break instruction. */
- iip = tf->tf_special.iip;
- psr = tf->tf_special.psr;
-
- /* Advance to the next instruction. */
- tf->tf_special.psr += IA64_PSR_RI_1;
- if ((tf->tf_special.psr & IA64_PSR_RI) > IA64_PSR_RI_2) {
- tf->tf_special.iip += 16;
- tf->tf_special.psr &= ~IA64_PSR_RI;
- }
-
- /*
- * Copy the arguments on the register stack into the trapframe
- * to avoid having interleaved NaT collections.
- */
- tfp = &tf->tf_scratch.gr16;
- nargs = tf->tf_special.cfm & 0x7f;
- bsp = (uint64_t*)(curthread->td_kstack + tf->tf_special.ndirty +
- (tf->tf_special.bspstore & 0x1ffUL));
- bsp -= (((uintptr_t)bsp & 0x1ff) < (nargs << 3)) ? (nargs + 1): nargs;
- while (nargs--) {
- *tfp++ = *bsp++;
- if (((uintptr_t)bsp & 0x1ff) == 0x1f8)
- bsp++;
- }
- error = syscall(tf);
- if (error == ERESTART) {
- tf->tf_special.iip = iip;
- tf->tf_special.psr = psr;
- }
-
- do_ast(tf);
-}
-
-/*
- * Process a system call.
- *
- * See syscall.s for details as to how we get here. In order to support
- * the ERESTART case, we return the error to our caller. They deal with
- * the hairy details.
- */
-int
-syscall(struct trapframe *tf)
-{
- struct sysent *callp;
- struct proc *p;
- struct thread *td;
- uint64_t *args;
- int code, error;
- u_int sticks;
-
- ia64_set_fpsr(IA64_FPSR_DEFAULT);
-
- code = tf->tf_scratch.gr15;
- args = &tf->tf_scratch.gr16;
-
- PCPU_LAZY_INC(cnt.v_syscall);
-
- td = curthread;
- td->td_frame = tf;
- p = td->td_proc;
-
- sticks = td->td_sticks;
- if (td->td_ucred != p->p_ucred)
- cred_update_thread(td);
- if (p->p_flag & P_SA)
- thread_user_enter(td);
-
- if (p->p_sysent->sv_prepsyscall) {
- /* (*p->p_sysent->sv_prepsyscall)(tf, args, &code, ¶ms); */
- panic("prepsyscall");
- } else {
- /*
- * syscall() and __syscall() are handled the same on
- * the ia64, as everything is 64-bit aligned, anyway.
- */
- if (code == SYS_syscall || code == SYS___syscall) {
- /*
- * Code is first argument, followed by actual args.
- */
- code = args[0];
- args++;
- }
- }
-
- if (p->p_sysent->sv_mask)
- code &= p->p_sysent->sv_mask;
-
- if (code >= p->p_sysent->sv_size)
- callp = &p->p_sysent->sv_table[0];
- else
- callp = &p->p_sysent->sv_table[code];
-
-#ifdef KTRACE
- if (KTRPOINT(td, KTR_SYSCALL))
- ktrsyscall(code, (callp->sy_narg & SYF_ARGMASK), args);
-#endif
-
- td->td_retval[0] = 0;
- td->td_retval[1] = 0;
- tf->tf_scratch.gr10 = EJUSTRETURN;
-
- STOPEVENT(p, S_SCE, (callp->sy_narg & SYF_ARGMASK));
-
- PTRACESTOP_SC(p, td, S_PT_SCE);
-
- /*
- * Grab Giant if the syscall is not flagged as MP safe.
- */
- if ((callp->sy_narg & SYF_MPSAFE) == 0) {
- mtx_lock(&Giant);
- error = (*callp->sy_call)(td, args);
- mtx_unlock(&Giant);
- } else
- error = (*callp->sy_call)(td, args);
-
- if (error != EJUSTRETURN) {
- /*
- * Save the "raw" error code in r10. We use this to handle
- * syscall restarts (see do_ast()).
- */
- tf->tf_scratch.gr10 = error;
- if (error == 0) {
- tf->tf_scratch.gr8 = td->td_retval[0];
- tf->tf_scratch.gr9 = td->td_retval[1];
- } else if (error != ERESTART) {
- if (error < p->p_sysent->sv_errsize)
- error = p->p_sysent->sv_errtbl[error];
- /*
- * Translated error codes are returned in r8. User
- * processes use the translated error code.
- */
- tf->tf_scratch.gr8 = error;
- }
- }
-
- userret(td, tf, sticks);
-
-#ifdef KTRACE
- if (KTRPOINT(td, KTR_SYSRET))
- ktrsysret(code, error, td->td_retval[0]);
-#endif
-
- /*
- * This works because errno is findable through the
- * register set. If we ever support an emulation where this
- * is not the case, this code will need to be revisited.
- */
- STOPEVENT(p, S_SCX, code);
-
- PTRACESTOP_SC(p, td, S_PT_SCX);
-
- WITNESS_WARN(WARN_PANIC, NULL, "System call %s returning",
- (code >= 0 && code < SYS_MAXSYSCALL) ? syscallnames[code] : "???");
- mtx_assert(&sched_lock, MA_NOTOWNED);
- mtx_assert(&Giant, MA_NOTOWNED);
-
- return (error);
-}
--- sys/ia64/ia64/mca.c
+++ /dev/null
@@ -1,228 +0,0 @@
-/*-
- * Copyright (c) 2002 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/mca.c,v 1.10.2.1 2006/02/14 03:40:49 marcel Exp $
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/sysctl.h>
-#include <sys/uuid.h>
-#include <vm/vm.h>
-#include <vm/vm_kern.h>
-#include <machine/mca.h>
-#include <machine/sal.h>
-#include <machine/smp.h>
-
-MALLOC_DEFINE(M_MCA, "MCA", "Machine Check Architecture");
-
-int64_t mca_info_size[SAL_INFO_TYPES];
-vm_offset_t mca_info_block;
-struct mtx mca_info_block_lock;
-
-SYSCTL_NODE(_hw, OID_AUTO, mca, CTLFLAG_RW, 0, "MCA container");
-
-static int mca_count; /* Number of records stored. */
-static int mca_first; /* First (lowest) record ID. */
-static int mca_last; /* Last (highest) record ID. */
-
-SYSCTL_INT(_hw_mca, OID_AUTO, count, CTLFLAG_RD, &mca_count, 0,
- "Record count");
-SYSCTL_INT(_hw_mca, OID_AUTO, first, CTLFLAG_RD, &mca_first, 0,
- "First record id");
-SYSCTL_INT(_hw_mca, OID_AUTO, last, CTLFLAG_RD, &mca_last, 0,
- "Last record id");
-
-static int
-mca_sysctl_handler(SYSCTL_HANDLER_ARGS)
-{
- int error = 0;
-
- if (!arg1)
- return (EINVAL);
- error = SYSCTL_OUT(req, arg1, arg2);
-
- if (error || !req->newptr)
- return (error);
-
- error = SYSCTL_IN(req, arg1, arg2);
- return (error);
-}
-
-void
-ia64_mca_save_state(int type)
-{
- struct ia64_sal_result result;
- struct mca_record_header *hdr;
- struct sysctl_oid *oidp;
- char *name, *state;
- uint64_t seqnr;
- size_t recsz, totsz;
-
- /*
- * Don't try to get the state if we couldn't get the size of
- * the state information previously.
- */
- if (mca_info_size[type] == -1)
- return;
-
- while (1) {
- mtx_lock_spin(&mca_info_block_lock);
-
- result = ia64_sal_entry(SAL_GET_STATE_INFO, type, 0,
- mca_info_block, 0, 0, 0, 0);
- if (result.sal_status < 0) {
- mtx_unlock_spin(&mca_info_block_lock);
- return;
- }
-
- hdr = (struct mca_record_header *)mca_info_block;
- recsz = hdr->rh_length;
- seqnr = hdr->rh_seqnr;
-
- mtx_unlock_spin(&mca_info_block_lock);
-
- totsz = sizeof(struct sysctl_oid) + recsz + 32;
- oidp = malloc(totsz, M_MCA, M_NOWAIT|M_ZERO);
- state = (char*)(oidp + 1);
- name = state + recsz;
- sprintf(name, "%lld", (long long)seqnr);
-
- mtx_lock_spin(&mca_info_block_lock);
-
- /*
- * If the info block doesn't have our record anymore because
- * we temporarily unlocked it, get it again from SAL. I assume
- * that it's possible that we could get a different record.
- * I expect this to happen in a SMP configuration where the
- * record has been cleared by a different processor. So, if
- * we get a different record we simply abort with this record
- * and start over.
- */
- if (seqnr != hdr->rh_seqnr) {
- result = ia64_sal_entry(SAL_GET_STATE_INFO, type, 0,
- mca_info_block, 0, 0, 0, 0);
- if (seqnr != hdr->rh_seqnr) {
- mtx_unlock_spin(&mca_info_block_lock);
- free(oidp, M_MCA);
- continue;
- }
- }
-
- bcopy((char*)mca_info_block, state, recsz);
-
- oidp->oid_parent = &sysctl__hw_mca_children;
- oidp->oid_number = OID_AUTO;
- oidp->oid_kind = CTLTYPE_OPAQUE|CTLFLAG_RD|CTLFLAG_DYN;
- oidp->oid_arg1 = state;
- oidp->oid_arg2 = recsz;
- oidp->oid_name = name;
- oidp->oid_handler = mca_sysctl_handler;
- oidp->oid_fmt = "S,MCA";
- oidp->oid_descr = "Error record";
-
- sysctl_register_oid(oidp);
-
- if (mca_count > 0) {
- if (seqnr < mca_first)
- mca_first = seqnr;
- else if (seqnr > mca_last)
- mca_last = seqnr;
- } else
- mca_first = mca_last = seqnr;
-
- mca_count++;
-
- /*
- * Clear the state so that we get any other records when
- * they exist.
- */
- result = ia64_sal_entry(SAL_CLEAR_STATE_INFO, type, 0, 0, 0,
- 0, 0, 0);
-
- mtx_unlock_spin(&mca_info_block_lock);
- }
-}
-
-void
-ia64_mca_init(void)
-{
- struct ia64_sal_result result;
- uint64_t max_size;
- char *p;
- int i;
-
- /*
- * Get the sizes of the state information we can get from SAL and
- * allocate a common block (forgive me my Fortran :-) for use by
- * support functions. We create a region 7 address to make it
- * easy on the OS_MCA or OS_INIT handlers to get the state info
- * under unreliable conditions.
- */
- max_size = 0;
- for (i = 0; i < SAL_INFO_TYPES; i++) {
- result = ia64_sal_entry(SAL_GET_STATE_INFO_SIZE, i, 0, 0, 0,
- 0, 0, 0);
- if (result.sal_status == 0) {
- mca_info_size[i] = result.sal_result[0];
- if (mca_info_size[i] > max_size)
- max_size = mca_info_size[i];
- } else
- mca_info_size[i] = -1;
- }
- max_size = round_page(max_size);
-
- if (max_size) {
- p = contigmalloc(max_size, M_TEMP, M_WAITOK, 0ul,
- 256*1024*1024 - 1, PAGE_SIZE, 256*1024*1024);
- mca_info_block = IA64_PHYS_TO_RR7(ia64_tpa((u_int64_t)p));
-
- if (bootverbose)
- printf("MCA: allocated %ld bytes for state info.\n",
- max_size);
- }
-
- /*
- * Initialize the spin lock used to protect the info block. When APs
- * get launched, there's a short moment of contention, but in all other
- * cases it's not a hot spot. I think it's possible to have the MCA
- * handler be called on multiple processors at the same time, but that
- * should be rare. On top of that, performance is not an issue when
- * dealing with machine checks...
- */
- mtx_init(&mca_info_block_lock, "MCA spin lock", NULL, MTX_SPIN);
-
- /*
- * Get and save any processor and platfom error records. Note that in
- * a SMP configuration the processor records are for the BSP only. We
- * let the APs get and save their own records when we wake them up.
- */
- for (i = 0; i < SAL_INFO_TYPES; i++)
- ia64_mca_save_state(i);
-}
--- sys/ia64/ia64/context.S
+++ /dev/null
@@ -1,804 +0,0 @@
-/*-
- * Copyright (c) 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/context.S,v 1.4 2005/01/06 22:18:22 imp Exp $
- */
-
-#include <machine/asm.h>
-#include <assym.s>
-
- .text
-
-/*
- * void restorectx(struct pcb *)
- */
-ENTRY(restorectx, 1)
-{ .mmi
- invala
- mov ar.rsc=0
- add r31=8,r32
- ;;
-}
-{ .mmi
- ld8 r12=[r32] // sp
- ld8 r16=[r31],16 // unat (before)
- add r30=16,r32
- ;;
-}
-{ .mmi
- ld8 r17=[r30],16 // rp
- ld8 r18=[r31],16 // pr
- add r14=SIZEOF_SPECIAL,r32
- ;;
-}
-{ .mmi
- ld8 r19=[r30],16 // pfs
- ld8 r20=[r31],16 // bspstore
- mov rp=r17
- ;;
-}
-{ .mmi
- loadrs
- ld8 r21=[r30],16 // rnat
- mov pr=r18,0x1fffe
- ;;
-}
-{ .mmi
- ld8 r17=[r14],8 // unat (after)
- mov ar.bspstore=r20
- mov ar.pfs=r19
- ;;
-}
-{ .mmi
- mov ar.unat=r17
- mov ar.rnat=r21
- add r15=8,r14
- ;;
-}
-{ .mmi
- ld8.fill r4=[r14],16 // r4
- ld8.fill r5=[r15],16 // r5
- nop 0
- ;;
-}
-{ .mmi
- ld8.fill r6=[r14],16 // r6
- ld8.fill r7=[r15],16 // r7
- nop 1
- ;;
-}
-{ .mmi
- mov ar.unat=r16
- mov ar.rsc=3
- nop 2
-}
-{ .mmi
- ld8 r17=[r14],16 // b1
- ld8 r18=[r15],16 // b2
- nop 3
- ;;
-}
-{ .mmi
- ld8 r19=[r14],16 // b3
- ld8 r20=[r15],16 // b4
- mov b1=r17
- ;;
-}
-{ .mmi
- ld8 r16=[r14],24 // b5
- ld8 r17=[r15],32 // lc
- mov b2=r18
- ;;
-}
-{ .mmi
- ldf.fill f2=[r14],32
- ldf.fill f3=[r15],32
- mov b3=r19
- ;;
-}
-{ .mmi
- ldf.fill f4=[r14],32
- ldf.fill f5=[r15],32
- mov b4=r20
- ;;
-}
-{ .mmi
- ldf.fill f16=[r14],32
- ldf.fill f17=[r15],32
- mov b5=r16
- ;;
-}
-{ .mmi
- ldf.fill f18=[r14],32
- ldf.fill f19=[r15],32
- mov ar.lc=r17
- ;;
-}
- ldf.fill f20=[r14],32
- ldf.fill f21=[r15],32
- ;;
- ldf.fill f22=[r14],32
- ldf.fill f23=[r15],32
- ;;
- ldf.fill f24=[r14],32
- ldf.fill f25=[r15],32
- ;;
- ldf.fill f26=[r14],32
- ldf.fill f27=[r15],32
- ;;
-{ .mmi
- ldf.fill f28=[r14],32
- ldf.fill f29=[r15],32
- add r8=1,r0
- ;;
-}
-{ .mmb
- ldf.fill f30=[r14]
- ldf.fill f31=[r15]
- br.ret.sptk rp
- ;;
-}
-END(restorectx)
-
-/*
- * void swapctx(struct pcb *old, struct pcb *new)
- */
-
-ENTRY(swapctx, 2)
-{ .mmi
- mov ar.rsc=0
- mov r16=ar.unat
- add r31=8,r32
- ;;
-}
-{ .mmi
- flushrs
- st8 [r32]=sp,16 // sp
- mov r17=rp
- ;;
-}
-{ .mmi
- st8 [r31]=r16,16 // unat (before)
- st8 [r32]=r17,16 // rp
- mov r16=pr
- ;;
-}
-{ .mmi
- st8 [r31]=r16,16 // pr
- mov r17=ar.bsp
- mov r16=ar.pfs
- ;;
-}
-{ .mmi
- st8 [r32]=r16,16 // pfs
- st8 [r31]=r17,16 // bspstore
- cmp.eq p15,p0=0,r33
- ;;
-}
-{ .mmi
- mov r16=ar.rnat
-(p15) mov ar.rsc=3
- add r30=SIZEOF_SPECIAL-(6*8),r32
- ;;
-}
-{ .mmi
- st8 [r32]=r16,SIZEOF_SPECIAL-(4*8) // rnat
- st8 [r31]=r0,SIZEOF_SPECIAL-(6*8) // __spare
- mov r16=b1
- ;;
-}
- /* callee_saved */
-{ .mmi
- .mem.offset 8,0
- st8.spill [r31]=r4,16 // r4
- .mem.offset 16,0
- st8.spill [r32]=r5,16 // r5
- mov r17=b2
- ;;
-}
-{ .mmi
- .mem.offset 24,0
- st8.spill [r31]=r6,16 // r6
- .mem.offset 32,0
- st8.spill [r32]=r7,16 // r7
- mov r18=b3
- ;;
-}
-{ .mmi
- st8 [r31]=r16,16 // b1
- mov r16=ar.unat
- mov r19=b4
- ;;
-}
-{ .mmi
- st8 [r30]=r16 // unat (after)
- st8 [r32]=r17,16 // b2
- mov r16=b5
- ;;
-}
-{ .mmi
- st8 [r31]=r18,16 // b3
- st8 [r32]=r19,16 // b4
- mov r17=ar.lc
- ;;
-}
- st8 [r31]=r16,16 // b5
- st8 [r32]=r17,16 // lc
- ;;
- st8 [r31]=r0,24 // __spare
- stf.spill [r32]=f2,32
- ;;
- stf.spill [r31]=f3,32
- stf.spill [r32]=f4,32
- ;;
- stf.spill [r31]=f5,32
- stf.spill [r32]=f16,32
- ;;
- stf.spill [r31]=f17,32
- stf.spill [r32]=f18,32
- ;;
- stf.spill [r31]=f19,32
- stf.spill [r32]=f20,32
- ;;
- stf.spill [r31]=f21,32
- stf.spill [r32]=f22,32
- ;;
- stf.spill [r31]=f23,32
- stf.spill [r32]=f24,32
- ;;
- stf.spill [r31]=f25,32
- stf.spill [r32]=f26,32
- ;;
- stf.spill [r31]=f27,32
- stf.spill [r32]=f28,32
- ;;
-{ .mmi
- stf.spill [r31]=f29,32
- stf.spill [r32]=f30
-(p15) add r8=0,r0
- ;;
-}
-{ .mmb
- stf.spill [r31]=f31
- mf
-(p15) br.ret.sptk rp
- ;;
-}
-{ .mfb
- mov r32=r33
- nop 0
- br.sptk restorectx
- ;;
-}
-END(swapctx)
-
-/*
- * save_callee_saved(struct _callee_saved *)
- */
-ENTRY(save_callee_saved, 1)
-{ .mii
- nop 0
- add r14=8,r32
- add r15=16,r32
- ;;
-}
-{ .mmi
- .mem.offset 8,0
- st8.spill [r14]=r4,16 // r4
- .mem.offset 16,0
- st8.spill [r15]=r5,16 // r5
- mov r16=b1
- ;;
-}
-{ .mmi
- .mem.offset 24,0
- st8.spill [r14]=r6,16 // r6
- .mem.offset 32,0
- st8.spill [r15]=r7,16 // r7
- mov r17=b2
- ;;
-}
-{ .mmi
- st8 [r14]=r16,16 // b1
- mov r18=ar.unat
- mov r19=b3
- ;;
-}
-{ .mmi
- st8 [r32]=r18 // nat (after)
- st8 [r15]=r17,16 // b2
- mov r16=b4
- ;;
-}
-{ .mmi
- st8 [r14]=r19,16 // b3
- st8 [r15]=r16,16 // b4
- mov r17=b5
- ;;
-}
-{ .mfi
- st8 [r14]=r17,16 // b5
- nop 0
- mov r16=ar.lc
- ;;
-}
-{ .mmb
- st8 [r15]=r16 // ar.lc
- st8 [r14]=r0 // __spare
- br.ret.sptk rp
- ;;
-}
-END(save_callee_saved)
-
-/*
- * restore_callee_saved(struct _callee_saved *)
- */
-ENTRY(restore_callee_saved, 1)
-{ .mmi
- ld8 r30=[r32],16 // nat (after)
- ;;
- mov ar.unat=r30
- add r31=-8,r32
- ;;
-}
-{ .mmb
- ld8.fill r4=[r31],16 // r4
- ld8.fill r5=[r32],16 // r5
- nop 0
- ;;
-}
-{ .mmb
- ld8.fill r6=[r31],16 // r6
- ld8.fill r7=[r32],16 // r7
- nop 0
- ;;
-}
-{ .mmi
- ld8 r30=[r31],16 // b1
- ld8 r29=[r32],16 // b2
- nop 0
- ;;
-}
-{ .mmi
- ld8 r28=[r31],16 // b3
- ld8 r27=[r32],16 // b4
- mov b1=r30
- ;;
-}
-{ .mii
- ld8 r26=[r31] // b5
- mov b2=r29
- mov b3=r28
- ;;
-}
-{ .mii
- ld8 r25=[r32] // lc
- mov b4=r27
- mov b5=r26
- ;;
-}
-{ .mib
- nop 0
- mov ar.lc=r25
- br.ret.sptk rp
- ;;
-}
-END(restore_callee_saved)
-
-/*
- * save_callee_saved_fp(struct _callee_saved_fp *)
- */
-ENTRY(save_callee_saved_fp, 1)
- add r31=16,r32
- stf.spill [r32]=f2,32
- ;;
- stf.spill [r31]=f3,32
- stf.spill [r32]=f4,32
- ;;
- stf.spill [r31]=f5,32
- stf.spill [r32]=f16,32
- ;;
- stf.spill [r31]=f17,32
- stf.spill [r32]=f18,32
- ;;
- stf.spill [r31]=f19,32
- stf.spill [r32]=f20,32
- ;;
- stf.spill [r31]=f21,32
- stf.spill [r32]=f22,32
- ;;
- stf.spill [r31]=f23,32
- stf.spill [r32]=f24,32
- ;;
- stf.spill [r31]=f25,32
- stf.spill [r32]=f26,32
- ;;
- stf.spill [r31]=f27,32
- stf.spill [r32]=f28,32
- ;;
- stf.spill [r31]=f29,32
- stf.spill [r32]=f30
- ;;
- stf.spill [r31]=f31
- br.ret.sptk rp
- ;;
-END(save_callee_saved_fp)
-
-/*
- * restore_callee_saved_fp(struct _callee_saved_fp *)
- */
-ENTRY(restore_callee_saved_fp, 1)
- add r31=16,r32
- ldf.fill f2=[r32],32
- ;;
- ldf.fill f3=[r31],32
- ldf.fill f4=[r32],32
- ;;
- ldf.fill f5=[r31],32
- ldf.fill f16=[r32],32
- ;;
- ldf.fill f17=[r31],32
- ldf.fill f18=[r32],32
- ;;
- ldf.fill f19=[r31],32
- ldf.fill f20=[r32],32
- ;;
- ldf.fill f21=[r31],32
- ldf.fill f22=[r32],32
- ;;
- ldf.fill f23=[r31],32
- ldf.fill f24=[r32],32
- ;;
- ldf.fill f25=[r31],32
- ldf.fill f26=[r32],32
- ;;
- ldf.fill f27=[r31],32
- ldf.fill f28=[r32],32
- ;;
- ldf.fill f29=[r31],32
- ldf.fill f30=[r32]
- ;;
- ldf.fill f31=[r31]
- br.ret.sptk rp
- ;;
-END(restore_callee_saved_fp)
-
-/*
- * save_high_fp(struct _high_fp *)
- */
-ENTRY(save_high_fp, 1)
- rsm psr.dfh
- ;;
- srlz.d
- add r31=16,r32
- stf.spill [r32]=f32,32
- ;;
- stf.spill [r31]=f33,32
- stf.spill [r32]=f34,32
- ;;
- stf.spill [r31]=f35,32
- stf.spill [r32]=f36,32
- ;;
- stf.spill [r31]=f37,32
- stf.spill [r32]=f38,32
- ;;
- stf.spill [r31]=f39,32
- stf.spill [r32]=f40,32
- ;;
- stf.spill [r31]=f41,32
- stf.spill [r32]=f42,32
- ;;
- stf.spill [r31]=f43,32
- stf.spill [r32]=f44,32
- ;;
- stf.spill [r31]=f45,32
- stf.spill [r32]=f46,32
- ;;
- stf.spill [r31]=f47,32
- stf.spill [r32]=f48,32
- ;;
- stf.spill [r31]=f49,32
- stf.spill [r32]=f50,32
- ;;
- stf.spill [r31]=f51,32
- stf.spill [r32]=f52,32
- ;;
- stf.spill [r31]=f53,32
- stf.spill [r32]=f54,32
- ;;
- stf.spill [r31]=f55,32
- stf.spill [r32]=f56,32
- ;;
- stf.spill [r31]=f57,32
- stf.spill [r32]=f58,32
- ;;
- stf.spill [r31]=f59,32
- stf.spill [r32]=f60,32
- ;;
- stf.spill [r31]=f61,32
- stf.spill [r32]=f62,32
- ;;
- stf.spill [r31]=f63,32
- stf.spill [r32]=f64,32
- ;;
- stf.spill [r31]=f65,32
- stf.spill [r32]=f66,32
- ;;
- stf.spill [r31]=f67,32
- stf.spill [r32]=f68,32
- ;;
- stf.spill [r31]=f69,32
- stf.spill [r32]=f70,32
- ;;
- stf.spill [r31]=f71,32
- stf.spill [r32]=f72,32
- ;;
- stf.spill [r31]=f73,32
- stf.spill [r32]=f74,32
- ;;
- stf.spill [r31]=f75,32
- stf.spill [r32]=f76,32
- ;;
- stf.spill [r31]=f77,32
- stf.spill [r32]=f78,32
- ;;
- stf.spill [r31]=f79,32
- stf.spill [r32]=f80,32
- ;;
- stf.spill [r31]=f81,32
- stf.spill [r32]=f82,32
- ;;
- stf.spill [r31]=f83,32
- stf.spill [r32]=f84,32
- ;;
- stf.spill [r31]=f85,32
- stf.spill [r32]=f86,32
- ;;
- stf.spill [r31]=f87,32
- stf.spill [r32]=f88,32
- ;;
- stf.spill [r31]=f89,32
- stf.spill [r32]=f90,32
- ;;
- stf.spill [r31]=f91,32
- stf.spill [r32]=f92,32
- ;;
- stf.spill [r31]=f93,32
- stf.spill [r32]=f94,32
- ;;
- stf.spill [r31]=f95,32
- stf.spill [r32]=f96,32
- ;;
- stf.spill [r31]=f97,32
- stf.spill [r32]=f98,32
- ;;
- stf.spill [r31]=f99,32
- stf.spill [r32]=f100,32
- ;;
- stf.spill [r31]=f101,32
- stf.spill [r32]=f102,32
- ;;
- stf.spill [r31]=f103,32
- stf.spill [r32]=f104,32
- ;;
- stf.spill [r31]=f105,32
- stf.spill [r32]=f106,32
- ;;
- stf.spill [r31]=f107,32
- stf.spill [r32]=f108,32
- ;;
- stf.spill [r31]=f109,32
- stf.spill [r32]=f110,32
- ;;
- stf.spill [r31]=f111,32
- stf.spill [r32]=f112,32
- ;;
- stf.spill [r31]=f113,32
- stf.spill [r32]=f114,32
- ;;
- stf.spill [r31]=f115,32
- stf.spill [r32]=f116,32
- ;;
- stf.spill [r31]=f117,32
- stf.spill [r32]=f118,32
- ;;
- stf.spill [r31]=f119,32
- stf.spill [r32]=f120,32
- ;;
- stf.spill [r31]=f121,32
- stf.spill [r32]=f122,32
- ;;
- stf.spill [r31]=f123,32
- stf.spill [r32]=f124,32
- ;;
- stf.spill [r31]=f125,32
- stf.spill [r32]=f126
- ;;
- stf.spill [r31]=f127
- ssm psr.dfh
- ;;
- srlz.d
- br.ret.sptk rp
- ;;
-END(save_high_fp)
-
-/*
- * restore_high_fp(struct _high_fp *)
- */
-ENTRY(restore_high_fp, 1)
- rsm psr.dfh
- ;;
- srlz.d
- add r31=16,r32
- ldf.fill f32=[r32],32
- ;;
- ldf.fill f33=[r31],32
- ldf.fill f34=[r32],32
- ;;
- ldf.fill f35=[r31],32
- ldf.fill f36=[r32],32
- ;;
- ldf.fill f37=[r31],32
- ldf.fill f38=[r32],32
- ;;
- ldf.fill f39=[r31],32
- ldf.fill f40=[r32],32
- ;;
- ldf.fill f41=[r31],32
- ldf.fill f42=[r32],32
- ;;
- ldf.fill f43=[r31],32
- ldf.fill f44=[r32],32
- ;;
- ldf.fill f45=[r31],32
- ldf.fill f46=[r32],32
- ;;
- ldf.fill f47=[r31],32
- ldf.fill f48=[r32],32
- ;;
- ldf.fill f49=[r31],32
- ldf.fill f50=[r32],32
- ;;
- ldf.fill f51=[r31],32
- ldf.fill f52=[r32],32
- ;;
- ldf.fill f53=[r31],32
- ldf.fill f54=[r32],32
- ;;
- ldf.fill f55=[r31],32
- ldf.fill f56=[r32],32
- ;;
- ldf.fill f57=[r31],32
- ldf.fill f58=[r32],32
- ;;
- ldf.fill f59=[r31],32
- ldf.fill f60=[r32],32
- ;;
- ldf.fill f61=[r31],32
- ldf.fill f62=[r32],32
- ;;
- ldf.fill f63=[r31],32
- ldf.fill f64=[r32],32
- ;;
- ldf.fill f65=[r31],32
- ldf.fill f66=[r32],32
- ;;
- ldf.fill f67=[r31],32
- ldf.fill f68=[r32],32
- ;;
- ldf.fill f69=[r31],32
- ldf.fill f70=[r32],32
- ;;
- ldf.fill f71=[r31],32
- ldf.fill f72=[r32],32
- ;;
- ldf.fill f73=[r31],32
- ldf.fill f74=[r32],32
- ;;
- ldf.fill f75=[r31],32
- ldf.fill f76=[r32],32
- ;;
- ldf.fill f77=[r31],32
- ldf.fill f78=[r32],32
- ;;
- ldf.fill f79=[r31],32
- ldf.fill f80=[r32],32
- ;;
- ldf.fill f81=[r31],32
- ldf.fill f82=[r32],32
- ;;
- ldf.fill f83=[r31],32
- ldf.fill f84=[r32],32
- ;;
- ldf.fill f85=[r31],32
- ldf.fill f86=[r32],32
- ;;
- ldf.fill f87=[r31],32
- ldf.fill f88=[r32],32
- ;;
- ldf.fill f89=[r31],32
- ldf.fill f90=[r32],32
- ;;
- ldf.fill f91=[r31],32
- ldf.fill f92=[r32],32
- ;;
- ldf.fill f93=[r31],32
- ldf.fill f94=[r32],32
- ;;
- ldf.fill f95=[r31],32
- ldf.fill f96=[r32],32
- ;;
- ldf.fill f97=[r31],32
- ldf.fill f98=[r32],32
- ;;
- ldf.fill f99=[r31],32
- ldf.fill f100=[r32],32
- ;;
- ldf.fill f101=[r31],32
- ldf.fill f102=[r32],32
- ;;
- ldf.fill f103=[r31],32
- ldf.fill f104=[r32],32
- ;;
- ldf.fill f105=[r31],32
- ldf.fill f106=[r32],32
- ;;
- ldf.fill f107=[r31],32
- ldf.fill f108=[r32],32
- ;;
- ldf.fill f109=[r31],32
- ldf.fill f110=[r32],32
- ;;
- ldf.fill f111=[r31],32
- ldf.fill f112=[r32],32
- ;;
- ldf.fill f113=[r31],32
- ldf.fill f114=[r32],32
- ;;
- ldf.fill f115=[r31],32
- ldf.fill f116=[r32],32
- ;;
- ldf.fill f117=[r31],32
- ldf.fill f118=[r32],32
- ;;
- ldf.fill f119=[r31],32
- ldf.fill f120=[r32],32
- ;;
- ldf.fill f121=[r31],32
- ldf.fill f122=[r32],32
- ;;
- ldf.fill f123=[r31],32
- ldf.fill f124=[r32],32
- ;;
- ldf.fill f125=[r31],32
- ldf.fill f126=[r32]
- ;;
- ldf.fill f127=[r31]
- ssm psr.dfh
- ;;
- srlz.d
- br.ret.sptk rp
- ;;
-END(restore_high_fp)
--- sys/ia64/ia64/autoconf.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/autoconf.c,v 1.23 2005/05/29 23:44:22 marcel Exp $
- */
-
-#include "opt_bootp.h"
-#include "opt_isa.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/reboot.h>
-#include <sys/kernel.h>
-#include <sys/mount.h>
-#include <sys/sysctl.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-
-#include <machine/md_var.h>
-#include <machine/bootinfo.h>
-
-#include <cam/cam.h>
-#include <cam/cam_ccb.h>
-#include <cam/cam_sim.h>
-#include <cam/cam_periph.h>
-#include <cam/cam_xpt_sim.h>
-#include <cam/cam_debug.h>
-
-static void configure_first(void *);
-static void configure(void *);
-static void configure_final(void *);
-
-SYSINIT(configure1, SI_SUB_CONFIGURE, SI_ORDER_FIRST, configure_first, NULL);
-/* SI_ORDER_SECOND is hookable */
-SYSINIT(configure2, SI_SUB_CONFIGURE, SI_ORDER_THIRD, configure, NULL);
-/* SI_ORDER_MIDDLE is hookable */
-SYSINIT(configure3, SI_SUB_CONFIGURE, SI_ORDER_ANY, configure_final, NULL);
-
-#ifdef BOOTP
-void bootpc_init(void);
-#endif
-
-#ifdef DEV_ISA
-#include <isa/isavar.h>
-device_t isa_bus_device = 0;
-#endif
-
-/*
- * Determine i/o configuration for a machine.
- */
-static void
-configure_first(void *dummy)
-{
-
- device_add_child(root_bus, "nexus", 0);
-}
-
-static void
-configure(void *dummy)
-{
-
- root_bus_configure();
-
- /*
- * Probe ISA devices after everything.
- */
-#ifdef DEV_ISA
- if (isa_bus_device)
- isa_probe_children(isa_bus_device);
-#endif
-}
-
-static void
-configure_final(void *dummy)
-{
-
- /*
- * Now we're ready to handle (pending) interrupts.
- * XXX this is slightly misplaced.
- */
- enable_intr();
-
- cninit_finish();
- cold = 0;
-}
--- sys/ia64/ia64/elf_machdep.c
+++ /dev/null
@@ -1,306 +0,0 @@
-/*-
- * Copyright 1996-1998 John D. Polstra.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/elf_machdep.c,v 1.19.8.3 2006/01/28 18:40:55 marcel Exp $
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/exec.h>
-#include <sys/imgact.h>
-#include <sys/malloc.h>
-#include <sys/proc.h>
-#include <sys/namei.h>
-#include <sys/fcntl.h>
-#include <sys/vnode.h>
-#include <sys/linker.h>
-#include <sys/sysent.h>
-#include <sys/imgact_elf.h>
-#include <sys/syscall.h>
-#include <sys/signalvar.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-
-#include <machine/elf.h>
-#include <machine/frame.h>
-#include <machine/md_var.h>
-#include <machine/unwind.h>
-
-Elf_Addr link_elf_get_gp(linker_file_t);
-
-extern Elf_Addr fptr_storage[];
-
-struct sysentvec elf64_freebsd_sysvec = {
- SYS_MAXSYSCALL,
- sysent,
- 0,
- 0,
- NULL,
- 0,
- NULL,
- NULL,
- __elfN(freebsd_fixup),
- sendsig,
- NULL, /* sigcode */
- NULL, /* &szsigcode */
- NULL,
- "FreeBSD ELF64",
- __elfN(coredump),
- NULL,
- MINSIGSTKSZ,
- PAGE_SIZE,
- VM_MIN_ADDRESS,
- VM_MAXUSER_ADDRESS,
- USRSTACK,
- PS_STRINGS,
- VM_PROT_READ|VM_PROT_WRITE,
- exec_copyout_strings,
- exec_setregs,
- NULL
-};
-
-static Elf64_Brandinfo freebsd_brand_info = {
- ELFOSABI_FREEBSD,
- EM_IA_64,
- "FreeBSD",
- NULL,
- "/libexec/ld-elf.so.1",
- &elf64_freebsd_sysvec,
- NULL,
-};
-SYSINIT(elf64, SI_SUB_EXEC, SI_ORDER_ANY,
- (sysinit_cfunc_t)elf64_insert_brand_entry, &freebsd_brand_info);
-
-static Elf64_Brandinfo freebsd_brand_oinfo = {
- ELFOSABI_FREEBSD,
- EM_IA_64,
- "FreeBSD",
- NULL,
- "/usr/libexec/ld-elf.so.1",
- &elf64_freebsd_sysvec,
- NULL,
-};
-SYSINIT(oelf64, SI_SUB_EXEC, SI_ORDER_ANY,
- (sysinit_cfunc_t)elf64_insert_brand_entry, &freebsd_brand_oinfo);
-
-
-void
-elf64_dump_thread(struct thread *td, void *dst, size_t *off __unused)
-{
-
- /* Flush the dirty registers onto the backingstore. */
- if (dst == NULL)
- ia64_flush_dirty(td, &td->td_frame->tf_special);
-}
-
-
-static Elf_Addr
-lookup_fdesc(linker_file_t lf, Elf_Size symidx, elf_lookup_fn lookup)
-{
- linker_file_t top;
- Elf_Addr addr;
- const char *symname;
- int i;
- static int eot = 0;
-
- addr = lookup(lf, symidx, 0);
- if (addr == 0) {
- top = lf;
- symname = elf_get_symname(top, symidx);
- for (i = 0; i < top->ndeps; i++) {
- lf = top->deps[i];
- addr = (Elf_Addr)linker_file_lookup_symbol(lf,
- symname, 0);
- if (addr != 0)
- break;
- }
- if (addr == 0)
- return (0);
- }
-
- if (eot)
- return (0);
-
- /*
- * Lookup and/or construct OPD
- */
- for (i = 0; i < 8192; i += 2) {
- if (fptr_storage[i] == addr)
- return (Elf_Addr)(fptr_storage + i);
-
- if (fptr_storage[i] == 0) {
- fptr_storage[i] = addr;
- fptr_storage[i+1] = link_elf_get_gp(lf);
- return (Elf_Addr)(fptr_storage + i);
- }
- }
-
- printf("%s: fptr table full\n", __func__);
- eot = 1;
-
- return (0);
-}
-
-/* Process one elf relocation with addend. */
-static int
-elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data,
- int type, int local, elf_lookup_fn lookup)
-{
- Elf_Addr *where;
- Elf_Addr addend, addr;
- Elf_Size rtype, symidx;
- const Elf_Rel *rel;
- const Elf_Rela *rela;
-
- switch (type) {
- case ELF_RELOC_REL:
- rel = (const Elf_Rel *)data;
- where = (Elf_Addr *)(relocbase + rel->r_offset);
- rtype = ELF_R_TYPE(rel->r_info);
- symidx = ELF_R_SYM(rel->r_info);
- switch (rtype) {
- case R_IA_64_DIR64LSB:
- case R_IA_64_FPTR64LSB:
- case R_IA_64_REL64LSB:
- addend = *where;
- break;
- default:
- addend = 0;
- break;
- }
- break;
- case ELF_RELOC_RELA:
- rela = (const Elf_Rela *)data;
- where = (Elf_Addr *)(relocbase + rela->r_offset);
- rtype = ELF_R_TYPE(rela->r_info);
- symidx = ELF_R_SYM(rela->r_info);
- addend = rela->r_addend;
- break;
- default:
- panic("%s: invalid ELF relocation (0x%x)\n", __func__, type);
- }
-
- if (local) {
- if (rtype == R_IA_64_REL64LSB)
- *where = relocbase + addend;
- return (0);
- }
-
- switch (rtype) {
- case R_IA_64_NONE:
- break;
- case R_IA_64_DIR64LSB: /* word64 LSB S + A */
- addr = lookup(lf, symidx, 1);
- if (addr == 0)
- return (-1);
- *where = addr + addend;
- break;
- case R_IA_64_FPTR64LSB: /* word64 LSB @fptr(S + A) */
- if (addend != 0) {
- printf("%s: addend ignored for OPD relocation\n",
- __func__);
- }
- addr = lookup_fdesc(lf, symidx, lookup);
- if (addr == 0)
- return (-1);
- *where = addr;
- break;
- case R_IA_64_REL64LSB: /* word64 LSB BD + A */
- break;
- case R_IA_64_IPLTLSB:
- addr = lookup_fdesc(lf, symidx, lookup);
- if (addr == 0)
- return (-1);
- where[0] = *((Elf_Addr*)addr) + addend;
- where[1] = *((Elf_Addr*)addr + 1);
- break;
- default:
- printf("%s: unknown relocation (0x%x)\n", __func__,
- (int)rtype);
- return -1;
- }
-
- return (0);
-}
-
-int
-elf_reloc(linker_file_t lf, Elf_Addr relocbase, const void *data, int type,
- elf_lookup_fn lookup)
-{
-
- return (elf_reloc_internal(lf, relocbase, data, type, 0, lookup));
-}
-
-int
-elf_reloc_local(linker_file_t lf, Elf_Addr relocbase, const void *data,
- int type, elf_lookup_fn lookup)
-{
-
- return (elf_reloc_internal(lf, relocbase, data, type, 1, lookup));
-}
-
-int
-elf_cpu_load_file(linker_file_t lf)
-{
- Elf_Ehdr *hdr;
- Elf_Phdr *ph, *phlim;
- Elf_Addr reloc, vaddr;
-
- hdr = (Elf_Ehdr *)(lf->address);
- if (!IS_ELF(*hdr)) {
- printf("Missing or corrupted ELF header at %p\n", hdr);
- return (EFTYPE);
- }
-
- /*
- * Iterate over the segments and register the unwind table if
- * we come across it.
- */
- ph = (Elf_Phdr *)(lf->address + hdr->e_phoff);
- phlim = ph + hdr->e_phnum;
- reloc = ~0ULL;
- while (ph < phlim) {
- if (ph->p_type == PT_LOAD && reloc == ~0ULL)
- reloc = (Elf_Addr)lf->address - ph->p_vaddr;
-
- if (ph->p_type == PT_IA_64_UNWIND) {
- vaddr = ph->p_vaddr + reloc;
- unw_table_add((vm_offset_t)lf->address, vaddr,
- vaddr + ph->p_memsz);
- }
- ++ph;
- }
-
- return (0);
-}
-
-int
-elf_cpu_unload_file(linker_file_t lf)
-{
-
- unw_table_remove((vm_offset_t)lf->address);
- return (0);
-}
--- sys/ia64/ia64/gdb_machdep.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/gdb_machdep.c,v 1.4 2005/01/06 22:18:22 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kdb.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/signal.h>
-
-#include <machine/gdb_machdep.h>
-#include <machine/md_var.h>
-#include <machine/pcb.h>
-#include <machine/reg.h>
-
-#include <gdb/gdb.h>
-#include <gdb/gdb_int.h>
-
-void *
-gdb_cpu_getreg(int regnum, size_t *regsz)
-{
- static uint64_t synth;
- uint64_t cfm;
-
- *regsz = gdb_cpu_regsz(regnum);
- switch (regnum) {
- /* Registers 0-127: general registers. */
- case 1: return (&kdb_thrctx->pcb_special.gp);
- case 4: return (&kdb_thrctx->pcb_preserved.gr4);
- case 5: return (&kdb_thrctx->pcb_preserved.gr5);
- case 6: return (&kdb_thrctx->pcb_preserved.gr6);
- case 7: return (&kdb_thrctx->pcb_preserved.gr7);
- case 12: return (&kdb_thrctx->pcb_special.sp);
- case 13: return (&kdb_thrctx->pcb_special.tp);
- /* Registers 128-255: floating-point registers. */
- case 130: return (&kdb_thrctx->pcb_preserved_fp.fr2);
- case 131: return (&kdb_thrctx->pcb_preserved_fp.fr3);
- case 132: return (&kdb_thrctx->pcb_preserved_fp.fr4);
- case 133: return (&kdb_thrctx->pcb_preserved_fp.fr5);
- case 144: return (&kdb_thrctx->pcb_preserved_fp.fr16);
- case 145: return (&kdb_thrctx->pcb_preserved_fp.fr17);
- case 146: return (&kdb_thrctx->pcb_preserved_fp.fr18);
- case 147: return (&kdb_thrctx->pcb_preserved_fp.fr19);
- case 148: return (&kdb_thrctx->pcb_preserved_fp.fr20);
- case 149: return (&kdb_thrctx->pcb_preserved_fp.fr21);
- case 150: return (&kdb_thrctx->pcb_preserved_fp.fr22);
- case 151: return (&kdb_thrctx->pcb_preserved_fp.fr23);
- case 152: return (&kdb_thrctx->pcb_preserved_fp.fr24);
- case 153: return (&kdb_thrctx->pcb_preserved_fp.fr25);
- case 154: return (&kdb_thrctx->pcb_preserved_fp.fr26);
- case 155: return (&kdb_thrctx->pcb_preserved_fp.fr27);
- case 156: return (&kdb_thrctx->pcb_preserved_fp.fr28);
- case 157: return (&kdb_thrctx->pcb_preserved_fp.fr29);
- case 158: return (&kdb_thrctx->pcb_preserved_fp.fr30);
- case 159: return (&kdb_thrctx->pcb_preserved_fp.fr31);
- /* Registers 320-327: branch registers. */
- case 320:
- if (kdb_thrctx->pcb_special.__spare == ~0UL)
- return (&kdb_thrctx->pcb_special.rp);
- break;
- case 321: return (&kdb_thrctx->pcb_preserved.br1);
- case 322: return (&kdb_thrctx->pcb_preserved.br2);
- case 323: return (&kdb_thrctx->pcb_preserved.br3);
- case 324: return (&kdb_thrctx->pcb_preserved.br4);
- case 325: return (&kdb_thrctx->pcb_preserved.br5);
- /* Registers 328-333: misc. other registers. */
- case 330: return (&kdb_thrctx->pcb_special.pr);
- case 331:
- if (kdb_thrctx->pcb_special.__spare == ~0UL) {
- synth = kdb_thrctx->pcb_special.iip;
- synth += (kdb_thrctx->pcb_special.psr >> 41) & 3;
- return (&synth);
- }
- return (&kdb_thrctx->pcb_special.rp);
- case 333:
- if (kdb_thrctx->pcb_special.__spare == ~0UL)
- return (&kdb_thrctx->pcb_special.cfm);
- return (&kdb_thrctx->pcb_special.pfs);
- /* Registers 334-461: application registers. */
- case 350: return (&kdb_thrctx->pcb_special.rsc);
- case 351: /* bsp */
- case 352: /* bspstore. */
- synth = kdb_thrctx->pcb_special.bspstore;
- if (kdb_thrctx->pcb_special.__spare == ~0UL) {
- synth += kdb_thrctx->pcb_special.ndirty;
- } else {
- cfm = kdb_thrctx->pcb_special.pfs;
- synth = ia64_bsp_adjust(synth,
- IA64_CFM_SOF(cfm) - IA64_CFM_SOL(cfm));
- }
- return (&synth);
- case 353: return (&kdb_thrctx->pcb_special.rnat);
- case 370: return (&kdb_thrctx->pcb_special.unat);
- case 374: return (&kdb_thrctx->pcb_special.fpsr);
- case 398:
- if (kdb_thrctx->pcb_special.__spare == ~0UL)
- return (&kdb_thrctx->pcb_special.pfs);
- break;
- case 399: return (&kdb_thrctx->pcb_preserved.lc);
- }
- return (NULL);
-}
-
-void
-gdb_cpu_setreg(int regnum, void *val)
-{
-
- switch (regnum) {
- case GDB_REG_PC: break;
- }
-}
-
-int
-gdb_cpu_signal(int vector, int dummy __unused)
-{
-
- if (vector == IA64_VEC_BREAK || vector == IA64_VEC_SINGLE_STEP_TRAP)
- return (SIGTRAP);
- /* Add 100 so GDB won't translate the vector into signal names. */
- return (vector + 100);
-}
-
-int
-gdb_cpu_query(void)
-{
-#if 0
- uint64_t bspstore, *kstack;
-#endif
- uintmax_t slot;
-
- if (!gdb_rx_equal("Part:dirty:read::"))
- return (0);
-
- if (gdb_rx_varhex(&slot) < 0) {
- gdb_tx_err(EINVAL);
- return (-1);
- }
-
- gdb_tx_err(EINVAL);
- return (-1);
-
-#if 0
- /* slot is unsigned. No need to test for negative values. */
- if (slot >= (kdb_frame->tf_special.ndirty >> 3)) {
- return (-1);
- }
-
- /*
- * If the trapframe describes a kernel entry, bspstore holds
- * the address of the user backing store. Calculate the right
- * kernel stack address. See also ptrace_machdep().
- */
- bspstore = kdb_frame->tf_special.bspstore;
- kstack = (bspstore >= IA64_RR_BASE(5)) ? (uint64_t*)bspstore :
- (uint64_t*)(kdb_thread->td_kstack + (bspstore & 0x1ffUL));
- gdb_tx_begin('\0');
- gdb_tx_mem((void*)(kstack + slot), 8);
- gdb_tx_end();
- return (1);
-#endif
-}
--- sys/ia64/ia64/pal.S
+++ /dev/null
@@ -1,223 +0,0 @@
-/*-
- * Copyright (c) 2000-2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/pal.S,v 1.8 2003/07/02 12:57:07 ru Exp $
- */
-
-#include <machine/asm.h>
-
- .data
- .global ia64_pal_entry
-ia64_pal_entry: .quad 0
- .text
-
-/*
- * struct ia64_pal_result ia64_call_pal_static(u_int64_t proc,
- * u_int64_t arg1, u_int64_t arg2, u_int64_t arg3)
- */
-ENTRY(ia64_call_pal_static, 4)
-
- .regstk 4,5,0,0
-palret = loc0
-entry = loc1
-rpsave = loc2
-pfssave = loc3
-psrsave = loc4
-
- alloc pfssave=ar.pfs,4,5,0,0
- ;;
- mov rpsave=rp
-
- movl entry=@gprel(ia64_pal_entry)
-1: mov palret=ip // for return address
- ;;
- add entry=entry,gp
- mov psrsave=psr
- mov r28=in0 // procedure number
- ;;
- ld8 entry=[entry] // read entry point
- mov r29=in1 // copy arguments
- mov r30=in2
- mov r31=in3
- ;;
- mov b6=entry
- add palret=2f-1b,palret // calculate return address
- ;;
- mov b0=palret
- rsm psr.i // disable interrupts
- ;;
- br.cond.sptk b6 // call into firmware
-2: mov psr.l=psrsave
- mov rp=rpsave
- mov ar.pfs=pfssave
- ;;
- srlz.d
- br.ret.sptk rp
-
-END(ia64_call_pal_static)
-
-#ifdef _KERNEL
-
-/*
- * struct ia64_pal_result ia64_call_pal_static_physical(u_int64_t proc,
- * u_int64_t arg1, u_int64_t arg2, u_int64_t arg3)
- */
-ENTRY(ia64_call_pal_static_physical, 4)
-
- .regstk 4,5,0,0
-palret = loc0
-entry = loc1
-rpsave = loc2
-pfssave = loc3
-psrsave = loc4
-
- alloc pfssave=ar.pfs,4,5,0,0
- ;;
- mov rpsave=rp
-
- movl entry=@gprel(ia64_pal_entry)
-1: mov palret=ip // for return address
- ;;
- add entry=entry,gp
- mov r28=in0 // procedure number
- ;;
- ld8 entry=[entry] // read entry point
- mov r29=in1 // copy arguments
- mov r30=in2
- mov r31=in3
- ;;
- dep entry=0,entry,61,3 // physical address
- dep palret=0,palret,61,3 // physical address
- br.call.sptk.many rp=ia64_physical_mode
- mov psrsave=ret0
- ;;
- mov b6=entry
- add palret=2f-1b,palret // calculate return address
- ;;
- mov b0=palret
- br.cond.sptk b6 // call into firmware
- ;;
-2: mov r14=psrsave
- ;;
- br.call.sptk.many rp=ia64_change_mode
- ;;
- mov rp=rpsave
- mov ar.pfs=pfssave
- ;;
- br.ret.sptk rp
-
-END(ia64_call_pal_static_physical)
-
-#endif
-
-/*
- * struct ia64_pal_result ia64_call_pal_stacked(u_int64_t proc,
- * u_int64_t arg1, u_int64_t arg2, u_int64_t arg3)
- */
-ENTRY(ia64_call_pal_stacked, 4)
-
- .regstk 4,4,4,0
-entry = loc0
-rpsave = loc1
-pfssave = loc2
-psrsave = loc3
-
- alloc pfssave=ar.pfs,4,4,4,0
- ;;
- mov rpsave=rp
- movl entry=@gprel(ia64_pal_entry)
- ;;
- add entry=entry,gp
- mov psrsave=psr
- mov r28=in0 // procedure number
- mov out0=in0
- ;;
- ld8 entry=[entry] // read entry point
- mov out1=in1 // copy arguments
- mov out2=in2
- mov out3=in3
- ;;
- mov b6=entry
- ;;
- rsm psr.i // disable interrupts
- ;;
- br.call.sptk.many rp=b6 // call into firmware
- mov psr.l=psrsave
- mov rp=rpsave
- mov ar.pfs=pfssave
- ;;
- srlz.d
- br.ret.sptk rp
-
-END(ia64_call_pal_stacked)
-
-#ifdef _KERNEL
-
-/*
- * struct ia64_pal_result ia64_call_pal_stacked_physical(u_int64_t proc,
- * u_int64_t arg1, u_int64_t arg2, u_int64_t arg3)
- */
-ENTRY(ia64_call_pal_stacked_physical, 4)
-
- .regstk 4,4,4,0
-entry = loc0
-rpsave = loc1
-pfssave = loc2
-psrsave = loc3
-
- alloc pfssave=ar.pfs,4,4,4,0
- ;;
- mov rpsave=rp
- movl entry=@gprel(ia64_pal_entry)
- ;;
- add entry=entry,gp
- mov r28=in0 // procedure number
- mov out0=in0
- ;;
- ld8 entry=[entry] // read entry point
- mov out1=in1 // copy arguments
- mov out2=in2
- mov out3=in3
- ;;
- dep entry=0,entry,61,3 // physical address
- br.call.sptk.many rp=ia64_physical_mode
- mov psrsave=ret0
- ;;
- mov b6=entry
- ;;
- br.call.sptk.many rp=b6 // call into firmware
- ;;
- mov r14=psrsave
- ;;
- br.call.sptk.many rp=ia64_change_mode
- ;;
- mov rp=rpsave
- mov ar.pfs=pfssave
- ;;
- br.ret.sptk rp
-
-END(ia64_call_pal_stacked_physical)
-
-#endif
--- sys/ia64/ia64/mem.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*-
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department, and code derived from software contributed to
- * Berkeley by William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: Utah $Hdr: mem.c 1.13 89/10/08$
- * from: @(#)mem.c 7.2 (Berkeley) 5/9/91
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/mem.c,v 1.21 2004/08/02 18:37:55 marcel Exp $");
-
-/*
- * Memory special file
- */
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/fcntl.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/memrange.h>
-#include <sys/module.h>
-#include <sys/msgbuf.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/signalvar.h>
-#include <sys/systm.h>
-#include <sys/uio.h>
-
-#include <machine/cpu.h>
-#include <machine/frame.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/memdev.h>
-
-struct mem_range_softc mem_range_softc;
-
-static __inline int
-ia64_pa_access(vm_offset_t pa)
-{
- return (VM_PROT_READ|VM_PROT_WRITE);
-}
-
-/* ARGSUSED */
-int
-memrw(struct cdev *dev, struct uio *uio, int flags)
-{
- struct iovec *iov;
- vm_offset_t addr, eaddr, o, v;
- int c, error, rw;
-
- error = 0;
- while (uio->uio_resid > 0 && !error) {
- iov = uio->uio_iov;
- if (iov->iov_len == 0) {
- uio->uio_iov++;
- uio->uio_iovcnt--;
- if (uio->uio_iovcnt < 0)
- panic("memrw");
- continue;
- }
-
- if (minor(dev) == CDEV_MINOR_MEM) {
- v = uio->uio_offset;
-kmemphys:
- /* Allow reads only in RAM. */
- rw = (uio->uio_rw == UIO_READ)
- ? VM_PROT_READ : VM_PROT_WRITE;
- if ((ia64_pa_access(v) & rw) != rw) {
- error = EFAULT;
- c = 0;
- break;
- }
-
- o = uio->uio_offset & PAGE_MASK;
- c = min(uio->uio_resid, (int)(PAGE_SIZE - o));
- error = uiomove((caddr_t)IA64_PHYS_TO_RR7(v), c, uio);
- continue;
- }
- else if (minor(dev) == CDEV_MINOR_KMEM) {
- v = uio->uio_offset;
-
- if (v >= IA64_RR_BASE(6)) {
- v = IA64_RR_MASK(v);
- goto kmemphys;
- }
-
- c = min(iov->iov_len, MAXPHYS);
-
- /*
- * Make sure that all of the pages are currently
- * resident so that we don't create any zero-fill
- * pages.
- */
- addr = trunc_page(v);
- eaddr = round_page(v + c);
- for (; addr < eaddr; addr += PAGE_SIZE) {
- if (pmap_extract(kernel_pmap, addr) == 0)
- return (EFAULT);
- }
- if (!kernacc((caddr_t)v, c, (uio->uio_rw == UIO_READ)
- ? VM_PROT_READ : VM_PROT_WRITE))
- return (EFAULT);
- error = uiomove((caddr_t)v, c, uio);
- continue;
- }
- /* else panic! */
- }
- return (error);
-}
-
-/*
- * allow user processes to MMAP some memory sections
- * instead of going through read/write
- */
-int
-memmmap(struct cdev *dev, vm_offset_t offset, vm_paddr_t *paddr, int prot)
-{
- /*
- * /dev/mem is the only one that makes sense through this
- * interface. For /dev/kmem any physaddr we return here
- * could be transient and hence incorrect or invalid at
- * a later time.
- */
- if (minor(dev) != CDEV_MINOR_MEM)
- return (-1);
-
- /*
- * Allow access only in RAM.
- */
- if ((prot & ia64_pa_access(atop((vm_offset_t)offset))) != prot)
- return (-1);
- *paddr = IA64_PHYS_TO_RR7(offset);
- return (0);
-}
-
-void
-dev_mem_md_init(void)
-{
-}
--- sys/ia64/ia64/busdma_machdep.c
+++ /dev/null
@@ -1,974 +0,0 @@
-/*-
- * Copyright (c) 1997 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/busdma_machdep.c,v 1.39 2005/03/07 02:18:52 scottl Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/mbuf.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/proc.h>
-#include <sys/uio.h>
-#include <sys/sysctl.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-
-#include <machine/atomic.h>
-#include <machine/bus.h>
-#include <machine/md_var.h>
-
-#define MAX_BPAGES 256
-
-struct bus_dma_tag {
- bus_dma_tag_t parent;
- bus_size_t alignment;
- bus_size_t boundary;
- bus_addr_t lowaddr;
- bus_addr_t highaddr;
- bus_dma_filter_t *filter;
- void *filterarg;
- bus_size_t maxsize;
- u_int nsegments;
- bus_size_t maxsegsz;
- int flags;
- int ref_count;
- int map_count;
- bus_dma_lock_t *lockfunc;
- void *lockfuncarg;
- bus_dma_segment_t *segments;
-};
-
-struct bounce_page {
- vm_offset_t vaddr; /* kva of bounce buffer */
- bus_addr_t busaddr; /* Physical address */
- vm_offset_t datavaddr; /* kva of client data */
- bus_size_t datacount; /* client data count */
- STAILQ_ENTRY(bounce_page) links;
-};
-
-int busdma_swi_pending;
-
-static struct mtx bounce_lock;
-static STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
-static int free_bpages;
-static int reserved_bpages;
-static int active_bpages;
-static int total_bpages;
-static int total_bounced;
-static int total_deferred;
-
-SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
-SYSCTL_INT(_hw_busdma, OID_AUTO, free_bpages, CTLFLAG_RD, &free_bpages, 0,
- "Free bounce pages");
-SYSCTL_INT(_hw_busdma, OID_AUTO, reserved_bpages, CTLFLAG_RD, &reserved_bpages,
- 0, "Reserved bounce pages");
-SYSCTL_INT(_hw_busdma, OID_AUTO, active_bpages, CTLFLAG_RD, &active_bpages, 0,
- "Active bounce pages");
-SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
- "Total bounce pages");
-SYSCTL_INT(_hw_busdma, OID_AUTO, total_bounced, CTLFLAG_RD, &total_bounced, 0,
- "Total bounce requests");
-SYSCTL_INT(_hw_busdma, OID_AUTO, total_deferred, CTLFLAG_RD, &total_deferred, 0,
- "Total bounce requests that were deferred");
-
-struct bus_dmamap {
- struct bp_list bpages;
- int pagesneeded;
- int pagesreserved;
- bus_dma_tag_t dmat;
- void *buf; /* unmapped buffer pointer */
- bus_size_t buflen; /* unmapped buffer length */
- bus_dmamap_callback_t *callback;
- void *callback_arg;
- STAILQ_ENTRY(bus_dmamap) links;
-};
-
-static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
-static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
-static struct bus_dmamap nobounce_dmamap;
-
-static void init_bounce_pages(void *dummy);
-static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
-static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
- int commit);
-static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
- vm_offset_t vaddr, bus_size_t size);
-static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
-static __inline int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr,
- bus_size_t len);
-
-/*
- * Return true if a match is made.
- *
- * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
- *
- * If paddr is within the bounds of the dma tag then call the filter callback
- * to check for a match, if there is no filter callback then assume a match.
- */
-static __inline int
-run_filter(bus_dma_tag_t dmat, bus_addr_t paddr, bus_size_t len)
-{
- bus_size_t bndy;
- int retval;
-
- retval = 0;
- bndy = dmat->boundary;
-
- do {
- if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
- || ((paddr & (dmat->alignment - 1)) != 0)
- || ((paddr & bndy) != ((paddr + len) & bndy)))
- && (dmat->filter == NULL
- || (*dmat->filter)(dmat->filterarg, paddr) != 0))
- retval = 1;
-
- dmat = dmat->parent;
- } while (retval == 0 && dmat != NULL);
- return (retval);
-}
-
-/*
- * Convenience function for manipulating driver locks from busdma (during
- * busdma_swi, for example). Drivers that don't provide their own locks
- * should specify &Giant to dmat->lockfuncarg. Drivers that use their own
- * non-mutex locking scheme don't have to use this at all.
- */
-void
-busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
-{
- struct mtx *dmtx;
-
- dmtx = (struct mtx *)arg;
- switch (op) {
- case BUS_DMA_LOCK:
- mtx_lock(dmtx);
- break;
- case BUS_DMA_UNLOCK:
- mtx_unlock(dmtx);
- break;
- default:
- panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
- }
-}
-
-/*
- * dflt_lock should never get called. It gets put into the dma tag when
- * lockfunc == NULL, which is only valid if the maps that are associated
- * with the tag are meant to never be defered.
- * XXX Should have a way to identify which driver is responsible here.
- */
-static void
-dflt_lock(void *arg, bus_dma_lock_op_t op)
-{
- panic("driver error: busdma dflt_lock called");
-}
-
-#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4
-/*
- * Allocate a device specific dma_tag.
- */
-int
-bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
- bus_size_t boundary, bus_addr_t lowaddr,
- bus_addr_t highaddr, bus_dma_filter_t *filter,
- void *filterarg, bus_size_t maxsize, int nsegments,
- bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
- void *lockfuncarg, bus_dma_tag_t *dmat)
-{
- bus_dma_tag_t newtag;
- int error = 0;
-
- /* Basic sanity checking */
- if (boundary != 0 && boundary < maxsegsz)
- maxsegsz = boundary;
-
- /* Return a NULL tag on failure */
- *dmat = NULL;
-
- newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
- if (newtag == NULL)
- return (ENOMEM);
-
- newtag->parent = parent;
- newtag->alignment = alignment;
- newtag->boundary = boundary;
- newtag->lowaddr = trunc_page(lowaddr) + (PAGE_SIZE - 1);
- newtag->highaddr = trunc_page(highaddr) + (PAGE_SIZE - 1);
- newtag->filter = filter;
- newtag->filterarg = filterarg;
- newtag->maxsize = maxsize;
- newtag->nsegments = nsegments;
- newtag->maxsegsz = maxsegsz;
- newtag->flags = flags;
- newtag->ref_count = 1; /* Count ourself */
- newtag->map_count = 0;
- if (lockfunc != NULL) {
- newtag->lockfunc = lockfunc;
- newtag->lockfuncarg = lockfuncarg;
- } else {
- newtag->lockfunc = dflt_lock;
- newtag->lockfuncarg = NULL;
- }
- newtag->segments = NULL;
-
- /* Take into account any restrictions imposed by our parent tag */
- if (parent != NULL) {
- newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr);
- newtag->highaddr = MAX(parent->highaddr, newtag->highaddr);
- if (newtag->boundary == 0)
- newtag->boundary = parent->boundary;
- else if (parent->boundary != 0)
- newtag->boundary = MIN(parent->boundary,
- newtag->boundary);
- if (newtag->filter == NULL) {
- /*
- * Short circuit looking at our parent directly
- * since we have encapsulated all of its information
- */
- newtag->filter = parent->filter;
- newtag->filterarg = parent->filterarg;
- newtag->parent = parent->parent;
- }
- if (newtag->parent != NULL)
- atomic_add_int(&parent->ref_count, 1);
- }
-
- if (newtag->lowaddr < ptoa(Maxmem) && (flags & BUS_DMA_ALLOCNOW) != 0) {
- /* Must bounce */
-
- if (ptoa(total_bpages) < maxsize) {
- int pages;
-
- pages = atop(maxsize) - total_bpages;
-
- /* Add pages to our bounce pool */
- if (alloc_bounce_pages(newtag, pages) < pages)
- error = ENOMEM;
- }
- /* Performed initial allocation */
- newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
- }
-
- if (error != 0) {
- free(newtag, M_DEVBUF);
- } else {
- *dmat = newtag;
- }
- return (error);
-}
-
-int
-bus_dma_tag_destroy(bus_dma_tag_t dmat)
-{
- if (dmat != NULL) {
-
- if (dmat->map_count != 0)
- return (EBUSY);
-
- while (dmat != NULL) {
- bus_dma_tag_t parent;
-
- parent = dmat->parent;
- atomic_subtract_int(&dmat->ref_count, 1);
- if (dmat->ref_count == 0) {
- if (dmat->segments != NULL)
- free(dmat->segments, M_DEVBUF);
- free(dmat, M_DEVBUF);
- /*
- * Last reference count, so
- * release our reference
- * count on our parent.
- */
- dmat = parent;
- } else
- dmat = NULL;
- }
- }
- return (0);
-}
-
-/*
- * Allocate a handle for mapping from kva/uva/physical
- * address space into bus device space.
- */
-int
-bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
-{
- int error;
-
- error = 0;
-
- if (dmat->segments == NULL) {
- dmat->segments = (bus_dma_segment_t *)malloc(
- sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF,
- M_NOWAIT);
- if (dmat->segments == NULL)
- return (ENOMEM);
- }
-
- /*
- * Bouncing might be required if the driver asks for an active
- * exclusion region, a data alignment that is stricter than 1, and/or
- * an active address boundary.
- */
- if (dmat->lowaddr < ptoa(Maxmem)) {
- /* Must bounce */
- int maxpages;
-
- *mapp = (bus_dmamap_t)malloc(sizeof(**mapp), M_DEVBUF,
- M_NOWAIT | M_ZERO);
- if (*mapp == NULL)
- return (ENOMEM);
-
- /* Initialize the new map */
- STAILQ_INIT(&((*mapp)->bpages));
-
- /*
- * Attempt to add pages to our pool on a per-instance
- * basis up to a sane limit.
- */
- maxpages = MIN(MAX_BPAGES, Maxmem - atop(dmat->lowaddr));
- if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
- || (dmat->map_count > 0 && total_bpages < maxpages)) {
- int pages;
-
- pages = MAX(atop(dmat->maxsize), 1);
- pages = MIN(maxpages - total_bpages, pages);
- if (alloc_bounce_pages(dmat, pages) < pages)
- error = ENOMEM;
-
- if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
- if (error == 0)
- dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
- } else {
- error = 0;
- }
- }
- } else {
- *mapp = NULL;
- }
- if (error == 0)
- dmat->map_count++;
- return (error);
-}
-
-/*
- * Destroy a handle for mapping from kva/uva/physical
- * address space into bus device space.
- */
-int
-bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
-{
-
- if (map != NULL && map != &nobounce_dmamap) {
- if (STAILQ_FIRST(&map->bpages) != NULL)
- return (EBUSY);
- free(map, M_DEVBUF);
- }
- dmat->map_count--;
- return (0);
-}
-
-
-/*
- * Allocate a piece of memory that can be efficiently mapped into
- * bus device space based on the constraints lited in the dma tag.
- * A dmamap to for use with dmamap_load is also allocated.
- */
-int
-bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
- bus_dmamap_t *mapp)
-{
- int mflags;
-
- if (flags & BUS_DMA_NOWAIT)
- mflags = M_NOWAIT;
- else
- mflags = M_WAITOK;
- if (flags & BUS_DMA_ZERO)
- mflags |= M_ZERO;
-
- /* If we succeed, no mapping/bouncing will be required */
- *mapp = NULL;
-
- if (dmat->segments == NULL) {
- dmat->segments = (bus_dma_segment_t *)malloc(
- sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF,
- M_NOWAIT);
- if (dmat->segments == NULL)
- return (ENOMEM);
- }
-
- if ((dmat->maxsize <= PAGE_SIZE) && dmat->lowaddr >= ptoa(Maxmem)) {
- *vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags);
- } else {
- /*
- * XXX Use Contigmalloc until it is merged into this facility
- * and handles multi-seg allocations. Nobody is doing
- * multi-seg allocations yet though.
- * XXX Certain AGP hardware does.
- */
- *vaddr = contigmalloc(dmat->maxsize, M_DEVBUF, mflags,
- 0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul,
- dmat->boundary);
- }
- if (*vaddr == NULL)
- return (ENOMEM);
- return (0);
-}
-
-/*
- * Free a piece of memory and it's allociated dmamap, that was allocated
- * via bus_dmamem_alloc. Make the same choice for free/contigfree.
- */
-void
-bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
-{
- /*
- * dmamem does not need to be bounced, so the map should be
- * NULL
- */
- if (map != NULL)
- panic("bus_dmamem_free: Invalid map freed\n");
- if ((dmat->maxsize <= PAGE_SIZE) && dmat->lowaddr >= ptoa(Maxmem))
- free(vaddr, M_DEVBUF);
- else {
- contigfree(vaddr, dmat->maxsize, M_DEVBUF);
- }
-}
-
-/*
- * Utility function to load a linear buffer. lastaddrp holds state
- * between invocations (for multiple-buffer loads). segp contains
- * the starting segment on entrace, and the ending segment on exit.
- * first indicates if this is the first invocation of this function.
- */
-static int
-_bus_dmamap_load_buffer(bus_dma_tag_t dmat,
- bus_dmamap_t map,
- void *buf, bus_size_t buflen,
- struct thread *td,
- int flags,
- bus_addr_t *lastaddrp,
- bus_dma_segment_t *segs,
- int *segp,
- int first)
-{
- bus_size_t sgsize;
- bus_addr_t curaddr, lastaddr, baddr, bmask;
- vm_offset_t vaddr;
- bus_addr_t paddr;
- int needbounce = 0;
- int seg;
- pmap_t pmap;
-
- if (map == NULL)
- map = &nobounce_dmamap;
-
- if (td != NULL)
- pmap = vmspace_pmap(td->td_proc->p_vmspace);
- else
- pmap = NULL;
-
- if ((dmat->lowaddr < ptoa(Maxmem) || dmat->boundary > 0 ||
- dmat->alignment > 1) && map != &nobounce_dmamap &&
- map->pagesneeded == 0) {
- vm_offset_t vendaddr;
-
- /*
- * Count the number of bounce pages
- * needed in order to complete this transfer
- */
- vaddr = trunc_page((vm_offset_t)buf);
- vendaddr = (vm_offset_t)buf + buflen;
-
- while (vaddr < vendaddr) {
- paddr = pmap_kextract(vaddr);
- if (run_filter(dmat, paddr, 0) != 0) {
- needbounce = 1;
- map->pagesneeded++;
- }
- vaddr += PAGE_SIZE;
- }
- }
-
- vaddr = (vm_offset_t)buf;
-
- /* Reserve Necessary Bounce Pages */
- if (map->pagesneeded != 0) {
- mtx_lock(&bounce_lock);
- if (flags & BUS_DMA_NOWAIT) {
- if (reserve_bounce_pages(dmat, map, 0) != 0) {
- mtx_unlock(&bounce_lock);
- return (ENOMEM);
- }
- } else {
- if (reserve_bounce_pages(dmat, map, 1) != 0) {
- /* Queue us for resources */
- map->dmat = dmat;
- map->buf = buf;
- map->buflen = buflen;
- STAILQ_INSERT_TAIL(&bounce_map_waitinglist,
- map, links);
- mtx_unlock(&bounce_lock);
- return (EINPROGRESS);
- }
- }
- mtx_unlock(&bounce_lock);
- }
-
- lastaddr = *lastaddrp;
- bmask = ~(dmat->boundary - 1);
-
- for (seg = *segp; buflen > 0 ; ) {
- /*
- * Get the physical address for this segment.
- */
- if (pmap)
- curaddr = pmap_extract(pmap, vaddr);
- else
- curaddr = pmap_kextract(vaddr);
-
- /*
- * Compute the segment size, and adjust counts.
- */
- sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
- if (buflen < sgsize)
- sgsize = buflen;
-
- /*
- * Make sure we don't cross any boundaries.
- */
- if (dmat->boundary > 0) {
- baddr = (curaddr + dmat->boundary) & bmask;
- if (sgsize > (baddr - curaddr))
- sgsize = (baddr - curaddr);
- }
-
- if (map->pagesneeded != 0 && run_filter(dmat, curaddr, sgsize))
- curaddr = add_bounce_page(dmat, map, vaddr, sgsize);
-
- /*
- * Insert chunk into a segment, coalescing with
- * previous segment if possible.
- */
- if (first) {
- segs[seg].ds_addr = curaddr;
- segs[seg].ds_len = sgsize;
- first = 0;
- } else {
- if (!needbounce && curaddr == lastaddr &&
- (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
- (dmat->boundary == 0 ||
- (segs[seg].ds_addr & bmask) == (curaddr & bmask)))
- segs[seg].ds_len += sgsize;
- else {
- if (++seg >= dmat->nsegments)
- break;
- segs[seg].ds_addr = curaddr;
- segs[seg].ds_len = sgsize;
- }
- }
-
- lastaddr = curaddr + sgsize;
- vaddr += sgsize;
- buflen -= sgsize;
- }
-
- *segp = seg;
- *lastaddrp = lastaddr;
-
- /*
- * Did we fit?
- */
- return (buflen != 0 ? EFBIG : 0); /* XXX better return value here? */
-}
-
-/*
- * Map the buffer buf into bus space using the dmamap map.
- */
-int
-bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
- bus_size_t buflen, bus_dmamap_callback_t *callback,
- void *callback_arg, int flags)
-{
- bus_addr_t lastaddr = 0;
- int error, nsegs = 0;
-
- if (map != NULL) {
- flags |= BUS_DMA_WAITOK;
- map->callback = callback;
- map->callback_arg = callback_arg;
- }
-
- error = _bus_dmamap_load_buffer(dmat, map, buf, buflen, NULL, flags,
- &lastaddr, dmat->segments, &nsegs, 1);
-
- if (error == EINPROGRESS)
- return (error);
-
- if (error)
- (*callback)(callback_arg, dmat->segments, 0, error);
- else
- (*callback)(callback_arg, dmat->segments, nsegs + 1, 0);
-
- return (0);
-}
-
-/*
- * Like _bus_dmamap_load(), but for mbufs.
- */
-int
-bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map,
- struct mbuf *m0,
- bus_dmamap_callback2_t *callback, void *callback_arg,
- int flags)
-{
- int nsegs, error;
-
- M_ASSERTPKTHDR(m0);
-
- flags |= BUS_DMA_NOWAIT;
- nsegs = 0;
- error = 0;
- if (m0->m_pkthdr.len <= dmat->maxsize) {
- int first = 1;
- bus_addr_t lastaddr = 0;
- struct mbuf *m;
-
- for (m = m0; m != NULL && error == 0; m = m->m_next) {
- if (m->m_len > 0) {
- error = _bus_dmamap_load_buffer(dmat, map,
- m->m_data, m->m_len,
- NULL, flags, &lastaddr,
- dmat->segments, &nsegs, first);
- first = 0;
- }
- }
- } else {
- error = EINVAL;
- }
-
- if (error) {
- /* force "no valid mappings" in callback */
- (*callback)(callback_arg, dmat->segments, 0, 0, error);
- } else {
- (*callback)(callback_arg, dmat->segments, nsegs + 1,
- m0->m_pkthdr.len, error);
- }
- return (error);
-}
-
-int
-bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map,
- struct mbuf *m0, bus_dma_segment_t *segs,
- int *nsegs, int flags)
-{
- int error;
-
- M_ASSERTPKTHDR(m0);
-
- flags |= BUS_DMA_NOWAIT;
- *nsegs = 0;
- error = 0;
- if (m0->m_pkthdr.len <= dmat->maxsize) {
- int first = 1;
- bus_addr_t lastaddr = 0;
- struct mbuf *m;
-
- for (m = m0; m != NULL && error == 0; m = m->m_next) {
- if (m->m_len > 0) {
- error = _bus_dmamap_load_buffer(dmat, map,
- m->m_data, m->m_len,
- NULL, flags, &lastaddr,
- segs, nsegs, first);
- first = 0;
- }
- }
- ++*nsegs;
- } else {
- error = EINVAL;
- }
-
- return (error);
-}
-
-/*
- * Like _bus_dmamap_load(), but for uios.
- */
-int
-bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map,
- struct uio *uio,
- bus_dmamap_callback2_t *callback, void *callback_arg,
- int flags)
-{
- bus_addr_t lastaddr;
- int nsegs, error, first, i;
- bus_size_t resid;
- struct iovec *iov;
- struct thread *td = NULL;
-
- flags |= BUS_DMA_NOWAIT;
- resid = uio->uio_resid;
- iov = uio->uio_iov;
-
- if (uio->uio_segflg == UIO_USERSPACE) {
- td = uio->uio_td;
- KASSERT(td != NULL,
- ("bus_dmamap_load_uio: USERSPACE but no proc"));
- }
-
- nsegs = 0;
- error = 0;
- first = 1;
- for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) {
- /*
- * Now at the first iovec to load. Load each iovec
- * until we have exhausted the residual count.
- */
- bus_size_t minlen =
- resid < iov[i].iov_len ? resid : iov[i].iov_len;
- caddr_t addr = (caddr_t) iov[i].iov_base;
-
- if (minlen > 0) {
- error = _bus_dmamap_load_buffer(dmat, map, addr,
- minlen, td, flags, &lastaddr, dmat->segments,
- &nsegs, first);
- first = 0;
-
- resid -= minlen;
- }
- }
-
- if (error) {
- /* force "no valid mappings" in callback */
- (*callback)(callback_arg, dmat->segments, 0, 0, error);
- } else {
- (*callback)(callback_arg, dmat->segments, nsegs + 1,
- uio->uio_resid, error);
- }
- return (error);
-}
-
-/*
- * Release the mapping held by map.
- */
-void
-_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
-{
- struct bounce_page *bpage;
-
- while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
- STAILQ_REMOVE_HEAD(&map->bpages, links);
- free_bounce_page(dmat, bpage);
- }
-}
-
-void
-_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
-{
- struct bounce_page *bpage;
-
- if ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
- /*
- * Handle data bouncing. We might also
- * want to add support for invalidating
- * the caches on broken hardware
- */
- total_bounced++;
-
- if (op & BUS_DMASYNC_PREWRITE) {
- while (bpage != NULL) {
- bcopy((void *)bpage->datavaddr,
- (void *)bpage->vaddr,
- bpage->datacount);
- bpage = STAILQ_NEXT(bpage, links);
- }
- }
-
- if (op & BUS_DMASYNC_POSTREAD) {
- while (bpage != NULL) {
- bcopy((void *)bpage->vaddr,
- (void *)bpage->datavaddr,
- bpage->datacount);
- bpage = STAILQ_NEXT(bpage, links);
- }
- }
- }
-}
-
-static void
-init_bounce_pages(void *dummy __unused)
-{
-
- free_bpages = 0;
- reserved_bpages = 0;
- active_bpages = 0;
- total_bpages = 0;
- STAILQ_INIT(&bounce_page_list);
- STAILQ_INIT(&bounce_map_waitinglist);
- STAILQ_INIT(&bounce_map_callbacklist);
- mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
-}
-SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
-
-static int
-alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
-{
- int count;
-
- count = 0;
- while (numpages > 0) {
- struct bounce_page *bpage;
-
- bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF,
- M_NOWAIT | M_ZERO);
-
- if (bpage == NULL)
- break;
- bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
- M_NOWAIT, 0ul,
- dmat->lowaddr,
- PAGE_SIZE,
- dmat->boundary);
- if (bpage->vaddr == 0) {
- free(bpage, M_DEVBUF);
- break;
- }
- bpage->busaddr = pmap_kextract(bpage->vaddr);
- mtx_lock(&bounce_lock);
- STAILQ_INSERT_TAIL(&bounce_page_list, bpage, links);
- total_bpages++;
- free_bpages++;
- mtx_unlock(&bounce_lock);
- count++;
- numpages--;
- }
- return (count);
-}
-
-static int
-reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
-{
- int pages;
-
- mtx_assert(&bounce_lock, MA_OWNED);
- pages = MIN(free_bpages, map->pagesneeded - map->pagesreserved);
- if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
- return (map->pagesneeded - (map->pagesreserved + pages));
- free_bpages -= pages;
- reserved_bpages += pages;
- map->pagesreserved += pages;
- pages = map->pagesneeded - map->pagesreserved;
-
- return (pages);
-}
-
-static bus_addr_t
-add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
- bus_size_t size)
-{
- struct bounce_page *bpage;
-
- KASSERT(map != NULL && map != &nobounce_dmamap,
- ("add_bounce_page: bad map %p", map));
-
- if (map->pagesneeded == 0)
- panic("add_bounce_page: map doesn't need any pages");
- map->pagesneeded--;
-
- if (map->pagesreserved == 0)
- panic("add_bounce_page: map doesn't need any pages");
- map->pagesreserved--;
-
- mtx_lock(&bounce_lock);
- bpage = STAILQ_FIRST(&bounce_page_list);
- if (bpage == NULL)
- panic("add_bounce_page: free page list is empty");
-
- STAILQ_REMOVE_HEAD(&bounce_page_list, links);
- reserved_bpages--;
- active_bpages++;
- mtx_unlock(&bounce_lock);
-
- bpage->datavaddr = vaddr;
- bpage->datacount = size;
- STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
- return (bpage->busaddr);
-}
-
-static void
-free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
-{
- struct bus_dmamap *map;
-
- bpage->datavaddr = 0;
- bpage->datacount = 0;
-
- mtx_lock(&bounce_lock);
- STAILQ_INSERT_HEAD(&bounce_page_list, bpage, links);
- free_bpages++;
- active_bpages--;
- if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
- if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
- STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
- STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
- map, links);
- busdma_swi_pending = 1;
- total_deferred++;
- swi_sched(vm_ih, 0);
- }
- }
- mtx_unlock(&bounce_lock);
-}
-
-void
-busdma_swi(void)
-{
- bus_dma_tag_t dmat;
- struct bus_dmamap *map;
-
- mtx_lock(&bounce_lock);
- while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
- STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
- mtx_unlock(&bounce_lock);
- dmat = map->dmat;
- (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
- bus_dmamap_load(map->dmat, map, map->buf, map->buflen,
- map->callback, map->callback_arg, /*flags*/0);
- (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
- mtx_lock(&bounce_lock);
- }
- mtx_unlock(&bounce_lock);
-}
--- sys/ia64/ia64/vm_machdep.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/*-
- * Copyright (c) 1982, 1986 The Regents of the University of California.
- * Copyright (c) 1989, 1990 William Jolitz
- * Copyright (c) 1994 John Dyson
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department, and William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
- * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
- * $FreeBSD: src/sys/ia64/ia64/vm_machdep.c,v 1.90.2.1 2005/09/13 21:07:14 marcel Exp $
- */
-/*-
- * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- *
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/malloc.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/vnode.h>
-#include <sys/vmmeter.h>
-#include <sys/kernel.h>
-#include <sys/mbuf.h>
-#include <sys/sf_buf.h>
-#include <sys/sysctl.h>
-#include <sys/unistd.h>
-
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/fpu.h>
-#include <machine/md_var.h>
-#include <machine/pcb.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <sys/lock.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-#include <vm/vm_extern.h>
-
-#include <i386/include/psl.h>
-
-void
-cpu_thread_exit(struct thread *td)
-{
-}
-
-void
-cpu_thread_clean(struct thread *td)
-{
-}
-
-void
-cpu_thread_setup(struct thread *td)
-{
- intptr_t sp;
-
- sp = td->td_kstack + td->td_kstack_pages * PAGE_SIZE;
- sp -= sizeof(struct pcb);
- td->td_pcb = (struct pcb *)sp;
- sp -= sizeof(struct trapframe);
- td->td_frame = (struct trapframe *)sp;
- td->td_frame->tf_length = sizeof(struct trapframe);
- mtx_init(&td->td_md.md_highfp_mtx, "High FP lock", NULL, MTX_SPIN);
-}
-
-void
-cpu_thread_swapin(struct thread *td)
-{
-}
-
-void
-cpu_thread_swapout(struct thread *td)
-{
-
- ia64_highfp_save(td);
-}
-
-void
-cpu_set_upcall(struct thread *td, struct thread *td0)
-{
- struct pcb *pcb;
- struct trapframe *tf;
-
- tf = td->td_frame;
- KASSERT(tf != NULL, ("foo"));
- bcopy(td0->td_frame, tf, sizeof(*tf));
- tf->tf_length = sizeof(struct trapframe);
- tf->tf_flags = FRAME_SYSCALL;
- tf->tf_special.ndirty = 0;
- tf->tf_special.bspstore &= ~0x1ffUL;
- tf->tf_scratch.gr8 = 0;
- tf->tf_scratch.gr9 = 1;
- tf->tf_scratch.gr10 = 0;
-
- pcb = td->td_pcb;
- KASSERT(pcb != NULL, ("foo"));
- bcopy(td0->td_pcb, pcb, sizeof(*pcb));
- pcb->pcb_special.bspstore = td->td_kstack;
- pcb->pcb_special.pfs = 0;
- pcb->pcb_current_pmap = vmspace_pmap(td->td_proc->p_vmspace);
- pcb->pcb_special.sp = (uintptr_t)tf - 16;
- pcb->pcb_special.rp = FDESC_FUNC(fork_trampoline);
- cpu_set_fork_handler(td, (void (*)(void*))fork_return, td);
-
- /* Setup to release sched_lock in fork_exit(). */
- td->td_md.md_spinlock_count = 1;
- td->td_md.md_saved_intr = 1;
-}
-
-void
-cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
- stack_t *stack)
-{
- struct ia64_fdesc *fd;
- struct trapframe *tf;
- uint64_t ndirty, sp;
-
- tf = td->td_frame;
- ndirty = tf->tf_special.ndirty + (tf->tf_special.bspstore & 0x1ffUL);
-
- KASSERT((ndirty & ~PAGE_MASK) == 0,
- ("Whoa there! We have more than 8KB of dirty registers!"));
-
- fd = (struct ia64_fdesc *)entry;
- sp = (uint64_t)stack->ss_sp;
-
- bzero(&tf->tf_special, sizeof(tf->tf_special));
- tf->tf_special.iip = fuword(&fd->func);
- tf->tf_special.gp = fuword(&fd->gp);
- tf->tf_special.sp = (sp + stack->ss_size - 16) & ~15;
- tf->tf_special.rsc = 0xf;
- tf->tf_special.fpsr = IA64_FPSR_DEFAULT;
- tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT |
- IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN |
- IA64_PSR_CPL_USER;
-
- if (tf->tf_flags & FRAME_SYSCALL) {
- tf->tf_special.cfm = (3UL<<62) | (1UL<<7) | 1UL;
- tf->tf_special.bspstore = sp + 8;
- suword((caddr_t)sp, (uint64_t)arg);
- } else {
- tf->tf_special.cfm = (1UL<<63) | (1UL<<7) | 1UL;
- tf->tf_special.bspstore = sp;
- tf->tf_special.ndirty = 8;
- sp = td->td_kstack + ndirty - 8;
- if ((sp & 0x1ff) == 0x1f8) {
- *(uint64_t*)sp = 0;
- tf->tf_special.ndirty += 8;
- sp -= 8;
- }
- *(uint64_t*)sp = (uint64_t)arg;
- }
-}
-
-int
-cpu_set_user_tls(struct thread *td, void *tls_base)
-{
- td->td_frame->tf_special.tp = (unsigned long)tls_base;
- return (0);
-}
-
-/*
- * Finish a fork operation, with process p2 nearly set up.
- * Copy and update the pcb, set up the stack so that the child
- * ready to run and return to user mode.
- */
-void
-cpu_fork(struct thread *td1, struct proc *p2 __unused, struct thread *td2,
- int flags)
-{
- char *stackp;
- uint64_t ndirty;
-
- KASSERT(td1 == curthread || td1 == &thread0,
- ("cpu_fork: td1 not curthread and not thread0"));
-
- if ((flags & RFPROC) == 0)
- return;
-
- /*
- * Save the preserved registers and the high FP registers in the
- * PCB if we're the parent (ie td1 == curthread) so that we have
- * a valid PCB. This also causes a RSE flush. We don't have to
- * do that otherwise, because there wouldn't be anything important
- * to save.
- */
- if (td1 == curthread) {
- if (savectx(td1->td_pcb) != 0)
- panic("unexpected return from savectx()");
- ia64_highfp_save(td1);
- }
-
- /*
- * create the child's kernel stack and backing store. We basicly
- * create an image of the parent's stack and backing store and
- * adjust where necessary.
- */
- stackp = (char *)(td2->td_kstack + td2->td_kstack_pages * PAGE_SIZE);
-
- stackp -= sizeof(struct pcb);
- td2->td_pcb = (struct pcb *)stackp;
- bcopy(td1->td_pcb, td2->td_pcb, sizeof(struct pcb));
-
- stackp -= sizeof(struct trapframe);
- td2->td_frame = (struct trapframe *)stackp;
- bcopy(td1->td_frame, td2->td_frame, sizeof(struct trapframe));
- td2->td_frame->tf_length = sizeof(struct trapframe);
- ndirty = td2->td_frame->tf_special.ndirty +
- (td2->td_frame->tf_special.bspstore & 0x1ffUL);
- bcopy((void*)td1->td_kstack, (void*)td2->td_kstack, ndirty);
-
- /* Set-up the return values as expected by the fork() libc stub. */
- if (td2->td_frame->tf_special.psr & IA64_PSR_IS) {
- td2->td_frame->tf_scratch.gr8 = 0;
- td2->td_frame->tf_scratch.gr10 = 1;
- } else {
- td2->td_frame->tf_scratch.gr8 = 0;
- td2->td_frame->tf_scratch.gr9 = 1;
- td2->td_frame->tf_scratch.gr10 = 0;
- }
-
- td2->td_pcb->pcb_special.bspstore = td2->td_kstack + ndirty;
- td2->td_pcb->pcb_special.pfs = 0;
- td2->td_pcb->pcb_current_pmap = vmspace_pmap(td2->td_proc->p_vmspace);
-
- td2->td_pcb->pcb_special.sp = (uintptr_t)stackp - 16;
- td2->td_pcb->pcb_special.rp = FDESC_FUNC(fork_trampoline);
- cpu_set_fork_handler(td2, (void (*)(void*))fork_return, td2);
-
- /* Setup to release sched_lock in fork_exit(). */
- td2->td_md.md_spinlock_count = 1;
- td2->td_md.md_saved_intr = 1;
-}
-
-/*
- * Intercept the return address from a freshly forked process that has NOT
- * been scheduled yet.
- *
- * This is needed to make kernel threads stay in kernel mode.
- */
-void
-cpu_set_fork_handler(td, func, arg)
- struct thread *td;
- void (*func)(void *);
- void *arg;
-{
- td->td_frame->tf_scratch.gr2 = (u_int64_t)func;
- td->td_frame->tf_scratch.gr3 = (u_int64_t)arg;
-}
-
-/*
- * cpu_exit is called as the last action during exit.
- * We drop the fp state (if we have it) and switch to a live one.
- */
-void
-cpu_exit(struct thread *td)
-{
-
- /* XXX: Should this be in cpu_thread_exit() instead? */
- /* Throw away the high FP registers. */
- ia64_highfp_drop(td);
-}
-
-/*
- * Allocate an sf_buf for the given vm_page. On this machine, however, there
- * is no sf_buf object. Instead, an opaque pointer to the given vm_page is
- * returned.
- */
-struct sf_buf *
-sf_buf_alloc(struct vm_page *m, int pri)
-{
-
- return ((struct sf_buf *)m);
-}
-
-/*
- * Free the sf_buf. In fact, do nothing because there are no resources
- * associated with the sf_buf.
- */
-void
-sf_buf_free(struct sf_buf *sf)
-{
-}
-
-/*
- * Software interrupt handler for queued VM system processing.
- */
-void
-swi_vm(void *dummy)
-{
-#if 0
- if (busdma_swi_pending != 0)
- busdma_swi();
-#endif
-}
--- sys/ia64/ia64/syscall.S
+++ /dev/null
@@ -1,568 +0,0 @@
-/*-
- * Copyright (c) 2002, 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/syscall.S,v 1.14 2005/01/06 22:18:22 imp Exp $
- */
-
-#include <sys/syscall.h>
-#include <machine/asm.h>
-#include <assym.s>
-
-/*
- * A process performs a syscall by performing an indirect call to the
- * address stored in ar.k5. The contents of ar.pfs and rp should be
- * saved prior to the syscall in r9 and r10 respectively. The kernel
- * will restore these values on return. The value of gp is preserved
- * across the call. This allows for small enough syscall stubs without
- * getting too weird.
- * The address in ar.k5 is the start of the EPC gateway page and also
- * the syscall entry point. The syscall code in the gateway page is
- * primarily responsible for increasing the privilege level, but will
- * also make sure we have a reliable psr.
- *
- * A process defines:
- * r8 - syscall number
- * r9 - copy of ar.pfs
- * r10 - copy of rp
- * in0-in7 - syscall arguments
- *
- * A syscall returns:
- * r8+r9 - syscall return value(s)
- * r10 - syscall error flag
- * ar.pfs - restored from r9
- * rp - restored from r10
- * gp - preserved
- *
- * The EPC syscall code defines:
- * r11 - copy of psr.l
- * r14 - Kernel memory stack
- * r15 - Kernel register stack
- *
- * Also in the gateway page are the signal trampolines. As such, stacks
- * don't have to be made executable per se. Since debuggers have a need
- * to know about trampolines, we probably need to define a table of
- * vectors or something along those lines so that debuggers can get the
- * information they need and we have the freedom to move code around.
- */
-
- .section .text.gateway, "ax"
- .align PAGE_SIZE
- .global ia64_gateway_page
-ia64_gateway_page:
-{ .mmb
- mov r14=ar.k7 // Memory stack
- mov r15=ar.k6 // Register stack
- epc
- ;;
-}
-{ .mlx
- mov r11=psr
- movl r31=epc_syscall
- ;;
-}
-{ .mib
- rum psr.be
- mov b7=r31
- br b7
- ;;
-}
-gw_ret:
-{ .mmi
- mov ar.rnat=r22
- ;;
- mov ar.rsc=r24
- mov ar.pfs=r20
-}
-{ .mib
- mov ar.fpsr=r25
- mov b0=r18
- br.sptk b6
- ;;
-}
-gw_ret_ia32:
-{ .mfb
- flushrs
- nop 0
- nop 0
- ;;
-}
-{ .mfb
- nop 0
- nop 0
- br.ia.sptk b6
- ;;
-}
-
-
-ENTRY_NOPROFILE(break_sigtramp, 0)
-{ .mib
- mov ar.rsc=0
- cmp.ne p15,p0=0,gp
- cover
- ;;
-}
-{ .mmi
- flushrs
-(p15) invala
- add r16=16+UC_MCONTEXT+MC_SPECIAL,sp
- ;;
-}
-{ .mmi
- mov r17=ar.bsp
- mov r18=ar.rnat
- add r14=40,r16
- ;;
-}
-{ .mmi
- st8 [r14]=r17,64 // bspstore
-(p15) mov ar.bspstore=gp
- add r15=48,r16
- ;;
-}
-{ .mmi
- st8 [r15]=r18 // rnat
- st8 [r14]=r0 // ndirty
- nop 0
- ;;
-}
-{ .mmi
- alloc r14=ar.pfs, 0, 0, 3, 0
- mov ar.rsc=15
- mov out0=r8
- ;;
-}
-{ .mmi
- ld8 r16=[r10],8 // function address
- ;;
- ld8 gp=[r10] // function's gp value
- mov b7=r16
- ;;
-}
-{ .mib
- mov out1=r9
- add out2=16,sp
- br.call.sptk rp=b7
- ;;
-}
-{ .mmi
- mov r15=SYS_sigreturn
- add out0=16,sp
- break 0x100000
- ;;
-}
-{ .mmi
- mov r15=SYS_exit
- mov out0=ret0
- break 0x100000
- ;;
-}
-END(break_sigtramp)
-
-ENTRY_NOPROFILE(epc_sigtramp, 0)
-{ .mmi
- ld8 r16=[r10],8 // function address
- mov ar.rsc=0
- cmp.ne p15,p0=0,gp
- ;;
-}
-{ .mmi
-(p15) invala
-(p15) mov ar.bspstore=gp
- mov b7=r16
- ;;
-}
-{ .mmb
- alloc r14=ar.pfs, 0, 0, 3, 0
- mov ar.rsc=15
- nop 0
- ;;
-}
-{ .mii
- ld8 gp=[r10] // function's gp value
- mov out0=r8
- mov out1=r9
-}
-{ .mfb
- add out2=16,sp
- nop 0
- br.call.sptk rp=b7
- ;;
-}
- add out0=16,sp
- CALLSYS_NOERROR(sigreturn)
- mov out0=ret0
- CALLSYS_NOERROR(exit)
-END(epc_sigtramp)
-
- .align PAGE_SIZE
-
- .text
-
-ENTRY_NOPROFILE(epc_syscall, 8)
- .prologue
- .unwabi @svr4, 'E'
- .save rp, r0
- .body
-{ .mmi
- mov r16=ar.rsc
- mov ar.rsc=0
- mov r17=r13
- ;;
-}
-{ .mmi
- mov r18=ar.bspstore
- ;;
- mov r19=ar.rnat
- dep r15=r18,r15,0,9
- ;;
-}
-{ .mmi
- mov ar.bspstore=r15
- add r30=-SIZEOF_TRAPFRAME,r14
- mov r20=sp
- ;;
-}
-{ .mii
- mov r13=ar.k4
- dep r30=0,r30,0,10
- ;;
- add sp=-16,r30
- ;;
-}
-{ .mib
- mov r21=ar.unat
- add r31=8,r30
- nop 0
- ;;
-}
-{ .mib
- mov r22=ar.fpsr
- sub r29=r14,r30
- nop 0
-}
-{ .mmi
- mov r23=ar.bsp
- mov ar.rsc=3
- add r28=FRAME_SYSCALL,r0
- ;;
-}
-{ .mmi
- st8 [r30]=r29,16 // tf_length
- st8 [r31]=r28,16 // tf_flags
- mov r24=rp
- ;;
-}
-{ .mmi
- st8 [r30]=r20,16 // sp
- st8 [r31]=r21,16 // unat
- mov r25=pr
- ;;
-}
-{ .mmi
- st8 [r30]=r10,16 // rp (syscall caller)
- st8 [r31]=r25,16 // pr
- mov r26=ar.pfs
- ;;
-}
-{ .mmi
- st8 [r30]=r9,16 // pfs (syscall caller)
- st8 [r31]=r18,16 // bspstore
- sub r27=r23,r15
- ;;
-}
-{ .mmi
- st8 [r30]=r19,16 // rnat
- st8 [r31]=r0,16 // __spare
- nop 0
- ;;
-}
-{ .mmi
- st8 [r30]=r17,16 // tp
- st8 [r31]=r16,16 // rsc
- dep r11=-1,r11,32,2 // Set psr.cpl=3
- ;;
-}
-{ .mmi
- st8 [r30]=r22,16 // fpsr
- st8 [r31]=r11,16 // psr
- nop 0
- ;;
-}
-{ .mmi
- st8 [r30]=r1,16 // gp
- st8 [r31]=r27,16 // ndirty
- nop 0
- ;;
-}
-{ .mmi
- st8 [r30]=r26,16 // pfs (syscall stub)
- st8 [r31]=r24,16 // rp (syscall stub)
- nop 0
- ;;
-}
-{ .mmi
- st8 [r30]=r0,80 // ifa
- st8 [r31]=r0,80 // isr
- nop 0
- ;;
-}
-{ .mmi
- alloc r14=ar.pfs,0,0,8,0
- st8 [r30]=r8,16 // syscall number (=r15)
- nop 0
- ;;
-}
-{ .mmi
- .mem.offset 0,0
- st8.spill [r31]=r32,16 // arg0 (=r16)
- .mem.offset 8,0
- st8.spill [r30]=r33,16 // arg1 (=r17)
- nop 0
- ;;
-}
-{ .mmi
- .mem.offset 16,0
- st8.spill [r31]=r34,16 // arg2 (=r18)
- .mem.offset 24,0
- st8.spill [r30]=r35,16 // arg3 (=r19)
- nop 0
- ;;
-}
-{ .mmi
- .mem.offset 32,0
- st8.spill [r31]=r36,16 // arg4 (=r20)
- .mem.offset 40,0
- st8.spill [r30]=r37,16 // arg5 (=r21)
- nop 0
- ;;
-}
-{ .mmi
- .mem.offset 48,0
- st8.spill [r31]=r38 // arg6 (=r22)
- .mem.offset 56,0
- st8.spill [r30]=r39 // arg7 (=r23)
- nop 0
- ;;
-}
-{ .mlx
- ssm psr.dfh|psr.ac
- movl gp=__gp
- ;;
-}
-1:
-{ .mib
- srlz.d
- add out0=16,sp
- br.call.sptk rp=syscall
- ;;
-}
- .global epc_syscall_return
-epc_syscall_return:
-{ .mfb
- add out0=16,sp
- nop 0
- br.call.sptk rp=do_ast
- ;;
-}
-{ .mib
- cmp4.eq p15,p0=ERESTART,r8
- add r14=24,sp
-(p15) br.spnt 1b // restart syscall
- ;;
-}
-{ .mfb
- ld8 r14=[r14] // tf_flags
- nop 0
- nop 0
- ;;
-}
-{ .mib
- nop 0
- tbit.z p15,p0=r14,0
-(p15) br.spnt exception_restore
- ;;
-}
-{ .mmi
- alloc r31=ar.pfs,0,0,0,0
- add r14=32,sp
- add r15=16,sp
- ;;
-}
-{ .mmi
- ld8 r31=[r15],24 // tf_length
- ld8 r16=[r14],16 // sp
- add sp=16,sp
- ;;
-}
-{ .mmi
- ld8 r17=[r15],16 // unat (before)
- ld8 r18=[r14],16 // rp (syscall caller)
- add r31=r31,sp
- ;;
-}
-{ .mmb
- ld8 r19=[r15],16 // pr
- ld8 r20=[r14],16 // pfs (syscall caller)
- nop 0
- ;;
-}
-{ .mmi
- ld8 r21=[r15],24 // bspstore
- ld8 r22=[r14],24 // rnat
- mov pr=r19,0x1fffe
- ;;
-}
-{ .mmb
- ld8 r23=[r15],16 // tp
- ld8 r24=[r14],16 // rsc
- nop 0
- ;;
-}
-{ .mmi
- ld8 r25=[r15],16 // fpsr
- ld8 r26=[r14],16 // psr
- nop 0
- ;;
-}
-{ .mmi
- ld8 gp=[r15],16 // gp
- ld8 r27=[r14],16 // ndirty
- tbit.z p14,p15=r26,34 // p14=ia64, p15=ia32
- ;;
-}
-{ .mmi
- ld8 r28=[r15],56 // pfs (syscall stub)
- ld8 r29=[r14],56 // rp (syscall stub)
- shl r27=r27,16
- ;;
-}
-{ .mmi
- ld8 r8=[r15],16 // r8
- mov ar.rsc=r27
- mov b6=r29
- ;;
-}
-{ .mmb
- ld8 r9=[r14],40 // r9
- ld8 r10=[r15],40 // r10
-(p15) br.spnt epc_syscall_setup_ia32
- ;;
-}
-{ .mmi
- loadrs
- mov ar.k7=r31
- mov sp=r16
- ;;
-}
-{ .mmi
- mov r30=ar.bspstore
- mov r14=ar.k5
- mov ar.pfs=r28
- ;;
-}
-{ .mmi
- mov ar.bspstore=r21
- add r14=gw_ret-ia64_gateway_page,r14
- dep r30=0,r30,0,13 // 8KB aligned.
- ;;
-}
-{ .mib
- mov ar.k6=r30
- mov r13=r23
- nop 0
-}
-{ .mmi
- mov psr.l=r26
- mov ar.unat=r17
- nop 0
- ;;
-}
-{ .mib
- srlz.d
- mov b7=r14
- br.ret.sptk b7
- ;;
-}
-epc_syscall_setup_ia32:
-{ .mmi
- loadrs
- mov ar.k7=r31
- mov sp=r16
- ;;
-}
-{ .mmi
- mov r30=ar.bspstore
- ;;
- mov ar.unat=r17
- dep r30=0,r30,0,13 // 8KB aligned
- ;;
-}
-{ .mmi
- mov ar.k6=r30
- mov ar.bspstore=r21
- mov r11=r0
- ;;
-}
-{ .mmi
- ld8 r16=[r14],64
- ld8 r17=[r15],80
- mov r13=r0
- ;;
-}
-
- ld8 r24=[r14],32
- ld8 r27=[r15],16
- ;;
- ld8 r28=[r14],16
- ld8 r29=[r15],16
- ;;
- ld8 r30=[r14],40
- ld8 r31=[r15],40
- ;;
-
-{ .mmi
- ld8 r2=[r14]
- ld8 r3=[r15]
- mov r14=r0
- ;;
-}
-{ .mmi
- mov ar.csd=r2
- mov ar.ssd=r3
- mov r15=r0
- ;;
-}
-
- mov r2=ar.k5
- mov psr.l=r26
- ;;
- srlz.d
- add r2=gw_ret_ia32-ia64_gateway_page,r2
- ;;
- mov ar.rsc=0x0
- mov b7=r2
- br.ret.sptk b7
- ;;
-END(epc_syscall)
--- sys/ia64/ia64/sscdisk.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/*-
- * ----------------------------------------------------------------------------
- * "THE BEER-WARE LICENSE" (Revision 42):
- * <phk at FreeBSD.ORG> wrote this file. As long as you retain this notice you
- * can do whatever you want with this stuff. If we meet some day, and you think
- * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
- * ----------------------------------------------------------------------------
- *
- * $FreeBSD: src/sys/ia64/ia64/sscdisk.c,v 1.32 2005/01/06 22:18:22 imp Exp $
- *
- */
-
-#include "opt_md.h"
-#include "opt_ski.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bio.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/linker.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/queue.h>
-#include <sys/sysctl.h>
-#include <sys/proc.h>
-#include <vm/vm.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_object.h>
-#include <vm/vm_pager.h>
-#include <machine/md_var.h>
-#include <geom/geom_disk.h>
-
-#ifndef SKI_ROOT_FILESYSTEM
-#define SKI_ROOT_FILESYSTEM "ia64-root.fs"
-#endif
-
-#define SSC_OPEN 50
-#define SSC_CLOSE 51
-#define SSC_READ 52
-#define SSC_WRITE 53
-#define SSC_GET_COMPLETION 54
-#define SSC_WAIT_COMPLETION 55
-
-struct disk_req {
- unsigned long addr;
- unsigned len;
-};
-
-struct disk_stat {
- int fd;
- unsigned count;
-};
-
-static u_int64_t
-ssc(u_int64_t in0, u_int64_t in1, u_int64_t in2, u_int64_t in3, int which)
-{
- register u_int64_t ret0 __asm("r8");
-
- __asm __volatile("mov r15=%1\n\t"
- "break 0x80001"
- : "=r"(ret0)
- : "r"(which), "r"(in0), "r"(in1), "r"(in2), "r"(in3));
- return ret0;
-}
-
-#ifndef SSC_NSECT
-#define SSC_NSECT 409600
-#endif
-
-MALLOC_DEFINE(M_SSC, "SSC disk", "Simulator Disk");
-
-static int sscrootready;
-
-static d_strategy_t sscstrategy;
-
-static LIST_HEAD(, ssc_s) ssc_softc_list = LIST_HEAD_INITIALIZER(&ssc_softc_list);
-
-struct ssc_s {
- int unit;
- LIST_ENTRY(ssc_s) list;
- struct bio_queue_head bio_queue;
- struct disk *disk;
- struct cdev *dev;
- int busy;
- int fd;
-};
-
-static int sscunits;
-
-static void
-sscstrategy(struct bio *bp)
-{
- struct ssc_s *sc;
- int s;
- struct disk_req req;
- struct disk_stat stat;
- u_long len, va, off;
-
- sc = bp->bio_disk->d_drv1;
-
- s = splbio();
-
- bioq_disksort(&sc->bio_queue, bp);
-
- if (sc->busy) {
- splx(s);
- return;
- }
-
- sc->busy++;
-
- while (1) {
- bp = bioq_takefirst(&sc->bio_queue);
- splx(s);
- if (!bp)
- break;
-
- va = (u_long) bp->bio_data;
- len = bp->bio_bcount;
- off = bp->bio_pblkno << DEV_BSHIFT;
- while (len > 0) {
- u_int t;
- if ((va & PAGE_MASK) + len > PAGE_SIZE)
- t = PAGE_SIZE - (va & PAGE_MASK);
- else
- t = len;
- req.len = t;
- req.addr = ia64_tpa(va);
- ssc(sc->fd, 1, ia64_tpa((long) &req), off,
- (bp->bio_cmd == BIO_READ) ? SSC_READ : SSC_WRITE);
- stat.fd = sc->fd;
- ssc(ia64_tpa((long)&stat), 0, 0, 0,
- SSC_WAIT_COMPLETION);
- va += t;
- len -= t;
- off += t;
- }
- bp->bio_resid = 0;
- biodone(bp);
- s = splbio();
- }
-
- sc->busy = 0;
- return;
-}
-
-static struct ssc_s *
-ssccreate(int unit)
-{
- struct ssc_s *sc;
- int fd;
-
- fd = ssc(ia64_tpa((u_int64_t) SKI_ROOT_FILESYSTEM),
- 1, 0, 0, SSC_OPEN);
- if (fd == -1)
- return (NULL);
-
- if (unit == -1)
- unit = sscunits++;
- /* Make sure this unit isn't already in action */
- LIST_FOREACH(sc, &ssc_softc_list, list) {
- if (sc->unit == unit)
- return (NULL);
- }
- MALLOC(sc, struct ssc_s *,sizeof(*sc), M_SSC, M_WAITOK | M_ZERO);
- LIST_INSERT_HEAD(&ssc_softc_list, sc, list);
- sc->unit = unit;
- bioq_init(&sc->bio_queue);
-
- sc->disk = disk_alloc();
- sc->disk->d_drv1 = sc;
- sc->disk->d_fwheads = 0;
- sc->disk->d_fwsectors = 0;
- sc->disk->d_maxsize = DFLTPHYS;
- sc->disk->d_mediasize = (off_t)SSC_NSECT * DEV_BSIZE;
- sc->disk->d_name = "sscdisk";
- sc->disk->d_sectorsize = DEV_BSIZE;
- sc->disk->d_strategy = sscstrategy;
- sc->disk->d_unit = sc->unit;
- sc->disk->d_flags = DISKFLAG_NEEDSGIANT;
- disk_create(sc->disk, DISK_VERSION);
- sc->fd = fd;
- if (sc->unit == 0)
- sscrootready = 1;
- return (sc);
-}
-
-static void
-ssc_drvinit(void *unused)
-{
- ssccreate(-1);
-}
-
-SYSINIT(sscdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE, ssc_drvinit,NULL)
-
-static void
-ssc_takeroot(void *junk)
-{
- if (sscrootready)
- rootdevnames[0] = "ufs:/dev/sscdisk0";
-}
-
-SYSINIT(ssc_root, SI_SUB_MOUNT_ROOT, SI_ORDER_FIRST, ssc_takeroot, NULL);
--- sys/ia64/ia64/db_interface.c
+++ /dev/null
@@ -1,469 +0,0 @@
-/*-
- * Mach Operating System
- * Copyright (c) 1992,1991,1990 Carnegie Mellon University
- * All Rights Reserved.
- *
- * Permission to use, copy, modify and distribute this software and its
- * documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
- * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- *
- * db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/db_interface.c,v 1.27 2005/07/02 23:52:36 marcel Exp $");
-
-/*
- * Interface to DDB.
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/cons.h>
-#include <sys/kdb.h>
-#include <sys/ktr.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/reboot.h>
-#include <sys/smp.h>
-
-#include <vm/vm.h>
-
-#include <machine/db_machdep.h>
-#include <machine/frame.h>
-#include <machine/md_var.h>
-#include <machine/mutex.h>
-#include <machine/setjmp.h>
-
-#include <ddb/ddb.h>
-#include <ddb/db_access.h>
-#include <ddb/db_sym.h>
-#include <ddb/db_variables.h>
-
-#include <ia64/disasm/disasm.h>
-
-#define TMPL_BITS 5
-#define TMPL_MASK ((1 << TMPL_BITS) - 1)
-#define SLOT_BITS 41
-#define SLOT_COUNT 3
-#define SLOT_MASK ((1ULL << SLOT_BITS) - 1ULL)
-#define SLOT_SHIFT(i) (TMPL_BITS+((i)<<3)+(i))
-
-static db_varfcn_t db_frame;
-static db_varfcn_t db_getrse;
-static db_varfcn_t db_getip;
-
-#define DB_OFFSET(x) (db_expr_t *)offsetof(struct trapframe, x)
-struct db_variable db_regs[] = {
- {"ip", NULL, db_getip},
- {"cr.ifs", DB_OFFSET(tf_special.cfm), db_frame},
- {"cr.ifa", DB_OFFSET(tf_special.ifa), db_frame},
- {"ar.bspstore", DB_OFFSET(tf_special.bspstore), db_frame},
- {"ndirty", DB_OFFSET(tf_special.ndirty), db_frame},
- {"rp", DB_OFFSET(tf_special.rp), db_frame},
- {"ar.pfs", DB_OFFSET(tf_special.pfs), db_frame},
- {"psr", DB_OFFSET(tf_special.psr), db_frame},
- {"cr.isr", DB_OFFSET(tf_special.isr), db_frame},
- {"pr", DB_OFFSET(tf_special.pr), db_frame},
- {"ar.rsc", DB_OFFSET(tf_special.rsc), db_frame},
- {"ar.rnat", DB_OFFSET(tf_special.rnat), db_frame},
- {"ar.unat", DB_OFFSET(tf_special.unat), db_frame},
- {"ar.fpsr", DB_OFFSET(tf_special.fpsr), db_frame},
- {"gp", DB_OFFSET(tf_special.gp), db_frame},
- {"sp", DB_OFFSET(tf_special.sp), db_frame},
- {"tp", DB_OFFSET(tf_special.tp), db_frame},
- {"b6", DB_OFFSET(tf_scratch.br6), db_frame},
- {"b7", DB_OFFSET(tf_scratch.br7), db_frame},
- {"r2", DB_OFFSET(tf_scratch.gr2), db_frame},
- {"r3", DB_OFFSET(tf_scratch.gr3), db_frame},
- {"r8", DB_OFFSET(tf_scratch.gr8), db_frame},
- {"r9", DB_OFFSET(tf_scratch.gr9), db_frame},
- {"r10", DB_OFFSET(tf_scratch.gr10), db_frame},
- {"r11", DB_OFFSET(tf_scratch.gr11), db_frame},
- {"r14", DB_OFFSET(tf_scratch.gr14), db_frame},
- {"r15", DB_OFFSET(tf_scratch.gr15), db_frame},
- {"r16", DB_OFFSET(tf_scratch.gr16), db_frame},
- {"r17", DB_OFFSET(tf_scratch.gr17), db_frame},
- {"r18", DB_OFFSET(tf_scratch.gr18), db_frame},
- {"r19", DB_OFFSET(tf_scratch.gr19), db_frame},
- {"r20", DB_OFFSET(tf_scratch.gr20), db_frame},
- {"r21", DB_OFFSET(tf_scratch.gr21), db_frame},
- {"r22", DB_OFFSET(tf_scratch.gr22), db_frame},
- {"r23", DB_OFFSET(tf_scratch.gr23), db_frame},
- {"r24", DB_OFFSET(tf_scratch.gr24), db_frame},
- {"r25", DB_OFFSET(tf_scratch.gr25), db_frame},
- {"r26", DB_OFFSET(tf_scratch.gr26), db_frame},
- {"r27", DB_OFFSET(tf_scratch.gr27), db_frame},
- {"r28", DB_OFFSET(tf_scratch.gr28), db_frame},
- {"r29", DB_OFFSET(tf_scratch.gr29), db_frame},
- {"r30", DB_OFFSET(tf_scratch.gr30), db_frame},
- {"r31", DB_OFFSET(tf_scratch.gr31), db_frame},
- {"r32", (db_expr_t*)0, db_getrse},
- {"r33", (db_expr_t*)1, db_getrse},
- {"r34", (db_expr_t*)2, db_getrse},
- {"r35", (db_expr_t*)3, db_getrse},
- {"r36", (db_expr_t*)4, db_getrse},
- {"r37", (db_expr_t*)5, db_getrse},
- {"r38", (db_expr_t*)6, db_getrse},
- {"r39", (db_expr_t*)7, db_getrse},
- {"r40", (db_expr_t*)8, db_getrse},
- {"r41", (db_expr_t*)9, db_getrse},
- {"r42", (db_expr_t*)10, db_getrse},
- {"r43", (db_expr_t*)11, db_getrse},
- {"r44", (db_expr_t*)12, db_getrse},
- {"r45", (db_expr_t*)13, db_getrse},
- {"r46", (db_expr_t*)14, db_getrse},
- {"r47", (db_expr_t*)15, db_getrse},
- {"r48", (db_expr_t*)16, db_getrse},
- {"r49", (db_expr_t*)17, db_getrse},
- {"r50", (db_expr_t*)18, db_getrse},
- {"r51", (db_expr_t*)19, db_getrse},
- {"r52", (db_expr_t*)20, db_getrse},
- {"r53", (db_expr_t*)21, db_getrse},
- {"r54", (db_expr_t*)22, db_getrse},
- {"r55", (db_expr_t*)23, db_getrse},
- {"r56", (db_expr_t*)24, db_getrse},
- {"r57", (db_expr_t*)25, db_getrse},
- {"r58", (db_expr_t*)26, db_getrse},
- {"r59", (db_expr_t*)27, db_getrse},
- {"r60", (db_expr_t*)28, db_getrse},
- {"r61", (db_expr_t*)29, db_getrse},
- {"r62", (db_expr_t*)30, db_getrse},
- {"r63", (db_expr_t*)31, db_getrse},
- {"r64", (db_expr_t*)32, db_getrse},
- {"r65", (db_expr_t*)33, db_getrse},
- {"r66", (db_expr_t*)34, db_getrse},
- {"r67", (db_expr_t*)35, db_getrse},
- {"r68", (db_expr_t*)36, db_getrse},
- {"r69", (db_expr_t*)37, db_getrse},
- {"r70", (db_expr_t*)38, db_getrse},
- {"r71", (db_expr_t*)39, db_getrse},
- {"r72", (db_expr_t*)40, db_getrse},
- {"r73", (db_expr_t*)41, db_getrse},
- {"r74", (db_expr_t*)42, db_getrse},
- {"r75", (db_expr_t*)43, db_getrse},
- {"r76", (db_expr_t*)44, db_getrse},
- {"r77", (db_expr_t*)45, db_getrse},
- {"r78", (db_expr_t*)46, db_getrse},
- {"r79", (db_expr_t*)47, db_getrse},
- {"r80", (db_expr_t*)48, db_getrse},
- {"r81", (db_expr_t*)49, db_getrse},
- {"r82", (db_expr_t*)50, db_getrse},
- {"r83", (db_expr_t*)51, db_getrse},
- {"r84", (db_expr_t*)52, db_getrse},
- {"r85", (db_expr_t*)53, db_getrse},
- {"r86", (db_expr_t*)54, db_getrse},
- {"r87", (db_expr_t*)55, db_getrse},
- {"r88", (db_expr_t*)56, db_getrse},
- {"r89", (db_expr_t*)57, db_getrse},
- {"r90", (db_expr_t*)58, db_getrse},
- {"r91", (db_expr_t*)59, db_getrse},
- {"r92", (db_expr_t*)60, db_getrse},
- {"r93", (db_expr_t*)61, db_getrse},
- {"r94", (db_expr_t*)62, db_getrse},
- {"r95", (db_expr_t*)63, db_getrse},
- {"r96", (db_expr_t*)64, db_getrse},
- {"r97", (db_expr_t*)65, db_getrse},
- {"r98", (db_expr_t*)66, db_getrse},
- {"r99", (db_expr_t*)67, db_getrse},
- {"r100", (db_expr_t*)68, db_getrse},
- {"r101", (db_expr_t*)69, db_getrse},
- {"r102", (db_expr_t*)70, db_getrse},
- {"r103", (db_expr_t*)71, db_getrse},
- {"r104", (db_expr_t*)72, db_getrse},
- {"r105", (db_expr_t*)73, db_getrse},
- {"r106", (db_expr_t*)74, db_getrse},
- {"r107", (db_expr_t*)75, db_getrse},
- {"r108", (db_expr_t*)76, db_getrse},
- {"r109", (db_expr_t*)77, db_getrse},
- {"r110", (db_expr_t*)78, db_getrse},
- {"r111", (db_expr_t*)79, db_getrse},
- {"r112", (db_expr_t*)80, db_getrse},
- {"r113", (db_expr_t*)81, db_getrse},
- {"r114", (db_expr_t*)82, db_getrse},
- {"r115", (db_expr_t*)83, db_getrse},
- {"r116", (db_expr_t*)84, db_getrse},
- {"r117", (db_expr_t*)85, db_getrse},
- {"r118", (db_expr_t*)86, db_getrse},
- {"r119", (db_expr_t*)87, db_getrse},
- {"r120", (db_expr_t*)88, db_getrse},
- {"r121", (db_expr_t*)89, db_getrse},
- {"r122", (db_expr_t*)90, db_getrse},
- {"r123", (db_expr_t*)91, db_getrse},
- {"r124", (db_expr_t*)92, db_getrse},
- {"r125", (db_expr_t*)93, db_getrse},
- {"r126", (db_expr_t*)94, db_getrse},
- {"r127", (db_expr_t*)95, db_getrse},
-};
-struct db_variable *db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
-
-static int
-db_frame(struct db_variable *vp, db_expr_t *valuep, int op)
-{
- uint64_t *reg;
-
- if (kdb_frame == NULL)
- return (0);
- reg = (uint64_t*)((uintptr_t)kdb_frame + (uintptr_t)vp->valuep);
- if (op == DB_VAR_GET)
- *valuep = *reg;
- else
- *reg = *valuep;
- return (1);
-}
-
-static int
-db_getrse(struct db_variable *vp, db_expr_t *valuep, int op)
-{
- u_int64_t *reg;
- uint64_t bsp;
- int nats, regno, sof;
-
- if (kdb_frame == NULL)
- return (0);
-
- regno = (int)(intptr_t)valuep;
- bsp = kdb_frame->tf_special.bspstore + kdb_frame->tf_special.ndirty;
- sof = (int)(kdb_frame->tf_special.cfm & 0x7f);
-
- if (regno >= sof)
- return (0);
-
- nats = (sof - regno + 63 - ((int)(bsp >> 3) & 0x3f)) / 63;
- reg = (void*)(bsp - ((sof - regno + nats) << 3));
- if (op == DB_VAR_GET)
- *valuep = *reg;
- else
- *reg = *valuep;
- return (1);
-}
-
-static int
-db_getip(struct db_variable *vp, db_expr_t *valuep, int op)
-{
- u_long iip, slot;
-
- if (kdb_frame == NULL)
- return (0);
-
- if (op == DB_VAR_GET) {
- iip = kdb_frame->tf_special.iip;
- slot = (kdb_frame->tf_special.psr >> 41) & 3;
- *valuep = iip + slot;
- } else {
- iip = *valuep & ~0xf;
- slot = *valuep & 0xf;
- if (slot > 2)
- return (0);
- kdb_frame->tf_special.iip = iip;
- kdb_frame->tf_special.psr &= ~IA64_PSR_RI;
- kdb_frame->tf_special.psr |= slot << 41;
- }
- return (1);
-}
-
-/*
- * Read bytes from kernel address space for debugger.
- */
-int
-db_read_bytes(vm_offset_t addr, size_t size, char *data)
-{
- jmp_buf jb;
- void *prev_jb;
- char *src;
- int ret;
-
- prev_jb = kdb_jmpbuf(jb);
- ret = setjmp(jb);
- if (ret == 0) {
- src = (char *)addr;
- while (size-- > 0)
- *data++ = *src++;
- }
- (void)kdb_jmpbuf(prev_jb);
- return (ret);
-}
-
-/*
- * Write bytes to kernel address space for debugger.
- */
-int
-db_write_bytes(vm_offset_t addr, size_t size, char *data)
-{
- jmp_buf jb;
- void *prev_jb;
- char *dst;
- int ret;
-
- prev_jb = kdb_jmpbuf(jb);
- ret = setjmp(jb);
- if (ret == 0) {
- dst = (char *)addr;
- while (size-- > 0)
- *dst++ = *data++;
- }
- (void)kdb_jmpbuf(prev_jb);
- return (ret);
-}
-
-void
-db_bkpt_write(db_addr_t addr, BKPT_INST_TYPE *storage)
-{
- BKPT_INST_TYPE tmp;
- db_addr_t loc;
- int slot;
-
- slot = addr & 0xfUL;
- if (slot >= SLOT_COUNT)
- return;
- loc = (addr & ~0xfUL) + (slot << 2);
-
- db_read_bytes(loc, sizeof(BKPT_INST_TYPE), (char *)&tmp);
- *storage = (tmp >> SLOT_SHIFT(slot)) & SLOT_MASK;
-
- tmp &= ~(SLOT_MASK << SLOT_SHIFT(slot));
- tmp |= (0x84000 << 6) << SLOT_SHIFT(slot);
- db_write_bytes(loc, sizeof(BKPT_INST_TYPE), (char *)&tmp);
-}
-
-void
-db_bkpt_clear(db_addr_t addr, BKPT_INST_TYPE *storage)
-{
- BKPT_INST_TYPE tmp;
- db_addr_t loc;
- int slot;
-
- slot = addr & 0xfUL;
- if (slot >= SLOT_COUNT)
- return;
- loc = (addr & ~0xfUL) + (slot << 2);
-
- db_read_bytes(loc, sizeof(BKPT_INST_TYPE), (char *)&tmp);
- tmp &= ~(SLOT_MASK << SLOT_SHIFT(slot));
- tmp |= *storage << SLOT_SHIFT(slot);
- db_write_bytes(loc, sizeof(BKPT_INST_TYPE), (char *)&tmp);
-}
-
-void
-db_bkpt_skip(void)
-{
-
- if (kdb_frame == NULL)
- return;
-
- kdb_frame->tf_special.psr += IA64_PSR_RI_1;
- if ((kdb_frame->tf_special.psr & IA64_PSR_RI) > IA64_PSR_RI_2) {
- kdb_frame->tf_special.psr &= ~IA64_PSR_RI;
- kdb_frame->tf_special.iip += 16;
- }
-}
-
-db_addr_t
-db_disasm(db_addr_t loc, boolean_t altfmt)
-{
- char buf[32];
- struct asm_bundle bundle;
- const struct asm_inst *i;
- const char *tmpl;
- int n, slot;
-
- slot = loc & 0xf;
- loc &= ~0xful;
- db_read_bytes(loc, 16, buf);
- if (asm_decode((uintptr_t)buf, &bundle)) {
- i = bundle.b_inst + slot;
- tmpl = bundle.b_templ + slot;
- if (*tmpl == ';' || (slot == 2 && bundle.b_templ[1] == ';'))
- tmpl++;
- if (*tmpl == 'L' || i->i_op == ASM_OP_NONE) {
- db_printf("\n");
- goto out;
- }
-
- /* Unit + slot. */
- db_printf("[%c%d] ", *tmpl, slot);
-
- /* Predicate. */
- if (i->i_oper[0].o_value != 0) {
- asm_operand(i->i_oper+0, buf, loc);
- db_printf("(%s) ", buf);
- } else
- db_printf(" ");
-
- /* Mnemonic & completers. */
- asm_mnemonic(i->i_op, buf);
- db_printf(buf);
- n = 0;
- while (n < i->i_ncmpltrs) {
- asm_completer(i->i_cmpltr + n, buf);
- db_printf(buf);
- n++;
- }
- db_printf(" ");
-
- /* Operands. */
- n = 1;
- while (n < 7 && i->i_oper[n].o_type != ASM_OPER_NONE) {
- if (n > 1) {
- if (n == i->i_srcidx)
- db_printf("=");
- else
- db_printf(",");
- }
- asm_operand(i->i_oper + n, buf, loc);
- db_printf(buf);
- n++;
- }
- } else {
- tmpl = NULL;
- slot = 2;
- }
- db_printf("\n");
-
-out:
- slot++;
- if (slot == 1 && tmpl[1] == 'L')
- slot++;
- if (slot > 2)
- slot = 16;
- return (loc + slot);
-}
-
-typedef db_expr_t __db_f(db_expr_t, db_expr_t, db_expr_t, db_expr_t, db_expr_t,
- db_expr_t, db_expr_t, db_expr_t);
-
-register uint64_t __db_gp __asm__("gp");
-
-int
-db_fncall_ia64(db_expr_t addr, db_expr_t *rv, int nargs, db_expr_t args[])
-{
- struct ia64_fdesc fdesc;
- __db_f *f;
-
- f = (__db_f *)&fdesc;
- fdesc.func = addr;
- fdesc.gp = __db_gp; /* XXX doesn't work for modules. */
- *rv = (*f)(args[0], args[1], args[2], args[3], args[4], args[5],
- args[6], args[7]);
- return (1);
-}
-
-void
-db_show_mdpcpu(struct pcpu *pc)
-{
-}
--- sys/ia64/ia64/support.S
+++ /dev/null
@@ -1,934 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/support.S,v 1.25 2005/01/06 22:18:22 imp Exp $
- */
-/*-
- * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- *
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-#include <machine/asm.h>
-#include <machine/ia64_cpu.h>
-#include <assym.s>
-
- .text
-
-/*
- * ia64_change_mode: change mode to/from physical mode
- *
- * Arguments:
- * r14 psr for desired mode
- *
- * Modifies:
- * r15-r19 scratch
- * ar.bsp tranlated to new mode
- */
-ENTRY_NOPROFILE(ia64_change_mode, 0)
- rsm psr.i | psr.ic
- mov r19=ar.rsc // save rsc while we change mode
- tbit.nz p6,p7=r14,17 // physical or virtual ?
- ;;
- mov ar.rsc=0 // turn off RSE
-(p6) mov r15=7 // RR base for virtual addresses
-(p7) mov r15=0 // RR base for physical addresses
- flushrs // no dirty registers please
- srlz.i
- ;;
- mov r16=ar.bsp
- mov r17=rp
- mov r18=ar.rnat
- ;;
- dep r16=r15,r16,61,3 // new address of ar.bsp
- dep r17=r15,r17,61,3 // new address of rp
- dep sp=r15,sp,61,3 // new address of sp
- ;;
- mov ar.bspstore=r16
- mov rp=r17
- ;;
-1: mov r16=ip
- mov ar.rnat=r18
- mov cr.ipsr=r14 // psr for new mode
- ;;
- add r16=2f-1b,r16 // address to rfi to
- ;;
- dep r16=r15,r16,61,3 // new mode address for rfi
- ;;
- mov cr.iip=r16 // setup for rfi
- mov cr.ifs=r0
- ;;
- rfi
-
-2: mov ar.rsc=r19 // restore ar.rsc
- br.ret.sptk.few rp // now in new mode
-END(ia64_change_mode)
-
-/*
- * ia64_physical_mode: change mode to physical mode
- *
- * Return:
- * ret0 psr to restore
- *
- * Modifies:
- * r15-r18 scratch
- * ar.bsp tranlated to physical mode
- * psr.i cleared
- */
-ENTRY(ia64_physical_mode, 0)
- mov r14=psr
- mov ret0=psr
- movl r15=(IA64_PSR_I|IA64_PSR_IT|IA64_PSR_DT|IA64_PSR_RT|IA64_PSR_DFL|IA64_PSR_DFH)
- movl r16=IA64_PSR_BN
- ;;
- andcm r14=r14,r15 // clear various xT bits
- ;;
- or r14=r14,r16 // make sure BN=1
- or ret0=ret0,r16 // make sure BN=1
-
- br.cond.sptk.many ia64_change_mode
-END(ia64_physical_mode)
-
-/*
- * ia64_call_efi_physical: call an EFI procedure in physical mode
- *
- * Arguments:
- * in0 Address of EFI procedure descriptor
- * in1-in5 Arguments to EFI procedure
- *
- * Return:
- * ret0-ret3 return values from EFI
- *
- */
-ENTRY(ia64_call_efi_physical, 6)
- .prologue
- .regstk 6,4,5,0
- .save ar.pfs,loc0
- alloc loc0=ar.pfs,6,4,5,0
- ;;
- .save rp,loc1
- mov loc1=rp
- ;;
- .body
- br.call.sptk.many rp=ia64_physical_mode
- ;;
- mov loc2=r8 // psr to restore mode
- mov loc3=gp // save kernel gp
- ld8 r14=[in0],8 // function address
- ;;
- mov out0=in1
- mov out1=in2
- mov out2=in3
- mov out3=in4
- mov out4=in5
- ld8 gp=[in0] // function gp value
- ;;
- mov b6=r14
- ;;
- br.call.sptk.many rp=b6 // call EFI procedure
- mov gp=loc3 // restore kernel gp
- ;;
- mov r14=loc2 // psr to restore mode
- br.call.sptk.many rp=ia64_change_mode
- ;;
- mov rp=loc1
- mov ar.pfs=loc0
- ;;
- br.ret.sptk.many rp
-END(ia64_call_efi_physical)
-
-/**************************************************************************/
-
-ENTRY(fusufault, 0)
-{ .mib
- st8.rel [r15]=r0 // Clear onfault.
- add ret0=-1,r0
- br.ret.sptk rp
- ;;
-}
-END(fusufault)
-
-/*
- * casuptr(intptr_t *p, intptr_t old, intptr_t new)
- * Perform a compare-exchange in user space.
- */
-ENTRY(casuptr, 3)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- mov ar.ccv=in1
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- cmpxchg8.rel ret0=[in0],in2,ar.ccv
- nop 0
- ;;
-}
-{ .mfb
- st8.rel [r15]=r0 // Clear onfault
- nop 0
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(casuptr)
-
-/*
- * subyte(void *addr, int byte)
- * suword16(void *addr, int word)
- * suword32(void *addr, int word)
- * suword64|suword(void *addr, long word)
- * Store in user space
- */
-
-ENTRY(subyte, 2)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- nop 0
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- st1.rel [in0]=in1
- nop 0
- ;;
-}
-{ .mib
- st8.rel [r15]=r0 // Clear onfault
- mov ret0=r0
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(subyte)
-
-ENTRY(suword16, 2)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- nop 0
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- st2.rel [in0]=in1
- nop 0
- ;;
-}
-{ .mib
- st8.rel [r15]=r0 // Clear onfault
- mov ret0=r0
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(suword16)
-
-ENTRY(suword32, 2)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- nop 0
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- st4.rel [in0]=in1
- nop 0
- ;;
-}
-{ .mib
- st8.rel [r15]=r0 // Clear onfault
- mov ret0=r0
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(suword32)
-
-ENTRY(suword64, 2)
-XENTRY(suword)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- nop 0
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- st8.rel [in0]=in1
- nop 0
- ;;
-}
-{ .mib
- st8.rel [r15]=r0 // Clear onfault
- mov ret0=r0
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(suword64)
-
-/*
- * fubyte(void *addr, int byte)
- * fuword16(void *addr, int word)
- * fuword32(void *addr, int word)
- * fuword64|fuword(void *addr, long word)
- * Fetch from user space
- */
-
-ENTRY(fubyte, 1)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- nop 0
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- mf
- nop 0
- ;;
-}
-{ .mmb
- ld1 ret0=[in0]
- st8.rel [r15]=r0 // Clear onfault
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(fubyte)
-
-ENTRY(fuword16, 2)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- nop 0
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- mf
- nop 0
- ;;
-}
-{ .mmb
- ld2 ret0=[in0]
- st8.rel [r15]=r0 // Clear onfault
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(fuword16)
-
-ENTRY(fuword32, 2)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- nop 0
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- mf
- nop 0
- ;;
-}
-{ .mmb
- ld4 ret0=[in0]
- st8.rel [r15]=r0 // Clear onfault
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(fuword32)
-
-ENTRY(fuword64, 2)
-XENTRY(fuword)
-{ .mlx
- add r15=PC_CURTHREAD,r13
- movl r14=VM_MAX_ADDRESS
- ;;
-}
-{ .mib
- ld8 r15=[r15] // r15 = curthread
- cmp.geu p6,p0=in0,r14
-(p6) br.dpnt.few 1f
- ;;
-}
-{ .mlx
- add r15=TD_PCB,r15
- movl r14=fusufault
- ;;
-}
-{ .mmi
- ld8 r15=[r15] // r15 = PCB
- ;;
- nop 0
- add r15=PCB_ONFAULT,r15
- ;;
-}
-{ .mmi
- st8 [r15]=r14 // Set onfault
- ;;
- mf
- nop 0
- ;;
-}
-{ .mmb
- ld8 ret0=[in0]
- st8.rel [r15]=r0 // Clear onfault
- br.ret.sptk rp
- ;;
-}
-1:
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(fuword64)
-
-/*
- * fuswintr(void *addr)
- * suswintr(void *addr)
- */
-
-ENTRY(fuswintr, 1)
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(fuswintr)
-
-ENTRY(suswintr, 0)
-{ .mfb
- add ret0=-1,r0
- nop 0
- br.ret.sptk rp
- ;;
-}
-END(suswintr)
-
-/**************************************************************************/
-
-/*
- * Copy a null-terminated string within the kernel's address space.
- * If lenp is not NULL, store the number of chars copied in *lenp
- *
- * int copystr(char *from, char *to, size_t len, size_t *lenp);
- */
-ENTRY(copystr, 4)
- mov r14=in2 // r14 = i = len
- cmp.eq p6,p0=r0,in2
-(p6) br.cond.spnt.few 2f // if (len == 0), bail out
-
-1: ld1 r15=[in0],1 // read one byte
- ;;
- st1 [in1]=r15,1 // write that byte
- add in2=-1,in2 // len--
- ;;
- cmp.eq p6,p0=r0,r15
- cmp.ne p7,p0=r0,in2
- ;;
-(p6) br.cond.spnt.few 2f // if (*from == 0), bail out
-(p7) br.cond.sptk.few 1b // if (len != 0) copy more
-
-2: cmp.eq p6,p0=r0,in3
-(p6) br.cond.dpnt.few 3f // if (lenp != NULL)
- sub r14=r14,in2 // *lenp = (i - len)
- ;;
- st8 [in3]=r14
-
-3: cmp.eq p6,p0=r0,r15
-(p6) br.cond.spnt.few 4f // *from == '\0'; leave quietly
-
- mov ret0=ENAMETOOLONG // *from != '\0'; error.
- br.ret.sptk.few rp
-
-4: mov ret0=0 // return 0.
- br.ret.sptk.few rp
-END(copystr)
-
-ENTRY(copyinstr, 4)
- .prologue
- .regstk 4, 3, 4, 0
- .save ar.pfs,loc0
- alloc loc0=ar.pfs,4,3,4,0
- .save rp,loc1
- mov loc1=rp
- .body
-
- movl loc2=VM_MAX_ADDRESS // make sure that src addr
- ;;
- cmp.geu p6,p0=in0,loc2 // is in user space.
- ;;
-(p6) br.cond.spnt.few copyerr // if it's not, error out.
- movl r14=copyerr // set up fault handler.
- add r15=PC_CURTHREAD,r13 // find curthread
- ;;
- ld8 r15=[r15]
- ;;
- add r15=TD_PCB,r15 // find pcb
- ;;
- ld8 r15=[r15]
- ;;
- add loc2=PCB_ONFAULT,r15
- ;;
- st8 [loc2]=r14
- ;;
- mov out0=in0
- mov out1=in1
- mov out2=in2
- mov out3=in3
- ;;
- br.call.sptk.few rp=copystr // do the copy.
- st8 [loc2]=r0 // kill the fault handler.
- mov ar.pfs=loc0 // restore ar.pfs
- mov rp=loc1 // restore ra.
- br.ret.sptk.few rp // ret0 left over from copystr
-END(copyinstr)
-
-/*
- * Not the fastest bcopy in the world.
- */
-ENTRY(bcopy, 3)
- mov ret0=r0 // return zero for copy{in,out}
- ;;
- cmp.le p6,p0=in2,r0 // bail if len <= 0
-(p6) br.ret.spnt.few rp
-
- sub r14=in1,in0 ;; // check for overlap
- cmp.ltu p6,p0=r14,in2 // dst-src < len
-(p6) br.cond.spnt.few 5f
-
- extr.u r14=in0,0,3 // src & 7
- extr.u r15=in1,0,3 ;; // dst & 7
- cmp.eq p6,p0=r14,r15 // different alignment?
-(p6) br.cond.spnt.few 2f // branch if same alignment
-
-1: ld1 r14=[in0],1 ;; // copy bytewise
- st1 [in1]=r14,1
- add in2=-1,in2 ;; // len--
- cmp.ne p6,p0=r0,in2
-(p6) br.cond.dptk.few 1b // loop
- br.ret.sptk.few rp // done
-
-2: cmp.eq p6,p0=r14,r0 // aligned?
-(p6) br.cond.sptk.few 4f
-
-3: ld1 r14=[in0],1 ;; // copy bytewise
- st1 [in1]=r14,1
- extr.u r15=in0,0,3 // src & 7
- add in2=-1,in2 ;; // len--
- cmp.eq p6,p0=r0,in2 // done?
- cmp.eq p7,p0=r0,r15 ;; // aligned now?
-(p6) br.ret.spnt.few rp // return if done
-(p7) br.cond.spnt.few 4f // go to main copy
- br.cond.sptk.few 3b // more bytes to copy
-
- // At this point, in2 is non-zero
-
-4: mov r14=8 ;;
- cmp.ltu p6,p0=in2,r14 ;; // len < 8?
-(p6) br.cond.spnt.few 1b // byte copy the end
- ld8 r15=[in0],8 ;; // copy word
- st8 [in1]=r15,8
- add in2=-8,in2 ;; // len -= 8
- cmp.ne p6,p0=r0,in2 // done?
-(p6) br.cond.spnt.few 4b // again
-
- br.ret.sptk.few rp // return
-
- // Don't bother optimising overlap case
-
-5: add in0=in0,in2
- add in1=in1,in2 ;;
- add in0=-1,in0
- add in1=-1,in1 ;;
-
-6: ld1 r14=[in0],-1 ;;
- st1 [in1]=r14,-1
- add in2=-1,in2 ;;
- cmp.ne p6,p0=r0,in2
-(p6) br.cond.spnt.few 6b
-
- br.ret.sptk.few rp
-END(bcopy)
-
-ENTRY(memcpy,3)
- mov r14=in0 ;;
- mov in0=in1 ;;
- mov in1=r14
- br.cond.sptk.few bcopy
-END(memcpy)
-
-ENTRY(copyin, 3)
- .prologue
- .regstk 3, 3, 3, 0
- .save ar.pfs,loc0
- alloc loc0=ar.pfs,3,3,3,0
- .save rp,loc1
- mov loc1=rp
- .body
-
- movl loc2=VM_MAX_ADDRESS // make sure that src addr
- ;;
- cmp.geu p6,p0=in0,loc2 // is in user space.
- ;;
-(p6) br.cond.spnt.few copyerr // if it's not, error out.
- movl r14=copyerr // set up fault handler.
- add r15=PC_CURTHREAD,r13 // find curthread
- ;;
- ld8 r15=[r15]
- ;;
- add r15=TD_PCB,r15 // find pcb
- ;;
- ld8 r15=[r15]
- ;;
- add loc2=PCB_ONFAULT,r15
- ;;
- st8 [loc2]=r14
- ;;
- mov out0=in0
- mov out1=in1
- mov out2=in2
- ;;
- br.call.sptk.few rp=bcopy // do the copy.
- st8 [loc2]=r0 // kill the fault handler.
- mov ar.pfs=loc0 // restore ar.pfs
- mov rp=loc1 // restore ra.
- br.ret.sptk.few rp // ret0 left over from bcopy
-END(copyin)
-
-ENTRY(copyout, 3)
- .prologue
- .regstk 3, 3, 3, 0
- .save ar.pfs,loc0
- alloc loc0=ar.pfs,3,3,3,0
- .save rp,loc1
- mov loc1=rp
- .body
-
- movl loc2=VM_MAX_ADDRESS // make sure that dest addr
- ;;
- cmp.geu p6,p0=in1,loc2 // is in user space.
- ;;
-(p6) br.cond.spnt.few copyerr // if it's not, error out.
- movl r14=copyerr // set up fault handler.
- add r15=PC_CURTHREAD,r13 // find curthread
- ;;
- ld8 r15=[r15]
- ;;
- add r15=TD_PCB,r15 // find pcb
- ;;
- ld8 r15=[r15]
- ;;
- add loc2=PCB_ONFAULT,r15
- ;;
- st8 [loc2]=r14
- ;;
- mov out0=in0
- mov out1=in1
- mov out2=in2
- ;;
- br.call.sptk.few rp=bcopy // do the copy.
- st8 [loc2]=r0 // kill the fault handler.
- mov ar.pfs=loc0 // restore ar.pfs
- mov rp=loc1 // restore ra.
- br.ret.sptk.few rp // ret0 left over from bcopy
-END(copyout)
-
-ENTRY(copyerr, 0)
- add r14=PC_CURTHREAD,r13 ;; // find curthread
- ld8 r14=[r14] ;;
- add r14=TD_PCB,r14 ;; // curthread->td_addr
- ld8 r14=[r14] ;;
- add r14=PCB_ONFAULT,r14 ;; // &curthread->td_pcb->pcb_onfault
- st8 [r14]=r0 // reset fault handler
-
- mov ret0=EFAULT // return EFAULT
- br.ret.sptk.few rp
-END(copyerr)
-
-#if defined(GPROF)
-/*
- * Important registers:
- * r8 structure return address
- * rp our return address
- * in0 caller's ar.pfs
- * in1 caller's gp
- * in2 caller's rp
- * in3 GOT entry
- * ar.pfs our pfs
- */
-ENTRY_NOPROFILE(_mcount, 4)
- alloc loc0 = ar.pfs, 4, 3, 2, 0
- mov loc1 = r8
- mov loc2 = rp
- ;;
- mov out0 = in2
- mov out1 = rp
- br.call.sptk rp = __mcount
- ;;
-1:
- mov gp = in1
- mov r14 = ip
- mov b7 = loc2
- ;;
- add r14 = 2f - 1b, r14
- mov ar.pfs = loc0
- mov rp = in2
- ;;
- mov b7 = r14
- mov b6 = loc2
- mov r8 = loc1
- mov r14 = in0
- br.ret.sptk b7
- ;;
-2:
- mov ar.pfs = r14
- br.sptk b6
- ;;
-END(_mcount)
-#endif
--- sys/ia64/ia64/unwind.c
+++ /dev/null
@@ -1,483 +0,0 @@
-/*-
- * Copyright (c) 2003, 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/unwind.c,v 1.14 2005/04/16 05:38:59 marcel Exp $");
-
-#include <sys/param.h>
-#include <sys/kdb.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
-#include <sys/queue.h>
-
-#include <machine/frame.h>
-#include <machine/md_var.h>
-#include <machine/pcb.h>
-#include <machine/unwind.h>
-
-#include <uwx.h>
-
-MALLOC_DEFINE(M_UNWIND, "Unwind", "Unwind information");
-
-struct unw_entry {
- uint64_t ue_start; /* procedure start */
- uint64_t ue_end; /* procedure end */
- uint64_t ue_info; /* offset to procedure descriptors */
-};
-
-struct unw_table {
- LIST_ENTRY(unw_table) ut_link;
- uint64_t ut_base;
- uint64_t ut_limit;
- struct unw_entry *ut_start;
- struct unw_entry *ut_end;
-};
-
-LIST_HEAD(unw_table_list, unw_table);
-
-static struct unw_table_list unw_tables;
-
-#ifdef KDB
-#define KDBHEAPSZ 8192
-
-struct mhdr {
- uint32_t sig;
-#define MSIG_FREE 0x65657246 /* "Free". */
-#define MSIG_USED 0x64657355 /* "Used". */
- uint32_t size;
- int32_t next;
- int32_t prev;
-};
-
-static struct mhdr *kdbheap;
-#endif /* KDB */
-
-static void *
-unw_alloc(size_t sz)
-{
-#ifdef KDB
- struct mhdr *hdr, *hfree;
-
- if (kdb_active) {
- sz = (sz + 15) >> 4;
- hdr = kdbheap;
- while (hdr->sig != MSIG_FREE || hdr->size < sz) {
- if (hdr->next == -1)
- return (NULL);
- hdr = kdbheap + hdr->next;
- }
- if (hdr->size > sz + 1) {
- hfree = hdr + sz + 1;
- hfree->sig = MSIG_FREE;
- hfree->size = hdr->size - sz - 1;
- hfree->prev = hdr - kdbheap;
- hfree->next = hdr->next;
- hdr->size = sz;
- hdr->next = hfree - kdbheap;
- if (hfree->next >= 0) {
- hfree = kdbheap + hfree->next;
- hfree->prev = hdr->next;
- }
- }
- hdr->sig = MSIG_USED;
- return (void*)(hdr + 1);
- }
-#endif
- return (malloc(sz, M_UNWIND, M_NOWAIT));
-}
-
-static void
-unw_free(void *p)
-{
-#ifdef KDB
- struct mhdr *hdr, *hfree;
-
- if (kdb_active) {
- hdr = (struct mhdr*)p - 1;
- if (hdr->sig != MSIG_USED)
- return;
- hdr->sig = MSIG_FREE;
- if (hdr->prev >= 0 && kdbheap[hdr->prev].sig == MSIG_FREE) {
- hfree = kdbheap + hdr->prev;
- hfree->size += hdr->size + 1;
- hfree->next = hdr->next;
- if (hdr->next >= 0) {
- hfree = kdbheap + hdr->next;
- hfree->prev = hdr->prev;
- }
- } else if (hdr->next >= 0 &&
- kdbheap[hdr->next].sig == MSIG_FREE) {
- hfree = kdbheap + hdr->next;
- hdr->size += hfree->size + 1;
- hdr->next = hfree->next;
- if (hdr->next >= 0) {
- hfree = kdbheap + hdr->next;
- hfree->prev = hdr - kdbheap;
- }
- }
- return;
- }
-#endif
- free(p, M_UNWIND);
-}
-
-static struct unw_table *
-unw_table_lookup(uint64_t ip)
-{
- struct unw_table *ut;
-
- LIST_FOREACH(ut, &unw_tables, ut_link) {
- if (ip >= ut->ut_base && ip < ut->ut_limit)
- return (ut);
- }
- return (NULL);
-}
-
-static uint64_t
-unw_copyin_from_frame(struct trapframe *tf, uint64_t from)
-{
- uint64_t val;
- int reg;
-
- if (from == UWX_REG_AR_PFS)
- val = tf->tf_special.pfs;
- else if (from == UWX_REG_PREDS)
- val = tf->tf_special.pr;
- else if (from == UWX_REG_AR_RNAT)
- val = tf->tf_special.rnat;
- else if (from == UWX_REG_AR_UNAT)
- val = tf->tf_special.unat;
- else if (from >= UWX_REG_GR(0) && from <= UWX_REG_GR(127)) {
- reg = from - UWX_REG_GR(0);
- if (reg == 1)
- val = tf->tf_special.gp;
- else if (reg == 12)
- val = tf->tf_special.sp;
- else if (reg == 13)
- val = tf->tf_special.tp;
- else if (reg >= 2 && reg <= 3)
- val = (&tf->tf_scratch.gr2)[reg - 2];
- else if (reg >= 8 && reg <= 11)
- val = (&tf->tf_scratch.gr8)[reg - 8];
- else if (reg >= 14 && reg <= 31)
- val = (&tf->tf_scratch.gr14)[reg - 14];
- else
- goto oops;
- } else if (from >= UWX_REG_BR(0) && from <= UWX_REG_BR(7)) {
- reg = from - UWX_REG_BR(0);
- if (reg == 0)
- val = tf->tf_special.rp;
- else if (reg >= 6 && reg <= 7)
- val = (&tf->tf_scratch.br6)[reg - 6];
- else
- goto oops;
- } else
- goto oops;
- return (val);
-
- oops:
- printf("UNW: %s(%p, %lx)\n", __func__, tf, from);
- return (0UL);
-}
-
-static uint64_t
-unw_copyin_from_pcb(struct pcb *pcb, uint64_t from)
-{
- uint64_t val;
- int reg;
-
- if (from == UWX_REG_AR_PFS)
- val = pcb->pcb_special.pfs;
- else if (from == UWX_REG_PREDS)
- val = pcb->pcb_special.pr;
- else if (from == UWX_REG_AR_RNAT)
- val = pcb->pcb_special.rnat;
- else if (from == UWX_REG_AR_UNAT)
- val = pcb->pcb_special.unat;
- else if (from >= UWX_REG_GR(0) && from <= UWX_REG_GR(127)) {
- reg = from - UWX_REG_GR(0);
- if (reg == 1)
- val = pcb->pcb_special.gp;
- else if (reg == 12)
- val = pcb->pcb_special.sp;
- else if (reg == 13)
- val = pcb->pcb_special.tp;
- else if (reg >= 4 && reg <= 7)
- val = (&pcb->pcb_preserved.gr4)[reg - 4];
- else
- goto oops;
- } else if (from >= UWX_REG_BR(0) && from <= UWX_REG_BR(7)) {
- reg = from - UWX_REG_BR(0);
- if (reg == 0)
- val = pcb->pcb_special.rp;
- else if (reg >= 1 && reg <= 5)
- val = (&pcb->pcb_preserved.br1)[reg - 1];
- else
- goto oops;
- } else
- goto oops;
- return (val);
-
- oops:
- printf("UNW: %s(%p, %lx)\n", __func__, pcb, from);
- return (0UL);
-}
-
-static int
-unw_cb_copyin(int req, char *to, uint64_t from, int len, intptr_t tok)
-{
- struct unw_regstate *rs = (void*)tok;
- uint64_t val;
-
- switch (req) {
- case UWX_COPYIN_UINFO:
- break;
- case UWX_COPYIN_MSTACK:
- *((uint64_t*)to) = *((uint64_t*)from);
- return (8);
- case UWX_COPYIN_RSTACK:
- *((uint64_t*)to) = *((uint64_t*)from);
- return (8);
- case UWX_COPYIN_REG:
- if (rs->frame != NULL)
- val = unw_copyin_from_frame(rs->frame, from);
- else if (rs->pcb != NULL)
- val = unw_copyin_from_pcb(rs->pcb, from);
- else
- goto oops;
- *((uint64_t*)to) = val;
- return (len);
- }
-
- oops:
- printf("UNW: %s(%d, %p, %lx, %d, %lx)\n", __func__, req, to, from,
- len, tok);
- return (0);
-}
-
-static int
-unw_cb_lookup(int req, uint64_t ip, intptr_t tok, uint64_t **vec)
-{
- struct unw_regstate *rs = (void*)tok;
- struct unw_table *ut;
-
- switch (req) {
- case UWX_LKUP_LOOKUP:
- ut = unw_table_lookup(ip);
- if (ut == NULL)
- return (UWX_LKUP_NOTFOUND);
- rs->keyval[0] = UWX_KEY_TBASE;
- rs->keyval[1] = ut->ut_base;
- rs->keyval[2] = UWX_KEY_USTART;
- rs->keyval[3] = (intptr_t)ut->ut_start;
- rs->keyval[4] = UWX_KEY_UEND;
- rs->keyval[5] = (intptr_t)ut->ut_end;
- rs->keyval[6] = 0;
- rs->keyval[7] = 0;
- *vec = rs->keyval;
- return (UWX_LKUP_UTABLE);
- case UWX_LKUP_FREE:
- return (0);
- }
-
- return (UWX_LKUP_ERR);
-}
-
-int
-unw_create_from_frame(struct unw_regstate *rs, struct trapframe *tf)
-{
- uint64_t bsp, ip;
- int uwxerr;
-
- rs->frame = tf;
- rs->pcb = NULL;
- rs->env = uwx_init();
- if (rs->env == NULL)
- return (ENOMEM);
-
- uwxerr = uwx_register_callbacks(rs->env, (intptr_t)rs,
- unw_cb_copyin, unw_cb_lookup);
- if (uwxerr)
- return (EINVAL); /* XXX */
-
- bsp = tf->tf_special.bspstore + tf->tf_special.ndirty;
- bsp = ia64_bsp_adjust(bsp, -IA64_CFM_SOF(tf->tf_special.cfm));
- ip = tf->tf_special.iip + ((tf->tf_special.psr >> 41) & 3);
-
- uwxerr = uwx_init_context(rs->env, ip, tf->tf_special.sp, bsp,
- tf->tf_special.cfm);
-
- return ((uwxerr) ? EINVAL : 0); /* XXX */
-}
-
-int
-unw_create_from_pcb(struct unw_regstate *rs, struct pcb *pcb)
-{
- uint64_t bsp, cfm, ip;
- int uwxerr;
-
- rs->frame = NULL;
- rs->pcb = pcb;
- rs->env = uwx_init();
- if (rs->env == NULL)
- return (ENOMEM);
-
- uwxerr = uwx_register_callbacks(rs->env, (intptr_t)rs,
- unw_cb_copyin, unw_cb_lookup);
- if (uwxerr)
- return (EINVAL); /* XXX */
-
- bsp = pcb->pcb_special.bspstore;
- if (pcb->pcb_special.__spare == ~0UL) {
- ip = pcb->pcb_special.iip + ((pcb->pcb_special.psr >> 41) & 3);
- cfm = pcb->pcb_special.cfm;
- bsp += pcb->pcb_special.ndirty;
- bsp = ia64_bsp_adjust(bsp, -IA64_CFM_SOF(cfm));
- } else {
- ip = pcb->pcb_special.rp;
- cfm = pcb->pcb_special.pfs;
- bsp = ia64_bsp_adjust(bsp, -IA64_CFM_SOL(cfm));
- }
- uwxerr = uwx_init_context(rs->env, ip, pcb->pcb_special.sp, bsp, cfm);
-
- return ((uwxerr) ? EINVAL : 0); /* XXX */
-}
-
-void
-unw_delete(struct unw_regstate *rs)
-{
-
- if (rs->env != NULL)
- uwx_free(rs->env);
-}
-
-int
-unw_step(struct unw_regstate *rs)
-{
- int err;
-
- switch (uwx_step(rs->env)) {
- case UWX_ABI_FRAME:
- err = ERESTART;
- break;
- case UWX_BOTTOM:
- err = EJUSTRETURN;
- break;
- case UWX_OK:
- err = 0;
- break;
- default:
- err = EINVAL; /* XXX */
- break;
- }
- return (err);
-}
-
-int
-unw_get_bsp(struct unw_regstate *s, uint64_t *r)
-{
- int uwxerr;
-
- uwxerr = uwx_get_reg(s->env, UWX_REG_BSP, r);
- return ((uwxerr) ? EINVAL : 0); /* XXX */
-}
-
-int
-unw_get_cfm(struct unw_regstate *s, uint64_t *r)
-{
- int uwxerr;
-
- uwxerr = uwx_get_reg(s->env, UWX_REG_CFM, r);
- return ((uwxerr) ? EINVAL : 0); /* XXX */
-}
-
-int
-unw_get_ip(struct unw_regstate *s, uint64_t *r)
-{
- int uwxerr;
-
- uwxerr = uwx_get_reg(s->env, UWX_REG_IP, r);
- return ((uwxerr) ? EINVAL : 0); /* XXX */
-}
-
-int
-unw_get_sp(struct unw_regstate *s, uint64_t *r)
-{
- int uwxerr;
-
- uwxerr = uwx_get_reg(s->env, UWX_REG_SP, r);
- return ((uwxerr) ? EINVAL : 0); /* XXX */
-}
-
-int
-unw_table_add(uint64_t base, uint64_t start, uint64_t end)
-{
- struct unw_table *ut;
-
- ut = malloc(sizeof(struct unw_table), M_UNWIND, M_WAITOK);
- ut->ut_base = base;
- ut->ut_start = (struct unw_entry*)start;
- ut->ut_end = (struct unw_entry*)end;
- ut->ut_limit = base + ut->ut_end[-1].ue_end;
- LIST_INSERT_HEAD(&unw_tables, ut, ut_link);
-
- if (bootverbose)
- printf("UNWIND: table added: base=%lx, start=%lx, end=%lx\n",
- base, start, end);
-
- return (0);
-}
-
-void
-unw_table_remove(uint64_t base)
-{
- struct unw_table *ut;
-
- ut = unw_table_lookup(base);
- if (ut != NULL) {
- LIST_REMOVE(ut, ut_link);
- free(ut, M_UNWIND);
- if (bootverbose)
- printf("UNWIND: table removed: base=%lx\n", base);
- }
-}
-
-static void
-unw_initialize(void *dummy __unused)
-{
-
- LIST_INIT(&unw_tables);
- uwx_register_alloc_cb(unw_alloc, unw_free);
-#ifdef KDB
- kdbheap = malloc(KDBHEAPSZ, M_UNWIND, M_WAITOK);
- kdbheap->sig = MSIG_FREE;
- kdbheap->size = (KDBHEAPSZ - sizeof(struct mhdr)) >> 4;
- kdbheap->next = -1;
- kdbheap->prev = -1;
-#endif
-}
-SYSINIT(unwind, SI_SUB_KMEM, SI_ORDER_ANY, unw_initialize, 0);
--- sys/ia64/ia64/efi.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/efi.c,v 1.5 2004/09/19 03:50:46 marcel Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <machine/bootinfo.h>
-#include <machine/efi.h>
-#include <machine/sal.h>
-
-extern uint64_t ia64_call_efi_physical(uint64_t, uint64_t, uint64_t, uint64_t,
- uint64_t, uint64_t);
-
-static struct efi_systbl *efi_systbl;
-static struct efi_cfgtbl *efi_cfgtbl;
-static struct efi_rt *efi_runtime;
-
-void
-efi_boot_finish(void)
-{
-}
-
-/*
- * Collect the entry points for PAL and SAL. Be extra careful about NULL
- * pointer values. We're running pre-console, so it's better to return
- * error values than to cause panics, machine checks and other traps and
- * faults. Keep this minimal...
- */
-int
-efi_boot_minimal(uint64_t systbl)
-{
- struct efi_md *md;
- efi_status status;
-
- if (systbl == 0)
- return (EINVAL);
- efi_systbl = (struct efi_systbl *)IA64_PHYS_TO_RR7(systbl);
- if (efi_systbl->st_hdr.th_sig != EFI_SYSTBL_SIG) {
- efi_systbl = NULL;
- return (EFAULT);
- }
- efi_cfgtbl = (efi_systbl->st_cfgtbl == 0) ? NULL :
- (struct efi_cfgtbl *)IA64_PHYS_TO_RR7(efi_systbl->st_cfgtbl);
- if (efi_cfgtbl == NULL)
- return (ENOENT);
- efi_runtime = (efi_systbl->st_rt == 0) ? NULL :
- (struct efi_rt *)IA64_PHYS_TO_RR7(efi_systbl->st_rt);
- if (efi_runtime == NULL)
- return (ENOENT);
-
- /*
- * Relocate runtime memory segments for firmware.
- */
- md = efi_md_first();
- while (md != NULL) {
- if (md->md_attr & EFI_MD_ATTR_RT) {
- if (md->md_attr & EFI_MD_ATTR_WB)
- md->md_virt =
- (void *)IA64_PHYS_TO_RR7(md->md_phys);
- else if (md->md_attr & EFI_MD_ATTR_UC)
- md->md_virt =
- (void *)IA64_PHYS_TO_RR6(md->md_phys);
- }
- md = efi_md_next(md);
- }
- status = ia64_call_efi_physical((uint64_t)efi_runtime->rt_setvirtual,
- bootinfo.bi_memmap_size, bootinfo.bi_memdesc_size,
- bootinfo.bi_memdesc_version, bootinfo.bi_memmap, 0);
- return ((status < 0) ? EFAULT : 0);
-}
-
-void *
-efi_get_table(struct uuid *uuid)
-{
- struct efi_cfgtbl *ct;
- u_long count;
-
- if (efi_cfgtbl == NULL)
- return (NULL);
- count = efi_systbl->st_entries;
- ct = efi_cfgtbl;
- while (count--) {
- if (!memcmp(&ct->ct_uuid, uuid, sizeof(*uuid)))
- return ((void *)IA64_PHYS_TO_RR7(ct->ct_data));
- ct++;
- }
- return (NULL);
-}
-
-void
-efi_get_time(struct efi_tm *tm)
-{
-
- efi_runtime->rt_gettime(tm, NULL);
-}
-
-struct efi_md *
-efi_md_first(void)
-{
-
- if (bootinfo.bi_memmap == 0)
- return (NULL);
- return ((struct efi_md *)IA64_PHYS_TO_RR7(bootinfo.bi_memmap));
-}
-
-struct efi_md *
-efi_md_next(struct efi_md *md)
-{
- uint64_t plim;
-
- plim = IA64_PHYS_TO_RR7(bootinfo.bi_memmap + bootinfo.bi_memmap_size);
- md = (struct efi_md *)((uintptr_t)md + bootinfo.bi_memdesc_size);
- return ((md >= (struct efi_md *)plim) ? NULL : md);
-}
-
-void
-efi_reset_system(void)
-{
-
- if (efi_runtime != NULL)
- efi_runtime->rt_reset(EFI_RESET_WARM, 0, 0, NULL);
- panic("%s: unable to reset the machine", __func__);
-}
-
-efi_status
-efi_set_time(struct efi_tm *tm)
-{
-
- return (efi_runtime->rt_settime(tm));
-}
--- sys/ia64/ia64/sys_machdep.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/sys_machdep.c,v 1.8 2003/10/27 22:54:34 marcel Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sysproto.h>
-#include <sys/sysent.h>
-
-#include <machine/cpu.h>
-#include <machine/sysarch.h>
-
-#ifndef _SYS_SYSPROTO_H_
-struct sysarch_args {
- int op;
- char *parms;
-};
-#endif
-
-int
-sysarch(struct thread *td, struct sysarch_args *uap)
-{
- struct ia64_iodesc iod;
- int error;
-
- error = 0;
- switch(uap->op) {
- case IA64_IORD:
- copyin(uap->parms, &iod, sizeof(iod));
- switch (iod.width) {
- case 1:
- iod.val = inb(iod.port);
- break;
- case 2:
- if (iod.port & 1) {
- iod.val = inb(iod.port);
- iod.val |= inb(iod.port + 1) << 8;
- } else
- iod.val = inw(iod.port);
- break;
- case 4:
- if (iod.port & 3) {
- if (iod.port & 1) {
- iod.val = inb(iod.port);
- iod.val |= inw(iod.port + 1) << 8;
- iod.val |= inb(iod.port + 3) << 24;
- } else {
- iod.val = inw(iod.port);
- iod.val |= inw(iod.port + 2) << 16;
- }
- } else
- iod.val = inl(iod.port);
- break;
- default:
- error = EINVAL;
- }
- copyout(&iod, uap->parms, sizeof(iod));
- break;
- case IA64_IOWR:
- copyin(uap->parms, &iod, sizeof(iod));
- switch (iod.width) {
- case 1:
- outb(iod.port, iod.val);
- break;
- case 2:
- if (iod.port & 1) {
- outb(iod.port, iod.val);
- outb(iod.port + 1, iod.val >> 8);
- } else
- outw(iod.port, iod.val);
- break;
- case 4:
- if (iod.port & 3) {
- if (iod.port & 1) {
- outb(iod.port, iod.val);
- outw(iod.port + 1, iod.val >> 8);
- outb(iod.port + 3, iod.val >> 24);
- } else {
- outw(iod.port, iod.val);
- outw(iod.port + 2, iod.val >> 16);
- }
- } else
- outl(iod.port, iod.val);
- break;
- default:
- error = EINVAL;
- }
- break;
- default:
- error = EINVAL;
- break;
- }
- return (error);
-}
--- sys/ia64/ia64/uio_machdep.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*-
- * Copyright (c) 2004 Alan L. Cox <alc at cs.rice.edu>
- * Copyright (c) 1982, 1986, 1991, 1993
- * The Regents of the University of California. All rights reserved.
- * (c) UNIX System Laboratories, Inc.
- * All or some portions of this file are derived from material licensed
- * to the University of California by American Telephone and Telegraph
- * Co. or Unix System Laboratories, Inc. and are reproduced herein with
- * the permission of UNIX System Laboratories, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)kern_subr.c 8.3 (Berkeley) 1/21/94
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/uio_machdep.c,v 1.5 2005/01/06 22:18:22 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/systm.h>
-#include <sys/uio.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <machine/vmparam.h>
-
-/*
- * Implement uiomove(9) from physical memory using the direct map to
- * avoid the creation and destruction of ephemeral mappings.
- */
-int
-uiomove_fromphys(vm_page_t ma[], vm_offset_t offset, int n, struct uio *uio)
-{
- struct thread *td = curthread;
- struct iovec *iov;
- void *cp;
- vm_offset_t page_offset;
- size_t cnt;
- int error = 0;
- int save = 0;
-
- KASSERT(uio->uio_rw == UIO_READ || uio->uio_rw == UIO_WRITE,
- ("uiomove_fromphys: mode"));
- KASSERT(uio->uio_segflg != UIO_USERSPACE || uio->uio_td == curthread,
- ("uiomove_fromphys proc"));
- save = td->td_pflags & TDP_DEADLKTREAT;
- td->td_pflags |= TDP_DEADLKTREAT;
- while (n > 0 && uio->uio_resid) {
- iov = uio->uio_iov;
- cnt = iov->iov_len;
- if (cnt == 0) {
- uio->uio_iov++;
- uio->uio_iovcnt--;
- continue;
- }
- if (cnt > n)
- cnt = n;
- page_offset = offset & PAGE_MASK;
- cnt = min(cnt, PAGE_SIZE - page_offset);
- cp = (char *)
- IA64_PHYS_TO_RR7(ma[offset >> PAGE_SHIFT]->phys_addr) +
- page_offset;
- switch (uio->uio_segflg) {
- case UIO_USERSPACE:
- if (ticks - PCPU_GET(switchticks) >= hogticks)
- uio_yield();
- if (uio->uio_rw == UIO_READ)
- error = copyout(cp, iov->iov_base, cnt);
- else
- error = copyin(iov->iov_base, cp, cnt);
- if (error)
- goto out;
- break;
- case UIO_SYSSPACE:
- if (uio->uio_rw == UIO_READ)
- bcopy(cp, iov->iov_base, cnt);
- else
- bcopy(iov->iov_base, cp, cnt);
- break;
- case UIO_NOCOPY:
- break;
- }
- iov->iov_base = (char *)iov->iov_base + cnt;
- iov->iov_len -= cnt;
- uio->uio_resid -= cnt;
- uio->uio_offset += cnt;
- offset += cnt;
- n -= cnt;
- }
-out:
- if (save == 0)
- td->td_pflags &= ~TDP_DEADLKTREAT;
- return (error);
-}
--- sys/ia64/ia64/ssc.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/*-
- * Copyright (c) 2000 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/ssc.c,v 1.24 2004/10/18 21:51:26 phk Exp $
- */
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/cons.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/systm.h>
-#include <sys/tty.h>
-#include <machine/md_var.h>
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-#include <vm/vm_object.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_pageout.h>
-#include <vm/vm_pager.h>
-
-#define SSC_GETCHAR 21
-#define SSC_PUTCHAR 31
-
-#define SSC_POLL_HZ 50
-
-static d_open_t sscopen;
-static d_close_t sscclose;
-
-static struct cdevsw ssc_cdevsw = {
- .d_version = D_VERSION,
- .d_open = sscopen,
- .d_close = sscclose,
- .d_name = "ssc",
- .d_flags = D_TTY | D_NEEDGIANT,
-};
-
-static struct tty *ssc_tp = NULL;
-static int polltime;
-static struct callout_handle ssctimeouthandle
- = CALLOUT_HANDLE_INITIALIZER(&ssctimeouthandle);
-
-static void sscstart(struct tty *);
-static void ssctimeout(void *);
-static int sscparam(struct tty *, struct termios *);
-static void sscstop(struct tty *, int);
-
-static u_int64_t
-ssc(u_int64_t in0, u_int64_t in1, u_int64_t in2, u_int64_t in3, int which)
-{
- register u_int64_t ret0 __asm("r8");
-
- __asm __volatile("mov r15=%1\n\t"
- "break 0x80001"
- : "=r"(ret0)
- : "r"(which), "r"(in0), "r"(in1), "r"(in2), "r"(in3));
- return ret0;
-}
-
-static void
-ssccnprobe(struct consdev *cp)
-{
- sprintf(cp->cn_name, "ssccons");
- cp->cn_pri = CN_INTERNAL;
-}
-
-static void
-ssccninit(struct consdev *cp)
-{
-}
-
-static void
-ssccnattach(void *arg)
-{
- make_dev(&ssc_cdevsw, 0, UID_ROOT, GID_WHEEL, 0600, "ssccons");
-}
-SYSINIT(ssccnattach, SI_SUB_DRIVERS, SI_ORDER_ANY, ssccnattach, 0);
-
-static void
-ssccnputc(struct consdev *cp, int c)
-{
- ssc(c, 0, 0, 0, SSC_PUTCHAR);
-}
-
-static int
-ssccngetc(struct consdev *cp)
-{
- int c;
- do {
- c = ssc(0, 0, 0, 0, SSC_GETCHAR);
- } while (c == 0);
-
- return c;
-}
-
-static int
-ssccncheckc(struct consdev *cp)
-{
- int c;
- c = ssc(0, 0, 0, 0, SSC_GETCHAR);
- if (!c)
- return -1;
- return c;
-}
-
-static int
-sscopen(struct cdev *dev, int flag, int mode, struct thread *td)
-{
- struct tty *tp;
- int s;
- int error = 0, setuptimeout = 0;
-
- tp = ssc_tp = dev->si_tty = ttymalloc(ssc_tp);
-
- s = spltty();
- tp->t_oproc = sscstart;
- tp->t_param = sscparam;
- tp->t_stop = sscstop;
- tp->t_dev = dev;
- if ((tp->t_state & TS_ISOPEN) == 0) {
- tp->t_state |= TS_CARR_ON;
- ttyconsolemode(tp, 0);
- ttsetwater(tp);
-
- setuptimeout = 1;
- } else if ((tp->t_state & TS_XCLUDE) && suser(td)) {
- splx(s);
- return EBUSY;
- }
-
- splx(s);
-
- error = ttyld_open(tp, dev);
-
- if (error == 0 && setuptimeout) {
- polltime = hz / SSC_POLL_HZ;
- if (polltime < 1)
- polltime = 1;
- ssctimeouthandle = timeout(ssctimeout, tp, polltime);
- }
- return error;
-}
-
-static int
-sscclose(struct cdev *dev, int flag, int mode, struct thread *td)
-{
- int unit = minor(dev);
- struct tty *tp = ssc_tp;
-
- if (unit != 0)
- return ENXIO;
-
- untimeout(ssctimeout, tp, ssctimeouthandle);
- ttyld_close(tp, flag);
- tty_close(tp);
- return 0;
-}
-
-static int
-sscparam(struct tty *tp, struct termios *t)
-{
-
- return 0;
-}
-
-static void
-sscstart(struct tty *tp)
-{
- int s;
-
- s = spltty();
-
- if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
- ttwwakeup(tp);
- splx(s);
- return;
- }
-
- tp->t_state |= TS_BUSY;
- while (tp->t_outq.c_cc != 0)
- ssccnputc(NULL, getc(&tp->t_outq));
- tp->t_state &= ~TS_BUSY;
-
- ttwwakeup(tp);
- splx(s);
-}
-
-/*
- * Stop output on a line.
- */
-static void
-sscstop(struct tty *tp, int flag)
-{
- int s;
-
- s = spltty();
- if (tp->t_state & TS_BUSY)
- if ((tp->t_state & TS_TTSTOP) == 0)
- tp->t_state |= TS_FLUSH;
- splx(s);
-}
-
-static void
-ssctimeout(void *v)
-{
- struct tty *tp = v;
- int c;
-
- while ((c = ssccncheckc(NULL)) != -1) {
- if (tp->t_state & TS_ISOPEN)
- ttyld_rint(tp, c);
- }
- ssctimeouthandle = timeout(ssctimeout, tp, polltime);
-}
-
-CONS_DRIVER(ssc, ssccnprobe, ssccninit, NULL, ssccngetc, ssccncheckc, ssccnputc, NULL);
--- sys/ia64/ia64/machdep.c
+++ /dev/null
@@ -1,1510 +0,0 @@
-/*-
- * Copyright (c) 2003,2004 Marcel Moolenaar
- * Copyright (c) 2000,2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/machdep.c,v 1.200.2.3 2006/03/07 18:08:09 jhb Exp $");
-
-#include "opt_compat.h"
-#include "opt_ddb.h"
-#include "opt_kstack_pages.h"
-#include "opt_msgbuf.h"
-
-#include <sys/param.h>
-#include <sys/proc.h>
-#include <sys/systm.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/cpu.h>
-#include <sys/eventhandler.h>
-#include <sys/exec.h>
-#include <sys/imgact.h>
-#include <sys/kdb.h>
-#include <sys/kernel.h>
-#include <sys/linker.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mbuf.h>
-#include <sys/msgbuf.h>
-#include <sys/pcpu.h>
-#include <sys/ptrace.h>
-#include <sys/random.h>
-#include <sys/reboot.h>
-#include <sys/sched.h>
-#include <sys/signalvar.h>
-#include <sys/syscall.h>
-#include <sys/sysctl.h>
-#include <sys/sysproto.h>
-#include <sys/ucontext.h>
-#include <sys/uio.h>
-#include <sys/uuid.h>
-#include <sys/vmmeter.h>
-#include <sys/vnode.h>
-
-#include <ddb/ddb.h>
-
-#include <net/netisr.h>
-
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-#include <vm/vm_object.h>
-#include <vm/vm_pager.h>
-
-#include <machine/bootinfo.h>
-#include <machine/clock.h>
-#include <machine/cpu.h>
-#include <machine/efi.h>
-#include <machine/elf.h>
-#include <machine/fpu.h>
-#include <machine/mca.h>
-#include <machine/md_var.h>
-#include <machine/mutex.h>
-#include <machine/pal.h>
-#include <machine/pcb.h>
-#include <machine/reg.h>
-#include <machine/sal.h>
-#include <machine/sigframe.h>
-#ifdef SMP
-#include <machine/smp.h>
-#endif
-#include <machine/unwind.h>
-#include <machine/vmparam.h>
-
-#include <i386/include/specialreg.h>
-
-u_int64_t processor_frequency;
-u_int64_t bus_frequency;
-u_int64_t itc_frequency;
-int cold = 1;
-
-u_int64_t pa_bootinfo;
-struct bootinfo bootinfo;
-
-struct pcpu early_pcpu;
-extern char kstack[];
-vm_offset_t proc0kstack;
-
-extern u_int64_t kernel_text[], _end[];
-
-extern u_int64_t ia64_gateway_page[];
-extern u_int64_t break_sigtramp[];
-extern u_int64_t epc_sigtramp[];
-
-struct fpswa_iface *fpswa_iface;
-
-u_int64_t ia64_pal_base;
-u_int64_t ia64_port_base;
-
-char machine[] = MACHINE;
-SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
-
-static char cpu_model[64];
-SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0,
- "The CPU model name");
-
-static char cpu_family[64];
-SYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0,
- "The CPU family name");
-
-#ifdef DDB
-extern vm_offset_t ksym_start, ksym_end;
-#endif
-
-static void cpu_startup(void *);
-SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
-
-struct msgbuf *msgbufp=0;
-
-long Maxmem = 0;
-long realmem = 0;
-
-vm_offset_t phys_avail[100];
-
-/* must be 2 less so 0 0 can signal end of chunks */
-#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
-
-void mi_startup(void); /* XXX should be in a MI header */
-
-struct kva_md_info kmi;
-
-#define Mhz 1000000L
-#define Ghz (1000L*Mhz)
-
-static void
-identifycpu(void)
-{
- char vendor[17];
- char *family_name, *model_name;
- u_int64_t features, tmp;
- int number, revision, model, family, archrev;
-
- /*
- * Assumes little-endian.
- */
- *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0);
- *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1);
- vendor[16] = '\0';
-
- tmp = ia64_get_cpuid(3);
- number = (tmp >> 0) & 0xff;
- revision = (tmp >> 8) & 0xff;
- model = (tmp >> 16) & 0xff;
- family = (tmp >> 24) & 0xff;
- archrev = (tmp >> 32) & 0xff;
-
- family_name = model_name = "unknown";
- switch (family) {
- case 0x07:
- family_name = "Itanium";
- model_name = "Merced";
- break;
- case 0x1f:
- family_name = "Itanium 2";
- switch (model) {
- case 0x00:
- model_name = "McKinley";
- break;
- case 0x01:
- /*
- * Deerfield is a low-voltage variant based on the
- * Madison core. We need circumstantial evidence
- * (i.e. the clock frequency) to identify those.
- * Allow for roughly 1% error margin.
- */
- tmp = processor_frequency >> 7;
- if ((processor_frequency - tmp) < 1*Ghz &&
- (processor_frequency + tmp) >= 1*Ghz)
- model_name = "Deerfield";
- else
- model_name = "Madison";
- break;
- case 0x02:
- model_name = "Madison II";
- break;
- }
- break;
- }
- snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
- snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
-
- features = ia64_get_cpuid(4);
-
- printf("CPU: %s (", model_name);
- if (processor_frequency) {
- printf("%ld.%02ld-Mhz ",
- (processor_frequency + 4999) / Mhz,
- ((processor_frequency + 4999) / (Mhz/100)) % 100);
- }
- printf("%s)\n", family_name);
- printf(" Origin = \"%s\" Revision = %d\n", vendor, revision);
- printf(" Features = 0x%b\n", (u_int32_t) features,
- "\020"
- "\001LB" /* long branch (brl) instruction. */
- "\002SD" /* Spontaneous deferral. */
- "\003AO" /* 16-byte atomic operations (ld, st, cmpxchg). */ );
-}
-
-static void
-cpu_startup(dummy)
- void *dummy;
-{
-
- /*
- * Good {morning,afternoon,evening,night}.
- */
- identifycpu();
-
- /* startrtclock(); */
-#ifdef PERFMON
- perfmon_init();
-#endif
- printf("real memory = %ld (%ld MB)\n", ia64_ptob(Maxmem),
- ia64_ptob(Maxmem) / 1048576);
- realmem = Maxmem;
-
- /*
- * Display any holes after the first chunk of extended memory.
- */
- if (bootverbose) {
- int indx;
-
- printf("Physical memory chunk(s):\n");
- for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
- int size1 = phys_avail[indx + 1] - phys_avail[indx];
-
- printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx],
- phys_avail[indx + 1] - 1, size1, size1 / PAGE_SIZE);
- }
- }
-
- vm_ksubmap_init(&kmi);
-
- printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
- ptoa(cnt.v_free_count) / 1048576);
-
- if (fpswa_iface == NULL)
- printf("Warning: no FPSWA package supplied\n");
- else
- printf("FPSWA Revision = 0x%lx, Entry = %p\n",
- (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
-
- /*
- * Set up buffers, so they can be used to read disk labels.
- */
- bufinit();
- vm_pager_bufferinit();
-
- /*
- * Traverse the MADT to discover IOSAPIC and Local SAPIC
- * information.
- */
- ia64_probe_sapics();
- ia64_mca_init();
-}
-
-void
-cpu_boot(int howto)
-{
-
- efi_reset_system();
-}
-
-/* Get current clock frequency for the given cpu id. */
-int
-cpu_est_clockrate(int cpu_id, uint64_t *rate)
-{
-
- if (pcpu_find(cpu_id) == NULL || rate == NULL)
- return (EINVAL);
- *rate = processor_frequency;
- return (0);
-}
-
-void
-cpu_halt()
-{
-
- efi_reset_system();
-}
-
-static void
-cpu_idle_default(void)
-{
- struct ia64_pal_result res;
-
- res = ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
-}
-
-void
-cpu_idle()
-{
- (*cpu_idle_hook)();
-}
-
-/* Other subsystems (e.g., ACPI) can hook this later. */
-void (*cpu_idle_hook)(void) = cpu_idle_default;
-
-void
-cpu_reset()
-{
-
- cpu_boot(0);
-}
-
-void
-cpu_switch(struct thread *old, struct thread *new)
-{
- struct pcb *oldpcb, *newpcb;
-
- oldpcb = old->td_pcb;
-#if COMPAT_IA32
- ia32_savectx(oldpcb);
-#endif
- if (PCPU_GET(fpcurthread) == old)
- old->td_frame->tf_special.psr |= IA64_PSR_DFH;
- if (!savectx(oldpcb)) {
- newpcb = new->td_pcb;
- oldpcb->pcb_current_pmap =
- pmap_switch(newpcb->pcb_current_pmap);
- PCPU_SET(curthread, new);
-#if COMPAT_IA32
- ia32_restorectx(newpcb);
-#endif
- if (PCPU_GET(fpcurthread) == new)
- new->td_frame->tf_special.psr &= ~IA64_PSR_DFH;
- restorectx(newpcb);
- /* We should not get here. */
- panic("cpu_switch: restorectx() returned");
- /* NOTREACHED */
- }
-}
-
-void
-cpu_throw(struct thread *old __unused, struct thread *new)
-{
- struct pcb *newpcb;
-
- newpcb = new->td_pcb;
- (void)pmap_switch(newpcb->pcb_current_pmap);
- PCPU_SET(curthread, new);
-#if COMPAT_IA32
- ia32_restorectx(newpcb);
-#endif
- restorectx(newpcb);
- /* We should not get here. */
- panic("cpu_throw: restorectx() returned");
- /* NOTREACHED */
-}
-
-void
-cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
-{
- size_t pcpusz;
-
- /*
- * Make sure the PCB is 16-byte aligned by making the PCPU
- * a multiple of 16 bytes. We assume the PCPU is 16-byte
- * aligned itself.
- */
- pcpusz = (sizeof(struct pcpu) + 15) & ~15;
- KASSERT(size >= pcpusz + sizeof(struct pcb),
- ("%s: too small an allocation for pcpu", __func__));
- pcpu->pc_pcb = (struct pcb *)((char*)pcpu + pcpusz);
- pcpu->pc_acpi_id = cpuid;
-}
-
-void
-spinlock_enter(void)
-{
- struct thread *td;
-
- td = curthread;
- if (td->td_md.md_spinlock_count == 0)
- td->td_md.md_saved_intr = intr_disable();
- td->td_md.md_spinlock_count++;
- critical_enter();
-}
-
-void
-spinlock_exit(void)
-{
- struct thread *td;
-
- td = curthread;
- critical_exit();
- td->td_md.md_spinlock_count--;
- if (td->td_md.md_spinlock_count == 0)
- intr_restore(td->td_md.md_saved_intr);
-}
-
-void
-map_pal_code(void)
-{
- pt_entry_t pte;
- uint64_t psr;
-
- if (ia64_pal_base == 0)
- return;
-
- pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
- PTE_PL_KERN | PTE_AR_RWX;
- pte |= ia64_pal_base & PTE_PPN_MASK;
-
- __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
- "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2));
-
- __asm __volatile("mov %0=psr" : "=r"(psr));
- __asm __volatile("rsm psr.ic|psr.i");
- __asm __volatile("srlz.i");
- __asm __volatile("mov cr.ifa=%0" ::
- "r"(IA64_PHYS_TO_RR7(ia64_pal_base)));
- __asm __volatile("mov cr.itir=%0" :: "r"(IA64_ID_PAGE_SHIFT << 2));
- __asm __volatile("itr.d dtr[%0]=%1" :: "r"(1), "r"(pte));
- __asm __volatile("srlz.d"); /* XXX not needed. */
- __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte));
- __asm __volatile("mov psr.l=%0" :: "r" (psr));
- __asm __volatile("srlz.i");
-}
-
-void
-map_gateway_page(void)
-{
- pt_entry_t pte;
- uint64_t psr;
-
- pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
- PTE_PL_KERN | PTE_AR_X_RX;
- pte |= (uint64_t)ia64_gateway_page & PTE_PPN_MASK;
-
- __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
- "r"(VM_MAX_ADDRESS), "r"(PAGE_SHIFT << 2));
-
- __asm __volatile("mov %0=psr" : "=r"(psr));
- __asm __volatile("rsm psr.ic|psr.i");
- __asm __volatile("srlz.i");
- __asm __volatile("mov cr.ifa=%0" :: "r"(VM_MAX_ADDRESS));
- __asm __volatile("mov cr.itir=%0" :: "r"(PAGE_SHIFT << 2));
- __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte));
- __asm __volatile("srlz.d"); /* XXX not needed. */
- __asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(pte));
- __asm __volatile("mov psr.l=%0" :: "r" (psr));
- __asm __volatile("srlz.i");
-
- /* Expose the mapping to userland in ar.k5 */
- ia64_set_k5(VM_MAX_ADDRESS);
-}
-
-static void
-calculate_frequencies(void)
-{
- struct ia64_sal_result sal;
- struct ia64_pal_result pal;
-
- sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0);
- pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0);
-
- if (sal.sal_status == 0 && pal.pal_status == 0) {
- if (bootverbose) {
- printf("Platform clock frequency %ld Hz\n",
- sal.sal_result[0]);
- printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, "
- "ITC ratio %ld/%ld\n",
- pal.pal_result[0] >> 32,
- pal.pal_result[0] & ((1L << 32) - 1),
- pal.pal_result[1] >> 32,
- pal.pal_result[1] & ((1L << 32) - 1),
- pal.pal_result[2] >> 32,
- pal.pal_result[2] & ((1L << 32) - 1));
- }
- processor_frequency =
- sal.sal_result[0] * (pal.pal_result[0] >> 32)
- / (pal.pal_result[0] & ((1L << 32) - 1));
- bus_frequency =
- sal.sal_result[0] * (pal.pal_result[1] >> 32)
- / (pal.pal_result[1] & ((1L << 32) - 1));
- itc_frequency =
- sal.sal_result[0] * (pal.pal_result[2] >> 32)
- / (pal.pal_result[2] & ((1L << 32) - 1));
- }
-}
-
-void
-ia64_init(void)
-{
- int phys_avail_cnt;
- vm_offset_t kernstart, kernend;
- vm_offset_t kernstartpfn, kernendpfn, pfn0, pfn1;
- char *p;
- struct efi_md *md;
- int metadata_missing;
-
- /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */
-
- /*
- * TODO: Disable interrupts, floating point etc.
- * Maybe flush cache and tlb
- */
- ia64_set_fpsr(IA64_FPSR_DEFAULT);
-
- /*
- * TODO: Get critical system information (if possible, from the
- * information provided by the boot program).
- */
-
- /*
- * pa_bootinfo is the physical address of the bootinfo block as
- * passed to us by the loader and set in locore.s.
- */
- bootinfo = *(struct bootinfo *)(IA64_PHYS_TO_RR7(pa_bootinfo));
-
- if (bootinfo.bi_magic != BOOTINFO_MAGIC || bootinfo.bi_version != 1) {
- bzero(&bootinfo, sizeof(bootinfo));
- bootinfo.bi_kernend = (vm_offset_t) round_page(_end);
- }
-
- /*
- * Look for the I/O ports first - we need them for console
- * probing.
- */
- for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
- switch (md->md_type) {
- case EFI_MD_TYPE_IOPORT:
- ia64_port_base = IA64_PHYS_TO_RR6(md->md_phys);
- break;
- case EFI_MD_TYPE_PALCODE:
- ia64_pal_base = md->md_phys;
- break;
- }
- }
-
- metadata_missing = 0;
- if (bootinfo.bi_modulep)
- preload_metadata = (caddr_t)bootinfo.bi_modulep;
- else
- metadata_missing = 1;
- if (envmode == 1)
- kern_envp = static_env;
- else
- kern_envp = (caddr_t)bootinfo.bi_envp;
-
- /*
- * Look at arguments passed to us and compute boothowto.
- */
- boothowto = bootinfo.bi_boothowto;
-
- /*
- * Catch case of boot_verbose set in environment.
- */
- if ((p = getenv("boot_verbose")) != NULL) {
- if (strcmp(p, "yes") == 0 || strcmp(p, "YES") == 0) {
- boothowto |= RB_VERBOSE;
- }
- freeenv(p);
- }
-
- if (boothowto & RB_VERBOSE)
- bootverbose = 1;
-
- /*
- * Initialize the console before we print anything out.
- */
- cninit();
-
- /* OUTPUT NOW ALLOWED */
-
- if (ia64_pal_base != 0) {
- ia64_pal_base &= ~IA64_ID_PAGE_MASK;
- /*
- * We use a TR to map the first 256M of memory - this might
- * cover the palcode too.
- */
- if (ia64_pal_base == 0)
- printf("PAL code mapped by the kernel's TR\n");
- } else
- printf("PAL code not found\n");
-
- /*
- * Wire things up so we can call the firmware.
- */
- map_pal_code();
- efi_boot_minimal(bootinfo.bi_systab);
- ia64_sal_init();
- calculate_frequencies();
-
- /*
- * Find the beginning and end of the kernel.
- */
- kernstart = trunc_page(kernel_text);
-#ifdef DDB
- ksym_start = bootinfo.bi_symtab;
- ksym_end = bootinfo.bi_esymtab;
- kernend = (vm_offset_t)round_page(ksym_end);
-#else
- kernend = (vm_offset_t)round_page(_end);
-#endif
-
- /* But if the bootstrap tells us otherwise, believe it! */
- if (bootinfo.bi_kernend)
- kernend = round_page(bootinfo.bi_kernend);
- if (metadata_missing)
- printf("WARNING: loader(8) metadata is missing!\n");
-
- /* Get FPSWA interface */
- fpswa_iface = (bootinfo.bi_fpswa == 0) ? NULL :
- (struct fpswa_iface *)IA64_PHYS_TO_RR7(bootinfo.bi_fpswa);
-
- /* Init basic tunables, including hz */
- init_param1();
-
- p = getenv("kernelname");
- if (p) {
- strncpy(kernelname, p, sizeof(kernelname) - 1);
- freeenv(p);
- }
-
- kernstartpfn = atop(IA64_RR_MASK(kernstart));
- kernendpfn = atop(IA64_RR_MASK(kernend));
-
- /*
- * Size the memory regions and load phys_avail[] with the results.
- */
-
- /*
- * Find out how much memory is available, by looking at
- * the memory descriptors.
- */
-
-#ifdef DEBUG_MD
- printf("Memory descriptor count: %d\n", mdcount);
-#endif
-
- phys_avail_cnt = 0;
- for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
-#ifdef DEBUG_MD
- printf("MD %p: type %d pa 0x%lx cnt 0x%lx\n", md,
- md->md_type, md->md_phys, md->md_pages);
-#endif
-
- pfn0 = ia64_btop(round_page(md->md_phys));
- pfn1 = ia64_btop(trunc_page(md->md_phys + md->md_pages * 4096));
- if (pfn1 <= pfn0)
- continue;
-
- if (md->md_type != EFI_MD_TYPE_FREE)
- continue;
-
- /*
- * Wimp out for now since we do not DTRT here with
- * pci bus mastering (no bounce buffering, for example).
- */
- if (pfn0 >= ia64_btop(0x100000000UL)) {
- printf("Skipping memory chunk start 0x%lx\n",
- md->md_phys);
- continue;
- }
- if (pfn1 >= ia64_btop(0x100000000UL)) {
- printf("Skipping memory chunk end 0x%lx\n",
- md->md_phys + md->md_pages * 4096);
- continue;
- }
-
- /*
- * We have a memory descriptor that describes conventional
- * memory that is for general use. We must determine if the
- * loader has put the kernel in this region.
- */
- physmem += (pfn1 - pfn0);
- if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) {
- /*
- * Must compute the location of the kernel
- * within the segment.
- */
-#ifdef DEBUG_MD
- printf("Descriptor %p contains kernel\n", mp);
-#endif
- if (pfn0 < kernstartpfn) {
- /*
- * There is a chunk before the kernel.
- */
-#ifdef DEBUG_MD
- printf("Loading chunk before kernel: "
- "0x%lx / 0x%lx\n", pfn0, kernstartpfn);
-#endif
- phys_avail[phys_avail_cnt] = ia64_ptob(pfn0);
- phys_avail[phys_avail_cnt+1] = ia64_ptob(kernstartpfn);
- phys_avail_cnt += 2;
- }
- if (kernendpfn < pfn1) {
- /*
- * There is a chunk after the kernel.
- */
-#ifdef DEBUG_MD
- printf("Loading chunk after kernel: "
- "0x%lx / 0x%lx\n", kernendpfn, pfn1);
-#endif
- phys_avail[phys_avail_cnt] = ia64_ptob(kernendpfn);
- phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1);
- phys_avail_cnt += 2;
- }
- } else {
- /*
- * Just load this cluster as one chunk.
- */
-#ifdef DEBUG_MD
- printf("Loading descriptor %d: 0x%lx / 0x%lx\n", i,
- pfn0, pfn1);
-#endif
- phys_avail[phys_avail_cnt] = ia64_ptob(pfn0);
- phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1);
- phys_avail_cnt += 2;
-
- }
- }
- phys_avail[phys_avail_cnt] = 0;
-
- Maxmem = physmem;
- init_param2(physmem);
-
- /*
- * Initialize error message buffer (at end of core).
- */
- msgbufp = (struct msgbuf *)pmap_steal_memory(MSGBUF_SIZE);
- msgbufinit(msgbufp, MSGBUF_SIZE);
-
- proc_linkup(&proc0, &ksegrp0, &thread0);
- /*
- * Init mapping for kernel stack for proc 0
- */
- proc0kstack = (vm_offset_t)kstack;
- thread0.td_kstack = proc0kstack;
- thread0.td_kstack_pages = KSTACK_PAGES;
-
- /*
- * Setup the global data for the bootstrap cpu.
- */
- pcpup = (struct pcpu *)pmap_steal_memory(PAGE_SIZE);
- ia64_set_k4((u_int64_t)pcpup);
- pcpu_init(pcpup, 0, PAGE_SIZE);
- PCPU_SET(curthread, &thread0);
-
- mutex_init();
-
- /*
- * Initialize the rest of proc 0's PCB.
- *
- * Set the kernel sp, reserving space for an (empty) trapframe,
- * and make proc0's trapframe pointer point to it for sanity.
- * Initialise proc0's backing store to start after u area.
- */
- cpu_thread_setup(&thread0);
- thread0.td_frame->tf_flags = FRAME_SYSCALL;
- thread0.td_pcb->pcb_special.sp =
- (u_int64_t)thread0.td_frame - 16;
- thread0.td_pcb->pcb_special.bspstore = thread0.td_kstack;
-
- /*
- * Initialize the virtual memory system.
- */
- pmap_bootstrap();
-
- /*
- * Initialize debuggers, and break into them if appropriate.
- */
- kdb_init();
-
-#ifdef KDB
- if (boothowto & RB_KDB)
- kdb_enter("Boot flags requested debugger\n");
-#endif
-
- ia64_set_tpr(0);
-
- /*
- * Save our current context so that we have a known (maybe even
- * sane) context as the initial context for new threads that are
- * forked from us. If any of those threads (including thread0)
- * does something wrong, we may be lucky and return here where
- * we're ready for them with a nice panic.
- */
- if (!savectx(thread0.td_pcb))
- mi_startup();
-
- /* We should not get here. */
- panic("ia64_init: Whooaa there!");
- /* NOTREACHED */
-}
-
-uint64_t
-ia64_get_hcdp(void)
-{
-
- return (bootinfo.bi_hcdp);
-}
-
-void
-bzero(void *buf, size_t len)
-{
- caddr_t p = buf;
-
- while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
- *p++ = 0;
- len--;
- }
- while (len >= sizeof(u_long) * 8) {
- *(u_long*) p = 0;
- *((u_long*) p + 1) = 0;
- *((u_long*) p + 2) = 0;
- *((u_long*) p + 3) = 0;
- len -= sizeof(u_long) * 8;
- *((u_long*) p + 4) = 0;
- *((u_long*) p + 5) = 0;
- *((u_long*) p + 6) = 0;
- *((u_long*) p + 7) = 0;
- p += sizeof(u_long) * 8;
- }
- while (len >= sizeof(u_long)) {
- *(u_long*) p = 0;
- len -= sizeof(u_long);
- p += sizeof(u_long);
- }
- while (len) {
- *p++ = 0;
- len--;
- }
-}
-
-void
-DELAY(int n)
-{
- u_int64_t start, end, now;
-
- start = ia64_get_itc();
- end = start + (itc_frequency * n) / 1000000;
- /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */
- do {
- now = ia64_get_itc();
- } while (now < end || (now > start && end < start));
-}
-
-/*
- * Send an interrupt (signal) to a process.
- */
-void
-sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
-{
- struct proc *p;
- struct thread *td;
- struct trapframe *tf;
- struct sigacts *psp;
- struct sigframe sf, *sfp;
- u_int64_t sbs, sp;
- int oonstack;
-
- td = curthread;
- p = td->td_proc;
- PROC_LOCK_ASSERT(p, MA_OWNED);
- psp = p->p_sigacts;
- mtx_assert(&psp->ps_mtx, MA_OWNED);
- tf = td->td_frame;
- sp = tf->tf_special.sp;
- oonstack = sigonstack(sp);
- sbs = 0;
-
- /* save user context */
- bzero(&sf, sizeof(struct sigframe));
- sf.sf_uc.uc_sigmask = *mask;
- sf.sf_uc.uc_stack = td->td_sigstk;
- sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
- ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
-
- /*
- * Allocate and validate space for the signal handler
- * context. Note that if the stack is in P0 space, the
- * call to grow() is a nop, and the useracc() check
- * will fail if the process has not already allocated
- * the space with a `brk'.
- */
- if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
- SIGISMEMBER(psp->ps_sigonstack, sig)) {
- sbs = (u_int64_t)td->td_sigstk.ss_sp;
- sbs = (sbs + 15) & ~15;
- sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size);
-#if defined(COMPAT_43)
- td->td_sigstk.ss_flags |= SS_ONSTACK;
-#endif
- } else
- sfp = (struct sigframe *)sp;
- sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15);
-
- /* Fill in the siginfo structure for POSIX handlers. */
- if (SIGISMEMBER(psp->ps_siginfo, sig)) {
- sf.sf_si.si_signo = sig;
- sf.sf_si.si_code = code;
- sf.sf_si.si_addr = (void*)tf->tf_special.ifa;
- code = (u_int64_t)&sfp->sf_si;
- }
-
- mtx_unlock(&psp->ps_mtx);
- PROC_UNLOCK(p);
-
- get_mcontext(td, &sf.sf_uc.uc_mcontext, 0);
-
- /* Copy the frame out to userland. */
- if (copyout(&sf, sfp, sizeof(sf)) != 0) {
- /*
- * Process has trashed its stack; give it an illegal
- * instruction to halt it in its tracks.
- */
- PROC_LOCK(p);
- sigexit(td, SIGILL);
- return;
- }
-
- if ((tf->tf_flags & FRAME_SYSCALL) == 0) {
- tf->tf_special.psr &= ~IA64_PSR_RI;
- tf->tf_special.iip = ia64_get_k5() +
- ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page);
- } else
- tf->tf_special.iip = ia64_get_k5() +
- ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page);
-
- /*
- * Setup the trapframe to return to the signal trampoline. We pass
- * information to the trampoline in the following registers:
- *
- * gp new backing store or NULL
- * r8 signal number
- * r9 signal code or siginfo pointer
- * r10 signal handler (function descriptor)
- */
- tf->tf_special.sp = (u_int64_t)sfp - 16;
- tf->tf_special.gp = sbs;
- tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore;
- tf->tf_special.ndirty = 0;
- tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat;
- tf->tf_scratch.gr8 = sig;
- tf->tf_scratch.gr9 = code;
- tf->tf_scratch.gr10 = (u_int64_t)catcher;
-
- PROC_LOCK(p);
- mtx_lock(&psp->ps_mtx);
-}
-
-/*
- * Build siginfo_t for SA thread
- */
-void
-cpu_thread_siginfo(int sig, u_long code, siginfo_t *si)
-{
- struct proc *p;
- struct thread *td;
-
- td = curthread;
- p = td->td_proc;
- PROC_LOCK_ASSERT(p, MA_OWNED);
-
- bzero(si, sizeof(*si));
- si->si_signo = sig;
- si->si_code = code;
- /* XXXKSE fill other fields */
-}
-
-/*
- * System call to cleanup state after a signal
- * has been taken. Reset signal mask and
- * stack state from context left by sendsig (above).
- * Return to previous pc and psl as specified by
- * context left by sendsig. Check carefully to
- * make sure that the user has not modified the
- * state to gain improper privileges.
- *
- * MPSAFE
- */
-int
-sigreturn(struct thread *td,
- struct sigreturn_args /* {
- ucontext_t *sigcntxp;
- } */ *uap)
-{
- ucontext_t uc;
- struct trapframe *tf;
- struct proc *p;
- struct pcb *pcb;
-
- tf = td->td_frame;
- p = td->td_proc;
- pcb = td->td_pcb;
-
- /*
- * Fetch the entire context structure at once for speed.
- * We don't use a normal argument to simplify RSE handling.
- */
- if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc)))
- return (EFAULT);
-
- set_mcontext(td, &uc.uc_mcontext);
-
- PROC_LOCK(p);
-#if defined(COMPAT_43)
- if (sigonstack(tf->tf_special.sp))
- td->td_sigstk.ss_flags |= SS_ONSTACK;
- else
- td->td_sigstk.ss_flags &= ~SS_ONSTACK;
-#endif
- td->td_sigmask = uc.uc_sigmask;
- SIG_CANTMASK(td->td_sigmask);
- signotify(td);
- PROC_UNLOCK(p);
-
- return (EJUSTRETURN);
-}
-
-#ifdef COMPAT_FREEBSD4
-int
-freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
-{
-
- return sigreturn(td, (struct sigreturn_args *)uap);
-}
-#endif
-
-/*
- * Construct a PCB from a trapframe. This is called from kdb_trap() where
- * we want to start a backtrace from the function that caused us to enter
- * the debugger. We have the context in the trapframe, but base the trace
- * on the PCB. The PCB doesn't have to be perfect, as long as it contains
- * enough for a backtrace.
- */
-void
-makectx(struct trapframe *tf, struct pcb *pcb)
-{
-
- pcb->pcb_special = tf->tf_special;
- pcb->pcb_special.__spare = ~0UL; /* XXX see unwind.c */
- save_callee_saved(&pcb->pcb_preserved);
- save_callee_saved_fp(&pcb->pcb_preserved_fp);
-}
-
-int
-ia64_flush_dirty(struct thread *td, struct _special *r)
-{
- struct iovec iov;
- struct uio uio;
- uint64_t bspst, kstk, rnat;
- int error;
-
- if (r->ndirty == 0)
- return (0);
-
- kstk = td->td_kstack + (r->bspstore & 0x1ffUL);
- if (td == curthread) {
- __asm __volatile("mov ar.rsc=0;;");
- __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst));
- /* Make sure we have all the user registers written out. */
- if (bspst - kstk < r->ndirty) {
- __asm __volatile("flushrs;;");
- __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst));
- }
- __asm __volatile("mov %0=ar.rnat;;" : "=r"(rnat));
- __asm __volatile("mov ar.rsc=3");
- error = copyout((void*)kstk, (void*)r->bspstore, r->ndirty);
- kstk += r->ndirty;
- r->rnat = (bspst > kstk && (bspst & 0x1ffL) < (kstk & 0x1ffL))
- ? *(uint64_t*)(kstk | 0x1f8L) : rnat;
- } else {
- PHOLD(td->td_proc);
- iov.iov_base = (void*)(uintptr_t)kstk;
- iov.iov_len = r->ndirty;
- uio.uio_iov = &iov;
- uio.uio_iovcnt = 1;
- uio.uio_offset = r->bspstore;
- uio.uio_resid = r->ndirty;
- uio.uio_segflg = UIO_SYSSPACE;
- uio.uio_rw = UIO_WRITE;
- uio.uio_td = td;
- error = proc_rwmem(td->td_proc, &uio);
- /*
- * XXX proc_rwmem() doesn't currently return ENOSPC,
- * so I think it can bogusly return 0. Neither do
- * we allow short writes.
- */
- if (uio.uio_resid != 0 && error == 0)
- error = ENOSPC;
- PRELE(td->td_proc);
- }
-
- r->bspstore += r->ndirty;
- r->ndirty = 0;
- return (error);
-}
-
-int
-get_mcontext(struct thread *td, mcontext_t *mc, int flags)
-{
- struct trapframe *tf;
- int error;
-
- tf = td->td_frame;
- bzero(mc, sizeof(*mc));
- mc->mc_special = tf->tf_special;
- error = ia64_flush_dirty(td, &mc->mc_special);
- if (tf->tf_flags & FRAME_SYSCALL) {
- mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT;
- mc->mc_scratch = tf->tf_scratch;
- if (flags & GET_MC_CLEAR_RET) {
- mc->mc_scratch.gr8 = 0;
- mc->mc_scratch.gr9 = 0;
- mc->mc_scratch.gr10 = 0;
- mc->mc_scratch.gr11 = 0;
- }
- } else {
- mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT;
- mc->mc_scratch = tf->tf_scratch;
- mc->mc_scratch_fp = tf->tf_scratch_fp;
- /*
- * XXX If the thread never used the high FP registers, we
- * probably shouldn't waste time saving them.
- */
- ia64_highfp_save(td);
- mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID;
- mc->mc_high_fp = td->td_pcb->pcb_high_fp;
- }
- save_callee_saved(&mc->mc_preserved);
- save_callee_saved_fp(&mc->mc_preserved_fp);
- return (error);
-}
-
-int
-set_mcontext(struct thread *td, const mcontext_t *mc)
-{
- struct _special s;
- struct trapframe *tf;
- uint64_t psrmask;
-
- tf = td->td_frame;
-
- KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
- ("Whoa there! We have more than 8KB of dirty registers!"));
-
- s = mc->mc_special;
- /*
- * Only copy the user mask and the restart instruction bit from
- * the new context.
- */
- psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL |
- IA64_PSR_MFH | IA64_PSR_RI;
- s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask);
- /* We don't have any dirty registers of the new context. */
- s.ndirty = 0;
- if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) {
- /*
- * We can get an async context passed to us while we
- * entered the kernel through a syscall: sigreturn(2)
- * and kse_switchin(2) both take contexts that could
- * previously be the result of a trap or interrupt.
- * Hence, we cannot assert that the trapframe is not
- * a syscall frame, but we can assert that it's at
- * least an expected syscall.
- */
- if (tf->tf_flags & FRAME_SYSCALL) {
- KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn ||
- tf->tf_scratch.gr15 == SYS_kse_switchin, ("foo"));
- tf->tf_flags &= ~FRAME_SYSCALL;
- }
- tf->tf_scratch = mc->mc_scratch;
- tf->tf_scratch_fp = mc->mc_scratch_fp;
- if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID)
- td->td_pcb->pcb_high_fp = mc->mc_high_fp;
- } else {
- KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo"));
- if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) {
- s.cfm = tf->tf_special.cfm;
- s.iip = tf->tf_special.iip;
- tf->tf_scratch.gr15 = 0; /* Clear syscall nr. */
- } else
- tf->tf_scratch = mc->mc_scratch;
- }
- tf->tf_special = s;
- restore_callee_saved(&mc->mc_preserved);
- restore_callee_saved_fp(&mc->mc_preserved_fp);
-
- if (mc->mc_flags & _MC_FLAGS_KSE_SET_MBOX)
- suword((caddr_t)mc->mc_special.ifa, mc->mc_special.isr);
-
- return (0);
-}
-
-/*
- * Clear registers on exec.
- */
-void
-exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings)
-{
- struct trapframe *tf;
- uint64_t *ksttop, *kst;
-
- tf = td->td_frame;
- ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty +
- (tf->tf_special.bspstore & 0x1ffUL));
-
- /*
- * We can ignore up to 8KB of dirty registers by masking off the
- * lower 13 bits in exception_restore() or epc_syscall(). This
- * should be enough for a couple of years, but if there are more
- * than 8KB of dirty registers, we lose track of the bottom of
- * the kernel stack. The solution is to copy the active part of
- * the kernel stack down 1 page (or 2, but not more than that)
- * so that we always have less than 8KB of dirty registers.
- */
- KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
- ("Whoa there! We have more than 8KB of dirty registers!"));
-
- bzero(&tf->tf_special, sizeof(tf->tf_special));
- if ((tf->tf_flags & FRAME_SYSCALL) == 0) { /* break syscalls. */
- bzero(&tf->tf_scratch, sizeof(tf->tf_scratch));
- bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp));
- tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL;
- tf->tf_special.bspstore = IA64_BACKINGSTORE;
- /*
- * Copy the arguments onto the kernel register stack so that
- * they get loaded by the loadrs instruction. Skip over the
- * NaT collection points.
- */
- kst = ksttop - 1;
- if (((uintptr_t)kst & 0x1ff) == 0x1f8)
- *kst-- = 0;
- *kst-- = 0;
- if (((uintptr_t)kst & 0x1ff) == 0x1f8)
- *kst-- = 0;
- *kst-- = ps_strings;
- if (((uintptr_t)kst & 0x1ff) == 0x1f8)
- *kst-- = 0;
- *kst = stack;
- tf->tf_special.ndirty = (ksttop - kst) << 3;
- } else { /* epc syscalls (default). */
- tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL;
- tf->tf_special.bspstore = IA64_BACKINGSTORE + 24;
- /*
- * Write values for out0, out1 and out2 to the user's backing
- * store and arrange for them to be restored into the user's
- * initial register frame.
- * Assumes that (bspstore & 0x1f8) < 0x1e0.
- */
- suword((caddr_t)tf->tf_special.bspstore - 24, stack);
- suword((caddr_t)tf->tf_special.bspstore - 16, ps_strings);
- suword((caddr_t)tf->tf_special.bspstore - 8, 0);
- }
-
- tf->tf_special.iip = entry;
- tf->tf_special.sp = (stack & ~15) - 16;
- tf->tf_special.rsc = 0xf;
- tf->tf_special.fpsr = IA64_FPSR_DEFAULT;
- tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT |
- IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN |
- IA64_PSR_CPL_USER;
-}
-
-int
-ptrace_set_pc(struct thread *td, unsigned long addr)
-{
- uint64_t slot;
-
- switch (addr & 0xFUL) {
- case 0:
- slot = IA64_PSR_RI_0;
- break;
- case 1:
- /* XXX we need to deal with MLX bundles here */
- slot = IA64_PSR_RI_1;
- break;
- case 2:
- slot = IA64_PSR_RI_2;
- break;
- default:
- return (EINVAL);
- }
-
- td->td_frame->tf_special.iip = addr & ~0x0FULL;
- td->td_frame->tf_special.psr =
- (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot;
- return (0);
-}
-
-int
-ptrace_single_step(struct thread *td)
-{
- struct trapframe *tf;
-
- /*
- * There's no way to set single stepping when we're leaving the
- * kernel through the EPC syscall path. The way we solve this is
- * by enabling the lower-privilege trap so that we re-enter the
- * kernel as soon as the privilege level changes. See trap.c for
- * how we proceed from there.
- */
- tf = td->td_frame;
- if (tf->tf_flags & FRAME_SYSCALL)
- tf->tf_special.psr |= IA64_PSR_LP;
- else
- tf->tf_special.psr |= IA64_PSR_SS;
- return (0);
-}
-
-int
-ptrace_clear_single_step(struct thread *td)
-{
- struct trapframe *tf;
-
- /*
- * Clear any and all status bits we may use to implement single
- * stepping.
- */
- tf = td->td_frame;
- tf->tf_special.psr &= ~IA64_PSR_SS;
- tf->tf_special.psr &= ~IA64_PSR_LP;
- tf->tf_special.psr &= ~IA64_PSR_TB;
- return (0);
-}
-
-int
-fill_regs(struct thread *td, struct reg *regs)
-{
- struct trapframe *tf;
-
- tf = td->td_frame;
- regs->r_special = tf->tf_special;
- regs->r_scratch = tf->tf_scratch;
- save_callee_saved(®s->r_preserved);
- return (0);
-}
-
-int
-set_regs(struct thread *td, struct reg *regs)
-{
- struct trapframe *tf;
- int error;
-
- tf = td->td_frame;
- error = ia64_flush_dirty(td, &tf->tf_special);
- if (!error) {
- tf->tf_special = regs->r_special;
- tf->tf_special.bspstore += tf->tf_special.ndirty;
- tf->tf_special.ndirty = 0;
- tf->tf_scratch = regs->r_scratch;
- restore_callee_saved(®s->r_preserved);
- }
- return (error);
-}
-
-int
-fill_dbregs(struct thread *td, struct dbreg *dbregs)
-{
-
- return (ENOSYS);
-}
-
-int
-set_dbregs(struct thread *td, struct dbreg *dbregs)
-{
-
- return (ENOSYS);
-}
-
-int
-fill_fpregs(struct thread *td, struct fpreg *fpregs)
-{
- struct trapframe *frame = td->td_frame;
- struct pcb *pcb = td->td_pcb;
-
- /* Save the high FP registers. */
- ia64_highfp_save(td);
-
- fpregs->fpr_scratch = frame->tf_scratch_fp;
- save_callee_saved_fp(&fpregs->fpr_preserved);
- fpregs->fpr_high = pcb->pcb_high_fp;
- return (0);
-}
-
-int
-set_fpregs(struct thread *td, struct fpreg *fpregs)
-{
- struct trapframe *frame = td->td_frame;
- struct pcb *pcb = td->td_pcb;
-
- /* Throw away the high FP registers (should be redundant). */
- ia64_highfp_drop(td);
-
- frame->tf_scratch_fp = fpregs->fpr_scratch;
- restore_callee_saved_fp(&fpregs->fpr_preserved);
- pcb->pcb_high_fp = fpregs->fpr_high;
- return (0);
-}
-
-/*
- * High FP register functions.
- */
-
-int
-ia64_highfp_drop(struct thread *td)
-{
- struct pcb *pcb;
- struct pcpu *cpu;
- struct thread *thr;
-
- mtx_lock_spin(&td->td_md.md_highfp_mtx);
- pcb = td->td_pcb;
- cpu = pcb->pcb_fpcpu;
- if (cpu == NULL) {
- mtx_unlock_spin(&td->td_md.md_highfp_mtx);
- return (0);
- }
- pcb->pcb_fpcpu = NULL;
- thr = cpu->pc_fpcurthread;
- cpu->pc_fpcurthread = NULL;
- mtx_unlock_spin(&td->td_md.md_highfp_mtx);
-
- /* Post-mortem sanity checking. */
- KASSERT(thr == td, ("Inconsistent high FP state"));
- return (1);
-}
-
-int
-ia64_highfp_save(struct thread *td)
-{
- struct pcb *pcb;
- struct pcpu *cpu;
- struct thread *thr;
-
- /* Don't save if the high FP registers weren't modified. */
- if ((td->td_frame->tf_special.psr & IA64_PSR_MFH) == 0)
- return (ia64_highfp_drop(td));
-
- mtx_lock_spin(&td->td_md.md_highfp_mtx);
- pcb = td->td_pcb;
- cpu = pcb->pcb_fpcpu;
- if (cpu == NULL) {
- mtx_unlock_spin(&td->td_md.md_highfp_mtx);
- return (0);
- }
-#ifdef SMP
- if (td == curthread)
- sched_pin();
- if (cpu != pcpup) {
- mtx_unlock_spin(&td->td_md.md_highfp_mtx);
- ipi_send(cpu, IPI_HIGH_FP);
- if (td == curthread)
- sched_unpin();
- while (pcb->pcb_fpcpu == cpu)
- DELAY(100);
- return (1);
- } else {
- save_high_fp(&pcb->pcb_high_fp);
- if (td == curthread)
- sched_unpin();
- }
-#else
- save_high_fp(&pcb->pcb_high_fp);
-#endif
- pcb->pcb_fpcpu = NULL;
- thr = cpu->pc_fpcurthread;
- cpu->pc_fpcurthread = NULL;
- mtx_unlock_spin(&td->td_md.md_highfp_mtx);
-
- /* Post-mortem sanity cxhecking. */
- KASSERT(thr == td, ("Inconsistent high FP state"));
- return (1);
-}
-
-int
-sysbeep(int pitch, int period)
-{
- return (ENODEV);
-}
--- sys/ia64/ia64/pmap.c
+++ /dev/null
@@ -1,2319 +0,0 @@
-/*-
- * Copyright (c) 1991 Regents of the University of California.
- * All rights reserved.
- * Copyright (c) 1994 John S. Dyson
- * All rights reserved.
- * Copyright (c) 1994 David Greenman
- * All rights reserved.
- * Copyright (c) 1998,2000 Doug Rabson
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and William Jolitz of UUNET Technologies Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
- * from: i386 Id: pmap.c,v 1.193 1998/04/19 15:22:48 bde Exp
- * with some ideas from NetBSD's alpha pmap
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/pmap.c,v 1.160.2.4 2005/11/19 20:31:31 alc Exp $");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mman.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/smp.h>
-#include <sys/sysctl.h>
-#include <sys/systm.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-#include <vm/vm_object.h>
-#include <vm/vm_pageout.h>
-#include <vm/uma.h>
-
-#include <machine/md_var.h>
-#include <machine/pal.h>
-
-/*
- * Manages physical address maps.
- *
- * In addition to hardware address maps, this
- * module is called upon to provide software-use-only
- * maps which may or may not be stored in the same
- * form as hardware maps. These pseudo-maps are
- * used to store intermediate results from copy
- * operations to and from address spaces.
- *
- * Since the information managed by this module is
- * also stored by the logical address mapping module,
- * this module may throw away valid virtual-to-physical
- * mappings at almost any time. However, invalidations
- * of virtual-to-physical mappings must be done as
- * requested.
- *
- * In order to cope with hardware architectures which
- * make virtual-to-physical map invalidates expensive,
- * this module may delay invalidate or reduced protection
- * operations until such time as they are actually
- * necessary. This module is given full information as
- * to which processors are currently using which maps,
- * and to when physical maps must be made correct.
- */
-
-/*
- * Following the Linux model, region IDs are allocated in groups of
- * eight so that a single region ID can be used for as many RRs as we
- * want by encoding the RR number into the low bits of the ID.
- *
- * We reserve region ID 0 for the kernel and allocate the remaining
- * IDs for user pmaps.
- *
- * Region 0..4
- * User virtually mapped
- *
- * Region 5
- * Kernel virtually mapped
- *
- * Region 6
- * Kernel physically mapped uncacheable
- *
- * Region 7
- * Kernel physically mapped cacheable
- */
-
-/* XXX move to a header. */
-extern uint64_t ia64_gateway_page[];
-
-MALLOC_DEFINE(M_PMAP, "PMAP", "PMAP Structures");
-
-#ifndef PMAP_SHPGPERPROC
-#define PMAP_SHPGPERPROC 200
-#endif
-
-#if !defined(DIAGNOSTIC)
-#define PMAP_INLINE __inline
-#else
-#define PMAP_INLINE
-#endif
-
-#define pmap_accessed(lpte) ((lpte)->pte & PTE_ACCESSED)
-#define pmap_dirty(lpte) ((lpte)->pte & PTE_DIRTY)
-#define pmap_managed(lpte) ((lpte)->pte & PTE_MANAGED)
-#define pmap_ppn(lpte) ((lpte)->pte & PTE_PPN_MASK)
-#define pmap_present(lpte) ((lpte)->pte & PTE_PRESENT)
-#define pmap_prot(lpte) (((lpte)->pte & PTE_PROT_MASK) >> 56)
-#define pmap_wired(lpte) ((lpte)->pte & PTE_WIRED)
-
-#define pmap_clear_accessed(lpte) (lpte)->pte &= ~PTE_ACCESSED
-#define pmap_clear_dirty(lpte) (lpte)->pte &= ~PTE_DIRTY
-#define pmap_clear_present(lpte) (lpte)->pte &= ~PTE_PRESENT
-#define pmap_clear_wired(lpte) (lpte)->pte &= ~PTE_WIRED
-
-#define pmap_set_wired(lpte) (lpte)->pte |= PTE_WIRED
-
-/*
- * The VHPT bucket head structure.
- */
-struct ia64_bucket {
- uint64_t chain;
- struct mtx mutex;
- u_int length;
-};
-
-/*
- * Statically allocated kernel pmap
- */
-struct pmap kernel_pmap_store;
-
-vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
-vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
-
-/*
- * Kernel virtual memory management.
- */
-static int nkpt;
-struct ia64_lpte **ia64_kptdir;
-#define KPTE_DIR_INDEX(va) \
- ((va >> (2*PAGE_SHIFT-5)) & ((1<<(PAGE_SHIFT-3))-1))
-#define KPTE_PTE_INDEX(va) \
- ((va >> PAGE_SHIFT) & ((1<<(PAGE_SHIFT-5))-1))
-#define NKPTEPG (PAGE_SIZE / sizeof(struct ia64_lpte))
-
-vm_offset_t kernel_vm_end;
-
-/* Values for ptc.e. XXX values for SKI. */
-static uint64_t pmap_ptc_e_base = 0x100000000;
-static uint64_t pmap_ptc_e_count1 = 3;
-static uint64_t pmap_ptc_e_count2 = 2;
-static uint64_t pmap_ptc_e_stride1 = 0x2000;
-static uint64_t pmap_ptc_e_stride2 = 0x100000000;
-struct mtx pmap_ptcmutex;
-
-/*
- * Data for the RID allocator
- */
-static int pmap_ridcount;
-static int pmap_rididx;
-static int pmap_ridmapsz;
-static int pmap_ridmax;
-static uint64_t *pmap_ridmap;
-struct mtx pmap_ridmutex;
-
-/*
- * Data for the pv entry allocation mechanism
- */
-static uma_zone_t pvzone;
-static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
-int pmap_pagedaemon_waken;
-
-/*
- * Data for allocating PTEs for user processes.
- */
-static uma_zone_t ptezone;
-
-/*
- * Virtual Hash Page Table (VHPT) data.
- */
-/* SYSCTL_DECL(_machdep); */
-SYSCTL_NODE(_machdep, OID_AUTO, vhpt, CTLFLAG_RD, 0, "");
-
-struct ia64_bucket *pmap_vhpt_bucket;
-
-int pmap_vhpt_nbuckets;
-SYSCTL_INT(_machdep_vhpt, OID_AUTO, nbuckets, CTLFLAG_RD,
- &pmap_vhpt_nbuckets, 0, "");
-
-uint64_t pmap_vhpt_base[MAXCPU];
-
-int pmap_vhpt_log2size = 0;
-TUNABLE_INT("machdep.vhpt.log2size", &pmap_vhpt_log2size);
-SYSCTL_INT(_machdep_vhpt, OID_AUTO, log2size, CTLFLAG_RD,
- &pmap_vhpt_log2size, 0, "");
-
-static int pmap_vhpt_inserts;
-SYSCTL_INT(_machdep_vhpt, OID_AUTO, inserts, CTLFLAG_RD,
- &pmap_vhpt_inserts, 0, "");
-
-static int pmap_vhpt_population(SYSCTL_HANDLER_ARGS);
-SYSCTL_PROC(_machdep_vhpt, OID_AUTO, population, CTLTYPE_INT | CTLFLAG_RD,
- NULL, 0, pmap_vhpt_population, "I", "");
-
-static PMAP_INLINE void free_pv_entry(pv_entry_t pv);
-static pv_entry_t get_pv_entry(void);
-
-static pmap_t pmap_install(pmap_t);
-static void pmap_invalidate_all(pmap_t pmap);
-
-vm_offset_t
-pmap_steal_memory(vm_size_t size)
-{
- vm_size_t bank_size;
- vm_offset_t pa, va;
-
- size = round_page(size);
-
- bank_size = phys_avail[1] - phys_avail[0];
- while (size > bank_size) {
- int i;
- for (i = 0; phys_avail[i+2]; i+= 2) {
- phys_avail[i] = phys_avail[i+2];
- phys_avail[i+1] = phys_avail[i+3];
- }
- phys_avail[i] = 0;
- phys_avail[i+1] = 0;
- if (!phys_avail[0])
- panic("pmap_steal_memory: out of memory");
- bank_size = phys_avail[1] - phys_avail[0];
- }
-
- pa = phys_avail[0];
- phys_avail[0] += size;
-
- va = IA64_PHYS_TO_RR7(pa);
- bzero((caddr_t) va, size);
- return va;
-}
-
-/*
- * Bootstrap the system enough to run with virtual memory.
- */
-void
-pmap_bootstrap()
-{
- struct ia64_pal_result res;
- struct ia64_lpte *pte;
- vm_offset_t base, limit;
- size_t size;
- int i, j, count, ridbits;
-
- /*
- * Query the PAL Code to find the loop parameters for the
- * ptc.e instruction.
- */
- res = ia64_call_pal_static(PAL_PTCE_INFO, 0, 0, 0);
- if (res.pal_status != 0)
- panic("Can't configure ptc.e parameters");
- pmap_ptc_e_base = res.pal_result[0];
- pmap_ptc_e_count1 = res.pal_result[1] >> 32;
- pmap_ptc_e_count2 = res.pal_result[1] & ((1L<<32) - 1);
- pmap_ptc_e_stride1 = res.pal_result[2] >> 32;
- pmap_ptc_e_stride2 = res.pal_result[2] & ((1L<<32) - 1);
- if (bootverbose)
- printf("ptc.e base=0x%lx, count1=%ld, count2=%ld, "
- "stride1=0x%lx, stride2=0x%lx\n",
- pmap_ptc_e_base,
- pmap_ptc_e_count1,
- pmap_ptc_e_count2,
- pmap_ptc_e_stride1,
- pmap_ptc_e_stride2);
- mtx_init(&pmap_ptcmutex, "Global PTC lock", NULL, MTX_SPIN);
-
- /*
- * Setup RIDs. RIDs 0..7 are reserved for the kernel.
- *
- * We currently need at least 19 bits in the RID because PID_MAX
- * can only be encoded in 17 bits and we need RIDs for 5 regions
- * per process. With PID_MAX equalling 99999 this means that we
- * need to be able to encode 499995 (=5*PID_MAX).
- * The Itanium processor only has 18 bits and the architected
- * minimum is exactly that. So, we cannot use a PID based scheme
- * in those cases. Enter pmap_ridmap...
- * We should avoid the map when running on a processor that has
- * implemented enough bits. This means that we should pass the
- * process/thread ID to pmap. This we currently don't do, so we
- * use the map anyway. However, we don't want to allocate a map
- * that is large enough to cover the range dictated by the number
- * of bits in the RID, because that may result in a RID map of
- * 2MB in size for a 24-bit RID. A 64KB map is enough.
- * The bottomline: we create a 32KB map when the processor only
- * implements 18 bits (or when we can't figure it out). Otherwise
- * we create a 64KB map.
- */
- res = ia64_call_pal_static(PAL_VM_SUMMARY, 0, 0, 0);
- if (res.pal_status != 0) {
- if (bootverbose)
- printf("Can't read VM Summary - assuming 18 Region ID bits\n");
- ridbits = 18; /* guaranteed minimum */
- } else {
- ridbits = (res.pal_result[1] >> 8) & 0xff;
- if (bootverbose)
- printf("Processor supports %d Region ID bits\n",
- ridbits);
- }
- if (ridbits > 19)
- ridbits = 19;
-
- pmap_ridmax = (1 << ridbits);
- pmap_ridmapsz = pmap_ridmax / 64;
- pmap_ridmap = (uint64_t *)pmap_steal_memory(pmap_ridmax / 8);
- pmap_ridmap[0] |= 0xff;
- pmap_rididx = 0;
- pmap_ridcount = 8;
- mtx_init(&pmap_ridmutex, "RID allocator lock", NULL, MTX_DEF);
-
- /*
- * Allocate some memory for initial kernel 'page tables'.
- */
- ia64_kptdir = (void *)pmap_steal_memory(PAGE_SIZE);
- for (i = 0; i < NKPT; i++) {
- ia64_kptdir[i] = (void*)pmap_steal_memory(PAGE_SIZE);
- }
- nkpt = NKPT;
- kernel_vm_end = NKPT * PAGE_SIZE * NKPTEPG + VM_MIN_KERNEL_ADDRESS -
- VM_GATEWAY_SIZE;
-
- for (i = 0; phys_avail[i+2]; i+= 2)
- ;
- count = i+2;
-
- /*
- * Figure out a useful size for the VHPT, based on the size of
- * physical memory and try to locate a region which is large
- * enough to contain the VHPT (which must be a power of two in
- * size and aligned to a natural boundary).
- * We silently bump up the VHPT size to the minimum size if the
- * user has set the tunable too small. Likewise, the VHPT size
- * is silently capped to the maximum allowed.
- */
- TUNABLE_INT_FETCH("machdep.vhpt.log2size", &pmap_vhpt_log2size);
- if (pmap_vhpt_log2size == 0) {
- pmap_vhpt_log2size = 15;
- size = 1UL << pmap_vhpt_log2size;
- while (size < Maxmem * 32) {
- pmap_vhpt_log2size++;
- size <<= 1;
- }
- } else if (pmap_vhpt_log2size < 15)
- pmap_vhpt_log2size = 15;
- if (pmap_vhpt_log2size > 61)
- pmap_vhpt_log2size = 61;
-
- pmap_vhpt_base[0] = 0;
- base = limit = 0;
- size = 1UL << pmap_vhpt_log2size;
- while (pmap_vhpt_base[0] == 0) {
- if (bootverbose)
- printf("Trying VHPT size 0x%lx\n", size);
- for (i = 0; i < count; i += 2) {
- base = (phys_avail[i] + size - 1) & ~(size - 1);
- limit = base + MAXCPU * size;
- if (limit <= phys_avail[i+1])
- /*
- * VHPT can fit in this region
- */
- break;
- }
- if (!phys_avail[i]) {
- /* Can't fit, try next smaller size. */
- pmap_vhpt_log2size--;
- size >>= 1;
- } else
- pmap_vhpt_base[0] = IA64_PHYS_TO_RR7(base);
- }
- if (pmap_vhpt_log2size < 15)
- panic("Can't find space for VHPT");
-
- if (bootverbose)
- printf("Putting VHPT at 0x%lx\n", base);
-
- if (base != phys_avail[i]) {
- /* Split this region. */
- if (bootverbose)
- printf("Splitting [%p-%p]\n", (void *)phys_avail[i],
- (void *)phys_avail[i+1]);
- for (j = count; j > i; j -= 2) {
- phys_avail[j] = phys_avail[j-2];
- phys_avail[j+1] = phys_avail[j-2+1];
- }
- phys_avail[i+1] = base;
- phys_avail[i+2] = limit;
- } else
- phys_avail[i] = limit;
-
- pmap_vhpt_nbuckets = size / sizeof(struct ia64_lpte);
-
- pmap_vhpt_bucket = (void *)pmap_steal_memory(pmap_vhpt_nbuckets *
- sizeof(struct ia64_bucket));
- pte = (struct ia64_lpte *)pmap_vhpt_base[0];
- for (i = 0; i < pmap_vhpt_nbuckets; i++) {
- pte[i].pte = 0;
- pte[i].itir = 0;
- pte[i].tag = 1UL << 63; /* Invalid tag */
- pte[i].chain = (uintptr_t)(pmap_vhpt_bucket + i);
- /* Stolen memory is zeroed! */
- mtx_init(&pmap_vhpt_bucket[i].mutex, "VHPT bucket lock", NULL,
- MTX_SPIN);
- }
-
- for (i = 1; i < MAXCPU; i++) {
- pmap_vhpt_base[i] = pmap_vhpt_base[i - 1] + size;
- bcopy((void *)pmap_vhpt_base[i - 1], (void *)pmap_vhpt_base[i],
- size);
- }
-
- __asm __volatile("mov cr.pta=%0;; srlz.i;;" ::
- "r" (pmap_vhpt_base[0] + (1<<8) + (pmap_vhpt_log2size<<2) + 1));
-
- virtual_avail = VM_MIN_KERNEL_ADDRESS;
- virtual_end = VM_MAX_KERNEL_ADDRESS;
-
- /*
- * Initialize the kernel pmap (which is statically allocated).
- */
- PMAP_LOCK_INIT(kernel_pmap);
- for (i = 0; i < 5; i++)
- kernel_pmap->pm_rid[i] = 0;
- kernel_pmap->pm_active = 1;
- TAILQ_INIT(&kernel_pmap->pm_pvlist);
- PCPU_SET(current_pmap, kernel_pmap);
-
- /*
- * Region 5 is mapped via the vhpt.
- */
- ia64_set_rr(IA64_RR_BASE(5),
- (5 << 8) | (PAGE_SHIFT << 2) | 1);
-
- /*
- * Region 6 is direct mapped UC and region 7 is direct mapped
- * WC. The details of this is controlled by the Alt {I,D}TLB
- * handlers. Here we just make sure that they have the largest
- * possible page size to minimise TLB usage.
- */
- ia64_set_rr(IA64_RR_BASE(6), (6 << 8) | (IA64_ID_PAGE_SHIFT << 2));
- ia64_set_rr(IA64_RR_BASE(7), (7 << 8) | (IA64_ID_PAGE_SHIFT << 2));
-
- /*
- * Clear out any random TLB entries left over from booting.
- */
- pmap_invalidate_all(kernel_pmap);
-
- map_gateway_page();
-}
-
-static int
-pmap_vhpt_population(SYSCTL_HANDLER_ARGS)
-{
- int count, error, i;
-
- count = 0;
- for (i = 0; i < pmap_vhpt_nbuckets; i++)
- count += pmap_vhpt_bucket[i].length;
-
- error = SYSCTL_OUT(req, &count, sizeof(count));
- return (error);
-}
-
-/*
- * Initialize a vm_page's machine-dependent fields.
- */
-void
-pmap_page_init(vm_page_t m)
-{
-
- TAILQ_INIT(&m->md.pv_list);
- m->md.pv_list_count = 0;
-}
-
-/*
- * Initialize the pmap module.
- * Called by vm_init, to initialize any structures that the pmap
- * system needs to map virtual memory.
- */
-void
-pmap_init(void)
-{
- int shpgperproc = PMAP_SHPGPERPROC;
-
- /*
- * Initialize the address space (zone) for the pv entries. Set a
- * high water mark so that the system can recover from excessive
- * numbers of pv entries.
- */
- pvzone = uma_zcreate("PV ENTRY", sizeof(struct pv_entry), NULL, NULL,
- NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
- TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
- pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
- TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
- pv_entry_high_water = 9 * (pv_entry_max / 10);
-
- ptezone = uma_zcreate("PT ENTRY", sizeof (struct ia64_lpte),
- NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM|UMA_ZONE_NOFREE);
-}
-
-void
-pmap_init2()
-{
-}
-
-
-/***************************************************
- * Manipulate TLBs for a pmap
- ***************************************************/
-
-#if 0
-static __inline void
-pmap_invalidate_page_locally(void *arg)
-{
- vm_offset_t va = (uintptr_t)arg;
- struct ia64_lpte *pte;
-
- pte = (struct ia64_lpte *)ia64_thash(va);
- if (pte->tag == ia64_ttag(va))
- pte->tag = 1UL << 63;
- ia64_ptc_l(va, PAGE_SHIFT << 2);
-}
-
-#ifdef SMP
-static void
-pmap_invalidate_page_1(void *arg)
-{
- void **args = arg;
- pmap_t oldpmap;
-
- critical_enter();
- oldpmap = pmap_install(args[0]);
- pmap_invalidate_page_locally(args[1]);
- pmap_install(oldpmap);
- critical_exit();
-}
-#endif
-
-static void
-pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
-{
-
- KASSERT((pmap == kernel_pmap || pmap == PCPU_GET(current_pmap)),
- ("invalidating TLB for non-current pmap"));
-
-#ifdef SMP
- if (mp_ncpus > 1) {
- void *args[2];
- args[0] = pmap;
- args[1] = (void *)va;
- smp_rendezvous(NULL, pmap_invalidate_page_1, NULL, args);
- } else
-#endif
- pmap_invalidate_page_locally((void *)va);
-}
-#endif /* 0 */
-
-static void
-pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
-{
- struct ia64_lpte *pte;
- int i, vhpt_ofs;
-
- KASSERT((pmap == kernel_pmap || pmap == PCPU_GET(current_pmap)),
- ("invalidating TLB for non-current pmap"));
-
- vhpt_ofs = ia64_thash(va) - pmap_vhpt_base[PCPU_GET(cpuid)];
- critical_enter();
- for (i = 0; i < MAXCPU; i++) {
- pte = (struct ia64_lpte *)(pmap_vhpt_base[i] + vhpt_ofs);
- if (pte->tag == ia64_ttag(va))
- pte->tag = 1UL << 63;
- }
- critical_exit();
- mtx_lock_spin(&pmap_ptcmutex);
- ia64_ptc_ga(va, PAGE_SHIFT << 2);
- mtx_unlock_spin(&pmap_ptcmutex);
-}
-
-static void
-pmap_invalidate_all_1(void *arg)
-{
- uint64_t addr;
- int i, j;
-
- critical_enter();
- addr = pmap_ptc_e_base;
- for (i = 0; i < pmap_ptc_e_count1; i++) {
- for (j = 0; j < pmap_ptc_e_count2; j++) {
- ia64_ptc_e(addr);
- addr += pmap_ptc_e_stride2;
- }
- addr += pmap_ptc_e_stride1;
- }
- critical_exit();
-}
-
-static void
-pmap_invalidate_all(pmap_t pmap)
-{
-
- KASSERT((pmap == kernel_pmap || pmap == PCPU_GET(current_pmap)),
- ("invalidating TLB for non-current pmap"));
-
-#ifdef SMP
- if (mp_ncpus > 1)
- smp_rendezvous(NULL, pmap_invalidate_all_1, NULL, NULL);
- else
-#endif
- pmap_invalidate_all_1(NULL);
-}
-
-static uint32_t
-pmap_allocate_rid(void)
-{
- uint64_t bit, bits;
- int rid;
-
- mtx_lock(&pmap_ridmutex);
- if (pmap_ridcount == pmap_ridmax)
- panic("pmap_allocate_rid: All Region IDs used");
-
- /* Find an index with a free bit. */
- while ((bits = pmap_ridmap[pmap_rididx]) == ~0UL) {
- pmap_rididx++;
- if (pmap_rididx == pmap_ridmapsz)
- pmap_rididx = 0;
- }
- rid = pmap_rididx * 64;
-
- /* Find a free bit. */
- bit = 1UL;
- while (bits & bit) {
- rid++;
- bit <<= 1;
- }
-
- pmap_ridmap[pmap_rididx] |= bit;
- pmap_ridcount++;
- mtx_unlock(&pmap_ridmutex);
-
- return rid;
-}
-
-static void
-pmap_free_rid(uint32_t rid)
-{
- uint64_t bit;
- int idx;
-
- idx = rid / 64;
- bit = ~(1UL << (rid & 63));
-
- mtx_lock(&pmap_ridmutex);
- pmap_ridmap[idx] &= bit;
- pmap_ridcount--;
- mtx_unlock(&pmap_ridmutex);
-}
-
-/*
- * this routine defines the region(s) of memory that should
- * not be tested for the modified bit.
- */
-static PMAP_INLINE int
-pmap_track_modified(vm_offset_t va)
-{
- if ((va < kmi.clean_sva) || (va >= kmi.clean_eva))
- return 1;
- else
- return 0;
-}
-
-/***************************************************
- * Page table page management routines.....
- ***************************************************/
-
-void
-pmap_pinit0(struct pmap *pmap)
-{
- /* kernel_pmap is the same as any other pmap. */
- pmap_pinit(pmap);
-}
-
-/*
- * Initialize a preallocated and zeroed pmap structure,
- * such as one in a vmspace structure.
- */
-void
-pmap_pinit(struct pmap *pmap)
-{
- int i;
-
- PMAP_LOCK_INIT(pmap);
- for (i = 0; i < 5; i++)
- pmap->pm_rid[i] = pmap_allocate_rid();
- pmap->pm_active = 0;
- TAILQ_INIT(&pmap->pm_pvlist);
- bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
-}
-
-/***************************************************
- * Pmap allocation/deallocation routines.
- ***************************************************/
-
-/*
- * Release any resources held by the given physical map.
- * Called when a pmap initialized by pmap_pinit is being released.
- * Should only be called if the map contains no valid mappings.
- */
-void
-pmap_release(pmap_t pmap)
-{
- int i;
-
- for (i = 0; i < 5; i++)
- if (pmap->pm_rid[i])
- pmap_free_rid(pmap->pm_rid[i]);
- PMAP_LOCK_DESTROY(pmap);
-}
-
-/*
- * grow the number of kernel page table entries, if needed
- */
-void
-pmap_growkernel(vm_offset_t addr)
-{
- struct ia64_lpte *ptepage;
- vm_page_t nkpg;
-
- if (kernel_vm_end >= addr)
- return;
-
- critical_enter();
-
- while (kernel_vm_end < addr) {
- /* We could handle more by increasing the size of kptdir. */
- if (nkpt == MAXKPT)
- panic("pmap_growkernel: out of kernel address space");
-
- nkpg = vm_page_alloc(NULL, nkpt,
- VM_ALLOC_NOOBJ | VM_ALLOC_INTERRUPT | VM_ALLOC_WIRED);
- if (!nkpg)
- panic("pmap_growkernel: no memory to grow kernel");
-
- ptepage = (struct ia64_lpte *)
- IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(nkpg));
- bzero(ptepage, PAGE_SIZE);
- ia64_kptdir[KPTE_DIR_INDEX(kernel_vm_end)] = ptepage;
-
- nkpt++;
- kernel_vm_end += PAGE_SIZE * NKPTEPG;
- }
-
- critical_exit();
-}
-
-/***************************************************
- * page management routines.
- ***************************************************/
-
-/*
- * free the pv_entry back to the free list
- */
-static PMAP_INLINE void
-free_pv_entry(pv_entry_t pv)
-{
- pv_entry_count--;
- uma_zfree(pvzone, pv);
-}
-
-/*
- * get a new pv_entry, allocating a block from the system
- * when needed.
- * the memory allocation is performed bypassing the malloc code
- * because of the possibility of allocations at interrupt time.
- */
-static pv_entry_t
-get_pv_entry(void)
-{
- pv_entry_count++;
- if ((pv_entry_count > pv_entry_high_water) &&
- (pmap_pagedaemon_waken == 0)) {
- pmap_pagedaemon_waken = 1;
- wakeup (&vm_pages_needed);
- }
- return uma_zalloc(pvzone, M_NOWAIT);
-}
-
-/*
- * Add an ia64_lpte to the VHPT.
- */
-static void
-pmap_enter_vhpt(struct ia64_lpte *pte, vm_offset_t va)
-{
- struct ia64_bucket *bckt;
- struct ia64_lpte *vhpte;
- uint64_t pte_pa;
-
- /* Can fault, so get it out of the way. */
- pte_pa = ia64_tpa((vm_offset_t)pte);
-
- vhpte = (struct ia64_lpte *)ia64_thash(va);
- bckt = (struct ia64_bucket *)vhpte->chain;
-
- mtx_lock_spin(&bckt->mutex);
- pte->chain = bckt->chain;
- ia64_mf();
- bckt->chain = pte_pa;
-
- pmap_vhpt_inserts++;
- bckt->length++;
- mtx_unlock_spin(&bckt->mutex);
-}
-
-/*
- * Remove the ia64_lpte matching va from the VHPT. Return zero if it
- * worked or an appropriate error code otherwise.
- */
-static int
-pmap_remove_vhpt(vm_offset_t va)
-{
- struct ia64_bucket *bckt;
- struct ia64_lpte *pte;
- struct ia64_lpte *lpte;
- struct ia64_lpte *vhpte;
- uint64_t chain, tag;
-
- tag = ia64_ttag(va);
- vhpte = (struct ia64_lpte *)ia64_thash(va);
- bckt = (struct ia64_bucket *)vhpte->chain;
-
- lpte = NULL;
- mtx_lock_spin(&bckt->mutex);
- chain = bckt->chain;
- pte = (struct ia64_lpte *)IA64_PHYS_TO_RR7(chain);
- while (chain != 0 && pte->tag != tag) {
- lpte = pte;
- chain = pte->chain;
- pte = (struct ia64_lpte *)IA64_PHYS_TO_RR7(chain);
- }
- if (chain == 0) {
- mtx_unlock_spin(&bckt->mutex);
- return (ENOENT);
- }
-
- /* Snip this pv_entry out of the collision chain. */
- if (lpte == NULL)
- bckt->chain = pte->chain;
- else
- lpte->chain = pte->chain;
- ia64_mf();
-
- bckt->length--;
- mtx_unlock_spin(&bckt->mutex);
- return (0);
-}
-
-/*
- * Find the ia64_lpte for the given va, if any.
- */
-static struct ia64_lpte *
-pmap_find_vhpt(vm_offset_t va)
-{
- struct ia64_bucket *bckt;
- struct ia64_lpte *pte;
- uint64_t chain, tag;
-
- tag = ia64_ttag(va);
- pte = (struct ia64_lpte *)ia64_thash(va);
- bckt = (struct ia64_bucket *)pte->chain;
-
- mtx_lock_spin(&bckt->mutex);
- chain = bckt->chain;
- pte = (struct ia64_lpte *)IA64_PHYS_TO_RR7(chain);
- while (chain != 0 && pte->tag != tag) {
- chain = pte->chain;
- pte = (struct ia64_lpte *)IA64_PHYS_TO_RR7(chain);
- }
- mtx_unlock_spin(&bckt->mutex);
- return ((chain != 0) ? pte : NULL);
-}
-
-/*
- * Remove an entry from the list of managed mappings.
- */
-static int
-pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va, pv_entry_t pv)
-{
- if (!pv) {
- if (m->md.pv_list_count < pmap->pm_stats.resident_count) {
- TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
- if (pmap == pv->pv_pmap && va == pv->pv_va)
- break;
- }
- } else {
- TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) {
- if (va == pv->pv_va)
- break;
- }
- }
- }
-
- if (pv) {
- TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
- m->md.pv_list_count--;
- if (TAILQ_FIRST(&m->md.pv_list) == NULL)
- vm_page_flag_clear(m, PG_WRITEABLE);
-
- TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
- free_pv_entry(pv);
- return 0;
- } else {
- return ENOENT;
- }
-}
-
-/*
- * Create a pv entry for page at pa for
- * (pmap, va).
- */
-static void
-pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
-{
- pv_entry_t pv;
-
- pv = get_pv_entry();
- if (pv == NULL)
- panic("no pv entries: increase vm.pmap.shpgperproc");
- pv->pv_pmap = pmap;
- pv->pv_va = va;
-
- PMAP_LOCK_ASSERT(pmap, MA_OWNED);
- mtx_assert(&vm_page_queue_mtx, MA_OWNED);
- TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist);
- TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
- m->md.pv_list_count++;
-}
-
-/*
- * Routine: pmap_extract
- * Function:
- * Extract the physical page address associated
- * with the given map/virtual_address pair.
- */
-vm_paddr_t
-pmap_extract(pmap_t pmap, vm_offset_t va)
-{
- struct ia64_lpte *pte;
- pmap_t oldpmap;
- vm_paddr_t pa;
-
- pa = 0;
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
- pte = pmap_find_vhpt(va);
- if (pte != NULL && pmap_present(pte))
- pa = pmap_ppn(pte);
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
- return (pa);
-}
-
-/*
- * Routine: pmap_extract_and_hold
- * Function:
- * Atomically extract and hold the physical page
- * with the given pmap and virtual address pair
- * if that mapping permits the given protection.
- */
-vm_page_t
-pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
-{
- struct ia64_lpte *pte;
- pmap_t oldpmap;
- vm_page_t m;
-
- m = NULL;
- vm_page_lock_queues();
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
- pte = pmap_find_vhpt(va);
- if (pte != NULL && pmap_present(pte) &&
- (pmap_prot(pte) & prot) == prot) {
- m = PHYS_TO_VM_PAGE(pmap_ppn(pte));
- vm_page_hold(m);
- }
- vm_page_unlock_queues();
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
- return (m);
-}
-
-/***************************************************
- * Low level mapping routines.....
- ***************************************************/
-
-/*
- * Find the kernel lpte for mapping the given virtual address, which
- * must be in the part of region 5 which we can cover with our kernel
- * 'page tables'.
- */
-static struct ia64_lpte *
-pmap_find_kpte(vm_offset_t va)
-{
- KASSERT((va >> 61) == 5,
- ("kernel mapping 0x%lx not in region 5", va));
- KASSERT(IA64_RR_MASK(va) < (nkpt * PAGE_SIZE * NKPTEPG),
- ("kernel mapping 0x%lx out of range", va));
- return (&ia64_kptdir[KPTE_DIR_INDEX(va)][KPTE_PTE_INDEX(va)]);
-}
-
-/*
- * Find a pte suitable for mapping a user-space address. If one exists
- * in the VHPT, that one will be returned, otherwise a new pte is
- * allocated.
- */
-static struct ia64_lpte *
-pmap_find_pte(vm_offset_t va)
-{
- struct ia64_lpte *pte;
-
- if (va >= VM_MAXUSER_ADDRESS)
- return pmap_find_kpte(va);
-
- pte = pmap_find_vhpt(va);
- if (pte == NULL) {
- pte = uma_zalloc(ptezone, M_NOWAIT | M_ZERO);
- pte->tag = 1UL << 63;
- }
- return (pte);
-}
-
-/*
- * Free a pte which is now unused. This simply returns it to the zone
- * allocator if it is a user mapping. For kernel mappings, clear the
- * valid bit to make it clear that the mapping is not currently used.
- */
-static void
-pmap_free_pte(struct ia64_lpte *pte, vm_offset_t va)
-{
- if (va < VM_MAXUSER_ADDRESS)
- uma_zfree(ptezone, pte);
- else
- pmap_clear_present(pte);
-}
-
-static PMAP_INLINE void
-pmap_pte_prot(pmap_t pm, struct ia64_lpte *pte, vm_prot_t prot)
-{
- static int prot2ar[4] = {
- PTE_AR_R, /* VM_PROT_NONE */
- PTE_AR_RW, /* VM_PROT_WRITE */
- PTE_AR_RX, /* VM_PROT_EXECUTE */
- PTE_AR_RWX /* VM_PROT_WRITE|VM_PROT_EXECUTE */
- };
-
- pte->pte &= ~(PTE_PROT_MASK | PTE_PL_MASK | PTE_AR_MASK);
- pte->pte |= (uint64_t)(prot & VM_PROT_ALL) << 56;
- pte->pte |= (prot == VM_PROT_NONE || pm == kernel_pmap)
- ? PTE_PL_KERN : PTE_PL_USER;
- pte->pte |= prot2ar[(prot & VM_PROT_ALL) >> 1];
-}
-
-/*
- * Set a pte to contain a valid mapping and enter it in the VHPT. If
- * the pte was orginally valid, then its assumed to already be in the
- * VHPT.
- * This functions does not set the protection bits. It's expected
- * that those have been set correctly prior to calling this function.
- */
-static void
-pmap_set_pte(struct ia64_lpte *pte, vm_offset_t va, vm_offset_t pa,
- boolean_t wired, boolean_t managed)
-{
-
- pte->pte &= PTE_PROT_MASK | PTE_PL_MASK | PTE_AR_MASK;
- pte->pte |= PTE_PRESENT | PTE_MA_WB;
- pte->pte |= (managed) ? PTE_MANAGED : (PTE_DIRTY | PTE_ACCESSED);
- pte->pte |= (wired) ? PTE_WIRED : 0;
- pte->pte |= pa & PTE_PPN_MASK;
-
- pte->itir = PAGE_SHIFT << 2;
-
- pte->tag = ia64_ttag(va);
-}
-
-/*
- * Remove the (possibly managed) mapping represented by pte from the
- * given pmap.
- */
-static int
-pmap_remove_pte(pmap_t pmap, struct ia64_lpte *pte, vm_offset_t va,
- pv_entry_t pv, int freepte)
-{
- int error;
- vm_page_t m;
-
- KASSERT((pmap == kernel_pmap || pmap == PCPU_GET(current_pmap)),
- ("removing pte for non-current pmap"));
-
- /*
- * First remove from the VHPT.
- */
- error = pmap_remove_vhpt(va);
- if (error)
- return (error);
-
- pmap_invalidate_page(pmap, va);
-
- if (pmap_wired(pte))
- pmap->pm_stats.wired_count -= 1;
-
- pmap->pm_stats.resident_count -= 1;
- if (pmap_managed(pte)) {
- m = PHYS_TO_VM_PAGE(pmap_ppn(pte));
- if (pmap_dirty(pte))
- if (pmap_track_modified(va))
- vm_page_dirty(m);
- if (pmap_accessed(pte))
- vm_page_flag_set(m, PG_REFERENCED);
-
- error = pmap_remove_entry(pmap, m, va, pv);
- }
- if (freepte)
- pmap_free_pte(pte, va);
-
- return (error);
-}
-
-/*
- * Extract the physical page address associated with a kernel
- * virtual address.
- */
-vm_paddr_t
-pmap_kextract(vm_offset_t va)
-{
- struct ia64_lpte *pte;
- vm_offset_t gwpage;
-
- KASSERT(va >= IA64_RR_BASE(5), ("Must be kernel VA"));
-
- /* Regions 6 and 7 are direct mapped. */
- if (va >= IA64_RR_BASE(6))
- return (IA64_RR_MASK(va));
-
- /* EPC gateway page? */
- gwpage = (vm_offset_t)ia64_get_k5();
- if (va >= gwpage && va < gwpage + VM_GATEWAY_SIZE)
- return (IA64_RR_MASK((vm_offset_t)ia64_gateway_page));
-
- /* Bail out if the virtual address is beyond our limits. */
- if (IA64_RR_MASK(va) >= nkpt * PAGE_SIZE * NKPTEPG)
- return (0);
-
- pte = pmap_find_kpte(va);
- if (!pmap_present(pte))
- return (0);
- return (pmap_ppn(pte) | (va & PAGE_MASK));
-}
-
-/*
- * Add a list of wired pages to the kva this routine is only used for
- * temporary kernel mappings that do not need to have page modification
- * or references recorded. Note that old mappings are simply written
- * over. The page is effectively wired, but it's customary to not have
- * the PTE reflect that, nor update statistics.
- */
-void
-pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
-{
- struct ia64_lpte *pte;
- int i;
-
- for (i = 0; i < count; i++) {
- pte = pmap_find_kpte(va);
- if (pmap_present(pte))
- pmap_invalidate_page(kernel_pmap, va);
- else
- pmap_enter_vhpt(pte, va);
- pmap_pte_prot(kernel_pmap, pte, VM_PROT_ALL);
- pmap_set_pte(pte, va, VM_PAGE_TO_PHYS(m[i]), FALSE, FALSE);
- va += PAGE_SIZE;
- }
-}
-
-/*
- * this routine jerks page mappings from the
- * kernel -- it is meant only for temporary mappings.
- */
-void
-pmap_qremove(vm_offset_t va, int count)
-{
- struct ia64_lpte *pte;
- int i;
-
- for (i = 0; i < count; i++) {
- pte = pmap_find_kpte(va);
- if (pmap_present(pte)) {
- pmap_remove_vhpt(va);
- pmap_invalidate_page(kernel_pmap, va);
- pmap_clear_present(pte);
- }
- va += PAGE_SIZE;
- }
-}
-
-/*
- * Add a wired page to the kva. As for pmap_qenter(), it's customary
- * to not have the PTE reflect that, nor update statistics.
- */
-void
-pmap_kenter(vm_offset_t va, vm_offset_t pa)
-{
- struct ia64_lpte *pte;
-
- pte = pmap_find_kpte(va);
- if (pmap_present(pte))
- pmap_invalidate_page(kernel_pmap, va);
- else
- pmap_enter_vhpt(pte, va);
- pmap_pte_prot(kernel_pmap, pte, VM_PROT_ALL);
- pmap_set_pte(pte, va, pa, FALSE, FALSE);
-}
-
-/*
- * Remove a page from the kva
- */
-void
-pmap_kremove(vm_offset_t va)
-{
- struct ia64_lpte *pte;
-
- pte = pmap_find_kpte(va);
- if (pmap_present(pte)) {
- pmap_remove_vhpt(va);
- pmap_invalidate_page(kernel_pmap, va);
- pmap_clear_present(pte);
- }
-}
-
-/*
- * Used to map a range of physical addresses into kernel
- * virtual address space.
- *
- * The value passed in '*virt' is a suggested virtual address for
- * the mapping. Architectures which can support a direct-mapped
- * physical to virtual region can return the appropriate address
- * within that region, leaving '*virt' unchanged. Other
- * architectures should map the pages starting at '*virt' and
- * update '*virt' with the first usable address after the mapped
- * region.
- */
-vm_offset_t
-pmap_map(vm_offset_t *virt, vm_offset_t start, vm_offset_t end, int prot)
-{
- return IA64_PHYS_TO_RR7(start);
-}
-
-/*
- * Remove a single page from a process address space
- */
-static void
-pmap_remove_page(pmap_t pmap, vm_offset_t va)
-{
- struct ia64_lpte *pte;
-
- KASSERT((pmap == kernel_pmap || pmap == PCPU_GET(current_pmap)),
- ("removing page for non-current pmap"));
-
- pte = pmap_find_vhpt(va);
- if (pte != NULL)
- pmap_remove_pte(pmap, pte, va, 0, 1);
- return;
-}
-
-/*
- * Remove the given range of addresses from the specified map.
- *
- * It is assumed that the start and end are properly
- * rounded to the page size.
- */
-void
-pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
-{
- pmap_t oldpmap;
- vm_offset_t va;
- pv_entry_t npv, pv;
- struct ia64_lpte *pte;
-
- if (pmap->pm_stats.resident_count == 0)
- return;
-
- vm_page_lock_queues();
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
-
- /*
- * special handling of removing one page. a very
- * common operation and easy to short circuit some
- * code.
- */
- if (sva + PAGE_SIZE == eva) {
- pmap_remove_page(pmap, sva);
- goto out;
- }
-
- if (pmap->pm_stats.resident_count < ((eva - sva) >> PAGE_SHIFT)) {
- TAILQ_FOREACH_SAFE(pv, &pmap->pm_pvlist, pv_plist, npv) {
- va = pv->pv_va;
- if (va >= sva && va < eva) {
- pte = pmap_find_vhpt(va);
- KASSERT(pte != NULL, ("pte"));
- pmap_remove_pte(pmap, pte, va, pv, 1);
- }
- }
-
- } else {
- for (va = sva; va < eva; va = va += PAGE_SIZE) {
- pte = pmap_find_vhpt(va);
- if (pte != NULL)
- pmap_remove_pte(pmap, pte, va, 0, 1);
- }
- }
-out:
- vm_page_unlock_queues();
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
-}
-
-/*
- * Routine: pmap_remove_all
- * Function:
- * Removes this physical page from
- * all physical maps in which it resides.
- * Reflects back modify bits to the pager.
- *
- * Notes:
- * Original versions of this routine were very
- * inefficient because they iteratively called
- * pmap_remove (slow...)
- */
-
-void
-pmap_remove_all(vm_page_t m)
-{
- pmap_t oldpmap;
- pv_entry_t pv;
- int s;
-
-#if defined(DIAGNOSTIC)
- /*
- * XXX this makes pmap_page_protect(NONE) illegal for non-managed
- * pages!
- */
- if (m->flags & PG_FICTITIOUS) {
- panic("pmap_page_protect: illegal for unmanaged page, va: 0x%lx", VM_PAGE_TO_PHYS(m));
- }
-#endif
-
- s = splvm();
-
- while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
- struct ia64_lpte *pte;
- pmap_t pmap = pv->pv_pmap;
- vm_offset_t va = pv->pv_va;
-
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
- pte = pmap_find_vhpt(va);
- KASSERT(pte != NULL, ("pte"));
- if (pmap_ppn(pte) != VM_PAGE_TO_PHYS(m))
- panic("pmap_remove_all: pv_table for %lx is inconsistent", VM_PAGE_TO_PHYS(m));
- pmap_remove_pte(pmap, pte, va, pv, 1);
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
- }
-
- vm_page_flag_clear(m, PG_WRITEABLE);
-
- splx(s);
- return;
-}
-
-/*
- * Set the physical protection on the
- * specified range of this map as requested.
- */
-void
-pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
-{
- pmap_t oldpmap;
- struct ia64_lpte *pte;
-
- if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
- pmap_remove(pmap, sva, eva);
- return;
- }
-
- if (prot & VM_PROT_WRITE)
- return;
-
- if ((sva & PAGE_MASK) || (eva & PAGE_MASK))
- panic("pmap_protect: unaligned addresses");
-
- vm_page_lock_queues();
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
- while (sva < eva) {
- /*
- * If page is invalid, skip this page
- */
- pte = pmap_find_vhpt(sva);
- if (pte == NULL) {
- sva += PAGE_SIZE;
- continue;
- }
-
- if (pmap_prot(pte) != prot) {
- if (pmap_managed(pte)) {
- vm_offset_t pa = pmap_ppn(pte);
- vm_page_t m = PHYS_TO_VM_PAGE(pa);
- if (pmap_dirty(pte)) {
- if (pmap_track_modified(sva))
- vm_page_dirty(m);
- pmap_clear_dirty(pte);
- }
- if (pmap_accessed(pte)) {
- vm_page_flag_set(m, PG_REFERENCED);
- pmap_clear_accessed(pte);
- }
- }
- pmap_pte_prot(pmap, pte, prot);
- pmap_invalidate_page(pmap, sva);
- }
-
- sva += PAGE_SIZE;
- }
- vm_page_unlock_queues();
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
-}
-
-/*
- * Insert the given physical page (p) at
- * the specified virtual address (v) in the
- * target physical map with the protection requested.
- *
- * If specified, the page will be wired down, meaning
- * that the related pte can not be reclaimed.
- *
- * NB: This is the only routine which MAY NOT lazy-evaluate
- * or lose information. That is, this routine must actually
- * insert this page into the given map NOW.
- */
-void
-pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
- boolean_t wired)
-{
- pmap_t oldpmap;
- vm_offset_t pa;
- vm_offset_t opa;
- struct ia64_lpte origpte;
- struct ia64_lpte *pte;
- boolean_t managed;
-
- vm_page_lock_queues();
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
-
- va &= ~PAGE_MASK;
-#ifdef DIAGNOSTIC
- if (va > VM_MAX_KERNEL_ADDRESS)
- panic("pmap_enter: toobig");
-#endif
-
- /*
- * Find (or create) a pte for the given mapping.
- */
- while ((pte = pmap_find_pte(va)) == NULL) {
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
- vm_page_unlock_queues();
- VM_WAIT;
- vm_page_lock_queues();
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
- }
- origpte = *pte;
- if (!pmap_present(pte)) {
- opa = ~0UL;
- pmap_enter_vhpt(pte, va);
- } else
- opa = pmap_ppn(pte);
- managed = FALSE;
- pa = VM_PAGE_TO_PHYS(m);
-
- /*
- * Mapping has not changed, must be protection or wiring change.
- */
- if (opa == pa) {
- /*
- * Wiring change, just update stats. We don't worry about
- * wiring PT pages as they remain resident as long as there
- * are valid mappings in them. Hence, if a user page is wired,
- * the PT page will be also.
- */
- if (wired && !pmap_wired(&origpte))
- pmap->pm_stats.wired_count++;
- else if (!wired && pmap_wired(&origpte))
- pmap->pm_stats.wired_count--;
-
- managed = (pmap_managed(&origpte)) ? TRUE : FALSE;
-
- /*
- * We might be turning off write access to the page,
- * so we go ahead and sense modify status.
- */
- if (managed && pmap_dirty(&origpte) &&
- pmap_track_modified(va))
- vm_page_dirty(m);
-
- pmap_invalidate_page(pmap, va);
- goto validate;
- }
-
- /*
- * Mapping has changed, invalidate old range and fall
- * through to handle validating new mapping.
- */
- if (opa != ~0UL) {
- pmap_remove_pte(pmap, pte, va, 0, 0);
- pmap_enter_vhpt(pte, va);
- }
-
- /*
- * Enter on the PV list if part of our managed memory.
- */
- if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
- pmap_insert_entry(pmap, va, m);
- managed = TRUE;
- }
-
- /*
- * Increment counters
- */
- pmap->pm_stats.resident_count++;
- if (wired)
- pmap->pm_stats.wired_count++;
-
-validate:
-
- /*
- * Now validate mapping with desired protection/wiring. This
- * adds the pte to the VHPT if necessary.
- */
- pmap_pte_prot(pmap, pte, prot);
- pmap_set_pte(pte, va, pa, wired, managed);
-
- vm_page_unlock_queues();
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
-}
-
-/*
- * this code makes some *MAJOR* assumptions:
- * 1. Current pmap & pmap exists.
- * 2. Not wired.
- * 3. Read access.
- * 4. No page table pages.
- * but is *MUCH* faster than pmap_enter...
- */
-
-vm_page_t
-pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
- vm_page_t mpte)
-{
- struct ia64_lpte *pte;
- pmap_t oldpmap;
- boolean_t managed;
-
- mtx_assert(&vm_page_queue_mtx, MA_OWNED);
- VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED);
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
-
- while ((pte = pmap_find_pte(va)) == NULL) {
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
- vm_page_busy(m);
- vm_page_unlock_queues();
- VM_OBJECT_UNLOCK(m->object);
- VM_WAIT;
- VM_OBJECT_LOCK(m->object);
- vm_page_lock_queues();
- vm_page_wakeup(m);
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
- }
-
- if (!pmap_present(pte)) {
- /* Enter on the PV list if its managed. */
- if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
- pmap_insert_entry(pmap, va, m);
- managed = TRUE;
- } else
- managed = FALSE;
-
- /* Increment counters. */
- pmap->pm_stats.resident_count++;
-
- /* Initialise with R/O protection and enter into VHPT. */
- pmap_enter_vhpt(pte, va);
- pmap_pte_prot(pmap, pte,
- prot & (VM_PROT_READ | VM_PROT_EXECUTE));
- pmap_set_pte(pte, va, VM_PAGE_TO_PHYS(m), FALSE, managed);
- }
-
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
- return (NULL);
-}
-
-/*
- * pmap_object_init_pt preloads the ptes for a given object
- * into the specified pmap. This eliminates the blast of soft
- * faults on process startup and immediately after an mmap.
- */
-void
-pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
- vm_object_t object, vm_pindex_t pindex,
- vm_size_t size)
-{
-
- VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
- KASSERT(object->type == OBJT_DEVICE,
- ("pmap_object_init_pt: non-device object"));
-}
-
-/*
- * Routine: pmap_change_wiring
- * Function: Change the wiring attribute for a map/virtual-address
- * pair.
- * In/out conditions:
- * The mapping must already exist in the pmap.
- */
-void
-pmap_change_wiring(pmap, va, wired)
- register pmap_t pmap;
- vm_offset_t va;
- boolean_t wired;
-{
- pmap_t oldpmap;
- struct ia64_lpte *pte;
-
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
-
- pte = pmap_find_vhpt(va);
- KASSERT(pte != NULL, ("pte"));
- if (wired && !pmap_wired(pte)) {
- pmap->pm_stats.wired_count++;
- pmap_set_wired(pte);
- } else if (!wired && pmap_wired(pte)) {
- pmap->pm_stats.wired_count--;
- pmap_clear_wired(pte);
- }
-
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
-}
-
-
-
-/*
- * Copy the range specified by src_addr/len
- * from the source map to the range dst_addr/len
- * in the destination map.
- *
- * This routine is only advisory and need not do anything.
- */
-
-void
-pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
- vm_offset_t src_addr)
-{
-}
-
-
-/*
- * pmap_zero_page zeros the specified hardware page by
- * mapping it into virtual memory and using bzero to clear
- * its contents.
- */
-
-void
-pmap_zero_page(vm_page_t m)
-{
- vm_offset_t va = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(m));
- bzero((caddr_t) va, PAGE_SIZE);
-}
-
-
-/*
- * pmap_zero_page_area zeros the specified hardware page by
- * mapping it into virtual memory and using bzero to clear
- * its contents.
- *
- * off and size must reside within a single page.
- */
-
-void
-pmap_zero_page_area(vm_page_t m, int off, int size)
-{
- vm_offset_t va = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(m));
- bzero((char *)(caddr_t)va + off, size);
-}
-
-
-/*
- * pmap_zero_page_idle zeros the specified hardware page by
- * mapping it into virtual memory and using bzero to clear
- * its contents. This is for the vm_idlezero process.
- */
-
-void
-pmap_zero_page_idle(vm_page_t m)
-{
- vm_offset_t va = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(m));
- bzero((caddr_t) va, PAGE_SIZE);
-}
-
-
-/*
- * pmap_copy_page copies the specified (machine independent)
- * page by mapping the page into virtual memory and using
- * bcopy to copy the page, one machine dependent page at a
- * time.
- */
-void
-pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
-{
- vm_offset_t src = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(msrc));
- vm_offset_t dst = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(mdst));
- bcopy((caddr_t) src, (caddr_t) dst, PAGE_SIZE);
-}
-
-/*
- * Returns true if the pmap's pv is one of the first
- * 16 pvs linked to from this page. This count may
- * be changed upwards or downwards in the future; it
- * is only necessary that true be returned for a small
- * subset of pmaps for proper page aging.
- */
-boolean_t
-pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
-{
- pv_entry_t pv;
- int loops = 0;
- int s;
-
- if (m->flags & PG_FICTITIOUS)
- return FALSE;
-
- s = splvm();
-
- /*
- * Not found, check current mappings returning immediately if found.
- */
- TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
- if (pv->pv_pmap == pmap) {
- splx(s);
- return TRUE;
- }
- loops++;
- if (loops >= 16)
- break;
- }
- splx(s);
- return (FALSE);
-}
-
-/*
- * Remove all pages from specified address space
- * this aids process exit speeds. Also, this code
- * is special cased for current process only, but
- * can have the more generic (and slightly slower)
- * mode enabled. This is much faster than pmap_remove
- * in the case of running down an entire address space.
- */
-void
-pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
-{
- pmap_t oldpmap;
- pv_entry_t pv, npv;
-
- if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
- printf("warning: pmap_remove_pages called with non-current pmap\n");
- return;
- }
-
- vm_page_lock_queues();
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
-
- for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
- struct ia64_lpte *pte;
-
- npv = TAILQ_NEXT(pv, pv_plist);
-
- if (pv->pv_va >= eva || pv->pv_va < sva)
- continue;
-
- pte = pmap_find_vhpt(pv->pv_va);
- KASSERT(pte != NULL, ("pte"));
- if (!pmap_wired(pte))
- pmap_remove_pte(pmap, pte, pv->pv_va, pv, 1);
- }
-
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
- vm_page_unlock_queues();
-}
-
-/*
- * pmap_page_protect:
- *
- * Lower the permission for all mappings to a given page.
- */
-void
-pmap_page_protect(vm_page_t m, vm_prot_t prot)
-{
- struct ia64_lpte *pte;
- pmap_t oldpmap, pmap;
- pv_entry_t pv;
-
- if ((prot & VM_PROT_WRITE) != 0)
- return;
- if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) {
- if ((m->flags & PG_WRITEABLE) == 0)
- return;
- TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
- pmap = pv->pv_pmap;
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
- pte = pmap_find_vhpt(pv->pv_va);
- KASSERT(pte != NULL, ("pte"));
- pmap_pte_prot(pmap, pte, prot);
- pmap_invalidate_page(pmap, pv->pv_va);
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
- }
- vm_page_flag_clear(m, PG_WRITEABLE);
- } else {
- pmap_remove_all(m);
- }
-}
-
-/*
- * pmap_ts_referenced:
- *
- * Return a count of reference bits for a page, clearing those bits.
- * It is not necessary for every reference bit to be cleared, but it
- * is necessary that 0 only be returned when there are truly no
- * reference bits set.
- *
- * XXX: The exact number of bits to check and clear is a matter that
- * should be tested and standardized at some point in the future for
- * optimal aging of shared pages.
- */
-int
-pmap_ts_referenced(vm_page_t m)
-{
- struct ia64_lpte *pte;
- pmap_t oldpmap;
- pv_entry_t pv;
- int count = 0;
-
- if (m->flags & PG_FICTITIOUS)
- return 0;
-
- TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
- PMAP_LOCK(pv->pv_pmap);
- oldpmap = pmap_install(pv->pv_pmap);
- pte = pmap_find_vhpt(pv->pv_va);
- KASSERT(pte != NULL, ("pte"));
- if (pmap_accessed(pte)) {
- count++;
- pmap_clear_accessed(pte);
- pmap_invalidate_page(pv->pv_pmap, pv->pv_va);
- }
- pmap_install(oldpmap);
- PMAP_UNLOCK(pv->pv_pmap);
- }
-
- return count;
-}
-
-/*
- * pmap_is_modified:
- *
- * Return whether or not the specified physical page was modified
- * in any physical maps.
- */
-boolean_t
-pmap_is_modified(vm_page_t m)
-{
- struct ia64_lpte *pte;
- pmap_t oldpmap;
- pv_entry_t pv;
- boolean_t rv;
-
- rv = FALSE;
- if (m->flags & PG_FICTITIOUS)
- return (rv);
-
- TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
- PMAP_LOCK(pv->pv_pmap);
- oldpmap = pmap_install(pv->pv_pmap);
- pte = pmap_find_vhpt(pv->pv_va);
- pmap_install(oldpmap);
- KASSERT(pte != NULL, ("pte"));
- rv = pmap_dirty(pte) ? TRUE : FALSE;
- PMAP_UNLOCK(pv->pv_pmap);
- if (rv)
- break;
- }
-
- return (rv);
-}
-
-/*
- * pmap_is_prefaultable:
- *
- * Return whether or not the specified virtual address is elgible
- * for prefault.
- */
-boolean_t
-pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
-{
- struct ia64_lpte *pte;
-
- pte = pmap_find_vhpt(addr);
- if (pte != NULL && pmap_present(pte))
- return (FALSE);
- return (TRUE);
-}
-
-/*
- * Clear the modify bits on the specified physical page.
- */
-void
-pmap_clear_modify(vm_page_t m)
-{
- struct ia64_lpte *pte;
- pmap_t oldpmap;
- pv_entry_t pv;
-
- if (m->flags & PG_FICTITIOUS)
- return;
-
- TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
- PMAP_LOCK(pv->pv_pmap);
- oldpmap = pmap_install(pv->pv_pmap);
- pte = pmap_find_vhpt(pv->pv_va);
- KASSERT(pte != NULL, ("pte"));
- if (pmap_dirty(pte)) {
- pmap_clear_dirty(pte);
- pmap_invalidate_page(pv->pv_pmap, pv->pv_va);
- }
- pmap_install(oldpmap);
- PMAP_UNLOCK(pv->pv_pmap);
- }
-}
-
-/*
- * pmap_clear_reference:
- *
- * Clear the reference bit on the specified physical page.
- */
-void
-pmap_clear_reference(vm_page_t m)
-{
- struct ia64_lpte *pte;
- pmap_t oldpmap;
- pv_entry_t pv;
-
- if (m->flags & PG_FICTITIOUS)
- return;
-
- TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
- PMAP_LOCK(pv->pv_pmap);
- oldpmap = pmap_install(pv->pv_pmap);
- pte = pmap_find_vhpt(pv->pv_va);
- KASSERT(pte != NULL, ("pte"));
- if (pmap_accessed(pte)) {
- pmap_clear_accessed(pte);
- pmap_invalidate_page(pv->pv_pmap, pv->pv_va);
- }
- pmap_install(oldpmap);
- PMAP_UNLOCK(pv->pv_pmap);
- }
-}
-
-/*
- * Map a set of physical memory pages into the kernel virtual
- * address space. Return a pointer to where it is mapped. This
- * routine is intended to be used for mapping device memory,
- * NOT real memory.
- */
-void *
-pmap_mapdev(vm_offset_t pa, vm_size_t size)
-{
- return (void*) IA64_PHYS_TO_RR6(pa);
-}
-
-/*
- * 'Unmap' a range mapped by pmap_mapdev().
- */
-void
-pmap_unmapdev(vm_offset_t va, vm_size_t size)
-{
- return;
-}
-
-/*
- * perform the pmap work for mincore
- */
-int
-pmap_mincore(pmap_t pmap, vm_offset_t addr)
-{
- pmap_t oldpmap;
- struct ia64_lpte *pte, tpte;
- int val = 0;
-
- PMAP_LOCK(pmap);
- oldpmap = pmap_install(pmap);
- pte = pmap_find_vhpt(addr);
- if (pte != NULL) {
- tpte = *pte;
- pte = &tpte;
- }
- pmap_install(oldpmap);
- PMAP_UNLOCK(pmap);
-
- if (pte == NULL)
- return 0;
-
- if (pmap_present(pte)) {
- vm_page_t m;
- vm_offset_t pa;
-
- val = MINCORE_INCORE;
- if (!pmap_managed(pte))
- return val;
-
- pa = pmap_ppn(pte);
-
- m = PHYS_TO_VM_PAGE(pa);
-
- /*
- * Modified by us
- */
- if (pmap_dirty(pte))
- val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
- else {
- /*
- * Modified by someone
- */
- vm_page_lock_queues();
- if (pmap_is_modified(m))
- val |= MINCORE_MODIFIED_OTHER;
- vm_page_unlock_queues();
- }
- /*
- * Referenced by us
- */
- if (pmap_accessed(pte))
- val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
- else {
- /*
- * Referenced by someone
- */
- vm_page_lock_queues();
- if (pmap_ts_referenced(m)) {
- val |= MINCORE_REFERENCED_OTHER;
- vm_page_flag_set(m, PG_REFERENCED);
- }
- vm_page_unlock_queues();
- }
- }
- return val;
-}
-
-void
-pmap_activate(struct thread *td)
-{
- pmap_install(vmspace_pmap(td->td_proc->p_vmspace));
-}
-
-pmap_t
-pmap_switch(pmap_t pm)
-{
- pmap_t prevpm;
- int i;
-
- mtx_assert(&sched_lock, MA_OWNED);
-
- prevpm = PCPU_GET(current_pmap);
- if (prevpm == pm)
- return (prevpm);
- if (prevpm != NULL)
- atomic_clear_32(&prevpm->pm_active, PCPU_GET(cpumask));
- if (pm == NULL) {
- for (i = 0; i < 5; i++) {
- ia64_set_rr(IA64_RR_BASE(i),
- (i << 8)|(PAGE_SHIFT << 2)|1);
- }
- } else {
- for (i = 0; i < 5; i++) {
- ia64_set_rr(IA64_RR_BASE(i),
- (pm->pm_rid[i] << 8)|(PAGE_SHIFT << 2)|1);
- }
- atomic_set_32(&pm->pm_active, PCPU_GET(cpumask));
- }
- PCPU_SET(current_pmap, pm);
- __asm __volatile("srlz.d");
- return (prevpm);
-}
-
-static pmap_t
-pmap_install(pmap_t pm)
-{
- pmap_t prevpm;
-
- mtx_lock_spin(&sched_lock);
- prevpm = pmap_switch(pm);
- mtx_unlock_spin(&sched_lock);
- return (prevpm);
-}
-
-vm_offset_t
-pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size)
-{
-
- return addr;
-}
-
-#include "opt_ddb.h"
-
-#ifdef DDB
-
-#include <ddb/ddb.h>
-
-static const char* psnames[] = {
- "1B", "2B", "4B", "8B",
- "16B", "32B", "64B", "128B",
- "256B", "512B", "1K", "2K",
- "4K", "8K", "16K", "32K",
- "64K", "128K", "256K", "512K",
- "1M", "2M", "4M", "8M",
- "16M", "32M", "64M", "128M",
- "256M", "512M", "1G", "2G"
-};
-
-static void
-print_trs(int type)
-{
- struct ia64_pal_result res;
- int i, maxtr;
- struct {
- pt_entry_t pte;
- uint64_t itir;
- uint64_t ifa;
- struct ia64_rr rr;
- } buf;
- static const char *manames[] = {
- "WB", "bad", "bad", "bad",
- "UC", "UCE", "WC", "NaT",
- };
-
- res = ia64_call_pal_static(PAL_VM_SUMMARY, 0, 0, 0);
- if (res.pal_status != 0) {
- db_printf("Can't get VM summary\n");
- return;
- }
-
- if (type == 0)
- maxtr = (res.pal_result[0] >> 40) & 0xff;
- else
- maxtr = (res.pal_result[0] >> 32) & 0xff;
-
- db_printf("V RID Virtual Page Physical Page PgSz ED AR PL D A MA P KEY\n");
- for (i = 0; i <= maxtr; i++) {
- bzero(&buf, sizeof(buf));
- res = ia64_call_pal_stacked_physical
- (PAL_VM_TR_READ, i, type, ia64_tpa((uint64_t) &buf));
- if (!(res.pal_result[0] & 1))
- buf.pte &= ~PTE_AR_MASK;
- if (!(res.pal_result[0] & 2))
- buf.pte &= ~PTE_PL_MASK;
- if (!(res.pal_result[0] & 4))
- pmap_clear_dirty(&buf);
- if (!(res.pal_result[0] & 8))
- buf.pte &= ~PTE_MA_MASK;
- db_printf("%d %06x %013lx %013lx %4s %d %d %d %d %d %-3s "
- "%d %06x\n", (int)buf.ifa & 1, buf.rr.rr_rid,
- buf.ifa >> 12, (buf.pte & PTE_PPN_MASK) >> 12,
- psnames[(buf.itir & ITIR_PS_MASK) >> 2],
- (buf.pte & PTE_ED) ? 1 : 0,
- (int)(buf.pte & PTE_AR_MASK) >> 9,
- (int)(buf.pte & PTE_PL_MASK) >> 7,
- (pmap_dirty(&buf)) ? 1 : 0,
- (pmap_accessed(&buf)) ? 1 : 0,
- manames[(buf.pte & PTE_MA_MASK) >> 2],
- (pmap_present(&buf)) ? 1 : 0,
- (int)((buf.itir & ITIR_KEY_MASK) >> 8));
- }
-}
-
-DB_COMMAND(itr, db_itr)
-{
- print_trs(0);
-}
-
-DB_COMMAND(dtr, db_dtr)
-{
- print_trs(1);
-}
-
-DB_COMMAND(rr, db_rr)
-{
- int i;
- uint64_t t;
- struct ia64_rr rr;
-
- printf("RR RID PgSz VE\n");
- for (i = 0; i < 8; i++) {
- __asm __volatile ("mov %0=rr[%1]"
- : "=r"(t)
- : "r"(IA64_RR_BASE(i)));
- *(uint64_t *) &rr = t;
- printf("%d %06x %4s %d\n",
- i, rr.rr_rid, psnames[rr.rr_ps], rr.rr_ve);
- }
-}
-
-DB_COMMAND(thash, db_thash)
-{
- if (!have_addr)
- return;
-
- db_printf("%p\n", (void *) ia64_thash(addr));
-}
-
-DB_COMMAND(ttag, db_ttag)
-{
- if (!have_addr)
- return;
-
- db_printf("0x%lx\n", ia64_ttag(addr));
-}
-
-DB_COMMAND(kpte, db_kpte)
-{
- struct ia64_lpte *pte;
-
- if (!have_addr) {
- db_printf("usage: kpte <kva>\n");
- return;
- }
- if (addr < VM_MIN_KERNEL_ADDRESS) {
- db_printf("kpte: error: invalid <kva>\n");
- return;
- }
- pte = &ia64_kptdir[KPTE_DIR_INDEX(addr)][KPTE_PTE_INDEX(addr)];
- db_printf("kpte at %p:\n", pte);
- db_printf(" pte =%016lx\n", pte->pte);
- db_printf(" itir =%016lx\n", pte->itir);
- db_printf(" tag =%016lx\n", pte->tag);
- db_printf(" chain=%016lx\n", pte->chain);
-}
-
-#endif
--- sys/ia64/ia64/nexus.c
+++ /dev/null
@@ -1,614 +0,0 @@
-/*-
- * Copyright 1998 Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby
- * granted, provided that both the above copyright notice and this
- * permission notice appear in all copies, that both the above
- * copyright notice and this permission notice appear in all
- * supporting documentation, and that the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * software without specific, written prior permission. M.I.T. makes
- * no representations about the suitability of this software for any
- * purpose. It is provided "as is" without express or implied
- * warranty.
- *
- * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
- * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
- * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/nexus.c,v 1.11 2005/03/20 06:55:49 njl Exp $
- */
-
-/*
- * This code implements a `root nexus' for Intel Architecture
- * machines. The function of the root nexus is to serve as an
- * attachment point for both processors and buses, and to manage
- * resources which are common to all of them. In particular,
- * this code implements the core resource managers for interrupt
- * requests, DMA requests (which rightfully should be a part of the
- * ISA code but it's easier to do it here for now), I/O port addresses,
- * and I/O memory address space.
- */
-
-#define __RMAN_RESOURCE_VISIBLE
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <sys/interrupt.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <machine/intr.h>
-#include <machine/nexusvar.h>
-#include <machine/pmap.h>
-#include <machine/resource.h>
-#include <machine/sapicvar.h>
-#include <machine/vmparam.h>
-
-#include <isa/isareg.h>
-#include <sys/rtprio.h>
-
-static MALLOC_DEFINE(M_NEXUSDEV, "nexusdev", "Nexus device");
-struct nexus_device {
- struct resource_list nx_resources;
- int nx_pcibus;
-};
-
-#define DEVTONX(dev) ((struct nexus_device *)device_get_ivars(dev))
-
-static struct rman irq_rman, drq_rman, port_rman, mem_rman;
-
-static int nexus_probe(device_t);
-static int nexus_attach(device_t);
-static int nexus_print_resources(struct resource_list *rl, const char *name, int type,
- const char *format);
-static int nexus_print_all_resources(device_t dev);
-static int nexus_print_child(device_t, device_t);
-static device_t nexus_add_child(device_t bus, int order, const char *name,
- int unit);
-static struct resource *nexus_alloc_resource(device_t, device_t, int, int *,
- u_long, u_long, u_long, u_int);
-static int nexus_read_ivar(device_t, device_t, int, uintptr_t *);
-static int nexus_write_ivar(device_t, device_t, int, uintptr_t);
-static int nexus_activate_resource(device_t, device_t, int, int,
- struct resource *);
-static int nexus_deactivate_resource(device_t, device_t, int, int,
- struct resource *);
-static int nexus_release_resource(device_t, device_t, int, int,
- struct resource *);
-static int nexus_setup_intr(device_t, device_t, struct resource *, int flags,
- void (*)(void *), void *, void **);
-static int nexus_teardown_intr(device_t, device_t, struct resource *,
- void *);
-static struct resource_list *nexus_get_reslist(device_t dev, device_t child);
-static int nexus_set_resource(device_t, device_t, int, int, u_long, u_long);
-static int nexus_get_resource(device_t, device_t, int, int, u_long *,
- u_long *);
-static void nexus_delete_resource(device_t, device_t, int, int);
-static int nexus_config_intr(device_t, int, enum intr_trigger,
- enum intr_polarity);
-
-static device_method_t nexus_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, nexus_probe),
- DEVMETHOD(device_attach, nexus_attach),
- DEVMETHOD(device_detach, bus_generic_detach),
- DEVMETHOD(device_shutdown, bus_generic_shutdown),
- DEVMETHOD(device_suspend, bus_generic_suspend),
- DEVMETHOD(device_resume, bus_generic_resume),
-
- /* Bus interface */
- DEVMETHOD(bus_print_child, nexus_print_child),
- DEVMETHOD(bus_add_child, nexus_add_child),
- DEVMETHOD(bus_read_ivar, nexus_read_ivar),
- DEVMETHOD(bus_write_ivar, nexus_write_ivar),
- DEVMETHOD(bus_alloc_resource, nexus_alloc_resource),
- DEVMETHOD(bus_release_resource, nexus_release_resource),
- DEVMETHOD(bus_activate_resource, nexus_activate_resource),
- DEVMETHOD(bus_deactivate_resource, nexus_deactivate_resource),
- DEVMETHOD(bus_setup_intr, nexus_setup_intr),
- DEVMETHOD(bus_teardown_intr, nexus_teardown_intr),
- DEVMETHOD(bus_get_resource_list, nexus_get_reslist),
- DEVMETHOD(bus_set_resource, nexus_set_resource),
- DEVMETHOD(bus_get_resource, nexus_get_resource),
- DEVMETHOD(bus_delete_resource, nexus_delete_resource),
- DEVMETHOD(bus_config_intr, nexus_config_intr),
-
- { 0, 0 }
-};
-
-static driver_t nexus_driver = {
- "nexus",
- nexus_methods,
- 1, /* no softc */
-};
-static devclass_t nexus_devclass;
-
-DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0);
-
-static int
-nexus_probe(device_t dev)
-{
-
- device_quiet(dev); /* suppress attach message for neatness */
-
- /*
- * XXX working notes:
- *
- * - IRQ resource creation should be moved to the PIC/APIC driver.
- * - DRQ resource creation should be moved to the DMAC driver.
- * - The above should be sorted to probe earlier than any child busses.
- *
- * - Leave I/O and memory creation here, as child probes may need them.
- * (especially eg. ACPI)
- */
-
- /*
- * IRQ's are on the mainboard on old systems, but on the ISA part
- * of PCI->ISA bridges. There would be multiple sets of IRQs on
- * multi-ISA-bus systems. PCI interrupts are routed to the ISA
- * component, so in a way, PCI can be a partial child of an ISA bus(!).
- * APIC interrupts are global though.
- *
- * XXX We depend on the AT PIC driver correctly claiming IRQ 2
- * to prevent its reuse elsewhere in the !APIC_IO case.
- */
- irq_rman.rm_start = 0;
- irq_rman.rm_type = RMAN_ARRAY;
- irq_rman.rm_descr = "Interrupt request lines";
- irq_rman.rm_end = 255;
- if (rman_init(&irq_rman)
- || rman_manage_region(&irq_rman,
- irq_rman.rm_start, irq_rman.rm_end))
- panic("nexus_probe irq_rman");
-
- /*
- * ISA DMA on PCI systems is implemented in the ISA part of each
- * PCI->ISA bridge and the channels can be duplicated if there are
- * multiple bridges. (eg: laptops with docking stations)
- */
- drq_rman.rm_start = 0;
- drq_rman.rm_end = 7;
- drq_rman.rm_type = RMAN_ARRAY;
- drq_rman.rm_descr = "DMA request lines";
- /* XXX drq 0 not available on some machines */
- if (rman_init(&drq_rman)
- || rman_manage_region(&drq_rman,
- drq_rman.rm_start, drq_rman.rm_end))
- panic("nexus_probe drq_rman");
-
- /*
- * However, IO ports and Memory truely are global at this level,
- * as are APIC interrupts (however many IO APICS there turn out
- * to be on large systems..)
- */
- port_rman.rm_start = 0;
- port_rman.rm_end = 0xffff;
- port_rman.rm_type = RMAN_ARRAY;
- port_rman.rm_descr = "I/O ports";
- if (rman_init(&port_rman)
- || rman_manage_region(&port_rman, 0, 0xffff))
- panic("nexus_probe port_rman");
-
- mem_rman.rm_start = 0;
- mem_rman.rm_end = ~0u;
- mem_rman.rm_type = RMAN_ARRAY;
- mem_rman.rm_descr = "I/O memory addresses";
- if (rman_init(&mem_rman)
- || rman_manage_region(&mem_rman, 0, ~0))
- panic("nexus_probe mem_rman");
-
- return bus_generic_probe(dev);
-}
-
-static int
-nexus_attach(device_t dev)
-{
- /*
- * Mask the legacy PICs - we will use the I/O SAPIC for interrupt.
- */
- outb(IO_ICU1+1, 0xff);
- outb(IO_ICU2+1, 0xff);
-
- bus_generic_attach(dev);
- return 0;
-}
-
-static int
-nexus_print_resources(struct resource_list *rl, const char *name, int type,
- const char *format)
-{
- struct resource_list_entry *rle;
- int printed, retval;
-
- printed = 0;
- retval = 0;
- /* Yes, this is kinda cheating */
- STAILQ_FOREACH(rle, rl, link) {
- if (rle->type == type) {
- if (printed == 0)
- retval += printf(" %s ", name);
- else if (printed > 0)
- retval += printf(",");
- printed++;
- retval += printf(format, rle->start);
- if (rle->count > 1) {
- retval += printf("-");
- retval += printf(format, rle->start +
- rle->count - 1);
- }
- }
- }
- return retval;
-}
-
-static int
-nexus_print_all_resources(device_t dev)
-{
- struct nexus_device *ndev = DEVTONX(dev);
- struct resource_list *rl = &ndev->nx_resources;
- int retval = 0;
-
- if (STAILQ_FIRST(rl) || ndev->nx_pcibus != -1)
- retval += printf(" at");
-
- retval += nexus_print_resources(rl, "port", SYS_RES_IOPORT, "%#lx");
- retval += nexus_print_resources(rl, "iomem", SYS_RES_MEMORY, "%#lx");
- retval += nexus_print_resources(rl, "irq", SYS_RES_IRQ, "%ld");
-
- return retval;
-}
-
-static int
-nexus_print_child(device_t bus, device_t child)
-{
- struct nexus_device *ndev = DEVTONX(child);
- int retval = 0;
-
- retval += bus_print_child_header(bus, child);
- retval += nexus_print_all_resources(child);
- if (ndev->nx_pcibus != -1)
- retval += printf(" pcibus %d", ndev->nx_pcibus);
- if (device_get_flags(child))
- retval += printf(" flags %#x", device_get_flags(child));
- retval += printf(" on motherboard\n"); /* XXX "motherboard", ick */
-
- return (retval);
-}
-
-static device_t
-nexus_add_child(device_t bus, int order, const char *name, int unit)
-{
- device_t child;
- struct nexus_device *ndev;
-
- ndev = malloc(sizeof(struct nexus_device), M_NEXUSDEV, M_NOWAIT|M_ZERO);
- if (!ndev)
- return(0);
- resource_list_init(&ndev->nx_resources);
- ndev->nx_pcibus = -1;
-
- child = device_add_child_ordered(bus, order, name, unit);
-
- /* should we free this in nexus_child_detached? */
- device_set_ivars(child, ndev);
-
- return(child);
-}
-
-static int
-nexus_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
- struct nexus_device *ndev = DEVTONX(child);
-
- switch (which) {
- case NEXUS_IVAR_PCIBUS:
- *result = ndev->nx_pcibus;
- break;
- default:
- return ENOENT;
- }
- return 0;
-}
-
-
-static int
-nexus_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
-{
- struct nexus_device *ndev = DEVTONX(child);
-
- switch (which) {
- case NEXUS_IVAR_PCIBUS:
- ndev->nx_pcibus = value;
- break;
- default:
- return ENOENT;
- }
- return 0;
-}
-
-
-/*
- * Allocate a resource on behalf of child. NB: child is usually going to be a
- * child of one of our descendants, not a direct child of nexus0.
- * (Exceptions include npx.)
- */
-static struct resource *
-nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- struct nexus_device *ndev = DEVTONX(child);
- struct resource *rv;
- struct resource_list_entry *rle;
- struct rman *rm;
- int needactivate = flags & RF_ACTIVE;
-
- /*
- * If this is an allocation of the "default" range for a given RID, and
- * we know what the resources for this device are (ie. they aren't maintained
- * by a child bus), then work out the start/end values.
- */
- if ((start == 0UL) && (end == ~0UL) && (count == 1)) {
- if (ndev == NULL)
- return(NULL);
- rle = resource_list_find(&ndev->nx_resources, type, *rid);
- if (rle == NULL)
- return(NULL);
- start = rle->start;
- end = rle->end;
- count = rle->count;
- }
-
- flags &= ~RF_ACTIVE;
-
- switch (type) {
- case SYS_RES_IRQ:
- rm = &irq_rman;
- break;
-
- case SYS_RES_DRQ:
- rm = &drq_rman;
- break;
-
- case SYS_RES_IOPORT:
- rm = &port_rman;
- break;
-
- case SYS_RES_MEMORY:
- rm = &mem_rman;
- break;
-
- default:
- return 0;
- }
-
- rv = rman_reserve_resource(rm, start, end, count, flags, child);
- if (rv == 0)
- return 0;
-
- if (type == SYS_RES_MEMORY) {
- rman_set_bustag(rv, IA64_BUS_SPACE_MEM);
- } else if (type == SYS_RES_IOPORT) {
- rman_set_bustag(rv, IA64_BUS_SPACE_IO);
- /* IBM-PC: the type of bus_space_handle_t is u_int */
- rman_set_bushandle(rv, rv->r_start);
- }
-
- if (needactivate) {
- if (bus_activate_resource(child, type, *rid, rv)) {
- rman_release_resource(rv);
- return 0;
- }
- }
-
- return rv;
-}
-
-static int
-nexus_activate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- /*
- * If this is a memory resource, map it into the kernel.
- */
- if (rman_get_bustag(r) == IA64_BUS_SPACE_MEM) {
- vm_offset_t paddr = rman_get_start(r);
- vm_offset_t psize = rman_get_size(r);
- caddr_t vaddr = 0;
-
- vaddr = pmap_mapdev(paddr, psize);
- rman_set_virtual(r, vaddr);
- rman_set_bushandle(r, (bus_space_handle_t) paddr);
- }
- return (rman_activate_resource(r));
-}
-
-static int
-nexus_deactivate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
-
- return (rman_deactivate_resource(r));
-}
-
-static int
-nexus_release_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- if (rman_get_flags(r) & RF_ACTIVE) {
- int error = bus_deactivate_resource(child, type, rid, r);
- if (error)
- return error;
- }
- return (rman_release_resource(r));
-}
-
-/*
- * Currently this uses the really grody interface from kern/kern_intr.c
- * (which really doesn't belong in kern/anything.c). Eventually, all of
- * the code in kern_intr.c and machdep_intr.c should get moved here, since
- * this is going to be the official interface.
- */
-static int
-nexus_setup_intr(device_t bus, device_t child, struct resource *irq,
- int flags, void (*ihand)(void *), void *arg, void **cookiep)
-{
- driver_t *driver;
- int error;
-
- /* somebody tried to setup an irq that failed to allocate! */
- if (irq == NULL)
- panic("nexus_setup_intr: NULL irq resource!");
-
- *cookiep = 0;
- if ((irq->r_flags & RF_SHAREABLE) == 0)
- flags |= INTR_EXCL;
-
- driver = device_get_driver(child);
-
- /*
- * We depend here on rman_activate_resource() being idempotent.
- */
- error = rman_activate_resource(irq);
- if (error)
- return (error);
-
- error = ia64_setup_intr(device_get_nameunit(child), irq->r_start,
- ihand, arg, flags, cookiep, 0);
-
- return (error);
-}
-
-static int
-nexus_teardown_intr(device_t dev, device_t child, struct resource *r, void *ih)
-{
-#if 0
- return (inthand_remove(ih));
-#else
- return 0;
-#endif
-}
-
-static struct resource_list *
-nexus_get_reslist(device_t dev, device_t child)
-{
- struct nexus_device *ndev = DEVTONX(child);
-
- return (&ndev->nx_resources);
-}
-
-static int
-nexus_set_resource(device_t dev, device_t child, int type, int rid, u_long start, u_long count)
-{
- struct nexus_device *ndev = DEVTONX(child);
- struct resource_list *rl = &ndev->nx_resources;
-
- /* XXX this should return a success/failure indicator */
- resource_list_add(rl, type, rid, start, start + count - 1, count);
- return(0);
-}
-
-static int
-nexus_get_resource(device_t dev, device_t child, int type, int rid, u_long *startp, u_long *countp)
-{
- struct nexus_device *ndev = DEVTONX(child);
- struct resource_list *rl = &ndev->nx_resources;
- struct resource_list_entry *rle;
-
- rle = resource_list_find(rl, type, rid);
- device_printf(child, "type %d rid %d startp %p countp %p - got %p\n",
- type, rid, startp, countp, rle);
- if (!rle)
- return(ENOENT);
- if (startp)
- *startp = rle->start;
- if (countp)
- *countp = rle->count;
- return(0);
-}
-
-static void
-nexus_delete_resource(device_t dev, device_t child, int type, int rid)
-{
- struct nexus_device *ndev = DEVTONX(child);
- struct resource_list *rl = &ndev->nx_resources;
-
- resource_list_delete(rl, type, rid);
-}
-
-static int
-nexus_config_intr(device_t dev, int irq, enum intr_trigger trig,
- enum intr_polarity pol)
-{
-
- return (sapic_config_intr(irq, trig, pol));
-}
-
-#if 0
-
-/*
- * Placeholder which claims PnP 'devices' which describe system
- * resources.
- */
-static struct isa_pnp_id sysresource_ids[] = {
- { 0x010cd041 /* PNP0c01 */, "System Memory" },
- { 0x020cd041 /* PNP0c02 */, "System Resource" },
- { 0 }
-};
-
-static int
-sysresource_probe(device_t dev)
-{
- int result;
-
- if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, sysresource_ids)) <= 0) {
- device_quiet(dev);
- }
- return(result);
-}
-
-static int
-sysresource_attach(device_t dev)
-{
- return(0);
-}
-
-static device_method_t sysresource_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, sysresource_probe),
- DEVMETHOD(device_attach, sysresource_attach),
- DEVMETHOD(device_detach, bus_generic_detach),
- DEVMETHOD(device_shutdown, bus_generic_shutdown),
- DEVMETHOD(device_suspend, bus_generic_suspend),
- DEVMETHOD(device_resume, bus_generic_resume),
- { 0, 0 }
-};
-
-static driver_t sysresource_driver = {
- "sysresource",
- sysresource_methods,
- 1, /* no softc */
-};
-
-static devclass_t sysresource_devclass;
-
-DRIVER_MODULE(sysresource, isa, sysresource_driver, sysresource_devclass, 0, 0);
-
-#endif
--- sys/ia64/ia64/sal.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/sal.c,v 1.14.2.1 2005/09/13 21:07:14 marcel Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <vm/vm.h>
-#include <vm/vm_kern.h>
-#include <machine/efi.h>
-#include <machine/md_var.h>
-#include <machine/sal.h>
-#include <machine/smp.h>
-
-/*
- * IPIs are used more genericly than only
- * for inter-processor interrupts. Don't
- * make it a SMP specific thing...
- */
-int ipi_vector[IPI_COUNT];
-
-static struct ia64_fdesc sal_fdesc;
-static sal_entry_t fake_sal;
-
-extern u_int64_t ia64_pal_entry;
-sal_entry_t *ia64_sal_entry = fake_sal;
-
-static struct uuid sal_table = EFI_TABLE_SAL;
-static struct sal_system_table *sal_systbl;
-
-static struct ia64_sal_result
-fake_sal(u_int64_t a1, u_int64_t a2, u_int64_t a3, u_int64_t a4,
- u_int64_t a5, u_int64_t a6, u_int64_t a7, u_int64_t a8)
-{
- struct ia64_sal_result res;
- res.sal_status = -3;
- res.sal_result[0] = 0;
- res.sal_result[1] = 0;
- res.sal_result[2] = 0;
- return res;
-}
-
-static void
-setup_ipi_vectors(int ceil)
-{
- int ipi;
-
- ipi_vector[IPI_MCA_RENDEZ] = ceil - 0x10;
-
- ipi = IPI_AST; /* First generic IPI. */
- ceil -= 0x20; /* First vector in group. */
- while (ipi < IPI_COUNT)
- ipi_vector[ipi++] = ceil++;
-
- ipi_vector[IPI_HIGH_FP] = ceil - 0x30;
- ipi_vector[IPI_MCA_CMCV] = ceil - 0x30 + 1;
- ipi_vector[IPI_TEST] = ceil - 0x30 + 2;
-}
-
-void
-ia64_sal_init(void)
-{
- static int sizes[6] = {
- 48, 32, 16, 32, 16, 16
- };
- u_int8_t *p;
- int i;
-
- sal_systbl = efi_get_table(&sal_table);
- if (sal_systbl == NULL)
- return;
-
- if (memcmp(sal_systbl->sal_signature, SAL_SIGNATURE, 4)) {
- printf("Bad signature for SAL System Table\n");
- return;
- }
-
- p = (u_int8_t *) (sal_systbl + 1);
- for (i = 0; i < sal_systbl->sal_entry_count; i++) {
- switch (*p) {
- case 0: {
- struct sal_entrypoint_descriptor *dp;
-
- dp = (struct sal_entrypoint_descriptor*)p;
- ia64_pal_entry = IA64_PHYS_TO_RR7(dp->sale_pal_proc);
- if (bootverbose)
- printf("PAL Proc at 0x%lx\n", ia64_pal_entry);
- sal_fdesc.func = IA64_PHYS_TO_RR7(dp->sale_sal_proc);
- sal_fdesc.gp = IA64_PHYS_TO_RR7(dp->sale_sal_gp);
- if (bootverbose)
- printf("SAL Proc at 0x%lx, GP at 0x%lx\n",
- sal_fdesc.func, sal_fdesc.gp);
- ia64_sal_entry = (sal_entry_t *) &sal_fdesc;
- break;
- }
- case 5: {
- struct sal_ap_wakeup_descriptor *dp;
-#ifdef SMP
- struct ia64_sal_result result;
- struct ia64_fdesc *fd;
-#endif
-
- dp = (struct sal_ap_wakeup_descriptor*)p;
- if (dp->sale_mechanism != 0) {
- printf("SAL: unsupported AP wake-up mechanism "
- "(%d)\n", dp->sale_mechanism);
- break;
- }
-
- if (dp->sale_vector < 0x10 || dp->sale_vector > 0xff) {
- printf("SAL: invalid AP wake-up vector "
- "(0x%lx)\n", dp->sale_vector);
- break;
- }
-
- /*
- * SAL documents that the wake-up vector should be
- * high (close to 255). The MCA rendezvous vector
- * should be less than the wake-up vector, but still
- * "high". We use the following priority assignment:
- * Wake-up: priority of the sale_vector
- * Rendezvous: priority-1
- * Generic IPIs: priority-2
- * Special IPIs: priority-3
- * Consequently, the wake-up priority should be at
- * least 4 (ie vector >= 0x40).
- */
- if (dp->sale_vector < 0x40) {
- printf("SAL: AP wake-up vector too low "
- "(0x%lx)\n", dp->sale_vector);
- break;
- }
-
- if (bootverbose)
- printf("SAL: AP wake-up vector: 0x%lx\n",
- dp->sale_vector);
-
- ipi_vector[IPI_AP_WAKEUP] = dp->sale_vector;
- setup_ipi_vectors(dp->sale_vector & 0xf0);
-
-#ifdef SMP
- fd = (struct ia64_fdesc *) os_boot_rendez;
- result = ia64_sal_entry(SAL_SET_VECTORS,
- SAL_OS_BOOT_RENDEZ, ia64_tpa(fd->func),
- ia64_tpa(fd->gp), 0, 0, 0, 0);
-#endif
-
- break;
- }
- }
- p += sizes[*p];
- }
-
- if (ipi_vector[IPI_AP_WAKEUP] == 0)
- setup_ipi_vectors(0xf0);
-}
--- sys/ia64/ia64/genassym.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*-
- * Copyright (c) 1982, 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/genassym.c,v 1.41.2.1 2006/01/28 18:40:55 marcel Exp $
- */
-
-#include "opt_compat.h"
-#include "opt_kstack_pages.h"
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/assym.h>
-#include <sys/proc.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/errno.h>
-#include <sys/proc.h>
-#include <sys/mount.h>
-#include <sys/socket.h>
-#include <sys/resource.h>
-#include <sys/resourcevar.h>
-#include <sys/ucontext.h>
-#include <machine/frame.h>
-#include <machine/mutex.h>
-#include <machine/elf.h>
-#include <machine/pal.h>
-#include <machine/pcb.h>
-#include <sys/vmmeter.h>
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-#include <vm/vm_map.h>
-#include <net/if.h>
-#include <netinet/in.h>
-
-#ifdef COMPAT_IA32
-ASSYM(COMPAT_IA32, COMPAT_IA32);
-#endif
-
-ASSYM(DT_NULL, DT_NULL);
-ASSYM(DT_RELA, DT_RELA);
-ASSYM(DT_RELAENT, DT_RELAENT);
-ASSYM(DT_RELASZ, DT_RELASZ);
-ASSYM(DT_SYMTAB, DT_SYMTAB);
-ASSYM(DT_SYMENT, DT_SYMENT);
-
-ASSYM(EFAULT, EFAULT);
-ASSYM(ENAMETOOLONG, ENAMETOOLONG);
-ASSYM(ERESTART, ERESTART);
-
-ASSYM(FRAME_SYSCALL, FRAME_SYSCALL);
-
-ASSYM(IA64_ID_PAGE_SHIFT, IA64_ID_PAGE_SHIFT);
-
-ASSYM(KSTACK_PAGES, KSTACK_PAGES);
-
-ASSYM(MC_PRESERVED, offsetof(mcontext_t, mc_preserved));
-ASSYM(MC_PRESERVED_FP, offsetof(mcontext_t, mc_preserved_fp));
-ASSYM(MC_SPECIAL, offsetof(mcontext_t, mc_special));
-ASSYM(MC_SPECIAL_BSPSTORE, offsetof(mcontext_t, mc_special.bspstore));
-ASSYM(MC_SPECIAL_RNAT, offsetof(mcontext_t, mc_special.rnat));
-
-ASSYM(PAGE_SHIFT, PAGE_SHIFT);
-ASSYM(PAGE_SIZE, PAGE_SIZE);
-
-ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid));
-ASSYM(PC_CURRENT_PMAP, offsetof(struct pcpu, pc_current_pmap));
-ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread));
-ASSYM(PC_IDLETHREAD, offsetof(struct pcpu, pc_idlethread));
-
-ASSYM(PCB_CURRENT_PMAP, offsetof(struct pcb, pcb_current_pmap));
-ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault));
-ASSYM(PCB_SPECIAL_RP, offsetof(struct pcb, pcb_special.rp));
-
-ASSYM(R_IA_64_DIR64LSB, R_IA_64_DIR64LSB);
-ASSYM(R_IA_64_FPTR64LSB, R_IA_64_FPTR64LSB);
-ASSYM(R_IA_64_NONE, R_IA_64_NONE);
-ASSYM(R_IA_64_REL64LSB, R_IA_64_REL64LSB);
-
-ASSYM(SIZEOF_PCB, sizeof(struct pcb));
-ASSYM(SIZEOF_SPECIAL, sizeof(struct _special));
-ASSYM(SIZEOF_TRAPFRAME, sizeof(struct trapframe));
-
-ASSYM(TD_FLAGS, offsetof(struct thread, td_flags));
-ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack));
-ASSYM(TD_PCB, offsetof(struct thread, td_pcb));
-
-ASSYM(TDF_ASTPENDING, TDF_ASTPENDING);
-ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED);
-
-ASSYM(UC_MCONTEXT, offsetof(ucontext_t, uc_mcontext));
-
-ASSYM(VM_MAX_ADDRESS, VM_MAX_ADDRESS);
--- sys/ia64/ia64/locore.S
+++ /dev/null
@@ -1,432 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia64/locore.S,v 1.38.2.1 2006/01/28 18:40:55 marcel Exp $
- */
-
-#include <machine/asm.h>
-#include <machine/ia64_cpu.h>
-#include <machine/pte.h>
-#include <sys/syscall.h>
-#include <assym.s>
-
-#ifndef EVCNT_COUNTERS
-#define _LOCORE
-#include <machine/intrcnt.h>
-#endif
-
- .section .data.proc0,"aw"
- .global kstack
- .align PAGE_SIZE
-kstack: .space KSTACK_PAGES * PAGE_SIZE
-
- .text
-
-/*
- * Not really a leaf but we can't return.
- * The EFI loader passes the physical address of the bootinfo block in
- * register r8.
- */
-ENTRY_NOPROFILE(__start, 1)
- .prologue
- .save rp,r0
- .body
-{ .mlx
- mov ar.rsc=0
- movl r16=ia64_vector_table // set up IVT early
- ;;
-}
-{ .mlx
- mov cr.iva=r16
- movl r16=kstack
- ;;
-}
-{ .mmi
- srlz.i
- ;;
- ssm IA64_PSR_DFH
- mov r17=KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
- ;;
-}
-{ .mlx
- add sp=r16,r17 // proc0's stack
- movl gp=__gp // find kernel globals
- ;;
-}
-{ .mlx
- mov ar.bspstore=r16 // switch backing store
- movl r16=pa_bootinfo
- ;;
-}
- st8 [r16]=r8 // save the PA of the bootinfo block
- loadrs // invalidate regs
- ;;
- mov ar.rsc=3 // turn rse back on
- ;;
- alloc r16=ar.pfs,0,0,1,0
- ;;
- movl out0=0 // we are linked at the right address
- ;; // we just need to process fptrs
- br.call.sptk.many rp=_reloc
- ;;
- br.call.sptk.many rp=ia64_init
- ;;
- /* NOTREACHED */
-1: br.cond.sptk.few 1b
-END(__start)
-
-/*
- * fork_trampoline()
- *
- * Arrange for a function to be invoked neatly, after a cpu_switch().
- *
- * Invokes fork_exit() passing in three arguments: a callout function, an
- * argument to the callout, and a trapframe pointer. For child processes
- * returning from fork(2), the argument is a pointer to the child process.
- *
- * The callout function and its argument is in the trapframe in scratch
- * registers r2 and r3.
- */
-ENTRY(fork_trampoline, 0)
- .prologue
- .save rp,r0
- .body
-{ .mmi
- alloc r14=ar.pfs,0,0,3,0
- add r15=32+SIZEOF_SPECIAL+8,sp
- add r16=32+SIZEOF_SPECIAL+16,sp
- ;;
-}
-{ .mmi
- ld8 out0=[r15]
- ld8 out1=[r16]
- nop 0
-}
-{ .mfb
- add out2=16,sp
- nop 0
- br.call.sptk rp=fork_exit
- ;;
-}
- // If we get back here, it means we're a user space process that's
- // the immediate result of fork(2).
- .global enter_userland
- .type enter_userland, @function
-enter_userland:
-{ .mfb
- nop 0
- nop 0
- br.sptk epc_syscall_return
- ;;
-}
-END(fork_trampoline)
-
-#ifdef SMP
-/*
- * AP wake-up entry point. The handoff state is similar as for the BSP,
- * as described on page 3-9 of the IPF SAL Specification. The difference
- * lies in the contents of register b0. For APs this register holds the
- * return address into the SAL rendezvous routine.
- *
- * Note that we're responsible for clearing the IRR bit by reading cr.ivr
- * and issuing the EOI to the local SAPIC.
- */
- .align 32
-ENTRY_NOPROFILE(os_boot_rendez,0)
- mov r16=cr.ivr // clear IRR bit
- ;;
- srlz.d
- mov cr.eoi=r0 // ACK the wake-up
- ;;
- srlz.d
- rsm IA64_PSR_IC|IA64_PSR_I
- ;;
- mov r16 = (5<<8)|(PAGE_SHIFT<<2)|1
- movl r17 = 5<<61
- ;;
- mov rr[r17] = r16
- ;;
- srlz.d
- mov r16 = (6<<8)|(IA64_ID_PAGE_SHIFT<<2)
- movl r17 = 6<<61
- ;;
- mov rr[r17] = r16
- ;;
- srlz.d
- mov r16 = (7<<8)|(IA64_ID_PAGE_SHIFT<<2)
- movl r17 = 7<<61
- ;;
- mov rr[r17] = r16
- ;;
- srlz.d
- mov r16 = PTE_PRESENT+PTE_MA_WB+PTE_ACCESSED+PTE_DIRTY+ \
- PTE_PL_KERN+PTE_AR_RWX
- mov r18 = 28<<2
- ;;
-
- mov cr.ifa = r17
- mov cr.itir = r18
- ptr.d r17, r18
- ptr.i r17, r18
- ;;
- srlz.i
- ;;
- itr.d dtr[r0] = r16
- ;;
- itr.i itr[r0] = r16
- ;;
- srlz.i
- ;;
-1: mov r16 = ip
- add r17 = 2f-1b, r17
- movl r18 = (IA64_PSR_AC|IA64_PSR_BN|IA64_PSR_DFH|IA64_PSR_DT|IA64_PSR_IC|IA64_PSR_IT|IA64_PSR_RT)
- ;;
- add r17 = r17, r16
- mov cr.ipsr = r18
- mov cr.ifs = r0
- ;;
- mov cr.iip = r17
- ;;
- rfi
-
- .align 32
-2:
-{ .mlx
- mov ar.rsc = 0
- movl r16 = ia64_vector_table // set up IVT early
- ;;
-}
-{ .mlx
- mov cr.iva = r16
- movl r16 = ap_stack
- ;;
-}
-{ .mmi
- srlz.i
- ;;
- ld8 r16 = [r16]
- mov r18 = KSTACK_PAGES*PAGE_SIZE-SIZEOF_PCB-SIZEOF_TRAPFRAME-16
- ;;
-}
-{ .mlx
- mov ar.bspstore = r16
- movl gp = __gp
- ;;
-}
-{ .mmi
- loadrs
- ;;
- alloc r17 = ar.pfs, 0, 0, 0, 0
- add sp = r18, r16
- ;;
-}
-{ .mfb
- mov ar.rsc = 3
- nop 0
- br.call.sptk.few rp = ia64_ap_startup
- ;;
-}
- /* NOT REACHED */
-9:
-{ .mfb
- nop 0
- nop 0
- br.sptk 9b
- ;;
-}
-END(os_boot_rendez)
-
-#endif /* !SMP */
-
-/*
- * Create a default interrupt name table. The first entry (vector 0) is
- * hardwaired to the clock interrupt.
- */
- .data
- .align 8
-EXPORT(intrnames)
- .ascii "clock"
- .fill INTRNAME_LEN - 5 - 1, 1, ' '
- .byte 0
-intr_n = 0
-.rept INTRCNT_COUNT - 1
- .ascii "#"
- .byte intr_n / 100 + '0'
- .byte (intr_n % 100) / 10 + '0'
- .byte intr_n % 10 + '0'
- .fill INTRNAME_LEN - 1 - 3 - 1, 1, ' '
- .byte 0
- intr_n = intr_n + 1
-.endr
-EXPORT(eintrnames)
- .align 8
-EXPORT(intrcnt)
- .fill INTRCNT_COUNT, 8, 0
-EXPORT(eintrcnt)
-
- .text
- // in0: image base
-STATIC_ENTRY(_reloc, 1)
- alloc loc0=ar.pfs,1,2,0,0
- mov loc1=rp
- ;;
- movl r15=@gprel(_DYNAMIC) // find _DYNAMIC etc.
- movl r2=@gprel(fptr_storage)
- movl r3=@gprel(fptr_storage_end)
- ;;
- add r15=r15,gp // relocate _DYNAMIC etc.
- add r2=r2,gp
- add r3=r3,gp
- ;;
-1: ld8 r16=[r15],8 // read r15->d_tag
- ;;
- ld8 r17=[r15],8 // and r15->d_val
- ;;
- cmp.eq p6,p0=DT_NULL,r16 // done?
-(p6) br.cond.dpnt.few 2f
- ;;
- cmp.eq p6,p0=DT_RELA,r16
- ;;
-(p6) add r18=r17,in0 // found rela section
- ;;
- cmp.eq p6,p0=DT_RELASZ,r16
- ;;
-(p6) mov r19=r17 // found rela size
- ;;
- cmp.eq p6,p0=DT_SYMTAB,r16
- ;;
-(p6) add r20=r17,in0 // found symbol table
- ;;
-(p6) setf.sig f8=r20
- ;;
- cmp.eq p6,p0=DT_SYMENT,r16
- ;;
-(p6) setf.sig f9=r17 // found symbol entry size
- ;;
- cmp.eq p6,p0=DT_RELAENT,r16
- ;;
-(p6) mov r22=r17 // found rela entry size
- ;;
- br.sptk.few 1b
-
-2:
- ld8 r15=[r18],8 // read r_offset
- ;;
- ld8 r16=[r18],8 // read r_info
- add r15=r15,in0 // relocate r_offset
- ;;
- ld8 r17=[r18],8 // read r_addend
- sub r19=r19,r22 // update relasz
-
- extr.u r23=r16,0,32 // ELF64_R_TYPE(r16)
- ;;
- cmp.eq p6,p0=R_IA_64_NONE,r23
-(p6) br.cond.dpnt.few 3f
- ;;
- cmp.eq p6,p0=R_IA_64_REL64LSB,r23
-(p6) br.cond.dptk.few 4f
- ;;
-
- extr.u r16=r16,32,32 // ELF64_R_SYM(r16)
- ;;
- setf.sig f10=r16 // so we can multiply
- ;;
- xma.lu f10=f10,f9,f8 // f10=symtab + r_sym*syment
- ;;
- getf.sig r16=f10
- ;;
- add r16=8,r16 // address of st_value
- ;;
- ld8 r16=[r16] // read symbol value
- ;;
- add r16=r16,in0 // relocate symbol value
- ;;
-
- cmp.eq p6,p0=R_IA_64_DIR64LSB,r23
-(p6) br.cond.dptk.few 5f
- ;;
- cmp.eq p6,p0=R_IA_64_FPTR64LSB,r23
-(p6) br.cond.dptk.few 6f
- ;;
-
-3:
- cmp.ltu p6,p0=0,r19 // more?
-(p6) br.cond.dptk.few 2b // loop
- mov r8=0 // success return value
- br.cond.sptk.few 9f // done
-
-4:
- add r16=in0,r17 // BD + A
- ;;
- st8 [r15]=r16 // word64 (LSB)
- br.cond.sptk.few 3b
-
-5:
- add r16=r16,r17 // S + A
- ;;
- st8 [r15]=r16 // word64 (LSB)
- br.cond.sptk.few 3b
-
-6:
- movl r17=@gprel(fptr_storage)
- ;;
- add r17=r17,gp // start of fptrs
- ;;
-7: cmp.geu p6,p0=r17,r2 // end of fptrs?
-(p6) br.cond.dpnt.few 8f // can't find existing fptr
- ld8 r20=[r17] // read function from fptr
- ;;
- cmp.eq p6,p0=r16,r20 // same function?
- ;;
-(p6) st8 [r15]=r17 // reuse fptr
-(p6) br.cond.sptk.few 3b // done
- add r17=16,r17 // next fptr
- br.cond.sptk.few 7b
-
-8: // allocate new fptr
- mov r8=1 // failure return value
- cmp.geu p6,p0=r2,r3 // space left?
-(p6) br.cond.dpnt.few 9f // bail out
-
- st8 [r15]=r2 // install fptr
- st8 [r2]=r16,8 // write fptr address
- ;;
- st8 [r2]=gp,8 // write fptr gp
- br.cond.sptk.few 3b
-
-9:
- mov ar.pfs=loc0
- mov rp=loc1
- ;;
- br.ret.sptk.few rp
-
-END(_reloc)
-
- .data
- .align 16
- .global fptr_storage
-fptr_storage:
- .space 4096*16 // XXX
-fptr_storage_end:
--- sys/ia64/ia64/uma_machdep.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*-
- * Copyright (c) 2003 The FreeBSD Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/uma_machdep.c,v 1.2 2005/01/06 22:18:22 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/systm.h>
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-#include <vm/vm_pageout.h>
-#include <vm/uma.h>
-#include <vm/uma_int.h>
-#include <machine/vmparam.h>
-
-void *
-uma_small_alloc(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
-{
- static vm_pindex_t color;
- void *va;
- vm_page_t m;
- int pflags;
-
- *flags = UMA_SLAB_PRIV;
- if ((wait & (M_NOWAIT|M_USE_RESERVE)) == M_NOWAIT)
- pflags = VM_ALLOC_INTERRUPT;
- else
- pflags = VM_ALLOC_SYSTEM;
- if (wait & M_ZERO)
- pflags |= VM_ALLOC_ZERO;
-
- for (;;) {
- m = vm_page_alloc(NULL, color++, pflags | VM_ALLOC_NOOBJ);
- if (m == NULL) {
- if (wait & M_NOWAIT)
- return (NULL);
- VM_WAIT;
- } else
- break;
- }
-
- va = (void *)IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(m));
- if ((wait & M_ZERO) && (m->flags & PG_ZERO) == 0)
- bzero(va, PAGE_SIZE);
- return (va);
-}
-
-void
-uma_small_free(void *mem, int size, u_int8_t flags)
-{
- vm_page_t m;
-
- m = PHYS_TO_VM_PAGE(IA64_RR_MASK((u_int64_t)mem));
- vm_page_lock_queues();
- vm_page_free(m);
- vm_page_unlock_queues();
-}
--- sys/ia64/ia64/dump_machdep.c
+++ /dev/null
@@ -1,317 +0,0 @@
-/*-
- * Copyright (c) 2002 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/dump_machdep.c,v 1.13 2005/07/02 19:57:31 marcel Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/cons.h>
-#include <sys/kernel.h>
-#include <sys/kerneldump.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <machine/efi.h>
-#include <machine/elf.h>
-#include <machine/md_var.h>
-
-CTASSERT(sizeof(struct kerneldumpheader) == 512);
-
-/*
- * Don't touch the first SIZEOF_METADATA bytes on the dump device. This
- * is to protect us from metadata and to protect metadata from us.
- */
-#define SIZEOF_METADATA (64*1024)
-
-#define MD_ALIGN(x) (((off_t)(x) + EFI_PAGE_MASK) & ~EFI_PAGE_MASK)
-#define DEV_ALIGN(x) (((off_t)(x) + (DEV_BSIZE-1)) & ~(DEV_BSIZE-1))
-
-typedef int callback_t(struct efi_md*, int, void*);
-
-static struct kerneldumpheader kdh;
-static off_t dumplo, fileofs;
-
-/* Handle buffered writes. */
-static char buffer[DEV_BSIZE];
-static size_t fragsz;
-
-/* XXX should be MI */
-static void
-mkdumpheader(struct kerneldumpheader *kdh, uint32_t archver, uint64_t dumplen,
- uint32_t blksz)
-{
-
- bzero(kdh, sizeof(*kdh));
- strncpy(kdh->magic, KERNELDUMPMAGIC, sizeof(kdh->magic));
- strncpy(kdh->architecture, MACHINE_ARCH, sizeof(kdh->architecture));
- kdh->version = htod32(KERNELDUMPVERSION);
- kdh->architectureversion = htod32(archver);
- kdh->dumplength = htod64(dumplen);
- kdh->dumptime = htod64(time_second);
- kdh->blocksize = htod32(blksz);
- strncpy(kdh->hostname, hostname, sizeof(kdh->hostname));
- strncpy(kdh->versionstring, version, sizeof(kdh->versionstring));
- if (panicstr != NULL)
- strncpy(kdh->panicstring, panicstr, sizeof(kdh->panicstring));
- kdh->parity = kerneldump_parity(kdh);
-}
-
-static int
-buf_write(struct dumperinfo *di, char *ptr, size_t sz)
-{
- size_t len;
- int error;
-
- while (sz) {
- len = DEV_BSIZE - fragsz;
- if (len > sz)
- len = sz;
- bcopy(ptr, buffer + fragsz, len);
- fragsz += len;
- ptr += len;
- sz -= len;
- if (fragsz == DEV_BSIZE) {
- error = di->dumper(di->priv, buffer, 0, dumplo,
- DEV_BSIZE);
- if (error)
- return error;
- dumplo += DEV_BSIZE;
- fragsz = 0;
- }
- }
-
- return (0);
-}
-
-static int
-buf_flush(struct dumperinfo *di)
-{
- int error;
-
- if (fragsz == 0)
- return (0);
-
- error = di->dumper(di->priv, buffer, 0, dumplo, DEV_BSIZE);
- dumplo += DEV_BSIZE;
- fragsz = 0;
- return (error);
-}
-
-static int
-cb_dumpdata(struct efi_md *mdp, int seqnr, void *arg)
-{
- struct dumperinfo *di = (struct dumperinfo*)arg;
- vm_offset_t pa;
- uint64_t pgs;
- size_t counter, sz;
- int c, error, twiddle;
-
- error = 0; /* catch case in which mdp->md_pages is 0 */
- counter = 0; /* Update twiddle every 16MB */
- twiddle = 0;
- pgs = mdp->md_pages;
- pa = IA64_PHYS_TO_RR7(mdp->md_phys);
-
- printf(" chunk %d: %ld pages ", seqnr, (long)pgs);
-
- while (pgs) {
- sz = (pgs > (DFLTPHYS >> EFI_PAGE_SHIFT))
- ? DFLTPHYS : pgs << EFI_PAGE_SHIFT;
- counter += sz;
- if (counter >> 24) {
- printf("%c\b", "|/-\\"[twiddle++ & 3]);
- counter &= (1<<24) - 1;
- }
- error = di->dumper(di->priv, (void*)pa, 0, dumplo, sz);
- if (error)
- break;
- dumplo += sz;
- pgs -= sz >> EFI_PAGE_SHIFT;
- pa += sz;
-
- /* Check for user abort. */
- c = cncheckc();
- if (c == 0x03)
- return (ECANCELED);
- if (c != -1)
- printf("(CTRL-C to abort) ");
- }
- printf("... %s\n", (error) ? "fail" : "ok");
- return (error);
-}
-
-static int
-cb_dumphdr(struct efi_md *mdp, int seqnr, void *arg)
-{
- struct dumperinfo *di = (struct dumperinfo*)arg;
- Elf64_Phdr phdr;
- int error;
-
- bzero(&phdr, sizeof(phdr));
- phdr.p_type = PT_LOAD;
- phdr.p_flags = PF_R; /* XXX */
- phdr.p_offset = fileofs;
- phdr.p_vaddr = (uintptr_t)mdp->md_virt; /* XXX probably bogus. */
- phdr.p_paddr = mdp->md_phys;
- phdr.p_filesz = mdp->md_pages << EFI_PAGE_SHIFT;
- phdr.p_memsz = mdp->md_pages << EFI_PAGE_SHIFT;
- phdr.p_align = EFI_PAGE_SIZE;
-
- error = buf_write(di, (char*)&phdr, sizeof(phdr));
- fileofs += phdr.p_filesz;
- return (error);
-}
-
-static int
-cb_size(struct efi_md *mdp, int seqnr, void *arg)
-{
- uint64_t *sz = (uint64_t*)arg;
-
- *sz += (uint64_t)mdp->md_pages << EFI_PAGE_SHIFT;
- return (0);
-}
-
-static int
-foreach_chunk(callback_t cb, void *arg)
-{
- struct efi_md *mdp;
- int error, seqnr;
-
- seqnr = 0;
- mdp = efi_md_first();
- while (mdp != NULL) {
- if (mdp->md_type == EFI_MD_TYPE_FREE) {
- error = (*cb)(mdp, seqnr++, arg);
- if (error)
- return (-error);
- }
- mdp = efi_md_next(mdp);
- }
- return (seqnr);
-}
-
-void
-dumpsys(struct dumperinfo *di)
-{
- Elf64_Ehdr ehdr;
- uint64_t dumpsize;
- off_t hdrgap;
- size_t hdrsz;
- int error;
-
- bzero(&ehdr, sizeof(ehdr));
- ehdr.e_ident[EI_MAG0] = ELFMAG0;
- ehdr.e_ident[EI_MAG1] = ELFMAG1;
- ehdr.e_ident[EI_MAG2] = ELFMAG2;
- ehdr.e_ident[EI_MAG3] = ELFMAG3;
- ehdr.e_ident[EI_CLASS] = ELFCLASS64;
-#if BYTE_ORDER == LITTLE_ENDIAN
- ehdr.e_ident[EI_DATA] = ELFDATA2LSB;
-#else
- ehdr.e_ident[EI_DATA] = ELFDATA2MSB;
-#endif
- ehdr.e_ident[EI_VERSION] = EV_CURRENT;
- ehdr.e_ident[EI_OSABI] = ELFOSABI_STANDALONE; /* XXX big picture? */
- ehdr.e_type = ET_CORE;
- ehdr.e_machine = EM_IA_64;
- ehdr.e_phoff = sizeof(ehdr);
- ehdr.e_flags = EF_IA_64_ABSOLUTE; /* XXX misuse? */
- ehdr.e_ehsize = sizeof(ehdr);
- ehdr.e_phentsize = sizeof(Elf64_Phdr);
- ehdr.e_shentsize = sizeof(Elf64_Shdr);
-
- /* Calculate dump size. */
- dumpsize = 0L;
- ehdr.e_phnum = foreach_chunk(cb_size, &dumpsize);
- hdrsz = ehdr.e_phoff + ehdr.e_phnum * ehdr.e_phentsize;
- fileofs = MD_ALIGN(hdrsz);
- dumpsize += fileofs;
- hdrgap = fileofs - DEV_ALIGN(hdrsz);
-
- /* Determine dump offset on device. */
- if (di->mediasize < SIZEOF_METADATA + dumpsize + sizeof(kdh) * 2) {
- error = ENOSPC;
- goto fail;
- }
- dumplo = di->mediaoffset + di->mediasize - dumpsize;
- dumplo -= sizeof(kdh) * 2;
-
- mkdumpheader(&kdh, KERNELDUMP_IA64_VERSION, dumpsize, di->blocksize);
-
- printf("Dumping %llu MB (%d chunks)\n", (long long)dumpsize >> 20,
- ehdr.e_phnum);
-
- /* Dump leader */
- error = di->dumper(di->priv, &kdh, 0, dumplo, sizeof(kdh));
- if (error)
- goto fail;
- dumplo += sizeof(kdh);
-
- /* Dump ELF header */
- error = buf_write(di, (char*)&ehdr, sizeof(ehdr));
- if (error)
- goto fail;
-
- /* Dump program headers */
- error = foreach_chunk(cb_dumphdr, di);
- if (error < 0)
- goto fail;
- buf_flush(di);
-
- /*
- * All headers are written using blocked I/O, so we know the
- * current offset is (still) block aligned. Skip the alignement
- * in the file to have the segment contents aligned at page
- * boundary. We cannot use MD_ALIGN on dumplo, because we don't
- * care and may very well be unaligned within the dump device.
- */
- dumplo += hdrgap;
-
- /* Dump memory chunks (updates dumplo) */
- error = foreach_chunk(cb_dumpdata, di);
- if (error < 0)
- goto fail;
-
- /* Dump trailer */
- error = di->dumper(di->priv, &kdh, 0, dumplo, sizeof(kdh));
- if (error)
- goto fail;
-
- /* Signal completion, signoff and exit stage left. */
- di->dumper(di->priv, NULL, 0, 0, 0);
- printf("\nDump complete\n");
- return;
-
- fail:
- if (error < 0)
- error = -error;
-
- if (error == ECANCELED)
- printf("\nDump aborted\n");
- else
- printf("\n** DUMP FAILED (ERROR %d) **\n", error);
-}
--- sys/ia64/ia64/ptrace_machdep.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*-
- * Copyright (c) 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia64/ptrace_machdep.c,v 1.4 2005/01/06 22:18:22 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/ptrace.h>
-#include <machine/frame.h>
-
-int
-cpu_ptrace(struct thread *td, int req, void *addr, int data)
-{
- struct trapframe *tf;
- uint64_t *kstack;
- int error;
-
- error = EINVAL;
- tf = td->td_frame;
-
- switch (req) {
- case PT_GETKSTACK:
- if (data >= 0 && data < (tf->tf_special.ndirty >> 3)) {
- kstack = (uint64_t*)(td->td_kstack +
- (tf->tf_special.bspstore & 0x1ffUL));
- error = copyout(kstack + data, addr, 8);
- }
- break;
- case PT_SETKSTACK:
- if (data >= 0 && data < (tf->tf_special.ndirty >> 3)) {
- kstack = (uint64_t*)(td->td_kstack +
- (tf->tf_special.bspstore & 0x1ffUL));
- error = copyin(addr, kstack + data, 8);
- }
- break;
- }
-
- return (error);
-}
--- sys/arm/arm/db_disasm.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/* $NetBSD: db_disasm.c,v 1.4 2003/07/15 00:24:38 lukem Exp $ */
-
-/*-
- * Copyright (c) 1996 Mark Brinicombe.
- * Copyright (c) 1996 Brini.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/db_disasm.c,v 1.2 2005/01/05 21:58:47 imp Exp $");
-#include <sys/param.h>
-#include <machine/db_machdep.h>
-#include <ddb/ddb.h>
-#include <ddb/db_access.h>
-#include <ddb/db_sym.h>
-
-#include <machine/disassem.h>
-
-/* Glue code to interface db_disasm to the generic ARM disassembler */
-
-static u_int db_disasm_read_word(u_int);
-static void db_disasm_printaddr(u_int);
-
-static const disasm_interface_t db_disasm_interface = {
- db_disasm_read_word,
- db_disasm_printaddr,
- db_printf
-};
-
-static u_int
-db_disasm_read_word(u_int address)
-{
-
- return db_get_value(address, 4, 0);
-}
-
-static void
-db_disasm_printaddr(u_int address)
-{
-
- db_printsym((db_addr_t)address, DB_STGY_ANY);
-}
-
-vm_offset_t
-db_disasm(vm_offset_t loc, boolean_t altfmt)
-{
-
- return disasm(&db_disasm_interface, loc, altfmt);
-}
-
-/* End of db_disasm.c */
--- sys/arm/arm/setstack.s
+++ /dev/null
@@ -1,94 +0,0 @@
-/* $NetBSD: setstack.S,v 1.1 2001/07/28 13:28:03 chris Exp $ */
-
-/*-
- * Copyright (c) 1994 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * setstack.S
- *
- * Miscellaneous routine to play with the stack pointer in different CPU modes
- *
- * Eventually this routine can be inline assembly.
- *
- * Created : 17/09/94
- *
- * Based of kate/display/setstack.s
- *
- */
-
-#include <machine/armreg.h>
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/setstack.s,v 1.2 2005/01/05 21:58:47 imp Exp $");
-
-/* To set the stack pointer for a particular mode we must switch
- * to that mode update the banked r13 and then switch back.
- * This routine provides an easy way of doing this for any mode
- *
- * r0 = CPU mode
- * r1 = stackptr
- */
-
-ENTRY(set_stackptr)
- mrs r3, cpsr_all /* Switch to the appropriate mode */
- bic r2, r3, #(PSR_MODE)
- orr r2, r2, r0
- msr cpsr_all, r2
-
- mov sp, r1 /* Set the stack pointer */
-
- msr cpsr_all, r3 /* Restore the old mode */
-
- mov pc, lr /* Exit */
-
-/* To get the stack pointer for a particular mode we must switch
- * to that mode copy the banked r13 and then switch back.
- * This routine provides an easy way of doing this for any mode
- *
- * r0 = CPU mode
- */
-
-ENTRY(get_stackptr)
- mrs r3, cpsr_all /* Switch to the appropriate mode */
- bic r2, r3, #(PSR_MODE)
- orr r2, r2, r0
- msr cpsr_all, r2
-
- mov r0, sp /* Set the stack pointer */
-
- msr cpsr_all, r3 /* Restore the old mode */
-
- mov pc, lr /* Exit */
-
-/* End of setstack.S */
--- sys/arm/arm/in_cksum_arm.S
+++ /dev/null
@@ -1,339 +0,0 @@
-/* $NetBSD: in_cksum_arm.S,v 1.2 2003/09/23 10:01:36 scw Exp $ */
-
-/*-
- * Copyright 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Steve C. Woodford for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/*
- * Hand-optimised in_cksum() and in4_cksum() implementations for ARM/Xscale
- */
-
-#include "opt_inet.h"
-
-#include <machine/asm.h>
-#include "assym.s"
-__FBSDID("$FreeBSD: src/sys/arm/arm/in_cksum_arm.S,v 1.5 2005/05/24 21:44:34 cognet Exp $");
-
-/*
- * int in_cksum(struct mbuf *m, int len)
- *
- * Entry:
- * r0 m
- * r1 len
- *
- * NOTE: Assumes 'm' is *never* NULL.
- */
-/* LINTSTUB: Func: int in_cksum(struct mbuf *, int) */
-ENTRY(in_cksum)
- stmfd sp!, {r4-r11,lr}
- mov r8, #0x00
- mov r9, r1
- mov r10, #0x00
- mov ip, r0
-
-.Lin_cksum_loop:
- ldr r1, [ip, #(M_LEN)]
- ldr r0, [ip, #(M_DATA)]
- ldr ip, [ip, #(M_NEXT)]
-.Lin_cksum_entry4:
- cmp r9, r1
- movlt r1, r9
- sub r9, r9, r1
- eor r11, r10, r0
- add r10, r10, r1
- adds r2, r1, #0x00
- blne _ASM_LABEL(L_cksumdata)
- tst r11, #0x01
- movne r2, r2, ror #8
- adds r8, r8, r2
- adc r8, r8, #0x00
- cmp ip, #0x00
- bne .Lin_cksum_loop
-
- mov r1, #0xff
- orr r1, r1, #0xff00
- and r0, r8, r1
- add r0, r0, r8, lsr #16
- add r0, r0, r0, lsr #16
- and r0, r0, r1
- eor r0, r0, r1
- ldmfd sp!, {r4-r11,pc}
-
-
-ENTRY(do_cksum)
- stmfd sp!, {r4-r11, lr}
- bl L_cksumdata
- mov r0, r2
- ldmfd sp!, {r4-r11, pc}
-/*
- * The main in*_cksum() workhorse...
- *
- * Entry parameters:
- * r0 Pointer to buffer
- * r1 Buffer length
- * lr Return address
- *
- * Returns:
- * r2 Accumulated 32-bit sum
- *
- * Clobbers:
- * r0-r7
- */
-/* LINTSTUB: Ignore */
-ASENTRY_NP(L_cksumdata)
-#ifdef __XSCALE__
- pld [r0] /* Pre-fetch the start of the buffer */
-#endif
- mov r2, #0
-
- /* We first have to word-align the buffer. */
- ands r7, r0, #0x03
- beq .Lcksumdata_wordaligned
- rsb r7, r7, #0x04
- cmp r1, r7 /* Enough bytes left to make it? */
- blt .Lcksumdata_endgame
- cmp r7, #0x02
- ldrb r4, [r0], #0x01 /* Fetch 1st byte */
- ldrgeb r5, [r0], #0x01 /* Fetch 2nd byte */
- movlt r5, #0x00
- ldrgtb r6, [r0], #0x01 /* Fetch 3rd byte */
- movle r6, #0x00
- /* Combine the three bytes depending on endianness and alignment */
-#ifdef __ARMEB__
- orreq r2, r5, r4, lsl #8
- orreq r2, r2, r6, lsl #24
- orrne r2, r4, r5, lsl #8
- orrne r2, r2, r6, lsl #16
-#else
- orreq r2, r4, r5, lsl #8
- orreq r2, r2, r6, lsl #16
- orrne r2, r5, r4, lsl #8
- orrne r2, r2, r6, lsl #24
-#endif
- subs r1, r1, r7 /* Update length */
- RETeq /* All done? */
-
- /* Buffer is now word aligned */
-.Lcksumdata_wordaligned:
-#ifdef __XSCALE__
- cmp r1, #0x04 /* Less than 4 bytes left? */
- blt .Lcksumdata_endgame /* Yup */
-
- /* Now quad-align, if necessary */
- ands r7, r0, #0x04
- ldrne r7, [r0], #0x04
- subne r1, r1, #0x04
- subs r1, r1, #0x40
- blt .Lcksumdata_bigloop_end /* Note: C flag clear if branch taken */
-
- /*
- * Buffer is now quad aligned. Sum 64 bytes at a time.
- * Note: First ldrd is hoisted above the loop, together with
- * setting r6 to zero to avoid stalling for results in the
- * loop. (r7 is live, from above).
- */
- ldrd r4, [r0], #0x08
- mov r6, #0x00
-.Lcksumdata_bigloop:
- pld [r0, #0x18]
- adds r2, r2, r6
- adcs r2, r2, r7
- ldrd r6, [r0], #0x08
- adcs r2, r2, r4
- adcs r2, r2, r5
- ldrd r4, [r0], #0x08
- adcs r2, r2, r6
- adcs r2, r2, r7
- ldrd r6, [r0], #0x08
- adcs r2, r2, r4
- adcs r2, r2, r5
- ldrd r4, [r0], #0x08
- adcs r2, r2, r6
- adcs r2, r2, r7
- pld [r0, #0x18]
- ldrd r6, [r0], #0x08
- adcs r2, r2, r4
- adcs r2, r2, r5
- ldrd r4, [r0], #0x08
- adcs r2, r2, r6
- adcs r2, r2, r7
- ldrd r6, [r0], #0x08
- adcs r2, r2, r4
- adcs r2, r2, r5
- adc r2, r2, #0x00
- subs r1, r1, #0x40
- ldrged r4, [r0], #0x08
- bge .Lcksumdata_bigloop
-
- adds r2, r2, r6 /* r6/r7 still need summing */
-.Lcksumdata_bigloop_end:
- adcs r2, r2, r7
- adc r2, r2, #0x00
-
-#else /* !__XSCALE__ */
-
- subs r1, r1, #0x40
- blt .Lcksumdata_bigloop_end
-
-.Lcksumdata_bigloop:
- ldmia r0!, {r3, r4, r5, r6}
- adds r2, r2, r3
- adcs r2, r2, r4
- adcs r2, r2, r5
- ldmia r0!, {r3, r4, r5, r7}
- adcs r2, r2, r6
- adcs r2, r2, r3
- adcs r2, r2, r4
- adcs r2, r2, r5
- ldmia r0!, {r3, r4, r5, r6}
- adcs r2, r2, r7
- adcs r2, r2, r3
- adcs r2, r2, r4
- adcs r2, r2, r5
- ldmia r0!, {r3, r4, r5, r7}
- adcs r2, r2, r6
- adcs r2, r2, r3
- adcs r2, r2, r4
- adcs r2, r2, r5
- adcs r2, r2, r7
- adc r2, r2, #0x00
- subs r1, r1, #0x40
- bge .Lcksumdata_bigloop
-.Lcksumdata_bigloop_end:
-#endif
-
- adds r1, r1, #0x40
- RETeq
- cmp r1, #0x20
-
-#ifdef __XSCALE__
- ldrged r4, [r0], #0x08 /* Avoid stalling pld and result */
- blt .Lcksumdata_less_than_32
- pld [r0, #0x18]
- ldrd r6, [r0], #0x08
- adds r2, r2, r4
- adcs r2, r2, r5
- ldrd r4, [r0], #0x08
- adcs r2, r2, r6
- adcs r2, r2, r7
- ldrd r6, [r0], #0x08
- adcs r2, r2, r4
- adcs r2, r2, r5
- adcs r2, r2, r6 /* XXX: Unavoidable result stall */
- adcs r2, r2, r7
-#else
- blt .Lcksumdata_less_than_32
- ldmia r0!, {r3, r4, r5, r6}
- adds r2, r2, r3
- adcs r2, r2, r4
- adcs r2, r2, r5
- ldmia r0!, {r3, r4, r5, r7}
- adcs r2, r2, r6
- adcs r2, r2, r3
- adcs r2, r2, r4
- adcs r2, r2, r5
- adcs r2, r2, r7
-#endif
- adc r2, r2, #0x00
- subs r1, r1, #0x20
- RETeq
-
-.Lcksumdata_less_than_32:
- /* There are less than 32 bytes left */
- and r3, r1, #0x18
- rsb r4, r3, #0x18
- sub r1, r1, r3
- adds r4, r4, r4, lsr #1 /* Side effect: Clear carry flag */
- addne pc, pc, r4
- nop
-
-/*
- * Note: We use ldm here, even on Xscale, since the combined issue/result
- * latencies for ldm and ldrd are the same. Using ldm avoids needless #ifdefs.
- */
- /* At least 24 bytes remaining... */
- ldmia r0!, {r4, r5}
- adcs r2, r2, r4
- adcs r2, r2, r5
-
- /* At least 16 bytes remaining... */
- ldmia r0!, {r4, r5}
- adcs r2, r2, r4
- adcs r2, r2, r5
-
- /* At least 8 bytes remaining... */
- ldmia r0!, {r4, r5}
- adcs r2, r2, r4
- adcs r2, r2, r5
-
- /* Less than 8 bytes remaining... */
- adc r2, r2, #0x00
- subs r1, r1, #0x04
- blt .Lcksumdata_lessthan4
-
- ldr r4, [r0], #0x04
- sub r1, r1, #0x04
- adds r2, r2, r4
- adc r2, r2, #0x00
-
- /* Deal with < 4 bytes remaining */
-.Lcksumdata_lessthan4:
- adds r1, r1, #0x04
- RETeq
-
- /* Deal with 1 to 3 remaining bytes, possibly misaligned */
-.Lcksumdata_endgame:
- ldrb r3, [r0] /* Fetch first byte */
- cmp r1, #0x02
- ldrgeb r4, [r0, #0x01] /* Fetch 2nd and 3rd as necessary */
- movlt r4, #0x00
- ldrgtb r5, [r0, #0x02]
- movle r5, #0x00
- /* Combine the three bytes depending on endianness and alignment */
- tst r0, #0x01
-#ifdef __ARMEB__
- orreq r3, r4, r3, lsl #8
- orreq r3, r3, r5, lsl #24
- orrne r3, r3, r4, lsl #8
- orrne r3, r3, r5, lsl #16
-#else
- orreq r3, r3, r4, lsl #8
- orreq r3, r3, r5, lsl #16
- orrne r3, r4, r3, lsl #8
- orrne r3, r3, r5, lsl #24
-#endif
- adds r2, r2, r3
- adc r2, r2, #0x00
- RET
--- sys/arm/arm/in_cksum.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/* $NetBSD: in_cksum.c,v 1.7 1997/09/02 13:18:15 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1988, 1992, 1993
- * The Regents of the University of California. All rights reserved.
- * Copyright (c) 1996
- * Matt Thomas <matt at 3am-software.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)in_cksum.c 8.1 (Berkeley) 6/10/93
- */
-
-#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__FBSDID("$FreeBSD: src/sys/arm/arm/in_cksum.c,v 1.4 2005/05/24 21:44:34 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/mbuf.h>
-#include <sys/systm.h>
-#include <netinet/in_systm.h>
-#include <netinet/in.h>
-#include <netinet/ip.h>
-#include <machine/in_cksum.h>
-
-/*
- * Checksum routine for Internet Protocol family headers
- * (Portable Alpha version).
- *
- * This routine is very heavily used in the network
- * code and should be modified for each CPU to be as fast as possible.
- */
-
-#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
-#define REDUCE32 \
- { \
- q_util.q = sum; \
- sum = q_util.s[0] + q_util.s[1] + q_util.s[2] + q_util.s[3]; \
- }
-#define REDUCE16 \
- { \
- q_util.q = sum; \
- l_util.l = q_util.s[0] + q_util.s[1] + q_util.s[2] + q_util.s[3]; \
- sum = l_util.s[0] + l_util.s[1]; \
- ADDCARRY(sum); \
- }
-
-union l_util {
- u_int16_t s[2];
- u_int32_t l;
-};
-union q_util {
- u_int16_t s[4];
- u_int32_t l[2];
- u_int64_t q;
-};
-
-u_short
-in_addword(u_short a, u_short b)
-{
- u_int64_t sum = a + b;
-
- ADDCARRY(sum);
- return (sum);
-}
-
-u_short
-in_pseudo(u_int32_t a, u_int32_t b, u_int32_t c)
-{
- u_int64_t sum;
- union q_util q_util;
- union l_util l_util;
-
- sum = (u_int64_t) a + b + c;
- REDUCE16;
- return (sum);
-}
-
-u_short
-in_cksum_skip(struct mbuf *m, int len, int skip)
-{
- u_int64_t sum = 0;
- int mlen = 0;
- int clen = 0;
- caddr_t addr;
- union q_util q_util;
- union l_util l_util;
-
- len -= skip;
- for (; skip && m; m = m->m_next) {
- if (m->m_len > skip) {
- mlen = m->m_len - skip;
- addr = mtod(m, caddr_t) + skip;
- goto skip_start;
- } else {
- skip -= m->m_len;
- }
- }
-
- for (; m && len; m = m->m_next) {
- if (m->m_len == 0)
- continue;
- mlen = m->m_len;
- addr = mtod(m, caddr_t);
-skip_start:
- if (len < mlen)
- mlen = len;
-
- if ((clen ^ (int) addr) & 1)
- sum += do_cksum(addr, mlen) << 8;
- else
- sum += do_cksum(addr, mlen);
-
- clen += mlen;
- len -= mlen;
- }
- REDUCE16;
- return (~sum & 0xffff);
-}
--- sys/arm/arm/exception.S
+++ /dev/null
@@ -1,254 +0,0 @@
-/* $NetBSD: exception.S,v 1.13 2003/10/31 16:30:15 scw Exp $ */
-
-/*-
- * Copyright (c) 1994-1997 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * exception.S
- *
- * Low level handlers for exception vectors
- *
- * Created : 24/09/94
- *
- * Based on kate/display/abort.s
- *
- */
-
-#include "assym.s"
-
-#include <machine/asm.h>
-#include <machine/armreg.h>
-#include <machine/asmacros.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/exception.S,v 1.5 2005/01/05 21:58:47 imp Exp $");
-
- .text
- .align 0
-
-AST_LOCALS
-
-/*
- * reset_entry:
- *
- * Handler for Reset exception.
- */
-ASENTRY_NP(reset_entry)
- adr r0, Lreset_panicmsg
- bl _C_LABEL(panic)
- /* NOTREACHED */
-Lreset_panicmsg:
- .asciz "Reset vector called, LR = 0x%08x"
- .balign 4
-
-/*
- * swi_entry
- *
- * Handler for the Software Interrupt exception.
- */
-ASENTRY_NP(swi_entry)
- PUSHFRAME
-
- mov r0, sp /* Pass the frame to any function */
- bl _C_LABEL(swi_handler) /* It's a SWI ! */
-
- DO_AST
- PULLFRAME
- movs pc, lr /* Exit */
-
-/*
- * prefetch_abort_entry:
- *
- * Handler for the Prefetch Abort exception.
- */
-ASENTRY_NP(prefetch_abort_entry)
-#ifdef __XSCALE__
- nop /* Make absolutely sure any pending */
- nop /* imprecise aborts have occurred. */
-#endif
- sub lr, lr, #0x00000004 /* Adjust the lr */
-
- PUSHFRAMEINSVC
- ldr r1, Lprefetch_abort_handler_address
- adr lr, exception_exit
- mov r0, sp /* pass the stack pointer as r0 */
- ldr pc, [r1]
-
-Lprefetch_abort_handler_address:
- .word _C_LABEL(prefetch_abort_handler_address)
-
- .data
- .global _C_LABEL(prefetch_abort_handler_address)
-
-_C_LABEL(prefetch_abort_handler_address):
- .word abortprefetch
-
- .text
-abortprefetch:
- adr r0, abortprefetchmsg
- b _C_LABEL(panic)
-
-abortprefetchmsg:
- .asciz "abortprefetch"
- .align 0
-
-/*
- * data_abort_entry:
- *
- * Handler for the Data Abort exception.
- */
-ASENTRY_NP(data_abort_entry)
-#ifdef __XSCALE__
- nop /* Make absolutely sure any pending */
- nop /* imprecise aborts have occurred. */
-#endif
-
- sub lr, lr, #0x00000008 /* Adjust the lr */
- PUSHFRAMEINSVC /* Push trap frame and switch */
- /* to SVC32 mode */
- ldr r1, Ldata_abort_handler_address
- adr lr, exception_exit
- mov r0, sp /* pass the stack pointer as r0 */
- ldr pc, [r1]
-Ldata_abort_handler_address:
- .word _C_LABEL(data_abort_handler_address)
-
- .data
- .global _C_LABEL(data_abort_handler_address)
-_C_LABEL(data_abort_handler_address):
- .word abortdata
-
- .text
-abortdata:
- adr r0, abortdatamsg
- b _C_LABEL(panic)
-
-abortdatamsg:
- .asciz "abortdata"
- .align 0
-
-/*
- * address_exception_entry:
- *
- * Handler for the Address Exception exception.
- *
- * NOTE: This exception isn't really used on arm32. We
- * print a warning message to the console and then treat
- * it like a Data Abort.
- */
-ASENTRY_NP(address_exception_entry)
- mrs r1, cpsr_all
- mrs r2, spsr_all
- mov r3, lr
- adr r0, Laddress_exception_msg
- bl _C_LABEL(printf) /* XXX CLOBBERS LR!! */
- b data_abort_entry
-Laddress_exception_msg:
- .asciz "Address Exception CPSR=0x%08x SPSR=0x%08x LR=0x%08x\n"
- .balign 4
-
-/*
- * General exception exit handler
- * (Placed here to be within range of all the references to it)
- *
- * It exits straight away if not returning to USR mode.
- * This loops around delivering any pending ASTs.
- * Interrupts are disabled at suitable points to avoid ASTs
- * being posted between testing and exit to user mode.
- *
- * This function uses PULLFRAMEFROMSVCANDEXIT and
- * DO_AST
- * only be called if the exception handler used PUSHFRAMEINSVC
- *
- */
-
-exception_exit:
- DO_AST
- PULLFRAMEFROMSVCANDEXIT
-
-/*
- * undefined_entry:
- *
- * Handler for the Undefined Instruction exception.
- *
- * We indirect the undefined vector via the handler address
- * in the data area. Entry to the undefined handler must
- * look like direct entry from the vector.
- */
-ASENTRY_NP(undefined_entry)
- stmfd sp!, {r0, r1}
- ldr r0, Lundefined_handler_indirection
- ldr r1, [sp], #0x0004
- str r1, [r0, #0x0000]
- ldr r1, [sp], #0x0004
- str r1, [r0, #0x0004]
- ldmia r0, {r0, r1, pc}
-
-
-Lundefined_handler_indirection:
- .word Lundefined_handler_indirection_data
-
-/*
- * assembly bounce code for calling the kernel
- * undefined instruction handler. This uses
- * a standard trap frame and is called in SVC mode.
- */
-
-ENTRY_NP(undefinedinstruction_bounce)
- PUSHFRAMEINSVC
-
- mov r0, sp
- adr lr, exception_exit
- b _C_LABEL(undefinedinstruction)
-
- .data
- .align 0
-
-#ifdef IPKDB
-Lipkdb_trap_return_data:
- .word 0
-#endif
-
-/*
- * Indirection data
- * 2 words use for preserving r0 and r1
- * 3rd word contains the undefined handler address.
- */
-
-Lundefined_handler_indirection_data:
- .word 0
- .word 0
-
- .global _C_LABEL(undefined_handler_address)
-_C_LABEL(undefined_handler_address):
- .word _C_LABEL(undefinedinstruction_bounce)
--- sys/arm/arm/disassem.c
+++ /dev/null
@@ -1,681 +0,0 @@
-/* $NetBSD: disassem.c,v 1.14 2003/03/27 16:58:36 mycroft Exp $ */
-
-/*-
- * Copyright (c) 1996 Mark Brinicombe.
- * Copyright (c) 1996 Brini.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * db_disasm.c
- *
- * Kernel disassembler
- *
- * Created : 10/02/96
- *
- * Structured after the sparc/sparc/db_disasm.c by David S. Miller &
- * Paul Kranenburg
- *
- * This code is not complete. Not all instructions are disassembled.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/disassem.c,v 1.2 2005/01/05 21:58:47 imp Exp $");
-#include <sys/param.h>
-
-
-#include <sys/systm.h>
-#include <machine/disassem.h>
-#include <machine/armreg.h>
-#include <ddb/ddb.h>
-
-/*
- * General instruction format
- *
- * insn[cc][mod] [operands]
- *
- * Those fields with an uppercase format code indicate that the field
- * follows directly after the instruction before the separator i.e.
- * they modify the instruction rather than just being an operand to
- * the instruction. The only exception is the writeback flag which
- * follows a operand.
- *
- *
- * 2 - print Operand 2 of a data processing instruction
- * d - destination register (bits 12-15)
- * n - n register (bits 16-19)
- * s - s register (bits 8-11)
- * o - indirect register rn (bits 16-19) (used by swap)
- * m - m register (bits 0-3)
- * a - address operand of ldr/str instruction
- * l - register list for ldm/stm instruction
- * f - 1st fp operand (register) (bits 12-14)
- * g - 2nd fp operand (register) (bits 16-18)
- * h - 3rd fp operand (register/immediate) (bits 0-4)
- * b - branch address
- * t - thumb branch address (bits 24, 0-23)
- * k - breakpoint comment (bits 0-3, 8-19)
- * X - block transfer type
- * Y - block transfer type (r13 base)
- * c - comment field bits(0-23)
- * p - saved or current status register
- * F - PSR transfer fields
- * D - destination-is-r15 (P) flag on TST, TEQ, CMP, CMN
- * L - co-processor transfer size
- * S - set status flag
- * P - fp precision
- * Q - fp precision (for ldf/stf)
- * R - fp rounding
- * v - co-processor data transfer registers + addressing mode
- * W - writeback flag
- * x - instruction in hex
- * # - co-processor number
- * y - co-processor data processing registers
- * z - co-processor register transfer registers
- */
-
-struct arm32_insn {
- u_int mask;
- u_int pattern;
- char* name;
- char* format;
-};
-
-static const struct arm32_insn arm32_i[] = {
- { 0x0fffffff, 0x0ff00000, "imb", "c" }, /* Before swi */
- { 0x0fffffff, 0x0ff00001, "imbrange", "c" }, /* Before swi */
- { 0x0f000000, 0x0f000000, "swi", "c" },
- { 0xfe000000, 0xfa000000, "blx", "t" }, /* Before b and bl */
- { 0x0f000000, 0x0a000000, "b", "b" },
- { 0x0f000000, 0x0b000000, "bl", "b" },
- { 0x0fe000f0, 0x00000090, "mul", "Snms" },
- { 0x0fe000f0, 0x00200090, "mla", "Snmsd" },
- { 0x0fe000f0, 0x00800090, "umull", "Sdnms" },
- { 0x0fe000f0, 0x00c00090, "smull", "Sdnms" },
- { 0x0fe000f0, 0x00a00090, "umlal", "Sdnms" },
- { 0x0fe000f0, 0x00e00090, "smlal", "Sdnms" },
- { 0x0d700000, 0x04200000, "strt", "daW" },
- { 0x0d700000, 0x04300000, "ldrt", "daW" },
- { 0x0d700000, 0x04600000, "strbt", "daW" },
- { 0x0d700000, 0x04700000, "ldrbt", "daW" },
- { 0x0c500000, 0x04000000, "str", "daW" },
- { 0x0c500000, 0x04100000, "ldr", "daW" },
- { 0x0c500000, 0x04400000, "strb", "daW" },
- { 0x0c500000, 0x04500000, "ldrb", "daW" },
- { 0x0e1f0000, 0x080d0000, "stm", "YnWl" },/* separate out r13 base */
- { 0x0e1f0000, 0x081d0000, "ldm", "YnWl" },/* separate out r13 base */
- { 0x0e100000, 0x08000000, "stm", "XnWl" },
- { 0x0e100000, 0x08100000, "ldm", "XnWl" },
- { 0x0e1000f0, 0x00100090, "ldrb", "de" },
- { 0x0e1000f0, 0x00000090, "strb", "de" },
- { 0x0e1000f0, 0x001000d0, "ldrsb", "de" },
- { 0x0e1000f0, 0x001000b0, "ldrh", "de" },
- { 0x0e1000f0, 0x000000b0, "strh", "de" },
- { 0x0e1000f0, 0x001000f0, "ldrsh", "de" },
- { 0x0f200090, 0x00200090, "und", "x" }, /* Before data processing */
- { 0x0e1000d0, 0x000000d0, "und", "x" }, /* Before data processing */
- { 0x0ff00ff0, 0x01000090, "swp", "dmo" },
- { 0x0ff00ff0, 0x01400090, "swpb", "dmo" },
- { 0x0fbf0fff, 0x010f0000, "mrs", "dp" }, /* Before data processing */
- { 0x0fb0fff0, 0x0120f000, "msr", "pFm" },/* Before data processing */
- { 0x0fb0f000, 0x0320f000, "msr", "pF2" },/* Before data processing */
- { 0x0ffffff0, 0x012fff10, "bx", "m" },
- { 0x0fff0ff0, 0x016f0f10, "clz", "dm" },
- { 0x0ffffff0, 0x012fff30, "blx", "m" },
- { 0xfff000f0, 0xe1200070, "bkpt", "k" },
- { 0x0de00000, 0x00000000, "and", "Sdn2" },
- { 0x0de00000, 0x00200000, "eor", "Sdn2" },
- { 0x0de00000, 0x00400000, "sub", "Sdn2" },
- { 0x0de00000, 0x00600000, "rsb", "Sdn2" },
- { 0x0de00000, 0x00800000, "add", "Sdn2" },
- { 0x0de00000, 0x00a00000, "adc", "Sdn2" },
- { 0x0de00000, 0x00c00000, "sbc", "Sdn2" },
- { 0x0de00000, 0x00e00000, "rsc", "Sdn2" },
- { 0x0df00000, 0x01100000, "tst", "Dn2" },
- { 0x0df00000, 0x01300000, "teq", "Dn2" },
- { 0x0de00000, 0x01400000, "cmp", "Dn2" },
- { 0x0de00000, 0x01600000, "cmn", "Dn2" },
- { 0x0de00000, 0x01800000, "orr", "Sdn2" },
- { 0x0de00000, 0x01a00000, "mov", "Sd2" },
- { 0x0de00000, 0x01c00000, "bic", "Sdn2" },
- { 0x0de00000, 0x01e00000, "mvn", "Sd2" },
- { 0x0ff08f10, 0x0e000100, "adf", "PRfgh" },
- { 0x0ff08f10, 0x0e100100, "muf", "PRfgh" },
- { 0x0ff08f10, 0x0e200100, "suf", "PRfgh" },
- { 0x0ff08f10, 0x0e300100, "rsf", "PRfgh" },
- { 0x0ff08f10, 0x0e400100, "dvf", "PRfgh" },
- { 0x0ff08f10, 0x0e500100, "rdf", "PRfgh" },
- { 0x0ff08f10, 0x0e600100, "pow", "PRfgh" },
- { 0x0ff08f10, 0x0e700100, "rpw", "PRfgh" },
- { 0x0ff08f10, 0x0e800100, "rmf", "PRfgh" },
- { 0x0ff08f10, 0x0e900100, "fml", "PRfgh" },
- { 0x0ff08f10, 0x0ea00100, "fdv", "PRfgh" },
- { 0x0ff08f10, 0x0eb00100, "frd", "PRfgh" },
- { 0x0ff08f10, 0x0ec00100, "pol", "PRfgh" },
- { 0x0f008f10, 0x0e000100, "fpbop", "PRfgh" },
- { 0x0ff08f10, 0x0e008100, "mvf", "PRfh" },
- { 0x0ff08f10, 0x0e108100, "mnf", "PRfh" },
- { 0x0ff08f10, 0x0e208100, "abs", "PRfh" },
- { 0x0ff08f10, 0x0e308100, "rnd", "PRfh" },
- { 0x0ff08f10, 0x0e408100, "sqt", "PRfh" },
- { 0x0ff08f10, 0x0e508100, "log", "PRfh" },
- { 0x0ff08f10, 0x0e608100, "lgn", "PRfh" },
- { 0x0ff08f10, 0x0e708100, "exp", "PRfh" },
- { 0x0ff08f10, 0x0e808100, "sin", "PRfh" },
- { 0x0ff08f10, 0x0e908100, "cos", "PRfh" },
- { 0x0ff08f10, 0x0ea08100, "tan", "PRfh" },
- { 0x0ff08f10, 0x0eb08100, "asn", "PRfh" },
- { 0x0ff08f10, 0x0ec08100, "acs", "PRfh" },
- { 0x0ff08f10, 0x0ed08100, "atn", "PRfh" },
- { 0x0f008f10, 0x0e008100, "fpuop", "PRfh" },
- { 0x0e100f00, 0x0c000100, "stf", "QLv" },
- { 0x0e100f00, 0x0c100100, "ldf", "QLv" },
- { 0x0ff00f10, 0x0e000110, "flt", "PRgd" },
- { 0x0ff00f10, 0x0e100110, "fix", "PRdh" },
- { 0x0ff00f10, 0x0e200110, "wfs", "d" },
- { 0x0ff00f10, 0x0e300110, "rfs", "d" },
- { 0x0ff00f10, 0x0e400110, "wfc", "d" },
- { 0x0ff00f10, 0x0e500110, "rfc", "d" },
- { 0x0ff0ff10, 0x0e90f110, "cmf", "PRgh" },
- { 0x0ff0ff10, 0x0eb0f110, "cnf", "PRgh" },
- { 0x0ff0ff10, 0x0ed0f110, "cmfe", "PRgh" },
- { 0x0ff0ff10, 0x0ef0f110, "cnfe", "PRgh" },
- { 0xff100010, 0xfe000010, "mcr2", "#z" },
- { 0x0f100010, 0x0e000010, "mcr", "#z" },
- { 0xff100010, 0xfe100010, "mrc2", "#z" },
- { 0x0f100010, 0x0e100010, "mrc", "#z" },
- { 0xff000010, 0xfe000000, "cdp2", "#y" },
- { 0x0f000010, 0x0e000000, "cdp", "#y" },
- { 0xfe100090, 0xfc100000, "ldc2", "L#v" },
- { 0x0e100090, 0x0c100000, "ldc", "L#v" },
- { 0xfe100090, 0xfc000000, "stc2", "L#v" },
- { 0x0e100090, 0x0c000000, "stc", "L#v" },
- { 0x00000000, 0x00000000, NULL, NULL }
-};
-
-static char const arm32_insn_conditions[][4] = {
- "eq", "ne", "cs", "cc",
- "mi", "pl", "vs", "vc",
- "hi", "ls", "ge", "lt",
- "gt", "le", "", "nv"
-};
-
-static char const insn_block_transfers[][4] = {
- "da", "ia", "db", "ib"
-};
-
-static char const insn_stack_block_transfers[][4] = {
- "ed", "ea", "fd", "fa"
-};
-
-static char const op_shifts[][4] = {
- "lsl", "lsr", "asr", "ror"
-};
-
-static char const insn_fpa_rounding[][2] = {
- "", "p", "m", "z"
-};
-
-static char const insn_fpa_precision[][2] = {
- "s", "d", "e", "p"
-};
-
-static char const insn_fpaconstants[][8] = {
- "0.0", "1.0", "2.0", "3.0",
- "4.0", "5.0", "0.5", "10.0"
-};
-
-#define insn_condition(x) arm32_insn_conditions[(x >> 28) & 0x0f]
-#define insn_blktrans(x) insn_block_transfers[(x >> 23) & 3]
-#define insn_stkblktrans(x) insn_stack_block_transfers[(x >> 23) & 3]
-#define op2_shift(x) op_shifts[(x >> 5) & 3]
-#define insn_fparnd(x) insn_fpa_rounding[(x >> 5) & 0x03]
-#define insn_fpaprec(x) insn_fpa_precision[(((x >> 18) & 2)|(x >> 7)) & 1]
-#define insn_fpaprect(x) insn_fpa_precision[(((x >> 21) & 2)|(x >> 15)) & 1]
-#define insn_fpaimm(x) insn_fpaconstants[x & 0x07]
-
-/* Local prototypes */
-static void disasm_register_shift(const disasm_interface_t *di, u_int insn);
-static void disasm_print_reglist(const disasm_interface_t *di, u_int insn);
-static void disasm_insn_ldrstr(const disasm_interface_t *di, u_int insn,
- u_int loc);
-static void disasm_insn_ldrhstrh(const disasm_interface_t *di, u_int insn,
- u_int loc);
-static void disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn,
- u_int loc);
-static u_int disassemble_readword(u_int address);
-static void disassemble_printaddr(u_int address);
-
-vm_offset_t
-disasm(const disasm_interface_t *di, vm_offset_t loc, int altfmt)
-{
- struct arm32_insn *i_ptr = (struct arm32_insn *)&arm32_i;
-
- u_int insn;
- int matchp;
- int branch;
- char* f_ptr;
- int fmt;
-
- fmt = 0;
- matchp = 0;
- insn = di->di_readword(loc);
-
-/* di->di_printf("loc=%08x insn=%08x : ", loc, insn);*/
-
- while (i_ptr->name) {
- if ((insn & i_ptr->mask) == i_ptr->pattern) {
- matchp = 1;
- break;
- }
- i_ptr++;
- }
-
- if (!matchp) {
- di->di_printf("und%s\t%08x\n", insn_condition(insn), insn);
- return(loc + INSN_SIZE);
- }
-
- /* If instruction forces condition code, don't print it. */
- if ((i_ptr->mask & 0xf0000000) == 0xf0000000)
- di->di_printf("%s", i_ptr->name);
- else
- di->di_printf("%s%s", i_ptr->name, insn_condition(insn));
-
- f_ptr = i_ptr->format;
-
- /* Insert tab if there are no instruction modifiers */
-
- if (*(f_ptr) < 'A' || *(f_ptr) > 'Z') {
- ++fmt;
- di->di_printf("\t");
- }
-
- while (*f_ptr) {
- switch (*f_ptr) {
- /* 2 - print Operand 2 of a data processing instruction */
- case '2':
- if (insn & 0x02000000) {
- int rotate= ((insn >> 7) & 0x1e);
-
- di->di_printf("#0x%08x",
- (insn & 0xff) << (32 - rotate) |
- (insn & 0xff) >> rotate);
- } else {
- disasm_register_shift(di, insn);
- }
- break;
- /* d - destination register (bits 12-15) */
- case 'd':
- di->di_printf("r%d", ((insn >> 12) & 0x0f));
- break;
- /* D - insert 'p' if Rd is R15 */
- case 'D':
- if (((insn >> 12) & 0x0f) == 15)
- di->di_printf("p");
- break;
- /* n - n register (bits 16-19) */
- case 'n':
- di->di_printf("r%d", ((insn >> 16) & 0x0f));
- break;
- /* s - s register (bits 8-11) */
- case 's':
- di->di_printf("r%d", ((insn >> 8) & 0x0f));
- break;
- /* o - indirect register rn (bits 16-19) (used by swap) */
- case 'o':
- di->di_printf("[r%d]", ((insn >> 16) & 0x0f));
- break;
- /* m - m register (bits 0-4) */
- case 'm':
- di->di_printf("r%d", ((insn >> 0) & 0x0f));
- break;
- /* a - address operand of ldr/str instruction */
- case 'a':
- disasm_insn_ldrstr(di, insn, loc);
- break;
- /* e - address operand of ldrh/strh instruction */
- case 'e':
- disasm_insn_ldrhstrh(di, insn, loc);
- break;
- /* l - register list for ldm/stm instruction */
- case 'l':
- disasm_print_reglist(di, insn);
- break;
- /* f - 1st fp operand (register) (bits 12-14) */
- case 'f':
- di->di_printf("f%d", (insn >> 12) & 7);
- break;
- /* g - 2nd fp operand (register) (bits 16-18) */
- case 'g':
- di->di_printf("f%d", (insn >> 16) & 7);
- break;
- /* h - 3rd fp operand (register/immediate) (bits 0-4) */
- case 'h':
- if (insn & (1 << 3))
- di->di_printf("#%s", insn_fpaimm(insn));
- else
- di->di_printf("f%d", insn & 7);
- break;
- /* b - branch address */
- case 'b':
- branch = ((insn << 2) & 0x03ffffff);
- if (branch & 0x02000000)
- branch |= 0xfc000000;
- di->di_printaddr(loc + 8 + branch);
- break;
- /* t - blx address */
- case 't':
- branch = ((insn << 2) & 0x03ffffff) |
- (insn >> 23 & 0x00000002);
- if (branch & 0x02000000)
- branch |= 0xfc000000;
- di->di_printaddr(loc + 8 + branch);
- break;
- /* X - block transfer type */
- case 'X':
- di->di_printf("%s", insn_blktrans(insn));
- break;
- /* Y - block transfer type (r13 base) */
- case 'Y':
- di->di_printf("%s", insn_stkblktrans(insn));
- break;
- /* c - comment field bits(0-23) */
- case 'c':
- di->di_printf("0x%08x", (insn & 0x00ffffff));
- break;
- /* k - breakpoint comment (bits 0-3, 8-19) */
- case 'k':
- di->di_printf("0x%04x",
- (insn & 0x000fff00) >> 4 | (insn & 0x0000000f));
- break;
- /* p - saved or current status register */
- case 'p':
- if (insn & 0x00400000)
- di->di_printf("spsr");
- else
- di->di_printf("cpsr");
- break;
- /* F - PSR transfer fields */
- case 'F':
- di->di_printf("_");
- if (insn & (1 << 16))
- di->di_printf("c");
- if (insn & (1 << 17))
- di->di_printf("x");
- if (insn & (1 << 18))
- di->di_printf("s");
- if (insn & (1 << 19))
- di->di_printf("f");
- break;
- /* B - byte transfer flag */
- case 'B':
- if (insn & 0x00400000)
- di->di_printf("b");
- break;
- /* L - co-processor transfer size */
- case 'L':
- if (insn & (1 << 22))
- di->di_printf("l");
- break;
- /* S - set status flag */
- case 'S':
- if (insn & 0x00100000)
- di->di_printf("s");
- break;
- /* P - fp precision */
- case 'P':
- di->di_printf("%s", insn_fpaprec(insn));
- break;
- /* Q - fp precision (for ldf/stf) */
- case 'Q':
- break;
- /* R - fp rounding */
- case 'R':
- di->di_printf("%s", insn_fparnd(insn));
- break;
- /* W - writeback flag */
- case 'W':
- if (insn & (1 << 21))
- di->di_printf("!");
- break;
- /* # - co-processor number */
- case '#':
- di->di_printf("p%d", (insn >> 8) & 0x0f);
- break;
- /* v - co-processor data transfer registers+addressing mode */
- case 'v':
- disasm_insn_ldcstc(di, insn, loc);
- break;
- /* x - instruction in hex */
- case 'x':
- di->di_printf("0x%08x", insn);
- break;
- /* y - co-processor data processing registers */
- case 'y':
- di->di_printf("%d, ", (insn >> 20) & 0x0f);
-
- di->di_printf("c%d, c%d, c%d", (insn >> 12) & 0x0f,
- (insn >> 16) & 0x0f, insn & 0x0f);
-
- di->di_printf(", %d", (insn >> 5) & 0x07);
- break;
- /* z - co-processor register transfer registers */
- case 'z':
- di->di_printf("%d, ", (insn >> 21) & 0x07);
- di->di_printf("r%d, c%d, c%d, %d",
- (insn >> 12) & 0x0f, (insn >> 16) & 0x0f,
- insn & 0x0f, (insn >> 5) & 0x07);
-
-/* if (((insn >> 5) & 0x07) != 0)
- di->di_printf(", %d", (insn >> 5) & 0x07);*/
- break;
- default:
- di->di_printf("[%c - unknown]", *f_ptr);
- break;
- }
- if (*(f_ptr+1) >= 'A' && *(f_ptr+1) <= 'Z')
- ++f_ptr;
- else if (*(++f_ptr)) {
- ++fmt;
- if (fmt == 1)
- di->di_printf("\t");
- else
- di->di_printf(", ");
- }
- };
-
- di->di_printf("\n");
-
- return(loc + INSN_SIZE);
-}
-
-
-static void
-disasm_register_shift(const disasm_interface_t *di, u_int insn)
-{
- di->di_printf("r%d", (insn & 0x0f));
- if ((insn & 0x00000ff0) == 0)
- ;
- else if ((insn & 0x00000ff0) == 0x00000060)
- di->di_printf(", rrx");
- else {
- if (insn & 0x10)
- di->di_printf(", %s r%d", op2_shift(insn),
- (insn >> 8) & 0x0f);
- else
- di->di_printf(", %s #%d", op2_shift(insn),
- (insn >> 7) & 0x1f);
- }
-}
-
-
-static void
-disasm_print_reglist(const disasm_interface_t *di, u_int insn)
-{
- int loop;
- int start;
- int comma;
-
- di->di_printf("{");
- start = -1;
- comma = 0;
-
- for (loop = 0; loop < 17; ++loop) {
- if (start != -1) {
- if (loop == 16 || !(insn & (1 << loop))) {
- if (comma)
- di->di_printf(", ");
- else
- comma = 1;
- if (start == loop - 1)
- di->di_printf("r%d", start);
- else
- di->di_printf("r%d-r%d", start, loop - 1);
- start = -1;
- }
- } else {
- if (insn & (1 << loop))
- start = loop;
- }
- }
- di->di_printf("}");
-
- if (insn & (1 << 22))
- di->di_printf("^");
-}
-
-static void
-disasm_insn_ldrstr(const disasm_interface_t *di, u_int insn, u_int loc)
-{
- int offset;
-
- offset = insn & 0xfff;
- if ((insn & 0x032f0000) == 0x010f0000) {
- /* rA = pc, immediate index */
- if (insn & 0x00800000)
- loc += offset;
- else
- loc -= offset;
- di->di_printaddr(loc + 8);
- } else {
- di->di_printf("[r%d", (insn >> 16) & 0x0f);
- if ((insn & 0x03000fff) != 0x01000000) {
- di->di_printf("%s, ", (insn & (1 << 24)) ? "" : "]");
- if (!(insn & 0x00800000))
- di->di_printf("-");
- if (insn & (1 << 25))
- disasm_register_shift(di, insn);
- else
- di->di_printf("#0x%03x", offset);
- }
- if (insn & (1 << 24))
- di->di_printf("]");
- }
-}
-
-static void
-disasm_insn_ldrhstrh(const disasm_interface_t *di, u_int insn, u_int loc)
-{
- int offset;
-
- offset = ((insn & 0xf00) >> 4) | (insn & 0xf);
- if ((insn & 0x004f0000) == 0x004f0000) {
- /* rA = pc, immediate index */
- if (insn & 0x00800000)
- loc += offset;
- else
- loc -= offset;
- di->di_printaddr(loc + 8);
- } else {
- di->di_printf("[r%d", (insn >> 16) & 0x0f);
- if ((insn & 0x01400f0f) != 0x01400000) {
- di->di_printf("%s, ", (insn & (1 << 24)) ? "" : "]");
- if (!(insn & 0x00800000))
- di->di_printf("-");
- if (insn & (1 << 22))
- di->di_printf("#0x%02x", offset);
- else
- di->di_printf("r%d", (insn & 0x0f));
- }
- if (insn & (1 << 24))
- di->di_printf("]");
- }
-}
-
-static void
-disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn, u_int loc)
-{
- if (((insn >> 8) & 0xf) == 1)
- di->di_printf("f%d, ", (insn >> 12) & 0x07);
- else
- di->di_printf("c%d, ", (insn >> 12) & 0x0f);
-
- di->di_printf("[r%d", (insn >> 16) & 0x0f);
-
- di->di_printf("%s, ", (insn & (1 << 24)) ? "" : "]");
-
- if (!(insn & (1 << 23)))
- di->di_printf("-");
-
- di->di_printf("#0x%03x", (insn & 0xff) << 2);
-
- if (insn & (1 << 24))
- di->di_printf("]");
-
- if (insn & (1 << 21))
- di->di_printf("!");
-}
-
-static u_int
-disassemble_readword(u_int address)
-{
- return(*((u_int *)address));
-}
-
-static void
-disassemble_printaddr(u_int address)
-{
- printf("0x%08x", address);
-}
-
-static const disasm_interface_t disassemble_di = {
- disassemble_readword, disassemble_printaddr, db_printf
-};
-
-void
-disassemble(u_int address)
-{
-
- (void)disasm(&disassemble_di, address, 0);
-}
-
-/* End of disassem.c */
--- sys/arm/arm/bcopyinout_xscale.S
+++ /dev/null
@@ -1,929 +0,0 @@
-/* $NetBSD: bcopyinout_xscale.S,v 1.3 2003/12/15 09:27:18 scw Exp $ */
-
-/*-
- * Copyright 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Steve C. Woodford for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/bcopyinout_xscale.S,v 1.4 2005/05/24 23:55:09 cognet Exp $");
-
- .text
- .align 0
-
-#ifdef MULTIPROCESSOR
-.Lcpu_info:
- .word _C_LABEL(cpu_info)
-#else
-.Lcurpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-#endif
-
-/*
- * r0 = user space address
- * r1 = kernel space address
- * r2 = length
- *
- * Copies bytes from user space to kernel space
- */
-ENTRY(copyin)
- cmp r2, #0x00
- movle r0, #0x00
- movle pc, lr /* Bail early if length is <= 0 */
-
- stmfd sp!, {r10-r11, lr}
-
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r2}
- bl _C_LABEL(cpu_number)
- ldr r10, .Lcpu_info
- ldmfd sp!, {r0-r2}
- ldr r10, [r10, r0, lsl #2]
- ldr r10, [r10, #CI_CURPCB]
-#else
- ldr r10, .Lcurpcb
- ldr r10, [r10]
-#endif
-
- mov r3, #0x00
- adr ip, .Lcopyin_fault
- ldr r11, [r10, #PCB_ONFAULT]
- str ip, [r10, #PCB_ONFAULT]
- bl .Lcopyin_guts
- str r11, [r10, #PCB_ONFAULT]
- mov r0, #0x00
- ldmfd sp!, {r10-r11, pc}
-
-.Lcopyin_fault:
- str r11, [r10, #PCB_ONFAULT]
- cmp r3, #0x00
- ldmgtfd sp!, {r4-r7} /* r3 > 0 Restore r4-r7 */
- ldmltfd sp!, {r4-r9} /* r3 < 0 Restore r4-r9 */
- ldmfd sp!, {r10-r11, pc}
-
-.Lcopyin_guts:
- pld [r0]
- /* Word-align the destination buffer */
- ands ip, r1, #0x03 /* Already word aligned? */
- beq .Lcopyin_wordaligned /* Yup */
- rsb ip, ip, #0x04
- cmp r2, ip /* Enough bytes left to align it? */
- blt .Lcopyin_l4_2 /* Nope. Just copy bytewise */
- sub r2, r2, ip
- rsbs ip, ip, #0x03
- addne pc, pc, ip, lsl #3
- nop
- ldrbt ip, [r0], #0x01
- strb ip, [r1], #0x01
- ldrbt ip, [r0], #0x01
- strb ip, [r1], #0x01
- ldrbt ip, [r0], #0x01
- strb ip, [r1], #0x01
- cmp r2, #0x00 /* All done? */
- RETeq
-
- /* Destination buffer is now word aligned */
-.Lcopyin_wordaligned:
- ands ip, r0, #0x03 /* Is src also word-aligned? */
- bne .Lcopyin_bad_align /* Nope. Things just got bad */
- cmp r2, #0x08 /* Less than 8 bytes remaining? */
- blt .Lcopyin_w_less_than8
-
- /* Quad-align the destination buffer */
- tst r1, #0x07 /* Already quad aligned? */
- ldrnet ip, [r0], #0x04
- stmfd sp!, {r4-r9} /* Free up some registers */
- mov r3, #-1 /* Signal restore r4-r9 */
- tst r1, #0x07 /* XXX: bug work-around */
- subne r2, r2, #0x04
- strne ip, [r1], #0x04
-
- /* Destination buffer quad aligned, source is word aligned */
- subs r2, r2, #0x80
- blt .Lcopyin_w_lessthan128
-
- /* Copy 128 bytes at a time */
-.Lcopyin_w_loop128:
- ldrt r4, [r0], #0x04 /* LD:00-03 */
- ldrt r5, [r0], #0x04 /* LD:04-07 */
- pld [r0, #0x18] /* Prefetch 0x20 */
- ldrt r6, [r0], #0x04 /* LD:08-0b */
- ldrt r7, [r0], #0x04 /* LD:0c-0f */
- ldrt r8, [r0], #0x04 /* LD:10-13 */
- ldrt r9, [r0], #0x04 /* LD:14-17 */
- strd r4, [r1], #0x08 /* ST:00-07 */
- ldrt r4, [r0], #0x04 /* LD:18-1b */
- ldrt r5, [r0], #0x04 /* LD:1c-1f */
- strd r6, [r1], #0x08 /* ST:08-0f */
- ldrt r6, [r0], #0x04 /* LD:20-23 */
- ldrt r7, [r0], #0x04 /* LD:24-27 */
- pld [r0, #0x18] /* Prefetch 0x40 */
- strd r8, [r1], #0x08 /* ST:10-17 */
- ldrt r8, [r0], #0x04 /* LD:28-2b */
- ldrt r9, [r0], #0x04 /* LD:2c-2f */
- strd r4, [r1], #0x08 /* ST:18-1f */
- ldrt r4, [r0], #0x04 /* LD:30-33 */
- ldrt r5, [r0], #0x04 /* LD:34-37 */
- strd r6, [r1], #0x08 /* ST:20-27 */
- ldrt r6, [r0], #0x04 /* LD:38-3b */
- ldrt r7, [r0], #0x04 /* LD:3c-3f */
- strd r8, [r1], #0x08 /* ST:28-2f */
- ldrt r8, [r0], #0x04 /* LD:40-43 */
- ldrt r9, [r0], #0x04 /* LD:44-47 */
- pld [r0, #0x18] /* Prefetch 0x60 */
- strd r4, [r1], #0x08 /* ST:30-37 */
- ldrt r4, [r0], #0x04 /* LD:48-4b */
- ldrt r5, [r0], #0x04 /* LD:4c-4f */
- strd r6, [r1], #0x08 /* ST:38-3f */
- ldrt r6, [r0], #0x04 /* LD:50-53 */
- ldrt r7, [r0], #0x04 /* LD:54-57 */
- strd r8, [r1], #0x08 /* ST:40-47 */
- ldrt r8, [r0], #0x04 /* LD:58-5b */
- ldrt r9, [r0], #0x04 /* LD:5c-5f */
- strd r4, [r1], #0x08 /* ST:48-4f */
- ldrt r4, [r0], #0x04 /* LD:60-63 */
- ldrt r5, [r0], #0x04 /* LD:64-67 */
- pld [r0, #0x18] /* Prefetch 0x80 */
- strd r6, [r1], #0x08 /* ST:50-57 */
- ldrt r6, [r0], #0x04 /* LD:68-6b */
- ldrt r7, [r0], #0x04 /* LD:6c-6f */
- strd r8, [r1], #0x08 /* ST:58-5f */
- ldrt r8, [r0], #0x04 /* LD:70-73 */
- ldrt r9, [r0], #0x04 /* LD:74-77 */
- strd r4, [r1], #0x08 /* ST:60-67 */
- ldrt r4, [r0], #0x04 /* LD:78-7b */
- ldrt r5, [r0], #0x04 /* LD:7c-7f */
- strd r6, [r1], #0x08 /* ST:68-6f */
- strd r8, [r1], #0x08 /* ST:70-77 */
- subs r2, r2, #0x80
- strd r4, [r1], #0x08 /* ST:78-7f */
- bge .Lcopyin_w_loop128
-
-.Lcopyin_w_lessthan128:
- adds r2, r2, #0x80 /* Adjust for extra sub */
- ldmeqfd sp!, {r4-r9}
- RETeq
- subs r2, r2, #0x20
- blt .Lcopyin_w_lessthan32
-
- /* Copy 32 bytes at a time */
-.Lcopyin_w_loop32:
- ldrt r4, [r0], #0x04
- ldrt r5, [r0], #0x04
- pld [r0, #0x18]
- ldrt r6, [r0], #0x04
- ldrt r7, [r0], #0x04
- ldrt r8, [r0], #0x04
- ldrt r9, [r0], #0x04
- strd r4, [r1], #0x08
- ldrt r4, [r0], #0x04
- ldrt r5, [r0], #0x04
- strd r6, [r1], #0x08
- strd r8, [r1], #0x08
- subs r2, r2, #0x20
- strd r4, [r1], #0x08
- bge .Lcopyin_w_loop32
-
-.Lcopyin_w_lessthan32:
- adds r2, r2, #0x20 /* Adjust for extra sub */
- ldmeqfd sp!, {r4-r9}
- RETeq /* Return now if done */
-
- and r4, r2, #0x18
- rsb r5, r4, #0x18
- subs r2, r2, r4
- add pc, pc, r5, lsl #1
- nop
-
- /* At least 24 bytes remaining */
- ldrt r4, [r0], #0x04
- ldrt r5, [r0], #0x04
- nop
- strd r4, [r1], #0x08
-
- /* At least 16 bytes remaining */
- ldrt r4, [r0], #0x04
- ldrt r5, [r0], #0x04
- nop
- strd r4, [r1], #0x08
-
- /* At least 8 bytes remaining */
- ldrt r4, [r0], #0x04
- ldrt r5, [r0], #0x04
- nop
- strd r4, [r1], #0x08
-
- /* Less than 8 bytes remaining */
- ldmfd sp!, {r4-r9}
- RETeq /* Return now if done */
- mov r3, #0x00
-
-.Lcopyin_w_less_than8:
- subs r2, r2, #0x04
- ldrget ip, [r0], #0x04
- strge ip, [r1], #0x04
- RETeq /* Return now if done */
- addlt r2, r2, #0x04
- ldrbt ip, [r0], #0x01
- cmp r2, #0x02
- ldrgebt r2, [r0], #0x01
- strb ip, [r1], #0x01
- ldrgtbt ip, [r0]
- strgeb r2, [r1], #0x01
- strgtb ip, [r1]
- RET
-
-/*
- * At this point, it has not been possible to word align both buffers.
- * The destination buffer (r1) is word aligned, but the source buffer
- * (r0) is not.
- */
-.Lcopyin_bad_align:
- stmfd sp!, {r4-r7}
- mov r3, #0x01
- bic r0, r0, #0x03
- cmp ip, #2
- ldrt ip, [r0], #0x04
- bgt .Lcopyin_bad3
- beq .Lcopyin_bad2
- b .Lcopyin_bad1
-
-.Lcopyin_bad1_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #8
-#else
- mov r4, ip, lsr #8
-#endif
- ldrt r5, [r0], #0x04
- pld [r0, #0x018]
- ldrt r6, [r0], #0x04
- ldrt r7, [r0], #0x04
- ldrt ip, [r0], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #24
- mov r5, r5, lsl #8
- orr r5, r5, r6, lsr #24
- mov r6, r6, lsl #8
- orr r6, r6, r7, lsr #24
- mov r7, r7, lsl #8
- orr r7, r7, ip, lsr #24
-#else
- orr r4, r4, r5, lsl #24
- mov r5, r5, lsr #8
- orr r5, r5, r6, lsl #24
- mov r6, r6, lsr #8
- orr r6, r6, r7, lsl #24
- mov r7, r7, lsr #8
- orr r7, r7, ip, lsl #24
-#endif
- str r4, [r1], #0x04
- str r5, [r1], #0x04
- str r6, [r1], #0x04
- str r7, [r1], #0x04
-.Lcopyin_bad1:
- subs r2, r2, #0x10
- bge .Lcopyin_bad1_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r0, r0, #0x03
- blt .Lcopyin_l4
-
-.Lcopyin_bad1_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #8
-#else
- mov r4, ip, lsr #8
-#endif
- ldrt ip, [r0], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #24
-#else
- orr r4, r4, ip, lsl #24
-#endif
- str r4, [r1], #0x04
- bge .Lcopyin_bad1_loop4
- sub r0, r0, #0x03
- b .Lcopyin_l4
-
-.Lcopyin_bad2_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #16
-#else
- mov r4, ip, lsr #16
-#endif
- ldrt r5, [r0], #0x04
- pld [r0, #0x018]
- ldrt r6, [r0], #0x04
- ldrt r7, [r0], #0x04
- ldrt ip, [r0], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #16
- mov r5, r5, lsl #16
- orr r5, r5, r6, lsr #16
- mov r6, r6, lsl #16
- orr r6, r6, r7, lsr #16
- mov r7, r7, lsl #16
- orr r7, r7, ip, lsr #16
-#else
- orr r4, r4, r5, lsl #16
- mov r5, r5, lsr #16
- orr r5, r5, r6, lsl #16
- mov r6, r6, lsr #16
- orr r6, r6, r7, lsl #16
- mov r7, r7, lsr #16
- orr r7, r7, ip, lsl #16
-#endif
- str r4, [r1], #0x04
- str r5, [r1], #0x04
- str r6, [r1], #0x04
- str r7, [r1], #0x04
-.Lcopyin_bad2:
- subs r2, r2, #0x10
- bge .Lcopyin_bad2_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r0, r0, #0x02
- blt .Lcopyin_l4
-
-.Lcopyin_bad2_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #16
-#else
- mov r4, ip, lsr #16
-#endif
- ldrt ip, [r0], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #16
-#else
- orr r4, r4, ip, lsl #16
-#endif
- str r4, [r1], #0x04
- bge .Lcopyin_bad2_loop4
- sub r0, r0, #0x02
- b .Lcopyin_l4
-
-.Lcopyin_bad3_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #24
-#else
- mov r4, ip, lsr #24
-#endif
- ldrt r5, [r0], #0x04
- pld [r0, #0x018]
- ldrt r6, [r0], #0x04
- ldrt r7, [r0], #0x04
- ldrt ip, [r0], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #8
- mov r5, r5, lsl #24
- orr r5, r5, r6, lsr #8
- mov r6, r6, lsl #24
- orr r6, r6, r7, lsr #8
- mov r7, r7, lsl #24
- orr r7, r7, ip, lsr #8
-#else
- orr r4, r4, r5, lsl #8
- mov r5, r5, lsr #24
- orr r5, r5, r6, lsl #8
- mov r6, r6, lsr #24
- orr r6, r6, r7, lsl #8
- mov r7, r7, lsr #24
- orr r7, r7, ip, lsl #8
-#endif
- str r4, [r1], #0x04
- str r5, [r1], #0x04
- str r6, [r1], #0x04
- str r7, [r1], #0x04
-.Lcopyin_bad3:
- subs r2, r2, #0x10
- bge .Lcopyin_bad3_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r0, r0, #0x01
- blt .Lcopyin_l4
-
-.Lcopyin_bad3_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #24
-#else
- mov r4, ip, lsr #24
-#endif
- ldrt ip, [r0], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #8
-#else
- orr r4, r4, ip, lsl #8
-#endif
- str r4, [r1], #0x04
- bge .Lcopyin_bad3_loop4
- sub r0, r0, #0x01
-
-.Lcopyin_l4:
- ldmfd sp!, {r4-r7}
- mov r3, #0x00
- adds r2, r2, #0x04
- RETeq
-.Lcopyin_l4_2:
- rsbs r2, r2, #0x03
- addne pc, pc, r2, lsl #3
- nop
- ldrbt ip, [r0], #0x01
- strb ip, [r1], #0x01
- ldrbt ip, [r0], #0x01
- strb ip, [r1], #0x01
- ldrbt ip, [r0]
- strb ip, [r1]
- RET
-
-
-/*
- * r0 = kernel space address
- * r1 = user space address
- * r2 = length
- *
- * Copies bytes from kernel space to user space
- */
-ENTRY(copyout)
- cmp r2, #0x00
- movle r0, #0x00
- movle pc, lr /* Bail early if length is <= 0 */
-
- stmfd sp!, {r10-r11, lr}
-
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r2}
- bl _C_LABEL(cpu_number)
- ldr r10, .Lcpu_info
- ldmfd sp!, {r0-r2}
- ldr r10, [r10, r0, lsl #2]
- ldr r10, [r10, #CI_CURPCB]
-#else
- ldr r10, .Lcurpcb
- ldr r10, [r10]
-#endif
-
- mov r3, #0x00
- adr ip, .Lcopyout_fault
- ldr r11, [r10, #PCB_ONFAULT]
- str ip, [r10, #PCB_ONFAULT]
- bl .Lcopyout_guts
- str r11, [r10, #PCB_ONFAULT]
- mov r0, #0x00
- ldmfd sp!, {r10-r11, pc}
-
-.Lcopyout_fault:
- str r11, [r10, #PCB_ONFAULT]
- cmp r3, #0x00
- ldmgtfd sp!, {r4-r7} /* r3 > 0 Restore r4-r7 */
- ldmltfd sp!, {r4-r9} /* r3 < 0 Restore r4-r9 */
- ldmfd sp!, {r10-r11, pc}
-
-.Lcopyout_guts:
- pld [r0]
- /* Word-align the destination buffer */
- ands ip, r1, #0x03 /* Already word aligned? */
- beq .Lcopyout_wordaligned /* Yup */
- rsb ip, ip, #0x04
- cmp r2, ip /* Enough bytes left to align it? */
- blt .Lcopyout_l4_2 /* Nope. Just copy bytewise */
- sub r2, r2, ip
- rsbs ip, ip, #0x03
- addne pc, pc, ip, lsl #3
- nop
- ldrb ip, [r0], #0x01
- strbt ip, [r1], #0x01
- ldrb ip, [r0], #0x01
- strbt ip, [r1], #0x01
- ldrb ip, [r0], #0x01
- strbt ip, [r1], #0x01
- cmp r2, #0x00 /* All done? */
- RETeq
-
- /* Destination buffer is now word aligned */
-.Lcopyout_wordaligned:
- ands ip, r0, #0x03 /* Is src also word-aligned? */
- bne .Lcopyout_bad_align /* Nope. Things just got bad */
- cmp r2, #0x08 /* Less than 8 bytes remaining? */
- blt .Lcopyout_w_less_than8
-
- /* Quad-align the destination buffer */
- tst r1, #0x07 /* Already quad aligned? */
- ldrne ip, [r0], #0x04
- stmfd sp!, {r4-r9} /* Free up some registers */
- mov r3, #-1 /* Signal restore r4-r9 */
- tst r1, #0x07 /* XXX: bug work-around */
- subne r2, r2, #0x04
- strnet ip, [r1], #0x04
-
- /* Destination buffer quad aligned, source is word aligned */
- subs r2, r2, #0x80
- blt .Lcopyout_w_lessthan128
-
- /* Copy 128 bytes at a time */
-.Lcopyout_w_loop128:
- ldr r4, [r0], #0x04 /* LD:00-03 */
- ldr r5, [r0], #0x04 /* LD:04-07 */
- pld [r0, #0x18] /* Prefetch 0x20 */
- ldr r6, [r0], #0x04 /* LD:08-0b */
- ldr r7, [r0], #0x04 /* LD:0c-0f */
- ldr r8, [r0], #0x04 /* LD:10-13 */
- ldr r9, [r0], #0x04 /* LD:14-17 */
- strt r4, [r1], #0x04 /* ST:00-03 */
- strt r5, [r1], #0x04 /* ST:04-07 */
- ldr r4, [r0], #0x04 /* LD:18-1b */
- ldr r5, [r0], #0x04 /* LD:1c-1f */
- strt r6, [r1], #0x04 /* ST:08-0b */
- strt r7, [r1], #0x04 /* ST:0c-0f */
- ldr r6, [r0], #0x04 /* LD:20-23 */
- ldr r7, [r0], #0x04 /* LD:24-27 */
- pld [r0, #0x18] /* Prefetch 0x40 */
- strt r8, [r1], #0x04 /* ST:10-13 */
- strt r9, [r1], #0x04 /* ST:14-17 */
- ldr r8, [r0], #0x04 /* LD:28-2b */
- ldr r9, [r0], #0x04 /* LD:2c-2f */
- strt r4, [r1], #0x04 /* ST:18-1b */
- strt r5, [r1], #0x04 /* ST:1c-1f */
- ldr r4, [r0], #0x04 /* LD:30-33 */
- ldr r5, [r0], #0x04 /* LD:34-37 */
- strt r6, [r1], #0x04 /* ST:20-23 */
- strt r7, [r1], #0x04 /* ST:24-27 */
- ldr r6, [r0], #0x04 /* LD:38-3b */
- ldr r7, [r0], #0x04 /* LD:3c-3f */
- strt r8, [r1], #0x04 /* ST:28-2b */
- strt r9, [r1], #0x04 /* ST:2c-2f */
- ldr r8, [r0], #0x04 /* LD:40-43 */
- ldr r9, [r0], #0x04 /* LD:44-47 */
- pld [r0, #0x18] /* Prefetch 0x60 */
- strt r4, [r1], #0x04 /* ST:30-33 */
- strt r5, [r1], #0x04 /* ST:34-37 */
- ldr r4, [r0], #0x04 /* LD:48-4b */
- ldr r5, [r0], #0x04 /* LD:4c-4f */
- strt r6, [r1], #0x04 /* ST:38-3b */
- strt r7, [r1], #0x04 /* ST:3c-3f */
- ldr r6, [r0], #0x04 /* LD:50-53 */
- ldr r7, [r0], #0x04 /* LD:54-57 */
- strt r8, [r1], #0x04 /* ST:40-43 */
- strt r9, [r1], #0x04 /* ST:44-47 */
- ldr r8, [r0], #0x04 /* LD:58-5b */
- ldr r9, [r0], #0x04 /* LD:5c-5f */
- strt r4, [r1], #0x04 /* ST:48-4b */
- strt r5, [r1], #0x04 /* ST:4c-4f */
- ldr r4, [r0], #0x04 /* LD:60-63 */
- ldr r5, [r0], #0x04 /* LD:64-67 */
- pld [r0, #0x18] /* Prefetch 0x80 */
- strt r6, [r1], #0x04 /* ST:50-53 */
- strt r7, [r1], #0x04 /* ST:54-57 */
- ldr r6, [r0], #0x04 /* LD:68-6b */
- ldr r7, [r0], #0x04 /* LD:6c-6f */
- strt r8, [r1], #0x04 /* ST:58-5b */
- strt r9, [r1], #0x04 /* ST:5c-5f */
- ldr r8, [r0], #0x04 /* LD:70-73 */
- ldr r9, [r0], #0x04 /* LD:74-77 */
- strt r4, [r1], #0x04 /* ST:60-63 */
- strt r5, [r1], #0x04 /* ST:64-67 */
- ldr r4, [r0], #0x04 /* LD:78-7b */
- ldr r5, [r0], #0x04 /* LD:7c-7f */
- strt r6, [r1], #0x04 /* ST:68-6b */
- strt r7, [r1], #0x04 /* ST:6c-6f */
- strt r8, [r1], #0x04 /* ST:70-73 */
- strt r9, [r1], #0x04 /* ST:74-77 */
- subs r2, r2, #0x80
- strt r4, [r1], #0x04 /* ST:78-7b */
- strt r5, [r1], #0x04 /* ST:7c-7f */
- bge .Lcopyout_w_loop128
-
-.Lcopyout_w_lessthan128:
- adds r2, r2, #0x80 /* Adjust for extra sub */
- ldmeqfd sp!, {r4-r9}
- RETeq /* Return now if done */
- subs r2, r2, #0x20
- blt .Lcopyout_w_lessthan32
-
- /* Copy 32 bytes at a time */
-.Lcopyout_w_loop32:
- ldr r4, [r0], #0x04
- ldr r5, [r0], #0x04
- pld [r0, #0x18]
- ldr r6, [r0], #0x04
- ldr r7, [r0], #0x04
- ldr r8, [r0], #0x04
- ldr r9, [r0], #0x04
- strt r4, [r1], #0x04
- strt r5, [r1], #0x04
- ldr r4, [r0], #0x04
- ldr r5, [r0], #0x04
- strt r6, [r1], #0x04
- strt r7, [r1], #0x04
- strt r8, [r1], #0x04
- strt r9, [r1], #0x04
- subs r2, r2, #0x20
- strt r4, [r1], #0x04
- strt r5, [r1], #0x04
- bge .Lcopyout_w_loop32
-
-.Lcopyout_w_lessthan32:
- adds r2, r2, #0x20 /* Adjust for extra sub */
- ldmeqfd sp!, {r4-r9}
- RETeq /* Return now if done */
-
- and r4, r2, #0x18
- rsb r5, r4, #0x18
- subs r2, r2, r4
- add pc, pc, r5, lsl #1
- nop
-
- /* At least 24 bytes remaining */
- ldr r4, [r0], #0x04
- ldr r5, [r0], #0x04
- strt r4, [r1], #0x04
- strt r5, [r1], #0x04
-
- /* At least 16 bytes remaining */
- ldr r4, [r0], #0x04
- ldr r5, [r0], #0x04
- strt r4, [r1], #0x04
- strt r5, [r1], #0x04
-
- /* At least 8 bytes remaining */
- ldr r4, [r0], #0x04
- ldr r5, [r0], #0x04
- strt r4, [r1], #0x04
- strt r5, [r1], #0x04
-
- /* Less than 8 bytes remaining */
- ldmfd sp!, {r4-r9}
- RETeq /* Return now if done */
- mov r3, #0x00
-
-.Lcopyout_w_less_than8:
- subs r2, r2, #0x04
- ldrge ip, [r0], #0x04
- strget ip, [r1], #0x04
- RETeq /* Return now if done */
- addlt r2, r2, #0x04
- ldrb ip, [r0], #0x01
- cmp r2, #0x02
- ldrgeb r2, [r0], #0x01
- strbt ip, [r1], #0x01
- ldrgtb ip, [r0]
- strgebt r2, [r1], #0x01
- strgtbt ip, [r1]
- RET
-
-/*
- * At this point, it has not been possible to word align both buffers.
- * The destination buffer (r1) is word aligned, but the source buffer
- * (r0) is not.
- */
-.Lcopyout_bad_align:
- stmfd sp!, {r4-r7}
- mov r3, #0x01
- bic r0, r0, #0x03
- cmp ip, #2
- ldr ip, [r0], #0x04
- bgt .Lcopyout_bad3
- beq .Lcopyout_bad2
- b .Lcopyout_bad1
-
-.Lcopyout_bad1_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #8
-#else
- mov r4, ip, lsr #8
-#endif
- ldr r5, [r0], #0x04
- pld [r0, #0x018]
- ldr r6, [r0], #0x04
- ldr r7, [r0], #0x04
- ldr ip, [r0], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #24
- mov r5, r5, lsl #8
- orr r5, r5, r6, lsr #24
- mov r6, r6, lsl #8
- orr r6, r6, r7, lsr #24
- mov r7, r7, lsl #8
- orr r7, r7, ip, lsr #24
-#else
- orr r4, r4, r5, lsl #24
- mov r5, r5, lsr #8
- orr r5, r5, r6, lsl #24
- mov r6, r6, lsr #8
- orr r6, r6, r7, lsl #24
- mov r7, r7, lsr #8
- orr r7, r7, ip, lsl #24
-#endif
- strt r4, [r1], #0x04
- strt r5, [r1], #0x04
- strt r6, [r1], #0x04
- strt r7, [r1], #0x04
-.Lcopyout_bad1:
- subs r2, r2, #0x10
- bge .Lcopyout_bad1_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r0, r0, #0x03
- blt .Lcopyout_l4
-
-.Lcopyout_bad1_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #8
-#else
- mov r4, ip, lsr #8
-#endif
- ldr ip, [r0], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #24
-#else
- orr r4, r4, ip, lsl #24
-#endif
- strt r4, [r1], #0x04
- bge .Lcopyout_bad1_loop4
- sub r0, r0, #0x03
- b .Lcopyout_l4
-
-.Lcopyout_bad2_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #16
-#else
- mov r4, ip, lsr #16
-#endif
- ldr r5, [r0], #0x04
- pld [r0, #0x018]
- ldr r6, [r0], #0x04
- ldr r7, [r0], #0x04
- ldr ip, [r0], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #16
- mov r5, r5, lsl #16
- orr r5, r5, r6, lsr #16
- mov r6, r6, lsl #16
- orr r6, r6, r7, lsr #16
- mov r7, r7, lsl #16
- orr r7, r7, ip, lsr #16
-#else
- orr r4, r4, r5, lsl #16
- mov r5, r5, lsr #16
- orr r5, r5, r6, lsl #16
- mov r6, r6, lsr #16
- orr r6, r6, r7, lsl #16
- mov r7, r7, lsr #16
- orr r7, r7, ip, lsl #16
-#endif
- strt r4, [r1], #0x04
- strt r5, [r1], #0x04
- strt r6, [r1], #0x04
- strt r7, [r1], #0x04
-.Lcopyout_bad2:
- subs r2, r2, #0x10
- bge .Lcopyout_bad2_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r0, r0, #0x02
- blt .Lcopyout_l4
-
-.Lcopyout_bad2_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #16
-#else
- mov r4, ip, lsr #16
-#endif
- ldr ip, [r0], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #16
-#else
- orr r4, r4, ip, lsl #16
-#endif
- strt r4, [r1], #0x04
- bge .Lcopyout_bad2_loop4
- sub r0, r0, #0x02
- b .Lcopyout_l4
-
-.Lcopyout_bad3_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #24
-#else
- mov r4, ip, lsr #24
-#endif
- ldr r5, [r0], #0x04
- pld [r0, #0x018]
- ldr r6, [r0], #0x04
- ldr r7, [r0], #0x04
- ldr ip, [r0], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #8
- mov r5, r5, lsl #24
- orr r5, r5, r6, lsr #8
- mov r6, r6, lsl #24
- orr r6, r6, r7, lsr #8
- mov r7, r7, lsl #24
- orr r7, r7, ip, lsr #8
-#else
- orr r4, r4, r5, lsl #8
- mov r5, r5, lsr #24
- orr r5, r5, r6, lsl #8
- mov r6, r6, lsr #24
- orr r6, r6, r7, lsl #8
- mov r7, r7, lsr #24
- orr r7, r7, ip, lsl #8
-#endif
- strt r4, [r1], #0x04
- strt r5, [r1], #0x04
- strt r6, [r1], #0x04
- strt r7, [r1], #0x04
-.Lcopyout_bad3:
- subs r2, r2, #0x10
- bge .Lcopyout_bad3_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r0, r0, #0x01
- blt .Lcopyout_l4
-
-.Lcopyout_bad3_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #24
-#else
- mov r4, ip, lsr #24
-#endif
- ldr ip, [r0], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #8
-#else
- orr r4, r4, ip, lsl #8
-#endif
- strt r4, [r1], #0x04
- bge .Lcopyout_bad3_loop4
- sub r0, r0, #0x01
-
-.Lcopyout_l4:
- ldmfd sp!, {r4-r7}
- mov r3, #0x00
- adds r2, r2, #0x04
- RETeq
-.Lcopyout_l4_2:
- rsbs r2, r2, #0x03
- addne pc, pc, r2, lsl #3
- nop
- ldrb ip, [r0], #0x01
- strbt ip, [r1], #0x01
- ldrb ip, [r0], #0x01
- strbt ip, [r1], #0x01
- ldrb ip, [r0]
- strbt ip, [r1]
- RET
--- sys/arm/arm/db_trace.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/* $NetBSD: db_trace.c,v 1.8 2003/01/17 22:28:48 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2000, 2001 Ben Harris
- * Copyright (c) 1996 Scott K. Stevens
- *
- * Mach Operating System
- * Copyright (c) 1991,1990 Carnegie Mellon University
- * All Rights Reserved.
- *
- * Permission to use, copy, modify and distribute this software and its
- * documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
- * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/db_trace.c,v 1.10.2.1 2006/03/13 03:03:55 jeff Exp $");
-#include <sys/param.h>
-#include <sys/systm.h>
-
-
-#include <sys/proc.h>
-#include <sys/kdb.h>
-#include <sys/stack.h>
-#include <machine/armreg.h>
-#include <machine/asm.h>
-#include <machine/cpufunc.h>
-#include <machine/db_machdep.h>
-#include <machine/pcb.h>
-#include <machine/vmparam.h>
-#include <ddb/ddb.h>
-#include <ddb/db_access.h>
-#include <ddb/db_sym.h>
-#include <ddb/db_output.h>
-
-#define INKERNEL(va) (((vm_offset_t)(va)) >= VM_MIN_KERNEL_ADDRESS)
-
-int db_md_set_watchpoint(db_expr_t addr, db_expr_t size);
-int db_md_clr_watchpoint(db_expr_t addr, db_expr_t size);
-void db_md_list_watchpoints(void);
-/*
- * APCS stack frames are awkward beasts, so I don't think even trying to use
- * a structure to represent them is a good idea.
- *
- * Here's the diagram from the APCS. Increasing address is _up_ the page.
- *
- * save code pointer [fp] <- fp points to here
- * return link value [fp, #-4]
- * return sp value [fp, #-8]
- * return fp value [fp, #-12]
- * [saved v7 value]
- * [saved v6 value]
- * [saved v5 value]
- * [saved v4 value]
- * [saved v3 value]
- * [saved v2 value]
- * [saved v1 value]
- * [saved a4 value]
- * [saved a3 value]
- * [saved a2 value]
- * [saved a1 value]
- *
- * The save code pointer points twelve bytes beyond the start of the
- * code sequence (usually a single STM) that created the stack frame.
- * We have to disassemble it if we want to know which of the optional
- * fields are actually present.
- */
-
-#define FR_SCP (0)
-#define FR_RLV (-1)
-#define FR_RSP (-2)
-#define FR_RFP (-3)
-
-static void
-db_stack_trace_cmd(db_expr_t addr, db_expr_t count)
-{
- u_int32_t *frame, *lastframe;
- c_db_sym_t sym;
- const char *name;
- db_expr_t value;
- db_expr_t offset;
- boolean_t kernel_only = TRUE;
- int scp_offset, quit;
-
- frame = (u_int32_t *)addr;
- lastframe = NULL;
- scp_offset = -(get_pc_str_offset() >> 2);
-
- quit = 0;
- db_setup_paging(db_simple_pager, &quit, db_lines_per_page);
- while (count-- && frame != NULL && !quit) {
- db_addr_t scp;
- u_int32_t savecode;
- int r;
- u_int32_t *rp;
- const char *sep;
-
- /*
- * In theory, the SCP isn't guaranteed to be in the function
- * that generated the stack frame. We hope for the best.
- */
- scp = frame[FR_SCP];
-
- sym = db_search_symbol(scp, DB_STGY_ANY, &offset);
- if (sym == C_DB_SYM_NULL) {
- value = 0;
- name = "(null)";
- } else
- db_symbol_values(sym, &name, &value);
- db_printf("%s() at ", name);
- db_printsym(scp, DB_STGY_PROC);
- db_printf("\n");
-#ifdef __PROG26
- db_printf("scp=0x%08x rlv=0x%08x (", scp, frame[FR_RLV] & R15_PC);
- db_printsym(frame[FR_RLV] & R15_PC, DB_STGY_PROC);
- db_printf(")\n");
-#else
- db_printf("scp=0x%08x rlv=0x%08x (", scp, frame[FR_RLV]);
- db_printsym(frame[FR_RLV], DB_STGY_PROC);
- db_printf(")\n");
-#endif
- db_printf("\trsp=0x%08x rfp=0x%08x", frame[FR_RSP], frame[FR_RFP]);
-
- savecode = ((u_int32_t *)scp)[scp_offset];
- if ((savecode & 0x0e100000) == 0x08000000) {
- /* Looks like an STM */
- rp = frame - 4;
- sep = "\n\t";
- for (r = 10; r >= 0; r--) {
- if (savecode & (1 << r)) {
- db_printf("%sr%d=0x%08x",
- sep, r, *rp--);
- sep = (frame - rp) % 4 == 2 ?
- "\n\t" : " ";
- }
- }
- }
-
- db_printf("\n");
-
- /*
- * Switch to next frame up
- */
- if (frame[FR_RFP] == 0)
- break; /* Top of stack */
-
- lastframe = frame;
- frame = (u_int32_t *)(frame[FR_RFP]);
-
- if (INKERNEL((int)frame)) {
- /* staying in kernel */
- if (frame <= lastframe) {
- db_printf("Bad frame pointer: %p\n", frame);
- break;
- }
- } else if (INKERNEL((int)lastframe)) {
- /* switch from user to kernel */
- if (kernel_only)
- break; /* kernel stack only */
- } else {
- /* in user */
- if (frame <= lastframe) {
- db_printf("Bad user frame pointer: %p\n",
- frame);
- break;
- }
- }
- }
-}
-
-/* XXX stubs */
-void
-db_md_list_watchpoints()
-{
-}
-
-int
-db_md_clr_watchpoint(db_expr_t addr, db_expr_t size)
-{
- return (0);
-}
-
-int
-db_md_set_watchpoint(db_expr_t addr, db_expr_t size)
-{
- return (0);
-}
-
-int
-db_trace_thread(struct thread *thr, int count)
-{
- uint32_t addr;
-
- if (thr == curthread)
- addr = (uint32_t)__builtin_frame_address(0);
- else
- addr = thr->td_pcb->un_32.pcb32_r11;
- db_stack_trace_cmd(addr, -1);
- return (0);
-}
-
-void
-db_trace_self(void)
-{
- db_trace_thread(curthread, -1);
-}
-
-void
-stack_save(struct stack *st)
-{
- vm_offset_t callpc;
- u_int32_t *frame;
-
- stack_zero(st);
- frame = (u_int32_t *)__builtin_frame_address(0);
- while (1) {
- if (!INKERNEL(frame))
- break;
- callpc = frame[FR_SCP];
- if (stack_put(st, callpc) == -1)
- break;
- frame = (u_int32_t *)(frame[FR_RFP]);
- }
-}
--- sys/arm/arm/fusu.S
+++ /dev/null
@@ -1,447 +0,0 @@
-/* $NetBSD: fusu.S,v 1.10 2003/12/01 13:34:44 rearnsha Exp $ */
-
-/*-
- * Copyright (c) 1996-1998 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <machine/asm.h>
-#include <machine/asmacros.h>
-#include <machine/armreg.h>
-#include "assym.s"
-__FBSDID("$FreeBSD: src/sys/arm/arm/fusu.S,v 1.7 2005/04/23 16:45:04 cognet Exp $");
-
-#ifdef MULTIPROCESSOR
-.Lcpu_info:
- .word _C_LABEL(cpu_info)
-#else
-.Lcurpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-#endif
-
-/*
- * fuword(caddr_t uaddr);
- * Fetch an int from the user's address space.
- */
-
-ENTRY(casuptr)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r3, .Lcurpcb
- ldr r3, [r3]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r3, #0x00000000
- beq .Lfusupcbfault
-#endif
- stmfd sp!, {r4, r5}
- adr r4, .Lcasuptrfault
- str r4, [r3, #PCB_ONFAULT]
- ldrt r5, [r0]
- cmp r5, r1
- movne r0, r5
- streqt r2, [r0]
- moveq r0, r1
- ldmfd sp!, {r4, r5}
- mov r1, #0x00000000
- str r1, [r3, #PCB_ONFAULT]
- RET
-
-/*
- * Handle faults from casuptr. Clean up and return -1.
- */
-
-.Lcasuptrfault:
- mov r0, #0x00000000
- str r0, [r3, #PCB_ONFAULT]
- mvn r0, #0x00000000
- ldmfd sp!, {r4, r5}
- RET
-/*
- * fuword(caddr_t uaddr);
- * Fetch an int from the user's address space.
- */
-
-ENTRY(fuword32)
-ENTRY(fuword)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r1, .Lfusufault
- str r1, [r2, #PCB_ONFAULT]
-
- ldrt r3, [r0]
-
- mov r1, #0x00000000
- str r1, [r2, #PCB_ONFAULT]
- mov r0, r3
- RET
-
-/*
- * fusword(caddr_t uaddr);
- * Fetch a short from the user's address space.
- */
-
-ENTRY(fusword)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r1, .Lfusufault
- str r1, [r2, #PCB_ONFAULT]
-
- ldrbt r3, [r0], #1
- ldrbt ip, [r0]
-#ifdef __ARMEB__
- orr r0, ip, r3, asl #8
-#else
- orr r0, r3, ip, asl #8
-#endif
- mov r1, #0x00000000
- str r1, [r2, #PCB_ONFAULT]
- RET
-
-/*
- * fuswintr(caddr_t uaddr);
- * Fetch a short from the user's address space. Can be called during an
- * interrupt.
- */
-
-ENTRY(fuswintr)
- ldr r2, Lblock_userspace_access
- ldr r2, [r2]
- teq r2, #0
- mvnne r0, #0x00000000
- RETne
-
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r1, _C_LABEL(fusubailout)
- str r1, [r2, #PCB_ONFAULT]
-
- ldrbt r3, [r0], #1
- ldrbt ip, [r0]
-#ifdef __ARMEB__
- orr r0, ip, r3, asl #8
-#else
- orr r0, r3, ip, asl #8
-#endif
-
- mov r1, #0x00000000
- str r1, [r2, #PCB_ONFAULT]
- RET
-
-Lblock_userspace_access:
- .word _C_LABEL(block_userspace_access)
-
- .data
- .align 0
- .global _C_LABEL(block_userspace_access)
-_C_LABEL(block_userspace_access):
- .word 0
- .text
-
-/*
- * fubyte(caddr_t uaddr);
- * Fetch a byte from the user's address space.
- */
-
-ENTRY(fubyte)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r1, .Lfusufault
- str r1, [r2, #PCB_ONFAULT]
-
- ldrbt r3, [r0]
-
- mov r1, #0x00000000
- str r1, [r2, #PCB_ONFAULT]
- mov r0, r3
- RET
-
-/*
- * Handle faults from [fs]u*(). Clean up and return -1.
- */
-
-.Lfusufault:
- mov r0, #0x00000000
- str r0, [r2, #PCB_ONFAULT]
- mvn r0, #0x00000000
- RET
-
-/*
- * Handle faults from [fs]u*(). Clean up and return -1. This differs from
- * fusufault() in that trap() will recognise it and return immediately rather
- * than trying to page fault.
- */
-
-/* label must be global as fault.c references it */
- .global _C_LABEL(fusubailout)
-_C_LABEL(fusubailout):
- mov r0, #0x00000000
- str r0, [r2, #PCB_ONFAULT]
- mvn r0, #0x00000000
- RET
-
-#ifdef DIAGNOSTIC
-/*
- * Handle earlier faults from [fs]u*(), due to no pcb
- */
-
-.Lfusupcbfault:
- mov r1, r0
- adr r0, fusupcbfaulttext
- b _C_LABEL(panic)
-
-fusupcbfaulttext:
- .asciz "Yikes - no valid PCB during fusuxxx() addr=%08x\n"
- .align 0
-#endif
-
-/*
- * suword(caddr_t uaddr, int x);
- * Store an int in the user's address space.
- */
-
-ENTRY(suword32)
-ENTRY(suword)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0, r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r3, .Lfusufault
- str r3, [r2, #PCB_ONFAULT]
-
- strt r1, [r0]
-
- mov r0, #0x00000000
- str r0, [r2, #PCB_ONFAULT]
- RET
-
-/*
- * suswintr(caddr_t uaddr, short x);
- * Store a short in the user's address space. Can be called during an
- * interrupt.
- */
-
-ENTRY(suswintr)
- ldr r2, Lblock_userspace_access
- ldr r2, [r2]
- teq r2, #0
- mvnne r0, #0x00000000
- RETne
-
-#ifdef MULTIPROCESSOR
- stmfd sp!, {r0, r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r3, _C_LABEL(fusubailout)
- str r3, [r2, #PCB_ONFAULT]
-
-#ifdef __ARMEB__
- mov ip, r1, lsr #8
- strbt ip, [r0], #1
-#else
- strbt r1, [r0], #1
- mov r1, r1, lsr #8
-#endif
- strbt r1, [r0]
-
- mov r0, #0x00000000
- str r0, [r2, #PCB_ONFAULT]
- RET
-
-/*
- * susword(caddr_t uaddr, short x);
- * Store a short in the user's address space.
- */
-
-ENTRY(susword)
-#ifdef MULTIPROCESSOR
- stmfd sp!, {r0, r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r3, .Lfusufault
- str r3, [r2, #PCB_ONFAULT]
-
-#ifdef __ARMEB__
- mov ip, r1, lsr #8
- strbt ip, [r0], #1
-#else
- strbt r1, [r0], #1
- mov r1, r1, lsr #8
-#endif
- strbt r1, [r0]
-
- mov r0, #0x00000000
- str r0, [r2, #PCB_ONFAULT]
- RET
-
-/*
- * subyte(caddr_t uaddr, char x);
- * Store a byte in the user's address space.
- */
-
-ENTRY(subyte)
-#ifdef MULTIPROCESSOR
- stmfd sp!, {r0, r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0, r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
-
-
-#ifdef DIAGNOSTIC
- teq r2, #0x00000000
- beq .Lfusupcbfault
-#endif
-
- adr r3, .Lfusufault
- str r3, [r2, #PCB_ONFAULT]
-
- strbt r1, [r0]
- mov r0, #0x00000000
- str r0, [r2, #PCB_ONFAULT]
- RET
--- sys/arm/arm/undefined.c
+++ /dev/null
@@ -1,307 +0,0 @@
-/* $NetBSD: undefined.c,v 1.22 2003/11/29 22:21:29 bjh21 Exp $ */
-
-/*-
- * Copyright (c) 2001 Ben Harris.
- * Copyright (c) 1995 Mark Brinicombe.
- * Copyright (c) 1995 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * undefined.c
- *
- * Fault handler
- *
- * Created : 06/01/95
- */
-
-
-#include "opt_ddb.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/undefined.c,v 1.8.2.1 2006/03/07 18:08:08 jhb Exp $");
-
-#include <sys/param.h>
-#include <sys/malloc.h>
-#include <sys/queue.h>
-#include <sys/signal.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/syslog.h>
-#include <sys/vmmeter.h>
-#include <sys/types.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/signalvar.h>
-#include <sys/ptrace.h>
-#ifdef KDB
-#include <sys/kdb.h>
-#endif
-#ifdef FAST_FPE
-#include <sys/acct.h>
-#endif
-
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-
-#include <machine/asm.h>
-#include <machine/cpu.h>
-#include <machine/frame.h>
-#include <machine/undefined.h>
-#include <machine/trap.h>
-
-#include <machine/disassem.h>
-
-#ifdef DDB
-#include <ddb/db_output.h>
-#include <machine/db_machdep.h>
-#endif
-
-#ifdef acorn26
-#include <machine/machdep.h>
-#endif
-
-static int gdb_trapper(u_int, u_int, struct trapframe *, int);
-#ifdef FAST_FPE
-extern int want_resched;
-#endif
-
-LIST_HEAD(, undefined_handler) undefined_handlers[MAX_COPROCS];
-
-
-void *
-install_coproc_handler(int coproc, undef_handler_t handler)
-{
- struct undefined_handler *uh;
-
- KASSERT(coproc >= 0 && coproc < MAX_COPROCS, ("bad coproc"));
- KASSERT(handler != NULL, ("handler is NULL")); /* Used to be legal. */
-
- /* XXX: M_TEMP??? */
- MALLOC(uh, struct undefined_handler *, sizeof(*uh), M_TEMP, M_WAITOK);
- uh->uh_handler = handler;
- install_coproc_handler_static(coproc, uh);
- return uh;
-}
-
-void
-install_coproc_handler_static(int coproc, struct undefined_handler *uh)
-{
-
- LIST_INSERT_HEAD(&undefined_handlers[coproc], uh, uh_link);
-}
-
-void
-remove_coproc_handler(void *cookie)
-{
- struct undefined_handler *uh = cookie;
-
- LIST_REMOVE(uh, uh_link);
- FREE(uh, M_TEMP);
-}
-
-
-static int
-gdb_trapper(u_int addr, u_int insn, struct trapframe *frame, int code)
-{
- struct thread *td;
- td = (curthread == NULL) ? &thread0 : curthread;
-
- if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
- if (code == FAULT_USER) {
- trapsignal(td, SIGTRAP, 0);
- return 0;
- }
-#if 0
-#ifdef KGDB
- return !kgdb_trap(T_BREAKPOINT, frame);
-#endif
-#endif
- }
- return 1;
-}
-
-static struct undefined_handler gdb_uh;
-
-void
-undefined_init()
-{
- int loop;
-
- /* Not actually necessary -- the initialiser is just NULL */
- for (loop = 0; loop < MAX_COPROCS; ++loop)
- LIST_INIT(&undefined_handlers[loop]);
-
- /* Install handler for GDB breakpoints */
- gdb_uh.uh_handler = gdb_trapper;
- install_coproc_handler_static(0, &gdb_uh);
-}
-
-
-void
-undefinedinstruction(trapframe_t *frame)
-{
- struct thread *td;
- u_int fault_pc;
- int fault_instruction;
- int fault_code;
- int coprocessor;
- struct undefined_handler *uh;
-#ifdef VERBOSE_ARM32
- int s;
-#endif
-
- /* Enable interrupts if they were enabled before the exception. */
- if (!(frame->tf_spsr & I32_bit))
- enable_interrupts(I32_bit);
-
- frame->tf_pc -= INSN_SIZE;
- PCPU_LAZY_INC(cnt.v_trap);
-
- fault_pc = frame->tf_pc;
-
- /*
- * Get the current thread/proc structure or thread0/proc0 if there is
- * none.
- */
- td = curthread == NULL ? &thread0 : curthread;
-
- /*
- * Make sure the program counter is correctly aligned so we
- * don't take an alignment fault trying to read the opcode.
- */
- if (__predict_false((fault_pc & 3) != 0)) {
- trapsignal(td, SIGILL, 0);
- userret(td, frame, 0);
- return;
- }
-
- /*
- * Should use fuword() here .. but in the interests of squeezing every
- * bit of speed we will just use ReadWord(). We know the instruction
- * can be read as was just executed so this will never fail unless the
- * kernel is screwed up in which case it does not really matter does
- * it ?
- */
-
- fault_instruction = *(u_int32_t *)fault_pc;
-
- /* Update vmmeter statistics */
-#if 0
- uvmexp.traps++;
-#endif
- /* Check for coprocessor instruction */
-
- /*
- * According to the datasheets you only need to look at bit 27 of the
- * instruction to tell the difference between and undefined
- * instruction and a coprocessor instruction following an undefined
- * instruction trap.
- */
-
- if ((fault_instruction & (1 << 27)) != 0)
- coprocessor = (fault_instruction >> 8) & 0x0f;
- else
- coprocessor = 0;
-
- if ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
- /*
- * Modify the fault_code to reflect the USR/SVC state at
- * time of fault.
- */
- fault_code = FAULT_USER;
- td->td_frame = frame;
- } else
- fault_code = 0;
-
- /* OK this is were we do something about the instruction. */
- LIST_FOREACH(uh, &undefined_handlers[coprocessor], uh_link)
- if (uh->uh_handler(fault_pc, fault_instruction, frame,
- fault_code) == 0)
- break;
-
- if (fault_code & FAULT_USER && fault_instruction == PTRACE_BREAKPOINT) {
- PROC_LOCK(td->td_proc);
- _PHOLD(td->td_proc);
- ptrace_clear_single_step(td);
- _PRELE(td->td_proc);
- PROC_UNLOCK(td->td_proc);
- return;
- }
-
- if (uh == NULL && (fault_code & FAULT_USER)) {
- /* Fault has not been handled */
- trapsignal(td, SIGILL, 0);
- }
-
- if ((fault_code & FAULT_USER) == 0) {
- if (fault_instruction == KERNEL_BREAKPOINT) {
-#ifdef KDB
- kdb_trap(T_BREAKPOINT, 0, frame);
-#else
- printf("No debugger in kernel.\n");
-#endif
- return;
- } else
- panic("Undefined instruction in kernel.\n");
- }
-
-#ifdef FAST_FPE
- /* Optimised exit code */
- {
-
- /*
- * Check for reschedule request, at the moment there is only
- * 1 ast so this code should always be run
- */
-
- if (want_resched) {
- /*
- * We are being preempted.
- */
- preempt(0);
- }
-
- /* Invoke MI userret code */
- mi_userret(td);
-
-#if 0
- l->l_priority = l->l_usrpri;
-
- curcpu()->ci_schedstate.spc_curpriority = l->l_priority;
-#endif
- }
-
-#else
- userret(td, frame, 0);
-#endif
-}
--- sys/arm/arm/nexus_io.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* $NetBSD: mainbus_io.c,v 1.13 2003/07/15 00:24:47 lukem Exp $ */
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * bus_space I/O functions for mainbus
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/nexus_io.c,v 1.5 2005/01/05 21:58:47 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/bus.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-
-#include <machine/bus.h>
-#include <machine/pmap.h>
-
-/* Proto types for all the bus_space structure functions */
-vm_offset_t lala;
-bs_protos(nexus);
-/* Declare the mainbus bus space tag */
-
-struct bus_space mainbus_bs_tag = {
- /* cookie */
- NULL,
-
- /* mapping/unmapping */
- nexus_bs_map,
- nexus_bs_unmap,
- nexus_bs_subregion,
-
- /* allocation/deallocation */
- nexus_bs_alloc,
- nexus_bs_free,
-
- /* barrier */
- nexus_bs_barrier,
-
- /* read (single) */
- nexus_bs_r_1,
- nexus_bs_r_2,
- nexus_bs_r_4,
- NULL,
-
- /* read multiple */
- NULL,
- nexus_bs_rm_2,
- NULL,
- NULL,
-
- /* read region */
- NULL,
- NULL,
- NULL,
- NULL,
-
- /* write (single) */
- nexus_bs_w_1,
- nexus_bs_w_2,
- nexus_bs_w_4,
- NULL,
-
- /* write multiple */
- nexus_bs_wm_1,
- nexus_bs_wm_2,
- NULL,
- NULL,
-
- /* write region */
- NULL,
- NULL,
- NULL,
- NULL,
-
- NULL,
- NULL,
- NULL,
- NULL,
-
- /* set region */
- NULL,
- NULL,
- NULL,
- NULL,
-
- /* copy */
- NULL,
- NULL,
- NULL,
- NULL,
-};
-
-/* bus space functions */
-
-int
-nexus_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int cacheable,
- bus_space_handle_t *bshp)
-{
- return(0);
-}
-
-int
-nexus_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
- bpap, bshp)
- void *t;
- bus_addr_t rstart, rend;
- bus_size_t size, alignment, boundary;
- int cacheable;
- bus_addr_t *bpap;
- bus_space_handle_t *bshp;
-{
- panic("mainbus_bs_alloc(): Help!");
-}
-
-
-void
-nexus_bs_unmap(void *t, bus_size_t size)
-{
- /*
- * Temporary implementation
- */
-}
-
-void
-nexus_bs_free(t, bsh, size)
- void *t;
- bus_space_handle_t bsh;
- bus_size_t size;
-{
-
- panic("mainbus_bs_free(): Help!");
- /* mainbus_bs_unmap() does all that we need to do. */
-/* mainbus_bs_unmap(t, bsh, size);*/
-}
-
-int
-nexus_bs_subregion(t, bsh, offset, size, nbshp)
- void *t;
- bus_space_handle_t bsh;
- bus_size_t offset, size;
- bus_space_handle_t *nbshp;
-{
-
- *nbshp = bsh + offset;
- return (0);
-}
-
-int
-nexus_bs_mmap(struct cdev *dev, vm_offset_t off, vm_paddr_t *addr, int prot)
-{
- *addr = off;
- return (0);
-}
-
-void
-nexus_bs_barrier(t, bsh, offset, len, flags)
- void *t;
- bus_space_handle_t bsh;
- bus_size_t offset, len;
- int flags;
-{
-}
-
-/* End of mainbus_io.c */
--- sys/arm/arm/trap.c
+++ /dev/null
@@ -1,1011 +0,0 @@
-/* $NetBSD: fault.c,v 1.45 2003/11/20 14:44:36 scw Exp $ */
-
-/*-
- * Copyright 2004 Olivier Houchard
- * Copyright 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Steve C. Woodford for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*-
- * Copyright (c) 1994-1997 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * fault.c
- *
- * Fault handlers
- *
- * Created : 28/11/94
- */
-
-
-#include "opt_ktrace.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/trap.c,v 1.17 2005/06/23 11:39:18 cognet Exp $");
-
-#include <sys/types.h>
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/syscall.h>
-#include <sys/sysent.h>
-#include <sys/signalvar.h>
-#include <sys/ktr.h>
-#ifdef KTRACE
-#include <sys/uio.h>
-#include <sys/ktrace.h>
-#endif
-#include <sys/ptrace.h>
-#include <sys/pioctl.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_map.h>
-#include <vm/vm_extern.h>
-
-#include <machine/cpuconf.h>
-#include <machine/vmparam.h>
-#include <machine/frame.h>
-#include <machine/katelib.h>
-#include <machine/cpu.h>
-#include <machine/intr.h>
-#include <machine/pcb.h>
-#include <machine/proc.h>
-#include <machine/swi.h>
-
-#ifdef KDB
-#include <sys/kdb.h>
-#endif
-
-
-void swi_handler(trapframe_t *);
-void undefinedinstruction(trapframe_t *);
-
-#include <machine/disassem.h>
-#include <machine/machdep.h>
-
-extern char fusubailout[];
-
-#ifdef DEBUG
-int last_fault_code; /* For the benefit of pmap_fault_fixup() */
-#endif
-
-#if defined(CPU_ARM7TDMI)
-/* These CPUs may need data/prefetch abort fixups */
-#define CPU_ABORT_FIXUP_REQUIRED
-#endif
-
-struct ksig {
- int signb;
- u_long code;
-};
-struct data_abort {
- int (*func)(trapframe_t *, u_int, u_int, struct thread *, struct ksig *);
- const char *desc;
-};
-
-static int dab_fatal(trapframe_t *, u_int, u_int, struct thread *, struct ksig *);
-static int dab_align(trapframe_t *, u_int, u_int, struct thread *, struct ksig *);
-static int dab_buserr(trapframe_t *, u_int, u_int, struct thread *, struct ksig *);
-
-static const struct data_abort data_aborts[] = {
- {dab_fatal, "Vector Exception"},
- {dab_align, "Alignment Fault 1"},
- {dab_fatal, "Terminal Exception"},
- {dab_align, "Alignment Fault 3"},
- {dab_buserr, "External Linefetch Abort (S)"},
- {NULL, "Translation Fault (S)"},
- {dab_buserr, "External Linefetch Abort (P)"},
- {NULL, "Translation Fault (P)"},
- {dab_buserr, "External Non-Linefetch Abort (S)"},
- {NULL, "Domain Fault (S)"},
- {dab_buserr, "External Non-Linefetch Abort (P)"},
- {NULL, "Domain Fault (P)"},
- {dab_buserr, "External Translation Abort (L1)"},
- {NULL, "Permission Fault (S)"},
- {dab_buserr, "External Translation Abort (L2)"},
- {NULL, "Permission Fault (P)"}
-};
-
-/* Determine if a fault came from user mode */
-#define TRAP_USERMODE(tf) ((tf->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
-
-/* Determine if 'x' is a permission fault */
-#define IS_PERMISSION_FAULT(x) \
- (((1 << ((x) & FAULT_TYPE_MASK)) & \
- ((1 << FAULT_PERM_P) | (1 << FAULT_PERM_S))) != 0)
-
-static __inline void
-call_trapsignal(struct thread *td, int sig, u_long code)
-{
-
- trapsignal(td, sig, code);
-}
-
-static __inline int
-data_abort_fixup(trapframe_t *tf, u_int fsr, u_int far, struct thread *td, struct ksig *ksig)
-{
-#ifdef CPU_ABORT_FIXUP_REQUIRED
- int error;
-
- /* Call the cpu specific data abort fixup routine */
- error = cpu_dataabt_fixup(tf);
- if (__predict_true(error != ABORT_FIXUP_FAILED))
- return (error);
-
- /*
- * Oops, couldn't fix up the instruction
- */
- printf("data_abort_fixup: fixup for %s mode data abort failed.\n",
- TRAP_USERMODE(tf) ? "user" : "kernel");
- printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
- *((u_int *)tf->tf_pc));
- disassemble(tf->tf_pc);
-
- /* Die now if this happened in kernel mode */
- if (!TRAP_USERMODE(tf))
- dab_fatal(tf, fsr, far, td, NULL, ksig);
-
- return (error);
-#else
- return (ABORT_FIXUP_OK);
-#endif /* CPU_ABORT_FIXUP_REQUIRED */
-}
-
-void
-data_abort_handler(trapframe_t *tf)
-{
- struct vm_map *map;
- struct pcb *pcb;
- struct thread *td;
- u_int user, far, fsr;
- vm_prot_t ftype;
- void *onfault;
- vm_offset_t va;
- u_int sticks = 0;
- int error = 0;
- struct ksig ksig;
- struct proc *p;
-
-
- /* Grab FAR/FSR before enabling interrupts */
- far = cpu_faultaddress();
- fsr = cpu_faultstatus();
-#if 0
- printf("data abort: %p (from %p %p)\n", (void*)far, (void*)tf->tf_pc,
- (void*)tf->tf_svc_lr);
-#endif
-
- /* Update vmmeter statistics */
-#if 0
- vmexp.traps++;
-#endif
-
- td = curthread;
- p = td->td_proc;
-
- PCPU_LAZY_INC(cnt.v_trap);
- /* Data abort came from user mode? */
- user = TRAP_USERMODE(tf);
-
- if (user) {
- sticks = td->td_sticks; td->td_frame = tf;
- if (td->td_ucred != td->td_proc->p_ucred)
- cred_update_thread(td);
- if (td->td_pflags & TDP_SA)
- thread_user_enter(td);
-
- }
- /* Grab the current pcb */
- pcb = td->td_pcb;
- /* Re-enable interrupts if they were enabled previously */
- if (td->td_critnest == 0 && __predict_true(tf->tf_spsr & I32_bit) == 0)
- enable_interrupts(I32_bit);
-
- /* Invoke the appropriate handler, if necessary */
- if (__predict_false(data_aborts[fsr & FAULT_TYPE_MASK].func != NULL)) {
- if ((data_aborts[fsr & FAULT_TYPE_MASK].func)(tf, fsr, far,
- td, &ksig)) {
- goto do_trapsignal;
- }
- goto out;
- }
-
- /*
- * At this point, we're dealing with one of the following data aborts:
- *
- * FAULT_TRANS_S - Translation -- Section
- * FAULT_TRANS_P - Translation -- Page
- * FAULT_DOMAIN_S - Domain -- Section
- * FAULT_DOMAIN_P - Domain -- Page
- * FAULT_PERM_S - Permission -- Section
- * FAULT_PERM_P - Permission -- Page
- *
- * These are the main virtual memory-related faults signalled by
- * the MMU.
- */
-
- /* fusubailout is used by [fs]uswintr to avoid page faulting */
- if (__predict_false(pcb->pcb_onfault == fusubailout)) {
- tf->tf_r0 = EFAULT;
- tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
- return;
- }
-
- /*
- * Make sure the Program Counter is sane. We could fall foul of
- * someone executing Thumb code, in which case the PC might not
- * be word-aligned. This would cause a kernel alignment fault
- * further down if we have to decode the current instruction.
- * XXX: It would be nice to be able to support Thumb at some point.
- */
- if (__predict_false((tf->tf_pc & 3) != 0)) {
- if (user) {
- /*
- * Give the user an illegal instruction signal.
- */
- /* Deliver a SIGILL to the process */
- ksig.signb = SIGILL;
- ksig.code = 0;
- goto do_trapsignal;
- }
-
- /*
- * The kernel never executes Thumb code.
- */
- printf("\ndata_abort_fault: Misaligned Kernel-mode "
- "Program Counter\n");
- dab_fatal(tf, fsr, far, td, &ksig);
- }
-
- /* See if the cpu state needs to be fixed up */
- switch (data_abort_fixup(tf, fsr, far, td, &ksig)) {
- case ABORT_FIXUP_RETURN:
- return;
- case ABORT_FIXUP_FAILED:
- /* Deliver a SIGILL to the process */
- ksig.signb = SIGILL;
- ksig.code = 0;
- goto do_trapsignal;
- default:
- break;
- }
-
- va = trunc_page((vm_offset_t)far);
-
- /*
- * It is only a kernel address space fault iff:
- * 1. user == 0 and
- * 2. pcb_onfault not set or
- * 3. pcb_onfault set and not LDRT/LDRBT/STRT/STRBT instruction.
- */
- if (user == 0 && (va >= VM_MIN_KERNEL_ADDRESS ||
- (va < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW)) &&
- __predict_true((pcb->pcb_onfault == NULL ||
- (ReadWord(tf->tf_pc) & 0x05200000) != 0x04200000))) {
- map = kernel_map;
-
- /* Was the fault due to the FPE/IPKDB ? */
- if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) {
-
- /*
- * Force exit via userret()
- * This is necessary as the FPE is an extension to
- * userland that actually runs in a priveledged mode
- * but uses USR mode permissions for its accesses.
- */
- user = 1;
- ksig.signb = SIGSEGV;
- ksig.code = 0;
- goto do_trapsignal;
- }
- } else {
- map = &td->td_proc->p_vmspace->vm_map;
- }
-
- /*
- * We need to know whether the page should be mapped
- * as R or R/W. The MMU does not give us the info as
- * to whether the fault was caused by a read or a write.
- *
- * However, we know that a permission fault can only be
- * the result of a write to a read-only location, so
- * we can deal with those quickly.
- *
- * Otherwise we need to disassemble the instruction
- * responsible to determine if it was a write.
- */
- if (IS_PERMISSION_FAULT(fsr)) {
- ftype = VM_PROT_WRITE;
- } else {
- u_int insn = ReadWord(tf->tf_pc);
-
- if (((insn & 0x0c100000) == 0x04000000) || /* STR/STRB */
- ((insn & 0x0e1000b0) == 0x000000b0) || /* STRH/STRD */
- ((insn & 0x0a100000) == 0x08000000)) /* STM/CDT */
- {
- ftype = VM_PROT_WRITE;
- }
- else
- if ((insn & 0x0fb00ff0) == 0x01000090) /* SWP */
- ftype = VM_PROT_READ | VM_PROT_WRITE;
- else
- ftype = VM_PROT_READ;
- }
-
- /*
- * See if the fault is as a result of ref/mod emulation,
- * or domain mismatch.
- */
-#ifdef DEBUG
- last_fault_code = fsr;
-#endif
- if (pmap_fault_fixup(vmspace_pmap(td->td_proc->p_vmspace), va, ftype,
- user)) {
- goto out;
- }
-
- onfault = pcb->pcb_onfault;
- pcb->pcb_onfault = NULL;
- if (map != kernel_map) {
- PROC_LOCK(p);
- p->p_lock++;
- PROC_UNLOCK(p);
- }
- error = vm_fault(map, va, ftype, (ftype & VM_PROT_WRITE) ?
- VM_FAULT_DIRTY : VM_FAULT_NORMAL);
- pcb->pcb_onfault = onfault;
- if (__predict_true(error == 0)) {
- goto out;
- }
-
- if (map != kernel_map) {
- PROC_LOCK(p);
- p->p_lock--;
- PROC_UNLOCK(p);
- }
- if (user == 0) {
- if (pcb->pcb_onfault) {
- tf->tf_r0 = error;
- tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
- return;
- }
-
- printf("\nvm_fault(%p, %x, %x, 0) -> %x\n", map, va, ftype,
- error);
- dab_fatal(tf, fsr, far, td, &ksig);
- }
-
-
- if (error == ENOMEM) {
- printf("VM: pid %d (%s), uid %d killed: "
- "out of swap\n", td->td_proc->p_pid, td->td_proc->p_comm,
- (td->td_proc->p_ucred) ?
- td->td_proc->p_ucred->cr_uid : -1);
- ksig.signb = SIGKILL;
- } else {
- ksig.signb = SIGSEGV;
- }
- ksig.code = 0;
-do_trapsignal:
- call_trapsignal(td, ksig.signb, ksig.code);
-out:
- /* If returning to user mode, make sure to invoke userret() */
- if (user)
- userret(td, tf, sticks);
-}
-
-/*
- * dab_fatal() handles the following data aborts:
- *
- * FAULT_WRTBUF_0 - Vector Exception
- * FAULT_WRTBUF_1 - Terminal Exception
- *
- * We should never see these on a properly functioning system.
- *
- * This function is also called by the other handlers if they
- * detect a fatal problem.
- *
- * Note: If 'l' is NULL, we assume we're dealing with a prefetch abort.
- */
-static int
-dab_fatal(trapframe_t *tf, u_int fsr, u_int far, struct thread *td, struct ksig *ksig)
-{
- const char *mode;
-
- mode = TRAP_USERMODE(tf) ? "user" : "kernel";
-
- if (td != NULL) {
- printf("Fatal %s mode data abort: '%s'\n", mode,
- data_aborts[fsr & FAULT_TYPE_MASK].desc);
- printf("trapframe: %p\nFSR=%08x, FAR=", tf, fsr);
- if ((fsr & FAULT_IMPRECISE) == 0)
- printf("%08x, ", far);
- else
- printf("Invalid, ");
- printf("spsr=%08x\n", tf->tf_spsr);
- } else {
- printf("Fatal %s mode prefetch abort at 0x%08x\n",
- mode, tf->tf_pc);
- printf("trapframe: %p, spsr=%08x\n", tf, tf->tf_spsr);
- }
-
- printf("r0 =%08x, r1 =%08x, r2 =%08x, r3 =%08x\n",
- tf->tf_r0, tf->tf_r1, tf->tf_r2, tf->tf_r3);
- printf("r4 =%08x, r5 =%08x, r6 =%08x, r7 =%08x\n",
- tf->tf_r4, tf->tf_r5, tf->tf_r6, tf->tf_r7);
- printf("r8 =%08x, r9 =%08x, r10=%08x, r11=%08x\n",
- tf->tf_r8, tf->tf_r9, tf->tf_r10, tf->tf_r11);
- printf("r12=%08x, ", tf->tf_r12);
-
- if (TRAP_USERMODE(tf))
- printf("usp=%08x, ulr=%08x",
- tf->tf_usr_sp, tf->tf_usr_lr);
- else
- printf("ssp=%08x, slr=%08x",
- tf->tf_svc_sp, tf->tf_svc_lr);
- printf(", pc =%08x\n\n", tf->tf_pc);
-
-#ifdef KDB
- kdb_trap(fsr, 0, tf);
-#endif
- panic("Fatal abort");
- /*NOTREACHED*/
-}
-
-/*
- * dab_align() handles the following data aborts:
- *
- * FAULT_ALIGN_0 - Alignment fault
- * FAULT_ALIGN_0 - Alignment fault
- *
- * These faults are fatal if they happen in kernel mode. Otherwise, we
- * deliver a bus error to the process.
- */
-static int
-dab_align(trapframe_t *tf, u_int fsr, u_int far, struct thread *td, struct ksig *ksig)
-{
-
- /* Alignment faults are always fatal if they occur in kernel mode */
- if (!TRAP_USERMODE(tf)) {
- if (!td || !td->td_pcb->pcb_onfault)
- dab_fatal(tf, fsr, far, td, ksig);
- tf->tf_r0 = EFAULT;
- tf->tf_pc = (int)td->td_pcb->pcb_onfault;
- return (0);
- }
-
- /* pcb_onfault *must* be NULL at this point */
-
- /* See if the cpu state needs to be fixed up */
- (void) data_abort_fixup(tf, fsr, far, td, ksig);
-
- /* Deliver a bus error signal to the process */
- ksig->code = 0;
- ksig->signb = SIGBUS;
- td->td_frame = tf;
-
- return (1);
-}
-
-/*
- * dab_buserr() handles the following data aborts:
- *
- * FAULT_BUSERR_0 - External Abort on Linefetch -- Section
- * FAULT_BUSERR_1 - External Abort on Linefetch -- Page
- * FAULT_BUSERR_2 - External Abort on Non-linefetch -- Section
- * FAULT_BUSERR_3 - External Abort on Non-linefetch -- Page
- * FAULT_BUSTRNL1 - External abort on Translation -- Level 1
- * FAULT_BUSTRNL2 - External abort on Translation -- Level 2
- *
- * If pcb_onfault is set, flag the fault and return to the handler.
- * If the fault occurred in user mode, give the process a SIGBUS.
- *
- * Note: On XScale, FAULT_BUSERR_0, FAULT_BUSERR_1, and FAULT_BUSERR_2
- * can be flagged as imprecise in the FSR. This causes a real headache
- * since some of the machine state is lost. In this case, tf->tf_pc
- * may not actually point to the offending instruction. In fact, if
- * we've taken a double abort fault, it generally points somewhere near
- * the top of "data_abort_entry" in exception.S.
- *
- * In all other cases, these data aborts are considered fatal.
- */
-static int
-dab_buserr(trapframe_t *tf, u_int fsr, u_int far, struct thread *td, struct ksig *ksig)
-{
- struct pcb *pcb = td->td_pcb;
-
-#ifdef __XSCALE__
- if ((fsr & FAULT_IMPRECISE) != 0 &&
- (tf->tf_spsr & PSR_MODE) == PSR_ABT32_MODE) {
- /*
- * Oops, an imprecise, double abort fault. We've lost the
- * r14_abt/spsr_abt values corresponding to the original
- * abort, and the spsr saved in the trapframe indicates
- * ABT mode.
- */
- tf->tf_spsr &= ~PSR_MODE;
-
- /*
- * We use a simple heuristic to determine if the double abort
- * happened as a result of a kernel or user mode access.
- * If the current trapframe is at the top of the kernel stack,
- * the fault _must_ have come from user mode.
- */
- if (tf != ((trapframe_t *)pcb->un_32.pcb32_sp) - 1) {
- /*
- * Kernel mode. We're either about to die a
- * spectacular death, or pcb_onfault will come
- * to our rescue. Either way, the current value
- * of tf->tf_pc is irrelevant.
- */
- tf->tf_spsr |= PSR_SVC32_MODE;
- if (pcb->pcb_onfault == NULL)
- printf("\nKernel mode double abort!\n");
- } else {
- /*
- * User mode. We've lost the program counter at the
- * time of the fault (not that it was accurate anyway;
- * it's not called an imprecise fault for nothing).
- * About all we can do is copy r14_usr to tf_pc and
- * hope for the best. The process is about to get a
- * SIGBUS, so it's probably history anyway.
- */
- tf->tf_spsr |= PSR_USR32_MODE;
- tf->tf_pc = tf->tf_usr_lr;
- }
- }
-
- /* FAR is invalid for imprecise exceptions */
- if ((fsr & FAULT_IMPRECISE) != 0)
- far = 0;
-#endif /* __XSCALE__ */
-
- if (pcb->pcb_onfault) {
- tf->tf_r0 = EFAULT;
- tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
- return (0);
- }
-
- /* See if the cpu state needs to be fixed up */
- (void) data_abort_fixup(tf, fsr, far, td, ksig);
-
- /*
- * At this point, if the fault happened in kernel mode, we're toast
- */
- if (!TRAP_USERMODE(tf))
- dab_fatal(tf, fsr, far, td, ksig);
-
- /* Deliver a bus error signal to the process */
- ksig->signb = SIGBUS;
- ksig->code = 0;
- td->td_frame = tf;
-
- return (1);
-}
-
-static __inline int
-prefetch_abort_fixup(trapframe_t *tf, struct ksig *ksig)
-{
-#ifdef CPU_ABORT_FIXUP_REQUIRED
- int error;
-
- /* Call the cpu specific prefetch abort fixup routine */
- error = cpu_prefetchabt_fixup(tf);
- if (__predict_true(error != ABORT_FIXUP_FAILED))
- return (error);
-
- /*
- * Oops, couldn't fix up the instruction
- */
- printf(
- "prefetch_abort_fixup: fixup for %s mode prefetch abort failed.\n",
- TRAP_USERMODE(tf) ? "user" : "kernel");
- printf("pc = 0x%08x, opcode 0x%08x, insn = ", tf->tf_pc,
- *((u_int *)tf->tf_pc));
- disassemble(tf->tf_pc);
-
- /* Die now if this happened in kernel mode */
- if (!TRAP_USERMODE(tf))
- dab_fatal(tf, 0, tf->tf_pc, NULL, ksig);
-
- return (error);
-#else
- return (ABORT_FIXUP_OK);
-#endif /* CPU_ABORT_FIXUP_REQUIRED */
-}
-
-/*
- * void prefetch_abort_handler(trapframe_t *tf)
- *
- * Abort handler called when instruction execution occurs at
- * a non existent or restricted (access permissions) memory page.
- * If the address is invalid and we were in SVC mode then panic as
- * the kernel should never prefetch abort.
- * If the address is invalid and the page is mapped then the user process
- * does no have read permission so send it a signal.
- * Otherwise fault the page in and try again.
- */
-void
-prefetch_abort_handler(trapframe_t *tf)
-{
- struct thread *td;
- struct proc * p;
- struct vm_map *map;
- vm_offset_t fault_pc, va;
- int error = 0;
- u_int sticks = 0;
- struct ksig ksig;
-
-
-#if 0
- /* Update vmmeter statistics */
- uvmexp.traps++;
-#endif
-#if 0
- printf("prefetch abort handler: %p %p\n", (void*)tf->tf_pc,
- (void*)tf->tf_usr_lr);
-#endif
-
- td = curthread;
- p = td->td_proc;
- PCPU_LAZY_INC(cnt.v_trap);
-
- if (TRAP_USERMODE(tf)) {
- td->td_frame = tf;
- if (td->td_ucred != td->td_proc->p_ucred)
- cred_update_thread(td);
- if (td->td_proc->p_flag & P_SA)
- thread_user_enter(td);
- }
- fault_pc = tf->tf_pc;
- if (td->td_critnest == 0 &&
- __predict_true((tf->tf_spsr & I32_bit) == 0))
- enable_interrupts(I32_bit);
-
-
- /* See if the cpu state needs to be fixed up */
- switch (prefetch_abort_fixup(tf, &ksig)) {
- case ABORT_FIXUP_RETURN:
- return;
- case ABORT_FIXUP_FAILED:
- /* Deliver a SIGILL to the process */
- ksig.signb = SIGILL;
- ksig.code = 0;
- td->td_frame = tf;
- goto do_trapsignal;
- default:
- break;
- }
-
- /* Prefetch aborts cannot happen in kernel mode */
- if (__predict_false(!TRAP_USERMODE(tf)))
- dab_fatal(tf, 0, tf->tf_pc, NULL, &ksig);
- sticks = td->td_sticks;
-
-
- /* Ok validate the address, can only execute in USER space */
- if (__predict_false(fault_pc >= VM_MAXUSER_ADDRESS ||
- (fault_pc < VM_MIN_ADDRESS && vector_page == ARM_VECTORS_LOW))) {
- ksig.signb = SIGSEGV;
- ksig.code = 0;
- goto do_trapsignal;
- }
-
- map = &td->td_proc->p_vmspace->vm_map;
- va = trunc_page(fault_pc);
-
- /*
- * See if the pmap can handle this fault on its own...
- */
-#ifdef DEBUG
- last_fault_code = -1;
-#endif
- if (pmap_fault_fixup(map->pmap, va, VM_PROT_READ, 1))
- goto out;
-
- if (map != kernel_map) {
- PROC_LOCK(p);
- p->p_lock++;
- PROC_UNLOCK(p);
- }
-
- error = vm_fault(map, va, VM_PROT_READ | VM_PROT_EXECUTE,
- VM_FAULT_NORMAL);
- if (map != kernel_map) {
- PROC_LOCK(p);
- p->p_lock--;
- PROC_UNLOCK(p);
- }
-
- if (__predict_true(error == 0))
- goto out;
-
- if (error == ENOMEM) {
- printf("VM: pid %d (%s), uid %d killed: "
- "out of swap\n", td->td_proc->p_pid, td->td_proc->p_comm,
- (td->td_proc->p_ucred) ?
- td->td_proc->p_ucred->cr_uid : -1);
- ksig.signb = SIGKILL;
- } else {
- ksig.signb = SIGSEGV;
- }
- ksig.code = 0;
-
-do_trapsignal:
- call_trapsignal(td, ksig.signb, ksig.code);
-
-out:
- userret(td, tf, sticks);
-
-}
-
-extern int badaddr_read_1(const uint8_t *, uint8_t *);
-extern int badaddr_read_2(const uint16_t *, uint16_t *);
-extern int badaddr_read_4(const uint32_t *, uint32_t *);
-/*
- * Tentatively read an 8, 16, or 32-bit value from 'addr'.
- * If the read succeeds, the value is written to 'rptr' and zero is returned.
- * Else, return EFAULT.
- */
-int
-badaddr_read(void *addr, size_t size, void *rptr)
-{
- union {
- uint8_t v1;
- uint16_t v2;
- uint32_t v4;
- } u;
- int rv;
-
- cpu_drain_writebuf();
-
- /* Read from the test address. */
- switch (size) {
- case sizeof(uint8_t):
- rv = badaddr_read_1(addr, &u.v1);
- if (rv == 0 && rptr)
- *(uint8_t *) rptr = u.v1;
- break;
-
- case sizeof(uint16_t):
- rv = badaddr_read_2(addr, &u.v2);
- if (rv == 0 && rptr)
- *(uint16_t *) rptr = u.v2;
- break;
-
- case sizeof(uint32_t):
- rv = badaddr_read_4(addr, &u.v4);
- if (rv == 0 && rptr)
- *(uint32_t *) rptr = u.v4;
- break;
-
- default:
- panic("badaddr: invalid size (%lu)", (u_long) size);
- }
-
- /* Return EFAULT if the address was invalid, else zero */
- return (rv);
-}
-
-#define MAXARGS 8
-static void
-syscall(struct thread *td, trapframe_t *frame, u_int32_t insn)
-{
- struct proc *p = td->td_proc;
- int code, error;
- u_int nap, nargs;
- register_t *ap, *args, copyargs[MAXARGS];
- struct sysent *callp;
- int locked = 0;
- u_int sticks = 0;
-
- PCPU_LAZY_INC(cnt.v_syscall);
- sticks = td->td_sticks;
- if (td->td_ucred != td->td_proc->p_ucred)
- cred_update_thread(td);
- switch (insn & SWI_OS_MASK) {
- case 0: /* XXX: we need our own one. */
- nap = 4;
- break;
- default:
- trapsignal(td, SIGILL, 0);
- userret(td, frame, td->td_sticks);
- return;
- }
- code = insn & 0x000fffff;
- sticks = td->td_sticks;
- ap = &frame->tf_r0;
- if (code == SYS_syscall) {
- code = *ap++;
-
- nap--;
- } else if (code == SYS___syscall) {
- code = *ap++;
- nap -= 2;
- ap++;
- }
- if (p->p_sysent->sv_mask)
- code &= p->p_sysent->sv_mask;
- if (code >= p->p_sysent->sv_size)
- callp = &p->p_sysent->sv_table[0];
- else
- callp = &p->p_sysent->sv_table[code];
- nargs = callp->sy_narg & SYF_ARGMASK;
- memcpy(copyargs, ap, nap * sizeof(register_t));
- if (nargs > nap) {
- error = copyin((void *)frame->tf_usr_sp, copyargs + nap,
- (nargs - nap) * sizeof(register_t));
- if (error)
- goto bad;
- }
- args = copyargs;
- error = 0;
-#ifdef KTRACE
- if (KTRPOINT(td, KTR_SYSCALL))
- ktrsyscall(code, nargs, args);
-#endif
-
- CTR4(KTR_SYSC, "syscall enter thread %p pid %d proc %s code %d", td,
- td->td_proc->p_pid, td->td_proc->p_comm, code);
- if ((callp->sy_narg & SYF_MPSAFE) == 0)
- mtx_lock(&Giant);
- locked = 1;
- if (error == 0) {
- td->td_retval[0] = 0;
- td->td_retval[1] = 0;
- STOPEVENT(p, S_SCE, (callp->sy_narg & SYF_ARGMASK));
- PTRACESTOP_SC(p, td, S_PT_SCE);
- error = (*callp->sy_call)(td, args);
- }
- switch (error) {
- case 0:
-#ifdef __ARMEB__
- if ((insn & 0x000fffff) &&
- (code != SYS_lseek)) {
- /*
- * 64-bit return, 32-bit syscall. Fixup byte order
- */
- frame->tf_r0 = 0;
- frame->tf_r1 = td->td_retval[0];
- } else {
- frame->tf_r0 = td->td_retval[0];
- frame->tf_r1 = td->td_retval[1];
- }
-#else
- frame->tf_r0 = td->td_retval[0];
- frame->tf_r1 = td->td_retval[1];
-#endif
- frame->tf_spsr &= ~PSR_C_bit; /* carry bit */
- break;
-
- case ERESTART:
- /*
- * Reconstruct the pc to point at the swi.
- */
- frame->tf_pc -= INSN_SIZE;
- break;
- case EJUSTRETURN:
- /* nothing to do */
- break;
- default:
-bad:
- frame->tf_r0 = error;
- frame->tf_spsr |= PSR_C_bit; /* carry bit */
- break;
- }
- if (locked && (callp->sy_narg & SYF_MPSAFE) == 0)
- mtx_unlock(&Giant);
-
-
- userret(td, frame, sticks);
- CTR4(KTR_SYSC, "syscall exit thread %p pid %d proc %s code %d", td,
- td->td_proc->p_pid, td->td_proc->p_comm, code);
-
- STOPEVENT(p, S_SCX, code);
- PTRACESTOP_SC(p, td, S_PT_SCX);
-#ifdef KTRACE
- if (KTRPOINT(td, KTR_SYSRET))
- ktrsysret(code, error, td->td_retval[0]);
-#endif
- mtx_assert(&sched_lock, MA_NOTOWNED);
- mtx_assert(&Giant, MA_NOTOWNED);
-}
-
-void
-swi_handler(trapframe_t *frame)
-{
- struct thread *td = curthread;
- uint32_t insn;
-
- td->td_frame = frame;
-
- if (td->td_proc->p_flag & P_SA)
- thread_user_enter(td);
- /*
- * Make sure the program counter is correctly aligned so we
- * don't take an alignment fault trying to read the opcode.
- */
- if (__predict_false(((frame->tf_pc - INSN_SIZE) & 3) != 0)) {
- trapsignal(td, SIGILL, 0);
- userret(td, frame, td->td_sticks);
- return;
- }
- insn = *(u_int32_t *)(frame->tf_pc - INSN_SIZE);
- /*
- * Enable interrupts if they were enabled before the exception.
- * Since all syscalls *should* come from user mode it will always
- * be safe to enable them, but check anyway.
- */
- if (td->td_critnest == 0 && !(frame->tf_spsr & I32_bit))
- enable_interrupts(I32_bit);
-
- syscall(td, frame, insn);
-}
-
--- sys/arm/arm/intr.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/* $NetBSD: intr.c,v 1.12 2003/07/15 00:24:41 lukem Exp $ */
-
-/*-
- * Copyright (c) 2004 Olivier Houchard.
- * Copyright (c) 1994-1998 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Soft interrupt and other generic interrupt functions.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/intr.c,v 1.9.2.1 2006/03/10 19:37:31 jhb Exp $");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/syslog.h>
-#include <sys/malloc.h>
-#include <sys/proc.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/conf.h>
-#include <machine/atomic.h>
-#include <machine/intr.h>
-#include <machine/cpu.h>
-
-static struct intr_event *intr_events[NIRQ];
-static int intrcnt_tab[NIRQ];
-static int intrcnt_index = 0;
-static int last_printed = 0;
-
-void arm_handler_execute(void *, int);
-
-void
-arm_setup_irqhandler(const char *name, void (*hand)(void*), void *arg,
- int irq, int flags, void **cookiep)
-{
- struct intr_event *event;
- int error;
-
- if (irq < 0 || irq >= NIRQ)
- return;
- event = intr_events[irq];
- if (event == NULL) {
- error = intr_event_create(&event, (void *)irq, 0,
- (void (*)(void *))arm_unmask_irq, "intr%d:", irq);
- if (error)
- return;
- intr_events[irq] = event;
- last_printed +=
- snprintf(intrnames + last_printed,
- MAXCOMLEN + 1,
- "irq%d: %s", irq, name);
- last_printed++;
- intrcnt_tab[irq] = intrcnt_index;
- intrcnt_index++;
-
- }
- intr_event_add_handler(event, name, hand, arg,
- intr_priority(flags), flags, cookiep);
-}
-
-int
-arm_remove_irqhandler(void *cookie)
-{
- return (intr_event_remove_handler(cookie));
-}
-
-void dosoftints(void);
-void
-dosoftints(void)
-{
-}
-
-void
-arm_handler_execute(void *frame, int irqnb)
-{
- struct intr_event *event;
- struct intr_handler *ih;
- struct thread *td = curthread;
- int i, thread;
-
- td->td_intr_nesting_level++;
- while ((i = arm_get_next_irq()) != -1) {
- arm_mask_irq(i);
- intrcnt[intrcnt_tab[i]]++;
- event = intr_events[i];
- if (!event || TAILQ_EMPTY(&event->ie_handlers))
- continue;
-
- /* Execute fast handlers. */
- thread = 0;
- TAILQ_FOREACH(ih, &event->ie_handlers, ih_next) {
- if (!(ih->ih_flags & IH_FAST))
- thread = 1;
- else
- ih->ih_handler(ih->ih_argument ?
- ih->ih_argument : frame);
- }
-
- /* Schedule thread if needed. */
- if (thread)
- intr_event_schedule_thread(event);
- else
- arm_unmask_irq(i);
- }
- td->td_intr_nesting_level--;
-}
--- sys/arm/arm/elf_machdep.c
+++ /dev/null
@@ -1,224 +0,0 @@
-/*-
- * Copyright 1996-1998 John D. Polstra.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/elf_machdep.c,v 1.5 2004/11/04 18:48:52 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/exec.h>
-#include <sys/imgact.h>
-#include <sys/linker.h>
-#include <sys/sysent.h>
-#include <sys/imgact_elf.h>
-#include <sys/syscall.h>
-#include <sys/signalvar.h>
-#include <sys/vnode.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_param.h>
-
-#include <machine/elf.h>
-#include <machine/md_var.h>
-
-struct sysentvec elf32_freebsd_sysvec = {
- SYS_MAXSYSCALL,
- sysent,
- 0,
- 0,
- NULL,
- 0,
- NULL,
- NULL,
- __elfN(freebsd_fixup),
- sendsig,
- sigcode,
- &szsigcode,
- NULL,
- "FreeBSD ELF32",
- __elfN(coredump),
- NULL,
- MINSIGSTKSZ,
- PAGE_SIZE,
- VM_MIN_ADDRESS,
- VM_MAXUSER_ADDRESS,
- USRSTACK,
- PS_STRINGS,
- VM_PROT_ALL,
- exec_copyout_strings,
- exec_setregs,
- NULL
-};
-
-static Elf32_Brandinfo freebsd_brand_info = {
- ELFOSABI_FREEBSD,
- EM_ARM,
- "FreeBSD",
- NULL,
- "/libexec/ld-elf.so.1",
- &elf32_freebsd_sysvec,
- NULL,
- };
-
-SYSINIT(elf32, SI_SUB_EXEC, SI_ORDER_ANY,
- (sysinit_cfunc_t) elf32_insert_brand_entry,
- &freebsd_brand_info);
-
-static Elf32_Brandinfo freebsd_brand_oinfo = {
- ELFOSABI_FREEBSD,
- EM_ARM,
- "FreeBSD",
- NULL,
- "/usr/libexec/ld-elf.so.1",
- &elf32_freebsd_sysvec,
- NULL,
- };
-
-SYSINIT(oelf32, SI_SUB_EXEC, SI_ORDER_ANY,
- (sysinit_cfunc_t) elf32_insert_brand_entry,
- &freebsd_brand_oinfo);
-
-
-void
-elf32_dump_thread(struct thread *td __unused, void *dst __unused,
- size_t *off __unused)
-{
-}
-
-
-/* Process one elf relocation with addend. */
-static int
-elf_reloc_internal(linker_file_t lf, Elf_Addr relocbase, const void *data,
- int type, int local, elf_lookup_fn lookup)
-{
- Elf_Addr *where;
- Elf_Addr addr;
- Elf_Addr addend;
- Elf_Word rtype, symidx;
- const Elf_Rel *rel;
- const Elf_Rela *rela;
-
- switch (type) {
- case ELF_RELOC_REL:
- rel = (const Elf_Rel *)data;
- where = (Elf_Addr *) (relocbase + rel->r_offset);
- addend = *where;
- rtype = ELF_R_TYPE(rel->r_info);
- symidx = ELF_R_SYM(rel->r_info);
- break;
- case ELF_RELOC_RELA:
- rela = (const Elf_Rela *)data;
- where = (Elf_Addr *) (relocbase + rela->r_offset);
- addend = rela->r_addend;
- rtype = ELF_R_TYPE(rela->r_info);
- symidx = ELF_R_SYM(rela->r_info);
- break;
- default:
- panic("unknown reloc type %d\n", type);
- }
-
- if (local) {
- if (rtype == R_ARM_RELATIVE) { /* A + B */
- addr = relocbase + addend;
- if (*where != addr)
- *where = addr;
- }
- return (0);
- }
-
- switch (rtype) {
-
- case R_ARM_NONE: /* none */
- break;
-
- case R_ARM_ABS32:
- addr = lookup(lf, symidx, 1);
- if (addr == 0)
- return -1;
- if (*where != addr)
- *where = addr;
-
- break;
-
- case R_ARM_COPY: /* none */
- /*
- * There shouldn't be copy relocations in kernel
- * objects.
- */
- printf("kldload: unexpected R_COPY relocation\n");
- return -1;
- break;
-
- case R_ARM_JUMP_SLOT:
- addr = lookup(lf, symidx, 1);
- if (addr) {
- *where = addr;
- return (0);
- }
- return (-1);
- case R_ARM_RELATIVE:
- break;
-
- default:
- printf("kldload: unexpected relocation type %d\n",
- rtype);
- return -1;
- }
- return(0);
-}
-
-int
-elf_reloc(linker_file_t lf, Elf_Addr relocbase, const void *data, int type,
- elf_lookup_fn lookup)
-{
-
- return (elf_reloc_internal(lf, relocbase, data, type, 0, lookup));
-}
-
-int
-elf_reloc_local(linker_file_t lf, Elf_Addr relocbase, const void *data,
- int type, elf_lookup_fn lookup)
-{
-
- return (elf_reloc_internal(lf, relocbase, data, type, 1, lookup));
-}
-
-int
-elf_cpu_load_file(linker_file_t lf __unused)
-{
-
- cpu_idcache_wbinv_all();
- cpu_tlb_flushID();
- return (0);
-}
-
-int
-elf_cpu_unload_file(linker_file_t lf __unused)
-{
-
- return (0);
-}
--- sys/arm/arm/autoconf.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)autoconf.c 7.1 (Berkeley) 5/9/91
- * from: FreeBSD: src/sys/i386/i386/autoconf.c,v 1.156
- */
-
-/*
- * Setup the system to run on the current machine.
- *
- * Configure() is called at boot time and initializes the vba
- * device tables and the memory controller monitoring. Available
- * devices are determined (from possibilities mentioned in ioconf.c),
- * and the drivers are initialized.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/autoconf.c,v 1.3 2005/05/29 23:44:22 marcel Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/disklabel.h>
-#include <sys/reboot.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/mount.h>
-#include <sys/cons.h>
-
-static void configure_first (void *);
-static void configure (void *);
-static void configure_final (void *);
-
-SYSINIT(configure1, SI_SUB_CONFIGURE, SI_ORDER_FIRST, configure_first, NULL);
-/* SI_ORDER_SECOND is hookable */
-SYSINIT(configure2, SI_SUB_CONFIGURE, SI_ORDER_THIRD, configure, NULL);
-/* SI_ORDER_MIDDLE is hookable */
-SYSINIT(configure3, SI_SUB_CONFIGURE, SI_ORDER_ANY, configure_final, NULL);
-
-device_t nexus_dev;
-
-
-/*
- * Determine i/o configuration for a machine.
- */
-static void
-configure_first(void *dummy)
-{
-
- device_add_child(root_bus, "nexus", 0);
-}
-
-static void
-configure(void *dummy)
-{
-
- root_bus_configure();
-}
-
-static void
-configure_final(void *dummy)
-{
-
- cninit_finish();
- cold = 0;
-}
--- sys/arm/arm/bcopy_page.S
+++ /dev/null
@@ -1,273 +0,0 @@
-/* $NetBSD: bcopy_page.S,v 1.7 2003/10/13 21:03:13 scw Exp $ */
-
-/*-
- * Copyright (c) 1995 Scott Stevens
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Scott Stevens.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * bcopy_page.S
- *
- * page optimised bcopy and bzero routines
- *
- * Created : 08/04/95
- */
-
-#include <machine/asm.h>
-#include <machine/param.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/bcopy_page.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-#ifndef __XSCALE__
-
-/* #define BIG_LOOPS */
-
-/*
- * bcopy_page(src, dest)
- *
- * Optimised copy page routine.
- *
- * On entry:
- * r0 - src address
- * r1 - dest address
- *
- * Requires:
- * number of bytes per page (PAGE_SIZE) is a multiple of 512 (BIG_LOOPS), 128
- * otherwise.
- */
-
-#define CHUNK_SIZE 32
-
-#define PREFETCH_FIRST_CHUNK /* nothing */
-#define PREFETCH_NEXT_CHUNK /* nothing */
-
-#ifndef COPY_CHUNK
-#define COPY_CHUNK \
- PREFETCH_NEXT_CHUNK ; \
- ldmia r0!, {r3-r8,ip,lr} ; \
- stmia r1!, {r3-r8,ip,lr}
-#endif /* ! COPY_CHUNK */
-
-#ifndef SAVE_REGS
-#define SAVE_REGS stmfd sp!, {r4-r8, lr}
-#define RESTORE_REGS ldmfd sp!, {r4-r8, pc}
-#endif
-
-ENTRY(bcopy_page)
- PREFETCH_FIRST_CHUNK
- SAVE_REGS
-#ifdef BIG_LOOPS
- mov r2, #(PAGE_SIZE >> 9)
-#else
- mov r2, #(PAGE_SIZE >> 7)
-#endif
-
-1:
- COPY_CHUNK
- COPY_CHUNK
- COPY_CHUNK
- COPY_CHUNK
-
-#ifdef BIG_LOOPS
- /* There is little point making the loop any larger; unless we are
- running with the cache off, the load/store overheads will
- completely dominate this loop. */
- COPY_CHUNK
- COPY_CHUNK
- COPY_CHUNK
- COPY_CHUNK
-
- COPY_CHUNK
- COPY_CHUNK
- COPY_CHUNK
- COPY_CHUNK
-
- COPY_CHUNK
- COPY_CHUNK
- COPY_CHUNK
- COPY_CHUNK
-#endif
- subs r2, r2, #1
- bne 1b
-
- RESTORE_REGS /* ...and return. */
-
-/*
- * bzero_page(dest)
- *
- * Optimised zero page routine.
- *
- * On entry:
- * r0 - dest address
- *
- * Requires:
- * number of bytes per page (PAGE_SIZE) is a multiple of 512 (BIG_LOOPS), 128
- * otherwise
- */
-
-ENTRY(bzero_page)
- stmfd sp!, {r4-r8, lr}
-#ifdef BIG_LOOPS
- mov r2, #(PAGE_SIZE >> 9)
-#else
- mov r2, #(PAGE_SIZE >> 7)
-#endif
- mov r3, #0
- mov r4, #0
- mov r5, #0
- mov r6, #0
- mov r7, #0
- mov r8, #0
- mov ip, #0
- mov lr, #0
-
-1:
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
-
-#ifdef BIG_LOOPS
- /* There is little point making the loop any larger; unless we are
- running with the cache off, the load/store overheads will
- completely dominate this loop. */
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
-
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
-
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
- stmia r0!, {r3-r8,ip,lr}
-
-#endif
-
- subs r2, r2, #1
- bne 1b
-
- ldmfd sp!, {r4-r8, pc}
-
-#else /* __XSCALE__ */
-
-/*
- * XSCALE version of bcopy_page
- */
-ENTRY(bcopy_page)
- pld [r0]
- stmfd sp!, {r4, r5}
- mov ip, #32
- ldr r2, [r0], #0x04 /* 0x00 */
- ldr r3, [r0], #0x04 /* 0x04 */
-1: pld [r0, #0x18] /* Prefetch 0x20 */
- ldr r4, [r0], #0x04 /* 0x08 */
- ldr r5, [r0], #0x04 /* 0x0c */
- strd r2, [r1], #0x08
- ldr r2, [r0], #0x04 /* 0x10 */
- ldr r3, [r0], #0x04 /* 0x14 */
- strd r4, [r1], #0x08
- ldr r4, [r0], #0x04 /* 0x18 */
- ldr r5, [r0], #0x04 /* 0x1c */
- strd r2, [r1], #0x08
- ldr r2, [r0], #0x04 /* 0x20 */
- ldr r3, [r0], #0x04 /* 0x24 */
- pld [r0, #0x18] /* Prefetch 0x40 */
- strd r4, [r1], #0x08
- ldr r4, [r0], #0x04 /* 0x28 */
- ldr r5, [r0], #0x04 /* 0x2c */
- strd r2, [r1], #0x08
- ldr r2, [r0], #0x04 /* 0x30 */
- ldr r3, [r0], #0x04 /* 0x34 */
- strd r4, [r1], #0x08
- ldr r4, [r0], #0x04 /* 0x38 */
- ldr r5, [r0], #0x04 /* 0x3c */
- strd r2, [r1], #0x08
- ldr r2, [r0], #0x04 /* 0x40 */
- ldr r3, [r0], #0x04 /* 0x44 */
- pld [r0, #0x18] /* Prefetch 0x60 */
- strd r4, [r1], #0x08
- ldr r4, [r0], #0x04 /* 0x48 */
- ldr r5, [r0], #0x04 /* 0x4c */
- strd r2, [r1], #0x08
- ldr r2, [r0], #0x04 /* 0x50 */
- ldr r3, [r0], #0x04 /* 0x54 */
- strd r4, [r1], #0x08
- ldr r4, [r0], #0x04 /* 0x58 */
- ldr r5, [r0], #0x04 /* 0x5c */
- strd r2, [r1], #0x08
- ldr r2, [r0], #0x04 /* 0x60 */
- ldr r3, [r0], #0x04 /* 0x64 */
- pld [r0, #0x18] /* Prefetch 0x80 */
- strd r4, [r1], #0x08
- ldr r4, [r0], #0x04 /* 0x68 */
- ldr r5, [r0], #0x04 /* 0x6c */
- strd r2, [r1], #0x08
- ldr r2, [r0], #0x04 /* 0x70 */
- ldr r3, [r0], #0x04 /* 0x74 */
- strd r4, [r1], #0x08
- ldr r4, [r0], #0x04 /* 0x78 */
- ldr r5, [r0], #0x04 /* 0x7c */
- strd r2, [r1], #0x08
- subs ip, ip, #0x01
- ldrgt r2, [r0], #0x04 /* 0x80 */
- ldrgt r3, [r0], #0x04 /* 0x84 */
- strd r4, [r1], #0x08
- bgt 1b
- ldmfd sp!, {r4, r5}
- RET
-
-/*
- * XSCALE version of bzero_page
- */
-ENTRY(bzero_page)
- mov r1, #PAGE_SIZE
- mov r2, #0
- mov r3, #0
-1: strd r2, [r0], #8 /* 32 */
- strd r2, [r0], #8
- strd r2, [r0], #8
- strd r2, [r0], #8
- strd r2, [r0], #8 /* 64 */
- strd r2, [r0], #8
- strd r2, [r0], #8
- strd r2, [r0], #8
- strd r2, [r0], #8 /* 96 */
- strd r2, [r0], #8
- strd r2, [r0], #8
- strd r2, [r0], #8
- strd r2, [r0], #8 /* 128 */
- strd r2, [r0], #8
- strd r2, [r0], #8
- strd r2, [r0], #8
- subs r1, r1, #128
- bne 1b
- RET
-#endif /* __XSCALE__ */
--- sys/arm/arm/mem.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*-
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department, and code derived from software contributed to
- * Berkeley by William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: Utah $Hdr: mem.c 1.13 89/10/08$
- * from: @(#)mem.c 7.2 (Berkeley) 5/9/91
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/mem.c,v 1.1 2004/11/07 23:01:36 cognet Exp $");
-
-/*
- * Memory special file
- */
-
-#include <sys/param.h>
-#include <sys/conf.h>
-#include <sys/fcntl.h>
-#include <sys/ioccom.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/memrange.h>
-#include <sys/module.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/signalvar.h>
-#include <sys/systm.h>
-#include <sys/uio.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-
-#include <machine/memdev.h>
-
-/*
- * Used in /dev/mem drivers and elsewhere
- */
-MALLOC_DEFINE(M_MEMDESC, "memdesc", "memory range descriptors");
-
-/* ARGSUSED */
-int
-memrw(struct cdev *dev, struct uio *uio, int flags)
-{
- int o;
- u_int c = 0, v;
- struct iovec *iov;
- int error = 0;
- vm_offset_t addr, eaddr;
-
- GIANT_REQUIRED;
-
- while (uio->uio_resid > 0 && error == 0) {
- iov = uio->uio_iov;
- if (iov->iov_len == 0) {
- uio->uio_iov++;
- uio->uio_iovcnt--;
- if (uio->uio_iovcnt < 0)
- panic("memrw");
- continue;
- }
- if (minor(dev) == CDEV_MINOR_MEM) {
- v = uio->uio_offset;
- v &= ~PAGE_MASK;
- pmap_kenter((vm_offset_t)_tmppt, v);
- o = (int)uio->uio_offset & PAGE_MASK;
- c = (u_int)(PAGE_SIZE - ((int)iov->iov_base & PAGE_MASK));
- c = min(c, (u_int)(PAGE_SIZE - o));
- c = min(c, (u_int)iov->iov_len);
- error = uiomove((caddr_t)&_tmppt[o], (int)c, uio);
- pmap_qremove((vm_offset_t)_tmppt, 1);
- continue;
- }
- else if (minor(dev) == CDEV_MINOR_KMEM) {
- c = iov->iov_len;
-
- /*
- * Make sure that all of the pages are currently
- * resident so that we don't create any zero-fill
- * pages.
- */
- addr = trunc_page(uio->uio_offset);
- eaddr = round_page(uio->uio_offset + c);
-
- for (; addr < eaddr; addr += PAGE_SIZE)
- if (pmap_extract(kernel_pmap, addr) == 0)
- return (EFAULT);
-
- if (!kernacc((caddr_t)(int)uio->uio_offset, c,
- uio->uio_rw == UIO_READ ?
- VM_PROT_READ : VM_PROT_WRITE))
- return (EFAULT);
- error = uiomove((caddr_t)(int)uio->uio_offset, (int)c, uio);
- continue;
- }
- /* else panic! */
- }
- return (error);
-}
-
-/*
- * allow user processes to MMAP some memory sections
- * instead of going through read/write
- */
-/* ARGSUSED */
-
-int
-memmmap(struct cdev *dev, vm_offset_t offset, vm_paddr_t *paddr,
- int prot __unused)
-{
- if (minor(dev) == CDEV_MINOR_MEM)
- *paddr = offset;
- else if (minor(dev) == CDEV_MINOR_KMEM)
- *paddr = vtophys(offset);
- /* else panic! */
- return (0);
-}
-
-void
-dev_mem_md_init(void)
-{
-}
--- sys/arm/arm/bootconfig.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/* $NetBSD: bootconfig.c,v 1.2 2002/03/10 19:56:39 lukem Exp $ */
-
-/*-
- * Copyright (c) 1994-1998 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/bootconfig.c,v 1.2 2005/01/05 21:58:47 imp Exp $");
-
-#include <sys/param.h>
-
-#include <sys/systm.h>
-
-#include <machine/bootconfig.h>
-
-
-/*
- * Function to identify and process different types of boot argument
- */
-
-int
-get_bootconf_option(opts, opt, type, result)
- char *opts;
- char *opt;
- int type;
- void *result;
-{
- char *ptr;
- char *optstart;
- int not;
-
- ptr = opts;
-
- while (*ptr) {
- /* Find start of option */
- while (*ptr == ' ' || *ptr == '\t')
- ++ptr;
-
- if (*ptr == 0)
- break;
-
- not = 0;
-
- /* Is it a negate option */
- if ((type & BOOTOPT_TYPE_MASK) == BOOTOPT_TYPE_BOOLEAN && *ptr == '!') {
- not = 1;
- ++ptr;
- }
-
- /* Find the end of option */
- optstart = ptr;
- while (*ptr != 0 && *ptr != ' ' && *ptr != '\t' && *ptr != '=')
- ++ptr;
-
- if ((*ptr == '=')
- || (*ptr != '=' && ((type & BOOTOPT_TYPE_MASK) == BOOTOPT_TYPE_BOOLEAN))) {
- /* compare the option */
- if (strncmp(optstart, opt, (ptr - optstart)) == 0) {
- /* found */
-
- if (*ptr == '=')
- ++ptr;
-
- switch(type & BOOTOPT_TYPE_MASK) {
- case BOOTOPT_TYPE_BOOLEAN :
- if (*(ptr - 1) == '=')
- *((int *)result) = ((u_int)strtoul(ptr, NULL, 10) != 0);
- else
- *((int *)result) = !not;
- break;
- case BOOTOPT_TYPE_STRING :
- *((char **)result) = ptr;
- break;
- case BOOTOPT_TYPE_INT :
- *((int *)result) = (u_int)strtoul(ptr, NULL, 10);
- break;
- case BOOTOPT_TYPE_BININT :
- *((int *)result) = (u_int)strtoul(ptr, NULL, 2);
- break;
- case BOOTOPT_TYPE_HEXINT :
- *((int *)result) = (u_int)strtoul(ptr, NULL, 16);
- break;
- default:
- return(0);
- }
- return(1);
- }
- }
- /* skip to next option */
- while (*ptr != ' ' && *ptr != '\t' && *ptr != 0)
- ++ptr;
- }
- return(0);
-}
--- sys/arm/arm/busdma_machdep.c
+++ /dev/null
@@ -1,840 +0,0 @@
-/*-
- * Copyright (c) 2004 Olivier Houchard
- * Copyright (c) 2002 Peter Grehan
- * Copyright (c) 1997, 1998 Justin T. Gibbs.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/busdma_machdep.c,v 1.22.2.1 2006/02/27 01:11:43 cognet Exp $");
-
-/*
- * MacPPC bus dma support routines
- */
-
-#define _ARM32_BUS_DMA_PRIVATE
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/lock.h>
-#include <sys/proc.h>
-#include <sys/mutex.h>
-#include <sys/mbuf.h>
-#include <sys/uio.h>
-#include <sys/ktr.h>
-#include <sys/kernel.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-
-#include <machine/atomic.h>
-#include <machine/bus.h>
-#include <machine/cpufunc.h>
-
-struct bus_dma_tag {
- bus_dma_tag_t parent;
- bus_size_t alignment;
- bus_size_t boundary;
- bus_addr_t lowaddr;
- bus_addr_t highaddr;
- bus_dma_filter_t *filter;
- void *filterarg;
- bus_size_t maxsize;
- u_int nsegments;
- bus_size_t maxsegsz;
- int flags;
- int ref_count;
- int map_count;
- bus_dma_lock_t *lockfunc;
- void *lockfuncarg;
- /*
- * DMA range for this tag. If the page doesn't fall within
- * one of these ranges, an error is returned. The caller
- * may then decide what to do with the transfer. If the
- * range pointer is NULL, it is ignored.
- */
- struct arm32_dma_range *ranges;
- int _nranges;
-};
-
-#define DMAMAP_LINEAR 0x1
-#define DMAMAP_MBUF 0x2
-#define DMAMAP_UIO 0x4
-#define DMAMAP_ALLOCATED 0x10
-#define DMAMAP_TYPE_MASK (DMAMAP_LINEAR|DMAMAP_MBUF|DMAMAP_UIO)
-#define DMAMAP_COHERENT 0x8
-struct bus_dmamap {
- bus_dma_tag_t dmat;
- int flags;
- void *buffer;
- TAILQ_ENTRY(bus_dmamap) freelist;
- int len;
-};
-
-static TAILQ_HEAD(,bus_dmamap) dmamap_freelist =
- TAILQ_HEAD_INITIALIZER(dmamap_freelist);
-
-#define BUSDMA_STATIC_MAPS 500
-static struct bus_dmamap map_pool[BUSDMA_STATIC_MAPS];
-
-static struct mtx busdma_mtx;
-
-MTX_SYSINIT(busdma_mtx, &busdma_mtx, "busdma lock", MTX_DEF);
-
-static void
-arm_dmamap_freelist_init(void *dummy)
-{
- int i;
-
- for (i = 0; i < BUSDMA_STATIC_MAPS; i++)
- TAILQ_INSERT_HEAD(&dmamap_freelist, &map_pool[i], freelist);
-}
-
-SYSINIT(busdma, SI_SUB_VM, SI_ORDER_ANY, arm_dmamap_freelist_init, NULL);
-
-/*
- * Check to see if the specified page is in an allowed DMA range.
- */
-
-static __inline int
-bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
- bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
- int flags, vm_offset_t *lastaddrp, int *segp);
-
-static __inline struct arm32_dma_range *
-_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
- bus_addr_t curaddr)
-{
- struct arm32_dma_range *dr;
- int i;
-
- for (i = 0, dr = ranges; i < nranges; i++, dr++) {
- if (curaddr >= dr->dr_sysbase &&
- round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
- return (dr);
- }
-
- return (NULL);
-}
-/*
- * Convenience function for manipulating driver locks from busdma (during
- * busdma_swi, for example). Drivers that don't provide their own locks
- * should specify &Giant to dmat->lockfuncarg. Drivers that use their own
- * non-mutex locking scheme don't have to use this at all.
- */
-void
-busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
-{
- struct mtx *dmtx;
-
- dmtx = (struct mtx *)arg;
- switch (op) {
- case BUS_DMA_LOCK:
- mtx_lock(dmtx);
- break;
- case BUS_DMA_UNLOCK:
- mtx_unlock(dmtx);
- break;
- default:
- panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
- }
-}
-
-/*
- * dflt_lock should never get called. It gets put into the dma tag when
- * lockfunc == NULL, which is only valid if the maps that are associated
- * with the tag are meant to never be defered.
- * XXX Should have a way to identify which driver is responsible here.
- */
-static void
-dflt_lock(void *arg, bus_dma_lock_op_t op)
-{
-#ifdef INVARIANTS
- panic("driver error: busdma dflt_lock called");
-#else
- printf("DRIVER_ERROR: busdma dflt_lock called\n");
-#endif
-}
-
-static __inline bus_dmamap_t
-_busdma_alloc_dmamap(void)
-{
- bus_dmamap_t map;
-
- mtx_lock(&busdma_mtx);
- map = TAILQ_FIRST(&dmamap_freelist);
- if (map)
- TAILQ_REMOVE(&dmamap_freelist, map, freelist);
- mtx_unlock(&busdma_mtx);
- if (!map) {
- map = malloc(sizeof(*map), M_DEVBUF, M_NOWAIT);
- if (map)
- map->flags = DMAMAP_ALLOCATED;
- } else
- map->flags = 0;
- return (map);
-}
-
-static __inline void
-_busdma_free_dmamap(bus_dmamap_t map)
-{
- if (map->flags & DMAMAP_ALLOCATED)
- free(map, M_DEVBUF);
- else {
- mtx_lock(&busdma_mtx);
- TAILQ_INSERT_HEAD(&dmamap_freelist, map, freelist);
- mtx_unlock(&busdma_mtx);
- }
-}
-
-/*
- * Allocate a device specific dma_tag.
- */
-#define SEG_NB 1024
-
-int
-bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
- bus_size_t boundary, bus_addr_t lowaddr,
- bus_addr_t highaddr, bus_dma_filter_t *filter,
- void *filterarg, bus_size_t maxsize, int nsegments,
- bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
- void *lockfuncarg, bus_dma_tag_t *dmat)
-{
- bus_dma_tag_t newtag;
- int error = 0;
- /* Return a NULL tag on failure */
- *dmat = NULL;
-
- newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
- if (newtag == NULL) {
- CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
- __func__, newtag, 0, error);
- return (ENOMEM);
- }
-
- newtag->parent = parent;
- newtag->alignment = alignment;
- newtag->boundary = boundary;
- newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
- newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
- newtag->filter = filter;
- newtag->filterarg = filterarg;
- newtag->maxsize = maxsize;
- newtag->nsegments = nsegments;
- newtag->maxsegsz = maxsegsz;
- newtag->flags = flags;
- newtag->ref_count = 1; /* Count ourself */
- newtag->map_count = 0;
- newtag->ranges = bus_dma_get_range();
- newtag->_nranges = bus_dma_get_range_nb();
- if (lockfunc != NULL) {
- newtag->lockfunc = lockfunc;
- newtag->lockfuncarg = lockfuncarg;
- } else {
- newtag->lockfunc = dflt_lock;
- newtag->lockfuncarg = NULL;
- }
- /*
- * Take into account any restrictions imposed by our parent tag
- */
- if (parent != NULL) {
- newtag->lowaddr = min(parent->lowaddr, newtag->lowaddr);
- newtag->highaddr = max(parent->highaddr, newtag->highaddr);
- if (newtag->boundary == 0)
- newtag->boundary = parent->boundary;
- else if (parent->boundary != 0)
- newtag->boundary = min(parent->boundary,
- newtag->boundary);
- if (newtag->filter == NULL) {
- /*
- * Short circuit looking at our parent directly
- * since we have encapsulated all of its information
- */
- newtag->filter = parent->filter;
- newtag->filterarg = parent->filterarg;
- newtag->parent = parent->parent;
- }
- if (newtag->parent != NULL)
- atomic_add_int(&parent->ref_count, 1);
- }
-
- *dmat = newtag;
- CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
- __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
-
- return (error);
-}
-
-int
-bus_dma_tag_destroy(bus_dma_tag_t dmat)
-{
-#ifdef KTR
- bus_dma_tag_t dmat_copy = dmat;
-#endif
-
- if (dmat != NULL) {
-
- if (dmat->map_count != 0)
- return (EBUSY);
-
- while (dmat != NULL) {
- bus_dma_tag_t parent;
-
- parent = dmat->parent;
- atomic_subtract_int(&dmat->ref_count, 1);
- if (dmat->ref_count == 0) {
- free(dmat, M_DEVBUF);
- /*
- * Last reference count, so
- * release our reference
- * count on our parent.
- */
- dmat = parent;
- } else
- dmat = NULL;
- }
- }
- CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
-
- return (0);
-}
-
-/*
- * Allocate a handle for mapping from kva/uva/physical
- * address space into bus device space.
- */
-int
-bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
-{
- bus_dmamap_t newmap;
-#ifdef KTR
- int error = 0;
-#endif
-
- newmap = _busdma_alloc_dmamap();
- if (newmap == NULL) {
- CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
- return (ENOMEM);
- }
- *mapp = newmap;
- newmap->dmat = dmat;
- dmat->map_count++;
-
- CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
- __func__, dmat, dmat->flags, error);
-
- return (0);
-}
-
-/*
- * Destroy a handle for mapping from kva/uva/physical
- * address space into bus device space.
- */
-int
-bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
-{
-
- _busdma_free_dmamap(map);
- dmat->map_count--;
- CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
- return (0);
-}
-
-/*
- * Allocate a piece of memory that can be efficiently mapped into
- * bus device space based on the constraints lited in the dma tag.
- * A dmamap to for use with dmamap_load is also allocated.
- */
-int
-bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
- bus_dmamap_t *mapp)
-{
- bus_dmamap_t newmap = NULL;
-
- int mflags;
-
- if (flags & BUS_DMA_NOWAIT)
- mflags = M_NOWAIT;
- else
- mflags = M_WAITOK;
- if (flags & BUS_DMA_ZERO)
- mflags |= M_ZERO;
-
- newmap = _busdma_alloc_dmamap();
- if (newmap == NULL) {
- CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
- __func__, dmat, dmat->flags, ENOMEM);
- return (ENOMEM);
- }
- dmat->map_count++;
- *mapp = newmap;
- newmap->dmat = dmat;
-
- if (dmat->maxsize <= PAGE_SIZE) {
- *vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags);
- } else {
- /*
- * XXX Use Contigmalloc until it is merged into this facility
- * and handles multi-seg allocations. Nobody is doing
- * multi-seg allocations yet though.
- */
- *vaddr = contigmalloc(dmat->maxsize, M_DEVBUF, mflags,
- 0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul,
- dmat->boundary);
- }
- if (*vaddr == NULL) {
- if (newmap != NULL) {
- _busdma_free_dmamap(newmap);
- dmat->map_count--;
- }
- *mapp = NULL;
- return (ENOMEM);
- }
- return (0);
-}
-
-/*
- * Free a piece of memory and it's allocated dmamap, that was allocated
- * via bus_dmamem_alloc. Make the same choice for free/contigfree.
- */
-void
-bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
-{
- if (dmat->maxsize <= PAGE_SIZE)
- free(vaddr, M_DEVBUF);
- else {
- contigfree(vaddr, dmat->maxsize, M_DEVBUF);
- }
- dmat->map_count--;
- _busdma_free_dmamap(map);
- CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
-}
-
-/*
- * Utility function to load a linear buffer. lastaddrp holds state
- * between invocations (for multiple-buffer loads). segp contains
- * the starting segment on entrance, and the ending segment on exit.
- * first indicates if this is the first invocation of this function.
- */
-static __inline int
-bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
- bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
- int flags, vm_offset_t *lastaddrp, int *segp)
-{
- bus_size_t sgsize;
- bus_addr_t curaddr, lastaddr, baddr, bmask;
- vm_offset_t vaddr = (vm_offset_t)buf;
- int seg;
- int error = 0;
- pd_entry_t *pde;
- pt_entry_t pte;
- pt_entry_t *ptep;
-
- lastaddr = *lastaddrp;
- bmask = ~(dmat->boundary - 1);
-
- CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
- "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
-
- for (seg = *segp; buflen > 0 ; ) {
- /*
- * Get the physical address for this segment.
- *
- * XXX Don't support checking for coherent mappings
- * XXX in user address space.
- */
- if (__predict_true(pmap == pmap_kernel())) {
- (void) pmap_get_pde_pte(pmap, vaddr, &pde, &ptep);
- if (__predict_false(pmap_pde_section(pde))) {
- curaddr = (*pde & L1_S_FRAME) |
- (vaddr & L1_S_OFFSET);
- if (*pde & L1_S_CACHE_MASK) {
- map->flags &=
- ~DMAMAP_COHERENT;
- }
- } else {
- pte = *ptep;
- KASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV,
- ("INV type"));
- if (__predict_false((pte & L2_TYPE_MASK)
- == L2_TYPE_L)) {
- curaddr = (pte & L2_L_FRAME) |
- (vaddr & L2_L_OFFSET);
- if (pte & L2_L_CACHE_MASK) {
- map->flags &=
- ~DMAMAP_COHERENT;
-
- }
- } else {
- curaddr = (pte & L2_S_FRAME) |
- (vaddr & L2_S_OFFSET);
- if (pte & L2_S_CACHE_MASK) {
- map->flags &=
- ~DMAMAP_COHERENT;
- }
- }
- }
- } else {
- curaddr = pmap_extract(pmap, vaddr);
- map->flags &= ~DMAMAP_COHERENT;
- }
-
- if (dmat->ranges) {
- struct arm32_dma_range *dr;
-
- dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
- curaddr);
- if (dr == NULL)
- return (EINVAL);
- /*
- * In a valid DMA range. Translate the physical
- * memory address to an address in the DMA window.
- */
- curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
-
- }
- /*
- * Compute the segment size, and adjust counts.
- */
- sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
- if (buflen < sgsize)
- sgsize = buflen;
-
- /*
- * Make sure we don't cross any boundaries.
- */
- if (dmat->boundary > 0) {
- baddr = (curaddr + dmat->boundary) & bmask;
- if (sgsize > (baddr - curaddr))
- sgsize = (baddr - curaddr);
- }
-
- /*
- * Insert chunk into a segment, coalescing with
- * the previous segment if possible.
- */
- if (seg >= 0 && curaddr == lastaddr &&
- (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
- (dmat->boundary == 0 ||
- (segs[seg].ds_addr & bmask) ==
- (curaddr & bmask))) {
- segs[seg].ds_len += sgsize;
- goto segdone;
- } else {
- if (++seg >= dmat->nsegments)
- break;
- segs[seg].ds_addr = curaddr;
- segs[seg].ds_len = sgsize;
- }
- if (error)
- break;
-segdone:
- lastaddr = curaddr + sgsize;
- vaddr += sgsize;
- buflen -= sgsize;
- }
-
- *segp = seg;
- *lastaddrp = lastaddr;
-
- /*
- * Did we fit?
- */
- if (buflen != 0)
- error = EFBIG; /* XXX better return value here? */
- return (error);
-}
-
-/*
- * Map the buffer buf into bus space using the dmamap map.
- */
-int
-bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
- bus_size_t buflen, bus_dmamap_callback_t *callback,
- void *callback_arg, int flags)
-{
- vm_offset_t lastaddr = 0;
- int error, nsegs = -1;
-#ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
- bus_dma_segment_t dm_segments[dmat->nsegments];
-#else
- bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
-#endif
-
- KASSERT(dmat != NULL, ("dmatag is NULL"));
- KASSERT(map != NULL, ("dmamap is NULL"));
- map->flags &= ~DMAMAP_TYPE_MASK;
- map->flags |= DMAMAP_LINEAR|DMAMAP_COHERENT;
- map->buffer = buf;
- map->len = buflen;
- error = bus_dmamap_load_buffer(dmat,
- dm_segments, map, buf, buflen, kernel_pmap,
- flags, &lastaddr, &nsegs);
- if (error)
- (*callback)(callback_arg, NULL, 0, error);
- else
- (*callback)(callback_arg, dm_segments, nsegs + 1, error);
-
- CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
- __func__, dmat, dmat->flags, nsegs + 1, error);
-
- return (0);
-}
-
-/*
- * Like bus_dmamap_load(), but for mbufs.
- */
-int
-bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, struct mbuf *m0,
- bus_dmamap_callback2_t *callback, void *callback_arg,
- int flags)
-{
-#ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
- bus_dma_segment_t dm_segments[dmat->nsegments];
-#else
- bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
-#endif
- int nsegs = -1, error = 0;
-
- M_ASSERTPKTHDR(m0);
-
- map->flags &= ~DMAMAP_TYPE_MASK;
- map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
- map->buffer = m0;
- map->len = 0;
- if (m0->m_pkthdr.len <= dmat->maxsize) {
- vm_offset_t lastaddr = 0;
- struct mbuf *m;
-
- for (m = m0; m != NULL && error == 0; m = m->m_next) {
- if (m->m_len > 0) {
- error = bus_dmamap_load_buffer(dmat,
- dm_segments, map, m->m_data, m->m_len,
- pmap_kernel(), flags, &lastaddr, &nsegs);
- map->len += m->m_len;
- }
- }
- } else {
- error = EINVAL;
- }
-
- if (error) {
- /*
- * force "no valid mappings" on error in callback.
- */
- (*callback)(callback_arg, dm_segments, 0, 0, error);
- } else {
- (*callback)(callback_arg, dm_segments, nsegs + 1,
- m0->m_pkthdr.len, error);
- }
- CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
- __func__, dmat, dmat->flags, error, nsegs + 1);
-
- return (error);
-}
-
-int
-bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map,
- struct mbuf *m0, bus_dma_segment_t *segs, int *nsegs,
- int flags)
-{
- int error = 0;
- M_ASSERTPKTHDR(m0);
-
- flags |= BUS_DMA_NOWAIT;
- *nsegs = -1;
- map->flags &= ~DMAMAP_TYPE_MASK;
- map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
- map->buffer = m0;
- map->len = 0;
- if (m0->m_pkthdr.len <= dmat->maxsize) {
- vm_offset_t lastaddr = 0;
- struct mbuf *m;
-
- for (m = m0; m != NULL && error == 0; m = m->m_next) {
- if (m->m_len > 0) {
- error = bus_dmamap_load_buffer(dmat, segs, map,
- m->m_data, m->m_len,
- pmap_kernel(), flags, &lastaddr,
- nsegs);
- map->len += m->m_len;
- }
- }
- } else {
- error = EINVAL;
- }
-
- /* XXX FIXME: Having to increment nsegs is really annoying */
- ++*nsegs;
- CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
- __func__, dmat, dmat->flags, error, *nsegs);
- return (error);
-}
-
-/*
- * Like bus_dmamap_load(), but for uios.
- */
-int
-bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, struct uio *uio,
- bus_dmamap_callback2_t *callback, void *callback_arg,
- int flags)
-{
- vm_offset_t lastaddr;
-#ifdef __CC_SUPPORTS_DYNAMIC_ARRAY_INIT
- bus_dma_segment_t dm_segments[dmat->nsegments];
-#else
- bus_dma_segment_t dm_segments[BUS_DMAMAP_NSEGS];
-#endif
- int nsegs, i, error;
- bus_size_t resid;
- struct iovec *iov;
- struct pmap *pmap;
-
- resid = uio->uio_resid;
- iov = uio->uio_iov;
- map->flags &= ~DMAMAP_TYPE_MASK;
- map->flags |= DMAMAP_UIO|DMAMAP_COHERENT;
- map->buffer = uio;
- map->len = 0;
-
- if (uio->uio_segflg == UIO_USERSPACE) {
- KASSERT(uio->uio_td != NULL,
- ("bus_dmamap_load_uio: USERSPACE but no proc"));
- pmap = vmspace_pmap(uio->uio_td->td_proc->p_vmspace);
- } else
- pmap = kernel_pmap;
-
- error = 0;
- nsegs = -1;
- for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) {
- /*
- * Now at the first iovec to load. Load each iovec
- * until we have exhausted the residual count.
- */
- bus_size_t minlen =
- resid < iov[i].iov_len ? resid : iov[i].iov_len;
- caddr_t addr = (caddr_t) iov[i].iov_base;
-
- if (minlen > 0) {
- error = bus_dmamap_load_buffer(dmat, dm_segments, map,
- addr, minlen, pmap, flags, &lastaddr, &nsegs);
-
- map->len += minlen;
- resid -= minlen;
- }
- }
-
- if (error) {
- /*
- * force "no valid mappings" on error in callback.
- */
- (*callback)(callback_arg, dm_segments, 0, 0, error);
- } else {
- (*callback)(callback_arg, dm_segments, nsegs+1,
- uio->uio_resid, error);
- }
-
- CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
- __func__, dmat, dmat->flags, error, nsegs + 1);
- return (error);
-}
-
-/*
- * Release the mapping held by map.
- */
-void
-_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
-{
- map->flags &= ~DMAMAP_TYPE_MASK;
- return;
-}
-
-static __inline void
-bus_dmamap_sync_buf(void *buf, int len, bus_dmasync_op_t op)
-{
-
- if (op & BUS_DMASYNC_PREWRITE)
- cpu_dcache_wb_range((vm_offset_t)buf, len);
- if (op & BUS_DMASYNC_POSTREAD) {
- if ((((vm_offset_t)buf | len) & arm_dcache_align_mask) == 0)
- cpu_dcache_inv_range((vm_offset_t)buf, len);
- else
- cpu_dcache_wbinv_range((vm_offset_t)buf, len);
-
- }
-}
-
-void
-_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
-{
- struct mbuf *m;
- struct uio *uio;
- int resid;
- struct iovec *iov;
-
- if (!(op & (BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTREAD)))
- return;
- if (map->flags & DMAMAP_COHERENT)
- return;
- if ((op && BUS_DMASYNC_POSTREAD) && (map->len > PAGE_SIZE)) {
- cpu_dcache_wbinv_all();
- return;
- }
- CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
- switch(map->flags & DMAMAP_TYPE_MASK) {
- case DMAMAP_LINEAR:
- bus_dmamap_sync_buf(map->buffer, map->len, op);
- break;
- case DMAMAP_MBUF:
- m = map->buffer;
- while (m) {
- if (m->m_len > 0)
- bus_dmamap_sync_buf(m->m_data, m->m_len, op);
- m = m->m_next;
- }
- break;
- case DMAMAP_UIO:
- uio = map->buffer;
- iov = uio->uio_iov;
- resid = uio->uio_resid;
- for (int i = 0; i < uio->uio_iovcnt && resid != 0; i++) {
- bus_size_t minlen = resid < iov[i].iov_len ? resid :
- iov[i].iov_len;
- if (minlen > 0) {
- bus_dmamap_sync_buf(iov[i].iov_base, minlen,
- op);
- resid -= minlen;
- }
- }
- break;
- default:
- break;
- }
- cpu_drain_writebuf();
-}
--- sys/arm/arm/vm_machdep.c
+++ /dev/null
@@ -1,525 +0,0 @@
-/*-
- * Copyright (c) 1982, 1986 The Regents of the University of California.
- * Copyright (c) 1989, 1990 William Jolitz
- * Copyright (c) 1994 John Dyson
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department, and William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
- * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/vm_machdep.c,v 1.17 2005/07/10 23:31:10 davidxu Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/mbuf.h>
-#include <sys/proc.h>
-#include <sys/socketvar.h>
-#include <sys/sf_buf.h>
-#include <sys/unistd.h>
-#include <machine/cpu.h>
-#include <machine/pcb.h>
-#include <machine/sysarch.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-#include <vm/vm_param.h>
-#include <vm/uma.h>
-#include <vm/uma_int.h>
-
-#ifndef NSFBUFS
-#define NSFBUFS (512 + maxusers * 16)
-#endif
-
-static void sf_buf_init(void *arg);
-SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL)
-
-LIST_HEAD(sf_head, sf_buf);
-
-
-/*
- * A hash table of active sendfile(2) buffers
- */
-static struct sf_head *sf_buf_active;
-static u_long sf_buf_hashmask;
-
-#define SF_BUF_HASH(m) (((m) - vm_page_array) & sf_buf_hashmask)
-
-static TAILQ_HEAD(, sf_buf) sf_buf_freelist;
-static u_int sf_buf_alloc_want;
-
-/*
- * A lock used to synchronize access to the hash table and free list
- */
-static struct mtx sf_buf_lock;
-
-/*
- * Finish a fork operation, with process p2 nearly set up.
- * Copy and update the pcb, set up the stack so that the child
- * ready to run and return to user mode.
- */
-void
-cpu_fork(register struct thread *td1, register struct proc *p2,
- struct thread *td2, int flags)
-{
- struct pcb *pcb1, *pcb2;
- struct trapframe *tf;
- struct switchframe *sf;
- struct mdproc *mdp2;
-
- if ((flags & RFPROC) == 0)
- return;
- pcb1 = td1->td_pcb;
- pcb2 = (struct pcb *)(td2->td_kstack + td2->td_kstack_pages * PAGE_SIZE) - 1;
-#ifdef __XSCALE__
- pmap_use_minicache(td2->td_kstack, td2->td_kstack_pages * PAGE_SIZE);
-#endif
- td2->td_pcb = pcb2;
- bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
- mdp2 = &p2->p_md;
- bcopy(&td1->td_proc->p_md, mdp2, sizeof(*mdp2));
- pcb2->un_32.pcb32_und_sp = td2->td_kstack + USPACE_UNDEF_STACK_TOP;
- pcb2->un_32.pcb32_sp = td2->td_kstack +
- USPACE_SVC_STACK_TOP - sizeof(*pcb2);
- pmap_activate(td2);
- td2->td_frame = tf =
- (struct trapframe *)pcb2->un_32.pcb32_sp - 1;
- *tf = *td1->td_frame;
- sf = (struct switchframe *)tf - 1;
- sf->sf_r4 = (u_int)fork_return;
- sf->sf_r5 = (u_int)td2;
- sf->sf_pc = (u_int)fork_trampoline;
- tf->tf_spsr &= ~PSR_C_bit;
- tf->tf_r0 = 0;
- tf->tf_r1 = 0;
- pcb2->un_32.pcb32_sp = (u_int)sf;
-
- /* Setup to release sched_lock in fork_exit(). */
- td2->td_md.md_spinlock_count = 1;
- td2->td_md.md_saved_cspr = 0;
- td2->td_md.md_tp = *(uint32_t **)ARM_TP_ADDRESS;
-}
-
-void
-cpu_thread_swapin(struct thread *td)
-{
-}
-
-void
-cpu_thread_swapout(struct thread *td)
-{
-}
-
-/*
- * Detatch mapped page and release resources back to the system.
- */
-void
-sf_buf_free(struct sf_buf *sf)
-{
- mtx_lock(&sf_buf_lock);
- sf->ref_count--;
- if (sf->ref_count == 0) {
- TAILQ_INSERT_TAIL(&sf_buf_freelist, sf, free_entry);
- nsfbufsused--;
- if (sf_buf_alloc_want > 0)
- wakeup_one(&sf_buf_freelist);
- }
- mtx_unlock(&sf_buf_lock);
-}
-
-/*
- * * Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-))
- * */
-static void
-sf_buf_init(void *arg)
-{
- struct sf_buf *sf_bufs;
- vm_offset_t sf_base;
- int i;
-
- nsfbufs = NSFBUFS;
- TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs);
-
- sf_buf_active = hashinit(nsfbufs, M_TEMP, &sf_buf_hashmask);
- TAILQ_INIT(&sf_buf_freelist);
- sf_base = kmem_alloc_nofault(kernel_map, nsfbufs * PAGE_SIZE);
- sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP,
- M_NOWAIT | M_ZERO);
- for (i = 0; i < nsfbufs; i++) {
- sf_bufs[i].kva = sf_base + i * PAGE_SIZE;
- TAILQ_INSERT_TAIL(&sf_buf_freelist, &sf_bufs[i], free_entry);
- }
- sf_buf_alloc_want = 0;
- mtx_init(&sf_buf_lock, "sf_buf", NULL, MTX_DEF);
-}
-
-/*
- * Get an sf_buf from the freelist. Will block if none are available.
- */
-struct sf_buf *
-sf_buf_alloc(struct vm_page *m, int flags)
-{
- struct sf_head *hash_list;
- struct sf_buf *sf;
- int error;
-
- hash_list = &sf_buf_active[SF_BUF_HASH(m)];
- mtx_lock(&sf_buf_lock);
- LIST_FOREACH(sf, hash_list, list_entry) {
- if (sf->m == m) {
- sf->ref_count++;
- if (sf->ref_count == 1) {
- TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry);
- nsfbufsused++;
- nsfbufspeak = imax(nsfbufspeak, nsfbufsused);
- }
- goto done;
- }
- }
- while ((sf = TAILQ_FIRST(&sf_buf_freelist)) == NULL) {
- if (flags & SFB_NOWAIT)
- goto done;
- sf_buf_alloc_want++;
- mbstat.sf_allocwait++;
- error = msleep(&sf_buf_freelist, &sf_buf_lock,
- (flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0);
- sf_buf_alloc_want--;
-
-
- /*
- * If we got a signal, don't risk going back to sleep.
- */
- if (error)
- goto done;
- }
- TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry);
- if (sf->m != NULL)
- LIST_REMOVE(sf, list_entry);
- LIST_INSERT_HEAD(hash_list, sf, list_entry);
- sf->ref_count = 1;
- sf->m = m;
- nsfbufsused++;
- nsfbufspeak = imax(nsfbufspeak, nsfbufsused);
- pmap_qenter(sf->kva, &sf->m, 1);
-done:
- mtx_unlock(&sf_buf_lock);
- return (sf);
-
-}
-
-/*
- * Initialize machine state (pcb and trap frame) for a new thread about to
- * upcall. Put enough state in the new thread's PCB to get it to go back
- * userret(), where we can intercept it again to set the return (upcall)
- * Address and stack, along with those from upcals that are from other sources
- * such as those generated in thread_userret() itself.
- */
-void
-cpu_set_upcall(struct thread *td, struct thread *td0)
-{
- struct trapframe *tf;
- struct switchframe *sf;
-
- bcopy(td0->td_frame, td->td_frame, sizeof(struct trapframe));
- bcopy(td0->td_pcb, td->td_pcb, sizeof(struct pcb));
- tf = td->td_frame;
- sf = (struct switchframe *)tf - 1;
- sf->sf_r4 = (u_int)fork_return;
- sf->sf_r5 = (u_int)td;
- sf->sf_pc = (u_int)fork_trampoline;
- tf->tf_spsr &= ~PSR_C_bit;
- tf->tf_r0 = 0;
- td->td_pcb->un_32.pcb32_sp = (u_int)sf;
- td->td_pcb->un_32.pcb32_und_sp = td->td_kstack + USPACE_UNDEF_STACK_TOP;
-
- /* Setup to release sched_lock in fork_exit(). */
- td->td_md.md_spinlock_count = 1;
- td->td_md.md_saved_cspr = 0;
-}
-
-/*
- * Set that machine state for performing an upcall that has to
- * be done in thread_userret() so that those upcalls generated
- * in thread_userret() itself can be done as well.
- */
-void
-cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
- stack_t *stack)
-{
- struct trapframe *tf = td->td_frame;
-
- tf->tf_usr_sp = ((int)stack->ss_sp + stack->ss_size
- - sizeof(struct trapframe)) & ~7;
- tf->tf_pc = (int)entry;
- tf->tf_r0 = (int)arg;
- tf->tf_spsr = PSR_USR32_MODE;
-}
-
-int
-cpu_set_user_tls(struct thread *td, void *tls_base)
-{
-
- if (td != curthread)
- td->td_md.md_tp = tls_base;
- else {
- critical_enter();
- *(void **)ARM_TP_ADDRESS = tls_base;
- critical_exit();
- }
- return (0);
-}
-
-void
-cpu_thread_exit(struct thread *td)
-{
-}
-
-void
-cpu_thread_setup(struct thread *td)
-{
- td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_pages *
- PAGE_SIZE) - 1;
- td->td_frame = (struct trapframe *)
- ((u_int)td->td_kstack + USPACE_SVC_STACK_TOP - sizeof(struct pcb)) - 1;
-#ifdef __XSCALE__
- pmap_use_minicache(td->td_kstack, td->td_kstack_pages * PAGE_SIZE);
-#endif
-
-}
-void
-cpu_thread_clean(struct thread *td)
-{
-}
-
-/*
- * Intercept the return address from a freshly forked process that has NOT
- * been scheduled yet.
- *
- * This is needed to make kernel threads stay in kernel mode.
- */
-void
-cpu_set_fork_handler(struct thread *td, void (*func)(void *), void *arg)
-{
- struct switchframe *sf;
- struct trapframe *tf;
-
- tf = td->td_frame;
- sf = (struct switchframe *)tf - 1;
- sf->sf_r4 = (u_int)func;
- sf->sf_r5 = (u_int)arg;
- td->td_pcb->un_32.pcb32_sp = (u_int)sf;
-}
-
-/*
- * Software interrupt handler for queued VM system processing.
- */
-void
-swi_vm(void *dummy)
-{
-}
-
-void
-cpu_exit(struct thread *td)
-{
-}
-
-#ifdef ARM_USE_SMALL_ALLOC
-
-static TAILQ_HEAD(,arm_small_page) pages_normal =
- TAILQ_HEAD_INITIALIZER(pages_normal);
-static TAILQ_HEAD(,arm_small_page) pages_wt =
- TAILQ_HEAD_INITIALIZER(pages_wt);
-static TAILQ_HEAD(,arm_small_page) free_pgdesc =
- TAILQ_HEAD_INITIALIZER(free_pgdesc);
-
-extern uma_zone_t l2zone;
-
-struct mtx smallalloc_mtx;
-
-MALLOC_DEFINE(M_VMSMALLALLOC, "VM Small alloc", "VM Small alloc data");
-
-vm_offset_t alloc_curaddr;
-vm_offset_t alloc_firstaddr;
-
-extern int doverbose;
-
-void
-arm_add_smallalloc_pages(void *list, void *mem, int bytes, int pagetable)
-{
- struct arm_small_page *pg;
-
- bytes &= ~PAGE_SIZE;
- while (bytes > 0) {
- pg = (struct arm_small_page *)list;
- pg->addr = mem;
- if (pagetable)
- TAILQ_INSERT_HEAD(&pages_wt, pg, pg_list);
- else
- TAILQ_INSERT_HEAD(&pages_normal, pg, pg_list);
- list = (char *)list + sizeof(*pg);
- mem = (char *)mem + PAGE_SIZE;
- bytes -= PAGE_SIZE;
- }
-}
-
-static void *
-arm_uma_do_alloc(struct arm_small_page **pglist, int bytes, int pagetable)
-{
- void *ret;
- vm_page_t page_array = NULL;
-
-
- *pglist = (void *)kmem_malloc(kmem_map, (0x100000 / PAGE_SIZE) *
- sizeof(struct arm_small_page), M_WAITOK);
- if (alloc_curaddr < 0xf0000000) {/* XXX */
- mtx_lock(&Giant);
- page_array = vm_page_alloc_contig(0x100000 / PAGE_SIZE,
- 0, 0xffffffff, 0x100000, 0);
- mtx_unlock(&Giant);
- }
- if (page_array) {
- vm_paddr_t pa = VM_PAGE_TO_PHYS(page_array);
- mtx_lock(&smallalloc_mtx);
- ret = (void*)alloc_curaddr;
- alloc_curaddr += 0x100000;
- /* XXX: ARM_TP_ADDRESS should probably be move elsewhere. */
- if (alloc_curaddr == ARM_TP_ADDRESS)
- alloc_curaddr += 0x100000;
- mtx_unlock(&smallalloc_mtx);
- pmap_kenter_section((vm_offset_t)ret, pa
- , pagetable);
-
-
- } else {
- kmem_free(kmem_map, (vm_offset_t)*pglist,
- (0x100000 / PAGE_SIZE) * sizeof(struct arm_small_page));
- *pglist = NULL;
- ret = (void *)kmem_malloc(kmem_map, bytes, M_WAITOK);
- }
- return (ret);
-}
-
-void *
-uma_small_alloc(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
-{
- void *ret;
- struct arm_small_page *sp, *tmp;
- TAILQ_HEAD(,arm_small_page) *head;
-
- *flags = UMA_SLAB_PRIV;
- /*
- * For CPUs where we setup page tables as write back, there's no
- * need to maintain two separate pools.
- */
- if (zone == l2zone && pte_l1_s_cache_mode != pte_l1_s_cache_mode_pt)
- head = (void *)&pages_wt;
- else
- head = (void *)&pages_normal;
-
- mtx_lock(&smallalloc_mtx);
- sp = TAILQ_FIRST(head);
-
- if (!sp) {
- /* No more free pages, need to alloc more. */
- mtx_unlock(&smallalloc_mtx);
- if (!(wait & M_WAITOK)) {
- ret = (void *)kmem_malloc(kmem_map, bytes, wait);
- return (ret);
- }
- /* Try to alloc 1MB of contiguous memory. */
- ret = arm_uma_do_alloc(&sp, bytes, zone == l2zone ?
- SECTION_PT : SECTION_CACHE);
- mtx_lock(&smallalloc_mtx);
- if (sp) {
- for (int i = 0; i < (0x100000 / PAGE_SIZE) - 1;
- i++) {
- tmp = &sp[i];
- tmp->addr = (char *)ret + i * PAGE_SIZE;
- TAILQ_INSERT_HEAD(head, tmp, pg_list);
- }
- ret = (char *)ret + 0x100000 - PAGE_SIZE;
- TAILQ_INSERT_HEAD(&free_pgdesc, &sp[(0x100000 / (
- PAGE_SIZE)) - 1], pg_list);
- }
-
- } else {
- sp = TAILQ_FIRST(head);
- TAILQ_REMOVE(head, sp, pg_list);
- TAILQ_INSERT_HEAD(&free_pgdesc, sp, pg_list);
- ret = sp->addr;
- }
- mtx_unlock(&smallalloc_mtx);
- if ((wait & M_ZERO))
- bzero(ret, bytes);
- return (ret);
-}
-
-void
-uma_small_free(void *mem, int size, u_int8_t flags)
-{
- pd_entry_t *pd;
- pt_entry_t *pt;
-
- if (mem < (void *)alloc_firstaddr)
- kmem_free(kmem_map, (vm_offset_t)mem, size);
- else {
- struct arm_small_page *sp;
-
- mtx_lock(&smallalloc_mtx);
- sp = TAILQ_FIRST(&free_pgdesc);
- KASSERT(sp != NULL, ("No more free page descriptor ?"));
- TAILQ_REMOVE(&free_pgdesc, sp, pg_list);
- sp->addr = mem;
- pmap_get_pde_pte(kernel_pmap, (vm_offset_t)mem, &pd, &pt);
- if ((*pd & pte_l1_s_cache_mask) == pte_l1_s_cache_mode_pt &&
- pte_l1_s_cache_mode_pt != pte_l1_s_cache_mode)
- TAILQ_INSERT_HEAD(&pages_wt, sp, pg_list);
- else
- TAILQ_INSERT_HEAD(&pages_normal, sp, pg_list);
- mtx_unlock(&smallalloc_mtx);
- }
-}
-
-#endif
--- sys/arm/arm/blockio.S
+++ /dev/null
@@ -1,587 +0,0 @@
-/* $NetBSD: blockio.S,v 1.5 2002/08/15 01:38:16 briggs Exp $ */
-
-/*-
- * Copyright (c) 2001 Ben Harris.
- * Copyright (c) 1994 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * blockio.S
- *
- * optimised block read/write from/to IO routines.
- *
- * Created : 08/10/94
- * Modified : 22/01/99 -- R.Earnshaw
- * Faster, and small tweaks for StrongARM
- */
-
-#include <machine/asm.h>
-
-__FBSDID("$FreeBSD: src/sys/arm/arm/blockio.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * Read bytes from an I/O address into a block of memory
- *
- * r0 = address to read from (IO)
- * r1 = address to write to (memory)
- * r2 = length
- */
-
-/* This code will look very familiar if you've read _memcpy(). */
-ENTRY(read_multi_1)
- mov ip, sp
- stmfd sp!, {fp, ip, lr, pc}
- sub fp, ip, #4
- subs r2, r2, #4 /* r2 = length - 4 */
- blt .Lrm1_l4 /* less than 4 bytes */
- ands r12, r1, #3
- beq .Lrm1_main /* aligned destination */
- rsb r12, r12, #4
- cmp r12, #2
- ldrb r3, [r0]
- strb r3, [r1], #1
- ldrgeb r3, [r0]
- strgeb r3, [r1], #1
- ldrgtb r3, [r0]
- strgtb r3, [r1], #1
- subs r2, r2, r12
- blt .Lrm1_l4
-.Lrm1_main:
-.Lrm1loop:
- ldrb r3, [r0]
- ldrb r12, [r0]
- orr r3, r3, r12, lsl #8
- ldrb r12, [r0]
- orr r3, r3, r12, lsl #16
- ldrb r12, [r0]
- orr r3, r3, r12, lsl #24
- str r3, [r1], #4
- subs r2, r2, #4
- bge .Lrm1loop
-.Lrm1_l4:
- adds r2, r2, #4 /* r2 = length again */
- ldmeqdb fp, {fp, sp, pc}
- RETeq
- cmp r2, #2
- ldrb r3, [r0]
- strb r3, [r1], #1
- ldrgeb r3, [r0]
- strgeb r3, [r1], #1
- ldrgtb r3, [r0]
- strgtb r3, [r1], #1
- ldmdb fp, {fp, sp, pc}
-
-/*
- * Write bytes to an I/O address from a block of memory
- *
- * r0 = address to write to (IO)
- * r1 = address to read from (memory)
- * r2 = length
- */
-
-/* This code will look very familiar if you've read _memcpy(). */
-ENTRY(write_multi_1)
- mov ip, sp
- stmfd sp!, {fp, ip, lr, pc}
- sub fp, ip, #4
- subs r2, r2, #4 /* r2 = length - 4 */
- blt .Lwm1_l4 /* less than 4 bytes */
- ands r12, r1, #3
- beq .Lwm1_main /* aligned source */
- rsb r12, r12, #4
- cmp r12, #2
- ldrb r3, [r1], #1
- strb r3, [r0]
- ldrgeb r3, [r1], #1
- strgeb r3, [r0]
- ldrgtb r3, [r1], #1
- strgtb r3, [r0]
- subs r2, r2, r12
- blt .Lwm1_l4
-.Lwm1_main:
-.Lwm1loop:
- ldr r3, [r1], #4
- strb r3, [r0]
- mov r3, r3, lsr #8
- strb r3, [r0]
- mov r3, r3, lsr #8
- strb r3, [r0]
- mov r3, r3, lsr #8
- strb r3, [r0]
- subs r2, r2, #4
- bge .Lwm1loop
-.Lwm1_l4:
- adds r2, r2, #4 /* r2 = length again */
- ldmeqdb fp, {fp, sp, pc}
- cmp r2, #2
- ldrb r3, [r1], #1
- strb r3, [r0]
- ldrgeb r3, [r1], #1
- strgeb r3, [r0]
- ldrgtb r3, [r1], #1
- strgtb r3, [r0]
- ldmdb fp, {fp, sp, pc}
-
-/*
- * Reads short ints (16 bits) from an I/O address into a block of memory
- *
- * r0 = address to read from (IO)
- * r1 = address to write to (memory)
- * r2 = length
- */
-
-ENTRY(insw)
-/* Make sure that we have a positive length */
- cmp r2, #0x00000000
- movle pc, lr
-
-/* If the destination address and the size is word aligned, do it fast */
-
- tst r2, #0x00000001
- tsteq r1, #0x00000003
- beq .Lfastinsw
-
-/* Non aligned insw */
-
-.Linswloop:
- ldr r3, [r0]
- subs r2, r2, #0x00000001 /* Loop test in load delay slot */
- strb r3, [r1], #0x0001
- mov r3, r3, lsr #8
- strb r3, [r1], #0x0001
- bgt .Linswloop
-
- RET
-
-/* Word aligned insw */
-
-.Lfastinsw:
-
-.Lfastinswloop:
- ldr r3, [r0, #0x0002] /* take advantage of nonaligned
- * word accesses */
- ldr ip, [r0]
- mov r3, r3, lsr #16 /* Put the two shorts together */
- orr r3, r3, ip, lsl #16
- str r3, [r1], #0x0004 /* Store */
- subs r2, r2, #0x00000002 /* Next */
- bgt .Lfastinswloop
-
- RET
-
-
-/*
- * Writes short ints (16 bits) from a block of memory to an I/O address
- *
- * r0 = address to write to (IO)
- * r1 = address to read from (memory)
- * r2 = length
- */
-
-ENTRY(outsw)
-/* Make sure that we have a positive length */
- cmp r2, #0x00000000
- movle pc, lr
-
-/* If the destination address and the size is word aligned, do it fast */
-
- tst r2, #0x00000001
- tsteq r1, #0x00000003
- beq .Lfastoutsw
-
-/* Non aligned outsw */
-
-.Loutswloop:
- ldrb r3, [r1], #0x0001
- ldrb ip, [r1], #0x0001
- subs r2, r2, #0x00000001 /* Loop test in load delay slot */
- orr r3, r3, ip, lsl #8
- orr r3, r3, r3, lsl #16
- str r3, [r0]
- bgt .Loutswloop
-
- RET
-
-/* Word aligned outsw */
-
-.Lfastoutsw:
-
-.Lfastoutswloop:
- ldr r3, [r1], #0x0004 /* r3 = (H)(L) */
- subs r2, r2, #0x00000002 /* Loop test in load delay slot */
-
- eor ip, r3, r3, lsr #16 /* ip = (H)(H^L) */
- eor r3, r3, ip, lsl #16 /* r3 = (H^H^L)(L) = (L)(L) */
- eor ip, ip, r3, lsr #16 /* ip = (H)(H^L^L) = (H)(H) */
-
- str r3, [r0]
- str ip, [r0]
-
-/* mov ip, r3, lsl #16
- * orr ip, ip, ip, lsr #16
- * str ip, [r0]
- *
- * mov ip, r3, lsr #16
- * orr ip, ip, ip, lsl #16
- * str ip, [r0]
- */
-
- bgt .Lfastoutswloop
-
- RET
-
-/*
- * reads short ints (16 bits) from an I/O address into a block of memory
- * with a length garenteed to be a multiple of 16 bytes
- * with a word aligned destination address
- *
- * r0 = address to read from (IO)
- * r1 = address to write to (memory)
- * r2 = length
- */
-
-ENTRY(insw16)
-/* Make sure that we have a positive length */
- cmp r2, #0x00000000
- movle pc, lr
-
-/* If the destination address is word aligned and the size suitably
- aligned, do it fast */
-
- tst r2, #0x00000007
- tsteq r1, #0x00000003
-
- bne _C_LABEL(insw)
-
-/* Word aligned insw */
-
- stmfd sp!, {r4,r5,lr}
-
-.Linsw16loop:
- ldr r3, [r0, #0x0002] /* take advantage of nonaligned
- * word accesses */
- ldr lr, [r0]
- mov r3, r3, lsr #16 /* Put the two shorts together */
- orr r3, r3, lr, lsl #16
-
- ldr r4, [r0, #0x0002] /* take advantage of nonaligned
- * word accesses */
- ldr lr, [r0]
- mov r4, r4, lsr #16 /* Put the two shorts together */
- orr r4, r4, lr, lsl #16
-
- ldr r5, [r0, #0x0002] /* take advantage of nonaligned
- * word accesses */
- ldr lr, [r0]
- mov r5, r5, lsr #16 /* Put the two shorts together */
- orr r5, r5, lr, lsl #16
-
- ldr ip, [r0, #0x0002] /* take advantage of nonaligned
- * word accesses */
- ldr lr, [r0]
- mov ip, ip, lsr #16 /* Put the two shorts together */
- orr ip, ip, lr, lsl #16
-
- stmia r1!, {r3-r5,ip}
- subs r2, r2, #0x00000008 /* Next */
- bgt .Linsw16loop
-
- ldmfd sp!, {r4,r5,pc} /* Restore regs and go home */
-
-
-/*
- * Writes short ints (16 bits) from a block of memory to an I/O address
- *
- * r0 = address to write to (IO)
- * r1 = address to read from (memory)
- * r2 = length
- */
-
-ENTRY(outsw16)
-/* Make sure that we have a positive length */
- cmp r2, #0x00000000
- movle pc, lr
-
-/* If the destination address is word aligned and the size suitably
- aligned, do it fast */
-
- tst r2, #0x00000007
- tsteq r1, #0x00000003
-
- bne _C_LABEL(outsw)
-
-/* Word aligned outsw */
-
- stmfd sp!, {r4,r5,lr}
-
-.Loutsw16loop:
- ldmia r1!, {r4,r5,ip,lr}
-
- eor r3, r4, r4, lsl #16 /* r3 = (A^B)(B) */
- eor r4, r4, r3, lsr #16 /* r4 = (A)(B^A^B) = (A)(A) */
- eor r3, r3, r4, lsl #16 /* r3 = (A^B^A)(B) = (B)(B) */
- str r3, [r0]
- str r4, [r0]
-
-/* mov r3, r4, lsl #16
- * orr r3, r3, r3, lsr #16
- * str r3, [r0]
- *
- * mov r3, r4, lsr #16
- * orr r3, r3, r3, lsl #16
- * str r3, [r0]
- */
-
- eor r3, r5, r5, lsl #16 /* r3 = (A^B)(B) */
- eor r5, r5, r3, lsr #16 /* r4 = (A)(B^A^B) = (A)(A) */
- eor r3, r3, r5, lsl #16 /* r3 = (A^B^A)(B) = (B)(B) */
- str r3, [r0]
- str r5, [r0]
-
- eor r3, ip, ip, lsl #16 /* r3 = (A^B)(B) */
- eor ip, ip, r3, lsr #16 /* r4 = (A)(B^A^B) = (A)(A) */
- eor r3, r3, ip, lsl #16 /* r3 = (A^B^A)(B) = (B)(B) */
- str r3, [r0]
- str ip, [r0]
-
- eor r3, lr, lr, lsl #16 /* r3 = (A^B)(B) */
- eor lr, lr, r3, lsr #16 /* r4 = (A)(B^A^B) = (A)(A) */
- eor r3, r3, lr, lsl #16 /* r3 = (A^B^A)(B) = (B)(B) */
- str r3, [r0]
- str lr, [r0]
-
- subs r2, r2, #0x00000008
- bgt .Loutsw16loop
-
- ldmfd sp!, {r4,r5,pc} /* and go home */
-
-/*
- * reads short ints (16 bits) from an I/O address into a block of memory
- * The I/O address is assumed to be mapped multiple times in a block of
- * 8 words.
- * The destination address should be word aligned.
- *
- * r0 = address to read from (IO)
- * r1 = address to write to (memory)
- * r2 = length
- */
-
-ENTRY(inswm8)
-/* Make sure that we have a positive length */
- cmp r2, #0x00000000
- movle pc, lr
-
-/* If the destination address is word aligned and the size suitably
- aligned, do it fast */
-
- tst r1, #0x00000003
-
- bne _C_LABEL(insw)
-
-/* Word aligned insw */
-
- stmfd sp!, {r4-r9,lr}
-
- mov lr, #0xff000000
- orr lr, lr, #0x00ff0000
-
-.Linswm8_loop8:
- cmp r2, #8
- bcc .Linswm8_l8
-
- ldmia r0, {r3-r9,ip}
-
- bic r3, r3, lr
- orr r3, r3, r4, lsl #16
- bic r5, r5, lr
- orr r4, r5, r6, lsl #16
- bic r7, r7, lr
- orr r5, r7, r8, lsl #16
- bic r9, r9, lr
- orr r6, r9, ip, lsl #16
-
- stmia r1!, {r3-r6}
-
- subs r2, r2, #0x00000008 /* Next */
- bne .Linswm8_loop8
- beq .Linswm8_l1
-
-.Linswm8_l8:
- cmp r2, #4
- bcc .Linswm8_l4
-
- ldmia r0, {r3-r6}
-
- bic r3, r3, lr
- orr r3, r3, r4, lsl #16
- bic r5, r5, lr
- orr r4, r5, r6, lsl #16
-
- stmia r1!, {r3-r4}
-
- subs r2, r2, #0x00000004
- beq .Linswm8_l1
-
-.Linswm8_l4:
- cmp r2, #2
- bcc .Linswm8_l2
-
- ldmia r0, {r3-r4}
-
- bic r3, r3, lr
- orr r3, r3, r4, lsl #16
- str r3, [r1], #0x0004
-
- subs r2, r2, #0x00000002
- beq .Linswm8_l1
-
-.Linswm8_l2:
- cmp r2, #1
- bcc .Linswm8_l1
-
- ldr r3, [r0]
- subs r2, r2, #0x00000001 /* Test in load delay slot */
- /* XXX, why don't we use result? */
-
- strb r3, [r1], #0x0001
- mov r3, r3, lsr #8
- strb r3, [r1], #0x0001
-
-
-.Linswm8_l1:
- ldmfd sp!, {r4-r9,pc} /* And go home */
-
-/*
- * write short ints (16 bits) to an I/O address from a block of memory
- * The I/O address is assumed to be mapped multiple times in a block of
- * 8 words.
- * The source address should be word aligned.
- *
- * r0 = address to read to (IO)
- * r1 = address to write from (memory)
- * r2 = length
- */
-
-ENTRY(outswm8)
-/* Make sure that we have a positive length */
- cmp r2, #0x00000000
- movle pc, lr
-
-/* If the destination address is word aligned and the size suitably
- aligned, do it fast */
-
- tst r1, #0x00000003
-
- bne _C_LABEL(outsw)
-
-/* Word aligned outsw */
-
- stmfd sp!, {r4-r8,lr}
-
-.Loutswm8_loop8:
- cmp r2, #8
- bcc .Loutswm8_l8
-
- ldmia r1!, {r3,r5,r7,ip}
-
- eor r4, r3, r3, lsr #16 /* r4 = (A)(A^B) */
- eor r3, r3, r4, lsl #16 /* r3 = (A^A^B)(B) = (B)(B) */
- eor r4, r4, r3, lsr #16 /* r4 = (A)(B^A^B) = (A)(A) */
-
- eor r6, r5, r5, lsr #16 /* r6 = (A)(A^B) */
- eor r5, r5, r6, lsl #16 /* r5 = (A^A^B)(B) = (B)(B) */
- eor r6, r6, r5, lsr #16 /* r6 = (A)(B^A^B) = (A)(A) */
-
- eor r8, r7, r7, lsr #16 /* r8 = (A)(A^B) */
- eor r7, r7, r8, lsl #16 /* r7 = (A^A^B)(B) = (B)(B) */
- eor r8, r8, r7, lsr #16 /* r8 = (A)(B^A^B) = (A)(A) */
-
- eor lr, ip, ip, lsr #16 /* lr = (A)(A^B) */
- eor ip, ip, lr, lsl #16 /* ip = (A^A^B)(B) = (B)(B) */
- eor lr, lr, ip, lsr #16 /* lr = (A)(B^A^B) = (A)(A) */
-
- stmia r0, {r3-r8,ip,lr}
-
- subs r2, r2, #0x00000008 /* Next */
- bne .Loutswm8_loop8
- beq .Loutswm8_l1
-
-.Loutswm8_l8:
- cmp r2, #4
- bcc .Loutswm8_l4
-
- ldmia r1!, {r3-r4}
-
- eor r6, r3, r3, lsr #16 /* r6 = (A)(A^B) */
- eor r5, r3, r6, lsl #16 /* r5 = (A^A^B)(B) = (B)(B) */
- eor r6, r6, r5, lsr #16 /* r6 = (A)(B^A^B) = (A)(A) */
-
- eor r8, r4, r4, lsr #16 /* r8 = (A)(A^B) */
- eor r7, r4, r8, lsl #16 /* r7 = (A^A^B)(B) = (B)(B) */
- eor r8, r8, r7, lsr #16 /* r8 = (A)(B^A^B) = (A)(A) */
-
- stmia r0, {r5-r8}
-
- subs r2, r2, #0x00000004
- beq .Loutswm8_l1
-
-.Loutswm8_l4:
- cmp r2, #2
- bcc .Loutswm8_l2
-
- ldr r3, [r1], #0x0004 /* r3 = (A)(B) */
- subs r2, r2, #0x00000002 /* Done test in Load delay slot */
-
- eor r5, r3, r3, lsr #16 /* r5 = (A)(A^B)*/
- eor r4, r3, r5, lsl #16 /* r4 = (A^A^B)(B) = (B)(B) */
- eor r5, r5, r4, lsr #16 /* r5 = (A)(B^A^B) = (A)(A) */
-
- stmia r0, {r4, r5}
-
- beq .Loutswm8_l1
-
-.Loutswm8_l2:
- cmp r2, #1
- bcc .Loutswm8_l1
-
- ldrb r3, [r1], #0x0001
- ldrb r4, [r1], #0x0001
- subs r2, r2, #0x00000001 /* Done test in load delay slot */
- /* XXX This test isn't used? */
- orr r3, r3, r4, lsl #8
- orr r3, r3, r3, lsl #16
- str r3, [r0]
-
-.Loutswm8_l1:
- ldmfd sp!, {r4-r8,pc} /* And go home */
--- sys/arm/arm/db_interface.c
+++ /dev/null
@@ -1,342 +0,0 @@
-/* $NetBSD: db_interface.c,v 1.33 2003/08/25 04:51:10 mrg Exp $ */
-
-/*-
- * Copyright (c) 1996 Scott K. Stevens
- *
- * Mach Operating System
- * Copyright (c) 1991,1990 Carnegie Mellon University
- * All Rights Reserved.
- *
- * Permission to use, copy, modify and distribute this software and its
- * documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
- * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- *
- * From: db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
- */
-
-/*
- * Interface to new debugger.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/db_interface.c,v 1.5 2005/06/23 11:38:47 cognet Exp $");
-#include "opt_ddb.h"
-
-#include <sys/param.h>
-#include <sys/proc.h>
-#include <sys/reboot.h>
-#include <sys/systm.h> /* just for boothowto */
-#include <sys/exec.h>
-#ifdef KDB
-#include <sys/kdb.h>
-#endif
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_map.h>
-#include <vm/vm_extern.h>
-
-#include <machine/db_machdep.h>
-#include <machine/katelib.h>
-#include <machine/vmparam.h>
-#include <machine/cpu.h>
-
-#include <ddb/ddb.h>
-#include <ddb/db_access.h>
-#include <ddb/db_command.h>
-#include <ddb/db_output.h>
-#include <ddb/db_variables.h>
-#include <ddb/db_sym.h>
-#include <sys/cons.h>
-
-static int nil = 0;
-
-int db_access_und_sp (struct db_variable *, db_expr_t *, int);
-int db_access_abt_sp (struct db_variable *, db_expr_t *, int);
-int db_access_irq_sp (struct db_variable *, db_expr_t *, int);
-
-static db_varfcn_t db_frame;
-
-#define DB_OFFSET(x) (db_expr_t *)offsetof(struct trapframe, x)
-struct db_variable db_regs[] = {
- { "spsr", DB_OFFSET(tf_spsr), db_frame },
- { "r0", DB_OFFSET(tf_r0), db_frame },
- { "r1", DB_OFFSET(tf_r1), db_frame },
- { "r2", DB_OFFSET(tf_r2), db_frame },
- { "r3", DB_OFFSET(tf_r3), db_frame },
- { "r4", DB_OFFSET(tf_r4), db_frame },
- { "r5", DB_OFFSET(tf_r5), db_frame },
- { "r6", DB_OFFSET(tf_r6), db_frame },
- { "r7", DB_OFFSET(tf_r7), db_frame },
- { "r8", DB_OFFSET(tf_r8), db_frame },
- { "r9", DB_OFFSET(tf_r9), db_frame },
- { "r10", DB_OFFSET(tf_r10), db_frame },
- { "r11", DB_OFFSET(tf_r11), db_frame },
- { "r12", DB_OFFSET(tf_r12), db_frame },
- { "usr_sp", DB_OFFSET(tf_usr_sp), db_frame },
- { "usr_lr", DB_OFFSET(tf_usr_lr), db_frame },
- { "svc_sp", DB_OFFSET(tf_svc_sp), db_frame },
- { "svc_lr", DB_OFFSET(tf_svc_lr), db_frame },
- { "pc", DB_OFFSET(tf_pc), db_frame },
- { "und_sp", &nil, db_access_und_sp, },
- { "abt_sp", &nil, db_access_abt_sp, },
- { "irq_sp", &nil, db_access_irq_sp, },
-};
-
-struct db_variable *db_eregs = db_regs + sizeof(db_regs)/sizeof(db_regs[0]);
-
-int
-db_access_und_sp(struct db_variable *vp, db_expr_t *valp, int rw)
-{
-
- if (rw == DB_VAR_GET) {
- *valp = get_stackptr(PSR_UND32_MODE);
- return (1);
- }
- return(0);
-}
-
-int
-db_access_abt_sp(struct db_variable *vp, db_expr_t *valp, int rw)
-{
-
- if (rw == DB_VAR_GET) {
- *valp = get_stackptr(PSR_ABT32_MODE);
- return (1);
- }
- return(0);
-}
-
-int
-db_access_irq_sp(struct db_variable *vp, db_expr_t *valp, int rw)
-{
-
- if (rw == DB_VAR_GET) {
- *valp = get_stackptr(PSR_IRQ32_MODE);
- return (1);
- }
- return(0);
-}
-
-int db_frame(struct db_variable *vp, db_expr_t *valp, int rw)
-{
- int *reg;
-
- if (kdb_frame == NULL)
- return (0);
-
- reg = (int *)((uintptr_t)kdb_frame + (db_expr_t)vp->valuep);
- if (rw == DB_VAR_GET)
- *valp = *reg;
- else
- *reg = *valp;
- return(1);
-}
-
-void
-db_show_mdpcpu(struct pcpu *pc)
-{
-}
-int
-db_validate_address(vm_offset_t addr)
-{
- struct proc *p = curproc;
- struct pmap *pmap;
-
- if (!p || !p->p_vmspace || !p->p_vmspace->vm_map.pmap ||
-#ifndef ARM32_NEW_VM_LAYOUT
- addr >= VM_MAXUSER_ADDRESS
-#else
- addr >= VM_MIN_KERNEL_ADDRESS
-#endif
- )
- pmap = pmap_kernel();
- else
- pmap = p->p_vmspace->vm_map.pmap;
-
- return (pmap_extract(pmap, addr) == FALSE);
-}
-
-/*
- * Read bytes from kernel address space for debugger.
- */
-int
-db_read_bytes(addr, size, data)
- vm_offset_t addr;
- size_t size;
- char *data;
-{
- char *src = (char *)addr;
-
- if (db_validate_address((u_int)src)) {
- db_printf("address %p is invalid\n", src);
- return (-1);
- }
-
- if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0) {
- *((int*)data) = *((int*)src);
- return (0);
- }
-
- if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0) {
- *((short*)data) = *((short*)src);
- return (0);
- }
-
- while (size-- > 0) {
- if (db_validate_address((u_int)src)) {
- db_printf("address %p is invalid\n", src);
- return (-1);
- }
- *data++ = *src++;
- }
- return (0);
-}
-
-/*
- * Write bytes to kernel address space for debugger.
- */
-int
-db_write_bytes(vm_offset_t addr, size_t size, char *data)
-{
- char *dst;
- size_t loop;
-
- dst = (char *)addr;
- if (db_validate_address((u_int)dst)) {
- db_printf("address %p is invalid\n", dst);
- return (0);
- }
-
- if (size == 4 && (addr & 3) == 0 && ((uintptr_t)data & 3) == 0)
- *((int*)dst) = *((int*)data);
- else
- if (size == 2 && (addr & 1) == 0 && ((uintptr_t)data & 1) == 0)
- *((short*)dst) = *((short*)data);
- else {
- loop = size;
- while (loop-- > 0) {
- if (db_validate_address((u_int)dst)) {
- db_printf("address %p is invalid\n", dst);
- return (-1);
- }
- *dst++ = *data++;
- }
- }
-
- /* make sure the caches and memory are in sync */
- cpu_icache_sync_range(addr, size);
-
- /* In case the current page tables have been modified ... */
- cpu_tlb_flushID();
- cpu_cpwait();
- return (0);
-}
-
-
-static u_int
-db_fetch_reg(int reg)
-{
-
- switch (reg) {
- case 0:
- return (kdb_frame->tf_r0);
- case 1:
- return (kdb_frame->tf_r1);
- case 2:
- return (kdb_frame->tf_r2);
- case 3:
- return (kdb_frame->tf_r3);
- case 4:
- return (kdb_frame->tf_r4);
- case 5:
- return (kdb_frame->tf_r5);
- case 6:
- return (kdb_frame->tf_r6);
- case 7:
- return (kdb_frame->tf_r7);
- case 8:
- return (kdb_frame->tf_r8);
- case 9:
- return (kdb_frame->tf_r9);
- case 10:
- return (kdb_frame->tf_r10);
- case 11:
- return (kdb_frame->tf_r11);
- case 12:
- return (kdb_frame->tf_r12);
- case 13:
- return (kdb_frame->tf_svc_sp);
- case 14:
- return (kdb_frame->tf_svc_lr);
- case 15:
- return (kdb_frame->tf_pc);
- default:
- panic("db_fetch_reg: botch");
- }
-}
-
-u_int
-branch_taken(u_int insn, db_addr_t pc)
-{
- u_int addr, nregs;
-
- switch ((insn >> 24) & 0xf) {
- case 0xa: /* b ... */
- case 0xb: /* bl ... */
- addr = ((insn << 2) & 0x03ffffff);
- if (addr & 0x02000000)
- addr |= 0xfc000000;
- return (pc + 8 + addr);
- case 0x7: /* ldr pc, [pc, reg, lsl #2] */
- addr = db_fetch_reg(insn & 0xf);
- addr = pc + 8 + (addr << 2);
- db_read_bytes(addr, 4, (char *)&addr);
- return (addr);
- case 0x1: /* mov pc, reg */
- addr = db_fetch_reg(insn & 0xf);
- return (addr);
- case 0x8: /* ldmxx reg, {..., pc} */
- case 0x9:
- addr = db_fetch_reg((insn >> 16) & 0xf);
- nregs = (insn & 0x5555) + ((insn >> 1) & 0x5555);
- nregs = (nregs & 0x3333) + ((nregs >> 2) & 0x3333);
- nregs = (nregs + (nregs >> 4)) & 0x0f0f;
- nregs = (nregs + (nregs >> 8)) & 0x001f;
- switch ((insn >> 23) & 0x3) {
- case 0x0: /* ldmda */
- addr = addr - 0;
- break;
- case 0x1: /* ldmia */
- addr = addr + 0 + ((nregs - 1) << 2);
- break;
- case 0x2: /* ldmdb */
- addr = addr - 4;
- break;
- case 0x3: /* ldmib */
- addr = addr + 4 + ((nregs - 1) << 2);
- break;
- }
- db_read_bytes(addr, 4, (char *)&addr);
- return (addr);
- default:
- panic("branch_taken: botch");
- }
-}
-
--- sys/arm/arm/support.S
+++ /dev/null
@@ -1,2806 +0,0 @@
-/*-
- * Copyright (c) 2004 Olivier Houchard
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <machine/asm.h>
-#include <machine/asmacros.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/support.S,v 1.9 2005/04/12 22:46:09 cognet Exp $");
-
-#include "assym.s"
-
-/*
- * memset: Sets a block of memory to the specified value
- *
- * On entry:
- * r0 - dest address
- * r1 - byte to write
- * r2 - number of bytes to write
- *
- * On exit:
- * r0 - dest address
- */
-/* LINTSTUB: Func: void bzero(void *, size_t) */
-ENTRY(bzero)
- mov r3, #0x00
- b do_memset
-
-/* LINTSTUB: Func: void *memset(void *, int, size_t) */
-ENTRY(memset)
- and r3, r1, #0xff /* We deal with bytes */
- mov r1, r2
-do_memset:
- cmp r1, #0x04 /* Do we have less than 4 bytes */
- mov ip, r0
- blt .Lmemset_lessthanfour
-
- /* Ok first we will word align the address */
- ands r2, ip, #0x03 /* Get the bottom two bits */
- bne .Lmemset_wordunaligned /* The address is not word aligned */
-
- /* We are now word aligned */
-.Lmemset_wordaligned:
- orr r3, r3, r3, lsl #8 /* Extend value to 16-bits */
-#ifdef __XSCALE__
- tst ip, #0x04 /* Quad-align for Xscale */
-#else
- cmp r1, #0x10
-#endif
- orr r3, r3, r3, lsl #16 /* Extend value to 32-bits */
-#ifdef __XSCALE__
- subne r1, r1, #0x04 /* Quad-align if necessary */
- strne r3, [ip], #0x04
- cmp r1, #0x10
-#endif
- blt .Lmemset_loop4 /* If less than 16 then use words */
- mov r2, r3 /* Duplicate data */
- cmp r1, #0x80 /* If < 128 then skip the big loop */
- blt .Lmemset_loop32
-
- /* Do 128 bytes at a time */
-.Lmemset_loop128:
- subs r1, r1, #0x80
-#ifdef __XSCALE__
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
-#else
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
-#endif
- bgt .Lmemset_loop128
- RETeq /* Zero length so just exit */
-
- add r1, r1, #0x80 /* Adjust for extra sub */
-
- /* Do 32 bytes at a time */
-.Lmemset_loop32:
- subs r1, r1, #0x20
-#ifdef __XSCALE__
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
-#else
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
-#endif
- bgt .Lmemset_loop32
- RETeq /* Zero length so just exit */
-
- adds r1, r1, #0x10 /* Partially adjust for extra sub */
-
- /* Deal with 16 bytes or more */
-#ifdef __XSCALE__
- strged r2, [ip], #0x08
- strged r2, [ip], #0x08
-#else
- stmgeia ip!, {r2-r3}
- stmgeia ip!, {r2-r3}
-#endif
- RETeq /* Zero length so just exit */
-
- addlt r1, r1, #0x10 /* Possibly adjust for extra sub */
-
- /* We have at least 4 bytes so copy as words */
-.Lmemset_loop4:
- subs r1, r1, #0x04
- strge r3, [ip], #0x04
- bgt .Lmemset_loop4
- RETeq /* Zero length so just exit */
-
-#ifdef __XSCALE__
- /* Compensate for 64-bit alignment check */
- adds r1, r1, #0x04
- RETeq
- cmp r1, #2
-#else
- cmp r1, #-2
-#endif
-
- strb r3, [ip], #0x01 /* Set 1 byte */
- strgeb r3, [ip], #0x01 /* Set another byte */
- strgtb r3, [ip] /* and a third */
- RET /* Exit */
-
-.Lmemset_wordunaligned:
- rsb r2, r2, #0x004
- strb r3, [ip], #0x01 /* Set 1 byte */
- cmp r2, #0x02
- strgeb r3, [ip], #0x01 /* Set another byte */
- sub r1, r1, r2
- strgtb r3, [ip], #0x01 /* and a third */
- cmp r1, #0x04 /* More than 4 bytes left? */
- bge .Lmemset_wordaligned /* Yup */
-
-.Lmemset_lessthanfour:
- cmp r1, #0x00
- RETeq /* Zero length so exit */
- strb r3, [ip], #0x01 /* Set 1 byte */
- cmp r1, #0x02
- strgeb r3, [ip], #0x01 /* Set another byte */
- strgtb r3, [ip] /* and a third */
- RET /* Exit */
-
-ENTRY(bcmp)
- mov ip, r0
- cmp r2, #0x06
- beq .Lmemcmp_6bytes
- mov r0, #0x00
-
- /* Are both addresses aligned the same way? */
- cmp r2, #0x00
- eornes r3, ip, r1
- RETeq /* len == 0, or same addresses! */
- tst r3, #0x03
- subne r2, r2, #0x01
- bne .Lmemcmp_bytewise2 /* Badly aligned. Do it the slow way */
-
- /* Word-align the addresses, if necessary */
- sub r3, r1, #0x05
- ands r3, r3, #0x03
- add r3, r3, r3, lsl #1
- addne pc, pc, r3, lsl #3
- nop
-
- /* Compare up to 3 bytes */
- ldrb r0, [ip], #0x01
- ldrb r3, [r1], #0x01
- subs r0, r0, r3
- RETne
- subs r2, r2, #0x01
- RETeq
-
- /* Compare up to 2 bytes */
- ldrb r0, [ip], #0x01
- ldrb r3, [r1], #0x01
- subs r0, r0, r3
- RETne
- subs r2, r2, #0x01
- RETeq
-
- /* Compare 1 byte */
- ldrb r0, [ip], #0x01
- ldrb r3, [r1], #0x01
- subs r0, r0, r3
- RETne
- subs r2, r2, #0x01
- RETeq
-
- /* Compare 4 bytes at a time, if possible */
- subs r2, r2, #0x04
- bcc .Lmemcmp_bytewise
-.Lmemcmp_word_aligned:
- ldr r0, [ip], #0x04
- ldr r3, [r1], #0x04
- subs r2, r2, #0x04
- cmpcs r0, r3
- beq .Lmemcmp_word_aligned
- sub r0, r0, r3
-
- /* Correct for extra subtraction, and check if done */
- adds r2, r2, #0x04
- cmpeq r0, #0x00 /* If done, did all bytes match? */
- RETeq /* Yup. Just return */
-
- /* Re-do the final word byte-wise */
- sub ip, ip, #0x04
- sub r1, r1, #0x04
-
-.Lmemcmp_bytewise:
- add r2, r2, #0x03
-.Lmemcmp_bytewise2:
- ldrb r0, [ip], #0x01
- ldrb r3, [r1], #0x01
- subs r2, r2, #0x01
- cmpcs r0, r3
- beq .Lmemcmp_bytewise2
- sub r0, r0, r3
- RET
-
- /*
- * 6 byte compares are very common, thanks to the network stack.
- * This code is hand-scheduled to reduce the number of stalls for
- * load results. Everything else being equal, this will be ~32%
- * faster than a byte-wise memcmp.
- */
- .align 5
-.Lmemcmp_6bytes:
- ldrb r3, [r1, #0x00] /* r3 = b2#0 */
- ldrb r0, [ip, #0x00] /* r0 = b1#0 */
- ldrb r2, [r1, #0x01] /* r2 = b2#1 */
- subs r0, r0, r3 /* r0 = b1#0 - b2#0 */
- ldreqb r3, [ip, #0x01] /* r3 = b1#1 */
- RETne /* Return if mismatch on #0 */
- subs r0, r3, r2 /* r0 = b1#1 - b2#1 */
- ldreqb r3, [r1, #0x02] /* r3 = b2#2 */
- ldreqb r0, [ip, #0x02] /* r0 = b1#2 */
- RETne /* Return if mismatch on #1 */
- ldrb r2, [r1, #0x03] /* r2 = b2#3 */
- subs r0, r0, r3 /* r0 = b1#2 - b2#2 */
- ldreqb r3, [ip, #0x03] /* r3 = b1#3 */
- RETne /* Return if mismatch on #2 */
- subs r0, r3, r2 /* r0 = b1#3 - b2#3 */
- ldreqb r3, [r1, #0x04] /* r3 = b2#4 */
- ldreqb r0, [ip, #0x04] /* r0 = b1#4 */
- RETne /* Return if mismatch on #3 */
- ldrb r2, [r1, #0x05] /* r2 = b2#5 */
- subs r0, r0, r3 /* r0 = b1#4 - b2#4 */
- ldreqb r3, [ip, #0x05] /* r3 = b1#5 */
- RETne /* Return if mismatch on #4 */
- sub r0, r3, r2 /* r0 = b1#5 - b2#5 */
- RET
-
-ENTRY(bcopy)
- /* switch the source and destination registers */
- eor r0, r1, r0
- eor r1, r0, r1
- eor r0, r1, r0
-ENTRY(memmove)
- /* Do the buffers overlap? */
- cmp r0, r1
- RETeq /* Bail now if src/dst are the same */
- subcc r3, r0, r1 /* if (dst > src) r3 = dst - src */
- subcs r3, r1, r0 /* if (src > dsr) r3 = src - dst */
- cmp r3, r2 /* if (r3 < len) we have an overlap */
- bcc PIC_SYM(_C_LABEL(memcpy), PLT)
-
- /* Determine copy direction */
- cmp r1, r0
- bcc .Lmemmove_backwards
-
- moveq r0, #0 /* Quick abort for len=0 */
- RETeq
-
- stmdb sp!, {r0, lr} /* memmove() returns dest addr */
- subs r2, r2, #4
- blt .Lmemmove_fl4 /* less than 4 bytes */
- ands r12, r0, #3
- bne .Lmemmove_fdestul /* oh unaligned destination addr */
- ands r12, r1, #3
- bne .Lmemmove_fsrcul /* oh unaligned source addr */
-
-.Lmemmove_ft8:
- /* We have aligned source and destination */
- subs r2, r2, #8
- blt .Lmemmove_fl12 /* less than 12 bytes (4 from above) */
- subs r2, r2, #0x14
- blt .Lmemmove_fl32 /* less than 32 bytes (12 from above) */
- stmdb sp!, {r4} /* borrow r4 */
-
- /* blat 32 bytes at a time */
- /* XXX for really big copies perhaps we should use more registers */
-.Lmemmove_floop32:
- ldmia r1!, {r3, r4, r12, lr}
- stmia r0!, {r3, r4, r12, lr}
- ldmia r1!, {r3, r4, r12, lr}
- stmia r0!, {r3, r4, r12, lr}
- subs r2, r2, #0x20
- bge .Lmemmove_floop32
-
- cmn r2, #0x10
- ldmgeia r1!, {r3, r4, r12, lr} /* blat a remaining 16 bytes */
- stmgeia r0!, {r3, r4, r12, lr}
- subge r2, r2, #0x10
- ldmia sp!, {r4} /* return r4 */
-
-.Lmemmove_fl32:
- adds r2, r2, #0x14
-
- /* blat 12 bytes at a time */
-.Lmemmove_floop12:
- ldmgeia r1!, {r3, r12, lr}
- stmgeia r0!, {r3, r12, lr}
- subges r2, r2, #0x0c
- bge .Lmemmove_floop12
-
-.Lmemmove_fl12:
- adds r2, r2, #8
- blt .Lmemmove_fl4
-
- subs r2, r2, #4
- ldrlt r3, [r1], #4
- strlt r3, [r0], #4
- ldmgeia r1!, {r3, r12}
- stmgeia r0!, {r3, r12}
- subge r2, r2, #4
-
-.Lmemmove_fl4:
- /* less than 4 bytes to go */
- adds r2, r2, #4
- ldmeqia sp!, {r0, pc} /* done */
-
- /* copy the crud byte at a time */
- cmp r2, #2
- ldrb r3, [r1], #1
- strb r3, [r0], #1
- ldrgeb r3, [r1], #1
- strgeb r3, [r0], #1
- ldrgtb r3, [r1], #1
- strgtb r3, [r0], #1
- ldmia sp!, {r0, pc}
-
- /* erg - unaligned destination */
-.Lmemmove_fdestul:
- rsb r12, r12, #4
- cmp r12, #2
-
- /* align destination with byte copies */
- ldrb r3, [r1], #1
- strb r3, [r0], #1
- ldrgeb r3, [r1], #1
- strgeb r3, [r0], #1
- ldrgtb r3, [r1], #1
- strgtb r3, [r0], #1
- subs r2, r2, r12
- blt .Lmemmove_fl4 /* less the 4 bytes */
-
- ands r12, r1, #3
- beq .Lmemmove_ft8 /* we have an aligned source */
-
- /* erg - unaligned source */
- /* This is where it gets nasty ... */
-.Lmemmove_fsrcul:
- bic r1, r1, #3
- ldr lr, [r1], #4
- cmp r12, #2
- bgt .Lmemmove_fsrcul3
- beq .Lmemmove_fsrcul2
- cmp r2, #0x0c
- blt .Lmemmove_fsrcul1loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5}
-
-.Lmemmove_fsrcul1loop16:
-#ifdef __ARMEB__
- mov r3, lr, lsl #8
-#else
- mov r3, lr, lsr #8
-#endif
- ldmia r1!, {r4, r5, r12, lr}
-#ifdef __ARMEB__
- orr r3, r3, r4, lsr #24
- mov r4, r4, lsl #8
- orr r4, r4, r5, lsr #24
- mov r5, r5, lsl #8
- orr r5, r5, r12, lsr #24
- mov r12, r12, lsl #8
- orr r12, r12, lr, lsr #24
-#else
- orr r3, r3, r4, lsl #24
- mov r4, r4, lsr #8
- orr r4, r4, r5, lsl #24
- mov r5, r5, lsr #8
- orr r5, r5, r12, lsl #24
- mov r12, r12, lsr #8
- orr r12, r12, lr, lsl #24
-#endif
- stmia r0!, {r3-r5, r12}
- subs r2, r2, #0x10
- bge .Lmemmove_fsrcul1loop16
- ldmia sp!, {r4, r5}
- adds r2, r2, #0x0c
- blt .Lmemmove_fsrcul1l4
-
-.Lmemmove_fsrcul1loop4:
-#ifdef __ARMEB__
- mov r12, lr, lsl #8
-#else
- mov r12, lr, lsr #8
-#endif
- ldr lr, [r1], #4
-#ifdef __ARMEB__
- orr r12, r12, lr, lsr #24
-#else
- orr r12, r12, lr, lsl #24
-#endif
- str r12, [r0], #4
- subs r2, r2, #4
- bge .Lmemmove_fsrcul1loop4
-
-.Lmemmove_fsrcul1l4:
- sub r1, r1, #3
- b .Lmemmove_fl4
-
-.Lmemmove_fsrcul2:
- cmp r2, #0x0c
- blt .Lmemmove_fsrcul2loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5}
-
-.Lmemmove_fsrcul2loop16:
-#ifdef __ARMEB__
- mov r3, lr, lsl #16
-#else
- mov r3, lr, lsr #16
-#endif
- ldmia r1!, {r4, r5, r12, lr}
-#ifdef __ARMEB__
- orr r3, r3, r4, lsr #16
- mov r4, r4, lsl #16
- orr r4, r4, r5, lsr #16
- mov r5, r5, lsl #16
- orr r5, r5, r12, lsr #16
- mov r12, r12, lsl #16
- orr r12, r12, lr, lsr #16
-#else
- orr r3, r3, r4, lsl #16
- mov r4, r4, lsr #16
- orr r4, r4, r5, lsl #16
- mov r5, r5, lsr #16
- orr r5, r5, r12, lsl #16
- mov r12, r12, lsr #16
- orr r12, r12, lr, lsl #16
-#endif
- stmia r0!, {r3-r5, r12}
- subs r2, r2, #0x10
- bge .Lmemmove_fsrcul2loop16
- ldmia sp!, {r4, r5}
- adds r2, r2, #0x0c
- blt .Lmemmove_fsrcul2l4
-
-.Lmemmove_fsrcul2loop4:
-#ifdef __ARMEB__
- mov r12, lr, lsl #16
-#else
- mov r12, lr, lsr #16
-#endif
- ldr lr, [r1], #4
-#ifdef __ARMEB__
- orr r12, r12, lr, lsr #16
-#else
- orr r12, r12, lr, lsl #16
-#endif
- str r12, [r0], #4
- subs r2, r2, #4
- bge .Lmemmove_fsrcul2loop4
-
-.Lmemmove_fsrcul2l4:
- sub r1, r1, #2
- b .Lmemmove_fl4
-
-.Lmemmove_fsrcul3:
- cmp r2, #0x0c
- blt .Lmemmove_fsrcul3loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5}
-
-.Lmemmove_fsrcul3loop16:
-#ifdef __ARMEB__
- mov r3, lr, lsl #24
-#else
- mov r3, lr, lsr #24
-#endif
- ldmia r1!, {r4, r5, r12, lr}
-#ifdef __ARMEB__
- orr r3, r3, r4, lsr #8
- mov r4, r4, lsl #24
- orr r4, r4, r5, lsr #8
- mov r5, r5, lsl #24
- orr r5, r5, r12, lsr #8
- mov r12, r12, lsl #24
- orr r12, r12, lr, lsr #8
-#else
- orr r3, r3, r4, lsl #8
- mov r4, r4, lsr #24
- orr r4, r4, r5, lsl #8
- mov r5, r5, lsr #24
- orr r5, r5, r12, lsl #8
- mov r12, r12, lsr #24
- orr r12, r12, lr, lsl #8
-#endif
- stmia r0!, {r3-r5, r12}
- subs r2, r2, #0x10
- bge .Lmemmove_fsrcul3loop16
- ldmia sp!, {r4, r5}
- adds r2, r2, #0x0c
- blt .Lmemmove_fsrcul3l4
-
-.Lmemmove_fsrcul3loop4:
-#ifdef __ARMEB__
- mov r12, lr, lsl #24
-#else
- mov r12, lr, lsr #24
-#endif
- ldr lr, [r1], #4
-#ifdef __ARMEB__
- orr r12, r12, lr, lsr #8
-#else
- orr r12, r12, lr, lsl #8
-#endif
- str r12, [r0], #4
- subs r2, r2, #4
- bge .Lmemmove_fsrcul3loop4
-
-.Lmemmove_fsrcul3l4:
- sub r1, r1, #1
- b .Lmemmove_fl4
-
-.Lmemmove_backwards:
- add r1, r1, r2
- add r0, r0, r2
- subs r2, r2, #4
- blt .Lmemmove_bl4 /* less than 4 bytes */
- ands r12, r0, #3
- bne .Lmemmove_bdestul /* oh unaligned destination addr */
- ands r12, r1, #3
- bne .Lmemmove_bsrcul /* oh unaligned source addr */
-
-.Lmemmove_bt8:
- /* We have aligned source and destination */
- subs r2, r2, #8
- blt .Lmemmove_bl12 /* less than 12 bytes (4 from above) */
- stmdb sp!, {r4, lr}
- subs r2, r2, #0x14 /* less than 32 bytes (12 from above) */
- blt .Lmemmove_bl32
-
- /* blat 32 bytes at a time */
- /* XXX for really big copies perhaps we should use more registers */
-.Lmemmove_bloop32:
- ldmdb r1!, {r3, r4, r12, lr}
- stmdb r0!, {r3, r4, r12, lr}
- ldmdb r1!, {r3, r4, r12, lr}
- stmdb r0!, {r3, r4, r12, lr}
- subs r2, r2, #0x20
- bge .Lmemmove_bloop32
-
-.Lmemmove_bl32:
- cmn r2, #0x10
- ldmgedb r1!, {r3, r4, r12, lr} /* blat a remaining 16 bytes */
- stmgedb r0!, {r3, r4, r12, lr}
- subge r2, r2, #0x10
- adds r2, r2, #0x14
- ldmgedb r1!, {r3, r12, lr} /* blat a remaining 12 bytes */
- stmgedb r0!, {r3, r12, lr}
- subge r2, r2, #0x0c
- ldmia sp!, {r4, lr}
-
-.Lmemmove_bl12:
- adds r2, r2, #8
- blt .Lmemmove_bl4
- subs r2, r2, #4
- ldrlt r3, [r1, #-4]!
- strlt r3, [r0, #-4]!
- ldmgedb r1!, {r3, r12}
- stmgedb r0!, {r3, r12}
- subge r2, r2, #4
-
-.Lmemmove_bl4:
- /* less than 4 bytes to go */
- adds r2, r2, #4
- RETeq /* done */
-
- /* copy the crud byte at a time */
- cmp r2, #2
- ldrb r3, [r1, #-1]!
- strb r3, [r0, #-1]!
- ldrgeb r3, [r1, #-1]!
- strgeb r3, [r0, #-1]!
- ldrgtb r3, [r1, #-1]!
- strgtb r3, [r0, #-1]!
- RET
-
- /* erg - unaligned destination */
-.Lmemmove_bdestul:
- cmp r12, #2
-
- /* align destination with byte copies */
- ldrb r3, [r1, #-1]!
- strb r3, [r0, #-1]!
- ldrgeb r3, [r1, #-1]!
- strgeb r3, [r0, #-1]!
- ldrgtb r3, [r1, #-1]!
- strgtb r3, [r0, #-1]!
- subs r2, r2, r12
- blt .Lmemmove_bl4 /* less than 4 bytes to go */
- ands r12, r1, #3
- beq .Lmemmove_bt8 /* we have an aligned source */
-
- /* erg - unaligned source */
- /* This is where it gets nasty ... */
-.Lmemmove_bsrcul:
- bic r1, r1, #3
- ldr r3, [r1, #0]
- cmp r12, #2
- blt .Lmemmove_bsrcul1
- beq .Lmemmove_bsrcul2
- cmp r2, #0x0c
- blt .Lmemmove_bsrcul3loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5, lr}
-
-.Lmemmove_bsrcul3loop16:
-#ifdef __ARMEB__
- mov lr, r3, lsr #8
-#else
- mov lr, r3, lsl #8
-#endif
- ldmdb r1!, {r3-r5, r12}
-#ifdef __ARMEB__
- orr lr, lr, r12, lsl #24
- mov r12, r12, lsr #8
- orr r12, r12, r5, lsl #24
- mov r5, r5, lsr #8
- orr r5, r5, r4, lsl #24
- mov r4, r4, lsr #8
- orr r4, r4, r3, lsl #24
-#else
- orr lr, lr, r12, lsr #24
- mov r12, r12, lsl #8
- orr r12, r12, r5, lsr #24
- mov r5, r5, lsl #8
- orr r5, r5, r4, lsr #24
- mov r4, r4, lsl #8
- orr r4, r4, r3, lsr #24
-#endif
- stmdb r0!, {r4, r5, r12, lr}
- subs r2, r2, #0x10
- bge .Lmemmove_bsrcul3loop16
- ldmia sp!, {r4, r5, lr}
- adds r2, r2, #0x0c
- blt .Lmemmove_bsrcul3l4
-
-.Lmemmove_bsrcul3loop4:
-#ifdef __ARMEB__
- mov r12, r3, lsr #8
-#else
- mov r12, r3, lsl #8
-#endif
- ldr r3, [r1, #-4]!
-#ifdef __ARMEB__
- orr r12, r12, r3, lsl #24
-#else
- orr r12, r12, r3, lsr #24
-#endif
- str r12, [r0, #-4]!
- subs r2, r2, #4
- bge .Lmemmove_bsrcul3loop4
-
-.Lmemmove_bsrcul3l4:
- add r1, r1, #3
- b .Lmemmove_bl4
-
-.Lmemmove_bsrcul2:
- cmp r2, #0x0c
- blt .Lmemmove_bsrcul2loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5, lr}
-
-.Lmemmove_bsrcul2loop16:
-#ifdef __ARMEB__
- mov lr, r3, lsr #16
-#else
- mov lr, r3, lsl #16
-#endif
- ldmdb r1!, {r3-r5, r12}
-#ifdef __ARMEB__
- orr lr, lr, r12, lsl #16
- mov r12, r12, lsr #16
- orr r12, r12, r5, lsl #16
- mov r5, r5, lsr #16
- orr r5, r5, r4, lsl #16
- mov r4, r4, lsr #16
- orr r4, r4, r3, lsl #16
-#else
- orr lr, lr, r12, lsr #16
- mov r12, r12, lsl #16
- orr r12, r12, r5, lsr #16
- mov r5, r5, lsl #16
- orr r5, r5, r4, lsr #16
- mov r4, r4, lsl #16
- orr r4, r4, r3, lsr #16
-#endif
- stmdb r0!, {r4, r5, r12, lr}
- subs r2, r2, #0x10
- bge .Lmemmove_bsrcul2loop16
- ldmia sp!, {r4, r5, lr}
- adds r2, r2, #0x0c
- blt .Lmemmove_bsrcul2l4
-
-.Lmemmove_bsrcul2loop4:
-#ifdef __ARMEB__
- mov r12, r3, lsr #16
-#else
- mov r12, r3, lsl #16
-#endif
- ldr r3, [r1, #-4]!
-#ifdef __ARMEB__
- orr r12, r12, r3, lsl #16
-#else
- orr r12, r12, r3, lsr #16
-#endif
- str r12, [r0, #-4]!
- subs r2, r2, #4
- bge .Lmemmove_bsrcul2loop4
-
-.Lmemmove_bsrcul2l4:
- add r1, r1, #2
- b .Lmemmove_bl4
-
-.Lmemmove_bsrcul1:
- cmp r2, #0x0c
- blt .Lmemmove_bsrcul1loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5, lr}
-
-.Lmemmove_bsrcul1loop32:
-#ifdef __ARMEB__
- mov lr, r3, lsr #24
-#else
- mov lr, r3, lsl #24
-#endif
- ldmdb r1!, {r3-r5, r12}
-#ifdef __ARMEB__
- orr lr, lr, r12, lsl #8
- mov r12, r12, lsr #24
- orr r12, r12, r5, lsl #8
- mov r5, r5, lsr #24
- orr r5, r5, r4, lsl #8
- mov r4, r4, lsr #24
- orr r4, r4, r3, lsl #8
-#else
- orr lr, lr, r12, lsr #8
- mov r12, r12, lsl #24
- orr r12, r12, r5, lsr #8
- mov r5, r5, lsl #24
- orr r5, r5, r4, lsr #8
- mov r4, r4, lsl #24
- orr r4, r4, r3, lsr #8
-#endif
- stmdb r0!, {r4, r5, r12, lr}
- subs r2, r2, #0x10
- bge .Lmemmove_bsrcul1loop32
- ldmia sp!, {r4, r5, lr}
- adds r2, r2, #0x0c
- blt .Lmemmove_bsrcul1l4
-
-.Lmemmove_bsrcul1loop4:
-#ifdef __ARMEB__
- mov r12, r3, lsr #24
-#else
- mov r12, r3, lsl #24
-#endif
- ldr r3, [r1, #-4]!
-#ifdef __ARMEB__
- orr r12, r12, r3, lsl #8
-#else
- orr r12, r12, r3, lsr #8
-#endif
- str r12, [r0, #-4]!
- subs r2, r2, #4
- bge .Lmemmove_bsrcul1loop4
-
-.Lmemmove_bsrcul1l4:
- add r1, r1, #1
- b .Lmemmove_bl4
-
-#if !defined(__XSCALE__)
-ENTRY(memcpy)
- /* save leaf functions having to store this away */
- stmdb sp!, {r0, lr} /* memcpy() returns dest addr */
-
- subs r2, r2, #4
- blt .Lmemcpy_l4 /* less than 4 bytes */
- ands r12, r0, #3
- bne .Lmemcpy_destul /* oh unaligned destination addr */
- ands r12, r1, #3
- bne .Lmemcpy_srcul /* oh unaligned source addr */
-
-.Lmemcpy_t8:
- /* We have aligned source and destination */
- subs r2, r2, #8
- blt .Lmemcpy_l12 /* less than 12 bytes (4 from above) */
- subs r2, r2, #0x14
- blt .Lmemcpy_l32 /* less than 32 bytes (12 from above) */
- stmdb sp!, {r4} /* borrow r4 */
-
- /* blat 32 bytes at a time */
- /* XXX for really big copies perhaps we should use more registers */
-.Lmemcpy_loop32:
- ldmia r1!, {r3, r4, r12, lr}
- stmia r0!, {r3, r4, r12, lr}
- ldmia r1!, {r3, r4, r12, lr}
- stmia r0!, {r3, r4, r12, lr}
- subs r2, r2, #0x20
- bge .Lmemcpy_loop32
-
- cmn r2, #0x10
- ldmgeia r1!, {r3, r4, r12, lr} /* blat a remaining 16 bytes */
- stmgeia r0!, {r3, r4, r12, lr}
- subge r2, r2, #0x10
- ldmia sp!, {r4} /* return r4 */
-
-.Lmemcpy_l32:
- adds r2, r2, #0x14
-
- /* blat 12 bytes at a time */
-.Lmemcpy_loop12:
- ldmgeia r1!, {r3, r12, lr}
- stmgeia r0!, {r3, r12, lr}
- subges r2, r2, #0x0c
- bge .Lmemcpy_loop12
-
-.Lmemcpy_l12:
- adds r2, r2, #8
- blt .Lmemcpy_l4
-
- subs r2, r2, #4
- ldrlt r3, [r1], #4
- strlt r3, [r0], #4
- ldmgeia r1!, {r3, r12}
- stmgeia r0!, {r3, r12}
- subge r2, r2, #4
-
-.Lmemcpy_l4:
- /* less than 4 bytes to go */
- adds r2, r2, #4
-#ifdef __APCS_26_
- ldmeqia sp!, {r0, pc}^ /* done */
-#else
- ldmeqia sp!, {r0, pc} /* done */
-#endif
- /* copy the crud byte at a time */
- cmp r2, #2
- ldrb r3, [r1], #1
- strb r3, [r0], #1
- ldrgeb r3, [r1], #1
- strgeb r3, [r0], #1
- ldrgtb r3, [r1], #1
- strgtb r3, [r0], #1
- ldmia sp!, {r0, pc}
-
- /* erg - unaligned destination */
-.Lmemcpy_destul:
- rsb r12, r12, #4
- cmp r12, #2
-
- /* align destination with byte copies */
- ldrb r3, [r1], #1
- strb r3, [r0], #1
- ldrgeb r3, [r1], #1
- strgeb r3, [r0], #1
- ldrgtb r3, [r1], #1
- strgtb r3, [r0], #1
- subs r2, r2, r12
- blt .Lmemcpy_l4 /* less the 4 bytes */
-
- ands r12, r1, #3
- beq .Lmemcpy_t8 /* we have an aligned source */
-
- /* erg - unaligned source */
- /* This is where it gets nasty ... */
-.Lmemcpy_srcul:
- bic r1, r1, #3
- ldr lr, [r1], #4
- cmp r12, #2
- bgt .Lmemcpy_srcul3
- beq .Lmemcpy_srcul2
- cmp r2, #0x0c
- blt .Lmemcpy_srcul1loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5}
-
-.Lmemcpy_srcul1loop16:
- mov r3, lr, lsr #8
- ldmia r1!, {r4, r5, r12, lr}
- orr r3, r3, r4, lsl #24
- mov r4, r4, lsr #8
- orr r4, r4, r5, lsl #24
- mov r5, r5, lsr #8
- orr r5, r5, r12, lsl #24
- mov r12, r12, lsr #8
- orr r12, r12, lr, lsl #24
- stmia r0!, {r3-r5, r12}
- subs r2, r2, #0x10
- bge .Lmemcpy_srcul1loop16
- ldmia sp!, {r4, r5}
- adds r2, r2, #0x0c
- blt .Lmemcpy_srcul1l4
-
-.Lmemcpy_srcul1loop4:
- mov r12, lr, lsr #8
- ldr lr, [r1], #4
- orr r12, r12, lr, lsl #24
- str r12, [r0], #4
- subs r2, r2, #4
- bge .Lmemcpy_srcul1loop4
-
-.Lmemcpy_srcul1l4:
- sub r1, r1, #3
- b .Lmemcpy_l4
-
-.Lmemcpy_srcul2:
- cmp r2, #0x0c
- blt .Lmemcpy_srcul2loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5}
-
-.Lmemcpy_srcul2loop16:
- mov r3, lr, lsr #16
- ldmia r1!, {r4, r5, r12, lr}
- orr r3, r3, r4, lsl #16
- mov r4, r4, lsr #16
- orr r4, r4, r5, lsl #16
- mov r5, r5, lsr #16
- orr r5, r5, r12, lsl #16
- mov r12, r12, lsr #16
- orr r12, r12, lr, lsl #16
- stmia r0!, {r3-r5, r12}
- subs r2, r2, #0x10
- bge .Lmemcpy_srcul2loop16
- ldmia sp!, {r4, r5}
- adds r2, r2, #0x0c
- blt .Lmemcpy_srcul2l4
-
-.Lmemcpy_srcul2loop4:
- mov r12, lr, lsr #16
- ldr lr, [r1], #4
- orr r12, r12, lr, lsl #16
- str r12, [r0], #4
- subs r2, r2, #4
- bge .Lmemcpy_srcul2loop4
-
-.Lmemcpy_srcul2l4:
- sub r1, r1, #2
- b .Lmemcpy_l4
-
-.Lmemcpy_srcul3:
- cmp r2, #0x0c
- blt .Lmemcpy_srcul3loop4
- sub r2, r2, #0x0c
- stmdb sp!, {r4, r5}
-
-.Lmemcpy_srcul3loop16:
- mov r3, lr, lsr #24
- ldmia r1!, {r4, r5, r12, lr}
- orr r3, r3, r4, lsl #8
- mov r4, r4, lsr #24
- orr r4, r4, r5, lsl #8
- mov r5, r5, lsr #24
- orr r5, r5, r12, lsl #8
- mov r12, r12, lsr #24
- orr r12, r12, lr, lsl #8
- stmia r0!, {r3-r5, r12}
- subs r2, r2, #0x10
- bge .Lmemcpy_srcul3loop16
- ldmia sp!, {r4, r5}
- adds r2, r2, #0x0c
- blt .Lmemcpy_srcul3l4
-
-.Lmemcpy_srcul3loop4:
- mov r12, lr, lsr #24
- ldr lr, [r1], #4
- orr r12, r12, lr, lsl #8
- str r12, [r0], #4
- subs r2, r2, #4
- bge .Lmemcpy_srcul3loop4
-
-.Lmemcpy_srcul3l4:
- sub r1, r1, #1
- b .Lmemcpy_l4
-#else
-/* LINTSTUB: Func: void *memcpy(void *dst, const void *src, size_t len) */
-ENTRY(memcpy)
- pld [r1]
- cmp r2, #0x0c
- ble .Lmemcpy_short /* <= 12 bytes */
- mov r3, r0 /* We must not clobber r0 */
-
- /* Word-align the destination buffer */
- ands ip, r3, #0x03 /* Already word aligned? */
- beq .Lmemcpy_wordaligned /* Yup */
- cmp ip, #0x02
- ldrb ip, [r1], #0x01
- sub r2, r2, #0x01
- strb ip, [r3], #0x01
- ldrleb ip, [r1], #0x01
- suble r2, r2, #0x01
- strleb ip, [r3], #0x01
- ldrltb ip, [r1], #0x01
- sublt r2, r2, #0x01
- strltb ip, [r3], #0x01
-
- /* Destination buffer is now word aligned */
-.Lmemcpy_wordaligned:
- ands ip, r1, #0x03 /* Is src also word-aligned? */
- bne .Lmemcpy_bad_align /* Nope. Things just got bad */
-
- /* Quad-align the destination buffer */
- tst r3, #0x07 /* Already quad aligned? */
- ldrne ip, [r1], #0x04
- stmfd sp!, {r4-r9} /* Free up some registers */
- subne r2, r2, #0x04
- strne ip, [r3], #0x04
-
- /* Destination buffer quad aligned, source is at least word aligned */
- subs r2, r2, #0x80
- blt .Lmemcpy_w_lessthan128
-
- /* Copy 128 bytes at a time */
-.Lmemcpy_w_loop128:
- ldr r4, [r1], #0x04 /* LD:00-03 */
- ldr r5, [r1], #0x04 /* LD:04-07 */
- pld [r1, #0x18] /* Prefetch 0x20 */
- ldr r6, [r1], #0x04 /* LD:08-0b */
- ldr r7, [r1], #0x04 /* LD:0c-0f */
- ldr r8, [r1], #0x04 /* LD:10-13 */
- ldr r9, [r1], #0x04 /* LD:14-17 */
- strd r4, [r3], #0x08 /* ST:00-07 */
- ldr r4, [r1], #0x04 /* LD:18-1b */
- ldr r5, [r1], #0x04 /* LD:1c-1f */
- strd r6, [r3], #0x08 /* ST:08-0f */
- ldr r6, [r1], #0x04 /* LD:20-23 */
- ldr r7, [r1], #0x04 /* LD:24-27 */
- pld [r1, #0x18] /* Prefetch 0x40 */
- strd r8, [r3], #0x08 /* ST:10-17 */
- ldr r8, [r1], #0x04 /* LD:28-2b */
- ldr r9, [r1], #0x04 /* LD:2c-2f */
- strd r4, [r3], #0x08 /* ST:18-1f */
- ldr r4, [r1], #0x04 /* LD:30-33 */
- ldr r5, [r1], #0x04 /* LD:34-37 */
- strd r6, [r3], #0x08 /* ST:20-27 */
- ldr r6, [r1], #0x04 /* LD:38-3b */
- ldr r7, [r1], #0x04 /* LD:3c-3f */
- strd r8, [r3], #0x08 /* ST:28-2f */
- ldr r8, [r1], #0x04 /* LD:40-43 */
- ldr r9, [r1], #0x04 /* LD:44-47 */
- pld [r1, #0x18] /* Prefetch 0x60 */
- strd r4, [r3], #0x08 /* ST:30-37 */
- ldr r4, [r1], #0x04 /* LD:48-4b */
- ldr r5, [r1], #0x04 /* LD:4c-4f */
- strd r6, [r3], #0x08 /* ST:38-3f */
- ldr r6, [r1], #0x04 /* LD:50-53 */
- ldr r7, [r1], #0x04 /* LD:54-57 */
- strd r8, [r3], #0x08 /* ST:40-47 */
- ldr r8, [r1], #0x04 /* LD:58-5b */
- ldr r9, [r1], #0x04 /* LD:5c-5f */
- strd r4, [r3], #0x08 /* ST:48-4f */
- ldr r4, [r1], #0x04 /* LD:60-63 */
- ldr r5, [r1], #0x04 /* LD:64-67 */
- pld [r1, #0x18] /* Prefetch 0x80 */
- strd r6, [r3], #0x08 /* ST:50-57 */
- ldr r6, [r1], #0x04 /* LD:68-6b */
- ldr r7, [r1], #0x04 /* LD:6c-6f */
- strd r8, [r3], #0x08 /* ST:58-5f */
- ldr r8, [r1], #0x04 /* LD:70-73 */
- ldr r9, [r1], #0x04 /* LD:74-77 */
- strd r4, [r3], #0x08 /* ST:60-67 */
- ldr r4, [r1], #0x04 /* LD:78-7b */
- ldr r5, [r1], #0x04 /* LD:7c-7f */
- strd r6, [r3], #0x08 /* ST:68-6f */
- strd r8, [r3], #0x08 /* ST:70-77 */
- subs r2, r2, #0x80
- strd r4, [r3], #0x08 /* ST:78-7f */
- bge .Lmemcpy_w_loop128
-
-.Lmemcpy_w_lessthan128:
- adds r2, r2, #0x80 /* Adjust for extra sub */
- ldmeqfd sp!, {r4-r9}
- RETeq /* Return now if done */
- subs r2, r2, #0x20
- blt .Lmemcpy_w_lessthan32
-
- /* Copy 32 bytes at a time */
-.Lmemcpy_w_loop32:
- ldr r4, [r1], #0x04
- ldr r5, [r1], #0x04
- pld [r1, #0x18]
- ldr r6, [r1], #0x04
- ldr r7, [r1], #0x04
- ldr r8, [r1], #0x04
- ldr r9, [r1], #0x04
- strd r4, [r3], #0x08
- ldr r4, [r1], #0x04
- ldr r5, [r1], #0x04
- strd r6, [r3], #0x08
- strd r8, [r3], #0x08
- subs r2, r2, #0x20
- strd r4, [r3], #0x08
- bge .Lmemcpy_w_loop32
-
-.Lmemcpy_w_lessthan32:
- adds r2, r2, #0x20 /* Adjust for extra sub */
- ldmeqfd sp!, {r4-r9}
- RETeq /* Return now if done */
-
- and r4, r2, #0x18
- rsbs r4, r4, #0x18
- addne pc, pc, r4, lsl #1
- nop
-
- /* At least 24 bytes remaining */
- ldr r4, [r1], #0x04
- ldr r5, [r1], #0x04
- sub r2, r2, #0x08
- strd r4, [r3], #0x08
-
- /* At least 16 bytes remaining */
- ldr r4, [r1], #0x04
- ldr r5, [r1], #0x04
- sub r2, r2, #0x08
- strd r4, [r3], #0x08
-
- /* At least 8 bytes remaining */
- ldr r4, [r1], #0x04
- ldr r5, [r1], #0x04
- subs r2, r2, #0x08
- strd r4, [r3], #0x08
-
- /* Less than 8 bytes remaining */
- ldmfd sp!, {r4-r9}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- ldrge ip, [r1], #0x04
- strge ip, [r3], #0x04
- RETeq /* Return now if done */
- addlt r2, r2, #0x04
- ldrb ip, [r1], #0x01
- cmp r2, #0x02
- ldrgeb r2, [r1], #0x01
- strb ip, [r3], #0x01
- ldrgtb ip, [r1]
- strgeb r2, [r3], #0x01
- strgtb ip, [r3]
- RET
-
-
-/*
- * At this point, it has not been possible to word align both buffers.
- * The destination buffer is word aligned, but the source buffer is not.
- */
-.Lmemcpy_bad_align:
- stmfd sp!, {r4-r7}
- bic r1, r1, #0x03
- cmp ip, #2
- ldr ip, [r1], #0x04
- bgt .Lmemcpy_bad3
- beq .Lmemcpy_bad2
- b .Lmemcpy_bad1
-
-.Lmemcpy_bad1_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #8
-#else
- mov r4, ip, lsr #8
-#endif
- ldr r5, [r1], #0x04
- pld [r1, #0x018]
- ldr r6, [r1], #0x04
- ldr r7, [r1], #0x04
- ldr ip, [r1], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #24
- mov r5, r5, lsl #8
- orr r5, r5, r6, lsr #24
- mov r6, r6, lsl #8
- orr r6, r6, r7, lsr #24
- mov r7, r7, lsl #8
- orr r7, r7, ip, lsr #24
-#else
- orr r4, r4, r5, lsl #24
- mov r5, r5, lsr #8
- orr r5, r5, r6, lsl #24
- mov r6, r6, lsr #8
- orr r6, r6, r7, lsl #24
- mov r7, r7, lsr #8
- orr r7, r7, ip, lsl #24
-#endif
- str r4, [r3], #0x04
- str r5, [r3], #0x04
- str r6, [r3], #0x04
- str r7, [r3], #0x04
-.Lmemcpy_bad1:
- subs r2, r2, #0x10
- bge .Lmemcpy_bad1_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r1, r1, #0x03
- blt .Lmemcpy_bad_done
-
-.Lmemcpy_bad1_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #8
-#else
- mov r4, ip, lsr #8
-#endif
- ldr ip, [r1], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #24
-#else
- orr r4, r4, ip, lsl #24
-#endif
- str r4, [r3], #0x04
- bge .Lmemcpy_bad1_loop4
- sub r1, r1, #0x03
- b .Lmemcpy_bad_done
-
-.Lmemcpy_bad2_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #16
-#else
- mov r4, ip, lsr #16
-#endif
- ldr r5, [r1], #0x04
- pld [r1, #0x018]
- ldr r6, [r1], #0x04
- ldr r7, [r1], #0x04
- ldr ip, [r1], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #16
- mov r5, r5, lsl #16
- orr r5, r5, r6, lsr #16
- mov r6, r6, lsl #16
- orr r6, r6, r7, lsr #16
- mov r7, r7, lsl #16
- orr r7, r7, ip, lsr #16
-#else
- orr r4, r4, r5, lsl #16
- mov r5, r5, lsr #16
- orr r5, r5, r6, lsl #16
- mov r6, r6, lsr #16
- orr r6, r6, r7, lsl #16
- mov r7, r7, lsr #16
- orr r7, r7, ip, lsl #16
-#endif
- str r4, [r3], #0x04
- str r5, [r3], #0x04
- str r6, [r3], #0x04
- str r7, [r3], #0x04
-.Lmemcpy_bad2:
- subs r2, r2, #0x10
- bge .Lmemcpy_bad2_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r1, r1, #0x02
- blt .Lmemcpy_bad_done
-
-.Lmemcpy_bad2_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #16
-#else
- mov r4, ip, lsr #16
-#endif
- ldr ip, [r1], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #16
-#else
- orr r4, r4, ip, lsl #16
-#endif
- str r4, [r3], #0x04
- bge .Lmemcpy_bad2_loop4
- sub r1, r1, #0x02
- b .Lmemcpy_bad_done
-
-.Lmemcpy_bad3_loop16:
-#ifdef __ARMEB__
- mov r4, ip, lsl #24
-#else
- mov r4, ip, lsr #24
-#endif
- ldr r5, [r1], #0x04
- pld [r1, #0x018]
- ldr r6, [r1], #0x04
- ldr r7, [r1], #0x04
- ldr ip, [r1], #0x04
-#ifdef __ARMEB__
- orr r4, r4, r5, lsr #8
- mov r5, r5, lsl #24
- orr r5, r5, r6, lsr #8
- mov r6, r6, lsl #24
- orr r6, r6, r7, lsr #8
- mov r7, r7, lsl #24
- orr r7, r7, ip, lsr #8
-#else
- orr r4, r4, r5, lsl #8
- mov r5, r5, lsr #24
- orr r5, r5, r6, lsl #8
- mov r6, r6, lsr #24
- orr r6, r6, r7, lsl #8
- mov r7, r7, lsr #24
- orr r7, r7, ip, lsl #8
-#endif
- str r4, [r3], #0x04
- str r5, [r3], #0x04
- str r6, [r3], #0x04
- str r7, [r3], #0x04
-.Lmemcpy_bad3:
- subs r2, r2, #0x10
- bge .Lmemcpy_bad3_loop16
-
- adds r2, r2, #0x10
- ldmeqfd sp!, {r4-r7}
- RETeq /* Return now if done */
- subs r2, r2, #0x04
- sublt r1, r1, #0x01
- blt .Lmemcpy_bad_done
-
-.Lmemcpy_bad3_loop4:
-#ifdef __ARMEB__
- mov r4, ip, lsl #24
-#else
- mov r4, ip, lsr #24
-#endif
- ldr ip, [r1], #0x04
- subs r2, r2, #0x04
-#ifdef __ARMEB__
- orr r4, r4, ip, lsr #8
-#else
- orr r4, r4, ip, lsl #8
-#endif
- str r4, [r3], #0x04
- bge .Lmemcpy_bad3_loop4
- sub r1, r1, #0x01
-
-.Lmemcpy_bad_done:
- ldmfd sp!, {r4-r7}
- adds r2, r2, #0x04
- RETeq
- ldrb ip, [r1], #0x01
- cmp r2, #0x02
- ldrgeb r2, [r1], #0x01
- strb ip, [r3], #0x01
- ldrgtb ip, [r1]
- strgeb r2, [r3], #0x01
- strgtb ip, [r3]
- RET
-
-
-/*
- * Handle short copies (less than 16 bytes), possibly misaligned.
- * Some of these are *very* common, thanks to the network stack,
- * and so are handled specially.
- */
-.Lmemcpy_short:
- add pc, pc, r2, lsl #2
- nop
- RET /* 0x00 */
- b .Lmemcpy_bytewise /* 0x01 */
- b .Lmemcpy_bytewise /* 0x02 */
- b .Lmemcpy_bytewise /* 0x03 */
- b .Lmemcpy_4 /* 0x04 */
- b .Lmemcpy_bytewise /* 0x05 */
- b .Lmemcpy_6 /* 0x06 */
- b .Lmemcpy_bytewise /* 0x07 */
- b .Lmemcpy_8 /* 0x08 */
- b .Lmemcpy_bytewise /* 0x09 */
- b .Lmemcpy_bytewise /* 0x0a */
- b .Lmemcpy_bytewise /* 0x0b */
- b .Lmemcpy_c /* 0x0c */
-.Lmemcpy_bytewise:
- mov r3, r0 /* We must not clobber r0 */
- ldrb ip, [r1], #0x01
-1: subs r2, r2, #0x01
- strb ip, [r3], #0x01
- ldrneb ip, [r1], #0x01
- bne 1b
- RET
-
-/******************************************************************************
- * Special case for 4 byte copies
- */
-#define LMEMCPY_4_LOG2 6 /* 64 bytes */
-#define LMEMCPY_4_PAD .align LMEMCPY_4_LOG2
- LMEMCPY_4_PAD
-.Lmemcpy_4:
- and r2, r1, #0x03
- orr r2, r2, r0, lsl #2
- ands r2, r2, #0x0f
- sub r3, pc, #0x14
- addne pc, r3, r2, lsl #LMEMCPY_4_LOG2
-
-/*
- * 0000: dst is 32-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1]
- str r2, [r0]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 0001: dst is 32-bit aligned, src is 8-bit aligned
- */
- ldr r3, [r1, #-1] /* BE:r3 = x012 LE:r3 = 210x */
- ldr r2, [r1, #3] /* BE:r2 = 3xxx LE:r2 = xxx3 */
-#ifdef __ARMEB__
- mov r3, r3, lsl #8 /* r3 = 012. */
- orr r3, r3, r2, lsr #24 /* r3 = 0123 */
-#else
- mov r3, r3, lsr #8 /* r3 = .210 */
- orr r3, r3, r2, lsl #24 /* r3 = 3210 */
-#endif
- str r3, [r0]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 0010: dst is 32-bit aligned, src is 16-bit aligned
- */
-#ifdef __ARMEB__
- ldrh r3, [r1]
- ldrh r2, [r1, #0x02]
-#else
- ldrh r3, [r1, #0x02]
- ldrh r2, [r1]
-#endif
- orr r3, r2, r3, lsl #16
- str r3, [r0]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 0011: dst is 32-bit aligned, src is 8-bit aligned
- */
- ldr r3, [r1, #-3] /* BE:r3 = xxx0 LE:r3 = 0xxx */
- ldr r2, [r1, #1] /* BE:r2 = 123x LE:r2 = x321 */
-#ifdef __ARMEB__
- mov r3, r3, lsl #24 /* r3 = 0... */
- orr r3, r3, r2, lsr #8 /* r3 = 0123 */
-#else
- mov r3, r3, lsr #24 /* r3 = ...0 */
- orr r3, r3, r2, lsl #8 /* r3 = 3210 */
-#endif
- str r3, [r0]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 0100: dst is 8-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1]
-#ifdef __ARMEB__
- strb r2, [r0, #0x03]
- mov r3, r2, lsr #8
- mov r1, r2, lsr #24
- strb r1, [r0]
-#else
- strb r2, [r0]
- mov r3, r2, lsr #8
- mov r1, r2, lsr #24
- strb r1, [r0, #0x03]
-#endif
- strh r3, [r0, #0x01]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 0101: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldrb r1, [r1, #0x03]
- strb r2, [r0]
- strh r3, [r0, #0x01]
- strb r1, [r0, #0x03]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 0110: dst is 8-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldrh r3, [r1, #0x02] /* LE:r3 = ..23 LE:r3 = ..32 */
-#ifdef __ARMEB__
- mov r1, r2, lsr #8 /* r1 = ...0 */
- strb r1, [r0]
- mov r2, r2, lsl #8 /* r2 = .01. */
- orr r2, r2, r3, lsr #8 /* r2 = .012 */
-#else
- strb r2, [r0]
- mov r2, r2, lsr #8 /* r2 = ...1 */
- orr r2, r2, r3, lsl #8 /* r2 = .321 */
- mov r3, r3, lsr #8 /* r3 = ...3 */
-#endif
- strh r2, [r0, #0x01]
- strb r3, [r0, #0x03]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 0111: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldrb r1, [r1, #0x03]
- strb r2, [r0]
- strh r3, [r0, #0x01]
- strb r1, [r0, #0x03]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 1000: dst is 16-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1]
-#ifdef __ARMEB__
- strh r2, [r0, #0x02]
- mov r3, r2, lsr #16
- strh r3, [r0]
-#else
- strh r2, [r0]
- mov r3, r2, lsr #16
- strh r3, [r0, #0x02]
-#endif
- RET
- LMEMCPY_4_PAD
-
-/*
- * 1001: dst is 16-bit aligned, src is 8-bit aligned
- */
- ldr r2, [r1, #-1] /* BE:r2 = x012 LE:r2 = 210x */
- ldr r3, [r1, #3] /* BE:r3 = 3xxx LE:r3 = xxx3 */
- mov r1, r2, lsr #8 /* BE:r1 = .x01 LE:r1 = .210 */
- strh r1, [r0]
-#ifdef __ARMEB__
- mov r2, r2, lsl #8 /* r2 = 012. */
- orr r2, r2, r3, lsr #24 /* r2 = 0123 */
-#else
- mov r2, r2, lsr #24 /* r2 = ...2 */
- orr r2, r2, r3, lsl #8 /* r2 = xx32 */
-#endif
- strh r2, [r0, #0x02]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 1010: dst is 16-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1]
- ldrh r3, [r1, #0x02]
- strh r2, [r0]
- strh r3, [r0, #0x02]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 1011: dst is 16-bit aligned, src is 8-bit aligned
- */
- ldr r3, [r1, #1] /* BE:r3 = 123x LE:r3 = x321 */
- ldr r2, [r1, #-3] /* BE:r2 = xxx0 LE:r2 = 0xxx */
- mov r1, r3, lsr #8 /* BE:r1 = .123 LE:r1 = .x32 */
- strh r1, [r0, #0x02]
-#ifdef __ARMEB__
- mov r3, r3, lsr #24 /* r3 = ...1 */
- orr r3, r3, r2, lsl #8 /* r3 = xx01 */
-#else
- mov r3, r3, lsl #8 /* r3 = 321. */
- orr r3, r3, r2, lsr #24 /* r3 = 3210 */
-#endif
- strh r3, [r0]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 1100: dst is 8-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1] /* BE:r2 = 0123 LE:r2 = 3210 */
-#ifdef __ARMEB__
- strb r2, [r0, #0x03]
- mov r3, r2, lsr #8
- mov r1, r2, lsr #24
- strh r3, [r0, #0x01]
- strb r1, [r0]
-#else
- strb r2, [r0]
- mov r3, r2, lsr #8
- mov r1, r2, lsr #24
- strh r3, [r0, #0x01]
- strb r1, [r0, #0x03]
-#endif
- RET
- LMEMCPY_4_PAD
-
-/*
- * 1101: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldrb r1, [r1, #0x03]
- strb r2, [r0]
- strh r3, [r0, #0x01]
- strb r1, [r0, #0x03]
- RET
- LMEMCPY_4_PAD
-
-/*
- * 1110: dst is 8-bit aligned, src is 16-bit aligned
- */
-#ifdef __ARMEB__
- ldrh r3, [r1, #0x02] /* BE:r3 = ..23 LE:r3 = ..32 */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- strb r3, [r0, #0x03]
- mov r3, r3, lsr #8 /* r3 = ...2 */
- orr r3, r3, r2, lsl #8 /* r3 = ..12 */
- strh r3, [r0, #0x01]
- mov r2, r2, lsr #8 /* r2 = ...0 */
- strb r2, [r0]
-#else
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldrh r3, [r1, #0x02] /* BE:r3 = ..23 LE:r3 = ..32 */
- strb r2, [r0]
- mov r2, r2, lsr #8 /* r2 = ...1 */
- orr r2, r2, r3, lsl #8 /* r2 = .321 */
- strh r2, [r0, #0x01]
- mov r3, r3, lsr #8 /* r3 = ...3 */
- strb r3, [r0, #0x03]
-#endif
- RET
- LMEMCPY_4_PAD
-
-/*
- * 1111: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldrb r1, [r1, #0x03]
- strb r2, [r0]
- strh r3, [r0, #0x01]
- strb r1, [r0, #0x03]
- RET
- LMEMCPY_4_PAD
-
-
-/******************************************************************************
- * Special case for 6 byte copies
- */
-#define LMEMCPY_6_LOG2 6 /* 64 bytes */
-#define LMEMCPY_6_PAD .align LMEMCPY_6_LOG2
- LMEMCPY_6_PAD
-.Lmemcpy_6:
- and r2, r1, #0x03
- orr r2, r2, r0, lsl #2
- ands r2, r2, #0x0f
- sub r3, pc, #0x14
- addne pc, r3, r2, lsl #LMEMCPY_6_LOG2
-
-/*
- * 0000: dst is 32-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1]
- ldrh r3, [r1, #0x04]
- str r2, [r0]
- strh r3, [r0, #0x04]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 0001: dst is 32-bit aligned, src is 8-bit aligned
- */
- ldr r2, [r1, #-1] /* BE:r2 = x012 LE:r2 = 210x */
- ldr r3, [r1, #0x03] /* BE:r3 = 345x LE:r3 = x543 */
-#ifdef __ARMEB__
- mov r2, r2, lsl #8 /* r2 = 012. */
- orr r2, r2, r3, lsr #24 /* r2 = 0123 */
-#else
- mov r2, r2, lsr #8 /* r2 = .210 */
- orr r2, r2, r3, lsl #24 /* r2 = 3210 */
-#endif
- mov r3, r3, lsr #8 /* BE:r3 = .345 LE:r3 = .x54 */
- str r2, [r0]
- strh r3, [r0, #0x04]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 0010: dst is 32-bit aligned, src is 16-bit aligned
- */
- ldr r3, [r1, #0x02] /* BE:r3 = 2345 LE:r3 = 5432 */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
-#ifdef __ARMEB__
- mov r1, r3, lsr #16 /* r1 = ..23 */
- orr r1, r1, r2, lsl #16 /* r1 = 0123 */
- str r1, [r0]
- strh r3, [r0, #0x04]
-#else
- mov r1, r3, lsr #16 /* r1 = ..54 */
- orr r2, r2, r3, lsl #16 /* r2 = 3210 */
- str r2, [r0]
- strh r1, [r0, #0x04]
-#endif
- RET
- LMEMCPY_6_PAD
-
-/*
- * 0011: dst is 32-bit aligned, src is 8-bit aligned
- */
- ldr r2, [r1, #-3] /* BE:r2 = xxx0 LE:r2 = 0xxx */
- ldr r3, [r1, #1] /* BE:r3 = 1234 LE:r3 = 4321 */
- ldr r1, [r1, #5] /* BE:r1 = 5xxx LE:r3 = xxx5 */
-#ifdef __ARMEB__
- mov r2, r2, lsl #24 /* r2 = 0... */
- orr r2, r2, r3, lsr #8 /* r2 = 0123 */
- mov r3, r3, lsl #8 /* r3 = 234. */
- orr r1, r3, r1, lsr #24 /* r1 = 2345 */
-#else
- mov r2, r2, lsr #24 /* r2 = ...0 */
- orr r2, r2, r3, lsl #8 /* r2 = 3210 */
- mov r1, r1, lsl #8 /* r1 = xx5. */
- orr r1, r1, r3, lsr #24 /* r1 = xx54 */
-#endif
- str r2, [r0]
- strh r1, [r0, #0x04]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 0100: dst is 8-bit aligned, src is 32-bit aligned
- */
- ldr r3, [r1] /* BE:r3 = 0123 LE:r3 = 3210 */
- ldrh r2, [r1, #0x04] /* BE:r2 = ..45 LE:r2 = ..54 */
- mov r1, r3, lsr #8 /* BE:r1 = .012 LE:r1 = .321 */
- strh r1, [r0, #0x01]
-#ifdef __ARMEB__
- mov r1, r3, lsr #24 /* r1 = ...0 */
- strb r1, [r0]
- mov r3, r3, lsl #8 /* r3 = 123. */
- orr r3, r3, r2, lsr #8 /* r3 = 1234 */
-#else
- strb r3, [r0]
- mov r3, r3, lsr #24 /* r3 = ...3 */
- orr r3, r3, r2, lsl #8 /* r3 = .543 */
- mov r2, r2, lsr #8 /* r2 = ...5 */
-#endif
- strh r3, [r0, #0x03]
- strb r2, [r0, #0x05]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 0101: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldrh ip, [r1, #0x03]
- ldrb r1, [r1, #0x05]
- strb r2, [r0]
- strh r3, [r0, #0x01]
- strh ip, [r0, #0x03]
- strb r1, [r0, #0x05]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 0110: dst is 8-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldr r1, [r1, #0x02] /* BE:r1 = 2345 LE:r1 = 5432 */
-#ifdef __ARMEB__
- mov r3, r2, lsr #8 /* r3 = ...0 */
- strb r3, [r0]
- strb r1, [r0, #0x05]
- mov r3, r1, lsr #8 /* r3 = .234 */
- strh r3, [r0, #0x03]
- mov r3, r2, lsl #8 /* r3 = .01. */
- orr r3, r3, r1, lsr #24 /* r3 = .012 */
- strh r3, [r0, #0x01]
-#else
- strb r2, [r0]
- mov r3, r1, lsr #24
- strb r3, [r0, #0x05]
- mov r3, r1, lsr #8 /* r3 = .543 */
- strh r3, [r0, #0x03]
- mov r3, r2, lsr #8 /* r3 = ...1 */
- orr r3, r3, r1, lsl #8 /* r3 = 4321 */
- strh r3, [r0, #0x01]
-#endif
- RET
- LMEMCPY_6_PAD
-
-/*
- * 0111: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldrh ip, [r1, #0x03]
- ldrb r1, [r1, #0x05]
- strb r2, [r0]
- strh r3, [r0, #0x01]
- strh ip, [r0, #0x03]
- strb r1, [r0, #0x05]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 1000: dst is 16-bit aligned, src is 32-bit aligned
- */
-#ifdef __ARMEB__
- ldr r2, [r1] /* r2 = 0123 */
- ldrh r3, [r1, #0x04] /* r3 = ..45 */
- mov r1, r2, lsr #16 /* r1 = ..01 */
- orr r3, r3, r2, lsl#16 /* r3 = 2345 */
- strh r1, [r0]
- str r3, [r0, #0x02]
-#else
- ldrh r2, [r1, #0x04] /* r2 = ..54 */
- ldr r3, [r1] /* r3 = 3210 */
- mov r2, r2, lsl #16 /* r2 = 54.. */
- orr r2, r2, r3, lsr #16 /* r2 = 5432 */
- strh r3, [r0]
- str r2, [r0, #0x02]
-#endif
- RET
- LMEMCPY_6_PAD
-
-/*
- * 1001: dst is 16-bit aligned, src is 8-bit aligned
- */
- ldr r3, [r1, #-1] /* BE:r3 = x012 LE:r3 = 210x */
- ldr r2, [r1, #3] /* BE:r2 = 345x LE:r2 = x543 */
- mov r1, r3, lsr #8 /* BE:r1 = .x01 LE:r1 = .210 */
-#ifdef __ARMEB__
- mov r2, r2, lsr #8 /* r2 = .345 */
- orr r2, r2, r3, lsl #24 /* r2 = 2345 */
-#else
- mov r2, r2, lsl #8 /* r2 = 543. */
- orr r2, r2, r3, lsr #24 /* r2 = 5432 */
-#endif
- strh r1, [r0]
- str r2, [r0, #0x02]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 1010: dst is 16-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1]
- ldr r3, [r1, #0x02]
- strh r2, [r0]
- str r3, [r0, #0x02]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 1011: dst is 16-bit aligned, src is 8-bit aligned
- */
- ldrb r3, [r1] /* r3 = ...0 */
- ldr r2, [r1, #0x01] /* BE:r2 = 1234 LE:r2 = 4321 */
- ldrb r1, [r1, #0x05] /* r1 = ...5 */
-#ifdef __ARMEB__
- mov r3, r3, lsl #8 /* r3 = ..0. */
- orr r3, r3, r2, lsr #24 /* r3 = ..01 */
- orr r1, r1, r2, lsl #8 /* r1 = 2345 */
-#else
- orr r3, r3, r2, lsl #8 /* r3 = 3210 */
- mov r1, r1, lsl #24 /* r1 = 5... */
- orr r1, r1, r2, lsr #8 /* r1 = 5432 */
-#endif
- strh r3, [r0]
- str r1, [r0, #0x02]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 1100: dst is 8-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1] /* BE:r2 = 0123 LE:r2 = 3210 */
- ldrh r1, [r1, #0x04] /* BE:r1 = ..45 LE:r1 = ..54 */
-#ifdef __ARMEB__
- mov r3, r2, lsr #24 /* r3 = ...0 */
- strb r3, [r0]
- mov r2, r2, lsl #8 /* r2 = 123. */
- orr r2, r2, r1, lsr #8 /* r2 = 1234 */
-#else
- strb r2, [r0]
- mov r2, r2, lsr #8 /* r2 = .321 */
- orr r2, r2, r1, lsl #24 /* r2 = 4321 */
- mov r1, r1, lsr #8 /* r1 = ...5 */
-#endif
- str r2, [r0, #0x01]
- strb r1, [r0, #0x05]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 1101: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldrh ip, [r1, #0x03]
- ldrb r1, [r1, #0x05]
- strb r2, [r0]
- strh r3, [r0, #0x01]
- strh ip, [r0, #0x03]
- strb r1, [r0, #0x05]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 1110: dst is 8-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldr r1, [r1, #0x02] /* BE:r1 = 2345 LE:r1 = 5432 */
-#ifdef __ARMEB__
- mov r3, r2, lsr #8 /* r3 = ...0 */
- strb r3, [r0]
- mov r2, r2, lsl #24 /* r2 = 1... */
- orr r2, r2, r1, lsr #8 /* r2 = 1234 */
-#else
- strb r2, [r0]
- mov r2, r2, lsr #8 /* r2 = ...1 */
- orr r2, r2, r1, lsl #8 /* r2 = 4321 */
- mov r1, r1, lsr #24 /* r1 = ...5 */
-#endif
- str r2, [r0, #0x01]
- strb r1, [r0, #0x05]
- RET
- LMEMCPY_6_PAD
-
-/*
- * 1111: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldr r3, [r1, #0x01]
- ldrb r1, [r1, #0x05]
- strb r2, [r0]
- str r3, [r0, #0x01]
- strb r1, [r0, #0x05]
- RET
- LMEMCPY_6_PAD
-
-
-/******************************************************************************
- * Special case for 8 byte copies
- */
-#define LMEMCPY_8_LOG2 6 /* 64 bytes */
-#define LMEMCPY_8_PAD .align LMEMCPY_8_LOG2
- LMEMCPY_8_PAD
-.Lmemcpy_8:
- and r2, r1, #0x03
- orr r2, r2, r0, lsl #2
- ands r2, r2, #0x0f
- sub r3, pc, #0x14
- addne pc, r3, r2, lsl #LMEMCPY_8_LOG2
-
-/*
- * 0000: dst is 32-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1]
- ldr r3, [r1, #0x04]
- str r2, [r0]
- str r3, [r0, #0x04]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 0001: dst is 32-bit aligned, src is 8-bit aligned
- */
- ldr r3, [r1, #-1] /* BE:r3 = x012 LE:r3 = 210x */
- ldr r2, [r1, #0x03] /* BE:r2 = 3456 LE:r2 = 6543 */
- ldrb r1, [r1, #0x07] /* r1 = ...7 */
-#ifdef __ARMEB__
- mov r3, r3, lsl #8 /* r3 = 012. */
- orr r3, r3, r2, lsr #24 /* r3 = 0123 */
- orr r2, r1, r2, lsl #8 /* r2 = 4567 */
-#else
- mov r3, r3, lsr #8 /* r3 = .210 */
- orr r3, r3, r2, lsl #24 /* r3 = 3210 */
- mov r1, r1, lsl #24 /* r1 = 7... */
- orr r2, r1, r2, lsr #8 /* r2 = 7654 */
-#endif
- str r3, [r0]
- str r2, [r0, #0x04]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 0010: dst is 32-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldr r3, [r1, #0x02] /* BE:r3 = 2345 LE:r3 = 5432 */
- ldrh r1, [r1, #0x06] /* BE:r1 = ..67 LE:r1 = ..76 */
-#ifdef __ARMEB__
- mov r2, r2, lsl #16 /* r2 = 01.. */
- orr r2, r2, r3, lsr #16 /* r2 = 0123 */
- orr r3, r1, r3, lsl #16 /* r3 = 4567 */
-#else
- orr r2, r2, r3, lsl #16 /* r2 = 3210 */
- mov r3, r3, lsr #16 /* r3 = ..54 */
- orr r3, r3, r1, lsl #16 /* r3 = 7654 */
-#endif
- str r2, [r0]
- str r3, [r0, #0x04]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 0011: dst is 32-bit aligned, src is 8-bit aligned
- */
- ldrb r3, [r1] /* r3 = ...0 */
- ldr r2, [r1, #0x01] /* BE:r2 = 1234 LE:r2 = 4321 */
- ldr r1, [r1, #0x05] /* BE:r1 = 567x LE:r1 = x765 */
-#ifdef __ARMEB__
- mov r3, r3, lsl #24 /* r3 = 0... */
- orr r3, r3, r2, lsr #8 /* r3 = 0123 */
- mov r2, r2, lsl #24 /* r2 = 4... */
- orr r2, r2, r1, lsr #8 /* r2 = 4567 */
-#else
- orr r3, r3, r2, lsl #8 /* r3 = 3210 */
- mov r2, r2, lsr #24 /* r2 = ...4 */
- orr r2, r2, r1, lsl #8 /* r2 = 7654 */
-#endif
- str r3, [r0]
- str r2, [r0, #0x04]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 0100: dst is 8-bit aligned, src is 32-bit aligned
- */
- ldr r3, [r1] /* BE:r3 = 0123 LE:r3 = 3210 */
- ldr r2, [r1, #0x04] /* BE:r2 = 4567 LE:r2 = 7654 */
-#ifdef __ARMEB__
- mov r1, r3, lsr #24 /* r1 = ...0 */
- strb r1, [r0]
- mov r1, r3, lsr #8 /* r1 = .012 */
- strb r2, [r0, #0x07]
- mov r3, r3, lsl #24 /* r3 = 3... */
- orr r3, r3, r2, lsr #8 /* r3 = 3456 */
-#else
- strb r3, [r0]
- mov r1, r2, lsr #24 /* r1 = ...7 */
- strb r1, [r0, #0x07]
- mov r1, r3, lsr #8 /* r1 = .321 */
- mov r3, r3, lsr #24 /* r3 = ...3 */
- orr r3, r3, r2, lsl #8 /* r3 = 6543 */
-#endif
- strh r1, [r0, #0x01]
- str r3, [r0, #0x03]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 0101: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldr ip, [r1, #0x03]
- ldrb r1, [r1, #0x07]
- strb r2, [r0]
- strh r3, [r0, #0x01]
- str ip, [r0, #0x03]
- strb r1, [r0, #0x07]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 0110: dst is 8-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldr r3, [r1, #0x02] /* BE:r3 = 2345 LE:r3 = 5432 */
- ldrh r1, [r1, #0x06] /* BE:r1 = ..67 LE:r1 = ..76 */
-#ifdef __ARMEB__
- mov ip, r2, lsr #8 /* ip = ...0 */
- strb ip, [r0]
- mov ip, r2, lsl #8 /* ip = .01. */
- orr ip, ip, r3, lsr #24 /* ip = .012 */
- strb r1, [r0, #0x07]
- mov r3, r3, lsl #8 /* r3 = 345. */
- orr r3, r3, r1, lsr #8 /* r3 = 3456 */
-#else
- strb r2, [r0] /* 0 */
- mov ip, r1, lsr #8 /* ip = ...7 */
- strb ip, [r0, #0x07] /* 7 */
- mov ip, r2, lsr #8 /* ip = ...1 */
- orr ip, ip, r3, lsl #8 /* ip = 4321 */
- mov r3, r3, lsr #8 /* r3 = .543 */
- orr r3, r3, r1, lsl #24 /* r3 = 6543 */
-#endif
- strh ip, [r0, #0x01]
- str r3, [r0, #0x03]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 0111: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r3, [r1] /* r3 = ...0 */
- ldr ip, [r1, #0x01] /* BE:ip = 1234 LE:ip = 4321 */
- ldrh r2, [r1, #0x05] /* BE:r2 = ..56 LE:r2 = ..65 */
- ldrb r1, [r1, #0x07] /* r1 = ...7 */
- strb r3, [r0]
- mov r3, ip, lsr #16 /* BE:r3 = ..12 LE:r3 = ..43 */
-#ifdef __ARMEB__
- strh r3, [r0, #0x01]
- orr r2, r2, ip, lsl #16 /* r2 = 3456 */
-#else
- strh ip, [r0, #0x01]
- orr r2, r3, r2, lsl #16 /* r2 = 6543 */
-#endif
- str r2, [r0, #0x03]
- strb r1, [r0, #0x07]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 1000: dst is 16-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1] /* BE:r2 = 0123 LE:r2 = 3210 */
- ldr r3, [r1, #0x04] /* BE:r3 = 4567 LE:r3 = 7654 */
- mov r1, r2, lsr #16 /* BE:r1 = ..01 LE:r1 = ..32 */
-#ifdef __ARMEB__
- strh r1, [r0]
- mov r1, r3, lsr #16 /* r1 = ..45 */
- orr r2, r1 ,r2, lsl #16 /* r2 = 2345 */
-#else
- strh r2, [r0]
- orr r2, r1, r3, lsl #16 /* r2 = 5432 */
- mov r3, r3, lsr #16 /* r3 = ..76 */
-#endif
- str r2, [r0, #0x02]
- strh r3, [r0, #0x06]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 1001: dst is 16-bit aligned, src is 8-bit aligned
- */
- ldr r2, [r1, #-1] /* BE:r2 = x012 LE:r2 = 210x */
- ldr r3, [r1, #0x03] /* BE:r3 = 3456 LE:r3 = 6543 */
- ldrb ip, [r1, #0x07] /* ip = ...7 */
- mov r1, r2, lsr #8 /* BE:r1 = .x01 LE:r1 = .210 */
- strh r1, [r0]
-#ifdef __ARMEB__
- mov r1, r2, lsl #24 /* r1 = 2... */
- orr r1, r1, r3, lsr #8 /* r1 = 2345 */
- orr r3, ip, r3, lsl #8 /* r3 = 4567 */
-#else
- mov r1, r2, lsr #24 /* r1 = ...2 */
- orr r1, r1, r3, lsl #8 /* r1 = 5432 */
- mov r3, r3, lsr #24 /* r3 = ...6 */
- orr r3, r3, ip, lsl #8 /* r3 = ..76 */
-#endif
- str r1, [r0, #0x02]
- strh r3, [r0, #0x06]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 1010: dst is 16-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1]
- ldr ip, [r1, #0x02]
- ldrh r3, [r1, #0x06]
- strh r2, [r0]
- str ip, [r0, #0x02]
- strh r3, [r0, #0x06]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 1011: dst is 16-bit aligned, src is 8-bit aligned
- */
- ldr r3, [r1, #0x05] /* BE:r3 = 567x LE:r3 = x765 */
- ldr r2, [r1, #0x01] /* BE:r2 = 1234 LE:r2 = 4321 */
- ldrb ip, [r1] /* ip = ...0 */
- mov r1, r3, lsr #8 /* BE:r1 = .567 LE:r1 = .x76 */
- strh r1, [r0, #0x06]
-#ifdef __ARMEB__
- mov r3, r3, lsr #24 /* r3 = ...5 */
- orr r3, r3, r2, lsl #8 /* r3 = 2345 */
- mov r2, r2, lsr #24 /* r2 = ...1 */
- orr r2, r2, ip, lsl #8 /* r2 = ..01 */
-#else
- mov r3, r3, lsl #24 /* r3 = 5... */
- orr r3, r3, r2, lsr #8 /* r3 = 5432 */
- orr r2, ip, r2, lsl #8 /* r2 = 3210 */
-#endif
- str r3, [r0, #0x02]
- strh r2, [r0]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 1100: dst is 8-bit aligned, src is 32-bit aligned
- */
- ldr r3, [r1, #0x04] /* BE:r3 = 4567 LE:r3 = 7654 */
- ldr r2, [r1] /* BE:r2 = 0123 LE:r2 = 3210 */
- mov r1, r3, lsr #8 /* BE:r1 = .456 LE:r1 = .765 */
- strh r1, [r0, #0x05]
-#ifdef __ARMEB__
- strb r3, [r0, #0x07]
- mov r1, r2, lsr #24 /* r1 = ...0 */
- strb r1, [r0]
- mov r2, r2, lsl #8 /* r2 = 123. */
- orr r2, r2, r3, lsr #24 /* r2 = 1234 */
- str r2, [r0, #0x01]
-#else
- strb r2, [r0]
- mov r1, r3, lsr #24 /* r1 = ...7 */
- strb r1, [r0, #0x07]
- mov r2, r2, lsr #8 /* r2 = .321 */
- orr r2, r2, r3, lsl #24 /* r2 = 4321 */
- str r2, [r0, #0x01]
-#endif
- RET
- LMEMCPY_8_PAD
-
-/*
- * 1101: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r3, [r1] /* r3 = ...0 */
- ldrh r2, [r1, #0x01] /* BE:r2 = ..12 LE:r2 = ..21 */
- ldr ip, [r1, #0x03] /* BE:ip = 3456 LE:ip = 6543 */
- ldrb r1, [r1, #0x07] /* r1 = ...7 */
- strb r3, [r0]
- mov r3, ip, lsr #16 /* BE:r3 = ..34 LE:r3 = ..65 */
-#ifdef __ARMEB__
- strh ip, [r0, #0x05]
- orr r2, r3, r2, lsl #16 /* r2 = 1234 */
-#else
- strh r3, [r0, #0x05]
- orr r2, r2, ip, lsl #16 /* r2 = 4321 */
-#endif
- str r2, [r0, #0x01]
- strb r1, [r0, #0x07]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 1110: dst is 8-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldr r3, [r1, #0x02] /* BE:r3 = 2345 LE:r3 = 5432 */
- ldrh r1, [r1, #0x06] /* BE:r1 = ..67 LE:r1 = ..76 */
-#ifdef __ARMEB__
- mov ip, r2, lsr #8 /* ip = ...0 */
- strb ip, [r0]
- mov ip, r2, lsl #24 /* ip = 1... */
- orr ip, ip, r3, lsr #8 /* ip = 1234 */
- strb r1, [r0, #0x07]
- mov r1, r1, lsr #8 /* r1 = ...6 */
- orr r1, r1, r3, lsl #8 /* r1 = 3456 */
-#else
- strb r2, [r0]
- mov ip, r2, lsr #8 /* ip = ...1 */
- orr ip, ip, r3, lsl #8 /* ip = 4321 */
- mov r2, r1, lsr #8 /* r2 = ...7 */
- strb r2, [r0, #0x07]
- mov r1, r1, lsl #8 /* r1 = .76. */
- orr r1, r1, r3, lsr #24 /* r1 = .765 */
-#endif
- str ip, [r0, #0x01]
- strh r1, [r0, #0x05]
- RET
- LMEMCPY_8_PAD
-
-/*
- * 1111: dst is 8-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1]
- ldr ip, [r1, #0x01]
- ldrh r3, [r1, #0x05]
- ldrb r1, [r1, #0x07]
- strb r2, [r0]
- str ip, [r0, #0x01]
- strh r3, [r0, #0x05]
- strb r1, [r0, #0x07]
- RET
- LMEMCPY_8_PAD
-
-/******************************************************************************
- * Special case for 12 byte copies
- */
-#define LMEMCPY_C_LOG2 7 /* 128 bytes */
-#define LMEMCPY_C_PAD .align LMEMCPY_C_LOG2
- LMEMCPY_C_PAD
-.Lmemcpy_c:
- and r2, r1, #0x03
- orr r2, r2, r0, lsl #2
- ands r2, r2, #0x0f
- sub r3, pc, #0x14
- addne pc, r3, r2, lsl #LMEMCPY_C_LOG2
-
-/*
- * 0000: dst is 32-bit aligned, src is 32-bit aligned
- */
- ldr r2, [r1]
- ldr r3, [r1, #0x04]
- ldr r1, [r1, #0x08]
- str r2, [r0]
- str r3, [r0, #0x04]
- str r1, [r0, #0x08]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 0001: dst is 32-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1, #0xb] /* r2 = ...B */
- ldr ip, [r1, #0x07] /* BE:ip = 789A LE:ip = A987 */
- ldr r3, [r1, #0x03] /* BE:r3 = 3456 LE:r3 = 6543 */
- ldr r1, [r1, #-1] /* BE:r1 = x012 LE:r1 = 210x */
-#ifdef __ARMEB__
- orr r2, r2, ip, lsl #8 /* r2 = 89AB */
- str r2, [r0, #0x08]
- mov r2, ip, lsr #24 /* r2 = ...7 */
- orr r2, r2, r3, lsl #8 /* r2 = 4567 */
- mov r1, r1, lsl #8 /* r1 = 012. */
- orr r1, r1, r3, lsr #24 /* r1 = 0123 */
-#else
- mov r2, r2, lsl #24 /* r2 = B... */
- orr r2, r2, ip, lsr #8 /* r2 = BA98 */
- str r2, [r0, #0x08]
- mov r2, ip, lsl #24 /* r2 = 7... */
- orr r2, r2, r3, lsr #8 /* r2 = 7654 */
- mov r1, r1, lsr #8 /* r1 = .210 */
- orr r1, r1, r3, lsl #24 /* r1 = 3210 */
-#endif
- str r2, [r0, #0x04]
- str r1, [r0]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 0010: dst is 32-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldr r3, [r1, #0x02] /* BE:r3 = 2345 LE:r3 = 5432 */
- ldr ip, [r1, #0x06] /* BE:ip = 6789 LE:ip = 9876 */
- ldrh r1, [r1, #0x0a] /* BE:r1 = ..AB LE:r1 = ..BA */
-#ifdef __ARMEB__
- mov r2, r2, lsl #16 /* r2 = 01.. */
- orr r2, r2, r3, lsr #16 /* r2 = 0123 */
- str r2, [r0]
- mov r3, r3, lsl #16 /* r3 = 45.. */
- orr r3, r3, ip, lsr #16 /* r3 = 4567 */
- orr r1, r1, ip, lsl #16 /* r1 = 89AB */
-#else
- orr r2, r2, r3, lsl #16 /* r2 = 3210 */
- str r2, [r0]
- mov r3, r3, lsr #16 /* r3 = ..54 */
- orr r3, r3, ip, lsl #16 /* r3 = 7654 */
- mov r1, r1, lsl #16 /* r1 = BA.. */
- orr r1, r1, ip, lsr #16 /* r1 = BA98 */
-#endif
- str r3, [r0, #0x04]
- str r1, [r0, #0x08]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 0011: dst is 32-bit aligned, src is 8-bit aligned
- */
- ldrb r2, [r1] /* r2 = ...0 */
- ldr r3, [r1, #0x01] /* BE:r3 = 1234 LE:r3 = 4321 */
- ldr ip, [r1, #0x05] /* BE:ip = 5678 LE:ip = 8765 */
- ldr r1, [r1, #0x09] /* BE:r1 = 9ABx LE:r1 = xBA9 */
-#ifdef __ARMEB__
- mov r2, r2, lsl #24 /* r2 = 0... */
- orr r2, r2, r3, lsr #8 /* r2 = 0123 */
- str r2, [r0]
- mov r3, r3, lsl #24 /* r3 = 4... */
- orr r3, r3, ip, lsr #8 /* r3 = 4567 */
- mov r1, r1, lsr #8 /* r1 = .9AB */
- orr r1, r1, ip, lsl #24 /* r1 = 89AB */
-#else
- orr r2, r2, r3, lsl #8 /* r2 = 3210 */
- str r2, [r0]
- mov r3, r3, lsr #24 /* r3 = ...4 */
- orr r3, r3, ip, lsl #8 /* r3 = 7654 */
- mov r1, r1, lsl #8 /* r1 = BA9. */
- orr r1, r1, ip, lsr #24 /* r1 = BA98 */
-#endif
- str r3, [r0, #0x04]
- str r1, [r0, #0x08]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 0100: dst is 8-bit aligned (byte 1), src is 32-bit aligned
- */
- ldr r2, [r1] /* BE:r2 = 0123 LE:r2 = 3210 */
- ldr r3, [r1, #0x04] /* BE:r3 = 4567 LE:r3 = 7654 */
- ldr ip, [r1, #0x08] /* BE:ip = 89AB LE:ip = BA98 */
- mov r1, r2, lsr #8 /* BE:r1 = .012 LE:r1 = .321 */
- strh r1, [r0, #0x01]
-#ifdef __ARMEB__
- mov r1, r2, lsr #24 /* r1 = ...0 */
- strb r1, [r0]
- mov r1, r2, lsl #24 /* r1 = 3... */
- orr r2, r1, r3, lsr #8 /* r1 = 3456 */
- mov r1, r3, lsl #24 /* r1 = 7... */
- orr r1, r1, ip, lsr #8 /* r1 = 789A */
-#else
- strb r2, [r0]
- mov r1, r2, lsr #24 /* r1 = ...3 */
- orr r2, r1, r3, lsl #8 /* r1 = 6543 */
- mov r1, r3, lsr #24 /* r1 = ...7 */
- orr r1, r1, ip, lsl #8 /* r1 = A987 */
- mov ip, ip, lsr #24 /* ip = ...B */
-#endif
- str r2, [r0, #0x03]
- str r1, [r0, #0x07]
- strb ip, [r0, #0x0b]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 0101: dst is 8-bit aligned (byte 1), src is 8-bit aligned (byte 1)
- */
- ldrb r2, [r1]
- ldrh r3, [r1, #0x01]
- ldr ip, [r1, #0x03]
- strb r2, [r0]
- ldr r2, [r1, #0x07]
- ldrb r1, [r1, #0x0b]
- strh r3, [r0, #0x01]
- str ip, [r0, #0x03]
- str r2, [r0, #0x07]
- strb r1, [r0, #0x0b]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 0110: dst is 8-bit aligned (byte 1), src is 16-bit aligned
- */
- ldrh r2, [r1] /* BE:r2 = ..01 LE:r2 = ..10 */
- ldr r3, [r1, #0x02] /* BE:r3 = 2345 LE:r3 = 5432 */
- ldr ip, [r1, #0x06] /* BE:ip = 6789 LE:ip = 9876 */
- ldrh r1, [r1, #0x0a] /* BE:r1 = ..AB LE:r1 = ..BA */
-#ifdef __ARMEB__
- mov r2, r2, ror #8 /* r2 = 1..0 */
- strb r2, [r0]
- mov r2, r2, lsr #16 /* r2 = ..1. */
- orr r2, r2, r3, lsr #24 /* r2 = ..12 */
- strh r2, [r0, #0x01]
- mov r2, r3, lsl #8 /* r2 = 345. */
- orr r3, r2, ip, lsr #24 /* r3 = 3456 */
- mov r2, ip, lsl #8 /* r2 = 789. */
- orr r2, r2, r1, lsr #8 /* r2 = 789A */
-#else
- strb r2, [r0]
- mov r2, r2, lsr #8 /* r2 = ...1 */
- orr r2, r2, r3, lsl #8 /* r2 = 4321 */
- strh r2, [r0, #0x01]
- mov r2, r3, lsr #8 /* r2 = .543 */
- orr r3, r2, ip, lsl #24 /* r3 = 6543 */
- mov r2, ip, lsr #8 /* r2 = .987 */
- orr r2, r2, r1, lsl #24 /* r2 = A987 */
- mov r1, r1, lsr #8 /* r1 = ...B */
-#endif
- str r3, [r0, #0x03]
- str r2, [r0, #0x07]
- strb r1, [r0, #0x0b]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 0111: dst is 8-bit aligned (byte 1), src is 8-bit aligned (byte 3)
- */
- ldrb r2, [r1]
- ldr r3, [r1, #0x01] /* BE:r3 = 1234 LE:r3 = 4321 */
- ldr ip, [r1, #0x05] /* BE:ip = 5678 LE:ip = 8765 */
- ldr r1, [r1, #0x09] /* BE:r1 = 9ABx LE:r1 = xBA9 */
- strb r2, [r0]
-#ifdef __ARMEB__
- mov r2, r3, lsr #16 /* r2 = ..12 */
- strh r2, [r0, #0x01]
- mov r3, r3, lsl #16 /* r3 = 34.. */
- orr r3, r3, ip, lsr #16 /* r3 = 3456 */
- mov ip, ip, lsl #16 /* ip = 78.. */
- orr ip, ip, r1, lsr #16 /* ip = 789A */
- mov r1, r1, lsr #8 /* r1 = .9AB */
-#else
- strh r3, [r0, #0x01]
- mov r3, r3, lsr #16 /* r3 = ..43 */
- orr r3, r3, ip, lsl #16 /* r3 = 6543 */
- mov ip, ip, lsr #16 /* ip = ..87 */
- orr ip, ip, r1, lsl #16 /* ip = A987 */
- mov r1, r1, lsr #16 /* r1 = ..xB */
-#endif
- str r3, [r0, #0x03]
- str ip, [r0, #0x07]
- strb r1, [r0, #0x0b]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 1000: dst is 16-bit aligned, src is 32-bit aligned
- */
- ldr ip, [r1] /* BE:ip = 0123 LE:ip = 3210 */
- ldr r3, [r1, #0x04] /* BE:r3 = 4567 LE:r3 = 7654 */
- ldr r2, [r1, #0x08] /* BE:r2 = 89AB LE:r2 = BA98 */
- mov r1, ip, lsr #16 /* BE:r1 = ..01 LE:r1 = ..32 */
-#ifdef __ARMEB__
- strh r1, [r0]
- mov r1, ip, lsl #16 /* r1 = 23.. */
- orr r1, r1, r3, lsr #16 /* r1 = 2345 */
- mov r3, r3, lsl #16 /* r3 = 67.. */
- orr r3, r3, r2, lsr #16 /* r3 = 6789 */
-#else
- strh ip, [r0]
- orr r1, r1, r3, lsl #16 /* r1 = 5432 */
- mov r3, r3, lsr #16 /* r3 = ..76 */
- orr r3, r3, r2, lsl #16 /* r3 = 9876 */
- mov r2, r2, lsr #16 /* r2 = ..BA */
-#endif
- str r1, [r0, #0x02]
- str r3, [r0, #0x06]
- strh r2, [r0, #0x0a]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 1001: dst is 16-bit aligned, src is 8-bit aligned (byte 1)
- */
- ldr r2, [r1, #-1] /* BE:r2 = x012 LE:r2 = 210x */
- ldr r3, [r1, #0x03] /* BE:r3 = 3456 LE:r3 = 6543 */
- mov ip, r2, lsr #8 /* BE:ip = .x01 LE:ip = .210 */
- strh ip, [r0]
- ldr ip, [r1, #0x07] /* BE:ip = 789A LE:ip = A987 */
- ldrb r1, [r1, #0x0b] /* r1 = ...B */
-#ifdef __ARMEB__
- mov r2, r2, lsl #24 /* r2 = 2... */
- orr r2, r2, r3, lsr #8 /* r2 = 2345 */
- mov r3, r3, lsl #24 /* r3 = 6... */
- orr r3, r3, ip, lsr #8 /* r3 = 6789 */
- orr r1, r1, ip, lsl #8 /* r1 = 89AB */
-#else
- mov r2, r2, lsr #24 /* r2 = ...2 */
- orr r2, r2, r3, lsl #8 /* r2 = 5432 */
- mov r3, r3, lsr #24 /* r3 = ...6 */
- orr r3, r3, ip, lsl #8 /* r3 = 9876 */
- mov r1, r1, lsl #8 /* r1 = ..B. */
- orr r1, r1, ip, lsr #24 /* r1 = ..BA */
-#endif
- str r2, [r0, #0x02]
- str r3, [r0, #0x06]
- strh r1, [r0, #0x0a]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 1010: dst is 16-bit aligned, src is 16-bit aligned
- */
- ldrh r2, [r1]
- ldr r3, [r1, #0x02]
- ldr ip, [r1, #0x06]
- ldrh r1, [r1, #0x0a]
- strh r2, [r0]
- str r3, [r0, #0x02]
- str ip, [r0, #0x06]
- strh r1, [r0, #0x0a]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 1011: dst is 16-bit aligned, src is 8-bit aligned (byte 3)
- */
- ldr r2, [r1, #0x09] /* BE:r2 = 9ABx LE:r2 = xBA9 */
- ldr r3, [r1, #0x05] /* BE:r3 = 5678 LE:r3 = 8765 */
- mov ip, r2, lsr #8 /* BE:ip = .9AB LE:ip = .xBA */
- strh ip, [r0, #0x0a]
- ldr ip, [r1, #0x01] /* BE:ip = 1234 LE:ip = 4321 */
- ldrb r1, [r1] /* r1 = ...0 */
-#ifdef __ARMEB__
- mov r2, r2, lsr #24 /* r2 = ...9 */
- orr r2, r2, r3, lsl #8 /* r2 = 6789 */
- mov r3, r3, lsr #24 /* r3 = ...5 */
- orr r3, r3, ip, lsl #8 /* r3 = 2345 */
- mov r1, r1, lsl #8 /* r1 = ..0. */
- orr r1, r1, ip, lsr #24 /* r1 = ..01 */
-#else
- mov r2, r2, lsl #24 /* r2 = 9... */
- orr r2, r2, r3, lsr #8 /* r2 = 9876 */
- mov r3, r3, lsl #24 /* r3 = 5... */
- orr r3, r3, ip, lsr #8 /* r3 = 5432 */
- orr r1, r1, ip, lsl #8 /* r1 = 3210 */
-#endif
- str r2, [r0, #0x06]
- str r3, [r0, #0x02]
- strh r1, [r0]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 1100: dst is 8-bit aligned (byte 3), src is 32-bit aligned
- */
- ldr r2, [r1] /* BE:r2 = 0123 LE:r2 = 3210 */
- ldr ip, [r1, #0x04] /* BE:ip = 4567 LE:ip = 7654 */
- ldr r1, [r1, #0x08] /* BE:r1 = 89AB LE:r1 = BA98 */
-#ifdef __ARMEB__
- mov r3, r2, lsr #24 /* r3 = ...0 */
- strb r3, [r0]
- mov r2, r2, lsl #8 /* r2 = 123. */
- orr r2, r2, ip, lsr #24 /* r2 = 1234 */
- str r2, [r0, #0x01]
- mov r2, ip, lsl #8 /* r2 = 567. */
- orr r2, r2, r1, lsr #24 /* r2 = 5678 */
- str r2, [r0, #0x05]
- mov r2, r1, lsr #8 /* r2 = ..9A */
- strh r2, [r0, #0x09]
- strb r1, [r0, #0x0b]
-#else
- strb r2, [r0]
- mov r3, r2, lsr #8 /* r3 = .321 */
- orr r3, r3, ip, lsl #24 /* r3 = 4321 */
- str r3, [r0, #0x01]
- mov r3, ip, lsr #8 /* r3 = .765 */
- orr r3, r3, r1, lsl #24 /* r3 = 8765 */
- str r3, [r0, #0x05]
- mov r1, r1, lsr #8 /* r1 = .BA9 */
- strh r1, [r0, #0x09]
- mov r1, r1, lsr #16 /* r1 = ...B */
- strb r1, [r0, #0x0b]
-#endif
- RET
- LMEMCPY_C_PAD
-
-/*
- * 1101: dst is 8-bit aligned (byte 3), src is 8-bit aligned (byte 1)
- */
- ldrb r2, [r1, #0x0b] /* r2 = ...B */
- ldr r3, [r1, #0x07] /* BE:r3 = 789A LE:r3 = A987 */
- ldr ip, [r1, #0x03] /* BE:ip = 3456 LE:ip = 6543 */
- ldr r1, [r1, #-1] /* BE:r1 = x012 LE:r1 = 210x */
- strb r2, [r0, #0x0b]
-#ifdef __ARMEB__
- strh r3, [r0, #0x09]
- mov r3, r3, lsr #16 /* r3 = ..78 */
- orr r3, r3, ip, lsl #16 /* r3 = 5678 */
- mov ip, ip, lsr #16 /* ip = ..34 */
- orr ip, ip, r1, lsl #16 /* ip = 1234 */
- mov r1, r1, lsr #16 /* r1 = ..x0 */
-#else
- mov r2, r3, lsr #16 /* r2 = ..A9 */
- strh r2, [r0, #0x09]
- mov r3, r3, lsl #16 /* r3 = 87.. */
- orr r3, r3, ip, lsr #16 /* r3 = 8765 */
- mov ip, ip, lsl #16 /* ip = 43.. */
- orr ip, ip, r1, lsr #16 /* ip = 4321 */
- mov r1, r1, lsr #8 /* r1 = .210 */
-#endif
- str r3, [r0, #0x05]
- str ip, [r0, #0x01]
- strb r1, [r0]
- RET
- LMEMCPY_C_PAD
-
-/*
- * 1110: dst is 8-bit aligned (byte 3), src is 16-bit aligned
- */
-#ifdef __ARMEB__
- ldrh r2, [r1, #0x0a] /* r2 = ..AB */
- ldr ip, [r1, #0x06] /* ip = 6789 */
- ldr r3, [r1, #0x02] /* r3 = 2345 */
- ldrh r1, [r1] /* r1 = ..01 */
- strb r2, [r0, #0x0b]
- mov r2, r2, lsr #8 /* r2 = ...A */
- orr r2, r2, ip, lsl #8 /* r2 = 789A */
- mov ip, ip, lsr #8 /* ip = .678 */
- orr ip, ip, r3, lsl #24 /* ip = 5678 */
- mov r3, r3, lsr #8 /* r3 = .234 */
- orr r3, r3, r1, lsl #24 /* r3 = 1234 */
- mov r1, r1, lsr #8 /* r1 = ...0 */
- strb r1, [r0]
- str r3, [r0, #0x01]
- str ip, [r0, #0x05]
- strh r2, [r0, #0x09]
-#else
- ldrh r2, [r1] /* r2 = ..10 */
- ldr r3, [r1, #0x02] /* r3 = 5432 */
- ldr ip, [r1, #0x06] /* ip = 9876 */
- ldrh r1, [r1, #0x0a] /* r1 = ..BA */
- strb r2, [r0]
- mov r2, r2, lsr #8 /* r2 = ...1 */
- orr r2, r2, r3, lsl #8 /* r2 = 4321 */
- mov r3, r3, lsr #24 /* r3 = ...5 */
- orr r3, r3, ip, lsl #8 /* r3 = 8765 */
- mov ip, ip, lsr #24 /* ip = ...9 */
- orr ip, ip, r1, lsl #8 /* ip = .BA9 */
- mov r1, r1, lsr #8 /* r1 = ...B */
- str r2, [r0, #0x01]
- str r3, [r0, #0x05]
- strh ip, [r0, #0x09]
- strb r1, [r0, #0x0b]
-#endif
- RET
- LMEMCPY_C_PAD
-
-/*
- * 1111: dst is 8-bit aligned (byte 3), src is 8-bit aligned (byte 3)
- */
- ldrb r2, [r1]
- ldr r3, [r1, #0x01]
- ldr ip, [r1, #0x05]
- strb r2, [r0]
- ldrh r2, [r1, #0x09]
- ldrb r1, [r1, #0x0b]
- str r3, [r0, #0x01]
- str ip, [r0, #0x05]
- strh r2, [r0, #0x09]
- strb r1, [r0, #0x0b]
- RET
-#endif /* __XSCALE__ */
-
-#ifdef GPROF
-
-ENTRY(user)
- nop
-ENTRY(btrap)
- nop
-ENTRY(etrap)
- nop
-ENTRY(bintr)
- nop
-ENTRY(eintr)
- nop
-
-#endif
--- sys/arm/arm/cpufunc_asm_arm8.S
+++ /dev/null
@@ -1,284 +0,0 @@
-/* $NetBSD: cpufunc_asm_arm8.S,v 1.2 2001/11/11 00:47:49 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1997 ARM Limited
- * Copyright (c) 1997 Causality Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Causality Limited.
- * 4. The name of Causality Limited may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * ARM8 assembly functions for CPU / MMU / TLB specific operations
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_arm8.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-ENTRY(arm8_clock_config)
- mrc p15, 0, r3, c15, c0, 0 /* Read the clock register */
- bic r2, r3, #0x11 /* turn off dynamic clocking
- and clear L bit */
- mcr p15, 0, r2, c15, c0, 0 /* Write clock register */
-
- bic r2, r3, r0 /* Clear bits */
- eor r2, r2, r1 /* XOR bits */
- bic r2, r2, #0x10 /* clear the L bit */
-
- bic r1, r2, #0x01 /* still keep dynamic clocking off */
- mcr p15, 0, r1, c15, c0, 0 /* Write clock register */
- mov r0, r0 /* NOP */
- mov r0, r0 /* NOP */
- mov r0, r0 /* NOP */
- mov r0, r0 /* NOP */
- mcr p15, 0, r2, c15, c0, 0 /* Write clock register */
- mov r0, r3 /* Return old value */
- RET
-
-/*
- * Functions to set the MMU Translation Table Base register
- *
- * We need to clean and flush the cache as it uses virtual
- * addresses that are about to change.
- */
-ENTRY(arm8_setttb)
- mrs r3, cpsr_all
- orr r1, r3, #(I32_bit | F32_bit)
- msr cpsr_all, r1
-
- stmfd sp!, {r0-r3, lr}
- bl _C_LABEL(arm8_cache_cleanID)
- ldmfd sp!, {r0-r3, lr}
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D cache */
-
- /* Write the TTB */
- mcr p15, 0, r0, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- mcr p15, 0, r0, c8, c7, 0
-
- /* For good measure we will flush the IDC as well */
- mcr p15, 0, r0, c7, c7, 0
-
- /* Make sure that pipeline is emptied */
- mov r0, r0
- mov r0, r0
- msr cpsr_all, r3
-
- RET
-
-/*
- * TLB functions
- */
-ENTRY(arm8_tlb_flushID)
- mcr p15, 0, r0, c8, c7, 0 /* flush I+D tlb */
- RET
-
-ENTRY(arm8_tlb_flushID_SE)
- mcr p15, 0, r0, c8, c7, 1 /* flush I+D tlb single entry */
- RET
-
-/*
- * Cache functions
- */
-ENTRY(arm8_cache_flushID)
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D cache */
- RET
-
-ENTRY(arm8_cache_flushID_E)
- mcr p15, 0, r0, c7, c7, 1 /* flush I+D single entry */
- RET
-
-ENTRY(arm8_cache_cleanID)
- mov r0, #0x00000000
-
-1: mov r2, r0
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
-
- adds r0, r0, #0x04000000
- bne 1b
-
- RET
-
-ENTRY(arm8_cache_cleanID_E)
- mcr p15, 0, r0, c7, c11, 1 /* clean I+D single entry */
- RET
-
-ENTRY(arm8_cache_purgeID)
- /*
- * ARM810 bug 3
- *
- * Clean and invalidate entry will not invalidate the entry
- * if the line was already clean. (mcr p15, 0, rd, c7, 15, 1)
- *
- * Instead of using the clean and invalidate entry operation
- * use a separate clean and invalidate entry operations.
- * i.e.
- * mcr p15, 0, rd, c7, c11, 1
- * mcr p15, 0, rd, c7, c7, 1
- */
-
- mov r0, #0x00000000
-
- mrs r3, cpsr_all
- orr r2, r3, #(I32_bit | F32_bit)
- msr cpsr_all, r2
-
-1: mov r2, r0
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
- add r2, r2, #0x10
- mcr p15, 0, r2, c7, c11, 1
- mcr p15, 0, r2, c7, c7, 1
-
- adds r0, r0, #0x04000000
- bne 1b
-
- msr cpsr_all, r3
- RET
-
-ENTRY(arm8_cache_purgeID_E)
- /*
- * ARM810 bug 3
- *
- * Clean and invalidate entry will not invalidate the entry
- * if the line was already clean. (mcr p15, 0, rd, c7, 15, 1)
- *
- * Instead of using the clean and invalidate entry operation
- * use a separate clean and invalidate entry operations.
- * i.e.
- * mcr p15, 0, rd, c7, c11, 1
- * mcr p15, 0, rd, c7, c7, 1
- */
- mrs r3, cpsr_all
- orr r2, r3, #(I32_bit | F32_bit)
- msr cpsr_all, r2
- mcr p15, 0, r0, c7, c11, 1 /* clean I+D single entry */
- mcr p15, 0, r0, c7, c7, 1 /* flush I+D single entry */
- msr cpsr_all, r3
- RET
-
-/*
- * Context switch.
- *
- * These is the CPU-specific parts of the context switcher cpu_switch()
- * These functions actually perform the TTB reload.
- *
- * NOTE: Special calling convention
- * r1, r4-r13 must be preserved
- */
-ENTRY(arm8_context_switch)
- /* For good measure we will flush the IDC as well */
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D cache */
-
- /* Write the TTB */
- mcr p15, 0, r0, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- mcr p15, 0, r0, c8, c7, 0 /* flush the I+D tlb */
-
-#if 0
- /* For good measure we will flush the IDC as well */
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D cache */
-#endif
-
- /* Make sure that pipeline is emptied */
- mov r0, r0
- mov r0, r0
- RET
--- sys/arm/arm/copystr.S
+++ /dev/null
@@ -1,227 +0,0 @@
-/* $NetBSD: copystr.S,v 1.8 2002/10/13 14:54:48 bjh21 Exp $ */
-
-/*-
- * Copyright (c) 1995 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * copystr.S
- *
- * optimised and fault protected copystr functions
- *
- * Created : 16/05/95
- */
-
-
-#include "assym.s"
-#include <machine/asm.h>
-#include <machine/armreg.h>
-#include <machine/asmacros.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/copystr.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-#include <sys/errno.h>
-
- .text
- .align 0
-#ifdef MULTIPROCESSOR
-.Lcpu_info:
- .word _C_LABEL(cpu_info)
-#else
-.Lpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-#endif
-
-/*
- * r0 - from
- * r1 - to
- * r2 - maxlens
- * r3 - lencopied
- *
- * Copy string from r0 to r1
- */
-ENTRY(copystr)
- stmfd sp!, {r4-r5} /* stack is 8 byte aligned */
- teq r2, #0x00000000
- mov r5, #0x00000000
- moveq r0, #ENAMETOOLONG
- beq 2f
-
-1: ldrb r4, [r0], #0x0001
- add r5, r5, #0x00000001
- teq r4, #0x00000000
- strb r4, [r1], #0x0001
- teqne r5, r2
- bne 1b
-
- teq r4, #0x00000000
- moveq r0, #0x00000000
- movne r0, #ENAMETOOLONG
-
-2: teq r3, #0x00000000
- strne r5, [r3]
-
- ldmfd sp!, {r4-r5} /* stack is 8 byte aligned */
- RET
-
-#define SAVE_REGS stmfd sp!, {r4-r6}
-#define RESTORE_REGS ldmfd sp!, {r4-r6}
-
-/*
- * r0 - user space address
- * r1 - kernel space address
- * r2 - maxlens
- * r3 - lencopied
- *
- * Copy string from user space to kernel space
- */
-ENTRY(copyinstr)
- SAVE_REGS
-
- teq r2, #0x00000000
- mov r6, #0x00000000
- moveq r0, #ENAMETOOLONG
- beq 2f
-
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r3, r14}
- bl _C_LABEL(cpu_number)
- ldr r4, .Lcpu_info
- ldr r4, [r4, r0, lsl #2]
- ldr r4, [r4, #CI_CURPCB]
- ldmfd sp!, {r0-r3, r14}
-#else
- ldr r4, .Lpcb
- ldr r4, [r4]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r4, #0x00000000
- beq .Lcopystrpcbfault
-#endif
-
- adr r5, .Lcopystrfault
- str r5, [r4, #PCB_ONFAULT]
-
-1: ldrbt r5, [r0], #0x0001
- add r6, r6, #0x00000001
- teq r5, #0x00000000
- strb r5, [r1], #0x0001
- teqne r6, r2
- bne 1b
-
- mov r0, #0x00000000
- str r0, [r4, #PCB_ONFAULT]
-
- teq r5, #0x00000000
- moveq r0, #0x00000000
- movne r0, #ENAMETOOLONG
-
-2: teq r3, #0x00000000
- strne r6, [r3]
-
- RESTORE_REGS
- RET
-
-/*
- * r0 - kernel space address
- * r1 - user space address
- * r2 - maxlens
- * r3 - lencopied
- *
- * Copy string from kernel space to user space
- */
-ENTRY(copyoutstr)
- SAVE_REGS
-
- teq r2, #0x00000000
- mov r6, #0x00000000
- moveq r0, #ENAMETOOLONG
- beq 2f
-
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r3, r14}
- bl _C_LABEL(cpu_number)
- ldr r4, .Lcpu_info
- ldr r4, [r4, r0, lsl #2]
- ldr r4, [r4, #CI_CURPCB]
- ldmfd sp!, {r0-r3, r14}
-#else
- ldr r4, .Lpcb
- ldr r4, [r4]
-#endif
-
-#ifdef DIAGNOSTIC
- teq r4, #0x00000000
- beq .Lcopystrpcbfault
-#endif
-
- adr r5, .Lcopystrfault
- str r5, [r4, #PCB_ONFAULT]
-
-1: ldrb r5, [r0], #0x0001
- add r6, r6, #0x00000001
- teq r5, #0x00000000
- strbt r5, [r1], #0x0001
- teqne r6, r2
- bne 1b
-
- mov r0, #0x00000000
- str r0, [r4, #PCB_ONFAULT]
-
- teq r5, #0x00000000
- moveq r0, #0x00000000
- movne r0, #ENAMETOOLONG
-
-2: teq r3, #0x00000000
- strne r6, [r3]
-
- RESTORE_REGS
- RET
-
-/* A fault occurred during the copy */
-.Lcopystrfault:
- mov r1, #0x00000000
- str r1, [r4, #PCB_ONFAULT]
- RESTORE_REGS
- RET
-
-#ifdef DIAGNOSTIC
-.Lcopystrpcbfault:
- mov r2, r1
- mov r1, r0
- adr r0, Lcopystrpcbfaulttext
- bic sp, sp, #7 /* align stack to 8 bytes */
- b _C_LABEL(panic)
-
-Lcopystrpcbfaulttext:
- .asciz "No valid PCB during copyinoutstr() addr1=%08x addr2=%08x\n"
- .align 0
-#endif
--- sys/arm/arm/cpufunc_asm_xscale.S
+++ /dev/null
@@ -1,495 +0,0 @@
-/* $NetBSD: cpufunc_asm_xscale.S,v 1.16 2002/08/17 16:36:32 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Allen Briggs and Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-/*-
- * Copyright (c) 2001 Matt Thomas.
- * Copyright (c) 1997,1998 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Causality Limited.
- * 4. The name of Causality Limited may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * XScale assembly functions for CPU / MMU / TLB specific operations
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_xscale.S,v 1.4 2005/01/10 22:41:08 cognet Exp $");
-
-/*
- * Size of the XScale core D-cache.
- */
-#define DCACHE_SIZE 0x00008000
-
-.Lblock_userspace_access:
- .word _C_LABEL(block_userspace_access)
-
-/*
- * CPWAIT -- Canonical method to wait for CP15 update.
- * From: Intel 80200 manual, section 2.3.3.
- *
- * NOTE: Clobbers the specified temp reg.
- */
-#define CPWAIT_BRANCH \
- sub pc, pc, #4
-
-#define CPWAIT(tmp) \
- mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ;\
- mov tmp, tmp /* wait for it to complete */ ;\
- CPWAIT_BRANCH /* branch to next insn */
-
-#define CPWAIT_AND_RETURN_SHIFTER lsr #32
-
-#define CPWAIT_AND_RETURN(tmp) \
- mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ;\
- /* Wait for it to complete and branch to the return address */ \
- sub pc, lr, tmp, CPWAIT_AND_RETURN_SHIFTER
-
-ENTRY(xscale_cpwait)
- CPWAIT_AND_RETURN(r0)
-
-/*
- * We need a separate cpu_control() entry point, since we have to
- * invalidate the Branch Target Buffer in the event the BPRD bit
- * changes in the control register.
- */
-ENTRY(xscale_control)
- mrc p15, 0, r3, c1, c0, 0 /* Read the control register */
- bic r2, r3, r0 /* Clear bits */
- eor r2, r2, r1 /* XOR bits */
-
- teq r2, r3 /* Only write if there was a change */
- mcrne p15, 0, r0, c7, c5, 6 /* Invalidate the BTB */
- mcrne p15, 0, r2, c1, c0, 0 /* Write new control register */
- mov r0, r3 /* Return old value */
-
- CPWAIT_AND_RETURN(r1)
-
-/*
- * Functions to set the MMU Translation Table Base register
- *
- * We need to clean and flush the cache as it uses virtual
- * addresses that are about to change.
- */
-ENTRY(xscale_setttb)
-#ifdef CACHE_CLEAN_BLOCK_INTR
- mrs r3, cpsr_all
- orr r1, r3, #(I32_bit | F32_bit)
- msr cpsr_all, r1
-#else
- ldr r3, .Lblock_userspace_access
- ldr r2, [r3]
- orr r1, r2, #1
- str r1, [r3]
-#endif
- stmfd sp!, {r0-r3, lr}
- bl _C_LABEL(xscale_cache_cleanID)
- mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ and BTB */
- mcr p15, 0, r0, c7, c10, 4 /* drain write and fill buffer */
-
- CPWAIT(r0)
-
- ldmfd sp!, {r0-r3, lr}
-
- /* Write the TTB */
- mcr p15, 0, r0, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- mcr p15, 0, r0, c8, c7, 0 /* invalidate I+D TLB */
-
- /* The cleanID above means we only need to flush the I cache here */
- mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ and BTB */
-
- CPWAIT(r0)
-
-#ifdef CACHE_CLEAN_BLOCK_INTR
- msr cpsr_all, r3
-#else
- str r2, [r3]
-#endif
- RET
-
-/*
- * TLB functions
- *
- */
-ENTRY(xscale_tlb_flushID_SE)
- mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */
- mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
- CPWAIT_AND_RETURN(r0)
-
-/*
- * Cache functions
- */
-ENTRY(xscale_cache_flushID)
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D cache */
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_flushI)
- mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_flushD)
- mcr p15, 0, r0, c7, c6, 0 /* flush D cache */
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_flushI_SE)
- mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_flushD_SE)
- /*
- * Errata (rev < 2): Must clean-dcache-line to an address
- * before invalidate-dcache-line to an address, or dirty
- * bits will not be cleared in the dcache array.
- */
- mcr p15, 0, r0, c7, c10, 1
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_cleanD_E)
- mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- CPWAIT_AND_RETURN(r0)
-
-/*
- * Information for the XScale cache clean/purge functions:
- *
- * * Virtual address of the memory region to use
- * * Size of memory region
- *
- * Note the virtual address for the Data cache clean operation
- * does not need to be backed by physical memory, since no loads
- * will actually be performed by the allocate-line operation.
- *
- * Note that the Mini-Data cache MUST be cleaned by executing
- * loads from memory mapped into a region reserved exclusively
- * for cleaning of the Mini-Data cache.
- */
- .data
-
- .global _C_LABEL(xscale_cache_clean_addr)
-_C_LABEL(xscale_cache_clean_addr):
- .word 0x00000000
-
- .global _C_LABEL(xscale_cache_clean_size)
-_C_LABEL(xscale_cache_clean_size):
- .word DCACHE_SIZE
-
- .global _C_LABEL(xscale_minidata_clean_addr)
-_C_LABEL(xscale_minidata_clean_addr):
- .word 0x00000000
-
- .global _C_LABEL(xscale_minidata_clean_size)
-_C_LABEL(xscale_minidata_clean_size):
- .word 0x00000800
-
- .text
-
-.Lxscale_cache_clean_addr:
- .word _C_LABEL(xscale_cache_clean_addr)
-.Lxscale_cache_clean_size:
- .word _C_LABEL(xscale_cache_clean_size)
-
-.Lxscale_minidata_clean_addr:
- .word _C_LABEL(xscale_minidata_clean_addr)
-.Lxscale_minidata_clean_size:
- .word _C_LABEL(xscale_minidata_clean_size)
-
-#ifdef CACHE_CLEAN_BLOCK_INTR
-#define XSCALE_CACHE_CLEAN_BLOCK \
- mrs r3, cpsr_all ; \
- orr r0, r3, #(I32_bit | F32_bit) ; \
- msr cpsr_all, r0
-
-#define XSCALE_CACHE_CLEAN_UNBLOCK \
- msr cpsr_all, r3
-#else
-#define XSCALE_CACHE_CLEAN_BLOCK \
- ldr r3, .Lblock_userspace_access ; \
- ldr ip, [r3] ; \
- orr r0, ip, #1 ; \
- str r0, [r3]
-
-#define XSCALE_CACHE_CLEAN_UNBLOCK \
- str ip, [r3]
-#endif /* CACHE_CLEAN_BLOCK_INTR */
-
-#define XSCALE_CACHE_CLEAN_PROLOGUE \
- XSCALE_CACHE_CLEAN_BLOCK ; \
- ldr r2, .Lxscale_cache_clean_addr ; \
- ldmia r2, {r0, r1} ; \
- /* \
- * BUG ALERT! \
- * \
- * The XScale core has a strange cache eviction bug, which \
- * requires us to use 2x the cache size for the cache clean \
- * and for that area to be aligned to 2 * cache size. \
- * \
- * The work-around is to use 2 areas for cache clean, and to \
- * alternate between them whenever this is done. No one knows \
- * why the work-around works (mmm!). \
- */ \
- eor r0, r0, #(DCACHE_SIZE) ; \
- str r0, [r2] ; \
- add r0, r0, r1
-
-#define XSCALE_CACHE_CLEAN_EPILOGUE \
- XSCALE_CACHE_CLEAN_UNBLOCK
-
-ENTRY_NP(xscale_cache_syncI)
-ENTRY_NP(xscale_cache_purgeID)
- mcr p15, 0, r0, c7, c5, 0 /* flush I cache (D cleaned below) */
-ENTRY_NP(xscale_cache_cleanID)
-ENTRY_NP(xscale_cache_purgeD)
-ENTRY(xscale_cache_cleanD)
- XSCALE_CACHE_CLEAN_PROLOGUE
-
-1: subs r0, r0, #32
- mcr p15, 0, r0, c7, c2, 5 /* allocate cache line */
- subs r1, r1, #32
- bne 1b
-
- CPWAIT(r0)
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- CPWAIT(r0)
-
- XSCALE_CACHE_CLEAN_EPILOGUE
- RET
-
-/*
- * Clean the mini-data cache.
- *
- * It's expected that we only use the mini-data cache for
- * kernel addresses, so there is no need to purge it on
- * context switch, and no need to prevent userspace access
- * while we clean it.
- */
-ENTRY(xscale_cache_clean_minidata)
- ldr r2, .Lxscale_minidata_clean_addr
- ldmia r2, {r0, r1}
-1: ldr r3, [r0], #32
- subs r1, r1, #32
- bne 1b
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- CPWAIT_AND_RETURN(r1)
-
-ENTRY(xscale_cache_purgeID_E)
- mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- CPWAIT(r1)
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- CPWAIT_AND_RETURN(r1)
-
-ENTRY(xscale_cache_purgeD_E)
- mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- CPWAIT(r1)
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- CPWAIT_AND_RETURN(r1)
-
-/*
- * Soft functions
- */
-/* xscale_cache_syncI is identical to xscale_cache_purgeID */
-
-ENTRY(xscale_cache_cleanID_rng)
-ENTRY(xscale_cache_cleanD_rng)
- cmp r1, #0x4000
- bcs _C_LABEL(xscale_cache_cleanID)
-
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- CPWAIT(r0)
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_purgeID_rng)
- cmp r1, #0x4000
- bcs _C_LABEL(xscale_cache_purgeID)
-
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- CPWAIT(r0)
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_purgeD_rng)
- cmp r1, #0x4000
- bcs _C_LABEL(xscale_cache_purgeD)
-
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- CPWAIT(r0)
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_syncI_rng)
- cmp r1, #0x4000
- bcs _C_LABEL(xscale_cache_syncI)
-
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- mcr p15, 0, r0, c7, c5, 1 /* flush I cache single entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- CPWAIT(r0)
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- CPWAIT_AND_RETURN(r0)
-
-ENTRY(xscale_cache_flushD_rng)
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- CPWAIT_AND_RETURN(r0)
-
-/*
- * Context switch.
- *
- * These is the CPU-specific parts of the context switcher cpu_switch()
- * These functions actually perform the TTB reload.
- *
- * NOTE: Special calling convention
- * r1, r4-r13 must be preserved
- */
-ENTRY(xscale_context_switch)
- /*
- * CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this.
- * Thus the data cache will contain only kernel data and the
- * instruction cache will contain only kernel code, and all
- * kernel mappings are shared by all processes.
- */
-
- /* Write the TTB */
- mcr p15, 0, r0, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- mcr p15, 0, r0, c8, c7, 0 /* flush the I+D tlb */
-
- CPWAIT_AND_RETURN(r0)
-
-/*
- * xscale_cpu_sleep
- *
- * This is called when there is nothing on any of the run queues.
- * We go into IDLE mode so that any IRQ or FIQ will awaken us.
- *
- * If this is called with anything other than ARM_SLEEP_MODE_IDLE,
- * ignore it.
- */
-ENTRY(xscale_cpu_sleep)
- tst r0, #0x00000000
- bne 1f
- mov r0, #0x1
- mcr p14, 0, r0, c7, c0, 0
-
-1:
- RET
--- sys/arm/arm/bus_space_asm_generic.S
+++ /dev/null
@@ -1,353 +0,0 @@
-/* $NetBSD: bus_space_asm_generic.S,v 1.3 2003/03/27 19:46:14 mycroft Exp $ */
-
-/*-
- * Copyright (c) 1997 Causality Limited.
- * Copyright (c) 1997 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <machine/asm.h>
-#include <machine/cpuconf.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/bus_space_asm_generic.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * Generic bus_space functions.
- */
-
-/*
- * read single
- */
-
-ENTRY(generic_bs_r_1)
- ldrb r0, [r1, r2]
- RET
-
-#if (ARM_ARCH_4 + ARM_ARCH_5) > 0
-ENTRY(generic_armv4_bs_r_2)
- ldrh r0, [r1, r2]
- RET
-#endif
-
-ENTRY(generic_bs_r_4)
- ldr r0, [r1, r2]
- RET
-
-/*
- * write single
- */
-
-ENTRY(generic_bs_w_1)
- strb r3, [r1, r2]
- RET
-
-#if (ARM_ARCH_4 + ARM_ARCH_5) > 0
-ENTRY(generic_armv4_bs_w_2)
- strh r3, [r1, r2]
- RET
-#endif
-
-ENTRY(generic_bs_w_4)
- str r3, [r1, r2]
- RET
-
-/*
- * read multiple
- */
-
-ENTRY(generic_bs_rm_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldrb r3, [r0]
- strb r3, [r1], #1
- subs r2, r2, #1
- bne 1b
-
- RET
-
-#if (ARM_ARCH_4 + ARM_ARCH_5) > 0
-ENTRY(generic_armv4_bs_rm_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldrh r3, [r0]
- strh r3, [r1], #2
- subs r2, r2, #1
- bne 1b
-
- RET
-#endif
-
-ENTRY(generic_bs_rm_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldr r3, [r0]
- str r3, [r1], #4
- subs r2, r2, #1
- bne 1b
-
- RET
-
-/*
- * write multiple
- */
-
-ENTRY(generic_bs_wm_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldrb r3, [r1], #1
- strb r3, [r0]
- subs r2, r2, #1
- bne 1b
-
- RET
-
-#if (ARM_ARCH_4 + ARM_ARCH_5) > 0
-ENTRY(generic_armv4_bs_wm_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldrh r3, [r1], #2
- strh r3, [r0]
- subs r2, r2, #1
- bne 1b
-
- RET
-#endif
-
-ENTRY(generic_bs_wm_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldr r3, [r1], #4
- str r3, [r0]
- subs r2, r2, #1
- bne 1b
-
- RET
-
-/*
- * read region
- */
-
-ENTRY(generic_bs_rr_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldrb r3, [r0], #1
- strb r3, [r1], #1
- subs r2, r2, #1
- bne 1b
-
- RET
-
-#if (ARM_ARCH_4 + ARM_ARCH_5) > 0
-ENTRY(generic_armv4_bs_rr_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldrh r3, [r0], #2
- strh r3, [r1], #2
- subs r2, r2, #1
- bne 1b
-
- RET
-#endif
-
-ENTRY(generic_bs_rr_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldr r3, [r0], #4
- str r3, [r1], #4
- subs r2, r2, #1
- bne 1b
-
- RET
-
-/*
- * write region.
- */
-
-ENTRY(generic_bs_wr_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldrb r3, [r1], #1
- strb r3, [r0], #1
- subs r2, r2, #1
- bne 1b
-
- RET
-
-#if (ARM_ARCH_4 + ARM_ARCH_5) > 0
-ENTRY(generic_armv4_bs_wr_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldrh r3, [r1], #2
- strh r3, [r0], #2
- subs r2, r2, #1
- bne 1b
-
- RET
-#endif
-
-ENTRY(generic_bs_wr_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: ldr r3, [r1], #4
- str r3, [r0], #4
- subs r2, r2, #1
- bne 1b
-
- RET
-
-/*
- * set region
- */
-
-ENTRY(generic_bs_sr_1)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: strb r1, [r0], #1
- subs r2, r2, #1
- bne 1b
-
- RET
-
-#if (ARM_ARCH_4 + ARM_ARCH_5) > 0
-ENTRY(generic_armv4_bs_sr_2)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: strh r1, [r0], #2
- subs r2, r2, #1
- bne 1b
-
- RET
-#endif
-
-ENTRY(generic_bs_sr_4)
- add r0, r1, r2
- mov r1, r3
- ldr r2, [sp, #0]
- teq r2, #0
- RETeq
-
-1: str r1, [r0], #4
- subs r2, r2, #1
- bne 1b
-
- RET
-
-/*
- * copy region
- */
-
-#if (ARM_ARCH_4 + ARM_ARCH_5) > 0
-ENTRY(generic_armv4_bs_c_2)
- add r0, r1, r2
- ldr r2, [sp, #0]
- add r1, r2, r3
- ldr r2, [sp, #4]
- teq r2, #0
- RETeq
-
- cmp r0, r1
- blt 2f
-
-1: ldrh r3, [r0], #2
- strh r3, [r1], #2
- subs r2, r2, #1
- bne 1b
-
- RET
-
-2: add r0, r0, r2, lsl #1
- add r1, r1, r2, lsl #1
- sub r0, r0, #2
- sub r1, r1, #2
-
-3: ldrh r3, [r0], #-2
- strh r3, [r1], #-2
- subs r2, r2, #1
- bne 3b
-
- RET
-#endif
--- sys/arm/arm/cpufunc_asm_sa1.S
+++ /dev/null
@@ -1,316 +0,0 @@
-/* $NetBSD: cpufunc_asm_sa1.S,v 1.8 2002/08/17 16:36:32 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1997,1998 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Causality Limited.
- * 4. The name of Causality Limited may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * SA-1 assembly functions for CPU / MMU / TLB specific operations
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_sa1.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-.Lblock_userspace_access:
- .word _C_LABEL(block_userspace_access)
-
-/*
- * Functions to set the MMU Translation Table Base register
- *
- * We need to clean and flush the cache as it uses virtual
- * addresses that are about to change.
- */
-ENTRY(getttb)
- mrc p15, 0, r0, c2, c0, 0
-ENTRY(sa1_setttb)
-#ifdef CACHE_CLEAN_BLOCK_INTR
- mrs r3, cpsr_all
- orr r1, r3, #(I32_bit | F32_bit)
- msr cpsr_all, r1
-#else
- ldr r3, .Lblock_userspace_access
- ldr r2, [r3]
- orr r1, r2, #1
- str r1, [r3]
-#endif
- stmfd sp!, {r0-r3, lr}
- bl _C_LABEL(sa1_cache_cleanID)
- ldmfd sp!, {r0-r3, lr}
- mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ and BTB */
- mcr p15, 0, r0, c7, c10, 4 /* drain write and fill buffer */
-
- /* Write the TTB */
- mcr p15, 0, r0, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- mcr p15, 0, r0, c8, c7, 0 /* invalidate I+D TLB */
-
- /* The cleanID above means we only need to flush the I cache here */
- mcr p15, 0, r0, c7, c5, 0 /* invalidate I$ and BTB */
-
- /* Make sure that pipeline is emptied */
- mov r0, r0
- mov r0, r0
-#ifdef CACHE_CLEAN_BLOCK_INTR
- msr cpsr_all, r3
-#else
- str r2, [r3]
-#endif
- RET
-
-/*
- * TLB functions
- */
-ENTRY(sa1_tlb_flushID_SE)
- mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */
- mcr p15, 0, r0, c8, c5, 0 /* flush I tlb */
- RET
-
-/*
- * Cache functions
- */
-ENTRY(sa1_cache_flushID)
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D cache */
- RET
-
-ENTRY(sa1_cache_flushI)
- mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
- RET
-
-ENTRY(sa1_cache_flushD)
- mcr p15, 0, r0, c7, c6, 0 /* flush D cache */
- RET
-
-ENTRY(sa1_cache_flushD_SE)
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- RET
-
-ENTRY(sa1_cache_cleanD_E)
- mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- RET
-
-/*
- * Information for the SA-1 cache clean/purge functions:
- *
- * * Virtual address of the memory region to use
- * * Size of memory region
- */
- .data
-
- .global _C_LABEL(sa1_cache_clean_addr)
-_C_LABEL(sa1_cache_clean_addr):
- .word 0xf0000000
-
- .global _C_LABEL(sa1_cache_clean_size)
-_C_LABEL(sa1_cache_clean_size):
-#if defined(CPU_SA1100) || defined(CPU_SA1110)
- .word 0x00004000
-#else
- .word 0x00008000
-#endif
-
- .text
-
-.Lsa1_cache_clean_addr:
- .word _C_LABEL(sa1_cache_clean_addr)
-.Lsa1_cache_clean_size:
- .word _C_LABEL(sa1_cache_clean_size)
-
-#ifdef CACHE_CLEAN_BLOCK_INTR
-#define SA1_CACHE_CLEAN_BLOCK \
- mrs r3, cpsr_all ; \
- orr r0, r3, #(I32_bit | F32_bit) ; \
- msr cpsr_all, r0
-
-#define SA1_CACHE_CLEAN_UNBLOCK \
- msr cpsr_all, r3
-#else
-#define SA1_CACHE_CLEAN_BLOCK \
- ldr r3, .Lblock_userspace_access ; \
- ldr ip, [r3] ; \
- orr r0, ip, #1 ; \
- str r0, [r3]
-
-#define SA1_CACHE_CLEAN_UNBLOCK \
- str ip, [r3]
-#endif /* CACHE_CLEAN_BLOCK_INTR */
-
-#ifdef DOUBLE_CACHE_CLEAN_BANK
-#define SA1_DOUBLE_CACHE_CLEAN_BANK \
- eor r0, r0, r1 ; \
- str r0, [r2]
-#else
-#define SA1_DOUBLE_CACHE_CLEAN_BANK /* nothing */
-#endif /* DOUBLE_CACHE_CLEAN_BANK */
-
-#define SA1_CACHE_CLEAN_PROLOGUE \
- SA1_CACHE_CLEAN_BLOCK ; \
- ldr r2, .Lsa1_cache_clean_addr ; \
- ldmia r2, {r0, r1} ; \
- SA1_DOUBLE_CACHE_CLEAN_BANK
-
-#define SA1_CACHE_CLEAN_EPILOGUE \
- SA1_CACHE_CLEAN_UNBLOCK
-
-ENTRY_NP(sa1_cache_syncI)
-ENTRY_NP(sa1_cache_purgeID)
- mcr p15, 0, r0, c7, c5, 0 /* flush I cache (D cleaned below) */
-ENTRY_NP(sa1_cache_cleanID)
-ENTRY_NP(sa1_cache_purgeD)
-ENTRY(sa1_cache_cleanD)
- SA1_CACHE_CLEAN_PROLOGUE
-
-1: ldr r2, [r0], #32
- subs r1, r1, #32
- bne 1b
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- SA1_CACHE_CLEAN_EPILOGUE
- RET
-
-ENTRY(sa1_cache_purgeID_E)
- mcr p15, 0, r0, c7, c10, 1 /* clean dcache entry */
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- RET
-
-ENTRY(sa1_cache_purgeD_E)
- mcr p15, 0, r0, c7, c10, 1 /* clean dcache entry */
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- RET
-
-/*
- * Soft functions
- */
-/* sa1_cache_syncI is identical to sa1_cache_purgeID */
-
-ENTRY(sa1_cache_cleanID_rng)
-ENTRY(sa1_cache_cleanD_rng)
- cmp r1, #0x4000
- bcs _C_LABEL(sa1_cache_cleanID)
-
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- RET
-
-ENTRY(sa1_cache_purgeID_rng)
- cmp r1, #0x4000
- bcs _C_LABEL(sa1_cache_purgeID)
-
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
- RET
-
-ENTRY(sa1_cache_purgeD_rng)
- cmp r1, #0x4000
- bcs _C_LABEL(sa1_cache_purgeD)
-
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- mcr p15, 0, r0, c7, c6, 1 /* flush D cache single entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- RET
-
-ENTRY(sa1_cache_syncI_rng)
- cmp r1, #0x4000
- bcs _C_LABEL(sa1_cache_syncI)
-
- and r2, r0, #0x1f
- add r1, r1, r2
- bic r0, r0, #0x1f
-
-1: mcr p15, 0, r0, c7, c10, 1 /* clean D cache entry */
- add r0, r0, #32
- subs r1, r1, #32
- bhi 1b
-
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
-
- RET
-
-/*
- * Context switch.
- *
- * These is the CPU-specific parts of the context switcher cpu_switch()
- * These functions actually perform the TTB reload.
- *
- * NOTE: Special calling convention
- * r1, r4-r13 must be preserved
- */
-#if defined(CPU_SA110)
-ENTRY(sa110_context_switch)
- /*
- * CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this.
- * Thus the data cache will contain only kernel data and the
- * instruction cache will contain only kernel code, and all
- * kernel mappings are shared by all processes.
- */
-
- /* Write the TTB */
- mcr p15, 0, r0, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- mcr p15, 0, r0, c8, c7, 0 /* flush the I+D tlb */
-
- /* Make sure that pipeline is emptied */
- mov r0, r0
- mov r0, r0
- RET
-#endif
--- sys/arm/arm/swtch.S
+++ /dev/null
@@ -1,469 +0,0 @@
-/* $NetBSD: cpuswitch.S,v 1.41 2003/11/15 08:44:18 scw Exp $ */
-
-/*-
- * Copyright 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Steve C. Woodford for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-/*-
- * Copyright (c) 1994-1998 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * cpuswitch.S
- *
- * cpu switching functions
- *
- * Created : 15/10/94
- *
- */
-
-#include "assym.s"
-
-#include <machine/asm.h>
-#include <machine/asmacros.h>
-#include <machine/armreg.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/swtch.S,v 1.15 2005/05/24 21:47:10 cognet Exp $");
-
-
-/*
- * New experimental definitions of IRQdisable and IRQenable
- * These keep FIQ's enabled since FIQ's are special.
- */
-
-#define DOMAIN_CLIENT 0x01
-#define IRQdisable \
- mrs r14, cpsr ; \
- orr r14, r14, #(I32_bit) ; \
- msr cpsr_c, r14 ; \
-
-#define IRQenable \
- mrs r14, cpsr ; \
- bic r14, r14, #(I32_bit) ; \
- msr cpsr_c, r14 ; \
-
-/*
- * These are used for switching the translation table/DACR.
- * Since the vector page can be invalid for a short time, we must
- * disable both regular IRQs *and* FIQs.
- *
- * XXX: This is not necessary if the vector table is relocated.
- */
-#define IRQdisableALL \
- mrs r14, cpsr ; \
- orr r14, r14, #(I32_bit | F32_bit) ; \
- msr cpsr_c, r14
-
-#define IRQenableALL \
- mrs r14, cpsr ; \
- bic r14, r14, #(I32_bit | F32_bit) ; \
- msr cpsr_c, r14
-
-.Lcurpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-.Lcpufuncs:
- .word _C_LABEL(cpufuncs)
-.Lblock_userspace_access:
- .word _C_LABEL(block_userspace_access)
-.Lcpu_do_powersave:
- .word _C_LABEL(cpu_do_powersave)
-ENTRY(cpu_throw)
- mov r5, r1
-
- /*
- * r5 = newtd
- */
-
- ldr r7, [r5, #(TD_PCB)] /* r7 = new thread's PCB */
-
- /* Switch to lwp0 context */
-
- ldr r9, .Lcpufuncs
- mov lr, pc
- ldr pc, [r9, #CF_IDCACHE_WBINV_ALL]
- ldr r0, [r7, #(PCB_PL1VEC)]
- ldr r1, [r7, #(PCB_DACR)]
- /*
- * r0 = Pointer to L1 slot for vector_page (or NULL)
- * r1 = lwp0's DACR
- * r5 = lwp0
- * r6 = exit func
- * r7 = lwp0's PCB
- * r9 = cpufuncs
- */
-
- /*
- * Ensure the vector table is accessible by fixing up lwp0's L1
- */
- cmp r0, #0 /* No need to fixup vector table? */
- ldrne r3, [r0] /* But if yes, fetch current value */
- ldrne r2, [r7, #(PCB_L1VEC)] /* Fetch new vector_page value */
- mcr p15, 0, r1, c3, c0, 0 /* Update DACR for lwp0's context */
- cmpne r3, r2 /* Stuffing the same value? */
- strne r2, [r0] /* Store if not. */
-
-#ifdef PMAP_INCLUDE_PTE_SYNC
- /*
- * Need to sync the cache to make sure that last store is
- * visible to the MMU.
- */
- movne r1, #4
- movne lr, pc
- ldrne pc, [r9, #CF_DCACHE_WB_RANGE]
-#endif /* PMAP_INCLUDE_PTE_SYNC */
-
- /*
- * Note: We don't do the same optimisation as cpu_switch() with
- * respect to avoiding flushing the TLB if we're switching to
- * the same L1 since this process' VM space may be about to go
- * away, so we don't want *any* turds left in the TLB.
- */
-
- /* Switch the memory to the new process */
- ldr r0, [r7, #(PCB_PAGEDIR)]
- mov lr, pc
- ldr pc, [r9, #CF_CONTEXT_SWITCH]
-
- /* Restore all the save registers */
-#ifndef __XSCALE__
- add r1, r7, #PCB_R8
- ldmia r1, {r8-r13}
-#else
- ldr r8, [r7, #(PCB_R8)]
- ldr r9, [r7, #(PCB_R9)]
- ldr r10, [r7, #(PCB_R10)]
- ldr r11, [r7, #(PCB_R11)]
- ldr r12, [r7, #(PCB_R12)]
- ldr r13, [r7, #(PCB_SP)]
-#endif
-
- /* We have a new curthread now so make a note it */
- ldr r6, .Lcurthread
- str r5, [r6]
-
- /* Set the new tp */
- ldr r6, [r5, #(TD_MD + MD_TP)]
- mov r5, #ARM_TP_ADDRESS
- strt r6, [r5]
-
- /* Hook in a new pcb */
- ldr r6, .Lcurpcb
- str r7, [r6]
-
- ldmfd sp!, {r4-r7, pc}
-
-ENTRY(cpu_switch)
- stmfd sp!, {r4-r7, lr}
-
-.Lswitch_resume:
- /* rem: r0 = old lwp */
- /* rem: interrupts are disabled */
-
-#ifdef MULTIPROCESSOR
- /* XXX use curcpu() */
- ldr r2, .Lcpu_info_store
- str r2, [r6, #(L_CPU)]
-#endif
-
- /* Process is now on a processor. */
-
- /* We have a new curthread now so make a note it */
- ldr r7, .Lcurthread
- str r1, [r7]
-
- /* Hook in a new pcb */
- ldr r7, .Lcurpcb
- ldr r2, [r1, #TD_PCB]
- str r2, [r7]
-
- /* rem: r1 = new process */
- /* rem: interrupts are enabled */
-
- /* Stage two : Save old context */
-
- /* Get the user structure for the old lwp. */
- ldr r2, [r0, #(TD_PCB)]
-
- /* Save all the registers in the old lwp's pcb */
-#ifndef __XSCALE__
- add r7, r2, #(PCB_R8)
- stmia r7, {r8-r13}
-#else
- strd r8, [r2, #(PCB_R8)]
- strd r10, [r2, #(PCB_R10)]
- strd r12, [r2, #(PCB_R12)]
-#endif
-
- /*
- * NOTE: We can now use r8-r13 until it is time to restore
- * them for the new process.
- */
- /* Store the old tp */
- mov r3, #ARM_TP_ADDRESS
- ldrt r9, [r3]
- str r9, [r0, #(TD_MD + MD_TP)]
-
- /* Set the new tp */
- ldr r9, [r1, #(TD_MD + MD_TP)]
- strt r9, [r3]
-
- /* Get the user structure for the new process in r9 */
- ldr r9, [r1, #(TD_PCB)]
-
- /* r1 now free! */
-
- mrs r3, cpsr
- /*
- * We can do that, since
- * PSR_SVC32_MODE|PSR_UND32_MODE == MSR_UND32_MODE
- */
- orr r8, r3, #(PSR_UND32_MODE)
- msr cpsr_c, r8
-
- str sp, [r2, #(PCB_UND_SP)]
-
- msr cpsr_c, r3 /* Restore the old mode */
- /* rem: r8 = old PCB */
- /* rem: r9 = new PCB */
- /* rem: interrupts are enabled */
-
- /* What else needs to be saved Only FPA stuff when that is supported */
-
- /* Third phase : restore saved context */
-
- /* rem: r8 = old PCB */
- /* rem: r9 = new PCB */
- /* rem: interrupts are enabled */
-
- ldr r5, [r9, #(PCB_DACR)] /* r5 = new DACR */
- mov r2, #DOMAIN_CLIENT
- cmp r5, r2, lsl #(PMAP_DOMAIN_KERNEL * 2) /* Sw to kernel thread? */
- beq .Lcs_context_switched /* Yup. Don't flush cache */
- mrc p15, 0, r0, c3, c0, 0 /* r0 = old DACR */
- /*
- * Get the new L1 table pointer into r11. If we're switching to
- * an LWP with the same address space as the outgoing one, we can
- * skip the cache purge and the TTB load.
- *
- * To avoid data dep stalls that would happen anyway, we try
- * and get some useful work done in the mean time.
- */
- mrc p15, 0, r10, c2, c0, 0 /* r10 = old L1 */
- ldr r11, [r9, #(PCB_PAGEDIR)] /* r11 = new L1 */
-
-
- teq r10, r11 /* Same L1? */
- cmpeq r0, r5 /* Same DACR? */
- beq .Lcs_context_switched /* yes! */
-
- /*
- * Definately need to flush the cache.
- */
-
- ldr r1, .Lcpufuncs
- mov lr, pc
- ldr pc, [r1, #CF_IDCACHE_WBINV_ALL]
-.Lcs_cache_purge_skipped:
- /* rem: r4 = &block_userspace_access */
- /* rem: r6 = new lwp */
- /* rem: r9 = new PCB */
- /* rem: r10 = old L1 */
- /* rem: r11 = new L1 */
-
- mov r2, #0x00000000
- ldr r7, [r9, #(PCB_PL1VEC)]
-
- /*
- * Ensure the vector table is accessible by fixing up the L1
- */
- cmp r7, #0 /* No need to fixup vector table? */
- ldrne r2, [r7] /* But if yes, fetch current value */
- ldrne r0, [r9, #(PCB_L1VEC)] /* Fetch new vector_page value */
- mcr p15, 0, r5, c3, c0, 0 /* Update DACR for new context */
- cmpne r2, r0 /* Stuffing the same value? */
-#ifndef PMAP_INCLUDE_PTE_SYNC
- strne r0, [r7] /* Nope, update it */
-#else
- beq .Lcs_same_vector
- str r0, [r7] /* Otherwise, update it */
-
- /*
- * Need to sync the cache to make sure that last store is
- * visible to the MMU.
- */
- ldr r2, .Lcpufuncs
- mov r0, r7
- mov r1, #4
- mov lr, pc
- ldr pc, [r2, #CF_DCACHE_WB_RANGE]
-
-.Lcs_same_vector:
-#endif /* PMAP_INCLUDE_PTE_SYNC */
-
- cmp r10, r11 /* Switching to the same L1? */
- ldr r10, .Lcpufuncs
- beq .Lcs_same_l1 /* Yup. */
- /*
- * Do a full context switch, including full TLB flush.
- */
- mov r0, r11
- mov lr, pc
- ldr pc, [r10, #CF_CONTEXT_SWITCH]
-
- b .Lcs_context_switched
-
- /*
- * We're switching to a different process in the same L1.
- * In this situation, we only need to flush the TLB for the
- * vector_page mapping, and even then only if r7 is non-NULL.
- */
-.Lcs_same_l1:
- cmp r7, #0
- movne r0, #0 /* We *know* vector_page's VA is 0x0 */
- movne lr, pc
- ldrne pc, [r10, #CF_TLB_FLUSHID_SE]
- /*
- * We can do that, since
- * PSR_SVC32_MODE|PSR_UND32_MODE == MSR_UND32_MODE
- */
-
-.Lcs_context_switched:
-
- /* XXXSCW: Safe to re-enable FIQs here */
-
- /* rem: r9 = new PCB */
-
- mrs r3, cpsr
- /*
- * We can do that, since
- * PSR_SVC32_MODE|PSR_UND32_MODE == MSR_UND32_MODE
- */
- orr r2, r3, #(PSR_UND32_MODE)
- msr cpsr_c, r2
-
- ldr sp, [r9, #(PCB_UND_SP)]
-
- msr cpsr_c, r3 /* Restore the old mode */
- /* Restore all the save registers */
-#ifndef __XSCALE__
- add r7, r9, #PCB_R8
- ldmia r7, {r8-r13}
- sub r7, r7, #PCB_R8 /* restore PCB pointer */
-#else
- mov r7, r9
- ldr r8, [r7, #(PCB_R8)]
- ldr r9, [r7, #(PCB_R9)]
- ldr r10, [r7, #(PCB_R10)]
- ldr r11, [r7, #(PCB_R11)]
- ldr r12, [r7, #(PCB_R12)]
- ldr r13, [r7, #(PCB_SP)]
-#endif
-
- /* rem: r6 = new lwp */
- /* rem: r7 = new pcb */
-
-#ifdef ARMFPE
- add r0, r7, #(USER_SIZE) & 0x00ff
- add r0, r0, #(USER_SIZE) & 0xff00
- bl _C_LABEL(arm_fpe_core_changecontext)
-#endif
-
- /* rem: r5 = new lwp's proc */
- /* rem: r6 = new lwp */
- /* rem: r7 = new PCB */
-
-.Lswitch_return:
-
- /*
- * Pull the registers that got pushed when either savectx() or
- * cpu_switch() was called and return.
- */
- ldmfd sp!, {r4-r7, pc}
-#ifdef DIAGNOSTIC
-.Lswitch_bogons:
- adr r0, .Lswitch_panic_str
- bl _C_LABEL(panic)
-1: nop
- b 1b
-
-.Lswitch_panic_str:
- .asciz "cpu_switch: sched_qs empty with non-zero sched_whichqs!\n"
-#endif
-ENTRY(savectx)
- RET
-ENTRY(fork_trampoline)
- mov r1, r5
- mov r2, sp
- mov r0, r4
- mov fp, #0
- bl _C_LABEL(fork_exit)
- /* Kill irq"s */
- mrs r0, cpsr
- orr r0, r0, #(I32_bit)
- msr cpsr_c, r0
- DO_AST
- PULLFRAME
-
- movs pc, lr /* Exit */
-
-AST_LOCALS
--- sys/arm/arm/cpufunc_asm_ixp12x0.S
+++ /dev/null
@@ -1,90 +0,0 @@
-/* $NetBSD: cpufunc_asm_ixp12x0.S,v 1.2 2002/08/17 16:36:31 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_ixp12x0.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * This function is the same as sa110_context_switch for now, the plan
- * is to make use of the process id register to avoid cache flushes.
- */
-ENTRY(ixp12x0_context_switch)
- /*
- * CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this.
- * Thus the data cache will contain only kernel data and the
- * instruction cache will contain only kernel code, and all
- * kernel mappings are shared by all processes.
- */
-
- /* Write the TTB */
- mcr p15, 0, r0, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- mcr p15, 0, r0, c8, c7, 0 /* flush the I+D tlb */
-
- /* Make sure that pipeline is emptied */
- mov r0, r0
- mov r0, r0
- RET
-
-ENTRY(ixp12x0_drain_readbuf)
- mcr p15, 0, r0, c9, c0, 0 /* drain read buffer */
- RET
-
-/*
- * Information for the IXP12X0 cache clean/purge functions:
- *
- * * Virtual address of the memory region to use
- * * Size of memory region
- */
- .data
-
- .global _C_LABEL(ixp12x0_cache_clean_addr)
-_C_LABEL(ixp12x0_cache_clean_addr):
- .word 0xf0000000
-
- .global _C_LABEL(ixp12x0_cache_clean_size)
-_C_LABEL(ixp12x0_cache_clean_size):
- .word 0x00008000
-
- .text
-
-.Lixp12x0_cache_clean_addr:
- .word _C_LABEL(ixp12x0_cache_clean_addr)
-.Lixp12x0_cache_clean_size:
- .word _C_LABEL(ixp12x0_cache_clean_size)
--- sys/arm/arm/identcpu.c
+++ /dev/null
@@ -1,386 +0,0 @@
-/* $NetBSD: cpu.c,v 1.55 2004/02/13 11:36:10 wiz Exp $ */
-
-/*-
- * Copyright (c) 1995 Mark Brinicombe.
- * Copyright (c) 1995 Brini.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * cpu.c
- *
- * Probing and configuration for the master CPU
- *
- * Created : 10/10/95
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/identcpu.c,v 1.4 2005/01/05 21:58:47 imp Exp $");
-#include <sys/systm.h>
-#include <sys/param.h>
-#include <sys/malloc.h>
-#include <sys/time.h>
-#include <sys/proc.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/sysctl.h>
-#include <machine/cpu.h>
-
-#include <machine/cpuconf.h>
-
-char machine[] = "arm";
-
-SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD,
- machine, 0, "Machine class");
-enum cpu_class {
- CPU_CLASS_NONE,
- CPU_CLASS_ARM2,
- CPU_CLASS_ARM2AS,
- CPU_CLASS_ARM3,
- CPU_CLASS_ARM6,
- CPU_CLASS_ARM7,
- CPU_CLASS_ARM7TDMI,
- CPU_CLASS_ARM8,
- CPU_CLASS_ARM9TDMI,
- CPU_CLASS_ARM9ES,
- CPU_CLASS_ARM10E,
- CPU_CLASS_SA1,
- CPU_CLASS_XSCALE
-};
-
-static const char * const generic_steppings[16] = {
- "rev 0", "rev 1", "rev 2", "rev 3",
- "rev 4", "rev 5", "rev 6", "rev 7",
- "rev 8", "rev 9", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-static const char * const sa110_steppings[16] = {
- "rev 0", "step J", "step K", "step S",
- "step T", "rev 5", "rev 6", "rev 7",
- "rev 8", "rev 9", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-static const char * const sa1100_steppings[16] = {
- "rev 0", "step B", "step C", "rev 3",
- "rev 4", "rev 5", "rev 6", "rev 7",
- "step D", "step E", "rev 10" "step G",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-static const char * const sa1110_steppings[16] = {
- "step A-0", "rev 1", "rev 2", "rev 3",
- "step B-0", "step B-1", "step B-2", "step B-3",
- "step B-4", "step B-5", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-static const char * const ixp12x0_steppings[16] = {
- "(IXP1200 step A)", "(IXP1200 step B)",
- "rev 2", "(IXP1200 step C)",
- "(IXP1200 step D)", "(IXP1240/1250 step A)",
- "(IXP1240 step B)", "(IXP1250 step B)",
- "rev 8", "rev 9", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-static const char * const xscale_steppings[16] = {
- "step A-0", "step A-1", "step B-0", "step C-0",
- "step D-0", "rev 5", "rev 6", "rev 7",
- "rev 8", "rev 9", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-static const char * const i80321_steppings[16] = {
- "step A-0", "step B-0", "rev 2", "rev 3",
- "rev 4", "rev 5", "rev 6", "rev 7",
- "rev 8", "rev 9", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-static const char * const pxa2x0_steppings[16] = {
- "step A-0", "step A-1", "step B-0", "step B-1",
- "step B-2", "step C-0", "rev 6", "rev 7",
- "rev 8", "rev 9", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-static const char * const ixp425_steppings[16] = {
- "step 0", "rev 1", "rev 2", "rev 3",
- "rev 4", "rev 5", "rev 6", "rev 7",
- "rev 8", "rev 9", "rev 10", "rev 11",
- "rev 12", "rev 13", "rev 14", "rev 15",
-};
-
-struct cpuidtab {
- u_int32_t cpuid;
- enum cpu_class cpu_class;
- const char *cpu_name;
- const char * const *cpu_steppings;
-};
-
-const struct cpuidtab cpuids[] = {
- { CPU_ID_ARM2, CPU_CLASS_ARM2, "ARM2",
- generic_steppings },
- { CPU_ID_ARM250, CPU_CLASS_ARM2AS, "ARM250",
- generic_steppings },
-
- { CPU_ID_ARM3, CPU_CLASS_ARM3, "ARM3",
- generic_steppings },
-
- { CPU_ID_ARM600, CPU_CLASS_ARM6, "ARM600",
- generic_steppings },
- { CPU_ID_ARM610, CPU_CLASS_ARM6, "ARM610",
- generic_steppings },
- { CPU_ID_ARM620, CPU_CLASS_ARM6, "ARM620",
- generic_steppings },
-
- { CPU_ID_ARM700, CPU_CLASS_ARM7, "ARM700",
- generic_steppings },
- { CPU_ID_ARM710, CPU_CLASS_ARM7, "ARM710",
- generic_steppings },
- { CPU_ID_ARM7500, CPU_CLASS_ARM7, "ARM7500",
- generic_steppings },
- { CPU_ID_ARM710A, CPU_CLASS_ARM7, "ARM710a",
- generic_steppings },
- { CPU_ID_ARM7500FE, CPU_CLASS_ARM7, "ARM7500FE",
- generic_steppings },
- { CPU_ID_ARM710T, CPU_CLASS_ARM7TDMI, "ARM710T",
- generic_steppings },
- { CPU_ID_ARM720T, CPU_CLASS_ARM7TDMI, "ARM720T",
- generic_steppings },
- { CPU_ID_ARM740T8K, CPU_CLASS_ARM7TDMI, "ARM740T (8 KB cache)",
- generic_steppings },
- { CPU_ID_ARM740T4K, CPU_CLASS_ARM7TDMI, "ARM740T (4 KB cache)",
- generic_steppings },
-
- { CPU_ID_ARM810, CPU_CLASS_ARM8, "ARM810",
- generic_steppings },
-
- { CPU_ID_ARM920T, CPU_CLASS_ARM9TDMI, "ARM920T",
- generic_steppings },
- { CPU_ID_ARM922T, CPU_CLASS_ARM9TDMI, "ARM922T",
- generic_steppings },
- { CPU_ID_ARM940T, CPU_CLASS_ARM9TDMI, "ARM940T",
- generic_steppings },
- { CPU_ID_ARM946ES, CPU_CLASS_ARM9ES, "ARM946E-S",
- generic_steppings },
- { CPU_ID_ARM966ES, CPU_CLASS_ARM9ES, "ARM966E-S",
- generic_steppings },
- { CPU_ID_ARM966ESR1, CPU_CLASS_ARM9ES, "ARM966E-S",
- generic_steppings },
- { CPU_ID_TI925T, CPU_CLASS_ARM9TDMI, "TI ARM925T",
- generic_steppings },
-
- { CPU_ID_ARM1020E, CPU_CLASS_ARM10E, "ARM1020E",
- generic_steppings },
- { CPU_ID_ARM1022ES, CPU_CLASS_ARM10E, "ARM1022E-S",
- generic_steppings },
-
- { CPU_ID_SA110, CPU_CLASS_SA1, "SA-110",
- sa110_steppings },
- { CPU_ID_SA1100, CPU_CLASS_SA1, "SA-1100",
- sa1100_steppings },
- { CPU_ID_SA1110, CPU_CLASS_SA1, "SA-1110",
- sa1110_steppings },
-
- { CPU_ID_IXP1200, CPU_CLASS_SA1, "IXP1200",
- ixp12x0_steppings },
-
- { CPU_ID_80200, CPU_CLASS_XSCALE, "i80200",
- xscale_steppings },
-
- { CPU_ID_80321_400, CPU_CLASS_XSCALE, "i80321 400MHz",
- i80321_steppings },
- { CPU_ID_80321_600, CPU_CLASS_XSCALE, "i80321 600MHz",
- i80321_steppings },
- { CPU_ID_80321_400_B0, CPU_CLASS_XSCALE, "i80321 400MHz",
- i80321_steppings },
- { CPU_ID_80321_600_B0, CPU_CLASS_XSCALE, "i80321 600MHz",
- i80321_steppings },
-
- { CPU_ID_PXA250A, CPU_CLASS_XSCALE, "PXA250",
- pxa2x0_steppings },
- { CPU_ID_PXA210A, CPU_CLASS_XSCALE, "PXA210",
- pxa2x0_steppings },
- { CPU_ID_PXA250B, CPU_CLASS_XSCALE, "PXA250",
- pxa2x0_steppings },
- { CPU_ID_PXA210B, CPU_CLASS_XSCALE, "PXA210",
- pxa2x0_steppings },
- { CPU_ID_PXA250C, CPU_CLASS_XSCALE, "PXA250",
- pxa2x0_steppings },
- { CPU_ID_PXA210C, CPU_CLASS_XSCALE, "PXA210",
- pxa2x0_steppings },
-
- { CPU_ID_IXP425_533, CPU_CLASS_XSCALE, "IXP425 533MHz",
- ixp425_steppings },
- { CPU_ID_IXP425_400, CPU_CLASS_XSCALE, "IXP425 400MHz",
- ixp425_steppings },
- { CPU_ID_IXP425_266, CPU_CLASS_XSCALE, "IXP425 266MHz",
- ixp425_steppings },
-
- { 0, CPU_CLASS_NONE, NULL, NULL }
-};
-
-struct cpu_classtab {
- const char *class_name;
- const char *class_option;
-};
-
-const struct cpu_classtab cpu_classes[] = {
- { "unknown", NULL }, /* CPU_CLASS_NONE */
- { "ARM2", "CPU_ARM2" }, /* CPU_CLASS_ARM2 */
- { "ARM2as", "CPU_ARM250" }, /* CPU_CLASS_ARM2AS */
- { "ARM3", "CPU_ARM3" }, /* CPU_CLASS_ARM3 */
- { "ARM6", "CPU_ARM6" }, /* CPU_CLASS_ARM6 */
- { "ARM7", "CPU_ARM7" }, /* CPU_CLASS_ARM7 */
- { "ARM7TDMI", "CPU_ARM7TDMI" }, /* CPU_CLASS_ARM7TDMI */
- { "ARM8", "CPU_ARM8" }, /* CPU_CLASS_ARM8 */
- { "ARM9TDMI", NULL }, /* CPU_CLASS_ARM9TDMI */
- { "ARM9E-S", NULL }, /* CPU_CLASS_ARM9ES */
- { "ARM10E", "CPU_ARM10" }, /* CPU_CLASS_ARM10E */
- { "SA-1", "CPU_SA110" }, /* CPU_CLASS_SA1 */
- { "XScale", "CPU_XSCALE_..." }, /* CPU_CLASS_XSCALE */
-};
-
-/*
- * Report the type of the specified arm processor. This uses the generic and
- * arm specific information in the cpu structure to identify the processor.
- * The remaining fields in the cpu structure are filled in appropriately.
- */
-
-static const char * const wtnames[] = {
- "write-through",
- "write-back",
- "write-back",
- "**unknown 3**",
- "**unknown 4**",
- "write-back-locking", /* XXX XScale-specific? */
- "write-back-locking-A",
- "write-back-locking-B",
- "**unknown 8**",
- "**unknown 9**",
- "**unknown 10**",
- "**unknown 11**",
- "**unknown 12**",
- "**unknown 13**",
- "**unknown 14**",
- "**unknown 15**",
-};
-
-extern int ctrl;
-void
-identify_arm_cpu(void)
-{
- u_int cpuid;
- enum cpu_class cpu_class = CPU_CLASS_NONE;
- int i;
-
- cpuid = cpu_id();
-
- if (cpuid == 0) {
- printf("Processor failed probe - no CPU ID\n");
- return;
- }
-
- for (i = 0; cpuids[i].cpuid != 0; i++)
- if (cpuids[i].cpuid == (cpuid & CPU_ID_CPU_MASK)) {
- cpu_class = cpuids[i].cpu_class;
- printf("%s %s (%s core)\n",
- cpuids[i].cpu_name,
- cpuids[i].cpu_steppings[cpuid &
- CPU_ID_REVISION_MASK],
- cpu_classes[cpu_class].class_name);
- break;
- }
- if (cpuids[i].cpuid == 0)
- printf("unknown CPU (ID = 0x%x)\n", cpuid);
-
- switch (cpu_class) {
- case CPU_CLASS_ARM6:
- case CPU_CLASS_ARM7:
- case CPU_CLASS_ARM7TDMI:
- case CPU_CLASS_ARM8:
- if ((ctrl & CPU_CONTROL_IDC_ENABLE) == 0)
- printf(" IDC disabled");
- else
- printf(" IDC enabled");
- break;
- case CPU_CLASS_ARM9TDMI:
- case CPU_CLASS_ARM10E:
- case CPU_CLASS_SA1:
- case CPU_CLASS_XSCALE:
- if ((ctrl & CPU_CONTROL_DC_ENABLE) == 0)
- printf(" DC disabled");
- else
- printf(" DC enabled");
- if ((ctrl & CPU_CONTROL_IC_ENABLE) == 0)
- printf(" IC disabled");
- else
- printf(" IC enabled");
- break;
- default:
- break;
- }
- if ((ctrl & CPU_CONTROL_WBUF_ENABLE) == 0)
- printf(" WB disabled");
- else
- printf(" WB enabled");
-
- if (ctrl & CPU_CONTROL_LABT_ENABLE)
- printf(" LABT");
- else
- printf(" EABT");
-
- if (ctrl & CPU_CONTROL_BPRD_ENABLE)
- printf(" branch prediction enabled");
-
- /* Print cache info. */
- if (arm_picache_line_size == 0 && arm_pdcache_line_size == 0)
- return;
-
- if (arm_pcache_unified) {
- printf("%dKB/%dB %d-way %s unified cache\n",
- arm_pdcache_size / 1024,
- arm_pdcache_line_size, arm_pdcache_ways,
- wtnames[arm_pcache_type]);
- } else {
- printf("%dKB/%dB %d-way Instruction cache\n",
- arm_picache_size / 1024,
- arm_picache_line_size, arm_picache_ways);
- printf("%dKB/%dB %d-way %s Data cache\n",
- arm_pdcache_size / 1024,
- arm_pdcache_line_size, arm_pdcache_ways,
- wtnames[arm_pcache_type]);
- }
- printf("\n");
-}
-
--- sys/arm/arm/sys_machdep.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/sys_machdep.c,v 1.4 2005/02/25 22:56:16 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/sysproto.h>
-#include <sys/syscall.h>
-#include <sys/sysent.h>
-
-#include <machine/sysarch.h>
-
-#ifndef _SYS_SYSPROTO_H_
-struct sysarch_args {
- int op;
- char *parms;
-};
-#endif
-
-/* Prototypes */
-static int arm32_sync_icache (struct thread *, void *);
-static int arm32_drain_writebuf(struct thread *, void *);
-
-static int
-arm32_sync_icache(struct thread *td, void *args)
-{
- struct arm_sync_icache_args ua;
- int error;
-
- if ((error = copyin(args, &ua, sizeof(ua))) != 0)
- return (error);
-
- cpu_icache_sync_range(ua.addr, ua.len);
-
- td->td_retval[0] = 0;
- return(0);
-}
-
-static int
-arm32_drain_writebuf(struct thread *td, void *args)
-{
- /* No args. */
-
- td->td_retval[0] = 0;
- cpu_drain_writebuf();
- return(0);
-}
-
-static int
-arm32_set_tp(struct thread *td, void *args)
-{
-
- td->td_md.md_tp = args;
- return (0);
-}
-
-static int
-arm32_get_tp(struct thread *td, void *args)
-{
-
- td->td_retval[0] = (uint32_t)td->td_md.md_tp;
- return (0);
-}
-
-int
-sysarch(td, uap)
- struct thread *td;
- register struct sysarch_args *uap;
-{
- int error;
-
- switch (uap->op) {
- case ARM_SYNC_ICACHE :
- error = arm32_sync_icache(td, uap->parms);
- break;
-
- case ARM_DRAIN_WRITEBUF :
- error = arm32_drain_writebuf(td, uap->parms);
- break;
- case ARM_SET_TP:
- error = arm32_set_tp(td, uap->parms);
- break;
- case ARM_GET_TP:
- error = arm32_get_tp(td, uap->parms);
- break;
- default:
- error = EINVAL;
- break;
- }
- return (error);
-}
-
--- sys/arm/arm/cpufunc_asm_armv4.S
+++ /dev/null
@@ -1,67 +0,0 @@
-/* $NetBSD: cpufunc_asm_armv4.S,v 1.1 2001/11/10 23:14:09 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001 ARM Limited
- * Copyright (c) 1997,1998 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Causality Limited.
- * 4. The name of Causality Limited may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * ARM9 assembly functions for CPU / MMU / TLB specific operations
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_armv4.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * TLB functions
- */
-ENTRY(armv4_tlb_flushID)
- mcr p15, 0, r0, c8, c7, 0 /* flush I+D tlb */
- RET
-
-ENTRY(armv4_tlb_flushI)
- mcr p15, 0, r0, c8, c5, 0 /* flush I tlb */
- RET
-
-ENTRY(armv4_tlb_flushD)
- mcr p15, 0, r0, c8, c6, 0 /* flush D tlb */
- RET
-
-ENTRY(armv4_tlb_flushD_SE)
- mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */
- RET
-
-/*
- * Other functions
- */
-ENTRY(armv4_drain_writebuf)
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
- RET
--- sys/arm/arm/uio_machdep.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/*-
- * Copyright (c) 2004 Alan L. Cox <alc at cs.rice.edu>
- * Copyright (c) 1982, 1986, 1991, 1993
- * The Regents of the University of California. All rights reserved.
- * (c) UNIX System Laboratories, Inc.
- * All or some portions of this file are derived from material licensed
- * to the University of California by American Telephone and Telegraph
- * Co. or Unix System Laboratories, Inc. and are reproduced herein with
- * the permission of UNIX System Laboratories, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)kern_subr.c 8.3 (Berkeley) 1/21/94
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/uio_machdep.c,v 1.5 2005/01/05 21:58:47 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/proc.h>
-#include <sys/systm.h>
-#include <sys/uio.h>
-#include <sys/sf_buf.h>
-
-#include <vm/vm.h>
-#include <vm/vm_page.h>
-
-#include <machine/vmparam.h>
-
-/*
- * Implement uiomove(9) from physical memory using sf_bufs to
- * avoid the creation and destruction of ephemeral mappings.
- */
-int
-uiomove_fromphys(vm_page_t ma[], vm_offset_t offset, int n, struct uio *uio)
-{
- struct thread *td = curthread;
- struct iovec *iov;
- void *cp;
- vm_offset_t page_offset;
- size_t cnt;
- int error = 0;
- int save = 0;
- struct sf_buf *sf;
-
- KASSERT(uio->uio_rw == UIO_READ || uio->uio_rw == UIO_WRITE,
- ("uiomove_fromphys: mode"));
- KASSERT(uio->uio_segflg != UIO_USERSPACE || uio->uio_td == curthread,
- ("uiomove_fromphys proc"));
- save = td->td_pflags & TDP_DEADLKTREAT;
- td->td_pflags |= TDP_DEADLKTREAT;
- while (n > 0 && uio->uio_resid) {
- iov = uio->uio_iov;
- cnt = iov->iov_len;
- if (cnt == 0) {
- uio->uio_iov++;
- uio->uio_iovcnt--;
- continue;
- }
- if (cnt > n)
- cnt = n;
- page_offset = offset & PAGE_MASK;
- cnt = min(cnt, PAGE_SIZE - page_offset);
- sf = sf_buf_alloc(ma[offset >> PAGE_SHIFT], 0);
- cp = (char*)sf_buf_kva(sf) + page_offset;
- switch (uio->uio_segflg) {
- case UIO_USERSPACE:
- if (ticks - PCPU_GET(switchticks) >= hogticks)
- uio_yield();
- if (uio->uio_rw == UIO_READ)
- error = copyout(cp, iov->iov_base, cnt);
- else
- error = copyin(iov->iov_base, cp, cnt);
- if (error)
- goto out;
- break;
- case UIO_SYSSPACE:
- if (uio->uio_rw == UIO_READ)
- bcopy(cp, iov->iov_base, cnt);
- else
- bcopy(iov->iov_base, cp, cnt);
- break;
- case UIO_NOCOPY:
- break;
- }
- sf_buf_free(sf);
- iov->iov_base = (char *)iov->iov_base + cnt;
- iov->iov_len -= cnt;
- uio->uio_resid -= cnt;
- uio->uio_offset += cnt;
- offset += cnt;
- n -= cnt;
- }
-out:
- if (save == 0)
- td->td_pflags &= ~TDP_DEADLKTREAT;
- return (error);
-}
--- sys/arm/arm/nexus_io_asm.S
+++ /dev/null
@@ -1,114 +0,0 @@
-/* $NetBSD: mainbus_io_asm.S,v 1.1 2001/02/24 19:38:02 reinoud Exp $ */
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/nexus_io_asm.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * bus_space I/O functions for nexus
- */
-
-
-/*
- * read single
- */
-
-ENTRY(nexus_bs_r_1)
- ldrb r0, [r1, r2, lsl #2]
- RET
-
-ENTRY(nexus_bs_r_2)
- ldr r0, [r1, r2, lsl #2]
- bic r0, r0, #0xff000000
- bic r0, r0, #0x00ff0000
- RET
-
-ENTRY(nexus_bs_r_4)
- ldr r0, [r1, r2, lsl #2]
- RET
-
-/*
- * write single
- */
-
-ENTRY(nexus_bs_w_1)
- strb r3, [r1, r2, lsl #2]
- RET
-
-ENTRY(nexus_bs_w_2)
- mov r3, r3, lsl #16
- orr r3, r3, r3, lsr #16
- str r3, [r1, r2, lsl #2]
- RET
-
-ENTRY(nexus_bs_w_4)
- str r3, [r1, r2, lsl #2]
- RET
-
-/*
- * read multiple
- */
-
-ENTRY(nexus_bs_rm_2)
- add r0, r1, r2, lsl #2
- mov r1, r3
- ldr r2, [sp, #0]
- b _C_LABEL(insw16)
-
-/*
- * write multiple
- */
-
-ENTRY(nexus_bs_wm_1)
- add r0, r1, r2, lsl #2
- ldr r2, [sp, #0]
-
- /* Make sure that we have a positive length */
- cmp r2, #0x00000000
- movle pc, lr
-
-nexus_wm_1_loop:
- ldrb r1, [r3], #0x0001
- str r1, [r0]
- subs r2, r2, #0x00000001
- bgt nexus_wm_1_loop
-
- RET
-
-ENTRY(nexus_bs_wm_2)
- add r0, r1, r2, lsl #2
- mov r1, r3
- ldr r2, [sp, #0]
- b _C_LABEL(outsw16)
--- sys/arm/arm/cpufunc_asm_sa11x0.S
+++ /dev/null
@@ -1,125 +0,0 @@
-/* $NetBSD: cpufunc_asm_sa11x0.S,v 1.3 2002/08/17 16:36:32 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_sa11x0.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
- .data
- .global _C_LABEL(sa11x0_idle_mem)
-_C_LABEL(sa11x0_idle_mem):
- .word 0
-
- .text
-
- .align 5
-
- /* We're now 32-byte aligned */
-
-.Lsa11x0_idle_mem:
- .word _C_LABEL(sa11x0_idle_mem) /* 1 */
-
-/*
- * sa11x0_cpusleep
- *
- * This is called when there is nothing on any of the run queues.
- * We go into IDLE mode so that any IRQ or FIQ will awaken us.
- */
-ENTRY(sa11x0_cpu_sleep)
- ldr r1, .Lsa11x0_idle_mem /* get address of... */ /* 2 */
- nop /* 3 */
- ldr r1, [r1] /* ...non-cacheable page */ /* 4 */
- nop /* 5 */
-
- /*
- * SA-1110 manual, 9.5.2.1 (Entering Idle Mode) says that
- * to enter idle mode:
- *
- * * Disable clock switching
- * * Issue load from non-cacheable address
- * * Issue "wait for interrupt"
- *
- * The 3-insn sequence must reside in the first 3 words
- * of a cache line.
- *
- * We must disable interrupts in the CPSR so that we can
- * re-enable clock switching before servicing interrupts.
- */
-
- mrs r3, cpsr_all /* 6 */
- orr r2, r3, #(I32_bit|F32_bit) /* 7 */
- msr cpsr_all, r2 /* 8 */
-
- /* We're now 32-byte aligned */
-
- mcr p15, 0, r0, c15, c2, 2 /* disable clock switching */
- ldr r0, [r1] /* load from non-cacheable address */
- mcr p15, 0, r0, c15, c8, 2 /* wait for interrupt */
-
- mcr p15, 0, r0, c15, c1, 2 /* re-enable clock switching */
-
- /* Restore interrupts (which will cause them to be serviced). */
- msr cpsr_all, r3
- RET
-
-
-/*
- * This function is the same as sa110_context_switch for now, the plan
- * is to make use of the process id register to avoid cache flushes.
- */
-ENTRY(sa11x0_context_switch)
- /*
- * CF_CACHE_PURGE_ID will *ALWAYS* be called prior to this.
- * Thus the data cache will contain only kernel data and the
- * instruction cache will contain only kernel code, and all
- * kernel mappings are shared by all processes.
- */
-
- /* Write the TTB */
- mcr p15, 0, r0, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- mcr p15, 0, r0, c8, c7, 0 /* flush the I+D tlb */
-
- /* Make sure that pipeline is emptied */
- mov r0, r0
- mov r0, r0
- RET
-
-ENTRY(sa11x0_drain_readbuf)
- mcr p15, 0, r0, c9, c0, 0 /* drain read buffer */
- RET
--- sys/arm/arm/pmap.c
+++ /dev/null
@@ -1,4788 +0,0 @@
-/* From: $NetBSD: pmap.c,v 1.148 2004/04/03 04:35:48 bsh Exp $ */
-/*-
- * Copyright 2004 Olivier Houchard.
- * Copyright 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Steve C. Woodford for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright (c) 2002-2003 Wasabi Systems, Inc.
- * Copyright (c) 2001 Richard Earnshaw
- * Copyright (c) 2001-2002 Christopher Gilbert
- * All rights reserved.
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-/*-
- * Copyright (c) 1999 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Charles M. Hannum.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright (c) 1994-1998 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *
- * RiscBSD kernel project
- *
- * pmap.c
- *
- * Machine dependant vm stuff
- *
- * Created : 20/09/94
- */
-
-/*
- * Special compilation symbols
- * PMAP_DEBUG - Build in pmap_debug_level code
- */
-/* Include header files */
-
-#include "opt_vm.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/pmap.c,v 1.36.2.1 2005/11/13 21:45:47 alc Exp $");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/proc.h>
-#include <sys/malloc.h>
-#include <sys/msgbuf.h>
-#include <sys/vmmeter.h>
-#include <sys/mman.h>
-#include <sys/smp.h>
-#include <sys/sx.h>
-#include <sys/sched.h>
-
-#include <vm/vm.h>
-#include <vm/uma.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_object.h>
-#include <vm/vm_map.h>
-#include <vm/vm_page.h>
-#include <vm/vm_pageout.h>
-#include <vm/vm_extern.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <machine/md_var.h>
-#include <machine/vmparam.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
-#include <machine/pcb.h>
-
-#ifdef PMAP_DEBUG
-#define PDEBUG(_lev_,_stat_) \
- if (pmap_debug_level >= (_lev_)) \
- ((_stat_))
-#define dprintf printf
-
-int pmap_debug_level = 0;
-#define PMAP_INLINE
-#else /* PMAP_DEBUG */
-#define PDEBUG(_lev_,_stat_) /* Nothing */
-#define dprintf(x, arg...)
-#define PMAP_INLINE __inline
-#endif /* PMAP_DEBUG */
-
-extern struct pv_addr systempage;
-/*
- * Internal function prototypes
- */
-static void pmap_free_pv_entry (pv_entry_t);
-static pv_entry_t pmap_get_pv_entry(void);
-
-static void pmap_vac_me_harder(struct vm_page *, pmap_t,
- vm_offset_t);
-static void pmap_vac_me_kpmap(struct vm_page *, pmap_t,
- vm_offset_t);
-static void pmap_vac_me_user(struct vm_page *, pmap_t, vm_offset_t);
-static void pmap_alloc_l1(pmap_t);
-static void pmap_free_l1(pmap_t);
-static void pmap_use_l1(pmap_t);
-
-static int pmap_clearbit(struct vm_page *, u_int);
-
-static struct l2_bucket *pmap_get_l2_bucket(pmap_t, vm_offset_t);
-static struct l2_bucket *pmap_alloc_l2_bucket(pmap_t, vm_offset_t);
-static void pmap_free_l2_bucket(pmap_t, struct l2_bucket *, u_int);
-static vm_offset_t kernel_pt_lookup(vm_paddr_t);
-
-static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
-
-vm_offset_t avail_end; /* PA of last available physical page */
-vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
-vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
-vm_offset_t pmap_curmaxkvaddr;
-
-extern void *end;
-vm_offset_t kernel_vm_end = 0;
-
-struct pmap kernel_pmap_store;
-pmap_t kernel_pmap;
-
-static pt_entry_t *csrc_pte, *cdst_pte;
-static vm_offset_t csrcp, cdstp;
-static void pmap_init_l1(struct l1_ttable *, pd_entry_t *);
-/*
- * These routines are called when the CPU type is identified to set up
- * the PTE prototypes, cache modes, etc.
- *
- * The variables are always here, just in case LKMs need to reference
- * them (though, they shouldn't).
- */
-
-pt_entry_t pte_l1_s_cache_mode;
-pt_entry_t pte_l1_s_cache_mode_pt;
-pt_entry_t pte_l1_s_cache_mask;
-
-pt_entry_t pte_l2_l_cache_mode;
-pt_entry_t pte_l2_l_cache_mode_pt;
-pt_entry_t pte_l2_l_cache_mask;
-
-pt_entry_t pte_l2_s_cache_mode;
-pt_entry_t pte_l2_s_cache_mode_pt;
-pt_entry_t pte_l2_s_cache_mask;
-
-pt_entry_t pte_l2_s_prot_u;
-pt_entry_t pte_l2_s_prot_w;
-pt_entry_t pte_l2_s_prot_mask;
-
-pt_entry_t pte_l1_s_proto;
-pt_entry_t pte_l1_c_proto;
-pt_entry_t pte_l2_s_proto;
-
-void (*pmap_copy_page_func)(vm_paddr_t, vm_paddr_t);
-void (*pmap_zero_page_func)(vm_paddr_t, int, int);
-/*
- * Which pmap is currently 'live' in the cache
- *
- * XXXSCW: Fix for SMP ...
- */
-union pmap_cache_state *pmap_cache_state;
-
-LIST_HEAD(pmaplist, pmap);
-struct pmaplist allpmaps;
-
-/* static pt_entry_t *msgbufmap;*/
-struct msgbuf *msgbufp = 0;
-
-extern void bcopy_page(vm_offset_t, vm_offset_t);
-extern void bzero_page(vm_offset_t);
-
-char *_tmppt;
-
-/*
- * Metadata for L1 translation tables.
- */
-struct l1_ttable {
- /* Entry on the L1 Table list */
- SLIST_ENTRY(l1_ttable) l1_link;
-
- /* Entry on the L1 Least Recently Used list */
- TAILQ_ENTRY(l1_ttable) l1_lru;
-
- /* Track how many domains are allocated from this L1 */
- volatile u_int l1_domain_use_count;
-
- /*
- * A free-list of domain numbers for this L1.
- * We avoid using ffs() and a bitmap to track domains since ffs()
- * is slow on ARM.
- */
- u_int8_t l1_domain_first;
- u_int8_t l1_domain_free[PMAP_DOMAINS];
-
- /* Physical address of this L1 page table */
- vm_paddr_t l1_physaddr;
-
- /* KVA of this L1 page table */
- pd_entry_t *l1_kva;
-};
-
-/*
- * Convert a virtual address into its L1 table index. That is, the
- * index used to locate the L2 descriptor table pointer in an L1 table.
- * This is basically used to index l1->l1_kva[].
- *
- * Each L2 descriptor table represents 1MB of VA space.
- */
-#define L1_IDX(va) (((vm_offset_t)(va)) >> L1_S_SHIFT)
-
-/*
- * L1 Page Tables are tracked using a Least Recently Used list.
- * - New L1s are allocated from the HEAD.
- * - Freed L1s are added to the TAIl.
- * - Recently accessed L1s (where an 'access' is some change to one of
- * the userland pmaps which owns this L1) are moved to the TAIL.
- */
-static TAILQ_HEAD(, l1_ttable) l1_lru_list;
-/*
- * A list of all L1 tables
- */
-static SLIST_HEAD(, l1_ttable) l1_list;
-static struct mtx l1_lru_lock;
-
-/*
- * The l2_dtable tracks L2_BUCKET_SIZE worth of L1 slots.
- *
- * This is normally 16MB worth L2 page descriptors for any given pmap.
- * Reference counts are maintained for L2 descriptors so they can be
- * freed when empty.
- */
-struct l2_dtable {
- /* The number of L2 page descriptors allocated to this l2_dtable */
- u_int l2_occupancy;
-
- /* List of L2 page descriptors */
- struct l2_bucket {
- pt_entry_t *l2b_kva; /* KVA of L2 Descriptor Table */
- vm_paddr_t l2b_phys; /* Physical address of same */
- u_short l2b_l1idx; /* This L2 table's L1 index */
- u_short l2b_occupancy; /* How many active descriptors */
- } l2_bucket[L2_BUCKET_SIZE];
-};
-
-/* pmap_kenter_internal flags */
-#define KENTER_CACHE 0x1
-#define KENTER_USER 0x2
-
-/*
- * Given an L1 table index, calculate the corresponding l2_dtable index
- * and bucket index within the l2_dtable.
- */
-#define L2_IDX(l1idx) (((l1idx) >> L2_BUCKET_LOG2) & \
- (L2_SIZE - 1))
-#define L2_BUCKET(l1idx) ((l1idx) & (L2_BUCKET_SIZE - 1))
-
-/*
- * Given a virtual address, this macro returns the
- * virtual address required to drop into the next L2 bucket.
- */
-#define L2_NEXT_BUCKET(va) (((va) & L1_S_FRAME) + L1_S_SIZE)
-
-/*
- * L2 allocation.
- */
-#define pmap_alloc_l2_dtable() \
- (void*)uma_zalloc(l2table_zone, M_NOWAIT)
-#define pmap_free_l2_dtable(l2) \
- uma_zfree(l2table_zone, l2)
-
-/*
- * We try to map the page tables write-through, if possible. However, not
- * all CPUs have a write-through cache mode, so on those we have to sync
- * the cache when we frob page tables.
- *
- * We try to evaluate this at compile time, if possible. However, it's
- * not always possible to do that, hence this run-time var.
- */
-int pmap_needs_pte_sync;
-
-/*
- * Macro to determine if a mapping might be resident in the
- * instruction cache and/or TLB
- */
-#define PV_BEEN_EXECD(f) (((f) & (PVF_REF | PVF_EXEC)) == (PVF_REF | PVF_EXEC))
-
-/*
- * Macro to determine if a mapping might be resident in the
- * data cache and/or TLB
- */
-#define PV_BEEN_REFD(f) (((f) & PVF_REF) != 0)
-
-/*
- * Data for the pv entry allocation mechanism
- */
-#define MINPV 2048
-
-#ifndef PMAP_SHPGPERPROC
-#define PMAP_SHPGPERPROC 200
-#endif
-
-#define pmap_is_current(pm) ((pm) == pmap_kernel() || \
- curproc->p_vmspace->vm_map.pmap == (pm))
-static uma_zone_t pvzone;
-uma_zone_t l2zone;
-static uma_zone_t l2table_zone;
-static vm_offset_t pmap_kernel_l2dtable_kva;
-static vm_offset_t pmap_kernel_l2ptp_kva;
-static vm_paddr_t pmap_kernel_l2ptp_phys;
-static struct vm_object pvzone_obj;
-static struct vm_object l2zone_obj;
-static int pv_entry_count=0, pv_entry_max=0, pv_entry_high_water=0;
-int pmap_pagedaemon_waken = 0;
-
-/*
- * This list exists for the benefit of pmap_map_chunk(). It keeps track
- * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can
- * find them as necessary.
- *
- * Note that the data on this list MUST remain valid after initarm() returns,
- * as pmap_bootstrap() uses it to contruct L2 table metadata.
- */
-SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list);
-
-static void
-pmap_init_l1(struct l1_ttable *l1, pd_entry_t *l1pt)
-{
- int i;
-
- l1->l1_kva = l1pt;
- l1->l1_domain_use_count = 0;
- l1->l1_domain_first = 0;
-
- for (i = 0; i < PMAP_DOMAINS; i++)
- l1->l1_domain_free[i] = i + 1;
-
- /*
- * Copy the kernel's L1 entries to each new L1.
- */
- if (l1pt != pmap_kernel()->pm_l1->l1_kva)
- memcpy(l1pt, pmap_kernel()->pm_l1->l1_kva, L1_TABLE_SIZE);
-
- if ((l1->l1_physaddr = pmap_extract(pmap_kernel(), (vm_offset_t)l1pt)) == 0)
- panic("pmap_init_l1: can't get PA of L1 at %p", l1pt);
- SLIST_INSERT_HEAD(&l1_list, l1, l1_link);
- TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
-}
-
-static vm_offset_t
-kernel_pt_lookup(vm_paddr_t pa)
-{
- struct pv_addr *pv;
-
- SLIST_FOREACH(pv, &kernel_pt_list, pv_list) {
-#ifndef ARM32_NEW_VM_LAYOUT
- if (pv->pv_pa == (pa & ~PAGE_MASK)) {
- return (pv->pv_va | (pa & PAGE_MASK));
- }
-#else
- if (pv->pv_pa == pa)
- return (pv->pv_va);
-#endif
- }
- return (0);
-}
-
-#if (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
-void
-pmap_pte_init_generic(void)
-{
-
- pte_l1_s_cache_mode = L1_S_B|L1_S_C;
- pte_l1_s_cache_mask = L1_S_CACHE_MASK_generic;
-
- pte_l2_l_cache_mode = L2_B|L2_C;
- pte_l2_l_cache_mask = L2_L_CACHE_MASK_generic;
-
- pte_l2_s_cache_mode = L2_B|L2_C;
- pte_l2_s_cache_mask = L2_S_CACHE_MASK_generic;
-
- /*
- * If we have a write-through cache, set B and C. If
- * we have a write-back cache, then we assume setting
- * only C will make those pages write-through.
- */
- if (cpufuncs.cf_dcache_wb_range == (void *) cpufunc_nullop) {
- pte_l1_s_cache_mode_pt = L1_S_B|L1_S_C;
- pte_l2_l_cache_mode_pt = L2_B|L2_C;
- pte_l2_s_cache_mode_pt = L2_B|L2_C;
- } else {
- pte_l1_s_cache_mode_pt = L1_S_C;
- pte_l2_l_cache_mode_pt = L2_C;
- pte_l2_s_cache_mode_pt = L2_C;
- }
-
- pte_l2_s_prot_u = L2_S_PROT_U_generic;
- pte_l2_s_prot_w = L2_S_PROT_W_generic;
- pte_l2_s_prot_mask = L2_S_PROT_MASK_generic;
-
- pte_l1_s_proto = L1_S_PROTO_generic;
- pte_l1_c_proto = L1_C_PROTO_generic;
- pte_l2_s_proto = L2_S_PROTO_generic;
-
- pmap_copy_page_func = pmap_copy_page_generic;
- pmap_zero_page_func = pmap_zero_page_generic;
-}
-
-#if defined(CPU_ARM8)
-void
-pmap_pte_init_arm8(void)
-{
-
- /*
- * ARM8 is compatible with generic, but we need to use
- * the page tables uncached.
- */
- pmap_pte_init_generic();
-
- pte_l1_s_cache_mode_pt = 0;
- pte_l2_l_cache_mode_pt = 0;
- pte_l2_s_cache_mode_pt = 0;
-}
-#endif /* CPU_ARM8 */
-
-#if defined(CPU_ARM9) && defined(ARM9_CACHE_WRITE_THROUGH)
-void
-pmap_pte_init_arm9(void)
-{
-
- /*
- * ARM9 is compatible with generic, but we want to use
- * write-through caching for now.
- */
- pmap_pte_init_generic();
-
- pte_l1_s_cache_mode = L1_S_C;
- pte_l2_l_cache_mode = L2_C;
- pte_l2_s_cache_mode = L2_C;
-
- pte_l1_s_cache_mode_pt = L1_S_C;
- pte_l2_l_cache_mode_pt = L2_C;
- pte_l2_s_cache_mode_pt = L2_C;
-}
-#endif /* CPU_ARM9 */
-#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0 */
-
-#if defined(CPU_ARM10)
-void
-pmap_pte_init_arm10(void)
-{
-
- /*
- * ARM10 is compatible with generic, but we want to use
- * write-through caching for now.
- */
- pmap_pte_init_generic();
-
- pte_l1_s_cache_mode = L1_S_B | L1_S_C;
- pte_l2_l_cache_mode = L2_B | L2_C;
- pte_l2_s_cache_mode = L2_B | L2_C;
-
- pte_l1_s_cache_mode_pt = L1_S_C;
- pte_l2_l_cache_mode_pt = L2_C;
- pte_l2_s_cache_mode_pt = L2_C;
-
-}
-#endif /* CPU_ARM10 */
-
-#if ARM_MMU_SA1 == 1
-void
-pmap_pte_init_sa1(void)
-{
-
- /*
- * The StrongARM SA-1 cache does not have a write-through
- * mode. So, do the generic initialization, then reset
- * the page table cache mode to B=1,C=1, and note that
- * the PTEs need to be sync'd.
- */
- pmap_pte_init_generic();
-
- pte_l1_s_cache_mode_pt = L1_S_B|L1_S_C;
- pte_l2_l_cache_mode_pt = L2_B|L2_C;
- pte_l2_s_cache_mode_pt = L2_B|L2_C;
-
- pmap_needs_pte_sync = 1;
-}
-#endif /* ARM_MMU_SA1 == 1*/
-
-#if ARM_MMU_XSCALE == 1
-#if (ARM_NMMUS > 1)
-static u_int xscale_use_minidata;
-#endif
-
-void
-pmap_pte_init_xscale(void)
-{
- uint32_t auxctl;
- int write_through = 0;
-
- pte_l1_s_cache_mode = L1_S_B|L1_S_C|L1_S_XSCALE_P;
- pte_l1_s_cache_mask = L1_S_CACHE_MASK_xscale;
-
- pte_l2_l_cache_mode = L2_B|L2_C;
- pte_l2_l_cache_mask = L2_L_CACHE_MASK_xscale;
-
- pte_l2_s_cache_mode = L2_B|L2_C;
- pte_l2_s_cache_mask = L2_S_CACHE_MASK_xscale;
-
- pte_l1_s_cache_mode_pt = L1_S_C;
- pte_l2_l_cache_mode_pt = L2_C;
- pte_l2_s_cache_mode_pt = L2_C;
-#ifdef XSCALE_CACHE_READ_WRITE_ALLOCATE
- /*
- * The XScale core has an enhanced mode where writes that
- * miss the cache cause a cache line to be allocated. This
- * is significantly faster than the traditional, write-through
- * behavior of this case.
- */
- pte_l1_s_cache_mode |= L1_S_XSCALE_TEX(TEX_XSCALE_X);
- pte_l2_l_cache_mode |= L2_XSCALE_L_TEX(TEX_XSCALE_X);
- pte_l2_s_cache_mode |= L2_XSCALE_T_TEX(TEX_XSCALE_X);
-#endif /* XSCALE_CACHE_READ_WRITE_ALLOCATE */
-#ifdef XSCALE_CACHE_WRITE_THROUGH
- /*
- * Some versions of the XScale core have various bugs in
- * their cache units, the work-around for which is to run
- * the cache in write-through mode. Unfortunately, this
- * has a major (negative) impact on performance. So, we
- * go ahead and run fast-and-loose, in the hopes that we
- * don't line up the planets in a way that will trip the
- * bugs.
- *
- * However, we give you the option to be slow-but-correct.
- */
- write_through = 1;
-#elif defined(XSCALE_CACHE_WRITE_BACK)
- /* force write back cache mode */
- write_through = 0;
-#elif defined(CPU_XSCALE_PXA2X0)
- /*
- * Intel PXA2[15]0 processors are known to have a bug in
- * write-back cache on revision 4 and earlier (stepping
- * A[01] and B[012]). Fixed for C0 and later.
- */
- {
- uint32_t id, type;
-
- id = cpufunc_id();
- type = id & ~(CPU_ID_XSCALE_COREREV_MASK|CPU_ID_REVISION_MASK);
-
- if (type == CPU_ID_PXA250 || type == CPU_ID_PXA210) {
- if ((id & CPU_ID_REVISION_MASK) < 5) {
- /* write through for stepping A0-1 and B0-2 */
- write_through = 1;
- }
- }
- }
-#endif /* XSCALE_CACHE_WRITE_THROUGH */
-
- if (write_through) {
- pte_l1_s_cache_mode = L1_S_C;
- pte_l2_l_cache_mode = L2_C;
- pte_l2_s_cache_mode = L2_C;
- }
-
-#if (ARM_NMMUS > 1)
- xscale_use_minidata = 1;
-#endif
-
- pte_l2_s_prot_u = L2_S_PROT_U_xscale;
- pte_l2_s_prot_w = L2_S_PROT_W_xscale;
- pte_l2_s_prot_mask = L2_S_PROT_MASK_xscale;
-
- pte_l1_s_proto = L1_S_PROTO_xscale;
- pte_l1_c_proto = L1_C_PROTO_xscale;
- pte_l2_s_proto = L2_S_PROTO_xscale;
-
- pmap_copy_page_func = pmap_copy_page_xscale;
- pmap_zero_page_func = pmap_zero_page_xscale;
-
- /*
- * Disable ECC protection of page table access, for now.
- */
- __asm __volatile("mrc p15, 0, %0, c1, c0, 1" : "=r" (auxctl));
- auxctl &= ~XSCALE_AUXCTL_P;
- __asm __volatile("mcr p15, 0, %0, c1, c0, 1" : : "r" (auxctl));
-}
-
-/*
- * xscale_setup_minidata:
- *
- * Set up the mini-data cache clean area. We require the
- * caller to allocate the right amount of physically and
- * virtually contiguous space.
- */
-extern vm_offset_t xscale_minidata_clean_addr;
-extern vm_size_t xscale_minidata_clean_size; /* already initialized */
-void
-xscale_setup_minidata(vm_offset_t l1pt, vm_offset_t va, vm_paddr_t pa)
-{
- pd_entry_t *pde = (pd_entry_t *) l1pt;
- pt_entry_t *pte;
- vm_size_t size;
- uint32_t auxctl;
-
- xscale_minidata_clean_addr = va;
-
- /* Round it to page size. */
- size = (xscale_minidata_clean_size + L2_S_OFFSET) & L2_S_FRAME;
-
- for (; size != 0;
- va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) {
-#ifndef ARM32_NEW_VM_LAYOUT
- pte = (pt_entry_t *)
- kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME);
-#else
- pte = (pt_entry_t *) kernel_pt_lookup(
- pde[L1_IDX(va)] & L1_C_ADDR_MASK);
-#endif
- if (pte == NULL)
- panic("xscale_setup_minidata: can't find L2 table for "
- "VA 0x%08x", (u_int32_t) va);
-#ifndef ARM32_NEW_VM_LAYOUT
- pte[(va >> PAGE_SHIFT) & 0x3ff] =
-#else
- pte[l2pte_index(va)] =
-#endif
- L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, VM_PROT_READ) |
- L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X);
- }
-
- /*
- * Configure the mini-data cache for write-back with
- * read/write-allocate.
- *
- * NOTE: In order to reconfigure the mini-data cache, we must
- * make sure it contains no valid data! In order to do that,
- * we must issue a global data cache invalidate command!
- *
- * WE ASSUME WE ARE RUNNING UN-CACHED WHEN THIS ROUTINE IS CALLED!
- * THIS IS VERY IMPORTANT!
- */
-
- /* Invalidate data and mini-data. */
- __asm __volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
- __asm __volatile("mrc p15, 0, %0, c1, c0, 1" : "=r" (auxctl));
- auxctl = (auxctl & ~XSCALE_AUXCTL_MD_MASK) | XSCALE_AUXCTL_MD_WB_RWA;
- __asm __volatile("mcr p15, 0, %0, c1, c0, 1" : : "r" (auxctl));
-}
-#endif
-
-/*
- * Allocate an L1 translation table for the specified pmap.
- * This is called at pmap creation time.
- */
-static void
-pmap_alloc_l1(pmap_t pm)
-{
- struct l1_ttable *l1;
- u_int8_t domain;
-
- /*
- * Remove the L1 at the head of the LRU list
- */
- mtx_lock(&l1_lru_lock);
- l1 = TAILQ_FIRST(&l1_lru_list);
- TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
-
- /*
- * Pick the first available domain number, and update
- * the link to the next number.
- */
- domain = l1->l1_domain_first;
- l1->l1_domain_first = l1->l1_domain_free[domain];
-
- /*
- * If there are still free domain numbers in this L1,
- * put it back on the TAIL of the LRU list.
- */
- if (++l1->l1_domain_use_count < PMAP_DOMAINS)
- TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
-
- mtx_unlock(&l1_lru_lock);
-
- /*
- * Fix up the relevant bits in the pmap structure
- */
- pm->pm_l1 = l1;
- pm->pm_domain = domain;
-}
-
-/*
- * Free an L1 translation table.
- * This is called at pmap destruction time.
- */
-static void
-pmap_free_l1(pmap_t pm)
-{
- struct l1_ttable *l1 = pm->pm_l1;
-
- mtx_lock(&l1_lru_lock);
-
- /*
- * If this L1 is currently on the LRU list, remove it.
- */
- if (l1->l1_domain_use_count < PMAP_DOMAINS)
- TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
-
- /*
- * Free up the domain number which was allocated to the pmap
- */
- l1->l1_domain_free[pm->pm_domain] = l1->l1_domain_first;
- l1->l1_domain_first = pm->pm_domain;
- l1->l1_domain_use_count--;
-
- /*
- * The L1 now must have at least 1 free domain, so add
- * it back to the LRU list. If the use count is zero,
- * put it at the head of the list, otherwise it goes
- * to the tail.
- */
- if (l1->l1_domain_use_count == 0) {
- TAILQ_INSERT_HEAD(&l1_lru_list, l1, l1_lru);
- } else
- TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
-
- mtx_unlock(&l1_lru_lock);
-}
-
-static PMAP_INLINE void
-pmap_use_l1(pmap_t pm)
-{
- struct l1_ttable *l1;
-
- /*
- * Do nothing if we're in interrupt context.
- * Access to an L1 by the kernel pmap must not affect
- * the LRU list.
- */
- if (pm == pmap_kernel())
- return;
-
- l1 = pm->pm_l1;
-
- /*
- * If the L1 is not currently on the LRU list, just return
- */
- if (l1->l1_domain_use_count == PMAP_DOMAINS)
- return;
-
- mtx_lock(&l1_lru_lock);
-
- /*
- * Check the use count again, now that we've acquired the lock
- */
- if (l1->l1_domain_use_count == PMAP_DOMAINS) {
- mtx_unlock(&l1_lru_lock);
- return;
- }
-
- /*
- * Move the L1 to the back of the LRU list
- */
- TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
- TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
-
- mtx_unlock(&l1_lru_lock);
-}
-
-
-/*
- * Returns a pointer to the L2 bucket associated with the specified pmap
- * and VA, or NULL if no L2 bucket exists for the address.
- */
-static PMAP_INLINE struct l2_bucket *
-pmap_get_l2_bucket(pmap_t pm, vm_offset_t va)
-{
- struct l2_dtable *l2;
- struct l2_bucket *l2b;
- u_short l1idx;
-
- l1idx = L1_IDX(va);
-
- if ((l2 = pm->pm_l2[L2_IDX(l1idx)]) == NULL ||
- (l2b = &l2->l2_bucket[L2_BUCKET(l1idx)])->l2b_kva == NULL)
- return (NULL);
-
- return (l2b);
-}
-
-/*
- * Returns a pointer to the L2 bucket associated with the specified pmap
- * and VA.
- *
- * If no L2 bucket exists, perform the necessary allocations to put an L2
- * bucket/page table in place.
- *
- * Note that if a new L2 bucket/page was allocated, the caller *must*
- * increment the bucket occupancy counter appropriately *before*
- * releasing the pmap's lock to ensure no other thread or cpu deallocates
- * the bucket/page in the meantime.
- */
-static struct l2_bucket *
-pmap_alloc_l2_bucket(pmap_t pm, vm_offset_t va)
-{
- struct l2_dtable *l2;
- struct l2_bucket *l2b;
- u_short l1idx;
-
- l1idx = L1_IDX(va);
-
- if ((l2 = pm->pm_l2[L2_IDX(l1idx)]) == NULL) {
- /*
- * No mapping at this address, as there is
- * no entry in the L1 table.
- * Need to allocate a new l2_dtable.
- */
- if ((l2 = pmap_alloc_l2_dtable()) == NULL) {
- return (NULL);
- }
- bzero(l2, sizeof(*l2));
- /*
- * Link it into the parent pmap
- */
- pm->pm_l2[L2_IDX(l1idx)] = l2;
- }
-
- l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
-
- /*
- * Fetch pointer to the L2 page table associated with the address.
- */
- if (l2b->l2b_kva == NULL) {
- pt_entry_t *ptep;
-
- /*
- * No L2 page table has been allocated. Chances are, this
- * is because we just allocated the l2_dtable, above.
- */
- ptep = (void*)uma_zalloc(l2zone, M_NOWAIT);
- l2b->l2b_phys = vtophys(ptep);
- if (ptep == NULL) {
- /*
- * Oops, no more L2 page tables available at this
- * time. We may need to deallocate the l2_dtable
- * if we allocated a new one above.
- */
- if (l2->l2_occupancy == 0) {
- pm->pm_l2[L2_IDX(l1idx)] = NULL;
- pmap_free_l2_dtable(l2);
- }
- return (NULL);
- }
-
- l2->l2_occupancy++;
- l2b->l2b_kva = ptep;
- l2b->l2b_l1idx = l1idx;
- }
-
- return (l2b);
-}
-
-static PMAP_INLINE void
-#ifndef PMAP_INCLUDE_PTE_SYNC
-pmap_free_l2_ptp(pt_entry_t *l2)
-#else
-pmap_free_l2_ptp(boolean_t need_sync, pt_entry_t *l2)
-#endif
-{
-#ifdef PMAP_INCLUDE_PTE_SYNC
- /*
- * Note: With a write-back cache, we may need to sync this
- * L2 table before re-using it.
- * This is because it may have belonged to a non-current
- * pmap, in which case the cache syncs would have been
- * skipped when the pages were being unmapped. If the
- * L2 table were then to be immediately re-allocated to
- * the *current* pmap, it may well contain stale mappings
- * which have not yet been cleared by a cache write-back
- * and so would still be visible to the mmu.
- */
- if (need_sync)
- PTE_SYNC_RANGE(l2, L2_TABLE_SIZE_REAL / sizeof(pt_entry_t));
-#endif
- uma_zfree(l2zone, l2);
-}
-/*
- * One or more mappings in the specified L2 descriptor table have just been
- * invalidated.
- *
- * Garbage collect the metadata and descriptor table itself if necessary.
- *
- * The pmap lock must be acquired when this is called (not necessary
- * for the kernel pmap).
- */
-static void
-pmap_free_l2_bucket(pmap_t pm, struct l2_bucket *l2b, u_int count)
-{
- struct l2_dtable *l2;
- pd_entry_t *pl1pd, l1pd;
- pt_entry_t *ptep;
- u_short l1idx;
-
-
- /*
- * Update the bucket's reference count according to how many
- * PTEs the caller has just invalidated.
- */
- l2b->l2b_occupancy -= count;
-
- /*
- * Note:
- *
- * Level 2 page tables allocated to the kernel pmap are never freed
- * as that would require checking all Level 1 page tables and
- * removing any references to the Level 2 page table. See also the
- * comment elsewhere about never freeing bootstrap L2 descriptors.
- *
- * We make do with just invalidating the mapping in the L2 table.
- *
- * This isn't really a big deal in practice and, in fact, leads
- * to a performance win over time as we don't need to continually
- * alloc/free.
- */
- if (l2b->l2b_occupancy > 0 || pm == pmap_kernel())
- return;
-
- /*
- * There are no more valid mappings in this level 2 page table.
- * Go ahead and NULL-out the pointer in the bucket, then
- * free the page table.
- */
- l1idx = l2b->l2b_l1idx;
- ptep = l2b->l2b_kva;
- l2b->l2b_kva = NULL;
-
- pl1pd = &pm->pm_l1->l1_kva[l1idx];
-
- /*
- * If the L1 slot matches the pmap's domain
- * number, then invalidate it.
- */
- l1pd = *pl1pd & (L1_TYPE_MASK | L1_C_DOM_MASK);
- if (l1pd == (L1_C_DOM(pm->pm_domain) | L1_TYPE_C)) {
- *pl1pd = 0;
- PTE_SYNC(pl1pd);
- }
-
- /*
- * Release the L2 descriptor table back to the pool cache.
- */
-#ifndef PMAP_INCLUDE_PTE_SYNC
- pmap_free_l2_ptp(ptep);
-#else
- pmap_free_l2_ptp(!pmap_is_current(pm), ptep);
-#endif
-
- /*
- * Update the reference count in the associated l2_dtable
- */
- l2 = pm->pm_l2[L2_IDX(l1idx)];
- if (--l2->l2_occupancy > 0)
- return;
-
- /*
- * There are no more valid mappings in any of the Level 1
- * slots managed by this l2_dtable. Go ahead and NULL-out
- * the pointer in the parent pmap and free the l2_dtable.
- */
- pm->pm_l2[L2_IDX(l1idx)] = NULL;
- pmap_free_l2_dtable(l2);
-}
-
-/*
- * Pool cache constructors for L2 descriptor tables, metadata and pmap
- * structures.
- */
-static int
-pmap_l2ptp_ctor(void *mem, int size, void *arg, int flags)
-{
-#ifndef PMAP_INCLUDE_PTE_SYNC
- struct l2_bucket *l2b;
- pt_entry_t *ptep, pte;
-#ifdef ARM_USE_SMALL_ALLOC
- pd_entry_t *pde;
-#endif
- vm_offset_t va = (vm_offset_t)mem & ~PAGE_MASK;
-
- /*
- * The mappings for these page tables were initially made using
- * pmap_kenter() by the pool subsystem. Therefore, the cache-
- * mode will not be right for page table mappings. To avoid
- * polluting the pmap_kenter() code with a special case for
- * page tables, we simply fix up the cache-mode here if it's not
- * correct.
- */
-#ifdef ARM_USE_SMALL_ALLOC
- pde = &kernel_pmap->pm_l1->l1_kva[L1_IDX(va)];
- if (!l1pte_section_p(*pde)) {
-#endif
- l2b = pmap_get_l2_bucket(pmap_kernel(), va);
- ptep = &l2b->l2b_kva[l2pte_index(va)];
- pte = *ptep;
-
- if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) {
- /*
- * Page tables must have the cache-mode set to
- * Write-Thru.
- */
- *ptep = (pte & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode_pt;
- PTE_SYNC(ptep);
- cpu_tlb_flushD_SE(va);
- cpu_cpwait();
- }
-
-#ifdef ARM_USE_SMALL_ALLOC
- }
-#endif
-#endif
- memset(mem, 0, L2_TABLE_SIZE_REAL);
- PTE_SYNC_RANGE(mem, L2_TABLE_SIZE_REAL / sizeof(pt_entry_t));
- return (0);
-}
-
-/*
- * A bunch of routines to conditionally flush the caches/TLB depending
- * on whether the specified pmap actually needs to be flushed at any
- * given time.
- */
-static PMAP_INLINE void
-pmap_tlb_flushID_SE(pmap_t pm, vm_offset_t va)
-{
-
- if (pmap_is_current(pm))
- cpu_tlb_flushID_SE(va);
-}
-
-static PMAP_INLINE void
-pmap_tlb_flushD_SE(pmap_t pm, vm_offset_t va)
-{
-
- if (pmap_is_current(pm))
- cpu_tlb_flushD_SE(va);
-}
-
-static PMAP_INLINE void
-pmap_tlb_flushID(pmap_t pm)
-{
-
- if (pmap_is_current(pm))
- cpu_tlb_flushID();
-}
-static PMAP_INLINE void
-pmap_tlb_flushD(pmap_t pm)
-{
-
- if (pmap_is_current(pm))
- cpu_tlb_flushD();
-}
-
-static PMAP_INLINE void
-pmap_idcache_wbinv_range(pmap_t pm, vm_offset_t va, vm_size_t len)
-{
-
- if (pmap_is_current(pm))
- cpu_idcache_wbinv_range(va, len);
-}
-
-static PMAP_INLINE void
-pmap_dcache_wb_range(pmap_t pm, vm_offset_t va, vm_size_t len,
- boolean_t do_inv, boolean_t rd_only)
-{
-
- if (pmap_is_current(pm)) {
- if (do_inv) {
- if (rd_only)
- cpu_dcache_inv_range(va, len);
- else
- cpu_dcache_wbinv_range(va, len);
- } else
- if (!rd_only)
- cpu_dcache_wb_range(va, len);
- }
-}
-
-static PMAP_INLINE void
-pmap_idcache_wbinv_all(pmap_t pm)
-{
-
- if (pmap_is_current(pm))
- cpu_idcache_wbinv_all();
-}
-
-static PMAP_INLINE void
-pmap_dcache_wbinv_all(pmap_t pm)
-{
-
- if (pmap_is_current(pm))
- cpu_dcache_wbinv_all();
-}
-
-/*
- * this routine defines the region(s) of memory that should
- * not be tested for the modified bit.
- */
-static PMAP_INLINE int
-pmap_track_modified(vm_offset_t va)
-{
- if ((va < kmi.clean_sva) || (va >= kmi.clean_eva))
- return 1;
- else
- return 0;
-}
-/*
- * PTE_SYNC_CURRENT:
- *
- * Make sure the pte is written out to RAM.
- * We need to do this for one of two cases:
- * - We're dealing with the kernel pmap
- * - There is no pmap active in the cache/tlb.
- * - The specified pmap is 'active' in the cache/tlb.
- */
-#ifdef PMAP_INCLUDE_PTE_SYNC
-#define PTE_SYNC_CURRENT(pm, ptep) \
-do { \
- if (PMAP_NEEDS_PTE_SYNC && \
- pmap_is_current(pm)) \
- PTE_SYNC(ptep); \
-} while (/*CONSTCOND*/0)
-#else
-#define PTE_SYNC_CURRENT(pm, ptep) /* nothing */
-#endif
-
-/*
- * Since we have a virtually indexed cache, we may need to inhibit caching if
- * there is more than one mapping and at least one of them is writable.
- * Since we purge the cache on every context switch, we only need to check for
- * other mappings within the same pmap, or kernel_pmap.
- * This function is also called when a page is unmapped, to possibly reenable
- * caching on any remaining mappings.
- *
- * The code implements the following logic, where:
- *
- * KW = # of kernel read/write pages
- * KR = # of kernel read only pages
- * UW = # of user read/write pages
- * UR = # of user read only pages
- *
- * KC = kernel mapping is cacheable
- * UC = user mapping is cacheable
- *
- * KW=0,KR=0 KW=0,KR>0 KW=1,KR=0 KW>1,KR>=0
- * +---------------------------------------------
- * UW=0,UR=0 | --- KC=1 KC=1 KC=0
- * UW=0,UR>0 | UC=1 KC=1,UC=1 KC=0,UC=0 KC=0,UC=0
- * UW=1,UR=0 | UC=1 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0
- * UW>1,UR>=0 | UC=0 KC=0,UC=0 KC=0,UC=0 KC=0,UC=0
- */
-
-static const int pmap_vac_flags[4][4] = {
- {-1, 0, 0, PVF_KNC},
- {0, 0, PVF_NC, PVF_NC},
- {0, PVF_NC, PVF_NC, PVF_NC},
- {PVF_UNC, PVF_NC, PVF_NC, PVF_NC}
-};
-
-static PMAP_INLINE int
-pmap_get_vac_flags(const struct vm_page *pg)
-{
- int kidx, uidx;
-
- kidx = 0;
- if (pg->md.kro_mappings || pg->md.krw_mappings > 1)
- kidx |= 1;
- if (pg->md.krw_mappings)
- kidx |= 2;
-
- uidx = 0;
- if (pg->md.uro_mappings || pg->md.urw_mappings > 1)
- uidx |= 1;
- if (pg->md.urw_mappings)
- uidx |= 2;
-
- return (pmap_vac_flags[uidx][kidx]);
-}
-
-static __inline void
-pmap_vac_me_harder(struct vm_page *pg, pmap_t pm, vm_offset_t va)
-{
- int nattr;
-
- nattr = pmap_get_vac_flags(pg);
-
- if (nattr < 0) {
- pg->md.pvh_attrs &= ~PVF_NC;
- return;
- }
-
- if (nattr == 0 && (pg->md.pvh_attrs & PVF_NC) == 0) {
- return;
- }
-
- if (pm == pmap_kernel())
- pmap_vac_me_kpmap(pg, pm, va);
- else
- pmap_vac_me_user(pg, pm, va);
-
- pg->md.pvh_attrs = (pg->md.pvh_attrs & ~PVF_NC) | nattr;
-}
-
-static void
-pmap_vac_me_kpmap(struct vm_page *pg, pmap_t pm, vm_offset_t va)
-{
- u_int u_cacheable, u_entries;
- struct pv_entry *pv;
- pmap_t last_pmap = pm;
-
- /*
- * Pass one, see if there are both kernel and user pmaps for
- * this page. Calculate whether there are user-writable or
- * kernel-writable pages.
- */
- u_cacheable = 0;
- TAILQ_FOREACH(pv, &pg->md.pv_list, pv_list) {
- if (pv->pv_pmap != pm && (pv->pv_flags & PVF_NC) == 0)
- u_cacheable++;
- }
-
- u_entries = pg->md.urw_mappings + pg->md.uro_mappings;
-
- /*
- * We know we have just been updating a kernel entry, so if
- * all user pages are already cacheable, then there is nothing
- * further to do.
- */
- if (pg->md.k_mappings == 0 && u_cacheable == u_entries)
- return;
-
- if (u_entries) {
- /*
- * Scan over the list again, for each entry, if it
- * might not be set correctly, call pmap_vac_me_user
- * to recalculate the settings.
- */
- TAILQ_FOREACH(pv, &pg->md.pv_list, pv_list) {
- /*
- * We know kernel mappings will get set
- * correctly in other calls. We also know
- * that if the pmap is the same as last_pmap
- * then we've just handled this entry.
- */
- if (pv->pv_pmap == pm || pv->pv_pmap == last_pmap)
- continue;
-
- /*
- * If there are kernel entries and this page
- * is writable but non-cacheable, then we can
- * skip this entry also.
- */
- if (pg->md.k_mappings &&
- (pv->pv_flags & (PVF_NC | PVF_WRITE)) ==
- (PVF_NC | PVF_WRITE))
- continue;
-
- /*
- * Similarly if there are no kernel-writable
- * entries and the page is already
- * read-only/cacheable.
- */
- if (pg->md.krw_mappings == 0 &&
- (pv->pv_flags & (PVF_NC | PVF_WRITE)) == 0)
- continue;
-
- /*
- * For some of the remaining cases, we know
- * that we must recalculate, but for others we
- * can't tell if they are correct or not, so
- * we recalculate anyway.
- */
- pmap_vac_me_user(pg, (last_pmap = pv->pv_pmap), 0);
- }
-
- if (pg->md.k_mappings == 0)
- return;
- }
-
- pmap_vac_me_user(pg, pm, va);
-}
-
-static void
-pmap_vac_me_user(struct vm_page *pg, pmap_t pm, vm_offset_t va)
-{
- pmap_t kpmap = pmap_kernel();
- struct pv_entry *pv, *npv;
- struct l2_bucket *l2b;
- pt_entry_t *ptep, pte;
- u_int entries = 0;
- u_int writable = 0;
- u_int cacheable_entries = 0;
- u_int kern_cacheable = 0;
- u_int other_writable = 0;
-
- /*
- * Count mappings and writable mappings in this pmap.
- * Include kernel mappings as part of our own.
- * Keep a pointer to the first one.
- */
- npv = TAILQ_FIRST(&pg->md.pv_list);
- TAILQ_FOREACH(pv, &pg->md.pv_list, pv_list) {
- /* Count mappings in the same pmap */
- if (pm == pv->pv_pmap || kpmap == pv->pv_pmap) {
- if (entries++ == 0)
- npv = pv;
-
- /* Cacheable mappings */
- if ((pv->pv_flags & PVF_NC) == 0) {
- cacheable_entries++;
- if (kpmap == pv->pv_pmap)
- kern_cacheable++;
- }
-
- /* Writable mappings */
- if (pv->pv_flags & PVF_WRITE)
- ++writable;
- } else
- if (pv->pv_flags & PVF_WRITE)
- other_writable = 1;
- }
-
- /*
- * Enable or disable caching as necessary.
- * Note: the first entry might be part of the kernel pmap,
- * so we can't assume this is indicative of the state of the
- * other (maybe non-kpmap) entries.
- */
- if ((entries > 1 && writable) ||
- (entries > 0 && pm == kpmap && other_writable)) {
- if (cacheable_entries == 0)
- return;
-
- for (pv = npv; pv; pv = TAILQ_NEXT(pv, pv_list)) {
- if ((pm != pv->pv_pmap && kpmap != pv->pv_pmap) ||
- (pv->pv_flags & PVF_NC))
- continue;
-
- pv->pv_flags |= PVF_NC;
-
- l2b = pmap_get_l2_bucket(pv->pv_pmap, pv->pv_va);
- ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
- pte = *ptep & ~L2_S_CACHE_MASK;
-
- if ((va != pv->pv_va || pm != pv->pv_pmap) &&
- l2pte_valid(pte)) {
- if (PV_BEEN_EXECD(pv->pv_flags)) {
- pmap_idcache_wbinv_range(pv->pv_pmap,
- pv->pv_va, PAGE_SIZE);
- pmap_tlb_flushID_SE(pv->pv_pmap,
- pv->pv_va);
- } else
- if (PV_BEEN_REFD(pv->pv_flags)) {
- pmap_dcache_wb_range(pv->pv_pmap,
- pv->pv_va, PAGE_SIZE, TRUE,
- (pv->pv_flags & PVF_WRITE) == 0);
- pmap_tlb_flushD_SE(pv->pv_pmap,
- pv->pv_va);
- }
- }
-
- *ptep = pte;
- PTE_SYNC_CURRENT(pv->pv_pmap, ptep);
- }
- cpu_cpwait();
- } else
- if (entries > cacheable_entries) {
- /*
- * Turn cacheing back on for some pages. If it is a kernel
- * page, only do so if there are no other writable pages.
- */
- for (pv = npv; pv; pv = TAILQ_NEXT(pv, pv_list)) {
- if (!(pv->pv_flags & PVF_NC) || (pm != pv->pv_pmap &&
- (kpmap != pv->pv_pmap || other_writable)))
- continue;
-
- pv->pv_flags &= ~PVF_NC;
-
- l2b = pmap_get_l2_bucket(pv->pv_pmap, pv->pv_va);
- ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
- pte = (*ptep & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode;
-
- if (l2pte_valid(pte)) {
- if (PV_BEEN_EXECD(pv->pv_flags)) {
- pmap_tlb_flushID_SE(pv->pv_pmap,
- pv->pv_va);
- } else
- if (PV_BEEN_REFD(pv->pv_flags)) {
- pmap_tlb_flushD_SE(pv->pv_pmap,
- pv->pv_va);
- }
- }
-
- *ptep = pte;
- PTE_SYNC_CURRENT(pv->pv_pmap, ptep);
- }
- }
-}
-
-/*
- * Modify pte bits for all ptes corresponding to the given physical address.
- * We use `maskbits' rather than `clearbits' because we're always passing
- * constants and the latter would require an extra inversion at run-time.
- */
-static int
-pmap_clearbit(struct vm_page *pg, u_int maskbits)
-{
- struct l2_bucket *l2b;
- struct pv_entry *pv;
- pt_entry_t *ptep, npte, opte;
- pmap_t pm;
- vm_offset_t va;
- u_int oflags;
- int count = 0;
-#if 0
- PMAP_HEAD_TO_MAP_LOCK();
- simple_lock(&pg->mdpage.pvh_slock);
-#endif
-
- /*
- * Clear saved attributes (modify, reference)
- */
- pg->md.pvh_attrs &= ~(maskbits & (PVF_MOD | PVF_REF));
-
- if (TAILQ_EMPTY(&pg->md.pv_list)) {
-#if 0
- simple_unlock(&pg->mdpage.pvh_slock);
- PMAP_HEAD_TO_MAP_UNLOCK();
-#endif
- return (0);
- }
-
- /*
- * Loop over all current mappings setting/clearing as appropos
- */
- TAILQ_FOREACH(pv, &pg->md.pv_list, pv_list) {
- va = pv->pv_va;
- pm = pv->pv_pmap;
- oflags = pv->pv_flags;
- pv->pv_flags &= ~maskbits;
-
-#if 0
- pmap_acquire_pmap_lock(pm);
-#endif
-
- l2b = pmap_get_l2_bucket(pm, va);
-
- ptep = &l2b->l2b_kva[l2pte_index(va)];
- npte = opte = *ptep;
-
- if (maskbits & (PVF_WRITE|PVF_MOD) &&
- !pmap_track_modified(pv->pv_va)) {
- if ((pv->pv_flags & PVF_NC)) {
- /*
- * Entry is not cacheable:
- *
- * Don't turn caching on again if this is a
- * modified emulation. This would be
- * inconsitent with the settings created by
- * pmap_vac_me_harder(). Otherwise, it's safe
- * to re-enable cacheing.
- *
- * There's no need to call pmap_vac_me_harder()
- * here: all pages are losing their write
- * permission.
- */
- if (maskbits & PVF_WRITE) {
- npte |= pte_l2_s_cache_mode;
- pv->pv_flags &= ~PVF_NC;
- }
- } else
- if (opte & L2_S_PROT_W) {
- vm_page_dirty(pg);
- /*
- * Entry is writable/cacheable: check if pmap
- * is current if it is flush it, otherwise it
- * won't be in the cache
- */
- if (PV_BEEN_EXECD(oflags))
- pmap_idcache_wbinv_range(pm, pv->pv_va,
- PAGE_SIZE);
- else
- if (PV_BEEN_REFD(oflags))
- pmap_dcache_wb_range(pm, pv->pv_va,
- PAGE_SIZE,
- (maskbits & PVF_REF) ? TRUE : FALSE,
- FALSE);
- }
-
- /* make the pte read only */
- npte &= ~L2_S_PROT_W;
-
- if (maskbits & PVF_WRITE) {
- /*
- * Keep alias accounting up to date
- */
- if (pv->pv_pmap == pmap_kernel()) {
- if (oflags & PVF_WRITE) {
- pg->md.krw_mappings--;
- pg->md.kro_mappings++;
- }
- } else
- if (oflags & PVF_WRITE) {
- pg->md.urw_mappings--;
- pg->md.uro_mappings++;
- }
- }
- }
-
- if (maskbits & PVF_REF && !pmap_track_modified(pv->pv_va)) {
- if ((pv->pv_flags & PVF_NC) == 0 &&
- (maskbits & (PVF_WRITE|PVF_MOD)) == 0) {
- /*
- * Check npte here; we may have already
- * done the wbinv above, and the validity
- * of the PTE is the same for opte and
- * npte.
- */
- if (npte & L2_S_PROT_W) {
- if (PV_BEEN_EXECD(oflags))
- pmap_idcache_wbinv_range(pm,
- pv->pv_va, PAGE_SIZE);
- else
- if (PV_BEEN_REFD(oflags))
- pmap_dcache_wb_range(pm,
- pv->pv_va, PAGE_SIZE,
- TRUE, FALSE);
- } else
- if ((npte & L2_TYPE_MASK) != L2_TYPE_INV) {
- /* XXXJRT need idcache_inv_range */
- if (PV_BEEN_EXECD(oflags))
- pmap_idcache_wbinv_range(pm,
- pv->pv_va, PAGE_SIZE);
- else
- if (PV_BEEN_REFD(oflags))
- pmap_dcache_wb_range(pm,
- pv->pv_va, PAGE_SIZE,
- TRUE, TRUE);
- }
- }
-
- /*
- * Make the PTE invalid so that we will take a
- * page fault the next time the mapping is
- * referenced.
- */
- npte &= ~L2_TYPE_MASK;
- npte |= L2_TYPE_INV;
- }
-
- if (npte != opte) {
- count++;
- *ptep = npte;
- PTE_SYNC(ptep);
- /* Flush the TLB entry if a current pmap. */
- if (PV_BEEN_EXECD(oflags))
- pmap_tlb_flushID_SE(pm, pv->pv_va);
- else
- if (PV_BEEN_REFD(oflags))
- pmap_tlb_flushD_SE(pm, pv->pv_va);
- }
-
-#if 0
- pmap_release_pmap_lock(pm);
-#endif
-
- }
-
-#if 0
- simple_unlock(&pg->mdpage.pvh_slock);
- PMAP_HEAD_TO_MAP_UNLOCK();
-#endif
- if (maskbits & PVF_WRITE)
- vm_page_flag_clear(pg, PG_WRITEABLE);
- return (count);
-}
-
-/*
- * main pv_entry manipulation functions:
- * pmap_enter_pv: enter a mapping onto a vm_page list
- * pmap_remove_pv: remove a mappiing from a vm_page list
- *
- * NOTE: pmap_enter_pv expects to lock the pvh itself
- * pmap_remove_pv expects te caller to lock the pvh before calling
- */
-
-/*
- * pmap_enter_pv: enter a mapping onto a vm_page lst
- *
- * => caller should hold the proper lock on pmap_main_lock
- * => caller should have pmap locked
- * => we will gain the lock on the vm_page and allocate the new pv_entry
- * => caller should adjust ptp's wire_count before calling
- * => caller should not adjust pmap's wire_count
- */
-static void
-pmap_enter_pv(struct vm_page *pg, struct pv_entry *pve, pmap_t pm,
- vm_offset_t va, u_int flags)
-{
-
-
- pve->pv_pmap = pm;
- pve->pv_va = va;
- pve->pv_flags = flags;
-
-#if 0
- mtx_lock(&pg->md.pvh_mtx);
-#endif
- TAILQ_INSERT_HEAD(&pg->md.pv_list, pve, pv_list);
- TAILQ_INSERT_HEAD(&pm->pm_pvlist, pve, pv_plist);
- pg->md.pvh_attrs |= flags & (PVF_REF | PVF_MOD);
- if (pm == pmap_kernel()) {
- if (flags & PVF_WRITE)
- pg->md.krw_mappings++;
- else
- pg->md.kro_mappings++;
- }
- if (flags & PVF_WRITE)
- pg->md.urw_mappings++;
- else
- pg->md.uro_mappings++;
- pg->md.pv_list_count++;
-#if 0
- mtx_unlock(&pg->md.pvh_mtx);
-#endif
- if (pve->pv_flags & PVF_WIRED)
- ++pm->pm_stats.wired_count;
- vm_page_flag_set(pg, PG_REFERENCED);
-}
-
-/*
- *
- * pmap_find_pv: Find a pv entry
- *
- * => caller should hold lock on vm_page
- */
-static PMAP_INLINE struct pv_entry *
-pmap_find_pv(struct vm_page *pg, pmap_t pm, vm_offset_t va)
-{
- struct pv_entry *pv;
-
- TAILQ_FOREACH(pv, &pg->md.pv_list, pv_list)
- if (pm == pv->pv_pmap && va == pv->pv_va)
- break;
- return (pv);
-}
-
-/*
- * vector_page_setprot:
- *
- * Manipulate the protection of the vector page.
- */
-void
-vector_page_setprot(int prot)
-{
- struct l2_bucket *l2b;
- pt_entry_t *ptep;
-
- l2b = pmap_get_l2_bucket(pmap_kernel(), vector_page);
-
- ptep = &l2b->l2b_kva[l2pte_index(vector_page)];
-
- *ptep = (*ptep & ~L1_S_PROT_MASK) | L2_S_PROT(PTE_KERNEL, prot);
- PTE_SYNC(ptep);
- cpu_tlb_flushD_SE(vector_page);
- cpu_cpwait();
-}
-
-/*
- * pmap_remove_pv: try to remove a mapping from a pv_list
- *
- * => caller should hold proper lock on pmap_main_lock
- * => pmap should be locked
- * => caller should hold lock on vm_page [so that attrs can be adjusted]
- * => caller should adjust ptp's wire_count and free PTP if needed
- * => caller should NOT adjust pmap's wire_count
- * => we return the removed pve
- */
-
-static void
-pmap_nuke_pv(struct vm_page *pg, pmap_t pm, struct pv_entry *pve)
-{
-
- TAILQ_REMOVE(&pg->md.pv_list, pve, pv_list);
- TAILQ_REMOVE(&pm->pm_pvlist, pve, pv_plist);
- if (pve->pv_flags & PVF_WIRED)
- --pm->pm_stats.wired_count;
- pg->md.pv_list_count--;
- if (pg->md.pvh_attrs & PVF_MOD)
- vm_page_dirty(pg);
- if (pm == pmap_kernel()) {
- if (pve->pv_flags & PVF_WRITE)
- pg->md.krw_mappings--;
- else
- pg->md.kro_mappings--;
- } else
- if (pve->pv_flags & PVF_WRITE)
- pg->md.urw_mappings--;
- else
- pg->md.uro_mappings--;
- if (TAILQ_FIRST(&pg->md.pv_list) == NULL ||
- (pg->md.krw_mappings == 0 && pg->md.urw_mappings == 0)) {
- pg->md.pvh_attrs &= ~PVF_MOD;
- if (TAILQ_FIRST(&pg->md.pv_list) == NULL)
- pg->md.pvh_attrs &= ~PVF_REF;
- vm_page_flag_clear(pg, PG_WRITEABLE);
- }
- if (TAILQ_FIRST(&pg->md.pv_list))
- vm_page_flag_set(pg, PG_REFERENCED);
- if (pve->pv_flags & PVF_WRITE)
- pmap_vac_me_harder(pg, pm, 0);
-}
-
-static struct pv_entry *
-pmap_remove_pv(struct vm_page *pg, pmap_t pm, vm_offset_t va)
-{
- struct pv_entry *pve;
-
- pve = TAILQ_FIRST(&pg->md.pv_list);
-
- while (pve) {
- if (pve->pv_pmap == pm && pve->pv_va == va) { /* match? */
- pmap_nuke_pv(pg, pm, pve);
- break;
- }
- pve = TAILQ_NEXT(pve, pv_list);
- }
-
- return(pve); /* return removed pve */
-}
-/*
- *
- * pmap_modify_pv: Update pv flags
- *
- * => caller should hold lock on vm_page [so that attrs can be adjusted]
- * => caller should NOT adjust pmap's wire_count
- * => caller must call pmap_vac_me_harder() if writable status of a page
- * may have changed.
- * => we return the old flags
- *
- * Modify a physical-virtual mapping in the pv table
- */
-static u_int
-pmap_modify_pv(struct vm_page *pg, pmap_t pm, vm_offset_t va,
- u_int clr_mask, u_int set_mask)
-{
- struct pv_entry *npv;
- u_int flags, oflags;
-
- if ((npv = pmap_find_pv(pg, pm, va)) == NULL)
- return (0);
-
- /*
- * There is at least one VA mapping this page.
- */
-
- if (clr_mask & (PVF_REF | PVF_MOD))
- pg->md.pvh_attrs |= set_mask & (PVF_REF | PVF_MOD);
-
- oflags = npv->pv_flags;
- npv->pv_flags = flags = (oflags & ~clr_mask) | set_mask;
-
- if ((flags ^ oflags) & PVF_WIRED) {
- if (flags & PVF_WIRED)
- ++pm->pm_stats.wired_count;
- else
- --pm->pm_stats.wired_count;
- }
-
- if ((flags ^ oflags) & PVF_WRITE) {
- if (pm == pmap_kernel()) {
- if (flags & PVF_WRITE) {
- pg->md.krw_mappings++;
- pg->md.kro_mappings--;
- } else {
- pg->md.kro_mappings++;
- pg->md.krw_mappings--;
- }
- } else
- if (flags & PVF_WRITE) {
- pg->md.urw_mappings++;
- pg->md.uro_mappings--;
- } else {
- pg->md.uro_mappings++;
- pg->md.urw_mappings--;
- }
- if (pg->md.krw_mappings == 0 && pg->md.urw_mappings == 0) {
- pg->md.pvh_attrs &= ~PVF_MOD;
- vm_page_flag_clear(pg, PG_WRITEABLE);
- }
- pmap_vac_me_harder(pg, pm, 0);
- }
-
- return (oflags);
-}
-
-/* Function to set the debug level of the pmap code */
-#ifdef PMAP_DEBUG
-void
-pmap_debug(int level)
-{
- pmap_debug_level = level;
- dprintf("pmap_debug: level=%d\n", pmap_debug_level);
-}
-#endif /* PMAP_DEBUG */
-
-void
-pmap_pinit0(struct pmap *pmap)
-{
- PDEBUG(1, printf("pmap_pinit0: pmap = %08x\n", (u_int32_t) pmap));
-
- dprintf("pmap_pinit0: pmap = %08x, pm_pdir = %08x\n",
- (u_int32_t) pmap, (u_int32_t) pmap->pm_pdir);
- bcopy(kernel_pmap, pmap, sizeof(*pmap));
-}
-
-/*
- * Initialize a vm_page's machine-dependent fields.
- */
-void
-pmap_page_init(vm_page_t m)
-{
-
- TAILQ_INIT(&m->md.pv_list);
- m->md.pv_list_count = 0;
-}
-
-/*
- * Initialize the pmap module.
- * Called by vm_init, to initialize any structures that the pmap
- * system needs to map virtual memory.
- */
-void
-pmap_init(void)
-{
-
- PDEBUG(1, printf("pmap_init: phys_start = %08x\n"));
-
- /*
- * init the pv free list
- */
- pvzone = uma_zcreate("PV ENTRY", sizeof (struct pv_entry), NULL, NULL,
- NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
- uma_prealloc(pvzone, MINPV);
- /*
- * Now it is safe to enable pv_table recording.
- */
- PDEBUG(1, printf("pmap_init: done!\n"));
-
-}
-
-int
-pmap_fault_fixup(pmap_t pm, vm_offset_t va, vm_prot_t ftype, int user)
-{
- struct l2_dtable *l2;
- struct l2_bucket *l2b;
- pd_entry_t *pl1pd, l1pd;
- pt_entry_t *ptep, pte;
- vm_paddr_t pa;
- u_int l1idx;
- int rv = 0;
-
-#if 0
- PMAP_MAP_TO_HEAD_LOCK();
- pmap_acquire_pmap_lock(pm);
-#endif
- l1idx = L1_IDX(va);
-
- /*
- * If there is no l2_dtable for this address, then the process
- * has no business accessing it.
- *
- * Note: This will catch userland processes trying to access
- * kernel addresses.
- */
- l2 = pm->pm_l2[L2_IDX(l1idx)];
- if (l2 == NULL)
- goto out;
-
- /*
- * Likewise if there is no L2 descriptor table
- */
- l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
- if (l2b->l2b_kva == NULL)
- goto out;
-
- /*
- * Check the PTE itself.
- */
- ptep = &l2b->l2b_kva[l2pte_index(va)];
- pte = *ptep;
- if (pte == 0)
- goto out;
-
- /*
- * Catch a userland access to the vector page mapped at 0x0
- */
- if (user && (pte & L2_S_PROT_U) == 0)
- goto out;
-
- pa = l2pte_pa(pte);
-
- if ((ftype & VM_PROT_WRITE) && (pte & L2_S_PROT_W) == 0) {
- /*
- * This looks like a good candidate for "page modified"
- * emulation...
- */
- struct pv_entry *pv;
- struct vm_page *pg;
-
- /* Extract the physical address of the page */
- if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) {
- goto out;
- }
- /* Get the current flags for this page. */
-
- pv = pmap_find_pv(pg, pm, va);
- if (pv == NULL) {
- goto out;
- }
-
- /*
- * Do the flags say this page is writable? If not then it
- * is a genuine write fault. If yes then the write fault is
- * our fault as we did not reflect the write access in the
- * PTE. Now we know a write has occurred we can correct this
- * and also set the modified bit
- */
- if ((pv->pv_flags & PVF_WRITE) == 0) {
- goto out;
- }
-
- if (pmap_track_modified(pv->pv_va)) {
- pg->md.pvh_attrs |= PVF_REF | PVF_MOD;
- vm_page_dirty(pg);
- }
- pv->pv_flags |= PVF_REF | PVF_MOD;
-
- /*
- * Re-enable write permissions for the page. No need to call
- * pmap_vac_me_harder(), since this is just a
- * modified-emulation fault, and the PVF_WRITE bit isn't
- * changing. We've already set the cacheable bits based on
- * the assumption that we can write to this page.
- */
- *ptep = (pte & ~L2_TYPE_MASK) | L2_S_PROTO | L2_S_PROT_W;
- PTE_SYNC(ptep);
- rv = 1;
- } else
- if ((pte & L2_TYPE_MASK) == L2_TYPE_INV) {
- /*
- * This looks like a good candidate for "page referenced"
- * emulation.
- */
- struct pv_entry *pv;
- struct vm_page *pg;
-
- /* Extract the physical address of the page */
- vm_page_lock_queues();
- if ((pg = PHYS_TO_VM_PAGE(pa)) == NULL) {
- vm_page_unlock_queues();
- goto out;
- }
- /* Get the current flags for this page. */
-
- pv = pmap_find_pv(pg, pm, va);
- if (pv == NULL) {
- vm_page_unlock_queues();
- goto out;
- }
-
- pg->md.pvh_attrs |= PVF_REF;
- pv->pv_flags |= PVF_REF;
-
-
- *ptep = (pte & ~L2_TYPE_MASK) | L2_S_PROTO;
- PTE_SYNC(ptep);
- rv = 1;
- vm_page_unlock_queues();
- }
-
- /*
- * We know there is a valid mapping here, so simply
- * fix up the L1 if necessary.
- */
- pl1pd = &pm->pm_l1->l1_kva[l1idx];
- l1pd = l2b->l2b_phys | L1_C_DOM(pm->pm_domain) | L1_C_PROTO;
- if (*pl1pd != l1pd) {
- *pl1pd = l1pd;
- PTE_SYNC(pl1pd);
- rv = 1;
- }
-
-#ifdef CPU_SA110
- /*
- * There are bugs in the rev K SA110. This is a check for one
- * of them.
- */
- if (rv == 0 && curcpu()->ci_arm_cputype == CPU_ID_SA110 &&
- curcpu()->ci_arm_cpurev < 3) {
- /* Always current pmap */
- if (l2pte_valid(pte)) {
- extern int kernel_debug;
- if (kernel_debug & 1) {
- struct proc *p = curlwp->l_proc;
- printf("prefetch_abort: page is already "
- "mapped - pte=%p *pte=%08x\n", ptep, pte);
- printf("prefetch_abort: pc=%08lx proc=%p "
- "process=%s\n", va, p, p->p_comm);
- printf("prefetch_abort: far=%08x fs=%x\n",
- cpu_faultaddress(), cpu_faultstatus());
- }
-#ifdef DDB
- if (kernel_debug & 2)
- Debugger();
-#endif
- rv = 1;
- }
- }
-#endif /* CPU_SA110 */
-
-#ifdef DEBUG
- /*
- * If 'rv == 0' at this point, it generally indicates that there is a
- * stale TLB entry for the faulting address. This happens when two or
- * more processes are sharing an L1. Since we don't flush the TLB on
- * a context switch between such processes, we can take domain faults
- * for mappings which exist at the same VA in both processes. EVEN IF
- * WE'VE RECENTLY FIXED UP THE CORRESPONDING L1 in pmap_enter(), for
- * example.
- *
- * This is extremely likely to happen if pmap_enter() updated the L1
- * entry for a recently entered mapping. In this case, the TLB is
- * flushed for the new mapping, but there may still be TLB entries for
- * other mappings belonging to other processes in the 1MB range
- * covered by the L1 entry.
- *
- * Since 'rv == 0', we know that the L1 already contains the correct
- * value, so the fault must be due to a stale TLB entry.
- *
- * Since we always need to flush the TLB anyway in the case where we
- * fixed up the L1, or frobbed the L2 PTE, we effectively deal with
- * stale TLB entries dynamically.
- *
- * However, the above condition can ONLY happen if the current L1 is
- * being shared. If it happens when the L1 is unshared, it indicates
- * that other parts of the pmap are not doing their job WRT managing
- * the TLB.
- */
- if (rv == 0 && pm->pm_l1->l1_domain_use_count == 1) {
- extern int last_fault_code;
- printf("fixup: pm %p, va 0x%lx, ftype %d - nothing to do!\n",
- pm, va, ftype);
- printf("fixup: l2 %p, l2b %p, ptep %p, pl1pd %p\n",
- l2, l2b, ptep, pl1pd);
- printf("fixup: pte 0x%x, l1pd 0x%x, last code 0x%x\n",
- pte, l1pd, last_fault_code);
-#ifdef DDB
- Debugger();
-#endif
- }
-#endif
-
- cpu_tlb_flushID_SE(va);
- cpu_cpwait();
-
- rv = 1;
-
-out:
-#if 0
- pmap_release_pmap_lock(pm);
- PMAP_MAP_TO_HEAD_UNLOCK();
-#endif
- return (rv);
-}
-
-/*
- * Initialize the address space (zone) for the pv_entries. Set a
- * high water mark so that the system can recover from excessive
- * numbers of pv entries.
- */
-void
-pmap_init2()
-{
- int shpgperproc = PMAP_SHPGPERPROC;
- struct l2_bucket *l2b;
- struct l1_ttable *l1;
- pd_entry_t *pl1pt;
- pt_entry_t *ptep, pte;
- vm_offset_t va, eva;
- u_int loop, needed;
-
- TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
-
- pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
- pv_entry_high_water = 9 * (pv_entry_max / 10);
- l2zone = uma_zcreate("L2 Table", L2_TABLE_SIZE_REAL, pmap_l2ptp_ctor,
- NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
- uma_prealloc(l2zone, 4096);
- l2table_zone = uma_zcreate("L2 Table", sizeof(struct l2_dtable),
- NULL, NULL, NULL, NULL, UMA_ALIGN_PTR,
- UMA_ZONE_VM | UMA_ZONE_NOFREE);
- uma_prealloc(l2table_zone, 1024);
-
- uma_zone_set_obj(pvzone, &pvzone_obj, pv_entry_max);
- uma_zone_set_obj(l2zone, &l2zone_obj, pv_entry_max);
-
- needed = (maxproc / PMAP_DOMAINS) + ((maxproc % PMAP_DOMAINS) ? 1 : 0);
- needed -= 1;
- l1 = malloc(sizeof(*l1) * needed, M_VMPMAP, M_WAITOK);
-
- for (loop = 0; loop < needed; loop++, l1++) {
- /* Allocate a L1 page table */
- va = (vm_offset_t)contigmalloc(L1_TABLE_SIZE, M_VMPMAP, 0, 0x0,
- 0xffffffff, L1_TABLE_SIZE, 0);
-
- if (va == 0)
- panic("Cannot allocate L1 KVM");
-
- eva = va + L1_TABLE_SIZE;
- pl1pt = (pd_entry_t *)va;
-
- while (va < eva) {
- l2b = pmap_get_l2_bucket(pmap_kernel(), va);
- ptep = &l2b->l2b_kva[l2pte_index(va)];
- pte = *ptep;
- pte = (pte & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode_pt;
- *ptep = pte;
- PTE_SYNC(ptep);
- cpu_tlb_flushD_SE(va);
-
- va += PAGE_SIZE;
- }
- pmap_init_l1(l1, pl1pt);
- }
-
-
-#ifdef DEBUG
- printf("pmap_postinit: Allocated %d static L1 descriptor tables\n",
- needed);
-#endif
-}
-
-/*
- * This is used to stuff certain critical values into the PCB where they
- * can be accessed quickly from cpu_switch() et al.
- */
-void
-pmap_set_pcb_pagedir(pmap_t pm, struct pcb *pcb)
-{
- struct l2_bucket *l2b;
-
- pcb->pcb_pagedir = pm->pm_l1->l1_physaddr;
- pcb->pcb_dacr = (DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
- (DOMAIN_CLIENT << (pm->pm_domain * 2));
-
- if (vector_page < KERNBASE) {
- pcb->pcb_pl1vec = &pm->pm_l1->l1_kva[L1_IDX(vector_page)];
- l2b = pmap_get_l2_bucket(pm, vector_page);
- pcb->pcb_l1vec = l2b->l2b_phys | L1_C_PROTO |
- L1_C_DOM(pm->pm_domain) | L1_C_DOM(PMAP_DOMAIN_KERNEL);
- } else
- pcb->pcb_pl1vec = NULL;
-}
-
-void
-pmap_activate(struct thread *td)
-{
- pmap_t pm;
- struct pcb *pcb;
- int s;
-
- pm = vmspace_pmap(td->td_proc->p_vmspace);
- pcb = td->td_pcb;
-
- critical_enter();
- pmap_set_pcb_pagedir(pm, pcb);
-
- if (td == curthread) {
- u_int cur_dacr, cur_ttb;
-
- __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
- __asm __volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
-
- cur_ttb &= ~(L1_TABLE_SIZE - 1);
-
- if (cur_ttb == (u_int)pcb->pcb_pagedir &&
- cur_dacr == pcb->pcb_dacr) {
- /*
- * No need to switch address spaces.
- */
- critical_exit();
- return;
- }
-
-
- /*
- * We MUST, I repeat, MUST fix up the L1 entry corresponding
- * to 'vector_page' in the incoming L1 table before switching
- * to it otherwise subsequent interrupts/exceptions (including
- * domain faults!) will jump into hyperspace.
- */
- if (pcb->pcb_pl1vec) {
-
- *pcb->pcb_pl1vec = pcb->pcb_l1vec;
- /*
- * Don't need to PTE_SYNC() at this point since
- * cpu_setttb() is about to flush both the cache
- * and the TLB.
- */
- }
-
- cpu_domains(pcb->pcb_dacr);
- cpu_setttb(pcb->pcb_pagedir);
-
- splx(s);
- }
- critical_exit();
-}
-
-static int
-pmap_set_pt_cache_mode(pd_entry_t *kl1, vm_offset_t va)
-{
- pd_entry_t *pdep, pde;
- pt_entry_t *ptep, pte;
- vm_offset_t pa;
- int rv = 0;
-
- /*
- * Make sure the descriptor itself has the correct cache mode
- */
- pdep = &kl1[L1_IDX(va)];
- pde = *pdep;
-
- if (l1pte_section_p(pde)) {
- if ((pde & L1_S_CACHE_MASK) != pte_l1_s_cache_mode_pt) {
- *pdep = (pde & ~L1_S_CACHE_MASK) |
- pte_l1_s_cache_mode_pt;
- PTE_SYNC(pdep);
- cpu_dcache_wbinv_range((vm_offset_t)pdep,
- sizeof(*pdep));
- rv = 1;
- }
- } else {
- pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK);
- ptep = (pt_entry_t *)kernel_pt_lookup(pa);
- if (ptep == NULL)
- panic("pmap_bootstrap: No L2 for L2 @ va %p\n", ptep);
-
- ptep = &ptep[l2pte_index(va)];
- pte = *ptep;
- if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) {
- *ptep = (pte & ~L2_S_CACHE_MASK) |
- pte_l2_s_cache_mode_pt;
- PTE_SYNC(ptep);
- cpu_dcache_wbinv_range((vm_offset_t)ptep,
- sizeof(*ptep));
- rv = 1;
- }
- }
-
- return (rv);
-}
-
-static void
-pmap_alloc_specials(vm_offset_t *availp, int pages, vm_offset_t *vap,
- pt_entry_t **ptep)
-{
- vm_offset_t va = *availp;
- struct l2_bucket *l2b;
-
- if (ptep) {
- l2b = pmap_get_l2_bucket(pmap_kernel(), va);
- if (l2b == NULL)
- panic("pmap_alloc_specials: no l2b for 0x%x", va);
-
- *ptep = &l2b->l2b_kva[l2pte_index(va)];
- }
-
- *vap = va;
- *availp = va + (PAGE_SIZE * pages);
-}
-
-/*
- * Bootstrap the system enough to run with virtual memory.
- *
- * On the arm this is called after mapping has already been enabled
- * and just syncs the pmap module with what has already been done.
- * [We can't call it easily with mapping off since the kernel is not
- * mapped with PA == VA, hence we would have to relocate every address
- * from the linked base (virtual) address "KERNBASE" to the actual
- * (physical) address starting relative to 0]
- */
-#define PMAP_STATIC_L2_SIZE 16
-#ifdef ARM_USE_SMALL_ALLOC
-extern struct mtx smallalloc_mtx;
-extern vm_offset_t alloc_curaddr;
-extern vm_offset_t alloc_firstaddr;
-#endif
-
-void
-pmap_bootstrap(vm_offset_t firstaddr, vm_offset_t lastaddr, struct pv_addr *l1pt)
-{
- static struct l1_ttable static_l1;
- static struct l2_dtable static_l2[PMAP_STATIC_L2_SIZE];
- struct l1_ttable *l1 = &static_l1;
- struct l2_dtable *l2;
- struct l2_bucket *l2b;
- pd_entry_t pde;
- pd_entry_t *kernel_l1pt = (pd_entry_t *)l1pt->pv_va;
- pt_entry_t *ptep;
- vm_paddr_t pa;
- vm_offset_t va;
- vm_size_t size;
- int l1idx, l2idx, l2next = 0;
-
- PDEBUG(1, printf("firstaddr = %08x, loadaddr = %08x\n",
- firstaddr, loadaddr));
-
- virtual_avail = firstaddr;
- kernel_pmap = &kernel_pmap_store;
- kernel_pmap->pm_l1 = l1;
-
- /*
- * Scan the L1 translation table created by initarm() and create
- * the required metadata for all valid mappings found in it.
- */
- for (l1idx = 0; l1idx < (L1_TABLE_SIZE / sizeof(pd_entry_t)); l1idx++) {
- pde = kernel_l1pt[l1idx];
-
- /*
- * We're only interested in Coarse mappings.
- * pmap_extract() can deal with section mappings without
- * recourse to checking L2 metadata.
- */
- if ((pde & L1_TYPE_MASK) != L1_TYPE_C)
- continue;
-
- /*
- * Lookup the KVA of this L2 descriptor table
- */
- pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK);
- ptep = (pt_entry_t *)kernel_pt_lookup(pa);
-
- if (ptep == NULL) {
- panic("pmap_bootstrap: No L2 for va 0x%x, pa 0x%lx",
- (u_int)l1idx << L1_S_SHIFT, (long unsigned int)pa);
- }
-
- /*
- * Fetch the associated L2 metadata structure.
- * Allocate a new one if necessary.
- */
- if ((l2 = kernel_pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
- if (l2next == PMAP_STATIC_L2_SIZE)
- panic("pmap_bootstrap: out of static L2s");
- kernel_pmap->pm_l2[L2_IDX(l1idx)] = l2 =
- &static_l2[l2next++];
- }
-
- /*
- * One more L1 slot tracked...
- */
- l2->l2_occupancy++;
-
- /*
- * Fill in the details of the L2 descriptor in the
- * appropriate bucket.
- */
- l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
- l2b->l2b_kva = ptep;
- l2b->l2b_phys = pa;
- l2b->l2b_l1idx = l1idx;
-
- /*
- * Establish an initial occupancy count for this descriptor
- */
- for (l2idx = 0;
- l2idx < (L2_TABLE_SIZE_REAL / sizeof(pt_entry_t));
- l2idx++) {
- if ((ptep[l2idx] & L2_TYPE_MASK) != L2_TYPE_INV) {
- l2b->l2b_occupancy++;
- }
- }
-
- /*
- * Make sure the descriptor itself has the correct cache mode.
- * If not, fix it, but whine about the problem. Port-meisters
- * should consider this a clue to fix up their initarm()
- * function. :)
- */
- if (pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)ptep)) {
- printf("pmap_bootstrap: WARNING! wrong cache mode for "
- "L2 pte @ %p\n", ptep);
- }
- }
-
-
- /*
- * Ensure the primary (kernel) L1 has the correct cache mode for
- * a page table. Bitch if it is not correctly set.
- */
- for (va = (vm_offset_t)kernel_l1pt;
- va < ((vm_offset_t)kernel_l1pt + L1_TABLE_SIZE); va += PAGE_SIZE) {
- if (pmap_set_pt_cache_mode(kernel_l1pt, va))
- printf("pmap_bootstrap: WARNING! wrong cache mode for "
- "primary L1 @ 0x%x\n", va);
- }
-
- cpu_dcache_wbinv_all();
- cpu_tlb_flushID();
- cpu_cpwait();
-
- kernel_pmap->pm_active = -1;
- kernel_pmap->pm_domain = PMAP_DOMAIN_KERNEL;
- LIST_INIT(&allpmaps);
- TAILQ_INIT(&kernel_pmap->pm_pvlist);
- LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
-
- /*
- * Reserve some special page table entries/VA space for temporary
- * mapping of pages.
- */
-#define SYSMAP(c, p, v, n) \
- v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
-
- pmap_alloc_specials(&virtual_avail, 1, &csrcp, &csrc_pte);
- pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)csrc_pte);
- pmap_alloc_specials(&virtual_avail, 1, &cdstp, &cdst_pte);
- pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)cdst_pte);
- size = ((lastaddr - pmap_curmaxkvaddr) + L1_S_OFFSET) / L1_S_SIZE;
- pmap_alloc_specials(&virtual_avail,
- round_page(size * L2_TABLE_SIZE_REAL) / PAGE_SIZE,
- &pmap_kernel_l2ptp_kva, NULL);
-
- size = (size + (L2_BUCKET_SIZE - 1)) / L2_BUCKET_SIZE;
- pmap_alloc_specials(&virtual_avail,
- round_page(size * sizeof(struct l2_dtable)) / PAGE_SIZE,
- &pmap_kernel_l2dtable_kva, NULL);
-
- pmap_alloc_specials(&virtual_avail,
- 1, (vm_offset_t*)&_tmppt, NULL);
- SLIST_INIT(&l1_list);
- TAILQ_INIT(&l1_lru_list);
- mtx_init(&l1_lru_lock, "l1 list lock", NULL, MTX_DEF);
- pmap_init_l1(l1, kernel_l1pt);
- cpu_dcache_wbinv_all();
-
- virtual_avail = round_page(virtual_avail);
- virtual_end = lastaddr;
- kernel_vm_end = pmap_curmaxkvaddr;
-#ifdef ARM_USE_SMALL_ALLOC
- mtx_init(&smallalloc_mtx, "Small alloc page list", NULL, MTX_DEF);
- alloc_firstaddr = alloc_curaddr = lastaddr;
-#endif
-}
-
-/***************************************************
- * Pmap allocation/deallocation routines.
- ***************************************************/
-
-/*
- * Release any resources held by the given physical map.
- * Called when a pmap initialized by pmap_pinit is being released.
- * Should only be called if the map contains no valid mappings.
- */
-void
-pmap_release(pmap_t pmap)
-{
- struct pcb *pcb;
-
- pmap_idcache_wbinv_all(pmap);
- pmap_tlb_flushID(pmap);
- cpu_cpwait();
- LIST_REMOVE(pmap, pm_list);
- if (vector_page < KERNBASE) {
- struct pcb *curpcb = PCPU_GET(curpcb);
- pcb = thread0.td_pcb;
- if (pmap_is_current(pmap)) {
- /*
- * Frob the L1 entry corresponding to the vector
- * page so that it contains the kernel pmap's domain
- * number. This will ensure pmap_remove() does not
- * pull the current vector page out from under us.
- */
- critical_enter();
- *pcb->pcb_pl1vec = pcb->pcb_l1vec;
- cpu_domains(pcb->pcb_dacr);
- cpu_setttb(pcb->pcb_pagedir);
- critical_exit();
- }
- pmap_remove(pmap, vector_page, vector_page + PAGE_SIZE);
- /*
- * Make sure cpu_switch(), et al, DTRT. This is safe to do
- * since this process has no remaining mappings of its own.
- */
- curpcb->pcb_pl1vec = pcb->pcb_pl1vec;
- curpcb->pcb_l1vec = pcb->pcb_l1vec;
- curpcb->pcb_dacr = pcb->pcb_dacr;
- curpcb->pcb_pagedir = pcb->pcb_pagedir;
-
- }
- pmap_free_l1(pmap);
-
- dprintf("pmap_release()\n");
-}
-
-
-
-/*
- * Helper function for pmap_grow_l2_bucket()
- */
-static __inline int
-pmap_grow_map(vm_offset_t va, pt_entry_t cache_mode, vm_paddr_t *pap)
-{
- struct l2_bucket *l2b;
- pt_entry_t *ptep;
- vm_paddr_t pa;
- struct vm_page *pg;
-
- pg = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO |
- VM_ALLOC_WIRED);
- if (pg == NULL)
- return (1);
- pa = VM_PAGE_TO_PHYS(pg);
-
- if (pap)
- *pap = pa;
-
- l2b = pmap_get_l2_bucket(pmap_kernel(), va);
-
- ptep = &l2b->l2b_kva[l2pte_index(va)];
- *ptep = L2_S_PROTO | pa | cache_mode |
- L2_S_PROT(PTE_KERNEL, VM_PROT_READ | VM_PROT_WRITE);
- PTE_SYNC(ptep);
- return (0);
-}
-
-/*
- * This is the same as pmap_alloc_l2_bucket(), except that it is only
- * used by pmap_growkernel().
- */
-static __inline struct l2_bucket *
-pmap_grow_l2_bucket(pmap_t pm, vm_offset_t va)
-{
- struct l2_dtable *l2;
- struct l2_bucket *l2b;
- struct l1_ttable *l1;
- pd_entry_t *pl1pd;
- u_short l1idx;
- vm_offset_t nva;
-
- l1idx = L1_IDX(va);
-
- if ((l2 = pm->pm_l2[L2_IDX(l1idx)]) == NULL) {
- /*
- * No mapping at this address, as there is
- * no entry in the L1 table.
- * Need to allocate a new l2_dtable.
- */
- nva = pmap_kernel_l2dtable_kva;
- if ((nva & PAGE_MASK) == 0) {
- /*
- * Need to allocate a backing page
- */
- if (pmap_grow_map(nva, pte_l2_s_cache_mode, NULL))
- return (NULL);
- }
-
- l2 = (struct l2_dtable *)nva;
- nva += sizeof(struct l2_dtable);
-
- if ((nva & PAGE_MASK) < (pmap_kernel_l2dtable_kva &
- PAGE_MASK)) {
- /*
- * The new l2_dtable straddles a page boundary.
- * Map in another page to cover it.
- */
- if (pmap_grow_map(nva, pte_l2_s_cache_mode, NULL))
- return (NULL);
- }
-
- pmap_kernel_l2dtable_kva = nva;
-
- /*
- * Link it into the parent pmap
- */
- pm->pm_l2[L2_IDX(l1idx)] = l2;
- }
-
- l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
-
- /*
- * Fetch pointer to the L2 page table associated with the address.
- */
- if (l2b->l2b_kva == NULL) {
- pt_entry_t *ptep;
-
- /*
- * No L2 page table has been allocated. Chances are, this
- * is because we just allocated the l2_dtable, above.
- */
- nva = pmap_kernel_l2ptp_kva;
- ptep = (pt_entry_t *)nva;
- if ((nva & PAGE_MASK) == 0) {
- /*
- * Need to allocate a backing page
- */
- if (pmap_grow_map(nva, pte_l2_s_cache_mode_pt,
- &pmap_kernel_l2ptp_phys))
- return (NULL);
- PTE_SYNC_RANGE(ptep, PAGE_SIZE / sizeof(pt_entry_t));
- }
-
- l2->l2_occupancy++;
- l2b->l2b_kva = ptep;
- l2b->l2b_l1idx = l1idx;
- l2b->l2b_phys = pmap_kernel_l2ptp_phys;
-
- pmap_kernel_l2ptp_kva += L2_TABLE_SIZE_REAL;
- pmap_kernel_l2ptp_phys += L2_TABLE_SIZE_REAL;
- }
-
- /* Distribute new L1 entry to all other L1s */
- SLIST_FOREACH(l1, &l1_list, l1_link) {
- pl1pd = &l1->l1_kva[L1_IDX(va)];
- *pl1pd = l2b->l2b_phys | L1_C_DOM(PMAP_DOMAIN_KERNEL) |
- L1_C_PROTO;
- PTE_SYNC(pl1pd);
- }
-
- return (l2b);
-}
-
-
-/*
- * grow the number of kernel page table entries, if needed
- */
-void
-pmap_growkernel(vm_offset_t addr)
-{
- pmap_t kpm = pmap_kernel();
- int s;
-
- if (addr <= pmap_curmaxkvaddr)
- return; /* we are OK */
-
- /*
- * whoops! we need to add kernel PTPs
- */
-
- s = splhigh(); /* to be safe */
-
- /* Map 1MB at a time */
- for (; pmap_curmaxkvaddr < addr; pmap_curmaxkvaddr += L1_S_SIZE)
- pmap_grow_l2_bucket(kpm, pmap_curmaxkvaddr);
-
- /*
- * flush out the cache, expensive but growkernel will happen so
- * rarely
- */
- cpu_dcache_wbinv_all();
- cpu_tlb_flushD();
- cpu_cpwait();
- kernel_vm_end = pmap_curmaxkvaddr;
-
-}
-
-
-/*
- * pmap_page_protect:
- *
- * Lower the permission for all mappings to a given page.
- */
-void
-pmap_page_protect(vm_page_t m, vm_prot_t prot)
-{
- switch(prot) {
- case VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE:
- case VM_PROT_READ|VM_PROT_WRITE:
- return;
-
- case VM_PROT_READ:
- case VM_PROT_READ|VM_PROT_EXECUTE:
- pmap_clearbit(m, PVF_WRITE);
- break;
-
- default:
- pmap_remove_all(m);
- break;
- }
-
-}
-
-
-/*
- * Remove all pages from specified address space
- * this aids process exit speeds. Also, this code
- * is special cased for current process only, but
- * can have the more generic (and slightly slower)
- * mode enabled. This is much faster than pmap_remove
- * in the case of running down an entire address space.
- */
-void
-pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
-{
- struct pv_entry *pv, *npv;
- struct l2_bucket *l2b = NULL;
- vm_page_t m;
- pt_entry_t *pt;
-
- vm_page_lock_queues();
- for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
- if (pv->pv_va >= eva || pv->pv_va < sva) {
- npv = TAILQ_NEXT(pv, pv_plist);
- continue;
- }
- if (pv->pv_flags & PVF_WIRED) {
- /* The page is wired, cannot remove it now. */
- npv = TAILQ_NEXT(pv, pv_plist);
- continue;
- }
- pmap->pm_stats.resident_count--;
- l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
- KASSERT(l2b != NULL, ("No L2 bucket in pmap_remove_pages"));
- pt = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
- m = PHYS_TO_VM_PAGE(*pt & L2_ADDR_MASK);
- *pt = 0;
- PTE_SYNC(pt);
- npv = TAILQ_NEXT(pv, pv_plist);
- pmap_nuke_pv(m, pmap, pv);
- pmap_free_pv_entry(pv);
- }
- vm_page_unlock_queues();
- cpu_idcache_wbinv_all();
- cpu_tlb_flushID();
- cpu_cpwait();
-}
-
-
-/***************************************************
- * Low level mapping routines.....
- ***************************************************/
-
-/* Map a section into the KVA. */
-
-void
-pmap_kenter_section(vm_offset_t va, vm_offset_t pa, int flags)
-{
- pd_entry_t pd = L1_S_PROTO | pa | L1_S_PROT(PTE_KERNEL,
- VM_PROT_READ|VM_PROT_WRITE) | L1_S_DOM(PMAP_DOMAIN_KERNEL);
- struct l1_ttable *l1;
-
- KASSERT(((va | pa) & L1_S_OFFSET) == 0,
- ("Not a valid section mapping"));
- if (flags & SECTION_CACHE)
- pd |= pte_l1_s_cache_mode;
- else if (flags & SECTION_PT)
- pd |= pte_l1_s_cache_mode_pt;
- SLIST_FOREACH(l1, &l1_list, l1_link) {
- l1->l1_kva[L1_IDX(va)] = pd;
- PTE_SYNC(&l1->l1_kva[L1_IDX(va)]);
- }
-}
-
-/*
- * add a wired page to the kva
- * note that in order for the mapping to take effect -- you
- * should do a invltlb after doing the pmap_kenter...
- */
-static PMAP_INLINE void
-pmap_kenter_internal(vm_offset_t va, vm_offset_t pa, int flags)
-{
- struct l2_bucket *l2b;
- pt_entry_t *pte;
- pt_entry_t opte;
- PDEBUG(1, printf("pmap_kenter: va = %08x, pa = %08x\n",
- (uint32_t) va, (uint32_t) pa));
-
-
- l2b = pmap_get_l2_bucket(pmap_kernel(), va);
- if (l2b == NULL)
- l2b = pmap_grow_l2_bucket(pmap_kernel(), va);
- KASSERT(l2b != NULL, ("No L2 Bucket"));
- pte = &l2b->l2b_kva[l2pte_index(va)];
- opte = *pte;
- PDEBUG(1, printf("pmap_kenter: pte = %08x, opte = %08x, npte = %08x\n",
- (uint32_t) pte, opte, *pte));
- if (l2pte_valid(opte)) {
- cpu_dcache_wbinv_range(va, PAGE_SIZE);
- cpu_tlb_flushD_SE(va);
- cpu_cpwait();
- } else {
- if (opte == 0)
- l2b->l2b_occupancy++;
- }
- *pte = L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL,
- VM_PROT_READ | VM_PROT_WRITE);
- if (flags & KENTER_CACHE)
- *pte |= pte_l2_s_cache_mode;
- if (flags & KENTER_USER)
- *pte |= L2_S_PROT_U;
- PTE_SYNC(pte);
-}
-
-void
-pmap_kenter(vm_offset_t va, vm_paddr_t pa)
-{
- pmap_kenter_internal(va, pa, KENTER_CACHE);
-}
-
-void
-pmap_kenter_user(vm_offset_t va, vm_paddr_t pa)
-{
-
- pmap_kenter_internal(va, pa, KENTER_CACHE|KENTER_USER);
- /*
- * Call pmap_fault_fixup now, to make sure we'll have no exception
- * at the first use of the new address, or bad things will happen,
- * as we use one of these addresses in the exception handlers.
- */
- pmap_fault_fixup(pmap_kernel(), va, VM_PROT_READ|VM_PROT_WRITE, 1);
-}
-
-/*
- * remove a page rom the kernel pagetables
- */
-PMAP_INLINE void
-pmap_kremove(vm_offset_t va)
-{
- struct l2_bucket *l2b;
- pt_entry_t *pte, opte;
-
- l2b = pmap_get_l2_bucket(pmap_kernel(), va);
- if (!l2b)
- return;
- KASSERT(l2b != NULL, ("No L2 Bucket"));
- pte = &l2b->l2b_kva[l2pte_index(va)];
- opte = *pte;
- if (l2pte_valid(opte)) {
- cpu_dcache_wbinv_range(va, PAGE_SIZE);
- cpu_tlb_flushD_SE(va);
- cpu_cpwait();
- *pte = 0;
- }
-}
-
-
-/*
- * Used to map a range of physical addresses into kernel
- * virtual address space.
- *
- * The value passed in '*virt' is a suggested virtual address for
- * the mapping. Architectures which can support a direct-mapped
- * physical to virtual region can return the appropriate address
- * within that region, leaving '*virt' unchanged. Other
- * architectures should map the pages starting at '*virt' and
- * update '*virt' with the first usable address after the mapped
- * region.
- */
-vm_offset_t
-pmap_map(vm_offset_t *virt, vm_offset_t start, vm_offset_t end, int prot)
-{
- vm_offset_t sva = *virt;
- vm_offset_t va = sva;
-
- PDEBUG(1, printf("pmap_map: virt = %08x, start = %08x, end = %08x, "
- "prot = %d\n", (uint32_t) *virt, (uint32_t) start, (uint32_t) end,
- prot));
-
- while (start < end) {
- pmap_kenter(va, start);
- va += PAGE_SIZE;
- start += PAGE_SIZE;
- }
- *virt = va;
- return (sva);
-}
-
-static void
-pmap_wb_page(vm_page_t m, boolean_t do_inv)
-{
- struct pv_entry *pv;
-
- TAILQ_FOREACH(pv, &m->md.pv_list, pv_list)
- pmap_dcache_wb_range(pv->pv_pmap, pv->pv_va, PAGE_SIZE, do_inv,
- (pv->pv_flags & PVF_WRITE) == 0);
-}
-
-/*
- * Add a list of wired pages to the kva
- * this routine is only used for temporary
- * kernel mappings that do not need to have
- * page modification or references recorded.
- * Note that old mappings are simply written
- * over. The page *must* be wired.
- */
-void
-pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
-{
- int i;
-
- for (i = 0; i < count; i++) {
- pmap_wb_page(m[i], TRUE);
- pmap_kenter_internal(va, VM_PAGE_TO_PHYS(m[i]),
- KENTER_CACHE);
- va += PAGE_SIZE;
- }
-}
-
-
-/*
- * this routine jerks page mappings from the
- * kernel -- it is meant only for temporary mappings.
- */
-void
-pmap_qremove(vm_offset_t va, int count)
-{
- vm_paddr_t pa;
- int i;
-
- for (i = 0; i < count; i++) {
- pa = vtophys(va);
- if (pa) {
- pmap_wb_page(PHYS_TO_VM_PAGE(pa), TRUE);
- pmap_kremove(va);
- }
- va += PAGE_SIZE;
- }
-}
-
-
-/*
- * pmap_object_init_pt preloads the ptes for a given object
- * into the specified pmap. This eliminates the blast of soft
- * faults on process startup and immediately after an mmap.
- */
-void
-pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
- vm_pindex_t pindex, vm_size_t size)
-{
- printf("pmap_object_init_pt()\n");
-}
-
-
-/*
- * pmap_is_prefaultable:
- *
- * Return whether or not the specified virtual address is elgible
- * for prefault.
- */
-boolean_t
-pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
-{
- pd_entry_t *pde;
- pt_entry_t *pte;
-
- if (!pmap_get_pde_pte(pmap, addr, &pde, &pte))
- return (FALSE);
- if (*pte == 0)
- return (TRUE);
- return (FALSE);
-}
-
-/*
- * Fetch pointers to the PDE/PTE for the given pmap/VA pair.
- * Returns TRUE if the mapping exists, else FALSE.
- *
- * NOTE: This function is only used by a couple of arm-specific modules.
- * It is not safe to take any pmap locks here, since we could be right
- * in the middle of debugging the pmap anyway...
- *
- * It is possible for this routine to return FALSE even though a valid
- * mapping does exist. This is because we don't lock, so the metadata
- * state may be inconsistent.
- *
- * NOTE: We can return a NULL *ptp in the case where the L1 pde is
- * a "section" mapping.
- */
-boolean_t
-pmap_get_pde_pte(pmap_t pm, vm_offset_t va, pd_entry_t **pdp, pt_entry_t **ptp)
-{
- struct l2_dtable *l2;
- pd_entry_t *pl1pd, l1pd;
- pt_entry_t *ptep;
- u_short l1idx;
-
- if (pm->pm_l1 == NULL)
- return (FALSE);
-
- l1idx = L1_IDX(va);
- *pdp = pl1pd = &pm->pm_l1->l1_kva[l1idx];
- l1pd = *pl1pd;
-
- if (l1pte_section_p(l1pd)) {
- *ptp = NULL;
- return (TRUE);
- }
-
- if (pm->pm_l2 == NULL)
- return (FALSE);
-
- l2 = pm->pm_l2[L2_IDX(l1idx)];
-
- if (l2 == NULL ||
- (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
- return (FALSE);
- }
-
- *ptp = &ptep[l2pte_index(va)];
- return (TRUE);
-}
-
-/*
- * Routine: pmap_remove_all
- * Function:
- * Removes this physical page from
- * all physical maps in which it resides.
- * Reflects back modify bits to the pager.
- *
- * Notes:
- * Original versions of this routine were very
- * inefficient because they iteratively called
- * pmap_remove (slow...)
- */
-void
-pmap_remove_all(vm_page_t m)
-{
- pv_entry_t pv;
- pt_entry_t *ptep, pte;
- struct l2_bucket *l2b;
- boolean_t flush = FALSE;
- pmap_t curpm;
- int flags = 0;
-
-#if defined(PMAP_DEBUG)
- /*
- * XXX this makes pmap_page_protect(NONE) illegal for non-managed
- * pages!
- */
- if (m->flags & PG_FICTITIOUS) {
- panic("pmap_page_protect: illegal for unmanaged page, va: 0x%x", VM_PAGE_TO_PHYS(m));
- }
-#endif
-
- if (TAILQ_EMPTY(&m->md.pv_list))
- return;
- curpm = vmspace_pmap(curproc->p_vmspace);
- while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
- if (flush == FALSE && (pv->pv_pmap == curpm ||
- pv->pv_pmap == pmap_kernel()))
- flush = TRUE;
- l2b = pmap_get_l2_bucket(pv->pv_pmap, pv->pv_va);
- KASSERT(l2b != NULL, ("No l2 bucket"));
- ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
- pte = *ptep;
- *ptep = 0;
- PTE_SYNC_CURRENT(pv->pv_pmap, ptep);
- pmap_free_l2_bucket(pv->pv_pmap, l2b, 1);
- if (pv->pv_flags & PVF_WIRED)
- pv->pv_pmap->pm_stats.wired_count--;
- pv->pv_pmap->pm_stats.resident_count--;
- flags |= pv->pv_flags;
- pmap_nuke_pv(m, pv->pv_pmap, pv);
- pmap_free_pv_entry(pv);
- }
-
- if (flush) {
- if (PV_BEEN_EXECD(flags))
- pmap_tlb_flushID(curpm);
- else
- pmap_tlb_flushD(curpm);
- }
-}
-
-
-/*
- * Set the physical protection on the
- * specified range of this map as requested.
- */
-void
-pmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
-{
- struct l2_bucket *l2b;
- pt_entry_t *ptep, pte;
- vm_offset_t next_bucket;
- u_int flags;
- int flush;
-
- if ((prot & VM_PROT_READ) == 0) {
- mtx_lock(&Giant);
- pmap_remove(pm, sva, eva);
- mtx_unlock(&Giant);
- return;
- }
-
- if (prot & VM_PROT_WRITE) {
- /*
- * If this is a read->write transition, just ignore it and let
- * vm_fault() take care of it later.
- */
- return;
- }
-
- mtx_lock(&Giant);
-
- /*
- * OK, at this point, we know we're doing write-protect operation.
- * If the pmap is active, write-back the range.
- */
- pmap_dcache_wb_range(pm, sva, eva - sva, FALSE, FALSE);
-
- flush = ((eva - sva) >= (PAGE_SIZE * 4)) ? 0 : -1;
- flags = 0;
-
- vm_page_lock_queues();
- while (sva < eva) {
- next_bucket = L2_NEXT_BUCKET(sva);
- if (next_bucket > eva)
- next_bucket = eva;
-
- l2b = pmap_get_l2_bucket(pm, sva);
- if (l2b == NULL) {
- sva = next_bucket;
- continue;
- }
-
- ptep = &l2b->l2b_kva[l2pte_index(sva)];
-
- while (sva < next_bucket) {
- if ((pte = *ptep) != 0 && (pte & L2_S_PROT_W) != 0) {
- struct vm_page *pg;
- u_int f;
-
- pg = PHYS_TO_VM_PAGE(l2pte_pa(pte));
- pte &= ~L2_S_PROT_W;
- *ptep = pte;
- PTE_SYNC(ptep);
-
- if (pg != NULL) {
- f = pmap_modify_pv(pg, pm, sva,
- PVF_WRITE, 0);
- pmap_vac_me_harder(pg, pm, sva);
- if (pmap_track_modified(sva))
- vm_page_dirty(pg);
- } else
- f = PVF_REF | PVF_EXEC;
-
- if (flush >= 0) {
- flush++;
- flags |= f;
- } else
- if (PV_BEEN_EXECD(f))
- pmap_tlb_flushID_SE(pm, sva);
- else
- if (PV_BEEN_REFD(f))
- pmap_tlb_flushD_SE(pm, sva);
- }
-
- sva += PAGE_SIZE;
- ptep++;
- }
- }
-
-
- if (flush) {
- if (PV_BEEN_EXECD(flags))
- pmap_tlb_flushID(pm);
- else
- if (PV_BEEN_REFD(flags))
- pmap_tlb_flushD(pm);
- }
- vm_page_unlock_queues();
-
- mtx_unlock(&Giant);
-}
-
-
-/*
- * Insert the given physical page (p) at
- * the specified virtual address (v) in the
- * target physical map with the protection requested.
- *
- * If specified, the page will be wired down, meaning
- * that the related pte can not be reclaimed.
- *
- * NB: This is the only routine which MAY NOT lazy-evaluate
- * or lose information. That is, this routine must actually
- * insert this page into the given map NOW.
- */
-
-void
-pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
- boolean_t wired)
-{
- struct l2_bucket *l2b = NULL;
- struct vm_page *opg;
- struct pv_entry *pve = NULL;
- pt_entry_t *ptep, npte, opte;
- u_int nflags;
- u_int oflags;
- vm_paddr_t pa;
-
- vm_page_lock_queues();
- if (va == vector_page) {
- pa = systempage.pv_pa;
- m = NULL;
- } else
- pa = VM_PAGE_TO_PHYS(m);
- nflags = 0;
- if (prot & VM_PROT_WRITE)
- nflags |= PVF_WRITE;
- if (prot & VM_PROT_EXECUTE)
- nflags |= PVF_EXEC;
- if (wired)
- nflags |= PVF_WIRED;
- PDEBUG(1, printf("pmap_enter: pmap = %08x, va = %08x, m = %08x, prot = %x, "
- "wired = %x\n", (uint32_t) pmap, va, (uint32_t) m, prot, wired));
-
- if (pmap == pmap_kernel()) {
- l2b = pmap_get_l2_bucket(pmap, va);
- if (l2b == NULL)
- l2b = pmap_grow_l2_bucket(pmap, va);
- } else
- l2b = pmap_alloc_l2_bucket(pmap, va);
- KASSERT(l2b != NULL,
- ("pmap_enter: failed to allocate l2 bucket"));
- ptep = &l2b->l2b_kva[l2pte_index(va)];
-
- opte = *ptep;
- npte = pa;
- oflags = 0;
- if (opte) {
- /*
- * There is already a mapping at this address.
- * If the physical address is different, lookup the
- * vm_page.
- */
- if (l2pte_pa(opte) != pa)
- opg = PHYS_TO_VM_PAGE(l2pte_pa(opte));
- else
- opg = m;
- } else
- opg = NULL;
-
- if ((prot & (VM_PROT_ALL)) ||
- (!m || m->md.pvh_attrs & PVF_REF)) {
- /*
- * - The access type indicates that we don't need
- * to do referenced emulation.
- * OR
- * - The physical page has already been referenced
- * so no need to re-do referenced emulation here.
- */
- npte |= L2_S_PROTO;
-
- nflags |= PVF_REF;
-
- if (m && ((prot & VM_PROT_WRITE) != 0 ||
- (m->md.pvh_attrs & PVF_MOD))) {
- /*
- * This is a writable mapping, and the
- * page's mod state indicates it has
- * already been modified. Make it
- * writable from the outset.
- */
- nflags |= PVF_MOD;
- if (!(m->md.pvh_attrs & PVF_MOD) &&
- pmap_track_modified(va))
- vm_page_dirty(m);
- }
- if (m && opte)
- vm_page_flag_set(m, PG_REFERENCED);
- } else {
- /*
- * Need to do page referenced emulation.
- */
- npte |= L2_TYPE_INV;
- }
-
- if (prot & VM_PROT_WRITE)
- npte |= L2_S_PROT_W;
- npte |= pte_l2_s_cache_mode;
- if (m && m == opg) {
- /*
- * We're changing the attrs of an existing mapping.
- */
-#if 0
- simple_lock(&pg->mdpage.pvh_slock);
-#endif
- oflags = pmap_modify_pv(m, pmap, va,
- PVF_WRITE | PVF_EXEC | PVF_WIRED |
- PVF_MOD | PVF_REF, nflags);
-#if 0
- simple_unlock(&pg->mdpage.pvh_slock);
-#endif
-
- /*
- * We may need to flush the cache if we're
- * doing rw-ro...
- */
- if (pmap_is_current(pmap) &&
- (oflags & PVF_NC) == 0 &&
- (opte & L2_S_PROT_W) != 0 &&
- (prot & VM_PROT_WRITE) == 0)
- cpu_dcache_wb_range(va, PAGE_SIZE);
- } else {
- /*
- * New mapping, or changing the backing page
- * of an existing mapping.
- */
- if (opg) {
- /*
- * Replacing an existing mapping with a new one.
- * It is part of our managed memory so we
- * must remove it from the PV list
- */
-#if 0
- simple_lock(&opg->mdpage.pvh_slock);
-#endif
- pve = pmap_remove_pv(opg, pmap, va);
- if (m && (m->flags & (PG_UNMANAGED | PG_FICTITIOUS)) && pve)
- pmap_free_pv_entry(pve);
- else if (!pve)
- pve = pmap_get_pv_entry();
- KASSERT(pve != NULL, ("No pv"));
-#if 0
- simple_unlock(&opg->mdpage.pvh_slock);
-#endif
- oflags = pve->pv_flags;
-
- /*
- * If the old mapping was valid (ref/mod
- * emulation creates 'invalid' mappings
- * initially) then make sure to frob
- * the cache.
- */
- if ((oflags & PVF_NC) == 0 &&
- l2pte_valid(opte)) {
- if (PV_BEEN_EXECD(oflags)) {
- pmap_idcache_wbinv_range(pmap, va,
- PAGE_SIZE);
- } else
- if (PV_BEEN_REFD(oflags)) {
- pmap_dcache_wb_range(pmap, va,
- PAGE_SIZE, TRUE,
- (oflags & PVF_WRITE) == 0);
- }
- }
- } else if (m)
- if ((pve = pmap_get_pv_entry()) == NULL) {
- panic("pmap_enter: no pv entries");
- }
- if (m && !(m->flags & (PG_UNMANAGED | PG_FICTITIOUS)))
- pmap_enter_pv(m, pve, pmap, va, nflags);
- }
- /*
- * Make sure userland mappings get the right permissions
- */
- if (pmap != pmap_kernel() && va != vector_page) {
- npte |= L2_S_PROT_U;
- }
-
- /*
- * Keep the stats up to date
- */
- if (opte == 0) {
- l2b->l2b_occupancy++;
- pmap->pm_stats.resident_count++;
- }
-
-
- /*
- * If this is just a wiring change, the two PTEs will be
- * identical, so there's no need to update the page table.
- */
- if (npte != opte) {
- boolean_t is_cached = pmap_is_current(pmap);
-
- *ptep = npte;
- if (is_cached) {
- /*
- * We only need to frob the cache/tlb if this pmap
- * is current
- */
- PTE_SYNC(ptep);
- if (L1_IDX(va) != L1_IDX(vector_page) &&
- l2pte_valid(npte)) {
- /*
- * This mapping is likely to be accessed as
- * soon as we return to userland. Fix up the
- * L1 entry to avoid taking another
- * page/domain fault.
- */
- pd_entry_t *pl1pd, l1pd;
-
- pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
- l1pd = l2b->l2b_phys | L1_C_DOM(pmap->pm_domain) |
- L1_C_PROTO;
- if (*pl1pd != l1pd) {
- *pl1pd = l1pd;
- PTE_SYNC(pl1pd);
- }
- }
- }
-
- if (PV_BEEN_EXECD(oflags))
- pmap_tlb_flushID_SE(pmap, va);
- else if (PV_BEEN_REFD(oflags))
- pmap_tlb_flushD_SE(pmap, va);
-
-
- pmap_vac_me_harder(m, pmap, va);
- }
- vm_page_unlock_queues();
-}
-
-/*
- * this code makes some *MAJOR* assumptions:
- * 1. Current pmap & pmap exists.
- * 2. Not wired.
- * 3. Read access.
- * 4. No page table pages.
- * but is *MUCH* faster than pmap_enter...
- */
-
-vm_page_t
-pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
- vm_page_t mpte)
-{
-
- vm_page_busy(m);
- vm_page_unlock_queues();
- VM_OBJECT_UNLOCK(m->object);
- mtx_lock(&Giant);
- pmap_enter(pmap, va, m, prot & (VM_PROT_READ | VM_PROT_EXECUTE), FALSE);
- pmap_idcache_wbinv_all(pmap);
- mtx_unlock(&Giant);
- VM_OBJECT_LOCK(m->object);
- vm_page_lock_queues();
- vm_page_wakeup(m);
- return (NULL);
-}
-
-/*
- * Routine: pmap_change_wiring
- * Function: Change the wiring attribute for a map/virtual-address
- * pair.
- * In/out conditions:
- * The mapping must already exist in the pmap.
- */
-void
-pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
-{
- struct l2_bucket *l2b;
- pt_entry_t *ptep, pte;
- vm_page_t pg;
-
- l2b = pmap_get_l2_bucket(pmap, va);
- KASSERT(l2b, ("No l2b bucket in pmap_change_wiring"));
- ptep = &l2b->l2b_kva[l2pte_index(va)];
- pte = *ptep;
- pg = PHYS_TO_VM_PAGE(l2pte_pa(pte));
- if (pg)
- pmap_modify_pv(pg, pmap, va, PVF_WIRED, wired);
-}
-
-
-/*
- * Copy the range specified by src_addr/len
- * from the source map to the range dst_addr/len
- * in the destination map.
- *
- * This routine is only advisory and need not do anything.
- */
-void
-pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
- vm_size_t len, vm_offset_t src_addr)
-{
-}
-
-
-/*
- * Routine: pmap_extract
- * Function:
- * Extract the physical page address associated
- * with the given map/virtual_address pair.
- */
-vm_paddr_t
-pmap_extract(pmap_t pm, vm_offset_t va)
-{
- struct l2_dtable *l2;
- pd_entry_t *pl1pd, l1pd;
- pt_entry_t *ptep, pte;
- vm_paddr_t pa;
- u_int l1idx;
- l1idx = L1_IDX(va);
- pl1pd = &pm->pm_l1->l1_kva[l1idx];
- l1pd = *pl1pd;
-
- if (l1pte_section_p(l1pd)) {
- /*
- * These should only happen for pmap_kernel()
- */
- KASSERT(pm == pmap_kernel(), ("huh"));
- pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
- } else {
- /*
- * Note that we can't rely on the validity of the L1
- * descriptor as an indication that a mapping exists.
- * We have to look it up in the L2 dtable.
- */
- l2 = pm->pm_l2[L2_IDX(l1idx)];
-
- if (l2 == NULL ||
- (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
- return (0);
- }
-
- ptep = &ptep[l2pte_index(va)];
- pte = *ptep;
-
- if (pte == 0)
- return (0);
-
- switch (pte & L2_TYPE_MASK) {
- case L2_TYPE_L:
- pa = (pte & L2_L_FRAME) | (va & L2_L_OFFSET);
- break;
-
- default:
- pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET);
- break;
- }
- }
-
- return (pa);
-}
-
-/*
- * Atomically extract and hold the physical page with the given
- * pmap and virtual address pair if that mapping permits the given
- * protection.
- *
- */
-vm_page_t
-pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
-{
- struct l2_dtable *l2;
- pd_entry_t *pl1pd, l1pd;
- pt_entry_t *ptep, pte;
- vm_paddr_t pa;
- vm_page_t m = NULL;
- u_int l1idx;
- l1idx = L1_IDX(va);
- pl1pd = &pmap->pm_l1->l1_kva[l1idx];
- l1pd = *pl1pd;
-
- vm_page_lock_queues();
- if (l1pte_section_p(l1pd)) {
- /*
- * These should only happen for pmap_kernel()
- */
- KASSERT(pmap == pmap_kernel(), ("huh"));
- pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
- if (l1pd & L1_S_PROT_W || (prot & VM_PROT_WRITE) == 0) {
- m = PHYS_TO_VM_PAGE(pa);
- vm_page_hold(m);
- }
-
- } else {
- /*
- * Note that we can't rely on the validity of the L1
- * descriptor as an indication that a mapping exists.
- * We have to look it up in the L2 dtable.
- */
- l2 = pmap->pm_l2[L2_IDX(l1idx)];
-
- if (l2 == NULL ||
- (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
- return (NULL);
- }
-
- ptep = &ptep[l2pte_index(va)];
- pte = *ptep;
-
- if (pte == 0)
- return (NULL);
-
- if (pte & L2_S_PROT_W || (prot & VM_PROT_WRITE) == 0) {
- switch (pte & L2_TYPE_MASK) {
- case L2_TYPE_L:
- pa = (pte & L2_L_FRAME) | (va & L2_L_OFFSET);
- break;
-
- default:
- pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET);
- break;
- }
- m = PHYS_TO_VM_PAGE(pa);
- vm_page_hold(m);
- }
- }
-
- vm_page_unlock_queues();
- return (m);
-}
-
-/*
- * Initialize a preallocated and zeroed pmap structure,
- * such as one in a vmspace structure.
- */
-
-void
-pmap_pinit(pmap_t pmap)
-{
- PDEBUG(1, printf("pmap_pinit: pmap = %08x\n", (uint32_t) pmap));
-
- pmap_alloc_l1(pmap);
- bzero(pmap->pm_l2, sizeof(pmap->pm_l2));
-
- LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
- pmap->pm_count = 1;
- pmap->pm_active = 0;
-
- TAILQ_INIT(&pmap->pm_pvlist);
- bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
- pmap->pm_stats.resident_count = 1;
- if (vector_page < KERNBASE) {
- pmap_enter(pmap, vector_page, PHYS_TO_VM_PAGE(systempage.pv_pa),
- VM_PROT_READ, 1);
- }
-}
-
-
-/***************************************************
- * page management routines.
- ***************************************************/
-
-
-static void
-pmap_free_pv_entry(pv_entry_t pv)
-{
- pv_entry_count--;
- uma_zfree(pvzone, pv);
-}
-
-
-/*
- * get a new pv_entry, allocating a block from the system
- * when needed.
- * the memory allocation is performed bypassing the malloc code
- * because of the possibility of allocations at interrupt time.
- */
-static pv_entry_t
-pmap_get_pv_entry(void)
-{
- pv_entry_t ret_value;
-
- pv_entry_count++;
- if (pv_entry_high_water &&
- (pv_entry_count > pv_entry_high_water) &&
- (pmap_pagedaemon_waken == 0)) {
- pmap_pagedaemon_waken = 1;
- wakeup (&vm_pages_needed);
- }
- ret_value = uma_zalloc(pvzone, M_NOWAIT);
- return ret_value;
-}
-
-
-/*
- * Remove the given range of addresses from the specified map.
- *
- * It is assumed that the start and end are properly
- * rounded to the page size.
- */
-#define PMAP_REMOVE_CLEAN_LIST_SIZE 3
-void
-pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva)
-{
- struct l2_bucket *l2b;
- vm_offset_t next_bucket;
- pt_entry_t *ptep;
- u_int cleanlist_idx, total, cnt;
- struct {
- vm_offset_t va;
- pt_entry_t *pte;
- } cleanlist[PMAP_REMOVE_CLEAN_LIST_SIZE];
- u_int mappings, is_exec, is_refd;
- int flushall = 0;
-
-
- /*
- * we lock in the pmap => pv_head direction
- */
-#if 0
- PMAP_MAP_TO_HEAD_LOCK();
- pmap_acquire_pmap_lock(pm);
-#endif
-
- vm_page_lock_queues();
- if (!pmap_is_current(pm)) {
- cleanlist_idx = PMAP_REMOVE_CLEAN_LIST_SIZE + 1;
- } else
- cleanlist_idx = 0;
-
- total = 0;
- while (sva < eva) {
- /*
- * Do one L2 bucket's worth at a time.
- */
- next_bucket = L2_NEXT_BUCKET(sva);
- if (next_bucket > eva)
- next_bucket = eva;
-
- l2b = pmap_get_l2_bucket(pm, sva);
- if (l2b == NULL) {
- sva = next_bucket;
- continue;
- }
-
- ptep = &l2b->l2b_kva[l2pte_index(sva)];
- mappings = 0;
-
- while (sva < next_bucket) {
- struct vm_page *pg;
- pt_entry_t pte;
- vm_paddr_t pa;
-
- pte = *ptep;
-
- if (pte == 0) {
- /*
- * Nothing here, move along
- */
- sva += PAGE_SIZE;
- ptep++;
- continue;
- }
-
- pm->pm_stats.resident_count--;
- pa = l2pte_pa(pte);
- is_exec = 0;
- is_refd = 1;
-
- /*
- * Update flags. In a number of circumstances,
- * we could cluster a lot of these and do a
- * number of sequential pages in one go.
- */
- if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) {
- struct pv_entry *pve;
-#if 0
- simple_lock(&pg->mdpage.pvh_slock);
-#endif
- pve = pmap_remove_pv(pg, pm, sva);
- if (pve) {
-#if 0
- simple_unlock(&pg->mdpage.pvh_slock);
-#endif
- is_exec =
- PV_BEEN_EXECD(pve->pv_flags);
- is_refd =
- PV_BEEN_REFD(pve->pv_flags);
- pmap_free_pv_entry(pve);
- }
- }
-
- if (!l2pte_valid(pte)) {
- *ptep = 0;
- PTE_SYNC_CURRENT(pm, ptep);
- sva += PAGE_SIZE;
- ptep++;
- mappings++;
- continue;
- }
-
- if (cleanlist_idx < PMAP_REMOVE_CLEAN_LIST_SIZE) {
- /* Add to the clean list. */
- cleanlist[cleanlist_idx].pte = ptep;
- cleanlist[cleanlist_idx].va =
- sva | (is_exec & 1);
- cleanlist_idx++;
- } else
- if (cleanlist_idx == PMAP_REMOVE_CLEAN_LIST_SIZE) {
- /* Nuke everything if needed. */
- pmap_idcache_wbinv_all(pm);
- pmap_tlb_flushID(pm);
-
- /*
- * Roll back the previous PTE list,
- * and zero out the current PTE.
- */
- for (cnt = 0;
- cnt < PMAP_REMOVE_CLEAN_LIST_SIZE; cnt++) {
- *cleanlist[cnt].pte = 0;
- }
- *ptep = 0;
- PTE_SYNC(ptep);
- cleanlist_idx++;
- flushall = 1;
- } else {
- *ptep = 0;
- PTE_SYNC(ptep);
- if (is_exec)
- pmap_tlb_flushID_SE(pm, sva);
- else
- if (is_refd)
- pmap_tlb_flushD_SE(pm, sva);
- }
-
- sva += PAGE_SIZE;
- ptep++;
- mappings++;
- }
-
- /*
- * Deal with any left overs
- */
- if (cleanlist_idx <= PMAP_REMOVE_CLEAN_LIST_SIZE) {
- total += cleanlist_idx;
- for (cnt = 0; cnt < cleanlist_idx; cnt++) {
- vm_offset_t clva =
- cleanlist[cnt].va & ~1;
- if (cleanlist[cnt].va & 1) {
- pmap_idcache_wbinv_range(pm,
- clva, PAGE_SIZE);
- pmap_tlb_flushID_SE(pm, clva);
- } else {
- pmap_dcache_wb_range(pm,
- clva, PAGE_SIZE, TRUE,
- FALSE);
- pmap_tlb_flushD_SE(pm, clva);
- }
- *cleanlist[cnt].pte = 0;
- PTE_SYNC_CURRENT(pm, cleanlist[cnt].pte);
- }
-
- if (total <= PMAP_REMOVE_CLEAN_LIST_SIZE)
- cleanlist_idx = 0;
- else {
- /*
- * We are removing so much entries it's just
- * easier to flush the whole cache.
- */
- cleanlist_idx = PMAP_REMOVE_CLEAN_LIST_SIZE + 1;
- pmap_idcache_wbinv_all(pm);
- flushall = 1;
- }
- }
-
- pmap_free_l2_bucket(pm, l2b, mappings);
- }
-
- vm_page_unlock_queues();
- if (flushall)
- cpu_tlb_flushID();
-#if 0
- pmap_release_pmap_lock(pm);
- PMAP_MAP_TO_HEAD_UNLOCK();
-#endif
-}
-
-
-
-
-/*
- * pmap_zero_page()
- *
- * Zero a given physical page by mapping it at a page hook point.
- * In doing the zero page op, the page we zero is mapped cachable, as with
- * StrongARM accesses to non-cached pages are non-burst making writing
- * _any_ bulk data very slow.
- */
-#if (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
-void
-pmap_zero_page_generic(vm_paddr_t phys, int off, int size)
-{
-#ifdef DEBUG
- struct vm_page *pg = PHYS_TO_VM_PAGE(phys);
-
- if (pg->md.pvh_list != NULL)
- panic("pmap_zero_page: page has mappings");
-#endif
-
-
- /*
- * Hook in the page, zero it, and purge the cache for that
- * zeroed page. Invalidate the TLB as needed.
- */
- *cdst_pte = L2_S_PROTO | phys |
- L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode;
- PTE_SYNC(cdst_pte);
- cpu_tlb_flushD_SE(cdstp);
- cpu_cpwait();
- if (off || size != PAGE_SIZE)
- bzero((void *)(cdstp + off), size);
- else
- bzero_page(cdstp);
- cpu_dcache_wbinv_range(cdstp, PAGE_SIZE);
-}
-#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0 */
-
-#if ARM_MMU_XSCALE == 1
-void
-pmap_zero_page_xscale(vm_paddr_t phys, int off, int size)
-{
- /*
- * Hook in the page, zero it, and purge the cache for that
- * zeroed page. Invalidate the TLB as needed.
- */
- *cdst_pte = L2_S_PROTO | phys |
- L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) |
- L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */
- PTE_SYNC(cdst_pte);
- cpu_tlb_flushD_SE(cdstp);
- cpu_cpwait();
- if (off || size != PAGE_SIZE)
- bzero((void *)(cdstp + off), size);
- else
- bzero_page(cdstp);
- xscale_cache_clean_minidata();
-}
-
-/*
- * Change the PTEs for the specified kernel mappings such that they
- * will use the mini data cache instead of the main data cache.
- */
-void
-pmap_use_minicache(vm_offset_t va, vm_size_t size)
-{
- struct l2_bucket *l2b;
- pt_entry_t *ptep, *sptep, pte;
- vm_offset_t next_bucket, eva;
-
-#if (ARM_NMMUS > 1)
- if (xscale_use_minidata == 0)
- return;
-#endif
-
- eva = va + size;
-
- while (va < eva) {
- next_bucket = L2_NEXT_BUCKET(va);
- if (next_bucket > eva)
- next_bucket = eva;
-
- l2b = pmap_get_l2_bucket(pmap_kernel(), va);
-
- sptep = ptep = &l2b->l2b_kva[l2pte_index(va)];
-
- while (va < next_bucket) {
- pte = *ptep;
- if (!l2pte_minidata(pte)) {
- cpu_dcache_wbinv_range(va, PAGE_SIZE);
- cpu_tlb_flushD_SE(va);
- *ptep = pte & ~L2_B;
- }
- ptep++;
- va += PAGE_SIZE;
- }
- PTE_SYNC_RANGE(sptep, (u_int)(ptep - sptep));
- }
- cpu_cpwait();
-}
-#endif /* ARM_MMU_XSCALE == 1 */
-
-/*
- * pmap_zero_page zeros the specified hardware page by mapping
- * the page into KVM and using bzero to clear its contents.
- */
-void
-pmap_zero_page(vm_page_t m)
-{
- pmap_zero_page_func(VM_PAGE_TO_PHYS(m), 0, PAGE_SIZE);
-}
-
-
-/*
- * pmap_zero_page_area zeros the specified hardware page by mapping
- * the page into KVM and using bzero to clear its contents.
- *
- * off and size may not cover an area beyond a single hardware page.
- */
-void
-pmap_zero_page_area(vm_page_t m, int off, int size)
-{
-
- pmap_zero_page_func(VM_PAGE_TO_PHYS(m), off, size);
-}
-
-
-/*
- * pmap_zero_page_idle zeros the specified hardware page by mapping
- * the page into KVM and using bzero to clear its contents. This
- * is intended to be called from the vm_pagezero process only and
- * outside of Giant.
- */
-void
-pmap_zero_page_idle(vm_page_t m)
-{
-
- pmap_zero_page(m);
-}
-
-/*
- * pmap_clean_page()
- *
- * This is a local function used to work out the best strategy to clean
- * a single page referenced by its entry in the PV table. It's used by
- * pmap_copy_page, pmap_zero page and maybe some others later on.
- *
- * Its policy is effectively:
- * o If there are no mappings, we don't bother doing anything with the cache.
- * o If there is one mapping, we clean just that page.
- * o If there are multiple mappings, we clean the entire cache.
- *
- * So that some functions can be further optimised, it returns 0 if it didn't
- * clean the entire cache, or 1 if it did.
- *
- * XXX One bug in this routine is that if the pv_entry has a single page
- * mapped at 0x00000000 a whole cache clean will be performed rather than
- * just the 1 page. Since this should not occur in everyday use and if it does
- * it will just result in not the most efficient clean for the page.
- */
-static int
-pmap_clean_page(struct pv_entry *pv, boolean_t is_src)
-{
- pmap_t pm, pm_to_clean = NULL;
- struct pv_entry *npv;
- u_int cache_needs_cleaning = 0;
- u_int flags = 0;
- vm_offset_t page_to_clean = 0;
-
- if (pv == NULL) {
- /* nothing mapped in so nothing to flush */
- return (0);
- }
-
- /*
- * Since we flush the cache each time we change to a different
- * user vmspace, we only need to flush the page if it is in the
- * current pmap.
- */
- if (curthread)
- pm = vmspace_pmap(curproc->p_vmspace);
- else
- pm = pmap_kernel();
-
- for (npv = pv; npv; npv = TAILQ_NEXT(npv, pv_list)) {
- if (npv->pv_pmap == pmap_kernel() || npv->pv_pmap == pm) {
- flags |= npv->pv_flags;
- /*
- * The page is mapped non-cacheable in
- * this map. No need to flush the cache.
- */
- if (npv->pv_flags & PVF_NC) {
-#ifdef DIAGNOSTIC
- if (cache_needs_cleaning)
- panic("pmap_clean_page: "
- "cache inconsistency");
-#endif
- break;
- } else if (is_src && (npv->pv_flags & PVF_WRITE) == 0)
- continue;
- if (cache_needs_cleaning) {
- page_to_clean = 0;
- break;
- } else {
- page_to_clean = npv->pv_va;
- pm_to_clean = npv->pv_pmap;
- }
- cache_needs_cleaning = 1;
- }
- }
- if (page_to_clean) {
- if (PV_BEEN_EXECD(flags))
- pmap_idcache_wbinv_range(pm_to_clean, page_to_clean,
- PAGE_SIZE);
- else
- pmap_dcache_wb_range(pm_to_clean, page_to_clean,
- PAGE_SIZE, !is_src, (flags & PVF_WRITE) == 0);
- } else if (cache_needs_cleaning) {
- if (PV_BEEN_EXECD(flags))
- pmap_idcache_wbinv_all(pm);
- else
- pmap_dcache_wbinv_all(pm);
- return (1);
- }
- return (0);
-}
-
-/*
- * pmap_copy_page copies the specified (machine independent)
- * page by mapping the page into virtual memory and using
- * bcopy to copy the page, one machine dependent page at a
- * time.
- */
-
-/*
- * pmap_copy_page()
- *
- * Copy one physical page into another, by mapping the pages into
- * hook points. The same comment regarding cachability as in
- * pmap_zero_page also applies here.
- */
-#if (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
-void
-pmap_copy_page_generic(vm_paddr_t src, vm_paddr_t dst)
-{
- struct vm_page *src_pg = PHYS_TO_VM_PAGE(src);
-#ifdef DEBUG
- struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst);
-
- if (dst_pg->md.pvh_list != NULL)
- panic("pmap_copy_page: dst page has mappings");
-#endif
-
-
- /*
- * Clean the source page. Hold the source page's lock for
- * the duration of the copy so that no other mappings can
- * be created while we have a potentially aliased mapping.
- */
-#if 0
- mtx_lock(&src_pg->md.pvh_mtx);
-#endif
- (void) pmap_clean_page(TAILQ_FIRST(&src_pg->md.pv_list), TRUE);
-
- /*
- * Map the pages into the page hook points, copy them, and purge
- * the cache for the appropriate page. Invalidate the TLB
- * as required.
- */
- *csrc_pte = L2_S_PROTO | src |
- L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | pte_l2_s_cache_mode;
- PTE_SYNC(csrc_pte);
- *cdst_pte = L2_S_PROTO | dst |
- L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) | pte_l2_s_cache_mode;
- PTE_SYNC(cdst_pte);
- cpu_tlb_flushD_SE(csrcp);
- cpu_tlb_flushD_SE(cdstp);
- cpu_cpwait();
- bcopy_page(csrcp, cdstp);
- cpu_dcache_inv_range(csrcp, PAGE_SIZE);
-#if 0
- mtx_lock(&src_pg->md.pvh_mtx);
-#endif
- cpu_dcache_wbinv_range(cdstp, PAGE_SIZE);
-}
-#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0 */
-
-#if ARM_MMU_XSCALE == 1
-void
-pmap_copy_page_xscale(vm_paddr_t src, vm_paddr_t dst)
-{
- struct vm_page *src_pg = PHYS_TO_VM_PAGE(src);
-#ifdef DEBUG
- struct vm_page *dst_pg = PHYS_TO_VM_PAGE(dst);
-
- if (dst_pg->md.pvh_list != NULL)
- panic("pmap_copy_page: dst page has mappings");
-#endif
-
-
- /*
- * Clean the source page. Hold the source page's lock for
- * the duration of the copy so that no other mappings can
- * be created while we have a potentially aliased mapping.
- */
- (void) pmap_clean_page(TAILQ_FIRST(&src_pg->md.pv_list), TRUE);
-
- /*
- * Map the pages into the page hook points, copy them, and purge
- * the cache for the appropriate page. Invalidate the TLB
- * as required.
- */
- *csrc_pte = L2_S_PROTO | src |
- L2_S_PROT(PTE_KERNEL, VM_PROT_READ) |
- L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */
- PTE_SYNC(csrc_pte);
- *cdst_pte = L2_S_PROTO | dst |
- L2_S_PROT(PTE_KERNEL, VM_PROT_WRITE) |
- L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); /* mini-data */
- PTE_SYNC(cdst_pte);
- cpu_tlb_flushD_SE(csrcp);
- cpu_tlb_flushD_SE(cdstp);
- cpu_cpwait();
- bcopy_page(csrcp, cdstp);
- xscale_cache_clean_minidata();
-}
-#endif /* ARM_MMU_XSCALE == 1 */
-
-void
-pmap_copy_page(vm_page_t src, vm_page_t dst)
-{
- cpu_dcache_wbinv_all();
- pmap_copy_page_func(VM_PAGE_TO_PHYS(src), VM_PAGE_TO_PHYS(dst));
-}
-
-
-
-
-/*
- * this routine returns true if a physical page resides
- * in the given pmap.
- */
-boolean_t
-pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
-{
- pv_entry_t pv;
- int loops = 0;
- int s;
-
- if (m->flags & PG_FICTITIOUS)
- return (FALSE);
-
- s = splvm();
-
- /*
- * Not found, check current mappings returning immediately
- */
- for (pv = TAILQ_FIRST(&m->md.pv_list);
- pv;
- pv = TAILQ_NEXT(pv, pv_list)) {
- if (pv->pv_pmap == pmap) {
- splx(s);
- return (TRUE);
- }
- loops++;
- if (loops >= 16)
- break;
- }
- splx(s);
- return (FALSE);
-}
-
-
-/*
- * pmap_ts_referenced:
- *
- * Return the count of reference bits for a page, clearing all of them.
- */
-int
-pmap_ts_referenced(vm_page_t m)
-{
- return (pmap_clearbit(m, PVF_REF));
-}
-
-
-boolean_t
-pmap_is_modified(vm_page_t m)
-{
-
- if (m->md.pvh_attrs & PVF_MOD)
- return (TRUE);
-
- return(FALSE);
-}
-
-
-/*
- * Clear the modify bits on the specified physical page.
- */
-void
-pmap_clear_modify(vm_page_t m)
-{
-
- if (m->md.pvh_attrs & PVF_MOD)
- pmap_clearbit(m, PVF_MOD);
-}
-
-
-/*
- * pmap_clear_reference:
- *
- * Clear the reference bit on the specified physical page.
- */
-void
-pmap_clear_reference(vm_page_t m)
-{
-
- if (m->md.pvh_attrs & PVF_REF)
- pmap_clearbit(m, PVF_REF);
-}
-
-
-/*
- * perform the pmap work for mincore
- */
-int
-pmap_mincore(pmap_t pmap, vm_offset_t addr)
-{
- printf("pmap_mincore()\n");
-
- return (0);
-}
-
-
-vm_offset_t
-pmap_addr_hint(vm_object_t obj, vm_offset_t addr, vm_size_t size)
-{
-
- return(addr);
-}
-
-
-/*
- * Map a set of physical memory pages into the kernel virtual
- * address space. Return a pointer to where it is mapped. This
- * routine is intended to be used for mapping device memory,
- * NOT real memory.
- */
-void *
-pmap_mapdev(vm_offset_t pa, vm_size_t size)
-{
- vm_offset_t va, tmpva, offset;
-
- offset = pa & PAGE_MASK;
- size = roundup(size, PAGE_SIZE);
-
- GIANT_REQUIRED;
-
- va = kmem_alloc_nofault(kernel_map, size);
- if (!va)
- panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
- for (tmpva = va; size > 0;) {
- pmap_kenter_internal(tmpva, pa, 0);
- size -= PAGE_SIZE;
- tmpva += PAGE_SIZE;
- pa += PAGE_SIZE;
- }
-
- return ((void *)(va));
-}
-
-#define BOOTSTRAP_DEBUG
-
-/*
- * pmap_map_section:
- *
- * Create a single section mapping.
- */
-void
-pmap_map_section(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa,
- int prot, int cache)
-{
- pd_entry_t *pde = (pd_entry_t *) l1pt;
- pd_entry_t fl;
-
- KASSERT(((va | pa) & L1_S_OFFSET) == 0, ("ouin2"));
-
- switch (cache) {
- case PTE_NOCACHE:
- default:
- fl = 0;
- break;
-
- case PTE_CACHE:
- fl = pte_l1_s_cache_mode;
- break;
-
- case PTE_PAGETABLE:
- fl = pte_l1_s_cache_mode_pt;
- break;
- }
-
- pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa |
- L1_S_PROT(PTE_KERNEL, prot) | fl | L1_S_DOM(PMAP_DOMAIN_KERNEL);
- PTE_SYNC(&pde[va >> L1_S_SHIFT]);
-
-}
-
-/*
- * pmap_link_l2pt:
- *
- * Link the L2 page table specified by "pa" into the L1
- * page table at the slot for "va".
- */
-void
-pmap_link_l2pt(vm_offset_t l1pt, vm_offset_t va, struct pv_addr *l2pv)
-{
- pd_entry_t *pde = (pd_entry_t *) l1pt, proto;
- u_int slot = va >> L1_S_SHIFT;
-
-#ifndef ARM32_NEW_VM_LAYOUT
- KASSERT((va & ((L1_S_SIZE * 4) - 1)) == 0, ("blah"));
- KASSERT((l2pv->pv_pa & PAGE_MASK) == 0, ("ouin"));
-#endif
-
- proto = L1_S_DOM(PMAP_DOMAIN_KERNEL) | L1_C_PROTO;
-
- pde[slot + 0] = proto | (l2pv->pv_pa + 0x000);
-#ifdef ARM32_NEW_VM_LAYOUT
- PTE_SYNC(&pde[slot]);
-#else
- pde[slot + 1] = proto | (l2pv->pv_pa + 0x400);
- pde[slot + 2] = proto | (l2pv->pv_pa + 0x800);
- pde[slot + 3] = proto | (l2pv->pv_pa + 0xc00);
- PTE_SYNC_RANGE(&pde[slot + 0], 4);
-#endif
-
- SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list);
-
-
-}
-
-/*
- * pmap_map_entry
- *
- * Create a single page mapping.
- */
-void
-pmap_map_entry(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa, int prot,
- int cache)
-{
- pd_entry_t *pde = (pd_entry_t *) l1pt;
- pt_entry_t fl;
- pt_entry_t *pte;
-
- KASSERT(((va | pa) & PAGE_MASK) == 0, ("ouin"));
-
- switch (cache) {
- case PTE_NOCACHE:
- default:
- fl = 0;
- break;
-
- case PTE_CACHE:
- fl = pte_l2_s_cache_mode;
- break;
-
- case PTE_PAGETABLE:
- fl = pte_l2_s_cache_mode_pt;
- break;
- }
-
- if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C)
- panic("pmap_map_entry: no L2 table for VA 0x%08x", va);
-
-#ifndef ARM32_NEW_VM_LAYOUT
- pte = (pt_entry_t *)
- kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME);
-#else
- pte = (pt_entry_t *) kernel_pt_lookup(pde[L1_IDX(va)] & L1_C_ADDR_MASK);
-#endif
-
- if (pte == NULL)
- panic("pmap_map_entry: can't find L2 table for VA 0x%08x", va);
-
-#ifndef ARM32_NEW_VM_LAYOUT
- pte[(va >> PAGE_SHIFT) & 0x3ff] =
- L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot) | fl;
- PTE_SYNC(&pte[(va >> PAGE_SHIFT) & 0x3ff]);
-#else
- pte[l2pte_index(va)] =
- L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot) | fl;
- PTE_SYNC(&pte[l2pte_index(va)]);
-#endif
-}
-
-/*
- * pmap_map_chunk:
- *
- * Map a chunk of memory using the most efficient mappings
- * possible (section. large page, small page) into the
- * provided L1 and L2 tables at the specified virtual address.
- */
-vm_size_t
-pmap_map_chunk(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa,
- vm_size_t size, int prot, int cache)
-{
- pd_entry_t *pde = (pd_entry_t *) l1pt;
- pt_entry_t *pte, f1, f2s, f2l;
- vm_size_t resid;
- int i;
-
- resid = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
-
- if (l1pt == 0)
- panic("pmap_map_chunk: no L1 table provided");
-
-#ifdef VERBOSE_INIT_ARM
- printf("pmap_map_chunk: pa=0x%lx va=0x%lx size=0x%lx resid=0x%lx "
- "prot=0x%x cache=%d\n", pa, va, size, resid, prot, cache);
-#endif
-
- switch (cache) {
- case PTE_NOCACHE:
- default:
- f1 = 0;
- f2l = 0;
- f2s = 0;
- break;
-
- case PTE_CACHE:
- f1 = pte_l1_s_cache_mode;
- f2l = pte_l2_l_cache_mode;
- f2s = pte_l2_s_cache_mode;
- break;
-
- case PTE_PAGETABLE:
- f1 = pte_l1_s_cache_mode_pt;
- f2l = pte_l2_l_cache_mode_pt;
- f2s = pte_l2_s_cache_mode_pt;
- break;
- }
-
- size = resid;
-
- while (resid > 0) {
- /* See if we can use a section mapping. */
- if (L1_S_MAPPABLE_P(va, pa, resid)) {
-#ifdef VERBOSE_INIT_ARM
- printf("S");
-#endif
- pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa |
- L1_S_PROT(PTE_KERNEL, prot) | f1 |
- L1_S_DOM(PMAP_DOMAIN_KERNEL);
- PTE_SYNC(&pde[va >> L1_S_SHIFT]);
- va += L1_S_SIZE;
- pa += L1_S_SIZE;
- resid -= L1_S_SIZE;
- continue;
- }
-
- /*
- * Ok, we're going to use an L2 table. Make sure
- * one is actually in the corresponding L1 slot
- * for the current VA.
- */
- if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C)
- panic("pmap_map_chunk: no L2 table for VA 0x%08x", va);
-
-#ifndef ARM32_NEW_VM_LAYOUT
- pte = (pt_entry_t *)
- kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME);
-#else
- pte = (pt_entry_t *) kernel_pt_lookup(
- pde[L1_IDX(va)] & L1_C_ADDR_MASK);
-#endif
- if (pte == NULL)
- panic("pmap_map_chunk: can't find L2 table for VA"
- "0x%08x", va);
- /* See if we can use a L2 large page mapping. */
- if (L2_L_MAPPABLE_P(va, pa, resid)) {
-#ifdef VERBOSE_INIT_ARM
- printf("L");
-#endif
- for (i = 0; i < 16; i++) {
-#ifndef ARM32_NEW_VM_LAYOUT
- pte[((va >> PAGE_SHIFT) & 0x3f0) + i] =
- L2_L_PROTO | pa |
- L2_L_PROT(PTE_KERNEL, prot) | f2l;
- PTE_SYNC(&pte[((va >> PAGE_SHIFT) & 0x3f0) + i]);
-#else
- pte[l2pte_index(va) + i] =
- L2_L_PROTO | pa |
- L2_L_PROT(PTE_KERNEL, prot) | f2l;
- PTE_SYNC(&pte[l2pte_index(va) + i]);
-#endif
- }
- va += L2_L_SIZE;
- pa += L2_L_SIZE;
- resid -= L2_L_SIZE;
- continue;
- }
-
- /* Use a small page mapping. */
-#ifdef VERBOSE_INIT_ARM
- printf("P");
-#endif
-#ifndef ARM32_NEW_VM_LAYOUT
- pte[(va >> PAGE_SHIFT) & 0x3ff] =
- L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot) | f2s;
- PTE_SYNC(&pte[(va >> PAGE_SHIFT) & 0x3ff]);
-#else
- pte[l2pte_index(va)] =
- L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, prot) | f2s;
- PTE_SYNC(&pte[l2pte_index(va)]);
-#endif
- va += PAGE_SIZE;
- pa += PAGE_SIZE;
- resid -= PAGE_SIZE;
- }
-#ifdef VERBOSE_INIT_ARM
- printf("\n");
-#endif
- return (size);
-
-}
-
-/********************** Static device map routines ***************************/
-
-static const struct pmap_devmap *pmap_devmap_table;
-
-/*
- * Register the devmap table. This is provided in case early console
- * initialization needs to register mappings created by bootstrap code
- * before pmap_devmap_bootstrap() is called.
- */
-void
-pmap_devmap_register(const struct pmap_devmap *table)
-{
-
- pmap_devmap_table = table;
-}
-
-/*
- * Map all of the static regions in the devmap table, and remember
- * the devmap table so other parts of the kernel can look up entries
- * later.
- */
-void
-pmap_devmap_bootstrap(vm_offset_t l1pt, const struct pmap_devmap *table)
-{
- int i;
-
- pmap_devmap_table = table;
-
- for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
-#ifdef VERBOSE_INIT_ARM
- printf("devmap: %08lx -> %08lx @ %08lx\n",
- pmap_devmap_table[i].pd_pa,
- pmap_devmap_table[i].pd_pa +
- pmap_devmap_table[i].pd_size - 1,
- pmap_devmap_table[i].pd_va);
-#endif
- pmap_map_chunk(l1pt, pmap_devmap_table[i].pd_va,
- pmap_devmap_table[i].pd_pa,
- pmap_devmap_table[i].pd_size,
- pmap_devmap_table[i].pd_prot,
- pmap_devmap_table[i].pd_cache);
- }
-}
-
-const struct pmap_devmap *
-pmap_devmap_find_pa(vm_paddr_t pa, vm_size_t size)
-{
- int i;
-
- if (pmap_devmap_table == NULL)
- return (NULL);
-
- for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
- if (pa >= pmap_devmap_table[i].pd_pa &&
- pa + size <= pmap_devmap_table[i].pd_pa +
- pmap_devmap_table[i].pd_size)
- return (&pmap_devmap_table[i]);
- }
-
- return (NULL);
-}
-
-const struct pmap_devmap *
-pmap_devmap_find_va(vm_offset_t va, vm_size_t size)
-{
- int i;
-
- if (pmap_devmap_table == NULL)
- return (NULL);
-
- for (i = 0; pmap_devmap_table[i].pd_size != 0; i++) {
- if (va >= pmap_devmap_table[i].pd_va &&
- va + size <= pmap_devmap_table[i].pd_va +
- pmap_devmap_table[i].pd_size)
- return (&pmap_devmap_table[i]);
- }
-
- return (NULL);
-}
-
--- sys/arm/arm/machdep.c
+++ /dev/null
@@ -1,584 +0,0 @@
-/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
-
-/*-
- * Copyright (c) 2004 Olivier Houchard
- * Copyright (c) 1994-1998 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Machine dependant functions for kernel setup
- *
- * Created : 17/09/94
- * Updated : 18/04/01 updated for new wscons
- */
-
-#include "opt_compat.h"
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/machdep.c,v 1.16.2.1 2006/03/07 18:08:08 jhb Exp $");
-
-#include <sys/param.h>
-#include <sys/proc.h>
-#include <sys/systm.h>
-#include <sys/bio.h>
-#include <sys/buf.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <sys/cpu.h>
-#include <sys/exec.h>
-#include <sys/imgact.h>
-#include <sys/kernel.h>
-#include <sys/linker.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/pcpu.h>
-#include <sys/ptrace.h>
-#include <sys/signalvar.h>
-#include <sys/sysent.h>
-#include <sys/sysproto.h>
-#include <sys/uio.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_map.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_pager.h>
-#include <vm/vnode_pager.h>
-
-#include <machine/armreg.h>
-#include <machine/cpu.h>
-#include <machine/machdep.h>
-#include <machine/md_var.h>
-#include <machine/metadata.h>
-#include <machine/pcb.h>
-#include <machine/pmap.h>
-#include <machine/reg.h>
-#include <machine/trap.h>
-#include <machine/undefined.h>
-#include <machine/vmparam.h>
-#include <machine/sysarch.h>
-
-uint32_t cpu_reset_address = 0;
-int cold = 1;
-vm_offset_t vector_page;
-
-long realmem = 0;
-
-void
-sendsig(catcher, sig, mask, code)
- sig_t catcher;
- int sig;
- sigset_t *mask;
- u_long code;
-{
- struct thread *td = curthread;
- struct proc *p = td->td_proc;
- struct trapframe *tf = td->td_frame;
- struct sigframe *fp, frame;
- struct sigacts *psp = td->td_proc->p_sigacts;
- int onstack;
-
- onstack = sigonstack(td->td_frame->tf_usr_sp);
-
- if ((td->td_flags & TDP_ALTSTACK) &&
- !(onstack) &&
- SIGISMEMBER(td->td_proc->p_sigacts->ps_sigonstack, sig)) {
- fp = (void*)(td->td_sigstk.ss_sp + td->td_sigstk.ss_size);
- td->td_sigstk.ss_flags |= SS_ONSTACK;
- } else
- fp = (void*)td->td_frame->tf_usr_sp;
-
- /* make room on the stack */
- fp--;
-
- /* make the stack aligned */
- fp = (struct sigframe *)STACKALIGN(fp);
- /* Populate the siginfo frame. */
- frame.sf_si.si_signo = sig;
- frame.sf_si.si_code = code;
- frame.sf_uc.uc_sigmask = *mask;
- frame.sf_uc.uc_link = NULL;
- frame.sf_uc.uc_flags = (td->td_pflags & TDP_ALTSTACK )
- ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
- frame.sf_uc.uc_stack = td->td_sigstk;
- memset(&frame.sf_uc.uc_stack, 0, sizeof(frame.sf_uc.uc_stack));
- get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
- PROC_UNLOCK(td->td_proc);
- mtx_unlock(&psp->ps_mtx);
- if (copyout(&frame, (void*)fp, sizeof(frame)) != 0)
- sigexit(td, SIGILL);
- /*
- * Build context to run handler in. We invoke the handler
- * directly, only returning via the trampoline. Note the
- * trampoline version numbers are coordinated with machine-
- * dependent code in libc.
- */
-
- tf->tf_r0 = sig;
- tf->tf_r1 = (int)&fp->sf_si;
- tf->tf_r2 = (int)&fp->sf_uc;
-
- /* the trampoline uses r5 as the uc address */
- tf->tf_r5 = (int)&fp->sf_uc;
- tf->tf_pc = (int)catcher;
- tf->tf_usr_sp = (int)fp;
- tf->tf_usr_lr = (int)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
- PROC_LOCK(td->td_proc);
- mtx_lock(&psp->ps_mtx);
-}
-
-struct kva_md_info kmi;
-
-/*
- * arm32_vector_init:
- *
- * Initialize the vector page, and select whether or not to
- * relocate the vectors.
- *
- * NOTE: We expect the vector page to be mapped at its expected
- * destination.
- */
-
-extern unsigned int page0[], page0_data[];
-void
-arm_vector_init(vm_offset_t va, int which)
-{
- unsigned int *vectors = (int *) va;
- unsigned int *vectors_data = vectors + (page0_data - page0);
- int vec;
-
- /*
- * Loop through the vectors we're taking over, and copy the
- * vector's insn and data word.
- */
- for (vec = 0; vec < ARM_NVEC; vec++) {
- if ((which & (1 << vec)) == 0) {
- /* Don't want to take over this vector. */
- continue;
- }
- vectors[vec] = page0[vec];
- vectors_data[vec] = page0_data[vec];
- }
-
- /* Now sync the vectors. */
- cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
-
- vector_page = va;
-
- if (va == ARM_VECTORS_HIGH) {
- /*
- * Assume the MD caller knows what it's doing here, and
- * really does want the vector page relocated.
- *
- * Note: This has to be done here (and not just in
- * cpu_setup()) because the vector page needs to be
- * accessible *before* cpu_startup() is called.
- * Think ddb(9) ...
- *
- * NOTE: If the CPU control register is not readable,
- * this will totally fail! We'll just assume that
- * any system that has high vector support has a
- * readable CPU control register, for now. If we
- * ever encounter one that does not, we'll have to
- * rethink this.
- */
- cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
- }
-}
-
-static void
-cpu_startup(void *dummy)
-{
- struct pcb *pcb = thread0.td_pcb;
-#ifndef ARM_CACHE_LOCK_ENABLE
- vm_page_t m;
-#endif
-
- vm_ksubmap_init(&kmi);
- bufinit();
- vm_pager_bufferinit();
- pcb->un_32.pcb32_und_sp = (u_int)thread0.td_kstack +
- USPACE_UNDEF_STACK_TOP;
- pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack +
- USPACE_SVC_STACK_TOP;
- vector_page_setprot(VM_PROT_READ);
- pmap_set_pcb_pagedir(pmap_kernel(), pcb);
- cpu_setup("");
- identify_arm_cpu();
- thread0.td_frame = (struct trapframe *)pcb->un_32.pcb32_sp - 1;
-#ifdef ARM_CACHE_LOCK_ENABLE
- pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
- arm_lock_cache_line(ARM_TP_ADDRESS);
-#else
- m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
- pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
-#endif
- realmem = physmem;
-
-}
-
-SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
-
-/* Get current clock frequency for the given cpu id. */
-int
-cpu_est_clockrate(int cpu_id, uint64_t *rate)
-{
-
- return (ENXIO);
-}
-
-void
-cpu_idle(void)
-{
- cpu_sleep(0);
-}
-
-int
-fill_regs(struct thread *td, struct reg *regs)
-{
- struct trapframe *tf = td->td_frame;
- bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
- regs->r_sp = tf->tf_usr_sp;
- regs->r_lr = tf->tf_usr_lr;
- regs->r_pc = tf->tf_pc;
- regs->r_cpsr = tf->tf_spsr;
- return (0);
-}
-int
-fill_fpregs(struct thread *td, struct fpreg *regs)
-{
- bzero(regs, sizeof(*regs));
- return (0);
-}
-
-int
-set_regs(struct thread *td, struct reg *regs)
-{
- struct trapframe *tf = td->td_frame;
-
- bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
- tf->tf_usr_sp = regs->r_sp;
- tf->tf_usr_lr = regs->r_lr;
- tf->tf_pc = regs->r_pc;
- tf->tf_spsr &= ~PSR_FLAGS;
- tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
- return (0);
-}
-
-int
-set_fpregs(struct thread *td, struct fpreg *regs)
-{
- return (0);
-}
-
-int
-fill_dbregs(struct thread *td, struct dbreg *regs)
-{
- return (0);
-}
-int
-set_dbregs(struct thread *td, struct dbreg *regs)
-{
- return (0);
-}
-
-
-static int
-ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v)
-{
- struct iovec iov;
- struct uio uio;
-
- PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
- iov.iov_base = (caddr_t) v;
- iov.iov_len = sizeof(u_int32_t);
- uio.uio_iov = &iov;
- uio.uio_iovcnt = 1;
- uio.uio_offset = (off_t)addr;
- uio.uio_resid = sizeof(u_int32_t);
- uio.uio_segflg = UIO_SYSSPACE;
- uio.uio_rw = UIO_READ;
- uio.uio_td = td;
- return proc_rwmem(td->td_proc, &uio);
-}
-
-static int
-ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v)
-{
- struct iovec iov;
- struct uio uio;
-
- PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
- iov.iov_base = (caddr_t) &v;
- iov.iov_len = sizeof(u_int32_t);
- uio.uio_iov = &iov;
- uio.uio_iovcnt = 1;
- uio.uio_offset = (off_t)addr;
- uio.uio_resid = sizeof(u_int32_t);
- uio.uio_segflg = UIO_SYSSPACE;
- uio.uio_rw = UIO_WRITE;
- uio.uio_td = td;
- return proc_rwmem(td->td_proc, &uio);
-}
-
-int
-ptrace_single_step(struct thread *td)
-{
- struct proc *p;
- int error;
-
- KASSERT(td->td_md.md_ptrace_instr == 0,
- ("Didn't clear single step"));
- p = td->td_proc;
- PROC_UNLOCK(p);
- error = ptrace_read_int(td, td->td_frame->tf_pc + 4,
- &td->td_md.md_ptrace_instr);
- if (error)
- goto out;
- error = ptrace_write_int(td, td->td_frame->tf_pc + 4,
- PTRACE_BREAKPOINT);
- if (error)
- td->td_md.md_ptrace_instr = 0;
- td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4;
-out:
- PROC_LOCK(p);
- return (error);
-}
-
-int
-ptrace_clear_single_step(struct thread *td)
-{
- struct proc *p;
-
- if (td->td_md.md_ptrace_instr) {
- p = td->td_proc;
- PROC_UNLOCK(p);
- ptrace_write_int(td, td->td_md.md_ptrace_addr,
- td->td_md.md_ptrace_instr);
- PROC_LOCK(p);
- td->td_md.md_ptrace_instr = 0;
- }
- return (0);
-}
-
-int
-ptrace_set_pc(struct thread *td, unsigned long addr)
-{
- td->td_frame->tf_pc = addr;
- return (0);
-}
-
-void
-cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
-{
-}
-
-void
-spinlock_enter(void)
-{
- struct thread *td;
-
- td = curthread;
- if (td->td_md.md_spinlock_count == 0)
- td->td_md.md_saved_cspr = disable_interrupts(I32_bit | F32_bit);
- td->td_md.md_spinlock_count++;
- critical_enter();
-}
-
-void
-spinlock_exit(void)
-{
- struct thread *td;
-
- td = curthread;
- critical_exit();
- td->td_md.md_spinlock_count--;
- if (td->td_md.md_spinlock_count == 0)
- restore_interrupts(td->td_md.md_saved_cspr);
-}
-
-/*
- * Clear registers on exec
- */
-void
-exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings)
-{
- struct trapframe *tf = td->td_frame;
-
- memset(tf, 0, sizeof(*tf));
- tf->tf_usr_sp = stack;
- tf->tf_usr_lr = entry;
- tf->tf_svc_lr = 0x77777777;
- tf->tf_pc = entry;
- tf->tf_spsr = PSR_USR32_MODE;
-}
-
-/*
- * Build siginfo_t for SA thread
- */
-void
-cpu_thread_siginfo(int sig, u_long code, siginfo_t *si)
-{
- bzero(si, sizeof(*si));
- si->si_signo = sig;
- si->si_code = code;
-}
-
-/*
- * Get machine context.
- */
-int
-get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
-{
- struct trapframe *tf = td->td_frame;
- __greg_t *gr = mcp->__gregs;
-
- if (clear_ret & GET_MC_CLEAR_RET)
- gr[_REG_R0] = 0;
- else
- gr[_REG_R0] = tf->tf_r0;
- gr[_REG_R1] = tf->tf_r1;
- gr[_REG_R2] = tf->tf_r2;
- gr[_REG_R3] = tf->tf_r3;
- gr[_REG_R4] = tf->tf_r4;
- gr[_REG_R5] = tf->tf_r5;
- gr[_REG_R6] = tf->tf_r6;
- gr[_REG_R7] = tf->tf_r7;
- gr[_REG_R8] = tf->tf_r8;
- gr[_REG_R9] = tf->tf_r9;
- gr[_REG_R10] = tf->tf_r10;
- gr[_REG_R11] = tf->tf_r11;
- gr[_REG_R12] = tf->tf_r12;
- gr[_REG_SP] = tf->tf_usr_sp;
- gr[_REG_LR] = tf->tf_usr_lr;
- gr[_REG_PC] = tf->tf_pc;
- gr[_REG_CPSR] = tf->tf_spsr;
-
- return (0);
-}
-
-/*
- * Set machine context.
- *
- * However, we don't set any but the user modifiable flags, and we won't
- * touch the cs selector.
- */
-int
-set_mcontext(struct thread *td, const mcontext_t *mcp)
-{
- struct trapframe *tf = td->td_frame;
- __greg_t *gr = mcp->__gregs;
-
- tf->tf_r0 = gr[_REG_R0];
- tf->tf_r1 = gr[_REG_R1];
- tf->tf_r2 = gr[_REG_R2];
- tf->tf_r3 = gr[_REG_R3];
- tf->tf_r4 = gr[_REG_R4];
- tf->tf_r5 = gr[_REG_R5];
- tf->tf_r6 = gr[_REG_R6];
- tf->tf_r7 = gr[_REG_R7];
- tf->tf_r8 = gr[_REG_R8];
- tf->tf_r9 = gr[_REG_R9];
- tf->tf_r10 = gr[_REG_R10];
- tf->tf_r11 = gr[_REG_R11];
- tf->tf_r12 = gr[_REG_R12];
- tf->tf_usr_sp = gr[_REG_SP];
- tf->tf_usr_lr = gr[_REG_LR];
- tf->tf_pc = gr[_REG_PC];
- tf->tf_spsr = gr[_REG_CPSR];
-
- return (0);
-}
-
-/*
- * MPSAFE
- */
-int
-sigreturn(td, uap)
- struct thread *td;
- struct sigreturn_args /* {
- const __ucontext *sigcntxp;
- } */ *uap;
-{
- struct proc *p = td->td_proc;
- struct sigframe sf;
- struct trapframe *tf;
- int spsr;
-
- if (uap == NULL)
- return (EFAULT);
- if (copyin(uap->sigcntxp, &sf, sizeof(sf)))
- return (EFAULT);
- /*
- * Make sure the processor mode has not been tampered with and
- * interrupts have not been disabled.
- */
- spsr = sf.sf_uc.uc_mcontext.__gregs[_REG_CPSR];
- if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
- (spsr & (I32_bit | F32_bit)) != 0)
- return (EINVAL);
- /* Restore register context. */
- tf = td->td_frame;
- set_mcontext(td, &sf.sf_uc.uc_mcontext);
-
- /* Restore signal mask. */
- PROC_LOCK(p);
- td->td_sigmask = sf.sf_uc.uc_sigmask;
- SIG_CANTMASK(td->td_sigmask);
- signotify(td);
- PROC_UNLOCK(p);
-
- return (EJUSTRETURN);
-}
-
-
-/*
- * Construct a PCB from a trapframe. This is called from kdb_trap() where
- * we want to start a backtrace from the function that caused us to enter
- * the debugger. We have the context in the trapframe, but base the trace
- * on the PCB. The PCB doesn't have to be perfect, as long as it contains
- * enough for a backtrace.
- */
-void
-makectx(struct trapframe *tf, struct pcb *pcb)
-{
- pcb->un_32.pcb32_r8 = tf->tf_r8;
- pcb->un_32.pcb32_r9 = tf->tf_r9;
- pcb->un_32.pcb32_r10 = tf->tf_r10;
- pcb->un_32.pcb32_r11 = tf->tf_r11;
- pcb->un_32.pcb32_r12 = tf->tf_r12;
- pcb->un_32.pcb32_pc = tf->tf_pc;
- pcb->un_32.pcb32_lr = tf->tf_usr_lr;
- pcb->un_32.pcb32_sp = tf->tf_usr_sp;
-}
--- sys/arm/arm/cpufunc_asm.S
+++ /dev/null
@@ -1,178 +0,0 @@
-/* $NetBSD: cpufunc_asm.S,v 1.12 2003/09/06 09:14:52 rearnsha Exp $ */
-
-/*-
- * Copyright (c) 1997,1998 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Causality Limited.
- * 4. The name of Causality Limited may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * cpufunc.S
- *
- * Assembly functions for CPU / MMU / TLB specific operations
- *
- * Created : 30/01/97
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm.S,v 1.6 2005/02/26 18:59:01 cognet Exp $");
-
- .text
- .align 0
-
-ENTRY(cpufunc_nullop)
- RET
-
-/*
- * Generic functions to read the internal coprocessor registers
- *
- * Currently these registers are :
- * c0 - CPU ID
- * c5 - Fault status
- * c6 - Fault address
- *
- */
-
-ENTRY(cpufunc_id)
- mrc p15, 0, r0, c0, c0, 0
- RET
-
-ENTRY(cpu_get_control)
- mrc p15, 0, r0, c1, c0, 0
- RET
-
-ENTRY(cpu_read_cache_config)
- mrc p15, 0, r0, c0, c0, 1
- RET
-
-ENTRY(cpufunc_faultstatus)
- mrc p15, 0, r0, c5, c0, 0
- RET
-
-ENTRY(cpufunc_faultaddress)
- mrc p15, 0, r0, c6, c0, 0
- RET
-
-
-/*
- * Generic functions to write the internal coprocessor registers
- *
- *
- * Currently these registers are
- * c1 - CPU Control
- * c3 - Domain Access Control
- *
- * All other registers are CPU architecture specific
- */
-
-#if 0 /* See below. */
-ENTRY(cpufunc_control)
- mcr p15, 0, r0, c1, c0, 0
- RET
-#endif
-
-ENTRY(cpufunc_domains)
- mcr p15, 0, r0, c3, c0, 0
- RET
-
-/*
- * Generic functions to read/modify/write the internal coprocessor registers
- *
- *
- * Currently these registers are
- * c1 - CPU Control
- *
- * All other registers are CPU architecture specific
- */
-
-ENTRY(cpufunc_control)
- mrc p15, 0, r3, c1, c0, 0 /* Read the control register */
- bic r2, r3, r0 /* Clear bits */
- eor r2, r2, r1 /* XOR bits */
-
-
- teq r2, r3 /* Only write if there is a change */
- mcrne p15, 0, r2, c1, c0, 0 /* Write new control register */
- mov r0, r3 /* Return old value */
-
- RET
-.Lglou:
- .asciz "plop %p\n"
- .align 0
-/*
- * other potentially useful software functions are:
- * clean D cache entry and flush I cache entry
- * for the moment use cache_purgeID_E
- */
-
-/* Random odd functions */
-
-/*
- * Function to get the offset of a stored program counter from the
- * instruction doing the store. This offset is defined to be the same
- * for all STRs and STMs on a given implementation. Code based on
- * section 2.4.3 of the ARM ARM (2nd Ed.), with modifications to work
- * in 26-bit modes as well.
- */
-ENTRY(get_pc_str_offset)
- mov ip, sp
- stmfd sp!, {fp, ip, lr, pc}
- sub fp, ip, #4
- sub sp, sp, #4
- mov r1, pc /* R1 = addr of following STR */
- mov r0, r0
- str pc, [sp] /* [SP] = . + offset */
- ldr r0, [sp]
- sub r0, r0, r1
- ldmdb fp, {fp, sp, pc}
-
-/* Allocate and lock a cacheline for the specified address. */
-
-#define CPWAIT_BRANCH \
- sub pc, pc, #4
-#define CPWAIT() \
- mrc p15, 0, r2, c2, c0, 0; \
- mov r2, r2; \
- CPWAIT_BRANCH
-
-ENTRY(arm_lock_cache_line)
- mcr p15, 0, r0, c7, c10, 4 /* Drain write buffer */
- mov r1, #1
- mcr p15, 0, r1, c9, c2, 0 /* Enable data cache lock mode */
- CPWAIT()
- mcr p15, 0, r0, c7, c2, 5 /* Allocate the cache line */
- mcr p15, 0, r0, c7, c10, 4 /* Drain write buffer */
- mov r1, #0
- str r1, [r0]
- mcr p15, 0, r0, c7, c10, 4 /* Drain write buffer */
- mcr p15, 0, r1, c9, c2, 0 /* Disable data cache lock mode */
- CPWAIT()
- RET
--- sys/arm/arm/cpufunc_asm_arm10.S
+++ /dev/null
@@ -1,269 +0,0 @@
-/* $NetBSD: cpufunc_asm_arm10.S,v 1.1 2003/09/06 09:12:29 rearnsha Exp $ */
-
-/*-
- * Copyright (c) 2002 ARM Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the company may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * ARM10 assembly functions for CPU / MMU / TLB specific operations
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_arm10.S,v 1.2 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * Functions to set the MMU Translation Table Base register
- *
- * We need to clean and flush the cache as it uses virtual
- * addresses that are about to change.
- */
-ENTRY(arm10_setttb)
- stmfd sp!, {r0, lr}
- bl _C_LABEL(arm10_idcache_wbinv_all)
- ldmfd sp!, {r0, lr}
-
- mcr p15, 0, r0, c2, c0, 0 /* load new TTB */
-
- mcr p15, 0, r0, c8, c7, 0 /* invalidate I+D TLBs */
- bx lr
-
-/*
- * TLB functions
- */
-ENTRY(arm10_tlb_flushID_SE)
- mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */
- mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
- bx lr
-
-ENTRY(arm10_tlb_flushI_SE)
- mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
- bx lr
-
-
-/*
- * Cache operations. For the entire cache we use the set/index
- * operations.
- */
- s_max .req r0
- i_max .req r1
- s_inc .req r2
- i_inc .req r3
-
-ENTRY_NP(arm10_icache_sync_range)
- ldr ip, .Larm10_line_size
- cmp r1, #0x4000
- bcs .Larm10_icache_sync_all
- ldr ip, [ip]
- sub r3, ip, #1
- and r2, r0, r3
- add r1, r1, r2
- bic r0, r0, r3
-.Larm10_sync_next:
- mcr p15, 0, r0, c7, c5, 1 /* Invalidate I cache SE with VA */
- mcr p15, 0, r0, c7, c10, 1 /* Clean D cache SE with VA */
- add r0, r0, ip
- subs r1, r1, ip
- bpl .Larm10_sync_next
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- bx lr
-
-ENTRY_NP(arm10_icache_sync_all)
-.Larm10_icache_sync_all:
- /*
- * We assume that the code here can never be out of sync with the
- * dcache, so that we can safely flush the Icache and fall through
- * into the Dcache cleaning code.
- */
- mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */
- /* Fall through to clean Dcache. */
-
-.Larm10_dcache_wb:
- ldr ip, .Larm10_cache_data
- ldmia ip, {s_max, i_max, s_inc, i_inc}
-.Lnext_set:
- orr ip, s_max, i_max
-.Lnext_index:
- mcr p15, 0, ip, c7, c10, 2 /* Clean D cache SE with Set/Index */
- sub ip, ip, i_inc
- tst ip, i_max /* Index 0 is last one */
- bne .Lnext_index /* Next index */
- mcr p15, 0, ip, c7, c10, 2 /* Clean D cache SE with Set/Index */
- subs s_max, s_max, s_inc
- bpl .Lnext_set /* Next set */
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- bx lr
-
-.Larm10_line_size:
- .word _C_LABEL(arm_pdcache_line_size)
-
-ENTRY(arm10_dcache_wb_range)
- ldr ip, .Larm10_line_size
- cmp r1, #0x4000
- bcs .Larm10_dcache_wb
- ldr ip, [ip]
- sub r3, ip, #1
- and r2, r0, r3
- add r1, r1, r2
- bic r0, r0, r3
-.Larm10_wb_next:
- mcr p15, 0, r0, c7, c10, 1 /* Clean D cache SE with VA */
- add r0, r0, ip
- subs r1, r1, ip
- bpl .Larm10_wb_next
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- bx lr
-
-ENTRY(arm10_dcache_wbinv_range)
- ldr ip, .Larm10_line_size
- cmp r1, #0x4000
- bcs .Larm10_dcache_wbinv_all
- ldr ip, [ip]
- sub r3, ip, #1
- and r2, r0, r3
- add r1, r1, r2
- bic r0, r0, r3
-.Larm10_wbinv_next:
- mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
- add r0, r0, ip
- subs r1, r1, ip
- bpl .Larm10_wbinv_next
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- bx lr
-
-/*
- * Note, we must not invalidate everything. If the range is too big we
- * must use wb-inv of the entire cache.
- */
-ENTRY(arm10_dcache_inv_range)
- ldr ip, .Larm10_line_size
- cmp r1, #0x4000
- bcs .Larm10_dcache_wbinv_all
- ldr ip, [ip]
- sub r3, ip, #1
- and r2, r0, r3
- add r1, r1, r2
- bic r0, r0, r3
-.Larm10_inv_next:
- mcr p15, 0, r0, c7, c6, 1 /* Invalidate D cache SE with VA */
- add r0, r0, ip
- subs r1, r1, ip
- bpl .Larm10_inv_next
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- bx lr
-
-ENTRY(arm10_idcache_wbinv_range)
- ldr ip, .Larm10_line_size
- cmp r1, #0x4000
- bcs .Larm10_idcache_wbinv_all
- ldr ip, [ip]
- sub r3, ip, #1
- and r2, r0, r3
- add r1, r1, r2
- bic r0, r0, r3
-.Larm10_id_wbinv_next:
- mcr p15, 0, r0, c7, c5, 1 /* Invalidate I cache SE with VA */
- mcr p15, 0, r0, c7, c14, 1 /* Purge D cache SE with VA */
- add r0, r0, ip
- subs r1, r1, ip
- bpl .Larm10_id_wbinv_next
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- bx lr
-
-ENTRY_NP(arm10_idcache_wbinv_all)
-.Larm10_idcache_wbinv_all:
- /*
- * We assume that the code here can never be out of sync with the
- * dcache, so that we can safely flush the Icache and fall through
- * into the Dcache purging code.
- */
- mcr p15, 0, r0, c7, c5, 0 /* Flush I cache */
- /* Fall through to purge Dcache. */
-
-ENTRY(arm10_dcache_wbinv_all)
-.Larm10_dcache_wbinv_all:
- ldr ip, .Larm10_cache_data
- ldmia ip, {s_max, i_max, s_inc, i_inc}
-.Lnext_set_inv:
- orr ip, s_max, i_max
-.Lnext_index_inv:
- mcr p15, 0, ip, c7, c14, 2 /* Purge D cache SE with Set/Index */
- sub ip, ip, i_inc
- tst ip, i_max /* Index 0 is last one */
- bne .Lnext_index_inv /* Next index */
- mcr p15, 0, ip, c7, c14, 2 /* Purge D cache SE with Set/Index */
- subs s_max, s_max, s_inc
- bpl .Lnext_set_inv /* Next set */
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- bx lr
-
-.Larm10_cache_data:
- .word _C_LABEL(arm10_dcache_sets_max)
-
-/*
- * Context switch.
- *
- * These is the CPU-specific parts of the context switcher cpu_switch()
- * These functions actually perform the TTB reload.
- *
- * NOTE: Special calling convention
- * r1, r4-r13 must be preserved
- */
-ENTRY(arm10_context_switch)
- /*
- * We can assume that the caches will only contain kernel addresses
- * at this point. So no need to flush them again.
- */
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- mcr p15, 0, r0, c2, c0, 0 /* set the new TTB */
- mcr p15, 0, r0, c8, c7, 0 /* and flush the I+D tlbs */
-
- /* Paranoia -- make sure the pipeline is empty. */
- nop
- nop
- nop
- bx lr
-
- .bss
-
-/* XXX The following macros should probably be moved to asm.h */
-#define _DATA_OBJECT(x) .globl x; .type x,_ASM_TYPE_OBJECT; x:
-#define C_OBJECT(x) _DATA_OBJECT(_C_LABEL(x))
-
-/*
- * Parameters for the cache cleaning code. Note that the order of these
- * four variables is assumed in the code above. Hence the reason for
- * declaring them in the assembler file.
- */
- .align 0
-C_OBJECT(arm10_dcache_sets_max)
- .space 4
-C_OBJECT(arm10_dcache_index_max)
- .space 4
-C_OBJECT(arm10_dcache_sets_inc)
- .space 4
-C_OBJECT(arm10_dcache_index_inc)
- .space 4
--- sys/arm/arm/setcpsr.S
+++ /dev/null
@@ -1,80 +0,0 @@
-/* $NetBSD: setcpsr.S,v 1.2 2002/08/15 01:37:02 briggs Exp $ */
-
-/*-
- * Copyright (c) 1994 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * setcpsr.S
- *
- * Miscellaneous routines to play with the CPSR register
- *
- * Eventually this routine can be inline assembly.
- *
- * Created : 12/09/94
- *
- * Based of kate/display/setcpsr.s
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/setcpsr.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/* Sets and clears bits in the CPSR register
- *
- * r0 - bic mask
- * r1 - eor mask
- */
-
-ENTRY_NP(SetCPSR)
- mrs r3, cpsr /* Set the CPSR */
- bic r2, r3, r0
- eor r2, r2, r1
- msr cpsr_all, r2
-
- mov r0, r3 /* Return the old CPSR */
-
- RET
-
-
-/* Gets the CPSR register
- *
- * Returns the CPSR in r0
- */
-
-ENTRY_NP(GetCPSR)
- mrs r0, cpsr /* Get the CPSR */
-
- RET
-
--- sys/arm/arm/nexus.c
+++ /dev/null
@@ -1,255 +0,0 @@
-/*-
- * Copyright 1998 Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby
- * granted, provided that both the above copyright notice and this
- * permission notice appear in all copies, that both the above
- * copyright notice and this permission notice appear in all
- * supporting documentation, and that the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * software without specific, written prior permission. M.I.T. makes
- * no representations about the suitability of this software for any
- * purpose. It is provided "as is" without express or implied
- * warranty.
- *
- * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
- * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
- * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*
- * This code implements a `root nexus' for Arm Architecture
- * machines. The function of the root nexus is to serve as an
- * attachment point for both processors and buses, and to manage
- * resources which are common to all of them. In particular,
- * this code implements the core resource managers for interrupt
- * requests, DMA requests (which rightfully should be a part of the
- * ISA code but it's easier to do it here for now), I/O port addresses,
- * and I/O memory address space.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/nexus.c,v 1.5 2005/06/09 12:26:19 cognet Exp $");
-
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/malloc.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <sys/interrupt.h>
-
-#include <machine/vmparam.h>
-#include <machine/pcb.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <machine/pmap.h>
-
-#include <machine/resource.h>
-#include <machine/intr.h>
-
-static MALLOC_DEFINE(M_NEXUSDEV, "nexusdev", "Nexus device");
-
-struct nexus_device {
- struct resource_list nx_resources;
-};
-
-#define DEVTONX(dev) ((struct nexus_device *)device_get_ivars(dev))
-
-static struct rman mem_rman;
-
-static int nexus_probe(device_t);
-static int nexus_attach(device_t);
-static int nexus_print_child(device_t, device_t);
-static device_t nexus_add_child(device_t, int, const char *, int);
-static struct resource *nexus_alloc_resource(device_t, device_t, int, int *,
- u_long, u_long, u_long, u_int);
-static int nexus_activate_resource(device_t, device_t, int, int,
- struct resource *);
-static int
-nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
- driver_intr_t *intr, void *arg, void **cookiep);
-static int
-nexus_teardown_intr(device_t, device_t, struct resource *, void *);
-
-static device_method_t nexus_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, nexus_probe),
- DEVMETHOD(device_attach, nexus_attach),
- /* Bus interface */
- DEVMETHOD(bus_print_child, nexus_print_child),
- DEVMETHOD(bus_add_child, nexus_add_child),
- DEVMETHOD(bus_alloc_resource, nexus_alloc_resource),
- DEVMETHOD(bus_activate_resource, nexus_activate_resource),
- DEVMETHOD(bus_setup_intr, nexus_setup_intr),
- DEVMETHOD(bus_teardown_intr, nexus_teardown_intr),
- { 0, 0 }
-};
-
-static driver_t nexus_driver = {
- "nexus",
- nexus_methods,
- 1 /* no softc */
-};
-static devclass_t nexus_devclass;
-
-static int
-nexus_probe(device_t dev)
-{
- device_quiet(dev); /* suppress attach message for neatness */
-
- mem_rman.rm_start = 0;
- mem_rman.rm_end = ~0u;
- mem_rman.rm_type = RMAN_ARRAY;
- mem_rman.rm_descr = "I/O memory addresses";
- if (rman_init(&mem_rman)
- || rman_manage_region(&mem_rman, 0, ~0u))
- panic("nexus_probe mem_rman");
-
- return (0);
- return bus_generic_probe(dev);
-}
-
-static int
-nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
- driver_intr_t *intr, void *arg, void **cookiep)
-{
- arm_setup_irqhandler(device_get_nameunit(child),
- intr, arg, res->r_start, flags, cookiep);
- return (0);
-}
-
-static int
-nexus_teardown_intr(device_t dev, device_t child, struct resource *r, void *ih)
-{
- int error;
-
- arm_mask_irq(r->r_start);
- error = arm_remove_irqhandler(ih);
- return (error);
-}
-
-static int
-nexus_attach(device_t dev)
-{
- /*
- * First, deal with the children we know about already
- */
- bus_generic_probe(dev);
- bus_generic_attach(dev);
-
- return 0;
-}
-
-
-static int
-nexus_print_child(device_t bus, device_t child)
-{
- int retval = 0;
-
- retval += bus_print_child_header(bus, child);
- retval += printf(" on motherboard\n"); /* XXX "motherboard", ick */
-
- return (retval);
-}
-
-
-static device_t
-nexus_add_child(device_t bus, int order, const char *name, int unit)
-{
- device_t child;
- struct nexus_device *ndev;
-
- ndev = malloc(sizeof(struct nexus_device), M_NEXUSDEV, M_NOWAIT|M_ZERO);
- if (!ndev)
- return(0);
- resource_list_init(&ndev->nx_resources);
-
- child = device_add_child_ordered(bus, order, name, unit);
-
- /* should we free this in nexus_child_detached? */
- device_set_ivars(child, ndev);
-
- return(child);
-}
-
-
-/*
- * Allocate a resource on behalf of child. NB: child is usually going to be a
- * child of one of our descendants, not a direct child of nexus0.
- * (Exceptions include footbridge.)
- */
-#define ARM_BUS_SPACE_MEM 1
-static struct resource *
-nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- struct resource *rv;
- struct rman *rm;
- int needactivate = flags & RF_ACTIVE;
-
- switch (type) {
- case SYS_RES_MEMORY:
- rm = &mem_rman;
- break;
-
- default:
- return 0;
- }
-
- rv = rman_reserve_resource(rm, start, end, count, flags, child);
- if (rv == 0)
- return 0;
-
- rman_set_bustag(rv, (void*)ARM_BUS_SPACE_MEM);
- rman_set_bushandle(rv, rv->r_start);
-
- if (needactivate) {
- if (bus_activate_resource(child, type, *rid, rv)) {
- rman_release_resource(rv);
- return 0;
- }
- }
-
- return rv;
-}
-
-
-static int
-nexus_activate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- /*
- * If this is a memory resource, map it into the kernel.
- */
- if (rman_get_bustag(r) == (void*)ARM_BUS_SPACE_MEM) {
- caddr_t vaddr = 0;
- u_int32_t paddr;
- u_int32_t psize;
- u_int32_t poffs;
-
- paddr = rman_get_start(r);
- psize = rman_get_size(r);
- poffs = paddr - trunc_page(paddr);
- vaddr = (caddr_t) pmap_mapdev(paddr-poffs, psize+poffs) + poffs;
- rman_set_virtual(r, vaddr);
- rman_set_bushandle(r, (bus_space_handle_t) vaddr);
- }
- return (rman_activate_resource(r));
-}
-
-DRIVER_MODULE(nexus, root, nexus_driver, nexus_devclass, 0, 0);
--- sys/arm/arm/bcopyinout.S
+++ /dev/null
@@ -1,608 +0,0 @@
-/* $NetBSD: bcopyinout.S,v 1.11 2003/10/13 21:22:40 scw Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Allen Briggs for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-
-#include "assym.s"
-
-#include <machine/asm.h>
-
-__FBSDID("$FreeBSD: src/sys/arm/arm/bcopyinout.S,v 1.6 2005/05/24 23:55:09 cognet Exp $");
-#ifdef __XSCALE__
-#include <arm/arm/bcopyinout_xscale.S>
-#else
-
- .text
- .align 0
-
-#ifdef MULTIPROCESSOR
-.Lcpu_info:
- .word _C_LABEL(cpu_info)
-#else
-.Lcurpcb:
- .word _C_LABEL(__pcpu) + PC_CURPCB
-#endif
-
-#define SAVE_REGS stmfd sp!, {r4-r11}
-#define RESTORE_REGS ldmfd sp!, {r4-r11}
-
-#if defined(__XSCALE__)
-#define HELLOCPP #
-#define PREFETCH(rx,o) pld [ rx , HELLOCPP (o) ]
-#else
-#define PREFETCH(rx,o)
-#endif
-
-/*
- * r0 = user space address
- * r1 = kernel space address
- * r2 = length
- *
- * Copies bytes from user space to kernel space
- *
- * We save/restore r4-r11:
- * r4-r11 are scratch
- */
-ENTRY(copyin)
- /* Quick exit if length is zero */
- teq r2, #0
- moveq r0, #0
- RETeq
-
- SAVE_REGS
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r2, r14}
- bl _C_LABEL(cpu_number)
- ldr r4, .Lcpu_info
- ldr r4, [r4, r0, lsl #2]
- ldr r4, [r4, #CI_CURPCB]
- ldmfd sp!, {r0-r2, r14}
-#else
- ldr r4, .Lcurpcb
- ldr r4, [r4]
-#endif
-
- ldr r5, [r4, #PCB_ONFAULT]
- adr r3, .Lcopyfault
- str r3, [r4, #PCB_ONFAULT]
-
- PREFETCH(r0, 0)
- PREFETCH(r1, 0)
-
- /*
- * If not too many bytes, take the slow path.
- */
- cmp r2, #0x08
- blt .Licleanup
-
- /*
- * Align destination to word boundary.
- */
- and r6, r1, #0x3
- ldr pc, [pc, r6, lsl #2]
- b .Lialend
- .word .Lialend
- .word .Lial3
- .word .Lial2
- .word .Lial1
-.Lial3: ldrbt r6, [r0], #1
- sub r2, r2, #1
- strb r6, [r1], #1
-.Lial2: ldrbt r7, [r0], #1
- sub r2, r2, #1
- strb r7, [r1], #1
-.Lial1: ldrbt r6, [r0], #1
- sub r2, r2, #1
- strb r6, [r1], #1
-.Lialend:
-
- /*
- * If few bytes left, finish slow.
- */
- cmp r2, #0x08
- blt .Licleanup
-
- /*
- * If source is not aligned, finish slow.
- */
- ands r3, r0, #0x03
- bne .Licleanup
-
- cmp r2, #0x60 /* Must be > 0x5f for unrolled cacheline */
- blt .Licleanup8
-
- /*
- * Align destination to cacheline boundary.
- * If source and destination are nicely aligned, this can be a big
- * win. If not, it's still cheaper to copy in groups of 32 even if
- * we don't get the nice cacheline alignment.
- */
- and r6, r1, #0x1f
- ldr pc, [pc, r6]
- b .Licaligned
- .word .Licaligned
- .word .Lical28
- .word .Lical24
- .word .Lical20
- .word .Lical16
- .word .Lical12
- .word .Lical8
- .word .Lical4
-.Lical28:ldrt r6, [r0], #4
- sub r2, r2, #4
- str r6, [r1], #4
-.Lical24:ldrt r7, [r0], #4
- sub r2, r2, #4
- str r7, [r1], #4
-.Lical20:ldrt r6, [r0], #4
- sub r2, r2, #4
- str r6, [r1], #4
-.Lical16:ldrt r7, [r0], #4
- sub r2, r2, #4
- str r7, [r1], #4
-.Lical12:ldrt r6, [r0], #4
- sub r2, r2, #4
- str r6, [r1], #4
-.Lical8:ldrt r7, [r0], #4
- sub r2, r2, #4
- str r7, [r1], #4
-.Lical4:ldrt r6, [r0], #4
- sub r2, r2, #4
- str r6, [r1], #4
-
- /*
- * We start with > 0x40 bytes to copy (>= 0x60 got us into this
- * part of the code, and we may have knocked that down by as much
- * as 0x1c getting aligned).
- *
- * This loop basically works out to:
- * do {
- * prefetch-next-cacheline(s)
- * bytes -= 0x20;
- * copy cacheline
- * } while (bytes >= 0x40);
- * bytes -= 0x20;
- * copy cacheline
- */
-.Licaligned:
- PREFETCH(r0, 32)
- PREFETCH(r1, 32)
-
- sub r2, r2, #0x20
-
- /* Copy a cacheline */
- ldrt r10, [r0], #4
- ldrt r11, [r0], #4
- ldrt r6, [r0], #4
- ldrt r7, [r0], #4
- ldrt r8, [r0], #4
- ldrt r9, [r0], #4
- stmia r1!, {r10-r11}
- ldrt r10, [r0], #4
- ldrt r11, [r0], #4
- stmia r1!, {r6-r11}
-
- cmp r2, #0x40
- bge .Licaligned
-
- sub r2, r2, #0x20
-
- /* Copy a cacheline */
- ldrt r10, [r0], #4
- ldrt r11, [r0], #4
- ldrt r6, [r0], #4
- ldrt r7, [r0], #4
- ldrt r8, [r0], #4
- ldrt r9, [r0], #4
- stmia r1!, {r10-r11}
- ldrt r10, [r0], #4
- ldrt r11, [r0], #4
- stmia r1!, {r6-r11}
-
- cmp r2, #0x08
- blt .Liprecleanup
-
-.Licleanup8:
- ldrt r8, [r0], #4
- ldrt r9, [r0], #4
- sub r2, r2, #8
- stmia r1!, {r8, r9}
- cmp r2, #8
- bge .Licleanup8
-
-.Liprecleanup:
- /*
- * If we're done, bail.
- */
- cmp r2, #0
- beq .Lout
-
-.Licleanup:
- and r6, r2, #0x3
- ldr pc, [pc, r6, lsl #2]
- b .Licend
- .word .Lic4
- .word .Lic1
- .word .Lic2
- .word .Lic3
-.Lic4: ldrbt r6, [r0], #1
- sub r2, r2, #1
- strb r6, [r1], #1
-.Lic3: ldrbt r7, [r0], #1
- sub r2, r2, #1
- strb r7, [r1], #1
-.Lic2: ldrbt r6, [r0], #1
- sub r2, r2, #1
- strb r6, [r1], #1
-.Lic1: ldrbt r7, [r0], #1
- subs r2, r2, #1
- strb r7, [r1], #1
-.Licend:
- bne .Licleanup
-
-.Liout:
- mov r0, #0
-
- str r5, [r4, #PCB_ONFAULT]
- RESTORE_REGS
-
- RET
-
-.Lcopyfault:
- mov r0, #14 /* EFAULT */
- str r5, [r4, #PCB_ONFAULT]
- RESTORE_REGS
-
- RET
-
-/*
- * r0 = kernel space address
- * r1 = user space address
- * r2 = length
- *
- * Copies bytes from kernel space to user space
- *
- * We save/restore r4-r11:
- * r4-r11 are scratch
- */
-
-ENTRY(copyout)
- /* Quick exit if length is zero */
- teq r2, #0
- moveq r0, #0
- RETeq
-
- SAVE_REGS
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r2, r14}
- bl _C_LABEL(cpu_number)
- ldr r4, .Lcpu_info
- ldr r4, [r4, r0, lsl #2]
- ldr r4, [r4, #CI_CURPCB]
- ldmfd sp!, {r0-r2, r14}
-#else
- ldr r4, .Lcurpcb
- ldr r4, [r4]
-#endif
-
- ldr r5, [r4, #PCB_ONFAULT]
- adr r3, .Lcopyfault
- str r3, [r4, #PCB_ONFAULT]
-
- PREFETCH(r0, 0)
- PREFETCH(r1, 0)
-
- /*
- * If not too many bytes, take the slow path.
- */
- cmp r2, #0x08
- blt .Lcleanup
-
- /*
- * Align destination to word boundary.
- */
- and r6, r1, #0x3
- ldr pc, [pc, r6, lsl #2]
- b .Lalend
- .word .Lalend
- .word .Lal3
- .word .Lal2
- .word .Lal1
-.Lal3: ldrb r6, [r0], #1
- sub r2, r2, #1
- strbt r6, [r1], #1
-.Lal2: ldrb r7, [r0], #1
- sub r2, r2, #1
- strbt r7, [r1], #1
-.Lal1: ldrb r6, [r0], #1
- sub r2, r2, #1
- strbt r6, [r1], #1
-.Lalend:
-
- /*
- * If few bytes left, finish slow.
- */
- cmp r2, #0x08
- blt .Lcleanup
-
- /*
- * If source is not aligned, finish slow.
- */
- ands r3, r0, #0x03
- bne .Lcleanup
-
- cmp r2, #0x60 /* Must be > 0x5f for unrolled cacheline */
- blt .Lcleanup8
-
- /*
- * Align source & destination to cacheline boundary.
- */
- and r6, r1, #0x1f
- ldr pc, [pc, r6]
- b .Lcaligned
- .word .Lcaligned
- .word .Lcal28
- .word .Lcal24
- .word .Lcal20
- .word .Lcal16
- .word .Lcal12
- .word .Lcal8
- .word .Lcal4
-.Lcal28:ldr r6, [r0], #4
- sub r2, r2, #4
- strt r6, [r1], #4
-.Lcal24:ldr r7, [r0], #4
- sub r2, r2, #4
- strt r7, [r1], #4
-.Lcal20:ldr r6, [r0], #4
- sub r2, r2, #4
- strt r6, [r1], #4
-.Lcal16:ldr r7, [r0], #4
- sub r2, r2, #4
- strt r7, [r1], #4
-.Lcal12:ldr r6, [r0], #4
- sub r2, r2, #4
- strt r6, [r1], #4
-.Lcal8: ldr r7, [r0], #4
- sub r2, r2, #4
- strt r7, [r1], #4
-.Lcal4: ldr r6, [r0], #4
- sub r2, r2, #4
- strt r6, [r1], #4
-
- /*
- * We start with > 0x40 bytes to copy (>= 0x60 got us into this
- * part of the code, and we may have knocked that down by as much
- * as 0x1c getting aligned).
- *
- * This loop basically works out to:
- * do {
- * prefetch-next-cacheline(s)
- * bytes -= 0x20;
- * copy cacheline
- * } while (bytes >= 0x40);
- * bytes -= 0x20;
- * copy cacheline
- */
-.Lcaligned:
- PREFETCH(r0, 32)
- PREFETCH(r1, 32)
-
- sub r2, r2, #0x20
-
- /* Copy a cacheline */
- ldmia r0!, {r6-r11}
- strt r6, [r1], #4
- strt r7, [r1], #4
- ldmia r0!, {r6-r7}
- strt r8, [r1], #4
- strt r9, [r1], #4
- strt r10, [r1], #4
- strt r11, [r1], #4
- strt r6, [r1], #4
- strt r7, [r1], #4
-
- cmp r2, #0x40
- bge .Lcaligned
-
- sub r2, r2, #0x20
-
- /* Copy a cacheline */
- ldmia r0!, {r6-r11}
- strt r6, [r1], #4
- strt r7, [r1], #4
- ldmia r0!, {r6-r7}
- strt r8, [r1], #4
- strt r9, [r1], #4
- strt r10, [r1], #4
- strt r11, [r1], #4
- strt r6, [r1], #4
- strt r7, [r1], #4
-
- cmp r2, #0x08
- blt .Lprecleanup
-
-.Lcleanup8:
- ldmia r0!, {r8-r9}
- sub r2, r2, #8
- strt r8, [r1], #4
- strt r9, [r1], #4
- cmp r2, #8
- bge .Lcleanup8
-
-.Lprecleanup:
- /*
- * If we're done, bail.
- */
- cmp r2, #0
- beq .Lout
-
-.Lcleanup:
- and r6, r2, #0x3
- ldr pc, [pc, r6, lsl #2]
- b .Lcend
- .word .Lc4
- .word .Lc1
- .word .Lc2
- .word .Lc3
-.Lc4: ldrb r6, [r0], #1
- sub r2, r2, #1
- strbt r6, [r1], #1
-.Lc3: ldrb r7, [r0], #1
- sub r2, r2, #1
- strbt r7, [r1], #1
-.Lc2: ldrb r6, [r0], #1
- sub r2, r2, #1
- strbt r6, [r1], #1
-.Lc1: ldrb r7, [r0], #1
- subs r2, r2, #1
- strbt r7, [r1], #1
-.Lcend:
- bne .Lcleanup
-
-.Lout:
- mov r0, #0
-
- str r5, [r4, #PCB_ONFAULT]
- RESTORE_REGS
-
- RET
-#endif
-
-/*
- * int badaddr_read_1(const uint8_t *src, uint8_t *dest)
- *
- * Copies a single 8-bit value from src to dest, returning 0 on success,
- * else EFAULT if a page fault occurred.
- */
-ENTRY(badaddr_read_1)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0-r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
- ldr ip, [r2, #PCB_ONFAULT]
- adr r3, 1f
- str r3, [r2, #PCB_ONFAULT]
- nop
- nop
- nop
- ldrb r3, [r0]
- nop
- nop
- nop
- strb r3, [r1]
- mov r0, #0 /* No fault */
-1: str ip, [r2, #PCB_ONFAULT]
- RET
-
-/*
- * int badaddr_read_2(const uint16_t *src, uint16_t *dest)
- *
- * Copies a single 16-bit value from src to dest, returning 0 on success,
- * else EFAULT if a page fault occurred.
- */
-ENTRY(badaddr_read_2)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0-r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
- ldr ip, [r2, #PCB_ONFAULT]
- adr r3, 1f
- str r3, [r2, #PCB_ONFAULT]
- nop
- nop
- nop
- ldrh r3, [r0]
- nop
- nop
- nop
- strh r3, [r1]
- mov r0, #0 /* No fault */
-1: str ip, [r2, #PCB_ONFAULT]
- RET
-
-/*
- * int badaddr_read_4(const uint32_t *src, uint32_t *dest)
- *
- * Copies a single 32-bit value from src to dest, returning 0 on success,
- * else EFAULT if a page fault occurred.
- */
-ENTRY(badaddr_read_4)
-#ifdef MULTIPROCESSOR
- /* XXX Probably not appropriate for non-Hydra SMPs */
- stmfd sp!, {r0-r1, r14}
- bl _C_LABEL(cpu_number)
- ldr r2, .Lcpu_info
- ldr r2, [r2, r0, lsl #2]
- ldr r2, [r2, #CI_CURPCB]
- ldmfd sp!, {r0-r1, r14}
-#else
- ldr r2, .Lcurpcb
- ldr r2, [r2]
-#endif
- ldr ip, [r2, #PCB_ONFAULT]
- adr r3, 1f
- str r3, [r2, #PCB_ONFAULT]
- nop
- nop
- nop
- ldr r3, [r0]
- nop
- nop
- nop
- str r3, [r1]
- mov r0, #0 /* No fault */
-1: str ip, [r2, #PCB_ONFAULT]
- RET
-
--- sys/arm/arm/cpufunc_asm_arm7tdmi.S
+++ /dev/null
@@ -1,100 +0,0 @@
-/* $NetBSD: cpufunc_asm_arm7tdmi.S,v 1.1 2001/11/10 23:14:09 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001 John Fremlin
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Causality Limited.
- * 4. The name of Causality Limited may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * ARM7TDMI assembly functions for CPU / MMU / TLB specific operations
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_arm7tdmi.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * Functions to set the MMU Translation Table Base register
- *
- * We need to clean and flush the cache as it uses virtual
- * addresses that are about to change.
- */
-ENTRY(arm7tdmi_setttb)
- mov r1, r0 /* store the TTB in a safe place */
- mov r2, lr /* ditto with lr */
-
- bl _C_LABEL(arm7tdmi_cache_flushID)
-
- /* Write the TTB */
- mcr p15, 0, r1, c2, c0, 0
-
- /* If we have updated the TTB we must flush the TLB */
- bl _C_LABEL(arm7tdmi_tlb_flushID)
-
- /* For good measure we will flush the IDC as well */
- bl _C_LABEL(arm7tdmi_cache_flushID)
-
- mov pc, r2
-
-/*
- * TLB functions
- */
-ENTRY(arm7tdmi_tlb_flushID)
- mov r0, #0
- mcr p15, 0, r0, c8, c7, 0
- RET
-
-ENTRY(arm7tdmi_tlb_flushID_SE)
- mcr p15, 0, r0, c8, c7, 1
- RET
-
-/*
- * Cache functions
- */
-ENTRY(arm7tdmi_cache_flushID)
- mov r0, #0
-
- mcr p15, 0, r0, c7, c7, 0
-
- /* Make sure that the pipeline is emptied */
- mov r0, r0
- mov r0, r0
-
- RET
-
-/*
- * Context switch.
- *
- * These is the CPU-specific parts of the context switcher cpu_switch()
- * These functions actually perform the TTB reload.
- *
- * NOTE: Special calling convention
- * r1, r4-r13 must be preserved
- */
-ENTRY(arm7tdmi_context_switch)
- b _C_LABEL(arm7tdmi_setttb)
--- sys/arm/arm/fiq.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/* $NetBSD: fiq.c,v 1.5 2002/04/03 23:33:27 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/fiq.c,v 1.3 2005/03/16 07:56:21 jmg Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <machine/cpufunc.h>
-#include <machine/fiq.h>
-#include <vm/vm.h>
-#include <machine/pcb.h>
-#include <vm/pmap.h>
-#include <machine/cpu.h>
-
-TAILQ_HEAD(, fiqhandler) fiqhandler_stack =
- TAILQ_HEAD_INITIALIZER(fiqhandler_stack);
-
-extern char fiqvector[];
-extern char fiq_nullhandler[], fiq_nullhandler_end[];
-
-#define IRQ_BIT I32_bit
-#define FIQ_BIT F32_bit
-
-/*
- * fiq_installhandler:
- *
- * Actually install the FIQ handler down at the FIQ vector.
- *
- * Note: If the FIQ is invoked via an extra layer of
- * indirection, the actual FIQ code store lives in the
- * data segment, so there is no need to manipulate
- * the vector page's protection.
- */
-static void
-fiq_installhandler(void *func, size_t size)
-{
-#if !defined(__ARM_FIQ_INDIRECT)
- vector_page_setprot(VM_PROT_READ|VM_PROT_WRITE);
-#endif
-
- memcpy(vector_page + fiqvector, func, size);
-
-#if !defined(__ARM_FIQ_INDIRECT)
- vector_page_setprot(VM_PROT_READ);
- cpu_icache_sync_range((vm_offset_t) fiqvector, size);
-#endif
-}
-
-/*
- * fiq_claim:
- *
- * Claim the FIQ vector.
- */
-int
-fiq_claim(struct fiqhandler *fh)
-{
- struct fiqhandler *ofh;
- u_int oldirqstate;
- int error = 0;
-
- if (fh->fh_size > 0x100)
- return (EFBIG);
-
- oldirqstate = disable_interrupts(FIQ_BIT);
-
- if ((ofh = TAILQ_FIRST(&fiqhandler_stack)) != NULL) {
- if ((ofh->fh_flags & FH_CANPUSH) == 0) {
- error = EBUSY;
- goto out;
- }
-
- /* Save the previous FIQ handler's registers. */
- if (ofh->fh_regs != NULL)
- fiq_getregs(ofh->fh_regs);
- }
-
- /* Set FIQ mode registers to ours. */
- if (fh->fh_regs != NULL)
- fiq_setregs(fh->fh_regs);
-
- TAILQ_INSERT_HEAD(&fiqhandler_stack, fh, fh_list);
-
- /* Now copy the actual handler into place. */
- fiq_installhandler(fh->fh_func, fh->fh_size);
-
- /* Make sure FIQs are enabled when we return. */
- oldirqstate &= ~FIQ_BIT;
-
- out:
- restore_interrupts(oldirqstate);
- return (error);
-}
-
-/*
- * fiq_release:
- *
- * Release the FIQ vector.
- */
-void
-fiq_release(struct fiqhandler *fh)
-{
- u_int oldirqstate;
- struct fiqhandler *ofh;
-
- oldirqstate = disable_interrupts(FIQ_BIT);
-
- /*
- * If we are the currently active FIQ handler, then we
- * need to save our registers and pop the next one back
- * into the vector.
- */
- if (fh == TAILQ_FIRST(&fiqhandler_stack)) {
- if (fh->fh_regs != NULL)
- fiq_getregs(fh->fh_regs);
- TAILQ_REMOVE(&fiqhandler_stack, fh, fh_list);
- if ((ofh = TAILQ_FIRST(&fiqhandler_stack)) != NULL) {
- if (ofh->fh_regs != NULL)
- fiq_setregs(ofh->fh_regs);
- fiq_installhandler(ofh->fh_func, ofh->fh_size);
- }
- } else
- TAILQ_REMOVE(&fiqhandler_stack, fh, fh_list);
-
- if (TAILQ_FIRST(&fiqhandler_stack) == NULL) {
- /* Copy the NULL handler back down into the vector. */
- fiq_installhandler(fiq_nullhandler,
- (size_t)(fiq_nullhandler_end - fiq_nullhandler));
-
- /* Make sure FIQs are disabled when we return. */
- oldirqstate |= FIQ_BIT;
- }
-
- restore_interrupts(oldirqstate);
-}
--- sys/arm/arm/genassym.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*-
- * Copyright (c) 2004 Olivier Houchard
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/genassym.c,v 1.5 2005/02/26 18:59:01 cognet Exp $");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/assym.h>
-#include <sys/proc.h>
-#include <sys/mbuf.h>
-#include <sys/vmmeter.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <machine/vmparam.h>
-#include <machine/armreg.h>
-#include <machine/pcb.h>
-#include <machine/cpu.h>
-#include <machine/proc.h>
-#include <machine/cpufunc.h>
-#include <machine/pcb.h>
-#include <machine/pte.h>
-#include <machine/intr.h>
-#include <machine/sysarch.h>
-
-#include <netinet/in.h>
-#include <netinet/in_systm.h>
-#include <netinet/ip.h>
-#include <netinet/ip6.h>
-#include <netinet/ip_var.h>
-
-ASSYM(KERNBASE, KERNBASE);
-ASSYM(PCB_NOALIGNFLT, PCB_NOALIGNFLT);
-ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault));
-ASSYM(PCB_DACR, offsetof(struct pcb, pcb_dacr));
-ASSYM(PCB_FLAGS, offsetof(struct pcb, pcb_flags));
-ASSYM(PCB_UND_SP, offsetof(struct pcb, un_32.pcb32_und_sp));
-ASSYM(PCB_PAGEDIR, offsetof(struct pcb, pcb_pagedir));
-ASSYM(PCB_L1VEC, offsetof(struct pcb, pcb_l1vec));
-ASSYM(PCB_PL1VEC, offsetof(struct pcb, pcb_pl1vec));
-ASSYM(PCB_R8, offsetof(struct pcb, un_32.pcb32_r8));
-ASSYM(PCB_R9, offsetof(struct pcb, un_32.pcb32_r9));
-ASSYM(PCB_R10, offsetof(struct pcb, un_32.pcb32_r10));
-ASSYM(PCB_R11, offsetof(struct pcb, un_32.pcb32_r11));
-ASSYM(PCB_R12, offsetof(struct pcb, un_32.pcb32_r12));
-ASSYM(PCB_PC, offsetof(struct pcb, un_32.pcb32_pc));
-ASSYM(PCB_SP, offsetof(struct pcb, un_32.pcb32_sp));
-
-ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb));
-ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread));
-ASSYM(M_LEN, offsetof(struct mbuf, m_len));
-ASSYM(M_DATA, offsetof(struct mbuf, m_data));
-ASSYM(M_NEXT, offsetof(struct mbuf, m_next));
-ASSYM(IP_SRC, offsetof(struct ip, ip_src));
-ASSYM(IP_DST, offsetof(struct ip, ip_dst));
-ASSYM(CF_SETTTB, offsetof(struct cpu_functions, cf_setttb));
-ASSYM(CF_CONTROL, offsetof(struct cpu_functions, cf_control));
-ASSYM(CF_CONTEXT_SWITCH, offsetof(struct cpu_functions, cf_context_switch));
-ASSYM(CF_DCACHE_WB_RANGE, offsetof(struct cpu_functions, cf_dcache_wb_range));
-ASSYM(CF_IDCACHE_WBINV_ALL, offsetof(struct cpu_functions, cf_idcache_wbinv_all));
-ASSYM(CF_TLB_FLUSHID_SE, offsetof(struct cpu_functions, cf_tlb_flushID_SE));
-ASSYM(CF_ICACHE_SYNC, offsetof(struct cpu_functions, cf_icache_sync_all));
-
-ASSYM(V_TRAP, offsetof(struct vmmeter, v_trap));
-ASSYM(V_SOFT, offsetof(struct vmmeter, v_soft));
-ASSYM(V_INTR, offsetof(struct vmmeter, v_intr));
-
-ASSYM(TD_PCB, offsetof(struct thread, td_pcb));
-ASSYM(TD_FLAGS, offsetof(struct thread, td_flags));
-ASSYM(TD_PROC, offsetof(struct thread, td_proc));
-ASSYM(TD_FRAME, offsetof(struct thread, td_frame));
-ASSYM(TD_MD, offsetof(struct thread, td_md));
-ASSYM(MD_TP, offsetof(struct mdthread, md_tp));
-
-ASSYM(TF_R0, offsetof(struct trapframe, tf_r0));
-ASSYM(TF_R1, offsetof(struct trapframe, tf_r1));
-ASSYM(TF_PC, offsetof(struct trapframe, tf_pc));
-ASSYM(P_PID, offsetof(struct proc, p_pid));
-ASSYM(P_FLAG, offsetof(struct proc, p_flag));
-
-ASSYM(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
-ASSYM(PDESIZE, PDESIZE);
-ASSYM(PMAP_DOMAIN_KERNEL, PMAP_DOMAIN_KERNEL);
-#ifdef PMAP_INCLUDE_PTE_SYNC
-ASSYM(PMAP_INCLUDE_PTE_SYNC, 1);
-#endif
-ASSYM(TDF_ASTPENDING, TDF_ASTPENDING);
-ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED);
-ASSYM(P_TRACED, P_TRACED);
-ASSYM(P_SIGEVENT, P_SIGEVENT);
-ASSYM(P_PROFIL, P_PROFIL);
-ASSYM(TRAPFRAMESIZE, sizeof(struct trapframe));
-
-ASSYM(MAXCOMLEN, MAXCOMLEN);
-ASSYM(NIRQ, NIRQ);
--- sys/arm/arm/cpufunc_asm_arm9.S
+++ /dev/null
@@ -1,137 +0,0 @@
-/* $NetBSD: cpufunc_asm_arm9.S,v 1.2 2002/01/29 15:27:29 rearnsha Exp $ */
-
-/*-
- * Copyright (c) 2001 ARM Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the company may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * ARM9 assembly functions for CPU / MMU / TLB specific operations
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc_asm_arm9.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * Functions to set the MMU Translation Table Base register
- *
- * We need to clean and flush the cache as it uses virtual
- * addresses that are about to change.
- */
-ENTRY(arm9_setttb)
- /*
- * Since we use the caches in write-through mode, we only have to
- * drain the write buffers and flush the caches.
- */
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D caches */
- mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
-
- mcr p15, 0, r0, c2, c0, 0 /* load new TTB */
-
- mcr p15, 0, r0, c8, c7, 0 /* invalidate I+D TLBs */
- RET
-
-/*
- * TLB functions
- */
-ENTRY(arm9_tlb_flushID_SE)
- mcr p15, 0, r0, c8, c6, 1 /* flush D tlb single entry */
- mcr p15, 0, r0, c8, c5, 1 /* flush I tlb single entry */
- RET
-
-/*
- * Cache functions
- */
-ENTRY(arm9_cache_flushID)
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D cache */
- RET
-
-ENTRY(arm9_cache_flushID_SE)
- mcr p15, 0, r0, c7, c5, 1 /* flush one entry from I cache */
- mcr p15, 0, r0, c7, c6, 1 /* flush one entry from D cache */
- RET
-
-ENTRY(arm9_cache_flushI)
- mcr p15, 0, r0, c7, c5, 0 /* flush I cache */
- RET
-
-ENTRY(arm9_cache_flushI_SE)
- mcr p15, 0, r0, c7, c5, 1 /* flush one entry from I cache */
- RET
-
-ENTRY(arm9_cache_flushD)
- mcr p15, 0, r0, c7, c6, 0 /* flush D cache */
- RET
-
-ENTRY(arm9_cache_flushD_SE)
- mcr p15, 0, r0, c7, c6, 1 /* flush one entry from D cache */
- RET
-
-ENTRY(arm9_cache_cleanID)
- mcr p15, 0, r0, c7, c10, 4
- RET
-
-/*
- * Soft functions
- */
-ENTRY(arm9_cache_syncI)
- mcr p15, 0, r0, c7, c7, 0 /* flush I+D caches */
- RET
-
-ENTRY_NP(arm9_cache_flushID_rng)
- b _C_LABEL(arm9_cache_flushID)
-
-ENTRY_NP(arm9_cache_flushD_rng)
- /* Same as above, but D cache only */
- b _C_LABEL(arm9_cache_flushD)
-
-ENTRY_NP(arm9_cache_syncI_rng)
- /* Similarly, for I cache sync */
- b _C_LABEL(arm9_cache_syncI)
-
-/*
- * Context switch.
- *
- * These is the CPU-specific parts of the context switcher cpu_switch()
- * These functions actually perform the TTB reload.
- *
- * NOTE: Special calling convention
- * r1, r4-r13 must be preserved
- */
-ENTRY(arm9_context_switch)
- /*
- * We can assume that the caches will only contain kernel addresses
- * at this point. So no need to flush them again.
- */
- mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
- mcr p15, 0, r0, c2, c0, 0 /* set the new TTB */
- mcr p15, 0, r0, c8, c7, 0 /* and flush the I+D tlbs */
-
- /* Paranoia -- make sure the pipeline is empty. */
- nop
- nop
- nop
- RET
--- sys/arm/arm/cpufunc.c
+++ /dev/null
@@ -1,1866 +0,0 @@
-/* $NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $ */
-
-/*-
- * arm7tdmi support code Copyright (c) 2001 John Fremlin
- * arm8 support code Copyright (c) 1997 ARM Limited
- * arm8 support code Copyright (c) 1997 Causality Limited
- * arm9 support code Copyright (C) 2001 ARM Ltd
- * Copyright (c) 1997 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Causality Limited.
- * 4. The name of Causality Limited may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * cpufuncs.c
- *
- * C functions for supporting CPU / MMU / TLB specific operations.
- *
- * Created : 30/01/97
- */
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/cpufunc.c,v 1.9 2005/05/25 13:46:32 cognet Exp $");
-
-#include <sys/cdefs.h>
-
-#include <sys/types.h>
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/disassem.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-
-#include <machine/cpuconf.h>
-#include <machine/cpufunc.h>
-#include <machine/bootconfig.h>
-
-#ifdef CPU_XSCALE_80200
-#include <arm/xscale/i80200/i80200reg.h>
-#include <arm/xscale/i80200/i80200var.h>
-#endif
-
-#ifdef CPU_XSCALE_80321
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-#endif
-
-#ifdef CPU_XSCALE_IXP425
-#include <arm/xscale/ixp425/ixp425reg.h>
-#include <arm/xscale/ixp425/ixp425var.h>
-#endif
-
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321)
-#include <arm/xscale/xscalereg.h>
-#endif
-
-#if defined(PERFCTRS)
-struct arm_pmc_funcs *arm_pmc;
-#endif
-
-/* PRIMARY CACHE VARIABLES */
-int arm_picache_size;
-int arm_picache_line_size;
-int arm_picache_ways;
-
-int arm_pdcache_size; /* and unified */
-int arm_pdcache_line_size;
-int arm_pdcache_ways;
-
-int arm_pcache_type;
-int arm_pcache_unified;
-
-int arm_dcache_align;
-int arm_dcache_align_mask;
-
-/* 1 == use cpu_sleep(), 0 == don't */
-int cpu_do_powersave;
-int ctrl;
-
-#ifdef CPU_ARM7TDMI
-struct cpu_functions arm7tdmi_cpufuncs = {
- /* CPU functions */
-
- cpufunc_id, /* id */
- cpufunc_nullop, /* cpwait */
-
- /* MMU functions */
-
- cpufunc_control, /* control */
- cpufunc_domains, /* domain */
- arm7tdmi_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
-
- /* TLB functions */
-
- arm7tdmi_tlb_flushID, /* tlb_flushID */
- arm7tdmi_tlb_flushID_SE, /* tlb_flushID_SE */
- arm7tdmi_tlb_flushID, /* tlb_flushI */
- arm7tdmi_tlb_flushID_SE, /* tlb_flushI_SE */
- arm7tdmi_tlb_flushID, /* tlb_flushD */
- arm7tdmi_tlb_flushID_SE, /* tlb_flushD_SE */
-
- /* Cache operations */
-
- cpufunc_nullop, /* icache_sync_all */
- (void *)cpufunc_nullop, /* icache_sync_range */
-
- arm7tdmi_cache_flushID, /* dcache_wbinv_all */
- (void *)arm7tdmi_cache_flushID, /* dcache_wbinv_range */
- (void *)arm7tdmi_cache_flushID, /* dcache_inv_range */
- (void *)cpufunc_nullop, /* dcache_wb_range */
-
- arm7tdmi_cache_flushID, /* idcache_wbinv_all */
- (void *)arm7tdmi_cache_flushID, /* idcache_wbinv_range */
-
- /* Other functions */
-
- cpufunc_nullop, /* flush_prefetchbuf */
- cpufunc_nullop, /* drain_writebuf */
- cpufunc_nullop, /* flush_brnchtgt_C */
- (void *)cpufunc_nullop, /* flush_brnchtgt_E */
-
- (void *)cpufunc_nullop, /* sleep */
-
- /* Soft functions */
-
- late_abort_fixup, /* dataabt_fixup */
- cpufunc_null_fixup, /* prefetchabt_fixup */
-
- arm7tdmi_context_switch, /* context_switch */
-
- arm7tdmi_setup /* cpu setup */
-
-};
-#endif /* CPU_ARM7TDMI */
-
-#ifdef CPU_ARM8
-struct cpu_functions arm8_cpufuncs = {
- /* CPU functions */
-
- cpufunc_id, /* id */
- cpufunc_nullop, /* cpwait */
-
- /* MMU functions */
-
- cpufunc_control, /* control */
- cpufunc_domains, /* domain */
- arm8_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
-
- /* TLB functions */
-
- arm8_tlb_flushID, /* tlb_flushID */
- arm8_tlb_flushID_SE, /* tlb_flushID_SE */
- arm8_tlb_flushID, /* tlb_flushI */
- arm8_tlb_flushID_SE, /* tlb_flushI_SE */
- arm8_tlb_flushID, /* tlb_flushD */
- arm8_tlb_flushID_SE, /* tlb_flushD_SE */
-
- /* Cache operations */
-
- cpufunc_nullop, /* icache_sync_all */
- (void *)cpufunc_nullop, /* icache_sync_range */
-
- arm8_cache_purgeID, /* dcache_wbinv_all */
- (void *)arm8_cache_purgeID, /* dcache_wbinv_range */
-/*XXX*/ (void *)arm8_cache_purgeID, /* dcache_inv_range */
- (void *)arm8_cache_cleanID, /* dcache_wb_range */
-
- arm8_cache_purgeID, /* idcache_wbinv_all */
- (void *)arm8_cache_purgeID, /* idcache_wbinv_range */
-
- /* Other functions */
-
- cpufunc_nullop, /* flush_prefetchbuf */
- cpufunc_nullop, /* drain_writebuf */
- cpufunc_nullop, /* flush_brnchtgt_C */
- (void *)cpufunc_nullop, /* flush_brnchtgt_E */
-
- (void *)cpufunc_nullop, /* sleep */
-
- /* Soft functions */
-
- cpufunc_null_fixup, /* dataabt_fixup */
- cpufunc_null_fixup, /* prefetchabt_fixup */
-
- arm8_context_switch, /* context_switch */
-
- arm8_setup /* cpu setup */
-};
-#endif /* CPU_ARM8 */
-
-#ifdef CPU_ARM9
-struct cpu_functions arm9_cpufuncs = {
- /* CPU functions */
-
- cpufunc_id, /* id */
- cpufunc_nullop, /* cpwait */
-
- /* MMU functions */
-
- cpufunc_control, /* control */
- cpufunc_domains, /* Domain */
- arm9_setttb, /* Setttb */
- cpufunc_faultstatus, /* Faultstatus */
- cpufunc_faultaddress, /* Faultaddress */
-
- /* TLB functions */
-
- armv4_tlb_flushID, /* tlb_flushID */
- arm9_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- (void *)armv4_tlb_flushI, /* tlb_flushI_SE */
- armv4_tlb_flushD, /* tlb_flushD */
- armv4_tlb_flushD_SE, /* tlb_flushD_SE */
-
- /* Cache operations */
-
- arm9_icache_sync_all, /* icache_sync_all */
- arm9_icache_sync_range, /* icache_sync_range */
-
- arm9_dcache_wbinv_all, /* dcache_wbinv_all */
- arm9_dcache_wbinv_range, /* dcache_wbinv_range */
-/*XXX*/ arm9_dcache_wbinv_range, /* dcache_inv_range */
- arm9_dcache_wb_range, /* dcache_wb_range */
-
- arm9_idcache_wbinv_all, /* idcache_wbinv_all */
- arm9_idcache_wbinv_range, /* idcache_wbinv_range */
-
- /* Other functions */
-
- cpufunc_nullop, /* flush_prefetchbuf */
- armv4_drain_writebuf, /* drain_writebuf */
- cpufunc_nullop, /* flush_brnchtgt_C */
- (void *)cpufunc_nullop, /* flush_brnchtgt_E */
-
- (void *)cpufunc_nullop, /* sleep */
-
- /* Soft functions */
-
- cpufunc_null_fixup, /* dataabt_fixup */
- cpufunc_null_fixup, /* prefetchabt_fixup */
-
- arm9_context_switch, /* context_switch */
-
- arm9_setup /* cpu setup */
-
-};
-#endif /* CPU_ARM9 */
-
-#ifdef CPU_ARM10
-struct cpu_functions arm10_cpufuncs = {
- /* CPU functions */
-
- cpufunc_id, /* id */
- cpufunc_nullop, /* cpwait */
-
- /* MMU functions */
-
- cpufunc_control, /* control */
- cpufunc_domains, /* Domain */
- arm10_setttb, /* Setttb */
- cpufunc_faultstatus, /* Faultstatus */
- cpufunc_faultaddress, /* Faultaddress */
-
- /* TLB functions */
-
- armv4_tlb_flushID, /* tlb_flushID */
- arm10_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- arm10_tlb_flushI_SE, /* tlb_flushI_SE */
- armv4_tlb_flushD, /* tlb_flushD */
- armv4_tlb_flushD_SE, /* tlb_flushD_SE */
-
- /* Cache operations */
-
- arm10_icache_sync_all, /* icache_sync_all */
- arm10_icache_sync_range, /* icache_sync_range */
-
- arm10_dcache_wbinv_all, /* dcache_wbinv_all */
- arm10_dcache_wbinv_range, /* dcache_wbinv_range */
- arm10_dcache_inv_range, /* dcache_inv_range */
- arm10_dcache_wb_range, /* dcache_wb_range */
-
- arm10_idcache_wbinv_all, /* idcache_wbinv_all */
- arm10_idcache_wbinv_range, /* idcache_wbinv_range */
-
- /* Other functions */
-
- cpufunc_nullop, /* flush_prefetchbuf */
- armv4_drain_writebuf, /* drain_writebuf */
- cpufunc_nullop, /* flush_brnchtgt_C */
- (void *)cpufunc_nullop, /* flush_brnchtgt_E */
-
- (void *)cpufunc_nullop, /* sleep */
-
- /* Soft functions */
-
- cpufunc_null_fixup, /* dataabt_fixup */
- cpufunc_null_fixup, /* prefetchabt_fixup */
-
- arm10_context_switch, /* context_switch */
-
- arm10_setup /* cpu setup */
-
-};
-#endif /* CPU_ARM10 */
-
-#ifdef CPU_SA110
-struct cpu_functions sa110_cpufuncs = {
- /* CPU functions */
-
- cpufunc_id, /* id */
- cpufunc_nullop, /* cpwait */
-
- /* MMU functions */
-
- cpufunc_control, /* control */
- cpufunc_domains, /* domain */
- sa1_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
-
- /* TLB functions */
-
- armv4_tlb_flushID, /* tlb_flushID */
- sa1_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- (void *)armv4_tlb_flushI, /* tlb_flushI_SE */
- armv4_tlb_flushD, /* tlb_flushD */
- armv4_tlb_flushD_SE, /* tlb_flushD_SE */
-
- /* Cache operations */
-
- sa1_cache_syncI, /* icache_sync_all */
- sa1_cache_syncI_rng, /* icache_sync_range */
-
- sa1_cache_purgeD, /* dcache_wbinv_all */
- sa1_cache_purgeD_rng, /* dcache_wbinv_range */
-/*XXX*/ sa1_cache_purgeD_rng, /* dcache_inv_range */
- sa1_cache_cleanD_rng, /* dcache_wb_range */
-
- sa1_cache_purgeID, /* idcache_wbinv_all */
- sa1_cache_purgeID_rng, /* idcache_wbinv_range */
-
- /* Other functions */
-
- cpufunc_nullop, /* flush_prefetchbuf */
- armv4_drain_writebuf, /* drain_writebuf */
- cpufunc_nullop, /* flush_brnchtgt_C */
- (void *)cpufunc_nullop, /* flush_brnchtgt_E */
-
- (void *)cpufunc_nullop, /* sleep */
-
- /* Soft functions */
-
- cpufunc_null_fixup, /* dataabt_fixup */
- cpufunc_null_fixup, /* prefetchabt_fixup */
-
- sa110_context_switch, /* context_switch */
-
- sa110_setup /* cpu setup */
-};
-#endif /* CPU_SA110 */
-
-#if defined(CPU_SA1100) || defined(CPU_SA1110)
-struct cpu_functions sa11x0_cpufuncs = {
- /* CPU functions */
-
- cpufunc_id, /* id */
- cpufunc_nullop, /* cpwait */
-
- /* MMU functions */
-
- cpufunc_control, /* control */
- cpufunc_domains, /* domain */
- sa1_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
-
- /* TLB functions */
-
- armv4_tlb_flushID, /* tlb_flushID */
- sa1_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- (void *)armv4_tlb_flushI, /* tlb_flushI_SE */
- armv4_tlb_flushD, /* tlb_flushD */
- armv4_tlb_flushD_SE, /* tlb_flushD_SE */
-
- /* Cache operations */
-
- sa1_cache_syncI, /* icache_sync_all */
- sa1_cache_syncI_rng, /* icache_sync_range */
-
- sa1_cache_purgeD, /* dcache_wbinv_all */
- sa1_cache_purgeD_rng, /* dcache_wbinv_range */
-/*XXX*/ sa1_cache_purgeD_rng, /* dcache_inv_range */
- sa1_cache_cleanD_rng, /* dcache_wb_range */
-
- sa1_cache_purgeID, /* idcache_wbinv_all */
- sa1_cache_purgeID_rng, /* idcache_wbinv_range */
-
- /* Other functions */
-
- sa11x0_drain_readbuf, /* flush_prefetchbuf */
- armv4_drain_writebuf, /* drain_writebuf */
- cpufunc_nullop, /* flush_brnchtgt_C */
- (void *)cpufunc_nullop, /* flush_brnchtgt_E */
-
- sa11x0_cpu_sleep, /* sleep */
-
- /* Soft functions */
-
- cpufunc_null_fixup, /* dataabt_fixup */
- cpufunc_null_fixup, /* prefetchabt_fixup */
-
- sa11x0_context_switch, /* context_switch */
-
- sa11x0_setup /* cpu setup */
-};
-#endif /* CPU_SA1100 || CPU_SA1110 */
-
-#ifdef CPU_IXP12X0
-struct cpu_functions ixp12x0_cpufuncs = {
- /* CPU functions */
-
- cpufunc_id, /* id */
- cpufunc_nullop, /* cpwait */
-
- /* MMU functions */
-
- cpufunc_control, /* control */
- cpufunc_domains, /* domain */
- sa1_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
-
- /* TLB functions */
-
- armv4_tlb_flushID, /* tlb_flushID */
- sa1_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- (void *)armv4_tlb_flushI, /* tlb_flushI_SE */
- armv4_tlb_flushD, /* tlb_flushD */
- armv4_tlb_flushD_SE, /* tlb_flushD_SE */
-
- /* Cache operations */
-
- sa1_cache_syncI, /* icache_sync_all */
- sa1_cache_syncI_rng, /* icache_sync_range */
-
- sa1_cache_purgeD, /* dcache_wbinv_all */
- sa1_cache_purgeD_rng, /* dcache_wbinv_range */
-/*XXX*/ sa1_cache_purgeD_rng, /* dcache_inv_range */
- sa1_cache_cleanD_rng, /* dcache_wb_range */
-
- sa1_cache_purgeID, /* idcache_wbinv_all */
- sa1_cache_purgeID_rng, /* idcache_wbinv_range */
-
- /* Other functions */
-
- ixp12x0_drain_readbuf, /* flush_prefetchbuf */
- armv4_drain_writebuf, /* drain_writebuf */
- cpufunc_nullop, /* flush_brnchtgt_C */
- (void *)cpufunc_nullop, /* flush_brnchtgt_E */
-
- (void *)cpufunc_nullop, /* sleep */
-
- /* Soft functions */
-
- cpufunc_null_fixup, /* dataabt_fixup */
- cpufunc_null_fixup, /* prefetchabt_fixup */
-
- ixp12x0_context_switch, /* context_switch */
-
- ixp12x0_setup /* cpu setup */
-};
-#endif /* CPU_IXP12X0 */
-
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
-struct cpu_functions xscale_cpufuncs = {
- /* CPU functions */
-
- cpufunc_id, /* id */
- xscale_cpwait, /* cpwait */
-
- /* MMU functions */
-
- xscale_control, /* control */
- cpufunc_domains, /* domain */
- xscale_setttb, /* setttb */
- cpufunc_faultstatus, /* faultstatus */
- cpufunc_faultaddress, /* faultaddress */
-
- /* TLB functions */
-
- armv4_tlb_flushID, /* tlb_flushID */
- xscale_tlb_flushID_SE, /* tlb_flushID_SE */
- armv4_tlb_flushI, /* tlb_flushI */
- (void *)armv4_tlb_flushI, /* tlb_flushI_SE */
- armv4_tlb_flushD, /* tlb_flushD */
- armv4_tlb_flushD_SE, /* tlb_flushD_SE */
-
- /* Cache operations */
-
- xscale_cache_syncI, /* icache_sync_all */
- xscale_cache_syncI_rng, /* icache_sync_range */
-
- xscale_cache_purgeD, /* dcache_wbinv_all */
- xscale_cache_purgeD_rng, /* dcache_wbinv_range */
- xscale_cache_flushD_rng, /* dcache_inv_range */
- xscale_cache_cleanD_rng, /* dcache_wb_range */
-
- xscale_cache_purgeID, /* idcache_wbinv_all */
- xscale_cache_purgeID_rng, /* idcache_wbinv_range */
-
- /* Other functions */
-
- cpufunc_nullop, /* flush_prefetchbuf */
- armv4_drain_writebuf, /* drain_writebuf */
- cpufunc_nullop, /* flush_brnchtgt_C */
- (void *)cpufunc_nullop, /* flush_brnchtgt_E */
-
- xscale_cpu_sleep, /* sleep */
-
- /* Soft functions */
-
- cpufunc_null_fixup, /* dataabt_fixup */
- cpufunc_null_fixup, /* prefetchabt_fixup */
-
- xscale_context_switch, /* context_switch */
-
- xscale_setup /* cpu setup */
-};
-#endif
-/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 */
-
-/*
- * Global constants also used by locore.s
- */
-
-struct cpu_functions cpufuncs;
-u_int cputype;
-u_int cpu_reset_needs_v4_MMU_disable; /* flag used in locore.s */
-
-#if defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) || \
- defined (CPU_ARM10) || \
- defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
-static void get_cachetype_cp15(void);
-
-/* Additional cache information local to this file. Log2 of some of the
- above numbers. */
-static int arm_dcache_l2_nsets;
-static int arm_dcache_l2_assoc;
-static int arm_dcache_l2_linesize;
-
-static void
-get_cachetype_cp15()
-{
- u_int ctype, isize, dsize;
- u_int multiplier;
-
- __asm __volatile("mrc p15, 0, %0, c0, c0, 1"
- : "=r" (ctype));
-
- /*
- * ...and thus spake the ARM ARM:
- *
- * If an <opcode2> value corresponding to an unimplemented or
- * reserved ID register is encountered, the System Control
- * processor returns the value of the main ID register.
- */
- if (ctype == cpufunc_id())
- goto out;
-
- if ((ctype & CPU_CT_S) == 0)
- arm_pcache_unified = 1;
-
- /*
- * If you want to know how this code works, go read the ARM ARM.
- */
-
- arm_pcache_type = CPU_CT_CTYPE(ctype);
-
- if (arm_pcache_unified == 0) {
- isize = CPU_CT_ISIZE(ctype);
- multiplier = (isize & CPU_CT_xSIZE_M) ? 3 : 2;
- arm_picache_line_size = 1U << (CPU_CT_xSIZE_LEN(isize) + 3);
- if (CPU_CT_xSIZE_ASSOC(isize) == 0) {
- if (isize & CPU_CT_xSIZE_M)
- arm_picache_line_size = 0; /* not present */
- else
- arm_picache_ways = 1;
- } else {
- arm_picache_ways = multiplier <<
- (CPU_CT_xSIZE_ASSOC(isize) - 1);
- }
- arm_picache_size = multiplier << (CPU_CT_xSIZE_SIZE(isize) + 8);
- }
-
- dsize = CPU_CT_DSIZE(ctype);
- multiplier = (dsize & CPU_CT_xSIZE_M) ? 3 : 2;
- arm_pdcache_line_size = 1U << (CPU_CT_xSIZE_LEN(dsize) + 3);
- if (CPU_CT_xSIZE_ASSOC(dsize) == 0) {
- if (dsize & CPU_CT_xSIZE_M)
- arm_pdcache_line_size = 0; /* not present */
- else
- arm_pdcache_ways = 1;
- } else {
- arm_pdcache_ways = multiplier <<
- (CPU_CT_xSIZE_ASSOC(dsize) - 1);
- }
- arm_pdcache_size = multiplier << (CPU_CT_xSIZE_SIZE(dsize) + 8);
-
- arm_dcache_align = arm_pdcache_line_size;
-
- arm_dcache_l2_assoc = CPU_CT_xSIZE_ASSOC(dsize) + multiplier - 2;
- arm_dcache_l2_linesize = CPU_CT_xSIZE_LEN(dsize) + 3;
- arm_dcache_l2_nsets = 6 + CPU_CT_xSIZE_SIZE(dsize) -
- CPU_CT_xSIZE_ASSOC(dsize) - CPU_CT_xSIZE_LEN(dsize);
-
- out:
- arm_dcache_align_mask = arm_dcache_align - 1;
-}
-#endif /* ARM7TDMI || ARM8 || ARM9 || XSCALE */
-
-#if defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \
- defined(CPU_IXP12X0)
-/* Cache information for CPUs without cache type registers. */
-struct cachetab {
- u_int32_t ct_cpuid;
- int ct_pcache_type;
- int ct_pcache_unified;
- int ct_pdcache_size;
- int ct_pdcache_line_size;
- int ct_pdcache_ways;
- int ct_picache_size;
- int ct_picache_line_size;
- int ct_picache_ways;
-};
-
-struct cachetab cachetab[] = {
- /* cpuid, cache type, u, dsiz, ls, wy, isiz, ls, wy */
- /* XXX is this type right for SA-1? */
- { CPU_ID_SA110, CPU_CT_CTYPE_WB1, 0, 16384, 32, 32, 16384, 32, 32 },
- { CPU_ID_SA1100, CPU_CT_CTYPE_WB1, 0, 8192, 32, 32, 16384, 32, 32 },
- { CPU_ID_SA1110, CPU_CT_CTYPE_WB1, 0, 8192, 32, 32, 16384, 32, 32 },
- { CPU_ID_IXP1200, CPU_CT_CTYPE_WB1, 0, 16384, 32, 32, 16384, 32, 32 }, /* XXX */
- { 0, 0, 0, 0, 0, 0, 0, 0}
-};
-
-static void get_cachetype_table(void);
-
-static void
-get_cachetype_table()
-{
- int i;
- u_int32_t cpuid = cpufunc_id();
-
- for (i = 0; cachetab[i].ct_cpuid != 0; i++) {
- if (cachetab[i].ct_cpuid == (cpuid & CPU_ID_CPU_MASK)) {
- arm_pcache_type = cachetab[i].ct_pcache_type;
- arm_pcache_unified = cachetab[i].ct_pcache_unified;
- arm_pdcache_size = cachetab[i].ct_pdcache_size;
- arm_pdcache_line_size =
- cachetab[i].ct_pdcache_line_size;
- arm_pdcache_ways = cachetab[i].ct_pdcache_ways;
- arm_picache_size = cachetab[i].ct_picache_size;
- arm_picache_line_size =
- cachetab[i].ct_picache_line_size;
- arm_picache_ways = cachetab[i].ct_picache_ways;
- }
- }
- arm_dcache_align = arm_pdcache_line_size;
-
- arm_dcache_align_mask = arm_dcache_align - 1;
-}
-
-#endif /* SA110 || SA1100 || SA1111 || IXP12X0 */
-
-/*
- * Cannot panic here as we may not have a console yet ...
- */
-
-int
-set_cpufuncs()
-{
- cputype = cpufunc_id();
- cputype &= CPU_ID_CPU_MASK;
-
- /*
- * NOTE: cpu_do_powersave defaults to off. If we encounter a
- * CPU type where we want to use it by default, then we set it.
- */
-
-#ifdef CPU_ARM7TDMI
- if ((cputype & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_ARM_LTD &&
- CPU_ID_IS7(cputype) &&
- (cputype & CPU_ID_7ARCH_MASK) == CPU_ID_7ARCH_V4T) {
- cpufuncs = arm7tdmi_cpufuncs;
- cpu_reset_needs_v4_MMU_disable = 0;
- get_cachetype_cp15();
- pmap_pte_init_generic();
- return 0;
- }
-#endif
-#ifdef CPU_ARM8
- if ((cputype & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_ARM_LTD &&
- (cputype & 0x0000f000) == 0x00008000) {
- cpufuncs = arm8_cpufuncs;
- cpu_reset_needs_v4_MMU_disable = 0; /* XXX correct? */
- get_cachetype_cp15();
- pmap_pte_init_arm8();
- return 0;
- }
-#endif /* CPU_ARM8 */
-#ifdef CPU_ARM9
- if (((cputype & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_ARM_LTD ||
- (cputype & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_TI) &&
- (cputype & 0x0000f000) == 0x00009000) {
- cpufuncs = arm9_cpufuncs;
- cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */
- get_cachetype_cp15();
- arm9_dcache_sets_inc = 1U << arm_dcache_l2_linesize;
- arm9_dcache_sets_max = (1U << (arm_dcache_l2_linesize +
- arm_dcache_l2_nsets)) - arm9_dcache_sets_inc;
- arm9_dcache_index_inc = 1U << (32 - arm_dcache_l2_assoc);
- arm9_dcache_index_max = 0U - arm9_dcache_index_inc;
-#ifdef ARM9_CACHE_WRITE_THROUGH
- pmap_pte_init_arm9();
-#else
- pmap_pte_init_generic();
-#endif
- return 0;
- }
-#endif /* CPU_ARM9 */
-#ifdef CPU_ARM10
- if (/* cputype == CPU_ID_ARM1020T || */
- cputype == CPU_ID_ARM1020E) {
- /*
- * Select write-through cacheing (this isn't really an
- * option on ARM1020T).
- */
- cpufuncs = arm10_cpufuncs;
- cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */
- get_cachetype_cp15();
- arm10_dcache_sets_inc = 1U << arm_dcache_l2_linesize;
- arm10_dcache_sets_max =
- (1U << (arm_dcache_l2_linesize + arm_dcache_l2_nsets)) -
- arm10_dcache_sets_inc;
- arm10_dcache_index_inc = 1U << (32 - arm_dcache_l2_assoc);
- arm10_dcache_index_max = 0U - arm10_dcache_index_inc;
- pmap_pte_init_generic();
- return 0;
- }
-#endif /* CPU_ARM10 */
-#ifdef CPU_SA110
- if (cputype == CPU_ID_SA110) {
- cpufuncs = sa110_cpufuncs;
- cpu_reset_needs_v4_MMU_disable = 1; /* SA needs it */
- get_cachetype_table();
- pmap_pte_init_sa1();
- return 0;
- }
-#endif /* CPU_SA110 */
-#ifdef CPU_SA1100
- if (cputype == CPU_ID_SA1100) {
- cpufuncs = sa11x0_cpufuncs;
- cpu_reset_needs_v4_MMU_disable = 1; /* SA needs it */
- get_cachetype_table();
- pmap_pte_init_sa1();
- /* Use powersave on this CPU. */
- cpu_do_powersave = 1;
-
- return 0;
- }
-#endif /* CPU_SA1100 */
-#ifdef CPU_SA1110
- if (cputype == CPU_ID_SA1110) {
- cpufuncs = sa11x0_cpufuncs;
- cpu_reset_needs_v4_MMU_disable = 1; /* SA needs it */
- get_cachetype_table();
- pmap_pte_init_sa1();
- /* Use powersave on this CPU. */
- cpu_do_powersave = 1;
-
- return 0;
- }
-#endif /* CPU_SA1110 */
-#ifdef CPU_IXP12X0
- if (cputype == CPU_ID_IXP1200) {
- cpufuncs = ixp12x0_cpufuncs;
- cpu_reset_needs_v4_MMU_disable = 1;
- get_cachetype_table();
- pmap_pte_init_sa1();
- return 0;
- }
-#endif /* CPU_IXP12X0 */
-#ifdef CPU_XSCALE_80200
- if (cputype == CPU_ID_80200) {
- int rev = cpufunc_id() & CPU_ID_REVISION_MASK;
-
- i80200_icu_init();
-
- /*
- * Reset the Performance Monitoring Unit to a
- * pristine state:
- * - CCNT, PMN0, PMN1 reset to 0
- * - overflow indications cleared
- * - all counters disabled
- */
- __asm __volatile("mcr p14, 0, %0, c0, c0, 0"
- :
- : "r" (PMNC_P|PMNC_C|PMNC_PMN0_IF|PMNC_PMN1_IF|
- PMNC_CC_IF));
-
-#if defined(XSCALE_CCLKCFG)
- /*
- * Crank CCLKCFG to maximum legal value.
- */
- __asm __volatile ("mcr p14, 0, %0, c6, c0, 0"
- :
- : "r" (XSCALE_CCLKCFG));
-#endif
-
- /*
- * XXX Disable ECC in the Bus Controller Unit; we
- * don't really support it, yet. Clear any pending
- * error indications.
- */
- __asm __volatile("mcr p13, 0, %0, c0, c1, 0"
- :
- : "r" (BCUCTL_E0|BCUCTL_E1|BCUCTL_EV));
-
- cpufuncs = xscale_cpufuncs;
-#if defined(PERFCTRS)
- xscale_pmu_init();
-#endif
-
- /*
- * i80200 errata: Step-A0 and A1 have a bug where
- * D$ dirty bits are not cleared on "invalidate by
- * address".
- *
- * Workaround: Clean cache line before invalidating.
- */
- if (rev == 0 || rev == 1)
- cpufuncs.cf_dcache_inv_range = xscale_cache_purgeD_rng;
-
- cpu_reset_needs_v4_MMU_disable = 1; /* XScale needs it */
- get_cachetype_cp15();
- pmap_pte_init_xscale();
- return 0;
- }
-#endif /* CPU_XSCALE_80200 */
-#ifdef CPU_XSCALE_80321
- if (cputype == CPU_ID_80321_400 || cputype == CPU_ID_80321_600 ||
- cputype == CPU_ID_80321_400_B0 || cputype == CPU_ID_80321_600_B0) {
-
- /*
- * Reset the Performance Monitoring Unit to a
- * pristine state:
- * - CCNT, PMN0, PMN1 reset to 0
- * - overflow indications cleared
- * - all counters disabled
- */
- __asm __volatile("mcr p14, 0, %0, c0, c0, 0"
- :
- : "r" (PMNC_P|PMNC_C|PMNC_PMN0_IF|PMNC_PMN1_IF|
- PMNC_CC_IF));
-
- cpufuncs = xscale_cpufuncs;
-#if defined(PERFCTRS)
- xscale_pmu_init();
-#endif
-
- cpu_reset_needs_v4_MMU_disable = 1; /* XScale needs it */
- get_cachetype_cp15();
- pmap_pte_init_xscale();
- return 0;
- }
-#endif /* CPU_XSCALE_80321 */
-#ifdef CPU_XSCALE_PXA2X0
- /* ignore core revision to test PXA2xx CPUs */
- if ((cputype & ~CPU_ID_XSCALE_COREREV_MASK) == CPU_ID_PXA250 ||
- (cputype & ~CPU_ID_XSCALE_COREREV_MASK) == CPU_ID_PXA210) {
-
- cpufuncs = xscale_cpufuncs;
-#if defined(PERFCTRS)
- xscale_pmu_init();
-#endif
-
- cpu_reset_needs_v4_MMU_disable = 1; /* XScale needs it */
- get_cachetype_cp15();
- pmap_pte_init_xscale();
-
- /* Use powersave on this CPU. */
- cpu_do_powersave = 1;
-
- return 0;
- }
-#endif /* CPU_XSCALE_PXA2X0 */
-#ifdef CPU_XSCALE_IXP425
- if (cputype == CPU_ID_IXP425_533 || cputype == CPU_ID_IXP425_400 ||
- cputype == CPU_ID_IXP425_266) {
- ixp425_icu_init();
-
- cpufuncs = xscale_cpufuncs;
-#if defined(PERFCTRS)
- xscale_pmu_init();
-#endif
-
- cpu_reset_needs_v4_MMU_disable = 1; /* XScale needs it */
- get_cachetype_cp15();
- pmap_pte_init_xscale();
-
- return 0;
- }
-#endif /* CPU_XSCALE_IXP425 */
- /*
- * Bzzzz. And the answer was ...
- */
- panic("No support for this CPU type (%08x) in kernel", cputype);
- return(ARCHITECTURE_NOT_PRESENT);
-}
-
-/*
- * Fixup routines for data and prefetch aborts.
- *
- * Several compile time symbols are used
- *
- * DEBUG_FAULT_CORRECTION - Print debugging information during the
- * correction of registers after a fault.
- * ARM6_LATE_ABORT - ARM6 supports both early and late aborts
- * when defined should use late aborts
- */
-
-
-/*
- * Null abort fixup routine.
- * For use when no fixup is required.
- */
-int
-cpufunc_null_fixup(arg)
- void *arg;
-{
- return(ABORT_FIXUP_OK);
-}
-
-
-#if defined(CPU_ARM7TDMI)
-
-#ifdef DEBUG_FAULT_CORRECTION
-#define DFC_PRINTF(x) printf x
-#define DFC_DISASSEMBLE(x) disassemble(x)
-#else
-#define DFC_PRINTF(x) /* nothing */
-#define DFC_DISASSEMBLE(x) /* nothing */
-#endif
-
-/*
- * "Early" data abort fixup.
- *
- * For ARM2, ARM2as, ARM3 and ARM6 (in early-abort mode). Also used
- * indirectly by ARM6 (in late-abort mode) and ARM7[TDMI].
- *
- * In early aborts, we may have to fix up LDM, STM, LDC and STC.
- */
-int
-early_abort_fixup(arg)
- void *arg;
-{
- trapframe_t *frame = arg;
- u_int fault_pc;
- u_int fault_instruction;
- int saved_lr = 0;
-
- if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
-
- /* Ok an abort in SVC mode */
-
- /*
- * Copy the SVC r14 into the usr r14 - The usr r14 is garbage
- * as the fault happened in svc mode but we need it in the
- * usr slot so we can treat the registers as an array of ints
- * during fixing.
- * NOTE: This PC is in the position but writeback is not
- * allowed on r15.
- * Doing it like this is more efficient than trapping this
- * case in all possible locations in the following fixup code.
- */
-
- saved_lr = frame->tf_usr_lr;
- frame->tf_usr_lr = frame->tf_svc_lr;
-
- /*
- * Note the trapframe does not have the SVC r13 so a fault
- * from an instruction with writeback to r13 in SVC mode is
- * not allowed. This should not happen as the kstack is
- * always valid.
- */
- }
-
- /* Get fault address and status from the CPU */
-
- fault_pc = frame->tf_pc;
- fault_instruction = *((volatile unsigned int *)fault_pc);
-
- /* Decode the fault instruction and fix the registers as needed */
-
- if ((fault_instruction & 0x0e000000) == 0x08000000) {
- int base;
- int loop;
- int count;
- int *registers = &frame->tf_r0;
-
- DFC_PRINTF(("LDM/STM\n"));
- DFC_DISASSEMBLE(fault_pc);
- if (fault_instruction & (1 << 21)) {
- DFC_PRINTF(("This instruction must be corrected\n"));
- base = (fault_instruction >> 16) & 0x0f;
- if (base == 15)
- return ABORT_FIXUP_FAILED;
- /* Count registers transferred */
- count = 0;
- for (loop = 0; loop < 16; ++loop) {
- if (fault_instruction & (1<<loop))
- ++count;
- }
- DFC_PRINTF(("%d registers used\n", count));
- DFC_PRINTF(("Corrected r%d by %d bytes ",
- base, count * 4));
- if (fault_instruction & (1 << 23)) {
- DFC_PRINTF(("down\n"));
- registers[base] -= count * 4;
- } else {
- DFC_PRINTF(("up\n"));
- registers[base] += count * 4;
- }
- }
- } else if ((fault_instruction & 0x0e000000) == 0x0c000000) {
- int base;
- int offset;
- int *registers = &frame->tf_r0;
-
- /* REGISTER CORRECTION IS REQUIRED FOR THESE INSTRUCTIONS */
-
- DFC_DISASSEMBLE(fault_pc);
-
- /* Only need to fix registers if write back is turned on */
-
- if ((fault_instruction & (1 << 21)) != 0) {
- base = (fault_instruction >> 16) & 0x0f;
- if (base == 13 &&
- (frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE)
- return ABORT_FIXUP_FAILED;
- if (base == 15)
- return ABORT_FIXUP_FAILED;
-
- offset = (fault_instruction & 0xff) << 2;
- DFC_PRINTF(("r%d=%08x\n", base, registers[base]));
- if ((fault_instruction & (1 << 23)) != 0)
- offset = -offset;
- registers[base] += offset;
- DFC_PRINTF(("r%d=%08x\n", base, registers[base]));
- }
- } else if ((fault_instruction & 0x0e000000) == 0x0c000000)
- return ABORT_FIXUP_FAILED;
-
- if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
-
- /* Ok an abort in SVC mode */
-
- /*
- * Copy the SVC r14 into the usr r14 - The usr r14 is garbage
- * as the fault happened in svc mode but we need it in the
- * usr slot so we can treat the registers as an array of ints
- * during fixing.
- * NOTE: This PC is in the position but writeback is not
- * allowed on r15.
- * Doing it like this is more efficient than trapping this
- * case in all possible locations in the prior fixup code.
- */
-
- frame->tf_svc_lr = frame->tf_usr_lr;
- frame->tf_usr_lr = saved_lr;
-
- /*
- * Note the trapframe does not have the SVC r13 so a fault
- * from an instruction with writeback to r13 in SVC mode is
- * not allowed. This should not happen as the kstack is
- * always valid.
- */
- }
-
- return(ABORT_FIXUP_OK);
-}
-#endif /* CPU_ARM2/250/3/6/7 */
-
-
-#if defined(CPU_ARM7TDMI)
-/*
- * "Late" (base updated) data abort fixup
- *
- * For ARM6 (in late-abort mode) and ARM7.
- *
- * In this model, all data-transfer instructions need fixing up. We defer
- * LDM, STM, LDC and STC fixup to the early-abort handler.
- */
-int
-late_abort_fixup(arg)
- void *arg;
-{
- trapframe_t *frame = arg;
- u_int fault_pc;
- u_int fault_instruction;
- int saved_lr = 0;
-
- if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
-
- /* Ok an abort in SVC mode */
-
- /*
- * Copy the SVC r14 into the usr r14 - The usr r14 is garbage
- * as the fault happened in svc mode but we need it in the
- * usr slot so we can treat the registers as an array of ints
- * during fixing.
- * NOTE: This PC is in the position but writeback is not
- * allowed on r15.
- * Doing it like this is more efficient than trapping this
- * case in all possible locations in the following fixup code.
- */
-
- saved_lr = frame->tf_usr_lr;
- frame->tf_usr_lr = frame->tf_svc_lr;
-
- /*
- * Note the trapframe does not have the SVC r13 so a fault
- * from an instruction with writeback to r13 in SVC mode is
- * not allowed. This should not happen as the kstack is
- * always valid.
- */
- }
-
- /* Get fault address and status from the CPU */
-
- fault_pc = frame->tf_pc;
- fault_instruction = *((volatile unsigned int *)fault_pc);
-
- /* Decode the fault instruction and fix the registers as needed */
-
- /* Was is a swap instruction ? */
-
- if ((fault_instruction & 0x0fb00ff0) == 0x01000090) {
- DFC_DISASSEMBLE(fault_pc);
- } else if ((fault_instruction & 0x0c000000) == 0x04000000) {
-
- /* Was is a ldr/str instruction */
- /* This is for late abort only */
-
- int base;
- int offset;
- int *registers = &frame->tf_r0;
-
- DFC_DISASSEMBLE(fault_pc);
-
- /* This is for late abort only */
-
- if ((fault_instruction & (1 << 24)) == 0
- || (fault_instruction & (1 << 21)) != 0) {
- /* postindexed ldr/str with no writeback */
-
- base = (fault_instruction >> 16) & 0x0f;
- if (base == 13 &&
- (frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE)
- return ABORT_FIXUP_FAILED;
- if (base == 15)
- return ABORT_FIXUP_FAILED;
- DFC_PRINTF(("late abt fix: r%d=%08x : ",
- base, registers[base]));
- if ((fault_instruction & (1 << 25)) == 0) {
- /* Immediate offset - easy */
-
- offset = fault_instruction & 0xfff;
- if ((fault_instruction & (1 << 23)))
- offset = -offset;
- registers[base] += offset;
- DFC_PRINTF(("imm=%08x ", offset));
- } else {
- /* offset is a shifted register */
- int shift;
-
- offset = fault_instruction & 0x0f;
- if (offset == base)
- return ABORT_FIXUP_FAILED;
-
- /*
- * Register offset - hard we have to
- * cope with shifts !
- */
- offset = registers[offset];
-
- if ((fault_instruction & (1 << 4)) == 0)
- /* shift with amount */
- shift = (fault_instruction >> 7) & 0x1f;
- else {
- /* shift with register */
- if ((fault_instruction & (1 << 7)) != 0)
- /* undefined for now so bail out */
- return ABORT_FIXUP_FAILED;
- shift = ((fault_instruction >> 8) & 0xf);
- if (base == shift)
- return ABORT_FIXUP_FAILED;
- DFC_PRINTF(("shift reg=%d ", shift));
- shift = registers[shift];
- }
- DFC_PRINTF(("shift=%08x ", shift));
- switch (((fault_instruction >> 5) & 0x3)) {
- case 0 : /* Logical left */
- offset = (int)(((u_int)offset) << shift);
- break;
- case 1 : /* Logical Right */
- if (shift == 0) shift = 32;
- offset = (int)(((u_int)offset) >> shift);
- break;
- case 2 : /* Arithmetic Right */
- if (shift == 0) shift = 32;
- offset = (int)(((int)offset) >> shift);
- break;
- case 3 : /* Rotate right (rol or rxx) */
- return ABORT_FIXUP_FAILED;
- break;
- }
-
- DFC_PRINTF(("abt: fixed LDR/STR with "
- "register offset\n"));
- if ((fault_instruction & (1 << 23)))
- offset = -offset;
- DFC_PRINTF(("offset=%08x ", offset));
- registers[base] += offset;
- }
- DFC_PRINTF(("r%d=%08x\n", base, registers[base]));
- }
- }
-
- if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
-
- /* Ok an abort in SVC mode */
-
- /*
- * Copy the SVC r14 into the usr r14 - The usr r14 is garbage
- * as the fault happened in svc mode but we need it in the
- * usr slot so we can treat the registers as an array of ints
- * during fixing.
- * NOTE: This PC is in the position but writeback is not
- * allowed on r15.
- * Doing it like this is more efficient than trapping this
- * case in all possible locations in the prior fixup code.
- */
-
- frame->tf_svc_lr = frame->tf_usr_lr;
- frame->tf_usr_lr = saved_lr;
-
- /*
- * Note the trapframe does not have the SVC r13 so a fault
- * from an instruction with writeback to r13 in SVC mode is
- * not allowed. This should not happen as the kstack is
- * always valid.
- */
- }
-
- /*
- * Now let the early-abort fixup routine have a go, in case it
- * was an LDM, STM, LDC or STC that faulted.
- */
-
- return early_abort_fixup(arg);
-}
-#endif /* CPU_ARM7TDMI */
-
-/*
- * CPU Setup code
- */
-
-#if defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined (CPU_ARM9) || \
- defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) || \
- defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
-
-#define IGN 0
-#define OR 1
-#define BIC 2
-
-struct cpu_option {
- char *co_name;
- int co_falseop;
- int co_trueop;
- int co_value;
-};
-
-static u_int parse_cpu_options(char *, struct cpu_option *, u_int);
-
-static u_int
-parse_cpu_options(args, optlist, cpuctrl)
- char *args;
- struct cpu_option *optlist;
- u_int cpuctrl;
-{
- int integer;
-
- if (args == NULL)
- return(cpuctrl);
-
- while (optlist->co_name) {
- if (get_bootconf_option(args, optlist->co_name,
- BOOTOPT_TYPE_BOOLEAN, &integer)) {
- if (integer) {
- if (optlist->co_trueop == OR)
- cpuctrl |= optlist->co_value;
- else if (optlist->co_trueop == BIC)
- cpuctrl &= ~optlist->co_value;
- } else {
- if (optlist->co_falseop == OR)
- cpuctrl |= optlist->co_value;
- else if (optlist->co_falseop == BIC)
- cpuctrl &= ~optlist->co_value;
- }
- }
- ++optlist;
- }
- return(cpuctrl);
-}
-#endif /* CPU_ARM7TDMI || CPU_ARM8 || CPU_SA110 */
-
-#if defined(CPU_ARM7TDMI) || defined(CPU_ARM8)
-struct cpu_option arm678_options[] = {
-#ifdef COMPAT_12
- { "nocache", IGN, BIC, CPU_CONTROL_IDC_ENABLE },
- { "nowritebuf", IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
-#endif /* COMPAT_12 */
- { "cpu.cache", BIC, OR, CPU_CONTROL_IDC_ENABLE },
- { "cpu.nocache", OR, BIC, CPU_CONTROL_IDC_ENABLE },
- { "cpu.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { "cpu.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
- { NULL, IGN, IGN, 0 }
-};
-
-#endif /* CPU_ARM6 || CPU_ARM7 || CPU_ARM7TDMI || CPU_ARM8 */
-
-#ifdef CPU_ARM7TDMI
-struct cpu_option arm7tdmi_options[] = {
- { "arm7.cache", BIC, OR, CPU_CONTROL_IDC_ENABLE },
- { "arm7.nocache", OR, BIC, CPU_CONTROL_IDC_ENABLE },
- { "arm7.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { "arm7.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
-#ifdef COMPAT_12
- { "fpaclk2", BIC, OR, CPU_CONTROL_CPCLK },
-#endif /* COMPAT_12 */
- { "arm700.fpaclk", BIC, OR, CPU_CONTROL_CPCLK },
- { NULL, IGN, IGN, 0 }
-};
-
-void
-arm7tdmi_setup(args)
- char *args;
-{
- int cpuctrl;
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE;
-
- cpuctrl = parse_cpu_options(args, arm678_options, cpuctrl);
- cpuctrl = parse_cpu_options(args, arm7tdmi_options, cpuctrl);
-
-#ifdef __ARMEB__
- cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
- /* Clear out the cache */
- cpu_idcache_wbinv_all();
-
- /* Set the control register */
- ctrl = cpuctrl;
- cpu_control(0xffffffff, cpuctrl);
-}
-#endif /* CPU_ARM7TDMI */
-
-#ifdef CPU_ARM8
-struct cpu_option arm8_options[] = {
- { "arm8.cache", BIC, OR, CPU_CONTROL_IDC_ENABLE },
- { "arm8.nocache", OR, BIC, CPU_CONTROL_IDC_ENABLE },
- { "arm8.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { "arm8.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
-#ifdef COMPAT_12
- { "branchpredict", BIC, OR, CPU_CONTROL_BPRD_ENABLE },
-#endif /* COMPAT_12 */
- { "cpu.branchpredict", BIC, OR, CPU_CONTROL_BPRD_ENABLE },
- { "arm8.branchpredict", BIC, OR, CPU_CONTROL_BPRD_ENABLE },
- { NULL, IGN, IGN, 0 }
-};
-
-void
-arm8_setup(args)
- char *args;
-{
- int integer;
- int cpuctrl, cpuctrlmask;
- int clocktest;
- int setclock = 0;
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE
- | CPU_CONTROL_BPRD_ENABLE | CPU_CONTROL_ROM_ENABLE
- | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
- cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
- cpuctrl = parse_cpu_options(args, arm678_options, cpuctrl);
- cpuctrl = parse_cpu_options(args, arm8_options, cpuctrl);
-
-#ifdef __ARMEB__
- cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
- /* Get clock configuration */
- clocktest = arm8_clock_config(0, 0) & 0x0f;
-
- /* Special ARM8 clock and test configuration */
- if (get_bootconf_option(args, "arm8.clock.reset", BOOTOPT_TYPE_BOOLEAN, &integer)) {
- clocktest = 0;
- setclock = 1;
- }
- if (get_bootconf_option(args, "arm8.clock.dynamic", BOOTOPT_TYPE_BOOLEAN, &integer)) {
- if (integer)
- clocktest |= 0x01;
- else
- clocktest &= ~(0x01);
- setclock = 1;
- }
- if (get_bootconf_option(args, "arm8.clock.sync", BOOTOPT_TYPE_BOOLEAN, &integer)) {
- if (integer)
- clocktest |= 0x02;
- else
- clocktest &= ~(0x02);
- setclock = 1;
- }
- if (get_bootconf_option(args, "arm8.clock.fast", BOOTOPT_TYPE_BININT, &integer)) {
- clocktest = (clocktest & ~0xc0) | (integer & 3) << 2;
- setclock = 1;
- }
- if (get_bootconf_option(args, "arm8.test", BOOTOPT_TYPE_BININT, &integer)) {
- clocktest |= (integer & 7) << 5;
- setclock = 1;
- }
-
- /* Clear out the cache */
- cpu_idcache_wbinv_all();
-
- /* Set the control register */
- ctrl = cpuctrl;
- cpu_control(0xffffffff, cpuctrl);
-
- /* Set the clock/test register */
- if (setclock)
- arm8_clock_config(0x7f, clocktest);
-}
-#endif /* CPU_ARM8 */
-
-#ifdef CPU_ARM9
-struct cpu_option arm9_options[] = {
- { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "arm9.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "arm9.icache", BIC, OR, CPU_CONTROL_IC_ENABLE },
- { "arm9.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE },
- { "cpu.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { "cpu.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
- { "arm9.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { NULL, IGN, IGN, 0 }
-};
-
-void
-arm9_setup(args)
- char *args;
-{
- int cpuctrl, cpuctrlmask;
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_LABT_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
- | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
- | CPU_CONTROL_LABT_ENABLE | CPU_CONTROL_VECRELOC
- | CPU_CONTROL_ROUNDROBIN;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
- cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
- cpuctrl = parse_cpu_options(args, arm9_options, cpuctrl);
-
-#ifdef __ARMEB__
- cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
- if (vector_page == ARM_VECTORS_HIGH)
- cpuctrl |= CPU_CONTROL_VECRELOC;
-
- /* Clear out the cache */
- cpu_idcache_wbinv_all();
-
- /* Set the control register */
- cpu_control(cpuctrlmask, cpuctrl);
- ctrl = cpuctrl;
-
-}
-#endif /* CPU_ARM9 */
-
-#ifdef CPU_ARM10
-struct cpu_option arm10_options[] = {
- { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "arm10.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "arm10.icache", BIC, OR, CPU_CONTROL_IC_ENABLE },
- { "arm10.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE },
- { "cpu.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { "cpu.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
- { "arm10.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { NULL, IGN, IGN, 0 }
-};
-
-void
-arm10_setup(args)
- char *args;
-{
- int cpuctrl, cpuctrlmask;
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_BPRD_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
- | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
- | CPU_CONTROL_BPRD_ENABLE
- | CPU_CONTROL_ROUNDROBIN | CPU_CONTROL_CPCLK;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
- cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
- cpuctrl = parse_cpu_options(args, arm10_options, cpuctrl);
-
-#ifdef __ARMEB__
- cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
- /* Clear out the cache */
- cpu_idcache_wbinv_all();
-
- /* Now really make sure they are clean. */
- asm volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : );
-
- /* Set the control register */
- ctrl = cpuctrl;
- cpu_control(0xffffffff, cpuctrl);
-
- /* And again. */
- cpu_idcache_wbinv_all();
-}
-#endif /* CPU_ARM10 */
-
-#ifdef CPU_SA110
-struct cpu_option sa110_options[] = {
-#ifdef COMPAT_12
- { "nocache", IGN, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "nowritebuf", IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
-#endif /* COMPAT_12 */
- { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "sa110.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "sa110.icache", BIC, OR, CPU_CONTROL_IC_ENABLE },
- { "sa110.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE },
- { "cpu.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { "cpu.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
- { "sa110.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { NULL, IGN, IGN, 0 }
-};
-
-void
-sa110_setup(args)
- char *args;
-{
- int cpuctrl, cpuctrlmask;
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
- | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
- | CPU_CONTROL_LABT_ENABLE | CPU_CONTROL_BPRD_ENABLE
- | CPU_CONTROL_CPCLK;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
- cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
- cpuctrl = parse_cpu_options(args, sa110_options, cpuctrl);
-
-#ifdef __ARMEB__
- cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
- /* Clear out the cache */
- cpu_idcache_wbinv_all();
-
- /* Set the control register */
- ctrl = cpuctrl;
-/* cpu_control(cpuctrlmask, cpuctrl);*/
- cpu_control(0xffffffff, cpuctrl);
-
- /*
- * enable clockswitching, note that this doesn't read or write to r0,
- * r0 is just to make it valid asm
- */
- __asm ("mcr 15, 0, r0, c15, c1, 2");
-}
-#endif /* CPU_SA110 */
-
-#if defined(CPU_SA1100) || defined(CPU_SA1110)
-struct cpu_option sa11x0_options[] = {
-#ifdef COMPAT_12
- { "nocache", IGN, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "nowritebuf", IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
-#endif /* COMPAT_12 */
- { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "sa11x0.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "sa11x0.icache", BIC, OR, CPU_CONTROL_IC_ENABLE },
- { "sa11x0.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE },
- { "cpu.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { "cpu.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
- { "sa11x0.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { NULL, IGN, IGN, 0 }
-};
-
-void
-sa11x0_setup(args)
- char *args;
-{
- int cpuctrl, cpuctrlmask;
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_LABT_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
- | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
- | CPU_CONTROL_LABT_ENABLE | CPU_CONTROL_BPRD_ENABLE
- | CPU_CONTROL_CPCLK | CPU_CONTROL_VECRELOC;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
- cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
-
- cpuctrl = parse_cpu_options(args, sa11x0_options, cpuctrl);
-
-#ifdef __ARMEB__
- cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
- if (vector_page == ARM_VECTORS_HIGH)
- cpuctrl |= CPU_CONTROL_VECRELOC;
- /* Clear out the cache */
- cpu_idcache_wbinv_all();
- /* Set the control register */
- ctrl = cpuctrl;
- cpu_control(0xffffffff, cpuctrl);
-}
-#endif /* CPU_SA1100 || CPU_SA1110 */
-
-#if defined(CPU_IXP12X0)
-struct cpu_option ixp12x0_options[] = {
- { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "ixp12x0.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "ixp12x0.icache", BIC, OR, CPU_CONTROL_IC_ENABLE },
- { "ixp12x0.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE },
- { "cpu.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { "cpu.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
- { "ixp12x0.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
- { NULL, IGN, IGN, 0 }
-};
-
-void
-ixp12x0_setup(args)
- char *args;
-{
- int cpuctrl, cpuctrlmask;
-
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE;
-
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_AFLT_ENABLE
- | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_WBUF_ENABLE
- | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_IC_ENABLE
- | CPU_CONTROL_VECRELOC;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
- cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
- cpuctrl = parse_cpu_options(args, ixp12x0_options, cpuctrl);
-
-#ifdef __ARMEB__
- cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
- if (vector_page == ARM_VECTORS_HIGH)
- cpuctrl |= CPU_CONTROL_VECRELOC;
-
- /* Clear out the cache */
- cpu_idcache_wbinv_all();
-
- /* Set the control register */
- ctrl = cpuctrl;
- /* cpu_control(0xffffffff, cpuctrl); */
- cpu_control(cpuctrlmask, cpuctrl);
-}
-#endif /* CPU_IXP12X0 */
-
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
-struct cpu_option xscale_options[] = {
-#ifdef COMPAT_12
- { "branchpredict", BIC, OR, CPU_CONTROL_BPRD_ENABLE },
- { "nocache", IGN, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
-#endif /* COMPAT_12 */
- { "cpu.branchpredict", BIC, OR, CPU_CONTROL_BPRD_ENABLE },
- { "cpu.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "cpu.nocache", OR, BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "xscale.branchpredict", BIC, OR, CPU_CONTROL_BPRD_ENABLE },
- { "xscale.cache", BIC, OR, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
- { "xscale.icache", BIC, OR, CPU_CONTROL_IC_ENABLE },
- { "xscale.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE },
- { NULL, IGN, IGN, 0 }
-};
-
-void
-xscale_setup(args)
- char *args;
-{
- uint32_t auxctl;
- int cpuctrl, cpuctrlmask;
-
- /*
- * The XScale Write Buffer is always enabled. Our option
- * is to enable/disable coalescing. Note that bits 6:3
- * must always be enabled.
- */
-
- cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_LABT_ENABLE
- | CPU_CONTROL_BPRD_ENABLE;
- cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_32BP_ENABLE
- | CPU_CONTROL_32BD_ENABLE | CPU_CONTROL_SYST_ENABLE
- | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE
- | CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_ROM_ENABLE
- | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE
- | CPU_CONTROL_LABT_ENABLE | CPU_CONTROL_BPRD_ENABLE
- | CPU_CONTROL_CPCLK | CPU_CONTROL_VECRELOC;
-
-#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
- cpuctrl |= CPU_CONTROL_AFLT_ENABLE;
-#endif
-
- cpuctrl = parse_cpu_options(args, xscale_options, cpuctrl);
-
-#ifdef __ARMEB__
- cpuctrl |= CPU_CONTROL_BEND_ENABLE;
-#endif
-
- if (vector_page == ARM_VECTORS_HIGH)
- cpuctrl |= CPU_CONTROL_VECRELOC;
-
- /* Clear out the cache */
- cpu_idcache_wbinv_all();
-
- /*
- * Set the control register. Note that bits 6:3 must always
- * be set to 1.
- */
- ctrl = cpuctrl;
-/* cpu_control(cpuctrlmask, cpuctrl);*/
- cpu_control(0xffffffff, cpuctrl);
-
- /* Make sure write coalescing is turned on */
- __asm __volatile("mrc p15, 0, %0, c1, c0, 1"
- : "=r" (auxctl));
-#ifdef XSCALE_NO_COALESCE_WRITES
- auxctl |= XSCALE_AUXCTL_K;
-#else
- auxctl &= ~XSCALE_AUXCTL_K;
-#endif
- __asm __volatile("mcr p15, 0, %0, c1, c0, 1"
- : : "r" (auxctl));
-}
-#endif /* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 */
--- sys/arm/arm/fiq_subr.S
+++ /dev/null
@@ -1,101 +0,0 @@
-/* $NetBSD: fiq_subr.S,v 1.3 2002/04/12 18:50:31 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-
-#include <machine/armreg.h>
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/fiq_subr.S,v 1.3 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * MODE_CHANGE_NOP should be inserted between a mode change and a
- * banked register (R8--R15) access.
- */
-#if defined(CPU_ARM2) || defined(CPU_ARM250)
-#define MODE_CHANGE_NOP mov r0, r0
-#else
-#define MODE_CHANGE_NOP /* Data sheet says ARM3 doesn't need it */
-#endif
-
-#define SWITCH_TO_FIQ_MODE \
- mrs r2, cpsr_all ; \
- mov r3, r2 ; \
- bic r2, r2, #(PSR_MODE) ; \
- orr r2, r2, #(PSR_FIQ32_MODE) ; \
- msr cpsr_all, r2
-
-#define BACK_TO_SVC_MODE \
- msr cpsr_all, r3
-
-/*
- * fiq_getregs:
- *
- * Fetch the FIQ mode banked registers into the fiqhandler
- * structure.
- */
-ENTRY(fiq_getregs)
- SWITCH_TO_FIQ_MODE
-
- stmia r0, {r8-r13}
-
- BACK_TO_SVC_MODE
- RET
-
-/*
- * fiq_setregs:
- *
- * Load the FIQ mode banked registers from the fiqhandler
- * structure.
- */
-ENTRY(fiq_setregs)
- SWITCH_TO_FIQ_MODE
-
- ldmia r0, {r8-r13}
-
- BACK_TO_SVC_MODE
- RET
-
-/*
- * fiq_nullhandler:
- *
- * Null handler copied down to the FIQ vector when the last
- * FIQ handler is removed.
- */
- .global _C_LABEL(fiq_nullhandler), _C_LABEL(fiq_nullhandler_end)
-_C_LABEL(fiq_nullhandler):
- subs pc, lr, #4
-_C_LABEL(fiq_nullhandler_end):
--- sys/arm/arm/locore.S
+++ /dev/null
@@ -1,356 +0,0 @@
-/* $NetBSD: locore.S,v 1.14 2003/04/20 16:21:40 thorpej Exp $ */
-
-/*-
- * Copyright (C) 1994-1997 Mark Brinicombe
- * Copyright (C) 1994 Brini
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of Brini may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include "assym.s"
-#include <sys/syscall.h>
-#include <machine/asm.h>
-#include <machine/armreg.h>
-#include <machine/pte.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/locore.S,v 1.10 2005/03/16 07:53:02 jmg Exp $");
-
-/* What size should this really be ? It is only used by init_arm() */
-#define INIT_ARM_STACK_SIZE 2048
-
-/*
- * This is for kvm_mkdb, and should be the address of the beginning
- * of the kernel text segment (not necessarily the same as kernbase).
- */
-
-
-#define CPWAIT_BRANCH \
- sub pc, pc, #4
-
-#define CPWAIT(tmp) \
- mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ;\
- mov tmp, tmp /* wait for it to complete */ ;\
- CPWAIT_BRANCH /* branch to next insn */
-
- .text
- .align 0
-.globl kernbase
-.set kernbase,KERNBASE
-
-ENTRY_NP(btext)
-
-ASENTRY_NP(_start)
-
-
- /* Check if we are running on RAM, if not move ourself to RAM */
-#if 0
- cmp pc, #PHYSADDR
- bhi start_inram /* XXX: This is wrong */
-#endif
- b start_inram /*
- * XXX: this is even more wrong, but RedBoot
- * use 0x00000000-0x100000000 as virtual
- * addresses for the RAM.
- */
-
- /* move me to RAM
- * XXX: we can use memcpy if it is PIC
- */
- ldr r1, Lcopy_size
- adr r0, _C_LABEL(_start)
- add r1, r1, #3
- mov r1, r1, LSR #2
- mov r2, #PHYSADDR
- add r2, r2, #0x00200000
- mov r4, r2
-
-5: ldr r3,[r0],#4
- str r3,[r2],#4
- subs r1,r1,#1
- bhi 5b
-
- /* Jump to RAM */
- ldr r0, Lstart_off
- add pc, r4, r0
-
-Lcopy_size: .word _edata-_C_LABEL(_start)
-Lstart_off: .word start_inram-_C_LABEL(_start)
-start_inram:
- adr r7, Lunmapped
- bic r7, r7, #0xff000000
- orr r7, r7, #PHYSADDR
-
- /* Disable MMU for a while */
- mrc p15, 0, r2, c1, c0, 0
- bic r2, r2, #CPU_CONTROL_MMU_ENABLE
- mcr p15, 0, r2, c1, c0, 0
-
- nop
- nop
- nop
- mov pc, r7
-Lunmapped:
-
-#ifdef STARTUP_PAGETABLE_ADDR
- /* build page table from scratch */
- ldr r0, Lstartup_pagetable
- adr r4, mmu_init_table
- b 3f
-
-2:
- str r3, [r0, r2]
- add r2, r2, #4
- add r3, r3, #(L1_S_SIZE)
- adds r1, r1, #-1
- bhi 2b
-3:
- ldmia r4!, {r1,r2,r3} /* # of sections, PA|attr, VA */
- cmp r1, #0
- adrne r5, 2b
- bicne r5, r5, #0xff000000
- orrne r5, r5, #PHYSADDR
- movne pc, r5
-
- mcr p15, 0, r0, c2, c0, 0 /* Set TTB */
- mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */
-
- /* Set the Domain Access register. Very important! */
- mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT)
- mcr p15, 0, r0, c3, c0, 0
-
- /* Enable MMU */
- mrc p15, 0, r0, c1, c0, 0
- orr r0, r0, #CPU_CONTROL_MMU_ENABLE
- mcr p15, 0, r0, c1, c0, 0
- CPWAIT(r0)
-
- bl mmu_done
-mmu_done:
-#endif
- adr r1, .Lstart
- ldmia r1, {r1, r2, sp} /* Set initial stack and */
- sub r2, r2, r1 /* get zero init data */
- mov r3, #0
-
-.L1:
- str r3, [r1], #0x0004 /* Zero the bss */
- subs r2, r2, #4
- bgt .L1
-
- ldr r4, =KERNVIRTADDR
- cmp pc, r4
-#if KERNVIRTADDR > KERNPHYSADDR
- bgt virt_done
- ldr r4, =KERNVIRTADDR
- ldr r5, =KERNPHYSADDR
- sub r4, r4, r5
- add pc, pc, r4
-#else
- blt virt_done
- ldr r4, =KERNPHYSADDR
- ldr r5, =KERNVIRTADDR
- sub r4, r4, r5
- sub pc, pc, r4
-#endif
-virt_done:
- ldr fp, =KERNVIRTADDR /* trace back starts here */
- bl _C_LABEL(initarm) /* Off we go */
-
- /* init arm will return the new stack pointer. */
- mov sp, r0
-
- bl _C_LABEL(mi_startup) /* call mi_startup()! */
-
- adr r0, .Lmainreturned
- b _C_LABEL(panic)
- /* NOTEACHED */
-#ifdef STARTUP_PAGETABLE_ADDR
-#define MMU_INIT(va,pa,n_sec,attr) \
- .word n_sec ; \
- .word 4*((va)>>L1_S_SHIFT) ; \
- .word (pa)|(attr) ;
-
-Lstartup_pagetable:
- .word STARTUP_PAGETABLE_ADDR
-mmu_init_table:
- /* fill all table VA==PA */
- /* map SDRAM VA==PA, WT cacheable */
- MMU_INIT(PHYSADDR, PHYSADDR , 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
- /* map VA 0xc0000000..0xc3ffffff to PA */
- MMU_INIT(KERNBASE, PHYSADDR, 64, L1_TYPE_S|L1_S_C|L1_S_AP(AP_KRW))
-
- .word 0 /* end of table */
-#endif
-.Lstart:
- .word _edata
- .word _end
- .word svcstk + INIT_ARM_STACK_SIZE
-
-.Lmainreturned:
- .asciz "main() returned"
- .align 0
-
- .bss
-svcstk:
- .space INIT_ARM_STACK_SIZE
-
- .text
- .align 0
-
-#ifndef OFW
- /* OFW based systems will used OF_boot() */
-
-.Lcpufuncs:
- .word _C_LABEL(cpufuncs)
-
-ENTRY_NP(cpu_halt)
- mrs r2, cpsr
- bic r2, r2, #(PSR_MODE)
- orr r2, r2, #(PSR_SVC32_MODE)
- orr r2, r2, #(I32_bit | F32_bit)
- msr cpsr_all, r2
-
- ldr r4, .Lcpu_reset_address
- ldr r4, [r4]
-
- ldr r0, .Lcpufuncs
- mov lr, pc
- ldr pc, [r0, #CF_IDCACHE_WBINV_ALL]
-
- /*
- * Load the cpu_reset_needs_v4_MMU_disable flag to determine if it's
- * necessary.
- */
-
- ldr r1, .Lcpu_reset_needs_v4_MMU_disable
- ldr r1, [r1]
- cmp r1, #0
- mov r2, #0
-
- /*
- * MMU & IDC off, 32 bit program & data space
- * Hurl ourselves into the ROM
- */
- mov r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
- mcr 15, 0, r0, c1, c0, 0
- mcrne 15, 0, r2, c8, c7, 0 /* nail I+D TLB on ARMv4 and greater */
- mov pc, r4
-
- /*
- * _cpu_reset_address contains the address to branch to, to complete
- * the cpu reset after turning the MMU off
- * This variable is provided by the hardware specific code
- */
-.Lcpu_reset_address:
- .word _C_LABEL(cpu_reset_address)
-
- /*
- * cpu_reset_needs_v4_MMU_disable contains a flag that signals if the
- * v4 MMU disable instruction needs executing... it is an illegal instruction
- * on f.e. ARM6/7 that locks up the computer in an endless illegal
- * instruction / data-abort / reset loop.
- */
-.Lcpu_reset_needs_v4_MMU_disable:
- .word _C_LABEL(cpu_reset_needs_v4_MMU_disable)
-
-#endif /* OFW */
-
-#ifdef IPKDB
-/*
- * Execute(inst, psr, args, sp)
- *
- * Execute INSTruction with PSR and ARGS[0] - ARGS[3] making
- * available stack at SP for next undefined instruction trap.
- *
- * Move the instruction onto the stack and jump to it.
- */
-ENTRY_NP(Execute)
- mov ip, sp
- stmfd sp!, {r2, r4-r7, fp, ip, lr, pc}
- sub fp, ip, #4
- mov ip, r3
- ldr r7, .Lreturn
- stmfd sp!, {r0, r7}
- adr r7, #.LExec
- mov r5, r1
- mrs r4, cpsr
- ldmia r2, {r0-r3}
- mov r6, sp
- mov sp, ip
- msr cpsr_all, r5
- mov pc, r6
-.LExec:
- mrs r5, cpsr
-/* XXX Cannot switch thus easily back from user mode */
- msr cpsr_all, r4
- add sp, r6, #8
- ldmfd sp!, {r6}
- stmia r6, {r0-r3}
- mov r0, r5
- ldmdb fp, {r4-r7, fp, sp, pc}
-.Lreturn:
- mov pc, r7
-#endif
-
-/*
- * setjump + longjmp
- */
-ENTRY(setjmp)
- stmia r0, {r4-r14}
- mov r0, #0x00000000
- RET
-
-ENTRY(longjmp)
- ldmia r0, {r4-r14}
- mov r0, #0x00000001
- RET
-
- .data
- .global _C_LABEL(esym)
-_C_LABEL(esym): .word _C_LABEL(end)
-
-ENTRY_NP(abort)
- b _C_LABEL(abort)
-
-ENTRY_NP(sigcode)
- mov r0, sp
- swi SYS_sigreturn
-
- /* Well if that failed we better exit quick ! */
-
- swi SYS_exit
- b . - 8
-
- .align 0
- .global _C_LABEL(esigcode)
- _C_LABEL(esigcode):
-
- .data
- .global szsigcode
-szsigcode:
- .long esigcode-sigcode
-/* End of locore.S */
--- sys/arm/arm/irq_dispatch.S
+++ /dev/null
@@ -1,117 +0,0 @@
-/* $NetBSD: irq_dispatch.S,v 1.5 2003/10/30 08:57:24 scw Exp $ */
-
-/*-
- * Copyright (c) 2002 Fujitsu Component Limited
- * Copyright (c) 2002 Genetec Corporation
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of The Fujitsu Component Limited nor the name of
- * Genetec corporation may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
- * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
- * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-/*-
- * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "assym.s"
-#include <machine/asm.h>
-#include <machine/asmacros.h>
-#include <machine/armreg.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/irq_dispatch.S,v 1.4 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * irq_entry:
- * Main entry point for the IRQ vector. This is a generic version
- * which can be used by different platforms.
- */
- .text
- .align 0
-
-.Lcurrent_intr_depth:
- .word _C_LABEL(current_intr_depth)
-AST_LOCALS
-
-ASENTRY_NP(irq_entry)
- sub lr, lr, #0x00000004 /* Adjust the lr */
- PUSHFRAMEINSVC /* Push an interrupt frame */
- mov r0, sp /* arg for dispatcher */
-
- mov r1, #0
- bl _C_LABEL(arm_handler_execute)
-
- DO_AST
- PULLFRAMEFROMSVCANDEXIT
- movs pc, lr /* Exit */
-
- .bss
- .align 0
-
-
- .global _C_LABEL(intrnames), _C_LABEL(eintrnames)
- .global _C_LABEL(intrcnt), _C_LABEL(eintrcnt)
-_C_LABEL(intrnames):
- .space NIRQ * (MAXCOMLEN + 1)
-_C_LABEL(eintrnames):
-_C_LABEL(intrcnt):
- .space NIRQ * 4
-_C_LABEL(eintrcnt):
-
- .global _C_LABEL(current_intr_depth)
-_C_LABEL(current_intr_depth):
- .word 0
-
--- sys/arm/arm/vectors.S
+++ /dev/null
@@ -1,104 +0,0 @@
-/* $NetBSD: vectors.S,v 1.4 2002/08/17 16:36:32 thorpej Exp $ */
-
-/*-
- * Copyright (C) 1994-1997 Mark Brinicombe
- * Copyright (C) 1994 Brini
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of Brini may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/vectors.S,v 1.2 2005/01/05 21:58:47 imp Exp $");
-
-/*
- * These are the exception vectors copied down to page 0.
- *
- * Note that FIQs are special; rather than using a level of
- * indirection, we actually copy the FIQ code down into the
- * vector page.
- */
-
- .text
- .align 0
- .global _C_LABEL(page0), _C_LABEL(page0_data), _C_LABEL(page0_end)
- .global _C_LABEL(fiqvector)
-
-_C_LABEL(page0):
- ldr pc, .Lreset_target
- ldr pc, .Lundefined_target
- ldr pc, .Lswi_target
- ldr pc, .Lprefetch_abort_target
- ldr pc, .Ldata_abort_target
- ldr pc, .Laddress_exception_target
- ldr pc, .Lirq_target
-#ifdef __ARM_FIQ_INDIRECT
- ldr pc, .Lfiq_target
-#else
-.Lfiqvector:
- .set _C_LABEL(fiqvector), . - _C_LABEL(page0)
- subs pc, lr, #4
- .org .Lfiqvector + 0x100
-#endif
-
-_C_LABEL(page0_data):
-.Lreset_target:
- .word reset_entry
-
-.Lundefined_target:
- .word undefined_entry
-
-.Lswi_target:
- .word swi_entry
-
-.Lprefetch_abort_target:
- .word prefetch_abort_entry
-
-.Ldata_abort_target:
- .word data_abort_entry
-
-.Laddress_exception_target:
- .word address_exception_entry
-
-.Lirq_target:
- .word irq_entry
-
-#ifdef __ARM_FIQ_INDIRECT
-.Lfiq_target:
- .word _C_LABEL(fiqvector)
-#else
- .word 0 /* pad it out */
-#endif
-_C_LABEL(page0_end):
-
-#ifdef __ARM_FIQ_INDIRECT
- .data
- .align 0
-_C_LABEL(fiqvector):
- subs pc, lr, #4
- .org _C_LABEL(fiqvector) + 0x100
-#endif
--- sys/arm/arm/dump_machdep.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*-
- * Copyright (c) 2004 Olivier Houchard
- * All rights reserved.
- *
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The names of the authors may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/arm/dump_machdep.c,v 1.1 2004/05/14 11:46:42 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/cons.h>
-#include <sys/kernel.h>
-#include <sys/kerneldump.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <machine/md_var.h>
-
-void
-dumpsys(struct dumperinfo *di)
-{
-}
--- sys/arm/conf/.cvsignore
+++ /dev/null
@@ -1 +0,0 @@
-[A-Za-z0-9]*
--- sys/arm/compile/.cvsignore
+++ /dev/null
@@ -1 +0,0 @@
-[A-Za-z0-9]*
--- sys/ia64/conf/SKI
+++ /dev/null
@@ -1,66 +0,0 @@
-#
-# SKI -- Kernel configuration file for FreeBSD/ia64 running in the HP
-# SKI simulator
-#
-# For more information on this file, please read the handbook section on
-# Kernel Configuration Files:
-#
-# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
-#
-# The handbook is also available locally in /usr/share/doc/handbook
-# if you've installed the doc distribution, otherwise always see the
-# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
-# latest information.
-#
-# An exhaustive list of options and more detailed explanations of the
-# device lines is also present in the ../../conf/NOTES and NOTES files.
-# If you are in doubt as to the purpose or necessity of a line, check
-# first in NOTES.
-#
-# $FreeBSD: src/sys/ia64/conf/SKI,v 1.21 2004/09/12 05:50:32 marcel Exp $
-
-machine ia64
-cpu ITANIUM
-ident SKI
-
-makeoptions DEBUG=-g # Build kernel with debug information.
-makeoptions NO_MODULES=yes # Don't build any modules.
-
-options COMPAT_43 # Compatible with BSD 4.3 [KEEP THIS!]
-options DDB # Support DDB
-options FFS # Berkeley Fast Filesystem
-options GDB # Support remote GDB
-options INET # InterNETworking
-options INET6 # IPv6 communications protocols
-options KDB # Enable kernel debugger support
-options KTRACE # ktrace(1) syscall trace support
-options MD_ROOT # MD usable as root device
-options PROCFS # Process filesystem (/proc)
-options PSEUDOFS # Pseudo-filesystem framework
-options SCHED_4BSD # 4BSD scheduler
-#options SCHED_ULE # ULE scheduler
-options SKI # Include SKI support code
-options SOFTUPDATES # Enable FFS soft updates support
-options SYSVMSG # SYSV-style message queues
-options SYSVSEM # SYSV-style semaphores
-options SYSVSHM # SYSV-style shared memory
-options UFS_ACL # Support for access control lists
-options UFS_DIRHASH # Hash-based directory lookup scheme
-options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B RT extensions
-
-# Various "busses"
-device acpi # ACPI support (mandatory)
-device pci # PCI bus support
-
-# Various (pseudo) devices
-device ether # Ethernet support
-device loop # Network loopback
-device md # Memory "disks"
-device mem # Memory and kernel memory devices
-device pty # Pseudo-ttys (telnet etc)
-device random # Entropy device
-device tun # Packet tunnel.
-
-# The `bpf' device enables the Berkeley Packet Filter.
-# Be aware of the administrative consequences of enabling this!
-device bpf # Berkeley packet filter
--- sys/ia64/conf/GENERIC.hints
+++ /dev/null
@@ -1,2 +0,0 @@
-# $FreeBSD: src/sys/ia64/conf/GENERIC.hints,v 1.8 2004/11/14 23:42:48 marcel Exp $
-hw.uart.console="io:0x3f8"
--- sys/ia64/conf/.cvsignore
+++ /dev/null
@@ -1 +0,0 @@
-[A-Za-z0-9]*
--- sys/ia64/conf/NOTES
+++ /dev/null
@@ -1,61 +0,0 @@
-# $FreeBSD: src/sys/ia64/conf/NOTES,v 1.8 2005/02/25 07:10:37 delphij Exp $
-#
-# This file contains machine dependent kernel configuration notes. For
-# machine independent notes, look in /sys/conf/NOTES.
-
-# directive: machine
-# This directive is mandatory. It defines the architecture to be configured
-# for. It can only be ia64 at this time.
-#
-machine ia64
-
-# directive: cpu
-# You must specify at least one CPU (the one you intend to run on). Deleting
-# the support for CPUs you don't need to use may make parts of the system run
-# faster. There's currently no special code for the different CPUs. Note also
-# that the cpu declares the family. We may need to add support for specifying
-# particular models.
-cpu ITANIUM
-cpu ITANIUM2
-
-# option: COMPAT_IA32
-# This option enables the support for execution of i386 (32-bit) programs on
-# ia64. It is based on the ia32 emulation in the processor.
-options COMPAT_IA32
-
-# option: LOG2_ID_PAGE_SIZE
-# Specify the log2 size of the identity (direct) mappings in regions 6 and 7
-# of the virtual address space.
-options LOG2_ID_PAGE_SIZE=27 # 128M
-
-# option: LOG2_PAGE_SIZE
-# Specify the log2 size of the page to be used for virtual memory management.
-# The page size being equal to 1<<LOG2_PAGE_SIZE.
-options LOG2_PAGE_SIZE=15 # 32K
-
-# option: SKI
-# Build support for running under the ski simulator.
-options SKI
-
-# option: UWX_TRACE_ENABLE
-# Build the unwinder with tracing support. This option is used to debug the
-# unwinder itself and the glue around it.
-options UWX_TRACE_ENABLE
-
-# MI options
-options ACPI_DEBUG
-options KSTACK_PAGES=3
-
-device acpi
-
-device agp
-device eisa
-device isa
-device pci
-
-# The following devices are not supported.
-nodevice fdc
-nooption FDC_DEBUG
-nodevice sio
-nooption COM_ESP
-nooption CONSPEED
--- sys/ia64/conf/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# $FreeBSD: src/sys/ia64/conf/Makefile,v 1.1 2003/08/23 21:47:32 marcel Exp $
-
-.include "${.CURDIR}/../../conf/makeLINT.mk"
--- sys/ia64/disasm/disasm_int.h
+++ /dev/null
@@ -1,216 +0,0 @@
-/*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/disasm/disasm_int.h,v 1.2 2005/01/06 22:18:22 imp Exp $
- */
-
-#ifndef _DISASM_INT_H_
-#define _DISASM_INT_H_
-
-#ifdef _DISASM_H_
-#error Include disasm_int.h before disasm.h
-#endif
-
-/*
- * Instruction bundle specifics.
- */
-#define TMPL_BITS 5
-#define SLOT_BITS 41
-#define SLOT_COUNT 3
-
-#define BUNDLE_SIZE (SLOT_COUNT * SLOT_BITS + TMPL_BITS)
-#define BUNDLE_BYTES ((BUNDLE_SIZE+7) >> 3)
-#define TMPL_MASK ((1 << TMPL_BITS) - 1)
-#define SLOT_MASK ((1ULL << SLOT_BITS) - 1ULL)
-#define TMPL(p) (*(const uint8_t*)(p) & TMPL_MASK)
-#define _U32(p,i) ((uint64_t)(((const uint32_t*)(p))[i]))
-#define _SLOT(p,i) (_U32(p,i) | (_U32(p,(i)+1)<<32))
-#define SLOT(p,i) ((_SLOT(p,i) >> (TMPL_BITS+((i)<<3)+(i))) & SLOT_MASK)
-
-/*
- * Instruction specifics
- */
-#define _FLD64(i,o,l) ((i >> o) & ((1LL << l) - 1LL))
-#define FIELD(i,o,l) ((uint32_t)_FLD64(i,o,l))
-#define OPCODE(i) FIELD(i, 37, 4)
-#define QP_BITS 6
-#define QP(i) FIELD(i, 0, QP_BITS)
-#define REG_BITS 7
-#define REG(i,r) FIELD(i, ((r) - 1) * REG_BITS + QP_BITS, REG_BITS)
-
-/*
- * Opcodes used internally as sentinels to denote either a lack of more
- * specific information or to preserve the additional state/information
- * we already have and need to pass around for later use.
- */
-#define ASM_ADDITIONAL_OPCODES \
- ASM_OP_INTERNAL_OPCODES, \
- ASM_OP_BR_CALL, ASM_OP_BR_CEXIT, ASM_OP_BR_CLOOP, \
- ASM_OP_BR_COND, ASM_OP_BR_CTOP, ASM_OP_BR_IA, ASM_OP_BR_RET, \
- ASM_OP_BR_WEXIT, ASM_OP_BR_WTOP, \
- ASM_OP_BREAK_B, ASM_OP_BREAK_F, ASM_OP_BREAK_I, ASM_OP_BREAK_M, \
- ASM_OP_BREAK_X, \
- ASM_OP_BRL_COND, ASM_OP_BRL_CALL, \
- ASM_OP_BRP_, ASM_OP_BRP_RET, \
- ASM_OP_BSW_0, ASM_OP_BSW_1, \
- ASM_OP_CHK_A_CLR, ASM_OP_CHK_A_NC, ASM_OP_CHK_S, \
- ASM_OP_CHK_S_I, ASM_OP_CHK_S_M, \
- ASM_OP_CLRRRB_, ASM_OP_CLRRRB_PR, \
- ASM_OP_CMP_EQ, ASM_OP_CMP_EQ_AND, ASM_OP_CMP_EQ_OR, \
- ASM_OP_CMP_EQ_OR_ANDCM, ASM_OP_CMP_EQ_UNC, ASM_OP_CMP_GE_AND, \
- ASM_OP_CMP_GE_OR, ASM_OP_CMP_GE_OR_ANDCM, ASM_OP_CMP_GT_AND, \
- ASM_OP_CMP_GT_OR, ASM_OP_CMP_GT_OR_ANDCM, ASM_OP_CMP_LE_AND, \
- ASM_OP_CMP_LE_OR, ASM_OP_CMP_LE_OR_ANDCM, ASM_OP_CMP_LT, \
- ASM_OP_CMP_LT_AND, ASM_OP_CMP_LT_OR, ASM_OP_CMP_LT_OR_ANDCM, \
- ASM_OP_CMP_LT_UNC, ASM_OP_CMP_LTU, ASM_OP_CMP_LTU_UNC, \
- ASM_OP_CMP_NE_AND, ASM_OP_CMP_NE_OR, ASM_OP_CMP_NE_OR_ANDCM, \
- ASM_OP_CMP4_EQ, ASM_OP_CMP4_EQ_AND, ASM_OP_CMP4_EQ_OR, \
- ASM_OP_CMP4_EQ_OR_ANDCM, ASM_OP_CMP4_EQ_UNC, ASM_OP_CMP4_GE_AND,\
- ASM_OP_CMP4_GE_OR, ASM_OP_CMP4_GE_OR_ANDCM, ASM_OP_CMP4_GT_AND, \
- ASM_OP_CMP4_GT_OR, ASM_OP_CMP4_GT_OR_ANDCM, ASM_OP_CMP4_LE_AND, \
- ASM_OP_CMP4_LE_OR, ASM_OP_CMP4_LE_OR_ANDCM, ASM_OP_CMP4_LT, \
- ASM_OP_CMP4_LT_AND, ASM_OP_CMP4_LT_OR, ASM_OP_CMP4_LT_OR_ANDCM, \
- ASM_OP_CMP4_LT_UNC, ASM_OP_CMP4_LTU, ASM_OP_CMP4_LTU_UNC, \
- ASM_OP_CMP4_NE_AND, ASM_OP_CMP4_NE_OR, ASM_OP_CMP4_NE_OR_ANDCM, \
- ASM_OP_CMP8XCHG16_ACQ, ASM_OP_CMP8XCHG16_REL, \
- ASM_OP_CMPXCHG1_ACQ, ASM_OP_CMPXCHG1_REL, \
- ASM_OP_CMPXCHG2_ACQ, ASM_OP_CMPXCHG2_REL, \
- ASM_OP_CMPXCHG4_ACQ, ASM_OP_CMPXCHG4_REL, \
- ASM_OP_CMPXCHG8_ACQ, ASM_OP_CMPXCHG8_REL, \
- ASM_OP_CZX1_L, ASM_OP_CZX1_R, \
- ASM_OP_CZX2_L, ASM_OP_CZX2_R, \
- ASM_OP_DEP_, ASM_OP_DEP_Z, \
- ASM_OP_FC_, ASM_OP_FC_I, \
- ASM_OP_FCLASS_M, \
- ASM_OP_FCVT_FX, ASM_OP_FCVT_FX_TRUNC, ASM_OP_FCVT_FXU, \
- ASM_OP_FCVT_FXU_TRUNC, ASM_OP_FCVT_XF, \
- ASM_OP_FETCHADD4_ACQ, ASM_OP_FETCHADD4_REL, \
- ASM_OP_FETCHADD8_ACQ, ASM_OP_FETCHADD8_REL, \
- ASM_OP_FMA_, ASM_OP_FMA_D, ASM_OP_FMA_S, \
- ASM_OP_FMERGE_NS, ASM_OP_FMERGE_S, ASM_OP_FMERGE_SE, \
- ASM_OP_FMIX_L, ASM_OP_FMIX_LR, ASM_OP_FMIX_R, \
- ASM_OP_FMS_, ASM_OP_FMS_D, ASM_OP_FMS_S, \
- ASM_OP_FNMA_, ASM_OP_FNMA_D, ASM_OP_FNMA_S, \
- ASM_OP_FPCMP_EQ, ASM_OP_FPCMP_LE, ASM_OP_FPCMP_LT, \
- ASM_OP_FPCMP_NEQ, ASM_OP_FPCMP_NLE, ASM_OP_FPCMP_NLT, \
- ASM_OP_FPCMP_ORD, ASM_OP_FPCMP_UNORD, \
- ASM_OP_FPCVT_FX, ASM_OP_FPCVT_FX_TRUNC, ASM_OP_FPCVT_FXU, \
- ASM_OP_FPCVT_FXU_TRUNC, \
- ASM_OP_FPMERGE_NS, ASM_OP_FPMERGE_S, ASM_OP_FPMERGE_SE, \
- ASM_OP_FSWAP_, ASM_OP_FSWAP_NL, ASM_OP_FSWAP_NR, \
- ASM_OP_FSXT_L, ASM_OP_FSXT_R, \
- ASM_OP_GETF_D, ASM_OP_GETF_EXP, ASM_OP_GETF_S, ASM_OP_GETF_SIG, \
- ASM_OP_INVALA_, ASM_OP_INVALA_E, \
- ASM_OP_ITC_D, ASM_OP_ITC_I, \
- ASM_OP_ITR_D, ASM_OP_ITR_I, \
- ASM_OP_LD1_, ASM_OP_LD1_A, ASM_OP_LD1_ACQ, ASM_OP_LD1_BIAS, \
- ASM_OP_LD1_C_CLR, ASM_OP_LD1_C_CLR_ACQ, ASM_OP_LD1_C_NC, \
- ASM_OP_LD1_S, ASM_OP_LD1_SA, \
- ASM_OP_LD16_, ASM_OP_LD16_ACQ, \
- ASM_OP_LD2_, ASM_OP_LD2_A, ASM_OP_LD2_ACQ, ASM_OP_LD2_BIAS, \
- ASM_OP_LD2_C_CLR, ASM_OP_LD2_C_CLR_ACQ, ASM_OP_LD2_C_NC, \
- ASM_OP_LD2_S, ASM_OP_LD2_SA, \
- ASM_OP_LD4_, ASM_OP_LD4_A, ASM_OP_LD4_ACQ, ASM_OP_LD4_BIAS, \
- ASM_OP_LD4_C_CLR, ASM_OP_LD4_C_CLR_ACQ, ASM_OP_LD4_C_NC, \
- ASM_OP_LD4_S, ASM_OP_LD4_SA, \
- ASM_OP_LD8_, ASM_OP_LD8_A, ASM_OP_LD8_ACQ, ASM_OP_LD8_BIAS, \
- ASM_OP_LD8_C_CLR, ASM_OP_LD8_C_CLR_ACQ, ASM_OP_LD8_C_NC, \
- ASM_OP_LD8_FILL, ASM_OP_LD8_S, ASM_OP_LD8_SA, \
- ASM_OP_LDF_FILL, \
- ASM_OP_LDF8_, ASM_OP_LDF8_A, ASM_OP_LDF8_C_CLR, \
- ASM_OP_LDF8_C_NC, ASM_OP_LDF8_S, ASM_OP_LDF8_SA, \
- ASM_OP_LDFD_, ASM_OP_LDFD_A, ASM_OP_LDFD_C_CLR, \
- ASM_OP_LDFD_C_NC, ASM_OP_LDFD_S, ASM_OP_LDFD_SA, \
- ASM_OP_LDFE_, ASM_OP_LDFE_A, ASM_OP_LDFE_C_CLR, \
- ASM_OP_LDFE_C_NC, ASM_OP_LDFE_S, ASM_OP_LDFE_SA, \
- ASM_OP_LDFP8_, ASM_OP_LDFP8_A, ASM_OP_LDFP8_C_CLR, \
- ASM_OP_LDFP8_C_NC, ASM_OP_LDFP8_S, ASM_OP_LDFP8_SA, \
- ASM_OP_LDFPD_, ASM_OP_LDFPD_A, ASM_OP_LDFPD_C_CLR, \
- ASM_OP_LDFPD_C_NC, ASM_OP_LDFPD_S, ASM_OP_LDFPD_SA, \
- ASM_OP_LDFPS_, ASM_OP_LDFPS_A, ASM_OP_LDFPS_C_CLR, \
- ASM_OP_LDFPS_C_NC, ASM_OP_LDFPS_S, ASM_OP_LDFPS_SA, \
- ASM_OP_LDFS_, ASM_OP_LDFS_A, ASM_OP_LDFS_C_CLR, \
- ASM_OP_LDFS_C_NC, ASM_OP_LDFS_S, ASM_OP_LDFS_SA, \
- ASM_OP_LFETCH_, ASM_OP_LFETCH_EXCL, ASM_OP_LFETCH_FAULT, \
- ASM_OP_LFETCH_FAULT_EXCL, \
- ASM_OP_MF_, ASM_OP_MF_A, \
- ASM_OP_MIX1_L, ASM_OP_MIX1_R, \
- ASM_OP_MIX2_L, ASM_OP_MIX2_R, \
- ASM_OP_MIX4_L, ASM_OP_MIX4_R, \
- ASM_OP_MOV_, ASM_OP_MOV_CPUID, ASM_OP_MOV_DBR, ASM_OP_MOV_I, \
- ASM_OP_MOV_IBR, ASM_OP_MOV_IP, ASM_OP_MOV_M, ASM_OP_MOV_MSR, \
- ASM_OP_MOV_PKR, ASM_OP_MOV_PMC, ASM_OP_MOV_PMD, ASM_OP_MOV_PR, \
- ASM_OP_MOV_PSR, ASM_OP_MOV_PSR_L, ASM_OP_MOV_PSR_UM, \
- ASM_OP_MOV_RET, ASM_OP_MOV_RR, \
- ASM_OP_NOP_B, ASM_OP_NOP_F, ASM_OP_NOP_I, ASM_OP_NOP_M, \
- ASM_OP_NOP_X, \
- ASM_OP_PACK2_SSS, ASM_OP_PACK2_USS, \
- ASM_OP_PACK4_SSS, \
- ASM_OP_PADD1_, ASM_OP_PADD1_SSS, ASM_OP_PADD1_UUS, \
- ASM_OP_PADD1_UUU, \
- ASM_OP_PADD2_, ASM_OP_PADD2_SSS, ASM_OP_PADD2_UUS, \
- ASM_OP_PADD2_UUU, \
- ASM_OP_PAVG1_, ASM_OP_PAVG1_RAZ, \
- ASM_OP_PAVG2_, ASM_OP_PAVG2_RAZ, \
- ASM_OP_PCMP1_EQ, ASM_OP_PCMP1_GT, \
- ASM_OP_PCMP2_EQ, ASM_OP_PCMP2_GT, \
- ASM_OP_PCMP4_EQ, ASM_OP_PCMP4_GT, \
- ASM_OP_PMAX1_U, \
- ASM_OP_PMIN1_U, \
- ASM_OP_PMPY2_L, ASM_OP_PMPY2_R, \
- ASM_OP_PMPYSHR2_, ASM_OP_PMPYSHR2_U, \
- ASM_OP_PROBE_R, ASM_OP_PROBE_R_FAULT, ASM_OP_PROBE_RW_FAULT, \
- ASM_OP_PROBE_W, ASM_OP_PROBE_W_FAULT, \
- ASM_OP_PSHR2_, ASM_OP_PSHR2_U, \
- ASM_OP_PSHR4_, ASM_OP_PSHR4_U, \
- ASM_OP_PSUB1_, ASM_OP_PSUB1_SSS, ASM_OP_PSUB1_UUS, \
- ASM_OP_PSUB1_UUU, \
- ASM_OP_PSUB2_, ASM_OP_PSUB2_SSS, ASM_OP_PSUB2_UUS, \
- ASM_OP_PSUB2_UUU, \
- ASM_OP_PTC_E, ASM_OP_PTC_G, ASM_OP_PTC_GA, ASM_OP_PTC_L, \
- ASM_OP_PTR_D, ASM_OP_PTR_I, \
- ASM_OP_SETF_EXP, ASM_OP_SETF_D, ASM_OP_SETF_S, ASM_OP_SETF_SIG, \
- ASM_OP_SHR_, ASM_OP_SHR_U, \
- ASM_OP_SRLZ_D, ASM_OP_SRLZ_I, \
- ASM_OP_ST1_, ASM_OP_ST1_REL, \
- ASM_OP_ST16_, ASM_OP_ST16_REL, \
- ASM_OP_ST2_, ASM_OP_ST2_REL, \
- ASM_OP_ST4_, ASM_OP_ST4_REL, \
- ASM_OP_ST8_, ASM_OP_ST8_REL, ASM_OP_ST8_SPILL, \
- ASM_OP_STF_SPILL, \
- ASM_OP_SYNC_I, \
- ASM_OP_TBIT_NZ_AND, ASM_OP_TBIT_NZ_OR, ASM_OP_TBIT_NZ_OR_ANDCM, \
- ASM_OP_TBIT_Z, ASM_OP_TBIT_Z_AND, ASM_OP_TBIT_Z_OR, \
- ASM_OP_TBIT_Z_OR_ANDCM, ASM_OP_TBIT_Z_UNC, \
- ASM_OP_TNAT_NZ_AND, ASM_OP_TNAT_NZ_OR, ASM_OP_TNAT_NZ_OR_ANDCM, \
- ASM_OP_TNAT_Z, ASM_OP_TNAT_Z_AND, ASM_OP_TNAT_Z_OR, \
- ASM_OP_TNAT_Z_OR_ANDCM, ASM_OP_TNAT_Z_UNC, \
- ASM_OP_UNPACK1_H, ASM_OP_UNPACK1_L, \
- ASM_OP_UNPACK2_H, ASM_OP_UNPACK2_L, \
- ASM_OP_UNPACK4_H, ASM_OP_UNPACK4_L, \
- ASM_OP_XMA_H, ASM_OP_XMA_HU, ASM_OP_XMA_L, \
- ASM_OP_NUMBER_OF_OPCODES
-
-#endif /* _DISASM_INT_H_ */
--- sys/ia64/disasm/disasm_extract.c
+++ /dev/null
@@ -1,2519 +0,0 @@
-/*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/disasm/disasm_extract.c,v 1.2 2005/01/06 22:18:22 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <machine/stdarg.h>
-
-#include <ia64/disasm/disasm_int.h>
-#include <ia64/disasm/disasm.h>
-
-#define FRAG(o,l) ((int)((o << 8) | (l & 0xff)))
-#define FRAG_OFS(f) (f >> 8)
-#define FRAG_LEN(f) (f & 0xff)
-
-/*
- * Support functions.
- */
-static void
-asm_cmpltr_add(struct asm_inst *i, enum asm_cmpltr_class c,
- enum asm_cmpltr_type t)
-{
-
- i->i_cmpltr[i->i_ncmpltrs].c_class = c;
- i->i_cmpltr[i->i_ncmpltrs].c_type = t;
- i->i_ncmpltrs++;
- KASSERT(i->i_ncmpltrs < 6, ("foo"));
-}
-
-static void
-asm_hint(struct asm_inst *i, enum asm_cmpltr_class c)
-{
-
- switch (FIELD(i->i_bits, 28, 2)) { /* hint */
- case 0:
- asm_cmpltr_add(i, c, ASM_CT_NONE);
- break;
- case 1:
- asm_cmpltr_add(i, c, ASM_CT_NT1);
- break;
- case 2:
- asm_cmpltr_add(i, c, ASM_CT_NT2);
- break;
- case 3:
- asm_cmpltr_add(i, c, ASM_CT_NTA);
- break;
- }
-}
-
-static void
-asm_sf(struct asm_inst *i)
-{
-
- switch (FIELD(i->i_bits, 34, 2)) {
- case 0:
- asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S0);
- break;
- case 1:
- asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S1);
- break;
- case 2:
- asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S2);
- break;
- case 3:
- asm_cmpltr_add(i, ASM_CC_SF, ASM_CT_S3);
- break;
- }
-}
-
-static void
-asm_brhint(struct asm_inst *i)
-{
- uint64_t bits = i->i_bits;
-
- switch (FIELD(bits, 33, 2)) { /* bwh */
- case 0:
- asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPTK);
- break;
- case 1:
- asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_SPNT);
- break;
- case 2:
- asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPTK);
- break;
- case 3:
- asm_cmpltr_add(i, ASM_CC_BWH, ASM_CT_DPNT);
- break;
- }
-
- if (FIELD(bits, 12, 1)) /* ph */
- asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY);
- else
- asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW);
-
- if (FIELD(bits, 35, 1)) /* dh */
- asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_CLR);
- else
- asm_cmpltr_add(i, ASM_CC_DH, ASM_CT_NONE);
-}
-
-static void
-asm_brphint(struct asm_inst *i)
-{
- uint64_t bits = i->i_bits;
-
- switch (FIELD(bits, 3, 2)) { /* ipwh, indwh */
- case 0:
- asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_SPTK);
- break;
- case 1:
- asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_LOOP);
- break;
- case 2:
- asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_DPTK);
- break;
- case 3:
- asm_cmpltr_add(i, ASM_CC_IPWH, ASM_CT_EXIT);
- break;
- }
-
- if (FIELD(bits, 5, 1)) /* ph */
- asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_MANY);
- else
- asm_cmpltr_add(i, ASM_CC_PH, ASM_CT_FEW);
-
- switch (FIELD(bits, 0, 3)) { /* pvec */
- case 0:
- asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_DC);
- break;
- case 1:
- asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_DC_NT);
- break;
- case 2:
- asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_DC);
- break;
- case 3:
- asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_TK);
- break;
- case 4:
- asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_TK_NT);
- break;
- case 5:
- asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_DC);
- break;
- case 6:
- asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_TK);
- break;
- case 7:
- asm_cmpltr_add(i, ASM_CC_PVEC, ASM_CT_NT_NT);
- break;
- }
-
- if (FIELD(bits, 35, 1)) /* ih */
- asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP);
- else
- asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE);
-}
-
-static enum asm_oper_type
-asm_normalize(struct asm_inst *i, enum asm_op op)
-{
- enum asm_oper_type ot = ASM_OPER_NONE;
-
- switch (op) {
- case ASM_OP_BR_CALL:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BR_CEXIT:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CEXIT);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BR_CLOOP:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CLOOP);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BR_COND:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BR_CTOP:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CTOP);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BR_IA:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_IA);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BR_RET:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BR_WEXIT:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WEXIT);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BR_WTOP:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_WTOP);
- op = ASM_OP_BR;
- break;
- case ASM_OP_BREAK_B:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
- op = ASM_OP_BREAK;
- break;
- case ASM_OP_BREAK_F:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
- op = ASM_OP_BREAK;
- break;
- case ASM_OP_BREAK_I:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
- op = ASM_OP_BREAK;
- break;
- case ASM_OP_BREAK_M:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
- op = ASM_OP_BREAK;
- break;
- case ASM_OP_BREAK_X:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
- op = ASM_OP_BREAK;
- break;
- case ASM_OP_BRL_COND:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_COND);
- op = ASM_OP_BRL;
- break;
- case ASM_OP_BRL_CALL:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_CALL);
- op = ASM_OP_BRL;
- break;
- case ASM_OP_BRP_:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_NONE);
- op = ASM_OP_BRP;
- break;
- case ASM_OP_BRP_RET:
- asm_cmpltr_add(i, ASM_CC_BTYPE, ASM_CT_RET);
- op = ASM_OP_BRP;
- break;
- case ASM_OP_BSW_0:
- asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_0);
- op = ASM_OP_BSW;
- break;
- case ASM_OP_BSW_1:
- asm_cmpltr_add(i, ASM_CC_BSW, ASM_CT_1);
- op = ASM_OP_BSW;
- break;
- case ASM_OP_CHK_A_CLR:
- asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A);
- asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_CLR);
- op = ASM_OP_CHK;
- break;
- case ASM_OP_CHK_A_NC:
- asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_A);
- asm_cmpltr_add(i, ASM_CC_ACLR, ASM_CT_NC);
- op = ASM_OP_CHK;
- break;
- case ASM_OP_CHK_S:
- asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
- op = ASM_OP_CHK;
- break;
- case ASM_OP_CHK_S_I:
- asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
- op = ASM_OP_CHK;
- break;
- case ASM_OP_CHK_S_M:
- asm_cmpltr_add(i, ASM_CC_CHK, ASM_CT_S);
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
- op = ASM_OP_CHK;
- break;
- case ASM_OP_CLRRRB_:
- asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_NONE);
- op = ASM_OP_CLRRRB;
- break;
- case ASM_OP_CLRRRB_PR:
- asm_cmpltr_add(i, ASM_CC_CLRRRB, ASM_CT_PR);
- op = ASM_OP_CLRRRB;
- break;
- case ASM_OP_CMP_EQ:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_EQ_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_EQ_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_EQ_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_EQ_UNC:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_GE_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_GE_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_GE_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_GT_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_GT_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_GT_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LE_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LE_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LE_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LT:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LT_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LT_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LT_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LT_UNC:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LTU:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_LTU_UNC:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_NE_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_NE_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP_NE_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP;
- break;
- case ASM_OP_CMP4_EQ:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_EQ_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_EQ_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_EQ_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_EQ_UNC:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_EQ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_GE_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_GE_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_GE_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_GT_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_GT_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_GT_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_GT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LE_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LE_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LE_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LT:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LT_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LT_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LT_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LT_UNC:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LT);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LTU:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_LTU_UNC:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_LTU);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_NE_AND:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_NE_OR:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP4_NE_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_CREL, ASM_CT_NE);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_CMP4;
- break;
- case ASM_OP_CMP8XCHG16_ACQ:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
- op = ASM_OP_CMP8XCHG16;
- break;
- case ASM_OP_CMP8XCHG16_REL:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
- op = ASM_OP_CMP8XCHG16;
- break;
- case ASM_OP_CMPXCHG1_ACQ:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
- op = ASM_OP_CMPXCHG1;
- break;
- case ASM_OP_CMPXCHG1_REL:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
- op = ASM_OP_CMPXCHG1;
- break;
- case ASM_OP_CMPXCHG2_ACQ:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
- op = ASM_OP_CMPXCHG2;
- break;
- case ASM_OP_CMPXCHG2_REL:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
- op = ASM_OP_CMPXCHG2;
- break;
- case ASM_OP_CMPXCHG4_ACQ:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
- op = ASM_OP_CMPXCHG4;
- break;
- case ASM_OP_CMPXCHG4_REL:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
- op = ASM_OP_CMPXCHG4;
- break;
- case ASM_OP_CMPXCHG8_ACQ:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
- op = ASM_OP_CMPXCHG8;
- break;
- case ASM_OP_CMPXCHG8_REL:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
- op = ASM_OP_CMPXCHG8;
- break;
- case ASM_OP_CZX1_L:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
- op = ASM_OP_CZX1;
- break;
- case ASM_OP_CZX1_R:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
- op = ASM_OP_CZX1;
- break;
- case ASM_OP_CZX2_L:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
- op = ASM_OP_CZX2;
- break;
- case ASM_OP_CZX2_R:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
- op = ASM_OP_CZX2;
- break;
- case ASM_OP_DEP_:
- asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_NONE);
- op = ASM_OP_DEP;
- break;
- case ASM_OP_DEP_Z:
- asm_cmpltr_add(i, ASM_CC_DEP, ASM_CT_Z);
- op = ASM_OP_DEP;
- break;
- case ASM_OP_FC_:
- asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_NONE);
- op = ASM_OP_FC;
- break;
- case ASM_OP_FC_I:
- asm_cmpltr_add(i, ASM_CC_FC, ASM_CT_I);
- op = ASM_OP_FC;
- break;
- case ASM_OP_FCLASS_M:
- asm_cmpltr_add(i, ASM_CC_FCREL, ASM_CT_M);
- op = ASM_OP_FCLASS;
- break;
- case ASM_OP_FCVT_FX:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
- op = ASM_OP_FCVT;
- break;
- case ASM_OP_FCVT_FX_TRUNC:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
- op = ASM_OP_FCVT;
- break;
- case ASM_OP_FCVT_FXU:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
- op = ASM_OP_FCVT;
- break;
- case ASM_OP_FCVT_FXU_TRUNC:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
- op = ASM_OP_FCVT;
- break;
- case ASM_OP_FCVT_XF:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_XF);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
- op = ASM_OP_FCVT;
- break;
- case ASM_OP_FETCHADD4_ACQ:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
- op = ASM_OP_FETCHADD4;
- break;
- case ASM_OP_FETCHADD4_REL:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
- op = ASM_OP_FETCHADD4;
- break;
- case ASM_OP_FETCHADD8_ACQ:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_ACQ);
- op = ASM_OP_FETCHADD8;
- break;
- case ASM_OP_FETCHADD8_REL:
- asm_cmpltr_add(i, ASM_CC_SEM, ASM_CT_REL);
- op = ASM_OP_FETCHADD8;
- break;
- case ASM_OP_FMA_:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
- op = ASM_OP_FMA;
- break;
- case ASM_OP_FMA_D:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
- op = ASM_OP_FMA;
- break;
- case ASM_OP_FMA_S:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
- op = ASM_OP_FMA;
- break;
- case ASM_OP_FMERGE_NS:
- asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS);
- op = ASM_OP_FMERGE;
- break;
- case ASM_OP_FMERGE_S:
- asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S);
- op = ASM_OP_FMERGE;
- break;
- case ASM_OP_FMERGE_SE:
- asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE);
- op = ASM_OP_FMERGE;
- break;
- case ASM_OP_FMIX_L:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
- op = ASM_OP_FMIX;
- break;
- case ASM_OP_FMIX_LR:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_LR);
- op = ASM_OP_FMIX;
- break;
- case ASM_OP_FMIX_R:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
- op = ASM_OP_FMIX;
- break;
- case ASM_OP_FMS_:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
- op = ASM_OP_FMS;
- break;
- case ASM_OP_FMS_D:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
- op = ASM_OP_FMS;
- break;
- case ASM_OP_FMS_S:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
- op = ASM_OP_FMS;
- break;
- case ASM_OP_FNMA_:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_NONE);
- op = ASM_OP_FNMA;
- break;
- case ASM_OP_FNMA_D:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_D);
- op = ASM_OP_FNMA;
- break;
- case ASM_OP_FNMA_S:
- asm_cmpltr_add(i, ASM_CC_PC, ASM_CT_S);
- op = ASM_OP_FNMA;
- break;
- case ASM_OP_FPCMP_EQ:
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ);
- op = ASM_OP_FPCMP;
- break;
- case ASM_OP_FPCMP_LE:
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE);
- op = ASM_OP_FPCMP;
- break;
- case ASM_OP_FPCMP_LT:
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT);
- op = ASM_OP_FPCMP;
- break;
- case ASM_OP_FPCMP_NEQ:
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NEQ);
- op = ASM_OP_FPCMP;
- break;
- case ASM_OP_FPCMP_NLE:
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLE);
- op = ASM_OP_FPCMP;
- break;
- case ASM_OP_FPCMP_NLT:
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_NLT);
- op = ASM_OP_FPCMP;
- break;
- case ASM_OP_FPCMP_ORD:
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_ORD);
- op = ASM_OP_FPCMP;
- break;
- case ASM_OP_FPCMP_UNORD:
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD);
- op = ASM_OP_FPCMP;
- break;
- case ASM_OP_FPCVT_FX:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
- op = ASM_OP_FPCVT;
- break;
- case ASM_OP_FPCVT_FX_TRUNC:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FX);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
- op = ASM_OP_FPCVT;
- break;
- case ASM_OP_FPCVT_FXU:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_NONE);
- op = ASM_OP_FPCVT;
- break;
- case ASM_OP_FPCVT_FXU_TRUNC:
- asm_cmpltr_add(i, ASM_CC_FCVT, ASM_CT_FXU);
- asm_cmpltr_add(i, ASM_CC_TRUNC, ASM_CT_TRUNC);
- op = ASM_OP_FPCVT;
- break;
- case ASM_OP_FPMERGE_NS:
- asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_NS);
- op = ASM_OP_FPMERGE;
- break;
- case ASM_OP_FPMERGE_S:
- asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_S);
- op = ASM_OP_FPMERGE;
- break;
- case ASM_OP_FPMERGE_SE:
- asm_cmpltr_add(i, ASM_CC_FMERGE, ASM_CT_SE);
- op = ASM_OP_FPMERGE;
- break;
- case ASM_OP_FSWAP_:
- asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NONE);
- op = ASM_OP_FSWAP;
- break;
- case ASM_OP_FSWAP_NL:
- asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NL);
- op = ASM_OP_FSWAP;
- break;
- case ASM_OP_FSWAP_NR:
- asm_cmpltr_add(i, ASM_CC_FSWAP, ASM_CT_NR);
- op = ASM_OP_FSWAP;
- break;
- case ASM_OP_FSXT_L:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
- op = ASM_OP_FSXT;
- break;
- case ASM_OP_FSXT_R:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
- op = ASM_OP_FSXT;
- break;
- case ASM_OP_GETF_D:
- asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_D);
- op = ASM_OP_GETF;
- break;
- case ASM_OP_GETF_EXP:
- asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_EXP);
- op = ASM_OP_GETF;
- break;
- case ASM_OP_GETF_S:
- asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_S);
- op = ASM_OP_GETF;
- break;
- case ASM_OP_GETF_SIG:
- asm_cmpltr_add(i, ASM_CC_GETF, ASM_CT_SIG);
- op = ASM_OP_GETF;
- break;
- case ASM_OP_INVALA_:
- asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_NONE);
- op = ASM_OP_INVALA;
- break;
- case ASM_OP_INVALA_E:
- asm_cmpltr_add(i, ASM_CC_INVALA, ASM_CT_E);
- op = ASM_OP_INVALA;
- break;
- case ASM_OP_ITC_D:
- asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_D);
- op = ASM_OP_ITC;
- break;
- case ASM_OP_ITC_I:
- asm_cmpltr_add(i, ASM_CC_ITC, ASM_CT_I);
- op = ASM_OP_ITC;
- break;
- case ASM_OP_ITR_D:
- asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_D);
- ot = ASM_OPER_DTR;
- op = ASM_OP_ITR;
- break;
- case ASM_OP_ITR_I:
- asm_cmpltr_add(i, ASM_CC_ITR, ASM_CT_I);
- ot = ASM_OPER_ITR;
- op = ASM_OP_ITR;
- break;
- case ASM_OP_LD1_:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD1_A:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD1_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD1_BIAS:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD1_C_CLR:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD1_C_CLR_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD1_C_NC:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD1_S:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD1_SA:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
- op = ASM_OP_LD1;
- break;
- case ASM_OP_LD16_:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
- op = ASM_OP_LD16;
- break;
- case ASM_OP_LD16_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
- op = ASM_OP_LD16;
- break;
- case ASM_OP_LD2_:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD2_A:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD2_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD2_BIAS:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD2_C_CLR:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD2_C_CLR_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD2_C_NC:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD2_S:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD2_SA:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
- op = ASM_OP_LD2;
- break;
- case ASM_OP_LD4_:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD4_A:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD4_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD4_BIAS:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD4_C_CLR:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD4_C_CLR_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD4_C_NC:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD4_S:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD4_SA:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
- op = ASM_OP_LD4;
- break;
- case ASM_OP_LD8_:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_NONE);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_A:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_A);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_ACQ);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_BIAS:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_BIAS);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_C_CLR:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_C_CLR_ACQ:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_CLR_ACQ);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_C_NC:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_FILL:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_FILL);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_S:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_S);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LD8_SA:
- asm_cmpltr_add(i, ASM_CC_LDTYPE, ASM_CT_SA);
- op = ASM_OP_LD8;
- break;
- case ASM_OP_LDF_FILL:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_FILL);
- op = ASM_OP_LDF;
- break;
- case ASM_OP_LDF8_:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
- op = ASM_OP_LDF8;
- break;
- case ASM_OP_LDF8_A:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
- op = ASM_OP_LDF8;
- break;
- case ASM_OP_LDF8_C_CLR:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LDF8;
- break;
- case ASM_OP_LDF8_C_NC:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LDF8;
- break;
- case ASM_OP_LDF8_S:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
- op = ASM_OP_LDF8;
- break;
- case ASM_OP_LDF8_SA:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
- op = ASM_OP_LDF8;
- break;
- case ASM_OP_LDFD_:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
- op = ASM_OP_LDFD;
- break;
- case ASM_OP_LDFD_A:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
- op = ASM_OP_LDFD;
- break;
- case ASM_OP_LDFD_C_CLR:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LDFD;
- break;
- case ASM_OP_LDFD_C_NC:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LDFD;
- break;
- case ASM_OP_LDFD_S:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
- op = ASM_OP_LDFD;
- break;
- case ASM_OP_LDFD_SA:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
- op = ASM_OP_LDFD;
- break;
- case ASM_OP_LDFE_:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
- op = ASM_OP_LDFE;
- break;
- case ASM_OP_LDFE_A:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
- op = ASM_OP_LDFE;
- break;
- case ASM_OP_LDFE_C_CLR:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LDFE;
- break;
- case ASM_OP_LDFE_C_NC:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LDFE;
- break;
- case ASM_OP_LDFE_S:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
- op = ASM_OP_LDFE;
- break;
- case ASM_OP_LDFE_SA:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
- op = ASM_OP_LDFE;
- break;
- case ASM_OP_LDFP8_:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
- op = ASM_OP_LDFP8;
- break;
- case ASM_OP_LDFP8_A:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
- op = ASM_OP_LDFP8;
- break;
- case ASM_OP_LDFP8_C_CLR:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LDFP8;
- break;
- case ASM_OP_LDFP8_C_NC:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LDFP8;
- break;
- case ASM_OP_LDFP8_S:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
- op = ASM_OP_LDFP8;
- break;
- case ASM_OP_LDFP8_SA:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
- op = ASM_OP_LDFP8;
- break;
- case ASM_OP_LDFPD_:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
- op = ASM_OP_LDFPD;
- break;
- case ASM_OP_LDFPD_A:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
- op = ASM_OP_LDFPD;
- break;
- case ASM_OP_LDFPD_C_CLR:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LDFPD;
- break;
- case ASM_OP_LDFPD_C_NC:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LDFPD;
- break;
- case ASM_OP_LDFPD_S:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
- op = ASM_OP_LDFPD;
- break;
- case ASM_OP_LDFPD_SA:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
- op = ASM_OP_LDFPD;
- break;
- case ASM_OP_LDFPS_:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
- op = ASM_OP_LDFPS;
- break;
- case ASM_OP_LDFPS_A:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
- op = ASM_OP_LDFPS;
- break;
- case ASM_OP_LDFPS_C_CLR:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LDFPS;
- break;
- case ASM_OP_LDFPS_C_NC:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LDFPS;
- break;
- case ASM_OP_LDFPS_S:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
- op = ASM_OP_LDFPS;
- break;
- case ASM_OP_LDFPS_SA:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
- op = ASM_OP_LDFPS;
- break;
- case ASM_OP_LDFS_:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_NONE);
- op = ASM_OP_LDFS;
- break;
- case ASM_OP_LDFS_A:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_A);
- op = ASM_OP_LDFS;
- break;
- case ASM_OP_LDFS_C_CLR:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_CLR);
- op = ASM_OP_LDFS;
- break;
- case ASM_OP_LDFS_C_NC:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_C_NC);
- op = ASM_OP_LDFS;
- break;
- case ASM_OP_LDFS_S:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_S);
- op = ASM_OP_LDFS;
- break;
- case ASM_OP_LDFS_SA:
- asm_cmpltr_add(i, ASM_CC_FLDTYPE, ASM_CT_SA);
- op = ASM_OP_LDFS;
- break;
- case ASM_OP_LFETCH_:
- asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE);
- asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE);
- op = ASM_OP_LFETCH;
- break;
- case ASM_OP_LFETCH_EXCL:
- asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_NONE);
- asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL);
- op = ASM_OP_LFETCH;
- break;
- case ASM_OP_LFETCH_FAULT:
- asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT);
- asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_NONE);
- op = ASM_OP_LFETCH;
- break;
- case ASM_OP_LFETCH_FAULT_EXCL:
- asm_cmpltr_add(i, ASM_CC_LFTYPE, ASM_CT_FAULT);
- asm_cmpltr_add(i, ASM_CC_LFETCH, ASM_CT_EXCL);
- op = ASM_OP_LFETCH;
- break;
- case ASM_OP_MF_:
- asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_NONE);
- op = ASM_OP_MF;
- break;
- case ASM_OP_MF_A:
- asm_cmpltr_add(i, ASM_CC_MF, ASM_CT_A);
- op = ASM_OP_MF;
- break;
- case ASM_OP_MIX1_L:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
- op = ASM_OP_MIX1;
- break;
- case ASM_OP_MIX1_R:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
- op = ASM_OP_MIX1;
- break;
- case ASM_OP_MIX2_L:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
- op = ASM_OP_MIX2;
- break;
- case ASM_OP_MIX2_R:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
- op = ASM_OP_MIX2;
- break;
- case ASM_OP_MIX4_L:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
- op = ASM_OP_MIX4;
- break;
- case ASM_OP_MIX4_R:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
- op = ASM_OP_MIX4;
- break;
- case ASM_OP_MOV_:
- asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_NONE);
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_I:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_M:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_RET:
- asm_cmpltr_add(i, ASM_CC_MOV, ASM_CT_RET);
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_CPUID:
- ot = ASM_OPER_CPUID;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_DBR:
- ot = ASM_OPER_DBR;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_IBR:
- ot = ASM_OPER_IBR;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_IP:
- ot = ASM_OPER_IP;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_MSR:
- ot = ASM_OPER_MSR;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_PKR:
- ot = ASM_OPER_PKR;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_PMC:
- ot = ASM_OPER_PMC;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_PMD:
- ot = ASM_OPER_PMD;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_PR:
- ot = ASM_OPER_PR;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_PSR:
- ot = ASM_OPER_PSR;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_PSR_L:
- ot = ASM_OPER_PSR_L;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_PSR_UM:
- ot = ASM_OPER_PSR_UM;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_MOV_RR:
- ot = ASM_OPER_RR;
- op = ASM_OP_MOV;
- break;
- case ASM_OP_NOP_B:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_B);
- op = ASM_OP_NOP;
- break;
- case ASM_OP_NOP_F:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_F);
- op = ASM_OP_NOP;
- break;
- case ASM_OP_NOP_I:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_I);
- op = ASM_OP_NOP;
- break;
- case ASM_OP_NOP_M:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_M);
- op = ASM_OP_NOP;
- break;
- case ASM_OP_NOP_X:
- asm_cmpltr_add(i, ASM_CC_UNIT, ASM_CT_X);
- op = ASM_OP_NOP;
- break;
- case ASM_OP_PACK2_SSS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
- op = ASM_OP_PACK2;
- break;
- case ASM_OP_PACK2_USS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_USS);
- op = ASM_OP_PACK2;
- break;
- case ASM_OP_PACK4_SSS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
- op = ASM_OP_PACK4;
- break;
- case ASM_OP_PADD1_:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
- op = ASM_OP_PADD1;
- break;
- case ASM_OP_PADD1_SSS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
- op = ASM_OP_PADD1;
- break;
- case ASM_OP_PADD1_UUS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
- op = ASM_OP_PADD1;
- break;
- case ASM_OP_PADD1_UUU:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
- op = ASM_OP_PADD1;
- break;
- case ASM_OP_PADD2_:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
- op = ASM_OP_PADD2;
- break;
- case ASM_OP_PADD2_SSS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
- op = ASM_OP_PADD2;
- break;
- case ASM_OP_PADD2_UUS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
- op = ASM_OP_PADD2;
- break;
- case ASM_OP_PADD2_UUU:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
- op = ASM_OP_PADD2;
- break;
- case ASM_OP_PAVG1_:
- asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE);
- op = ASM_OP_PAVG1;
- break;
- case ASM_OP_PAVG1_RAZ:
- asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ);
- op = ASM_OP_PAVG1;
- break;
- case ASM_OP_PAVG2_:
- asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_NONE);
- op = ASM_OP_PAVG2;
- break;
- case ASM_OP_PAVG2_RAZ:
- asm_cmpltr_add(i, ASM_CC_PAVG, ASM_CT_RAZ);
- op = ASM_OP_PAVG2;
- break;
- case ASM_OP_PCMP1_EQ:
- asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
- op = ASM_OP_PCMP1;
- break;
- case ASM_OP_PCMP1_GT:
- asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
- op = ASM_OP_PCMP1;
- break;
- case ASM_OP_PCMP2_EQ:
- asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
- op = ASM_OP_PCMP2;
- break;
- case ASM_OP_PCMP2_GT:
- asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
- op = ASM_OP_PCMP2;
- break;
- case ASM_OP_PCMP4_EQ:
- asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_EQ);
- op = ASM_OP_PCMP4;
- break;
- case ASM_OP_PCMP4_GT:
- asm_cmpltr_add(i, ASM_CC_PREL, ASM_CT_GT);
- op = ASM_OP_PCMP4;
- break;
- case ASM_OP_PMAX1_U:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
- op = ASM_OP_PMAX1;
- break;
- case ASM_OP_PMIN1_U:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
- op = ASM_OP_PMIN1;
- break;
- case ASM_OP_PMPY2_L:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_L);
- op = ASM_OP_PMPY2;
- break;
- case ASM_OP_PMPY2_R:
- asm_cmpltr_add(i, ASM_CC_LR, ASM_CT_R);
- op = ASM_OP_PMPY2;
- break;
- case ASM_OP_PMPYSHR2_:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
- op = ASM_OP_PMPYSHR2;
- break;
- case ASM_OP_PMPYSHR2_U:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
- op = ASM_OP_PMPYSHR2;
- break;
- case ASM_OP_PROBE_R:
- asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R);
- asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE);
- op = ASM_OP_PROBE;
- break;
- case ASM_OP_PROBE_R_FAULT:
- asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_R);
- asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
- op = ASM_OP_PROBE;
- break;
- case ASM_OP_PROBE_RW_FAULT:
- asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_RW);
- asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
- op = ASM_OP_PROBE;
- break;
- case ASM_OP_PROBE_W:
- asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W);
- asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_NONE);
- op = ASM_OP_PROBE;
- break;
- case ASM_OP_PROBE_W_FAULT:
- asm_cmpltr_add(i, ASM_CC_RW, ASM_CT_W);
- asm_cmpltr_add(i, ASM_CC_PRTYPE, ASM_CT_FAULT);
- op = ASM_OP_PROBE;
- break;
- case ASM_OP_PSHR2_:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
- op = ASM_OP_PSHR2;
- break;
- case ASM_OP_PSHR2_U:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
- op = ASM_OP_PSHR2;
- break;
- case ASM_OP_PSHR4_:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
- op = ASM_OP_PSHR4;
- break;
- case ASM_OP_PSHR4_U:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
- op = ASM_OP_PSHR4;
- break;
- case ASM_OP_PSUB1_:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
- op = ASM_OP_PSUB1;
- break;
- case ASM_OP_PSUB1_SSS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
- op = ASM_OP_PSUB1;
- break;
- case ASM_OP_PSUB1_UUS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
- op = ASM_OP_PSUB1;
- break;
- case ASM_OP_PSUB1_UUU:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
- op = ASM_OP_PSUB1;
- break;
- case ASM_OP_PSUB2_:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_NONE);
- op = ASM_OP_PSUB2;
- break;
- case ASM_OP_PSUB2_SSS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_SSS);
- op = ASM_OP_PSUB2;
- break;
- case ASM_OP_PSUB2_UUS:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUS);
- op = ASM_OP_PSUB2;
- break;
- case ASM_OP_PSUB2_UUU:
- asm_cmpltr_add(i, ASM_CC_SAT, ASM_CT_UUU);
- op = ASM_OP_PSUB2;
- break;
- case ASM_OP_PTC_E:
- asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_E);
- op = ASM_OP_PTC;
- break;
- case ASM_OP_PTC_G:
- asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_G);
- op = ASM_OP_PTC;
- break;
- case ASM_OP_PTC_GA:
- asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_GA);
- op = ASM_OP_PTC;
- break;
- case ASM_OP_PTC_L:
- asm_cmpltr_add(i, ASM_CC_PTC, ASM_CT_L);
- op = ASM_OP_PTC;
- break;
- case ASM_OP_PTR_D:
- asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_D);
- op = ASM_OP_PTR;
- break;
- case ASM_OP_PTR_I:
- asm_cmpltr_add(i, ASM_CC_PTR, ASM_CT_I);
- op = ASM_OP_PTR;
- break;
- case ASM_OP_SETF_D:
- asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_D);
- op = ASM_OP_SETF;
- break;
- case ASM_OP_SETF_EXP:
- asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_EXP);
- op = ASM_OP_SETF;
- break;
- case ASM_OP_SETF_S:
- asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_S);
- op = ASM_OP_SETF;
- break;
- case ASM_OP_SETF_SIG:
- asm_cmpltr_add(i, ASM_CC_SETF, ASM_CT_SIG);
- op = ASM_OP_SETF;
- break;
- case ASM_OP_SHR_:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_NONE);
- op = ASM_OP_SHR;
- break;
- case ASM_OP_SHR_U:
- asm_cmpltr_add(i, ASM_CC_UNS, ASM_CT_U);
- op = ASM_OP_SHR;
- break;
- case ASM_OP_SRLZ_D:
- asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_D);
- op = ASM_OP_SRLZ;
- break;
- case ASM_OP_SRLZ_I:
- asm_cmpltr_add(i, ASM_CC_SRLZ, ASM_CT_I);
- op = ASM_OP_SRLZ;
- break;
- case ASM_OP_ST1_:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
- op = ASM_OP_ST1;
- break;
- case ASM_OP_ST1_REL:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
- op = ASM_OP_ST1;
- break;
- case ASM_OP_ST16_:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
- op = ASM_OP_ST16;
- break;
- case ASM_OP_ST16_REL:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
- op = ASM_OP_ST16;
- break;
- case ASM_OP_ST2_:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
- op = ASM_OP_ST2;
- break;
- case ASM_OP_ST2_REL:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
- op = ASM_OP_ST2;
- break;
- case ASM_OP_ST4_:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
- op = ASM_OP_ST4;
- break;
- case ASM_OP_ST4_REL:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
- op = ASM_OP_ST4;
- break;
- case ASM_OP_ST8_:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_NONE);
- op = ASM_OP_ST8;
- break;
- case ASM_OP_ST8_REL:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_REL);
- op = ASM_OP_ST8;
- break;
- case ASM_OP_ST8_SPILL:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL);
- op = ASM_OP_ST8;
- break;
- case ASM_OP_STF_SPILL:
- asm_cmpltr_add(i, ASM_CC_STTYPE, ASM_CT_SPILL);
- op = ASM_OP_STF;
- break;
- case ASM_OP_SYNC_I:
- asm_cmpltr_add(i, ASM_CC_SYNC, ASM_CT_I);
- op = ASM_OP_SYNC;
- break;
- case ASM_OP_TBIT_NZ_AND:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_TBIT;
- break;
- case ASM_OP_TBIT_NZ_OR:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_TBIT;
- break;
- case ASM_OP_TBIT_NZ_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_TBIT;
- break;
- case ASM_OP_TBIT_Z:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
- op = ASM_OP_TBIT;
- break;
- case ASM_OP_TBIT_Z_AND:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_TBIT;
- break;
- case ASM_OP_TBIT_Z_OR:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_TBIT;
- break;
- case ASM_OP_TBIT_Z_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_TBIT;
- break;
- case ASM_OP_TBIT_Z_UNC:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
- op = ASM_OP_TBIT;
- break;
- case ASM_OP_TNAT_NZ_AND:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_TNAT;
- break;
- case ASM_OP_TNAT_NZ_OR:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_TNAT;
- break;
- case ASM_OP_TNAT_NZ_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_NZ);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_TNAT;
- break;
- case ASM_OP_TNAT_Z:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_NONE);
- op = ASM_OP_TNAT;
- break;
- case ASM_OP_TNAT_Z_AND:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_AND);
- op = ASM_OP_TNAT;
- break;
- case ASM_OP_TNAT_Z_OR:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR);
- op = ASM_OP_TNAT;
- break;
- case ASM_OP_TNAT_Z_OR_ANDCM:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_OR_ANDCM);
- op = ASM_OP_TNAT;
- break;
- case ASM_OP_TNAT_Z_UNC:
- asm_cmpltr_add(i, ASM_CC_TREL, ASM_CT_Z);
- asm_cmpltr_add(i, ASM_CC_CTYPE, ASM_CT_UNC);
- op = ASM_OP_TNAT;
- break;
- case ASM_OP_UNPACK1_H:
- asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
- op = ASM_OP_UNPACK1;
- break;
- case ASM_OP_UNPACK1_L:
- asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
- op = ASM_OP_UNPACK1;
- break;
- case ASM_OP_UNPACK2_H:
- asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
- op = ASM_OP_UNPACK2;
- break;
- case ASM_OP_UNPACK2_L:
- asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
- op = ASM_OP_UNPACK2;
- break;
- case ASM_OP_UNPACK4_H:
- asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_H);
- op = ASM_OP_UNPACK4;
- break;
- case ASM_OP_UNPACK4_L:
- asm_cmpltr_add(i, ASM_CC_UNPACK, ASM_CT_L);
- op = ASM_OP_UNPACK4;
- break;
- case ASM_OP_XMA_H:
- asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_H);
- op = ASM_OP_XMA;
- break;
- case ASM_OP_XMA_HU:
- asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_HU);
- op = ASM_OP_XMA;
- break;
- case ASM_OP_XMA_L:
- asm_cmpltr_add(i, ASM_CC_XMA, ASM_CT_L);
- op = ASM_OP_XMA;
- break;
- default:
- KASSERT(op < ASM_OP_NUMBER_OF_OPCODES, ("foo"));
- break;
- }
- i->i_op = op;
- return (ot);
-}
-
-static __inline void
-op_imm(struct asm_inst *i, int op, uint64_t val)
-{
- i->i_oper[op].o_type = ASM_OPER_IMM;
- i->i_oper[op].o_value = val;
-}
-
-static __inline void
-op_type(struct asm_inst *i, int op, enum asm_oper_type ot)
-{
- i->i_oper[op].o_type = ot;
-}
-
-static __inline void
-op_value(struct asm_inst *i, int op, uint64_t val)
-{
- i->i_oper[op].o_value = val;
-}
-
-static __inline void
-operand(struct asm_inst *i, int op, enum asm_oper_type ot, uint64_t bits,
- int o, int l)
-{
- i->i_oper[op].o_type = ot;
- i->i_oper[op].o_value = FIELD(bits, o, l);
-}
-
-static uint64_t
-imm(uint64_t bits, int sign, int o, int l)
-{
- uint64_t val = FIELD(bits, o, l);
-
- if (sign && (val & (1LL << (l - 1))) != 0)
- val |= -1LL << l;
- return (val);
-}
-
-static void
-s_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l)
-{
- i->i_oper[op].o_type = ASM_OPER_IMM;
- i->i_oper[op].o_value = imm(bits, 1, o, l);
-}
-
-static void
-u_imm(struct asm_inst *i, int op, uint64_t bits, int o, int l)
-{
- i->i_oper[op].o_type = ASM_OPER_IMM;
- i->i_oper[op].o_value = imm(bits, 0, o, l);
-}
-
-static uint64_t
-vimm(uint64_t bits, int sign, va_list ap)
-{
- uint64_t val = 0;
- int len = 0;
- int frag;
-
- while ((frag = va_arg(ap, int)) != 0) {
- val |= (uint64_t)FIELD(bits, FRAG_OFS(frag), FRAG_LEN(frag))
- << len;
- len += FRAG_LEN(frag);
- }
- if (sign && (val & (1LL << (len - 1))) != 0)
- val |= -1LL << len;
- return (val);
-}
-
-static void
-s_immf(struct asm_inst *i, int op, uint64_t bits, ...)
-{
- va_list ap;
- va_start(ap, bits);
- i->i_oper[op].o_type = ASM_OPER_IMM;
- i->i_oper[op].o_value = vimm(bits, 1, ap);
- va_end(ap);
-}
-
-static void
-u_immf(struct asm_inst *i, int op, uint64_t bits, ...)
-{
- va_list ap;
- va_start(ap, bits);
- i->i_oper[op].o_type = ASM_OPER_IMM;
- i->i_oper[op].o_value = vimm(bits, 0, ap);
- va_end(ap);
-}
-
-static void
-disp(struct asm_inst *i, int op, uint64_t bits, ...)
-{
- va_list ap;
- va_start(ap, bits);
- i->i_oper[op].o_type = ASM_OPER_DISP;
- i->i_oper[op].o_value = vimm(bits, 1, ap) << 4;
- va_end(ap);
-}
-
-static __inline void
-combine(uint64_t *dst, int dl, uint64_t src, int sl, int so)
-{
- *dst = (*dst & ((1LL << dl) - 1LL)) |
- ((uint64_t)_FLD64(src, so, sl) << dl);
-}
-
-int
-asm_extract(enum asm_op op, enum asm_fmt fmt, uint64_t bits,
- struct asm_bundle *b, int slot)
-{
- struct asm_inst *i = b->b_inst + slot;
- enum asm_oper_type ot;
-
- KASSERT(op != ASM_OP_NONE, ("foo"));
- i->i_bits = bits;
- i->i_format = fmt;
- i->i_srcidx = 2;
-
- ot = asm_normalize(i, op);
-
- if (fmt != ASM_FMT_B6 && fmt != ASM_FMT_B7)
- operand(i, 0, ASM_OPER_PREG, bits, 0, 6);
-
- switch (fmt) {
- case ASM_FMT_A1:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- if ((op == ASM_OP_ADD && FIELD(bits, 27, 2) == 1) ||
- (op == ASM_OP_SUB && FIELD(bits, 27, 2) == 0))
- op_imm(i, 4, 1LL);
- break;
- case ASM_FMT_A2:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- op_imm(i, 3, 1LL + FIELD(bits, 27, 2));
- operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_A3:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_A4:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- s_immf(i, 2, bits, FRAG(13,7), FRAG(27,6), FRAG(36,1), 0);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_A5:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- s_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5),
- FRAG(36,1), 0);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 2);
- break;
- case ASM_FMT_A6: /* 2 dst */
- operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
- i->i_srcidx++;
- break;
- case ASM_FMT_A7: /* 2 dst */
- if (FIELD(bits, 13, 7) != 0)
- return (0);
- operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
- i->i_srcidx++;
- break;
- case ASM_FMT_A8: /* 2 dst */
- operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- s_immf(i, 3, bits, FRAG(13,7), FRAG(36,1), 0);
- operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
- i->i_srcidx++;
- break;
- case ASM_FMT_A9:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_A10:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- op_imm(i, 3, 1LL + FIELD(bits, 27, 2));
- operand(i, 4, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_B1: /* 0 dst */
- asm_brhint(i);
- disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
- break;
- case ASM_FMT_B2: /* 0 dst */
- if (FIELD(bits, 0, 6) != 0)
- return (0);
- asm_brhint(i);
- disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
- break;
- case ASM_FMT_B3:
- asm_brhint(i);
- operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
- disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
- break;
- case ASM_FMT_B4: /* 0 dst */
- asm_brhint(i);
- operand(i, 1, ASM_OPER_BREG, bits, 13, 3);
- break;
- case ASM_FMT_B5:
-#if 0
- if (FIELD(bits, 32, 1) == 0)
- return (0);
-#endif
- asm_brhint(i);
- operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
- operand(i, 2, ASM_OPER_BREG, bits, 13, 3);
- break;
- case ASM_FMT_B6: /* 0 dst */
- asm_brphint(i);
- disp(i, 1, bits, FRAG(13,20), FRAG(36,1), 0);
- disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0);
- i->i_srcidx--;
- break;
- case ASM_FMT_B7: /* 0 dst */
- asm_brphint(i);
- operand(i, 1, ASM_OPER_BREG, bits, 13, 3);
- disp(i, 2, bits, FRAG(6,7), FRAG(33,2), 0);
- i->i_srcidx--;
- break;
- case ASM_FMT_B8:
- /* no operands */
- break;
- case ASM_FMT_B9: /* 0 dst */
- u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
- break;
- case ASM_FMT_F1:
- asm_sf(i);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
- operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
- break;
- case ASM_FMT_F2:
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
- operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
- break;
- case ASM_FMT_F3:
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
- operand(i, 4, ASM_OPER_FREG, bits, 27, 7);
- break;
- case ASM_FMT_F4: /* 2 dst */
- if (FIELD(bits, 33, 1)) { /* ra */
- if (FIELD(bits, 36, 1)) /* rb */
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_UNORD);
- else
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LE);
- } else {
- if (FIELD(bits, 36, 1)) /* rb */
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_LT);
- else
- asm_cmpltr_add(i, ASM_CC_FREL, ASM_CT_EQ);
- }
- if (FIELD(bits, 12, 1)) /* ta */
- asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_UNC);
- else
- asm_cmpltr_add(i, ASM_CC_FCTYPE, ASM_CT_NONE);
- asm_sf(i);
- operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 4, ASM_OPER_FREG, bits, 20, 7);
- i->i_srcidx++;
- break;
- case ASM_FMT_F5: /* 2 dst */
- operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
- u_immf(i, 4, bits, FRAG(33,2), FRAG(20,7), 0);
- i->i_srcidx++;
- break;
- case ASM_FMT_F6: /* 2 dst */
- asm_sf(i);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- operand(i, 3, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 4, ASM_OPER_FREG, bits, 20, 7);
- i->i_srcidx++;
- break;
- case ASM_FMT_F7: /* 2 dst */
- asm_sf(i);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
- i->i_srcidx++;
- break;
- case ASM_FMT_F8:
- asm_sf(i);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
- break;
- case ASM_FMT_F9:
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_FREG, bits, 20, 7);
- break;
- case ASM_FMT_F10:
- asm_sf(i);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- break;
- case ASM_FMT_F11:
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- break;
- case ASM_FMT_F12: /* 0 dst */
- asm_sf(i);
- u_imm(i, 1, bits, 13, 7);
- u_imm(i, 2, bits, 20, 7);
- i->i_srcidx--;
- break;
- case ASM_FMT_F13:
- asm_sf(i);
- /* no operands */
- break;
- case ASM_FMT_F14: /* 0 dst */
- asm_sf(i);
- disp(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
- break;
- case ASM_FMT_F15: /* 0 dst */
- u_imm(i, 1, bits, 6, 20);
- break;
- case ASM_FMT_I1:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- switch (FIELD(bits, 30, 2)) {
- case 0: op_imm(i, 4, 0LL); break;
- case 1: op_imm(i, 4, 7LL); break;
- case 2: op_imm(i, 4, 15LL); break;
- case 3: op_imm(i, 4, 16LL); break;
- }
- break;
- case ASM_FMT_I2:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_I3:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- u_imm(i, 3, bits, 20, 4);
- break;
- case ASM_FMT_I4:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- u_imm(i, 3, bits, 20, 8);
- break;
- case ASM_FMT_I5:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_I6:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
- u_imm(i, 3, bits, 14, 5);
- break;
- case ASM_FMT_I7:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_I8:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- op_imm(i, 3, 31LL - FIELD(bits, 20, 5));
- break;
- case ASM_FMT_I9:
- if (FIELD(bits, 13, 7) != 0)
- return (0);
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_I10:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- u_imm(i, 4, bits, 27, 6);
- break;
- case ASM_FMT_I11:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
- u_imm(i, 3, bits, 14, 6);
- op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
- break;
- case ASM_FMT_I12:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- op_imm(i, 3, 63LL - FIELD(bits, 20, 6));
- op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
- break;
- case ASM_FMT_I13:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
- op_imm(i, 3, 63LL - FIELD(bits, 20, 6));
- op_imm(i, 4, 1LL + FIELD(bits, 27, 6));
- break;
- case ASM_FMT_I14:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- s_imm(i, 2, bits, 36, 1);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- op_imm(i, 4, 63LL - FIELD(bits, 14, 6));
- op_imm(i, 5, 1LL + FIELD(bits, 27, 6));
- break;
- case ASM_FMT_I15:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- op_imm(i, 4, 63LL - FIELD(bits, 31, 6));
- op_imm(i, 5, 1LL + FIELD(bits, 27, 4));
- break;
- case ASM_FMT_I16: /* 2 dst */
- operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- u_imm(i, 4, bits, 14, 6);
- i->i_srcidx++;
- break;
- case ASM_FMT_I17: /* 2 dst */
- operand(i, 1, ASM_OPER_PREG, bits, 6, 6);
- operand(i, 2, ASM_OPER_PREG, bits, 27, 6);
- operand(i, 3, ASM_OPER_GREG, bits, 20, 7);
- i->i_srcidx++;
- break;
- case ASM_FMT_I19:
- u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
- break;
- case ASM_FMT_I20: /* 0 dst */
- operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
- disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
- i->i_srcidx--;
- break;
- case ASM_FMT_I21:
- switch (FIELD(bits, 20, 2)) { /* wh */
- case 0: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_SPTK); break;
- case 1: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_NONE); break;
- case 2: asm_cmpltr_add(i, ASM_CC_MWH, ASM_CT_DPTK); break;
- case 3: return (0);
- }
- if (FIELD(bits, 23, 1)) /* ih */
- asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_IMP);
- else
- asm_cmpltr_add(i, ASM_CC_IH, ASM_CT_NONE);
- operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- disp(i, 3, bits, FRAG(24,9), 0);
- break;
- case ASM_FMT_I22:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_BREG, bits, 13, 3);
- break;
- case ASM_FMT_I23:
- op_type(i, 1, ASM_OPER_PR);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- u_immf(i, 3, bits, FRAG(6,7), FRAG(24,8), FRAG(36,1), 0);
- i->i_oper[3].o_value <<= 1;
- break;
- case ASM_FMT_I24:
- op_type(i, 1, ASM_OPER_PR_ROT);
- s_immf(i, 2, bits, FRAG(6,27), FRAG(36,1), 0);
- break;
- case ASM_FMT_I25:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- op_type(i, 2, ot);
- break;
- case ASM_FMT_I26:
- operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_I27:
- operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
- s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
- break;
- case ASM_FMT_I28:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_AREG, bits, 20, 7);
- break;
- case ASM_FMT_I29:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_M1:
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- if (i->i_op == ASM_OP_LD16) {
- op_type(i, 2, ASM_OPER_AREG);
- op_value(i, 2, AR_CSD);
- i->i_srcidx++;
- }
- operand(i, i->i_srcidx, ASM_OPER_MEM, bits, 20, 7);
- break;
- case ASM_FMT_M2:
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M3:
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
- s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
- break;
- case ASM_FMT_M4:
- asm_hint(i, ASM_CC_STHINT);
- operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- if (i->i_op == ASM_OP_ST16) {
- op_type(i, 3, ASM_OPER_AREG);
- op_value(i, 3, AR_CSD);
- }
- break;
- case ASM_FMT_M5:
- asm_hint(i, ASM_CC_STHINT);
- operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0);
- break;
- case ASM_FMT_M6:
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
- break;
- case ASM_FMT_M7:
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M8:
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
- s_immf(i, 3, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
- break;
- case ASM_FMT_M9:
- asm_hint(i, ASM_CC_STHINT);
- operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- break;
- case ASM_FMT_M10:
- asm_hint(i, ASM_CC_STHINT);
- operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- s_immf(i, 3, bits, FRAG(6,7), FRAG(27,1), FRAG(36,1), 0);
- break;
- case ASM_FMT_M11: /* 2 dst */
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_MEM, bits, 20, 7);
- i->i_srcidx++;
- break;
- case ASM_FMT_M12: /* 2 dst */
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- operand(i, 3, ASM_OPER_MEM, bits, 20, 7);
- op_imm(i, 4, 8LL << FIELD(bits, 30, 1));
- i->i_srcidx++;
- break;
- case ASM_FMT_M13:
- asm_hint(i, ASM_CC_LFHINT);
- operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
- break;
- case ASM_FMT_M14: /* 0 dst */
- asm_hint(i, ASM_CC_LFHINT);
- operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- i->i_srcidx--;
- break;
- case ASM_FMT_M15: /* 0 dst */
- asm_hint(i, ASM_CC_LFHINT);
- operand(i, 1, ASM_OPER_MEM, bits, 20, 7);
- s_immf(i, 2, bits, FRAG(13,7), FRAG(27,1), FRAG(36,1), 0);
- i->i_srcidx--;
- break;
- case ASM_FMT_M16: {
- int oper;
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
- if (i->i_op == ASM_OP_CMP8XCHG16) {
- op_type(i, 4, ASM_OPER_AREG);
- op_value(i, 4, AR_CSD);
- oper = 5;
- } else
- oper = 4;
- if (FIELD(bits, 30, 6) < 8) {
- op_type(i, oper, ASM_OPER_AREG);
- op_value(i, oper, AR_CCV);
- }
- break;
- }
- case ASM_FMT_M17:
- asm_hint(i, ASM_CC_LDHINT);
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_MEM, bits, 20, 7);
- switch (FIELD(bits, 13, 2)) {
- case 0: op_imm(i, 3, 1LL << 4); break;
- case 1: op_imm(i, 3, 1LL << 3); break;
- case 2: op_imm(i, 3, 1LL << 2); break;
- case 3: op_imm(i, 3, 1LL); break;
- }
- if (FIELD(bits, 15, 1))
- i->i_oper[3].o_value *= -1LL;
- break;
- case ASM_FMT_M18:
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M19:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_FREG, bits, 13, 7);
- break;
- case ASM_FMT_M20: /* 0 dst */
- operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
- disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
- i->i_srcidx--;
- break;
- case ASM_FMT_M21: /* 0 dst */
- operand(i, 1, ASM_OPER_FREG, bits, 13, 7);
- disp(i, 2, bits, FRAG(6,7), FRAG(20,13), FRAG(36,1), 0);
- i->i_srcidx--;
- break;
- case ASM_FMT_M22: /* 0 dst */
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
- i->i_srcidx--;
- break;
- case ASM_FMT_M23: /* 0 dst */
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- disp(i, 2, bits, FRAG(13,20), FRAG(36,1), 0);
- i->i_srcidx--;
- break;
- case ASM_FMT_M24:
- /* no operands */
- break;
- case ASM_FMT_M25:
- if (FIELD(bits, 0, 6) != 0)
- return (0);
- /* no operands */
- break;
- case ASM_FMT_M26:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- break;
- case ASM_FMT_M27:
- operand(i, 1, ASM_OPER_FREG, bits, 6, 7);
- break;
- case ASM_FMT_M28:
- operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_M29:
- operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M30:
- operand(i, 1, ASM_OPER_AREG, bits, 20, 7);
- s_immf(i, 2, bits, FRAG(13,7), FRAG(36,1), 0);
- break;
- case ASM_FMT_M31:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_AREG, bits, 20, 7);
- break;
- case ASM_FMT_M32:
- operand(i, 1, ASM_OPER_CREG, bits, 20, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M33:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_CREG, bits, 20, 7);
- break;
- case ASM_FMT_M34: {
- uint64_t loc, out;
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- op_type(i, 2, ASM_OPER_AREG);
- op_value(i, 2, AR_PFS);
- loc = FIELD(bits, 20, 7);
- out = FIELD(bits, 13, 7) - loc;
- op_imm(i, 3, 0);
- op_imm(i, 4, loc);
- op_imm(i, 5, out);
- op_imm(i, 6, (uint64_t)FIELD(bits, 27, 4) << 3);
- break;
- }
- case ASM_FMT_M35:
- if (FIELD(bits, 27, 6) == 0x2D)
- op_type(i, 1, ASM_OPER_PSR_L);
- else
- op_type(i, 1, ASM_OPER_PSR_UM);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M36:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- if (FIELD(bits, 27, 6) == 0x25)
- op_type(i, 2, ASM_OPER_PSR);
- else
- op_type(i, 2, ASM_OPER_PSR_UM);
- break;
- case ASM_FMT_M37:
- u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
- break;
- case ASM_FMT_M38:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
- operand(i, 3, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M39:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
- u_imm(i, 3, bits, 13, 2);
- break;
- case ASM_FMT_M40: /* 0 dst */
- operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
- u_imm(i, 2, bits, 13, 2);
- i->i_srcidx--;
- break;
- case ASM_FMT_M41:
- operand(i, 1, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M42:
- operand(i, 1, ot, bits, 20, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- break;
- case ASM_FMT_M43:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ot, bits, 20, 7);
- break;
- case ASM_FMT_M44:
- u_immf(i, 1, bits, FRAG(6,21), FRAG(31,2), FRAG(36,1), 0);
- break;
- case ASM_FMT_M45: /* 0 dst */
- operand(i, 1, ASM_OPER_GREG, bits, 20, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 13, 7);
- i->i_srcidx--;
- break;
- case ASM_FMT_M46:
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- operand(i, 2, ASM_OPER_GREG, bits, 20, 7);
- break;
- case ASM_FMT_X1:
- KASSERT(slot == 2, ("foo"));
- u_immf(i, 1, bits, FRAG(6,20), FRAG(36,1), 0);
- combine(&i->i_oper[1].o_value, 21, b->b_inst[1].i_bits, 41, 0);
- break;
- case ASM_FMT_X2:
- KASSERT(slot == 2, ("foo"));
- operand(i, 1, ASM_OPER_GREG, bits, 6, 7);
- u_immf(i, 2, bits, FRAG(13,7), FRAG(27,9), FRAG(22,5),
- FRAG(21,1), 0);
- combine(&i->i_oper[2].o_value, 22, b->b_inst[1].i_bits, 41, 0);
- combine(&i->i_oper[2].o_value, 63, bits, 1, 36);
- break;
- case ASM_FMT_X3:
- KASSERT(slot == 2, ("foo"));
- asm_brhint(i);
- u_imm(i, 1, bits, 13, 20);
- combine(&i->i_oper[1].o_value, 20, b->b_inst[1].i_bits, 39, 2);
- combine(&i->i_oper[1].o_value, 59, bits, 1, 36);
- i->i_oper[1].o_value <<= 4;
- i->i_oper[1].o_type = ASM_OPER_DISP;
- break;
- case ASM_FMT_X4:
- KASSERT(slot == 2, ("foo"));
- asm_brhint(i);
- operand(i, 1, ASM_OPER_BREG, bits, 6, 3);
- u_imm(i, 2, bits, 13, 20);
- combine(&i->i_oper[2].o_value, 20, b->b_inst[1].i_bits, 39, 2);
- combine(&i->i_oper[2].o_value, 59, bits, 1, 36);
- i->i_oper[2].o_value <<= 4;
- i->i_oper[2].o_type = ASM_OPER_DISP;
- break;
- default:
- KASSERT(fmt == ASM_FMT_NONE, ("foo"));
- return (0);
- }
-
- return (1);
-}
--- sys/ia64/disasm/disasm_format.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/disasm/disasm_format.c,v 1.2 2005/01/06 22:18:22 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <ia64/disasm/disasm_int.h>
-#include <ia64/disasm/disasm.h>
-
-/*
- * Mnemonics (keep in sync with enum asm_op).
- */
-static const char *asm_mnemonics[] = {
- NULL,
- "add", "addl", "addp4", "adds", "alloc", "and", "andcm",
- "br", "break", "brl", "brp", "bsw",
- "chk", "clrrrb", "cmp", "cmp4", "cmp8xchg16", "cmpxchg1", "cmpxchg2",
- "cmpxchg4", "cmpxchg8", "cover", "czx1", "czx2",
- "dep",
- "epc", "extr",
- "famax", "famin", "fand", "fandcm", "fc", "fchkf", "fclass", "fclrf",
- "fcmp", "fcvt", "fetchadd4", "fetchadd8", "flushrs", "fma", "fmax",
- "fmerge", "fmin", "fmix", "fms", "fnma", "for", "fpack", "fpamax",
- "fpamin", "fpcmp", "fpcvt", "fpma", "fpmax", "fpmerge", "fpmin",
- "fpms", "fpnma", "fprcpa", "fprsqrta", "frcpa", "frsqrta", "fselect",
- "fsetc", "fswap", "fsxt", "fwb", "fxor",
- "getf",
- "invala", "itc", "itr",
- "ld1", "ld16", "ld2", "ld4", "ld8", "ldf", "ldf8", "ldfd", "ldfe",
- "ldfp8", "ldfpd", "ldfps", "ldfs", "lfetch", "loadrs",
- "mf", "mix1", "mix2", "mix4", "mov", "movl", "mux1", "mux2",
- "nop",
- "or",
- "pack2", "pack4", "padd1", "padd2", "padd4", "pavg1", "pavg2",
- "pavgsub1", "pavgsub2", "pcmp1", "pcmp2", "pcmp4", "pmax1", "pmax2",
- "pmin1", "pmin2", "pmpy2", "pmpyshr2", "popcnt", "probe", "psad1",
- "pshl2", "pshl4", "pshladd2", "pshr2", "pshr4", "pshradd2", "psub1",
- "psub2", "psub4", "ptc", "ptr",
- "rfi", "rsm", "rum",
- "setf", "shl", "shladd", "shladdp4", "shr", "shrp", "srlz", "ssm",
- "st1", "st16", "st2", "st4", "st8", "stf", "stf8", "stfd", "stfe",
- "stfs", "sub", "sum", "sxt1", "sxt2", "sxt4", "sync",
- "tak", "tbit", "thash", "tnat", "tpa", "ttag",
- "unpack1", "unpack2", "unpack4",
- "xchg1", "xchg2", "xchg4", "xchg8", "xma", "xor",
- "zxt1", "zxt2", "zxt4"
-};
-
-/*
- * Completers (keep in sync with enum asm_cmpltr_type).
- */
-static const char *asm_completers[] = {
- "",
- ".0", ".1",
- ".a", ".acq", ".and",
- ".b", ".bias",
- ".c.clr", ".c.clr.acq", ".c.nc", ".call", ".cexit", ".cloop", ".clr",
- ".ctop",
- ".d", ".dc.dc", ".dc.nt", ".dpnt", ".dptk",
- ".e", ".eq", ".excl", ".exit", ".exp",
- ".f", ".fault", ".few", ".fill", ".fx", ".fxu",
- ".g", ".ga", ".ge", ".gt",
- ".h", ".hu",
- ".i", ".ia", ".imp",
- ".l", ".le", ".loop", ".lr", ".lt", ".ltu",
- ".m", ".many",
- ".nc", ".ne", ".neq", ".nl", ".nle", ".nlt", ".nm", ".nr", ".ns",
- ".nt.dc", ".nt.nt", ".nt.tk", ".nt1", ".nt2", ".nta", ".nz",
- ".or", ".or.andcm", ".ord",
- ".pr",
- ".r", ".raz", ".rel", ".ret", ".rw",
- ".s", ".s0", ".s1", ".s2", ".s3", ".sa", ".se", ".sig", ".spill",
- ".spnt", ".sptk", ".sss",
- ".tk.dc", ".tk.nt", ".tk.tk", ".trunc",
- ".u", ".unc", ".unord", ".uss", ".uus", ".uuu",
- ".w", ".wexit", ".wtop",
- ".x", ".xf",
- ".z"
-};
-
-void
-asm_completer(const struct asm_cmpltr *c, char *buf)
-{
- strcpy(buf, asm_completers[c->c_type]);
-}
-
-void
-asm_mnemonic(enum asm_op op, char *buf)
-{
- strcpy(buf, asm_mnemonics[(op < ASM_OP_INTERNAL_OPCODES) ? op : 0]);
-}
-
-void
-asm_operand(const struct asm_oper *o, char *buf, uint64_t ip)
-{
- const char *n;
-
- n = NULL;
- switch (o->o_type) {
- case ASM_OPER_AREG:
- switch ((int)o->o_value) {
- case AR_K0: n = "k0"; break;
- case AR_K1: n = "k1"; break;
- case AR_K2: n = "k2"; break;
- case AR_K3: n = "k3"; break;
- case AR_K4: n = "k4"; break;
- case AR_K5: n = "k5"; break;
- case AR_K6: n = "k6"; break;
- case AR_K7: n = "k7"; break;
- case AR_RSC: n = "rsc"; break;
- case AR_BSP: n = "bsp"; break;
- case AR_BSPSTORE: n = "bspstore"; break;
- case AR_RNAT: n = "rnat"; break;
- case AR_FCR: n = "fcr"; break;
- case AR_EFLAG: n = "eflag"; break;
- case AR_CSD: n = "csd"; break;
- case AR_SSD: n = "ssd"; break;
- case AR_CFLG: n = "cflg"; break;
- case AR_FSR: n = "fsr"; break;
- case AR_FIR: n = "fir"; break;
- case AR_FDR: n = "fdr"; break;
- case AR_CCV: n = "ccv"; break;
- case AR_UNAT: n = "unat"; break;
- case AR_FPSR: n = "fpsr"; break;
- case AR_ITC: n = "itc"; break;
- case AR_PFS: n = "pfs"; break;
- case AR_LC: n = "lc"; break;
- case AR_EC: n = "ec"; break;
- default:
- sprintf(buf, "ar%d", (int)o->o_value);
- return;
- }
- sprintf(buf, "ar.%s", n);
- return;
- case ASM_OPER_BREG:
- if (o->o_value != 0)
- sprintf(buf, "b%d", (int)o->o_value);
- else
- strcpy(buf, "rp");
- return;
- case ASM_OPER_CPUID:
- n = "cpuid";
- break;
- case ASM_OPER_CREG:
- switch ((int)o->o_value) {
- case CR_DCR: n = "dcr"; break;
- case CR_ITM: n = "itm"; break;
- case CR_IVA: n = "iva"; break;
- case CR_PTA: n = "pta"; break;
- case CR_IPSR: n = "ipsr"; break;
- case CR_ISR: n = "isr"; break;
- case CR_IIP: n = "iip"; break;
- case CR_IFA: n = "ifa"; break;
- case CR_ITIR: n = "itir"; break;
- case CR_IIPA: n = "iipa"; break;
- case CR_IFS: n = "ifs"; break;
- case CR_IIM: n = "iim"; break;
- case CR_IHA: n = "iha"; break;
- case CR_LID: n = "lid"; break;
- case CR_IVR: n = "ivr"; break;
- case CR_TPR: n = "tpr"; break;
- case CR_EOI: n = "eoi"; break;
- case CR_IRR0: n = "irr0"; break;
- case CR_IRR1: n = "irr1"; break;
- case CR_IRR2: n = "irr2"; break;
- case CR_IRR3: n = "irr3"; break;
- case CR_ITV: n = "itv"; break;
- case CR_PMV: n = "pmv"; break;
- case CR_CMCV: n = "cmcv"; break;
- case CR_LRR0: n = "lrr0"; break;
- case CR_LRR1: n = "lrr1"; break;
- default:
- sprintf(buf, "cr%d", (int)o->o_value);
- return;
- }
- sprintf(buf, "cr.%s", n);
- return;
- case ASM_OPER_DBR:
- n = "dbr";
- break;
- case ASM_OPER_DISP:
- sprintf(buf, "%lx", ip + o->o_value);
- return;
- case ASM_OPER_DTR:
- n = "dtr";
- break;
- case ASM_OPER_FREG:
- sprintf(buf, "f%d", (int)o->o_value);
- return;
- case ASM_OPER_GREG:
- break;
- case ASM_OPER_IBR:
- n = "ibr";
- break;
- case ASM_OPER_IMM:
- sprintf(buf, "0x%lx", o->o_value);
- return;
- case ASM_OPER_IP:
- strcpy(buf, "ip");
- return;
- case ASM_OPER_ITR:
- n = "itr";
- break;
- case ASM_OPER_MEM:
- n = "";
- break;
- case ASM_OPER_MSR:
- n = "msr";
- break;
- case ASM_OPER_PKR:
- n = "pkr";
- break;
- case ASM_OPER_PMC:
- n = "pmc";
- break;
- case ASM_OPER_PMD:
- n = "pmd";
- break;
- case ASM_OPER_PR:
- strcpy(buf, "pr");
- return;
- case ASM_OPER_PR_ROT:
- strcpy(buf, "pr.rot");
- return;
- case ASM_OPER_PREG:
- sprintf(buf, "p%d", (int)o->o_value);
- return;
- case ASM_OPER_PSR:
- strcpy(buf, "psr");
- return;
- case ASM_OPER_PSR_L:
- strcpy(buf, "psr.l");
- return;
- case ASM_OPER_PSR_UM:
- strcpy(buf, "psr.um");
- return;
- case ASM_OPER_RR:
- n = "rr";
- break;
- case ASM_OPER_NONE:
- KASSERT(0, ("foo"));
- break;
- }
- if (n != NULL)
- buf += sprintf(buf, "%s[", n);
- switch ((int)o->o_value) {
- case 1: strcpy(buf, "gp"); buf += 2; break;
- case 12: strcpy(buf, "sp"); buf += 2; break;
- case 13: strcpy(buf, "tp"); buf += 2; break;
- default: buf += sprintf(buf, "r%d", (int)o->o_value); break;
- }
- if (n != NULL)
- strcpy(buf, "]");
-}
-
-void
-asm_print_bundle(const struct asm_bundle *b, uint64_t ip)
-{
- asm_print_inst(b, 0, ip);
- asm_print_inst(b, 1, ip);
- asm_print_inst(b, 2, ip);
-}
-
-void
-asm_print_inst(const struct asm_bundle *b, int slot, uint64_t ip)
-{
- char buf[32];
- const struct asm_inst *i;
- const char *tmpl;
- int n, w;
-
- tmpl = b->b_templ + slot;
- if (*tmpl == ';' || (slot == 2 && b->b_templ[1] == ';'))
- tmpl++;
- i = b->b_inst + slot;
- if (*tmpl == 'L' || i->i_op == ASM_OP_NONE)
- return;
-
- /* Address + slot. */
- printf("%lx[%c] ", ip + slot, *tmpl);
-
- /* Predicate. */
- if (i->i_oper[0].o_value != 0) {
- asm_operand(i->i_oper+0, buf, ip);
- w = printf("(%s)", buf);
- } else
- w = 0;
- while (w++ < 8)
- printf(" ");
-
- /* Mnemonic & completers. */
- asm_mnemonic(i->i_op, buf);
- w = printf(buf);
- n = 0;
- while (n < i->i_ncmpltrs) {
- asm_completer(i->i_cmpltr + n, buf);
- w += printf(buf);
- n++;
- }
- while (w++ < 15)
- printf(" ");
- printf(" ");
-
- /* Operands. */
- n = 1;
- while (n < 7 && i->i_oper[n].o_type != ASM_OPER_NONE) {
- if (n > 1) {
- if (n == i->i_srcidx)
- printf(" = ");
- else
- printf(", ");
- }
- asm_operand(i->i_oper + n, buf, ip);
- printf(buf);
- n++;
- }
- printf("\n");
-}
--- sys/ia64/disasm/disasm_decode.c
+++ /dev/null
@@ -1,2511 +0,0 @@
-/*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/disasm/disasm_decode.c,v 1.3 2005/01/06 22:18:22 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-
-#include <ia64/disasm/disasm_int.h>
-#include <ia64/disasm/disasm.h>
-
-/*
- * Template names.
- */
-static const char *asm_templname[] = {
- "MII", "MII;", "MI;I", "MI;I;", "MLX", "MLX;", 0, 0,
- "MMI", "MMI;", "M;MI", "M;MI;", "MFI", "MFI;", "MMF", "MMF;",
- "MIB", "MIB;", "MBB", "MBB;", 0, 0, "BBB", "BBB;",
- "MMB", "MMB;", 0, 0, "MFB", "MFB;", 0, 0
-};
-
-/*
- * Decode A-unit instructions.
- */
-static int
-asm_decodeA(uint64_t bits, struct asm_bundle *b, int slot)
-{
- enum asm_fmt fmt;
- enum asm_op op;
-
- fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
- switch((int)OPCODE(bits)) {
- case 0x8:
- switch (FIELD(bits, 34, 2)) { /* x2a */
- case 0x0:
- if (FIELD(bits, 33, 1) == 0) { /* ve */
- switch (FIELD(bits, 29, 4)) { /* x4 */
- case 0x0:
- if (FIELD(bits, 27, 2) <= 1) /* x2b */
- op = ASM_OP_ADD,
- fmt = ASM_FMT_A1;
- break;
- case 0x1:
- if (FIELD(bits, 27, 2) <= 1) /* x2b */
- op = ASM_OP_SUB,
- fmt = ASM_FMT_A1;
- break;
- case 0x2:
- if (FIELD(bits, 27, 2) == 0) /* x2b */
- op = ASM_OP_ADDP4,
- fmt = ASM_FMT_A1;
- break;
- case 0x3:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_AND,
- fmt = ASM_FMT_A1;
- break;
- case 0x1:
- op = ASM_OP_ANDCM,
- fmt = ASM_FMT_A1;
- break;
- case 0x2:
- op = ASM_OP_OR,
- fmt = ASM_FMT_A1;
- break;
- case 0x3:
- op = ASM_OP_XOR,
- fmt = ASM_FMT_A1;
- break;
- }
- break;
- case 0xB:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_AND,
- fmt = ASM_FMT_A3;
- break;
- case 0x1:
- op = ASM_OP_ANDCM,
- fmt = ASM_FMT_A3;
- break;
- case 0x2:
- op = ASM_OP_OR,
- fmt = ASM_FMT_A3;
- break;
- case 0x3:
- op = ASM_OP_XOR,
- fmt = ASM_FMT_A3;
- break;
- }
- break;
- case 0x4:
- op = ASM_OP_SHLADD, fmt = ASM_FMT_A2;
- break;
- case 0x6:
- op = ASM_OP_SHLADDP4, fmt = ASM_FMT_A2;
- break;
- case 0x9:
- if (FIELD(bits, 27, 2) == 1) /* x2b */
- op = ASM_OP_SUB,
- fmt = ASM_FMT_A3;
- break;
- }
- }
- break;
- case 0x1:
- switch (FIELD(bits, 29, 8)) { /* za + x2a + zb + x4 */
- case 0x20:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_PADD1_, fmt = ASM_FMT_A9;
- break;
- case 0x1:
- op = ASM_OP_PADD1_SSS,
- fmt = ASM_FMT_A9;
- break;
- case 0x2:
- op = ASM_OP_PADD1_UUU,
- fmt = ASM_FMT_A9;
- break;
- case 0x3:
- op = ASM_OP_PADD1_UUS,
- fmt = ASM_FMT_A9;
- break;
- }
- break;
- case 0x21:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_PSUB1_, fmt = ASM_FMT_A9;
- break;
- case 0x1:
- op = ASM_OP_PSUB1_SSS,
- fmt = ASM_FMT_A9;
- break;
- case 0x2:
- op = ASM_OP_PSUB1_UUU,
- fmt = ASM_FMT_A9;
- break;
- case 0x3:
- op = ASM_OP_PSUB1_UUS,
- fmt = ASM_FMT_A9;
- break;
- }
- break;
- case 0x22:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x2:
- op = ASM_OP_PAVG1_, fmt = ASM_FMT_A9;
- break;
- case 0x3:
- op = ASM_OP_PAVG1_RAZ,
- fmt = ASM_FMT_A9;
- break;
- }
- break;
- case 0x23:
- if (FIELD(bits, 27, 2) == 2) /* x2b */
- op = ASM_OP_PAVGSUB1, fmt = ASM_FMT_A9;
- break;
- case 0x29:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_PCMP1_EQ, fmt = ASM_FMT_A9;
- break;
- case 0x1:
- op = ASM_OP_PCMP1_GT, fmt = ASM_FMT_A9;
- break;
- }
- break;
- case 0x30:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_PADD2_, fmt = ASM_FMT_A9;
- break;
- case 0x1:
- op = ASM_OP_PADD2_SSS,
- fmt = ASM_FMT_A9;
- break;
- case 0x2:
- op = ASM_OP_PADD2_UUU,
- fmt = ASM_FMT_A9;
- break;
- case 0x3:
- op = ASM_OP_PADD2_UUS,
- fmt = ASM_FMT_A9;
- break;
- }
- break;
- case 0x31:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_PSUB2_, fmt = ASM_FMT_A9;
- break;
- case 0x1:
- op = ASM_OP_PSUB2_SSS,
- fmt = ASM_FMT_A9;
- break;
- case 0x2:
- op = ASM_OP_PSUB2_UUU,
- fmt = ASM_FMT_A9;
- break;
- case 0x3:
- op = ASM_OP_PSUB2_UUS,
- fmt = ASM_FMT_A9;
- break;
- }
- break;
- case 0x32:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x2:
- op = ASM_OP_PAVG2_, fmt = ASM_FMT_A9;
- break;
- case 0x3:
- op = ASM_OP_PAVG2_RAZ,
- fmt = ASM_FMT_A9;
- break;
- }
- break;
- case 0x33:
- if (FIELD(bits, 27, 2) == 2) /* x2b */
- op = ASM_OP_PAVGSUB2, fmt = ASM_FMT_A9;
- break;
- case 0x34:
- op = ASM_OP_PSHLADD2, fmt = ASM_FMT_A10;
- break;
- case 0x36:
- op = ASM_OP_PSHRADD2, fmt = ASM_FMT_A10;
- break;
- case 0x39:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_PCMP2_EQ, fmt = ASM_FMT_A9;
- break;
- case 0x1:
- op = ASM_OP_PCMP2_GT, fmt = ASM_FMT_A9;
- break;
- }
- break;
- case 0xA0:
- if (FIELD(bits, 27, 2) == 0) /* x2b */
- op = ASM_OP_PADD4, fmt = ASM_FMT_A9;
- break;
- case 0xA1:
- if (FIELD(bits, 27, 2) == 0) /* x2b */
- op = ASM_OP_PSUB4, fmt = ASM_FMT_A9;
- break;
- case 0xA9:
- switch (FIELD(bits, 27, 2)) { /* x2b */
- case 0x0:
- op = ASM_OP_PCMP4_EQ, fmt = ASM_FMT_A9;
- break;
- case 0x1:
- op = ASM_OP_PCMP4_GT, fmt = ASM_FMT_A9;
- break;
- }
- break;
- }
- break;
- case 0x2:
- if (FIELD(bits, 33, 1) == 0) /* ve */
- op = ASM_OP_ADDS, fmt = ASM_FMT_A4;
- break;
- case 0x3:
- if (FIELD(bits, 33, 1) == 0) /* ve */
- op = ASM_OP_ADDP4, fmt = ASM_FMT_A4;
- break;
- }
- break;
- case 0x9:
- op = ASM_OP_ADDL, fmt = ASM_FMT_A5;
- break;
- case 0xC: case 0xD: case 0xE:
- if (FIELD(bits, 12, 1) == 0) { /* c */
- switch (FIELD(bits, 33, 8)) { /* maj + tb + x2 + ta */
- case 0xC0:
- op = ASM_OP_CMP_LT, fmt = ASM_FMT_A6;
- break;
- case 0xC1:
- op = ASM_OP_CMP_EQ_AND, fmt = ASM_FMT_A6;
- break;
- case 0xC2:
- op = ASM_OP_CMP4_LT, fmt = ASM_FMT_A6;
- break;
- case 0xC3:
- op = ASM_OP_CMP4_EQ_AND, fmt = ASM_FMT_A6;
- break;
- case 0xC4: case 0xCC:
- op = ASM_OP_CMP_LT, fmt = ASM_FMT_A8;
- break;
- case 0xC5: case 0xCD:
- op = ASM_OP_CMP_EQ_AND, fmt = ASM_FMT_A8;
- break;
- case 0xC6: case 0xCE:
- op = ASM_OP_CMP4_LT, fmt = ASM_FMT_A8;
- break;
- case 0xC7: case 0xCF:
- op = ASM_OP_CMP4_EQ_AND, fmt = ASM_FMT_A8;
- break;
- case 0xC8:
- op = ASM_OP_CMP_GT_AND, fmt = ASM_FMT_A7;
- break;
- case 0xC9:
- op = ASM_OP_CMP_GE_AND, fmt = ASM_FMT_A7;
- break;
- case 0xCA:
- op = ASM_OP_CMP4_GT_AND, fmt = ASM_FMT_A7;
- break;
- case 0xCB:
- op = ASM_OP_CMP4_GE_AND, fmt = ASM_FMT_A7;
- break;
- case 0xD0:
- op = ASM_OP_CMP_LTU, fmt = ASM_FMT_A6;
- break;
- case 0xD1:
- op = ASM_OP_CMP_EQ_OR, fmt = ASM_FMT_A6;
- break;
- case 0xD2:
- op = ASM_OP_CMP4_LTU, fmt = ASM_FMT_A6;
- break;
- case 0xD3:
- op = ASM_OP_CMP4_EQ_OR, fmt = ASM_FMT_A6;
- break;
- case 0xD4: case 0xDC:
- op = ASM_OP_CMP_LTU, fmt = ASM_FMT_A8;
- break;
- case 0xD5: case 0xDD:
- op = ASM_OP_CMP_EQ_OR, fmt = ASM_FMT_A8;
- break;
- case 0xD6: case 0xDE:
- op = ASM_OP_CMP4_LTU, fmt = ASM_FMT_A8;
- break;
- case 0xD7: case 0xDF:
- op = ASM_OP_CMP4_EQ_OR, fmt = ASM_FMT_A8;
- break;
- case 0xD8:
- op = ASM_OP_CMP_GT_OR, fmt = ASM_FMT_A7;
- break;
- case 0xD9:
- op = ASM_OP_CMP_GE_OR, fmt = ASM_FMT_A7;
- break;
- case 0xDA:
- op = ASM_OP_CMP4_GT_OR, fmt = ASM_FMT_A7;
- break;
- case 0xDB:
- op = ASM_OP_CMP4_GE_OR, fmt = ASM_FMT_A7;
- break;
- case 0xE0:
- op = ASM_OP_CMP_EQ, fmt = ASM_FMT_A6;
- break;
- case 0xE1:
- op = ASM_OP_CMP_EQ_OR_ANDCM, fmt = ASM_FMT_A6;
- break;
- case 0xE2:
- op = ASM_OP_CMP4_EQ, fmt = ASM_FMT_A6;
- break;
- case 0xE3:
- op = ASM_OP_CMP4_EQ_OR_ANDCM, fmt = ASM_FMT_A6;
- break;
- case 0xE4: case 0xEC:
- op = ASM_OP_CMP_EQ, fmt = ASM_FMT_A8;
- break;
- case 0xE5: case 0xED:
- op = ASM_OP_CMP_EQ_OR_ANDCM, fmt = ASM_FMT_A8;
- break;
- case 0xE6: case 0xEE:
- op = ASM_OP_CMP4_EQ, fmt = ASM_FMT_A8;
- break;
- case 0xE7: case 0xEF:
- op = ASM_OP_CMP4_EQ_OR_ANDCM, fmt = ASM_FMT_A8;
- break;
- case 0xE8:
- op = ASM_OP_CMP_GT_OR_ANDCM, fmt = ASM_FMT_A7;
- break;
- case 0xE9:
- op = ASM_OP_CMP_GE_OR_ANDCM, fmt = ASM_FMT_A7;
- break;
- case 0xEA:
- op = ASM_OP_CMP4_GT_OR_ANDCM, fmt = ASM_FMT_A7;
- break;
- case 0xEB:
- op = ASM_OP_CMP4_GE_OR_ANDCM, fmt = ASM_FMT_A7;
- break;
- }
- } else {
- switch (FIELD(bits, 33, 8)) { /* maj + tb + x2 + ta */
- case 0xC0:
- op = ASM_OP_CMP_LT_UNC, fmt = ASM_FMT_A6;
- break;
- case 0xC1:
- op = ASM_OP_CMP_NE_AND, fmt = ASM_FMT_A6;
- break;
- case 0xC2:
- op = ASM_OP_CMP4_LT_UNC, fmt = ASM_FMT_A6;
- break;
- case 0xC3:
- op = ASM_OP_CMP4_NE_AND, fmt = ASM_FMT_A6;
- break;
- case 0xC4: case 0xCC:
- op = ASM_OP_CMP_LT_UNC, fmt = ASM_FMT_A8;
- break;
- case 0xC5: case 0xCD:
- op = ASM_OP_CMP_NE_AND, fmt = ASM_FMT_A8;
- break;
- case 0xC6: case 0xCE:
- op = ASM_OP_CMP4_LT_UNC, fmt = ASM_FMT_A8;
- break;
- case 0xC7: case 0xCF:
- op = ASM_OP_CMP4_NE_AND, fmt = ASM_FMT_A8;
- break;
- case 0xC8:
- op = ASM_OP_CMP_LE_AND, fmt = ASM_FMT_A7;
- break;
- case 0xC9:
- op = ASM_OP_CMP_LT_AND, fmt = ASM_FMT_A7;
- break;
- case 0xCA:
- op = ASM_OP_CMP4_LE_AND, fmt = ASM_FMT_A7;
- break;
- case 0xCB:
- op = ASM_OP_CMP4_LT_AND, fmt = ASM_FMT_A7;
- break;
- case 0xD0:
- op = ASM_OP_CMP_LTU_UNC, fmt = ASM_FMT_A6;
- break;
- case 0xD1:
- op = ASM_OP_CMP_NE_OR, fmt = ASM_FMT_A6;
- break;
- case 0xD2:
- op = ASM_OP_CMP4_LTU_UNC, fmt = ASM_FMT_A6;
- break;
- case 0xD3:
- op = ASM_OP_CMP4_NE_OR, fmt = ASM_FMT_A6;
- break;
- case 0xD4: case 0xDC:
- op = ASM_OP_CMP_LTU_UNC, fmt = ASM_FMT_A8;
- break;
- case 0xD5: case 0xDD:
- op = ASM_OP_CMP_NE_OR, fmt = ASM_FMT_A8;
- break;
- case 0xD6: case 0xDE:
- op = ASM_OP_CMP4_LTU_UNC, fmt = ASM_FMT_A8;
- break;
- case 0xD7: case 0xDF:
- op = ASM_OP_CMP4_NE_OR, fmt = ASM_FMT_A8;
- break;
- case 0xD8:
- op = ASM_OP_CMP_LE_OR, fmt = ASM_FMT_A7;
- break;
- case 0xD9:
- op = ASM_OP_CMP_LT_OR, fmt = ASM_FMT_A7;
- break;
- case 0xDA:
- op = ASM_OP_CMP4_LE_OR, fmt = ASM_FMT_A7;
- break;
- case 0xDB:
- op = ASM_OP_CMP4_LT_OR, fmt = ASM_FMT_A7;
- break;
- case 0xE0:
- op = ASM_OP_CMP_EQ_UNC, fmt = ASM_FMT_A6;
- break;
- case 0xE1:
- op = ASM_OP_CMP_NE_OR_ANDCM, fmt = ASM_FMT_A6;
- break;
- case 0xE2:
- op = ASM_OP_CMP4_EQ_UNC, fmt = ASM_FMT_A6;
- break;
- case 0xE3:
- op = ASM_OP_CMP4_NE_OR_ANDCM, fmt = ASM_FMT_A6;
- break;
- case 0xE4: case 0xEC:
- op = ASM_OP_CMP_EQ_UNC, fmt = ASM_FMT_A8;
- break;
- case 0xE5: case 0xED:
- op = ASM_OP_CMP_NE_OR_ANDCM, fmt = ASM_FMT_A8;
- break;
- case 0xE6: case 0xEE:
- op = ASM_OP_CMP4_EQ_UNC, fmt = ASM_FMT_A8;
- break;
- case 0xE7: case 0xEF:
- op = ASM_OP_CMP4_NE_OR_ANDCM, fmt = ASM_FMT_A8;
- break;
- case 0xE8:
- op = ASM_OP_CMP_LE_OR_ANDCM, fmt = ASM_FMT_A7;
- break;
- case 0xE9:
- op = ASM_OP_CMP_LT_OR_ANDCM, fmt = ASM_FMT_A7;
- break;
- case 0xEA:
- op = ASM_OP_CMP4_LE_OR_ANDCM, fmt = ASM_FMT_A7;
- break;
- case 0xEB:
- op = ASM_OP_CMP4_LT_OR_ANDCM, fmt = ASM_FMT_A7;
- break;
- }
- }
- break;
- }
-
- if (op != ASM_OP_NONE)
- return (asm_extract(op, fmt, bits, b, slot));
- return (0);
-}
-
-/*
- * Decode B-unit instructions.
- */
-static int
-asm_decodeB(uint64_t ip, struct asm_bundle *b, int slot)
-{
- uint64_t bits;
- enum asm_fmt fmt;
- enum asm_op op;
-
- bits = SLOT(ip, slot);
- fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
-
- switch((int)OPCODE(bits)) {
- case 0x0:
- switch (FIELD(bits, 27, 6)) { /* x6 */
- case 0x0:
- op = ASM_OP_BREAK_B, fmt = ASM_FMT_B9;
- break;
- case 0x2:
- op = ASM_OP_COVER, fmt = ASM_FMT_B8;
- break;
- case 0x4:
- op = ASM_OP_CLRRRB_, fmt = ASM_FMT_B8;
- break;
- case 0x5:
- op = ASM_OP_CLRRRB_PR, fmt = ASM_FMT_B8;
- break;
- case 0x8:
- op = ASM_OP_RFI, fmt = ASM_FMT_B8;
- break;
- case 0xC:
- op = ASM_OP_BSW_0, fmt = ASM_FMT_B8;
- break;
- case 0xD:
- op = ASM_OP_BSW_1, fmt = ASM_FMT_B8;
- break;
- case 0x10:
- op = ASM_OP_EPC, fmt = ASM_FMT_B8;
- break;
- case 0x20:
- switch (FIELD(bits, 6, 3)) { /* btype */
- case 0x0:
- op = ASM_OP_BR_COND, fmt = ASM_FMT_B4;
- break;
- case 0x1:
- op = ASM_OP_BR_IA, fmt = ASM_FMT_B4;
- break;
- }
- break;
- case 0x21:
- if (FIELD(bits, 6, 3) == 4) /* btype */
- op = ASM_OP_BR_RET, fmt = ASM_FMT_B4;
- break;
- }
- break;
- case 0x1:
- op = ASM_OP_BR_CALL, fmt = ASM_FMT_B5;
- break;
- case 0x2:
- switch (FIELD(bits, 27, 6)) { /* x6 */
- case 0x0:
- op = ASM_OP_NOP_B, fmt = ASM_FMT_B9;
- break;
- case 0x10:
- op = ASM_OP_BRP_, fmt = ASM_FMT_B7;
- break;
- case 0x11:
- op = ASM_OP_BRP_RET, fmt = ASM_FMT_B7;
- break;
- }
- break;
- case 0x4:
- switch (FIELD(bits, 6, 3)) { /* btype */
- case 0x0:
- op = ASM_OP_BR_COND, fmt = ASM_FMT_B1;
- break;
- case 0x2:
- op = ASM_OP_BR_WEXIT, fmt = ASM_FMT_B1;
- break;
- case 0x3:
- op = ASM_OP_BR_WTOP, fmt = ASM_FMT_B1;
- break;
- case 0x5:
- op = ASM_OP_BR_CLOOP, fmt = ASM_FMT_B2;
- break;
- case 0x6:
- op = ASM_OP_BR_CEXIT, fmt = ASM_FMT_B2;
- break;
- case 0x7:
- op = ASM_OP_BR_CTOP, fmt = ASM_FMT_B2;
- break;
- }
- break;
- case 0x5:
- op = ASM_OP_BR_CALL, fmt = ASM_FMT_B3;
- break;
- case 0x7:
- op = ASM_OP_BRP_, fmt = ASM_FMT_B6;
- break;
- }
-
- if (op != ASM_OP_NONE)
- return (asm_extract(op, fmt, bits, b, slot));
- return (0);
-}
-
-/*
- * Decode F-unit instructions.
- */
-static int
-asm_decodeF(uint64_t ip, struct asm_bundle *b, int slot)
-{
- uint64_t bits;
- enum asm_fmt fmt;
- enum asm_op op;
-
- bits = SLOT(ip, slot);
- fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
-
- switch((int)OPCODE(bits)) {
- case 0x0:
- if (FIELD(bits, 33, 1) == 0) { /* x */
- switch (FIELD(bits, 27, 6)) { /* x6 */
- case 0x0:
- op = ASM_OP_BREAK_F, fmt = ASM_FMT_F15;
- break;
- case 0x1:
- op = ASM_OP_NOP_F, fmt = ASM_FMT_F15;
- break;
- case 0x4:
- op = ASM_OP_FSETC, fmt = ASM_FMT_F12;
- break;
- case 0x5:
- op = ASM_OP_FCLRF, fmt = ASM_FMT_F13;
- break;
- case 0x8:
- op = ASM_OP_FCHKF, fmt = ASM_FMT_F14;
- break;
- case 0x10:
- op = ASM_OP_FMERGE_S, fmt = ASM_FMT_F9;
- break;
- case 0x11:
- op = ASM_OP_FMERGE_NS, fmt = ASM_FMT_F9;
- break;
- case 0x12:
- op = ASM_OP_FMERGE_SE, fmt = ASM_FMT_F9;
- break;
- case 0x14:
- op = ASM_OP_FMIN, fmt = ASM_FMT_F8;
- break;
- case 0x15:
- op = ASM_OP_FMAX, fmt = ASM_FMT_F8;
- break;
- case 0x16:
- op = ASM_OP_FAMIN, fmt = ASM_FMT_F8;
- break;
- case 0x17:
- op = ASM_OP_FAMAX, fmt = ASM_FMT_F8;
- break;
- case 0x18:
- op = ASM_OP_FCVT_FX, fmt = ASM_FMT_F10;
- break;
- case 0x19:
- op = ASM_OP_FCVT_FXU, fmt = ASM_FMT_F10;
- break;
- case 0x1A:
- op = ASM_OP_FCVT_FX_TRUNC, fmt = ASM_FMT_F10;
- break;
- case 0x1B:
- op = ASM_OP_FCVT_FXU_TRUNC, fmt = ASM_FMT_F10;
- break;
- case 0x1C:
- op = ASM_OP_FCVT_XF, fmt = ASM_FMT_F11;
- break;
- case 0x28:
- op = ASM_OP_FPACK, fmt = ASM_FMT_F9;
- break;
- case 0x2C:
- op = ASM_OP_FAND, fmt = ASM_FMT_F9;
- break;
- case 0x2D:
- op = ASM_OP_FANDCM, fmt = ASM_FMT_F9;
- break;
- case 0x2E:
- op = ASM_OP_FOR, fmt = ASM_FMT_F9;
- break;
- case 0x2F:
- op = ASM_OP_FXOR, fmt = ASM_FMT_F9;
- break;
- case 0x34:
- op = ASM_OP_FSWAP_, fmt = ASM_FMT_F9;
- break;
- case 0x35:
- op = ASM_OP_FSWAP_NL, fmt = ASM_FMT_F9;
- break;
- case 0x36:
- op = ASM_OP_FSWAP_NR, fmt = ASM_FMT_F9;
- break;
- case 0x39:
- op = ASM_OP_FMIX_LR, fmt = ASM_FMT_F9;
- break;
- case 0x3A:
- op = ASM_OP_FMIX_R, fmt = ASM_FMT_F9;
- break;
- case 0x3B:
- op = ASM_OP_FMIX_L, fmt = ASM_FMT_F9;
- break;
- case 0x3C:
- op = ASM_OP_FSXT_R, fmt = ASM_FMT_F9;
- break;
- case 0x3D:
- op = ASM_OP_FSXT_L, fmt = ASM_FMT_F9;
- break;
- }
- } else {
- if (FIELD(bits, 36, 1) == 0) /* q */
- op = ASM_OP_FRCPA, fmt = ASM_FMT_F6;
- else
- op = ASM_OP_FRSQRTA, fmt = ASM_FMT_F7;
- }
- break;
- case 0x1:
- if (FIELD(bits, 33, 1) == 0) { /* x */
- switch (FIELD(bits, 27, 6)) { /* x6 */
- case 0x10:
- op = ASM_OP_FPMERGE_S, fmt = ASM_FMT_F9;
- break;
- case 0x11:
- op = ASM_OP_FPMERGE_NS, fmt = ASM_FMT_F9;
- break;
- case 0x12:
- op = ASM_OP_FPMERGE_SE, fmt = ASM_FMT_F9;
- break;
- case 0x14:
- op = ASM_OP_FPMIN, fmt = ASM_FMT_F8;
- break;
- case 0x15:
- op = ASM_OP_FPMAX, fmt = ASM_FMT_F8;
- break;
- case 0x16:
- op = ASM_OP_FPAMIN, fmt = ASM_FMT_F8;
- break;
- case 0x17:
- op = ASM_OP_FPAMAX, fmt = ASM_FMT_F8;
- break;
- case 0x18:
- op = ASM_OP_FPCVT_FX, fmt = ASM_FMT_F10;
- break;
- case 0x19:
- op = ASM_OP_FPCVT_FXU, fmt = ASM_FMT_F10;
- break;
- case 0x1A:
- op = ASM_OP_FPCVT_FX_TRUNC, fmt = ASM_FMT_F10;
- break;
- case 0x1B:
- op = ASM_OP_FPCVT_FXU_TRUNC, fmt = ASM_FMT_F10;
- break;
- case 0x30:
- op = ASM_OP_FPCMP_EQ, fmt = ASM_FMT_F8;
- break;
- case 0x31:
- op = ASM_OP_FPCMP_LT, fmt = ASM_FMT_F8;
- break;
- case 0x32:
- op = ASM_OP_FPCMP_LE, fmt = ASM_FMT_F8;
- break;
- case 0x33:
- op = ASM_OP_FPCMP_UNORD, fmt = ASM_FMT_F8;
- break;
- case 0x34:
- op = ASM_OP_FPCMP_NEQ, fmt = ASM_FMT_F8;
- break;
- case 0x35:
- op = ASM_OP_FPCMP_NLT, fmt = ASM_FMT_F8;
- break;
- case 0x36:
- op = ASM_OP_FPCMP_NLE, fmt = ASM_FMT_F8;
- break;
- case 0x37:
- op = ASM_OP_FPCMP_ORD, fmt = ASM_FMT_F8;
- break;
- }
- } else {
- if (FIELD(bits, 36, 1) == 0) /* q */
- op = ASM_OP_FPRCPA, fmt = ASM_FMT_F6;
- else
- op = ASM_OP_FPRSQRTA, fmt = ASM_FMT_F7;
- }
- break;
- case 0x4:
- op = ASM_OP_FCMP, fmt = ASM_FMT_F4;
- break;
- case 0x5:
- op = ASM_OP_FCLASS_M, fmt = ASM_FMT_F5;
- break;
- case 0x8:
- if (FIELD(bits, 36, 1) == 0) /* x */
- op = ASM_OP_FMA_, fmt = ASM_FMT_F1;
- else
- op = ASM_OP_FMA_S, fmt = ASM_FMT_F1;
- break;
- case 0x9:
- if (FIELD(bits, 36, 1) == 0) /* x */
- op = ASM_OP_FMA_D, fmt = ASM_FMT_F1;
- else
- op = ASM_OP_FPMA, fmt = ASM_FMT_F1;
- break;
- case 0xA:
- if (FIELD(bits, 36, 1) == 0) /* x */
- op = ASM_OP_FMS_, fmt = ASM_FMT_F1;
- else
- op = ASM_OP_FMS_S, fmt = ASM_FMT_F1;
- break;
- case 0xB:
- if (FIELD(bits, 36, 1) == 0) /* x */
- op = ASM_OP_FMS_D, fmt = ASM_FMT_F1;
- else
- op = ASM_OP_FPMS, fmt = ASM_FMT_F1;
- break;
- case 0xC:
- if (FIELD(bits, 36, 1) == 0) /* x */
- op = ASM_OP_FNMA_, fmt = ASM_FMT_F1;
- else
- op = ASM_OP_FNMA_S, fmt = ASM_FMT_F1;
- break;
- case 0xD:
- if (FIELD(bits, 36, 1) == 0) /* x */
- op = ASM_OP_FNMA_D, fmt = ASM_FMT_F1;
- else
- op = ASM_OP_FPNMA, fmt = ASM_FMT_F1;
- break;
- case 0xE:
- if (FIELD(bits, 36, 1) == 1) { /* x */
- switch (FIELD(bits, 34, 2)) { /* x2 */
- case 0x0:
- op = ASM_OP_XMA_L, fmt = ASM_FMT_F2;
- break;
- case 0x2:
- op = ASM_OP_XMA_HU, fmt = ASM_FMT_F2;
- break;
- case 0x3:
- op = ASM_OP_XMA_H, fmt = ASM_FMT_F2;
- break;
- }
- } else
- op = ASM_OP_FSELECT, fmt = ASM_FMT_F3;
- break;
- }
-
- if (op != ASM_OP_NONE)
- return (asm_extract(op, fmt, bits, b, slot));
- return (0);
-}
-
-/*
- * Decode I-unit instructions.
- */
-static int
-asm_decodeI(uint64_t ip, struct asm_bundle *b, int slot)
-{
- uint64_t bits;
- enum asm_fmt fmt;
- enum asm_op op;
-
- bits = SLOT(ip, slot);
- if ((int)OPCODE(bits) >= 8)
- return (asm_decodeA(bits, b, slot));
- fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
-
- switch((int)OPCODE(bits)) {
- case 0x0:
- switch (FIELD(bits, 33, 3)) { /* x3 */
- case 0x0:
- switch (FIELD(bits, 27, 6)) { /* x6 */
- case 0x0:
- op = ASM_OP_BREAK_I, fmt = ASM_FMT_I19;
- break;
- case 0x1:
- op = ASM_OP_NOP_I, fmt = ASM_FMT_I19;
- break;
- case 0xA:
- op = ASM_OP_MOV_I, fmt = ASM_FMT_I27;
- break;
- case 0x10:
- op = ASM_OP_ZXT1, fmt = ASM_FMT_I29;
- break;
- case 0x11:
- op = ASM_OP_ZXT2, fmt = ASM_FMT_I29;
- break;
- case 0x12:
- op = ASM_OP_ZXT4, fmt = ASM_FMT_I29;
- break;
- case 0x14:
- op = ASM_OP_SXT1, fmt = ASM_FMT_I29;
- break;
- case 0x15:
- op = ASM_OP_SXT2, fmt = ASM_FMT_I29;
- break;
- case 0x16:
- op = ASM_OP_SXT4, fmt = ASM_FMT_I29;
- break;
- case 0x18:
- op = ASM_OP_CZX1_L, fmt = ASM_FMT_I29;
- break;
- case 0x19:
- op = ASM_OP_CZX2_L, fmt = ASM_FMT_I29;
- break;
- case 0x1C:
- op = ASM_OP_CZX1_R, fmt = ASM_FMT_I29;
- break;
- case 0x1D:
- op = ASM_OP_CZX2_R, fmt = ASM_FMT_I29;
- break;
- case 0x2A:
- op = ASM_OP_MOV_I, fmt = ASM_FMT_I26;
- break;
- case 0x30:
- op = ASM_OP_MOV_IP, fmt = ASM_FMT_I25;
- break;
- case 0x31:
- op = ASM_OP_MOV_, fmt = ASM_FMT_I22;
- break;
- case 0x32:
- op = ASM_OP_MOV_I, fmt = ASM_FMT_I28;
- break;
- case 0x33:
- op = ASM_OP_MOV_PR, fmt = ASM_FMT_I25;
- break;
- }
- break;
- case 0x1:
- op = ASM_OP_CHK_S_I, fmt = ASM_FMT_I20;
- break;
- case 0x2:
- op = ASM_OP_MOV_, fmt = ASM_FMT_I24;
- break;
- case 0x3:
- op = ASM_OP_MOV_, fmt = ASM_FMT_I23;
- break;
- case 0x7:
- if (FIELD(bits, 22, 1) == 0) /* x */
- op = ASM_OP_MOV_, fmt = ASM_FMT_I21;
- else
- op = ASM_OP_MOV_RET, fmt = ASM_FMT_I21;
- break;
- }
- break;
- case 0x4:
- op = ASM_OP_DEP_, fmt = ASM_FMT_I15;
- break;
- case 0x5:
- switch (FIELD(bits, 33, 3)) { /* x + x2 */
- case 0x0:
- if (FIELD(bits, 36, 1) == 0) { /* tb */
- switch (FIELD(bits, 12, 2)) { /* c + y */
- case 0x0:
- op = ASM_OP_TBIT_Z, fmt = ASM_FMT_I16;
- break;
- case 0x1:
- op = ASM_OP_TBIT_Z_UNC,
- fmt = ASM_FMT_I16;
- break;
- case 0x2:
- op = ASM_OP_TNAT_Z, fmt = ASM_FMT_I17;
- break;
- case 0x3:
- op = ASM_OP_TNAT_Z_UNC,
- fmt = ASM_FMT_I17;
- break;
- }
- } else {
- switch (FIELD(bits, 12, 2)) { /* c + y */
- case 0x0:
- op = ASM_OP_TBIT_Z_AND,
- fmt = ASM_FMT_I16;
- break;
- case 0x1:
- op = ASM_OP_TBIT_NZ_AND,
- fmt = ASM_FMT_I16;
- break;
- case 0x2:
- op = ASM_OP_TNAT_Z_AND,
- fmt = ASM_FMT_I17;
- break;
- case 0x3:
- op = ASM_OP_TNAT_NZ_AND,
- fmt = ASM_FMT_I17;
- break;
- }
- }
- break;
- case 0x1:
- if (FIELD(bits, 36, 1) == 0) { /* tb */
- switch (FIELD(bits, 12, 2)) { /* c + y */
- case 0x0:
- op = ASM_OP_TBIT_Z_OR,
- fmt = ASM_FMT_I16;
- break;
- case 0x1:
- op = ASM_OP_TBIT_NZ_OR,
- fmt = ASM_FMT_I16;
- break;
- case 0x2:
- op = ASM_OP_TNAT_Z_OR,
- fmt = ASM_FMT_I17;
- break;
- case 0x3:
- op = ASM_OP_TNAT_NZ_OR,
- fmt = ASM_FMT_I17;
- break;
- }
- } else {
- switch (FIELD(bits, 12, 2)) { /* c + y */
- case 0x0:
- op = ASM_OP_TBIT_Z_OR_ANDCM,
- fmt = ASM_FMT_I16;
- break;
- case 0x1:
- op = ASM_OP_TBIT_NZ_OR_ANDCM,
- fmt = ASM_FMT_I16;
- break;
- case 0x2:
- op = ASM_OP_TNAT_Z_OR_ANDCM,
- fmt = ASM_FMT_I17;
- break;
- case 0x3:
- op = ASM_OP_TNAT_NZ_OR_ANDCM,
- fmt = ASM_FMT_I17;
- break;
- }
- }
- break;
- case 0x2:
- op = ASM_OP_EXTR, fmt = ASM_FMT_I11;
- break;
- case 0x3:
- if (FIELD(bits, 26, 1) == 0) /* y */
- op = ASM_OP_DEP_Z, fmt = ASM_FMT_I12;
- else
- op = ASM_OP_DEP_Z, fmt = ASM_FMT_I13;
- break;
- case 0x6:
- op = ASM_OP_SHRP, fmt = ASM_FMT_I10;
- break;
- case 0x7:
- op = ASM_OP_DEP_, fmt = ASM_FMT_I14;
- break;
- }
- break;
- case 0x7:
- switch (FIELD(bits, 32, 5)) { /* ve + zb + x2a + za */
- case 0x2:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x0:
- op = ASM_OP_PSHR2_U, fmt = ASM_FMT_I5;
- break;
- case 0x1: case 0x5: case 0x9: case 0xD:
- op = ASM_OP_PMPYSHR2_U, fmt = ASM_FMT_I1;
- break;
- case 0x2:
- op = ASM_OP_PSHR2_, fmt = ASM_FMT_I5;
- break;
- case 0x3: case 0x7: case 0xB: case 0xF:
- op = ASM_OP_PMPYSHR2_, fmt = ASM_FMT_I1;
- break;
- case 0x4:
- op = ASM_OP_PSHL2, fmt = ASM_FMT_I7;
- break;
- }
- break;
- case 0x6:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x1:
- op = ASM_OP_PSHR2_U, fmt = ASM_FMT_I6;
- break;
- case 0x3:
- op = ASM_OP_PSHR2_, fmt = ASM_FMT_I6;
- break;
- case 0x9:
- op = ASM_OP_POPCNT, fmt = ASM_FMT_I9;
- break;
- }
- break;
- case 0x8:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x1:
- op = ASM_OP_PMIN1_U, fmt = ASM_FMT_I2;
- break;
- case 0x4:
- op = ASM_OP_UNPACK1_H, fmt = ASM_FMT_I2;
- break;
- case 0x5:
- op = ASM_OP_PMAX1_U, fmt = ASM_FMT_I2;
- break;
- case 0x6:
- op = ASM_OP_UNPACK1_L, fmt = ASM_FMT_I2;
- break;
- case 0x8:
- op = ASM_OP_MIX1_R, fmt = ASM_FMT_I2;
- break;
- case 0xA:
- op = ASM_OP_MIX1_L, fmt = ASM_FMT_I2;
- break;
- case 0xB:
- op = ASM_OP_PSAD1, fmt = ASM_FMT_I2;
- break;
- }
- break;
- case 0xA:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x0:
- op = ASM_OP_PACK2_USS, fmt = ASM_FMT_I2;
- break;
- case 0x2:
- op = ASM_OP_PACK2_SSS, fmt = ASM_FMT_I2;
- break;
- case 0x3:
- op = ASM_OP_PMIN2, fmt = ASM_FMT_I2;
- break;
- case 0x4:
- op = ASM_OP_UNPACK2_H, fmt = ASM_FMT_I2;
- break;
- case 0x6:
- op = ASM_OP_UNPACK2_L, fmt = ASM_FMT_I2;
- break;
- case 0x7:
- op = ASM_OP_PMAX2, fmt = ASM_FMT_I2;
- break;
- case 0x8:
- op = ASM_OP_MIX2_R, fmt = ASM_FMT_I2;
- break;
- case 0xA:
- op = ASM_OP_MIX2_L, fmt = ASM_FMT_I2;
- break;
- case 0xD:
- op = ASM_OP_PMPY2_R, fmt = ASM_FMT_I2;
- break;
- case 0xF:
- op = ASM_OP_PMPY2_L, fmt = ASM_FMT_I2;
- break;
- }
- break;
- case 0xC:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0xA:
- op = ASM_OP_MUX1, fmt = ASM_FMT_I3;
- break;
- }
- break;
- case 0xE:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x5:
- op = ASM_OP_PSHL2, fmt = ASM_FMT_I8;
- break;
- case 0xA:
- op = ASM_OP_MUX2, fmt = ASM_FMT_I4;
- break;
- }
- break;
- case 0x10:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x0:
- op = ASM_OP_PSHR4_U, fmt = ASM_FMT_I5;
- break;
- case 0x2:
- op = ASM_OP_PSHR4_, fmt = ASM_FMT_I5;
- break;
- case 0x4:
- op = ASM_OP_PSHL4, fmt = ASM_FMT_I7;
- break;
- }
- break;
- case 0x12:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x0:
- op = ASM_OP_SHR_U, fmt = ASM_FMT_I5;
- break;
- case 0x2:
- op = ASM_OP_SHR_, fmt = ASM_FMT_I5;
- break;
- case 0x4:
- op = ASM_OP_SHL, fmt = ASM_FMT_I7;
- break;
- }
- break;
- case 0x14:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x1:
- op = ASM_OP_PSHR4_U, fmt = ASM_FMT_I6;
- break;
- case 0x3:
- op = ASM_OP_PSHR4_, fmt = ASM_FMT_I6;
- break;
- }
- break;
- case 0x18:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x2:
- op = ASM_OP_PACK4_SSS, fmt = ASM_FMT_I2;
- break;
- case 0x4:
- op = ASM_OP_UNPACK4_H, fmt = ASM_FMT_I2;
- break;
- case 0x6:
- op = ASM_OP_UNPACK4_L, fmt = ASM_FMT_I2;
- break;
- case 0x8:
- op = ASM_OP_MIX4_R, fmt = ASM_FMT_I2;
- break;
- case 0xA:
- op = ASM_OP_MIX4_L, fmt = ASM_FMT_I2;
- break;
- }
- break;
- case 0x1C:
- switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
- case 0x5:
- op = ASM_OP_PSHL4, fmt = ASM_FMT_I8;
- break;
- }
- break;
- }
- break;
- }
-
- if (op != ASM_OP_NONE)
- return (asm_extract(op, fmt, bits, b, slot));
- return (0);
-}
-
-/*
- * Decode M-unit instructions.
- */
-static int
-asm_decodeM(uint64_t ip, struct asm_bundle *b, int slot)
-{
- uint64_t bits;
- enum asm_fmt fmt;
- enum asm_op op;
-
- bits = SLOT(ip, slot);
- if ((int)OPCODE(bits) >= 8)
- return (asm_decodeA(bits, b, slot));
- fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
-
- switch((int)OPCODE(bits)) {
- case 0x0:
- switch (FIELD(bits, 33, 3)) { /* x3 */
- case 0x0:
- switch (FIELD(bits, 27, 6)) { /* x6 (x4 + x2) */
- case 0x0:
- op = ASM_OP_BREAK_M, fmt = ASM_FMT_M37;
- break;
- case 0x1:
- op = ASM_OP_NOP_M, fmt = ASM_FMT_M37;
- break;
- case 0x4: case 0x14: case 0x24: case 0x34:
- op = ASM_OP_SUM, fmt = ASM_FMT_M44;
- break;
- case 0x5: case 0x15: case 0x25: case 0x35:
- op = ASM_OP_RUM, fmt = ASM_FMT_M44;
- break;
- case 0x6: case 0x16: case 0x26: case 0x36:
- op = ASM_OP_SSM, fmt = ASM_FMT_M44;
- break;
- case 0x7: case 0x17: case 0x27: case 0x37:
- op = ASM_OP_RSM, fmt = ASM_FMT_M44;
- break;
- case 0xA:
- op = ASM_OP_LOADRS, fmt = ASM_FMT_M25;
- break;
- case 0xC:
- op = ASM_OP_FLUSHRS, fmt = ASM_FMT_M25;
- break;
- case 0x10:
- op = ASM_OP_INVALA_, fmt = ASM_FMT_M24;
- break;
- case 0x12:
- op = ASM_OP_INVALA_E, fmt = ASM_FMT_M26;
- break;
- case 0x13:
- op = ASM_OP_INVALA_E, fmt = ASM_FMT_M27;
- break;
- case 0x20:
- op = ASM_OP_FWB, fmt = ASM_FMT_M24;
- break;
- case 0x22:
- op = ASM_OP_MF_, fmt = ASM_FMT_M24;
- break;
- case 0x23:
- op = ASM_OP_MF_A, fmt = ASM_FMT_M24;
- break;
- case 0x28:
- op = ASM_OP_MOV_M, fmt = ASM_FMT_M30;
- break;
- case 0x30:
- op = ASM_OP_SRLZ_D, fmt = ASM_FMT_M24;
- break;
- case 0x31:
- op = ASM_OP_SRLZ_I, fmt = ASM_FMT_M24;
- break;
- case 0x33:
- op = ASM_OP_SYNC_I, fmt = ASM_FMT_M24;
- break;
- }
- break;
- case 0x4:
- op = ASM_OP_CHK_A_NC, fmt = ASM_FMT_M22;
- break;
- case 0x5:
- op = ASM_OP_CHK_A_CLR, fmt = ASM_FMT_M22;
- break;
- case 0x6:
- op = ASM_OP_CHK_A_NC, fmt = ASM_FMT_M23;
- break;
- case 0x7:
- op = ASM_OP_CHK_A_CLR, fmt = ASM_FMT_M23;
- break;
- }
- break;
- case 0x1:
- switch (FIELD(bits, 33, 3)) { /* x3 */
- case 0x0:
- switch (FIELD(bits, 27, 6)) { /* x6 (x4 + x2) */
- case 0x0:
- op = ASM_OP_MOV_RR, fmt = ASM_FMT_M42;
- break;
- case 0x1:
- op = ASM_OP_MOV_DBR, fmt = ASM_FMT_M42;
- break;
- case 0x2:
- op = ASM_OP_MOV_IBR, fmt = ASM_FMT_M42;
- break;
- case 0x3:
- op = ASM_OP_MOV_PKR, fmt = ASM_FMT_M42;
- break;
- case 0x4:
- op = ASM_OP_MOV_PMC, fmt = ASM_FMT_M42;
- break;
- case 0x5:
- op = ASM_OP_MOV_PMD, fmt = ASM_FMT_M42;
- break;
- case 0x6:
- op = ASM_OP_MOV_MSR, fmt = ASM_FMT_M42;
- break;
- case 0x9:
- op = ASM_OP_PTC_L, fmt = ASM_FMT_M45;
- break;
- case 0xA:
- op = ASM_OP_PTC_G, fmt = ASM_FMT_M45;
- break;
- case 0xB:
- op = ASM_OP_PTC_GA, fmt = ASM_FMT_M45;
- break;
- case 0xC:
- op = ASM_OP_PTR_D, fmt = ASM_FMT_M45;
- break;
- case 0xD:
- op = ASM_OP_PTR_I, fmt = ASM_FMT_M45;
- break;
- case 0xE:
- op = ASM_OP_ITR_D, fmt = ASM_FMT_M42;
- break;
- case 0xF:
- op = ASM_OP_ITR_I, fmt = ASM_FMT_M42;
- break;
- case 0x10:
- op = ASM_OP_MOV_RR, fmt = ASM_FMT_M43;
- break;
- case 0x11:
- op = ASM_OP_MOV_DBR, fmt = ASM_FMT_M43;
- break;
- case 0x12:
- op = ASM_OP_MOV_IBR, fmt = ASM_FMT_M43;
- break;
- case 0x13:
- op = ASM_OP_MOV_PKR, fmt = ASM_FMT_M43;
- break;
- case 0x14:
- op = ASM_OP_MOV_PMC, fmt = ASM_FMT_M43;
- break;
- case 0x15:
- op = ASM_OP_MOV_PMD, fmt = ASM_FMT_M43;
- break;
- case 0x16:
- op = ASM_OP_MOV_MSR, fmt = ASM_FMT_M43;
- break;
- case 0x17:
- op = ASM_OP_MOV_CPUID, fmt = ASM_FMT_M43;
- break;
- case 0x18:
- op = ASM_OP_PROBE_R, fmt = ASM_FMT_M39;
- break;
- case 0x19:
- op = ASM_OP_PROBE_W, fmt = ASM_FMT_M39;
- break;
- case 0x1A:
- op = ASM_OP_THASH, fmt = ASM_FMT_M46;
- break;
- case 0x1B:
- op = ASM_OP_TTAG, fmt = ASM_FMT_M46;
- break;
- case 0x1E:
- op = ASM_OP_TPA, fmt = ASM_FMT_M46;
- break;
- case 0x1F:
- op = ASM_OP_TAK, fmt = ASM_FMT_M46;
- break;
- case 0x21:
- op = ASM_OP_MOV_PSR_UM, fmt = ASM_FMT_M36;
- break;
- case 0x22:
- op = ASM_OP_MOV_M, fmt = ASM_FMT_M31;
- break;
- case 0x24:
- op = ASM_OP_MOV_, fmt = ASM_FMT_M33;
- break;
- case 0x25:
- op = ASM_OP_MOV_PSR, fmt = ASM_FMT_M36;
- break;
- case 0x29:
- op = ASM_OP_MOV_PSR_UM, fmt = ASM_FMT_M35;
- break;
- case 0x2A:
- op = ASM_OP_MOV_M, fmt = ASM_FMT_M29;
- break;
- case 0x2C:
- op = ASM_OP_MOV_, fmt = ASM_FMT_M32;
- break;
- case 0x2D:
- op = ASM_OP_MOV_PSR_L, fmt = ASM_FMT_M35;
- break;
- case 0x2E:
- op = ASM_OP_ITC_D, fmt = ASM_FMT_M41;
- break;
- case 0x2F:
- op = ASM_OP_ITC_I, fmt = ASM_FMT_M41;
- break;
- case 0x30:
- if (FIELD(bits, 36, 1) == 0) /* x */
- op = ASM_OP_FC_, fmt = ASM_FMT_M28;
- else
- op = ASM_OP_FC_I, fmt = ASM_FMT_M28;
- break;
- case 0x31:
- op = ASM_OP_PROBE_RW_FAULT, fmt = ASM_FMT_M40;
- break;
- case 0x32:
- op = ASM_OP_PROBE_R_FAULT, fmt = ASM_FMT_M40;
- break;
- case 0x33:
- op = ASM_OP_PROBE_W_FAULT, fmt = ASM_FMT_M40;
- break;
- case 0x34:
- op = ASM_OP_PTC_E, fmt = ASM_FMT_M28;
- break;
- case 0x38:
- op = ASM_OP_PROBE_R, fmt = ASM_FMT_M38;
- break;
- case 0x39:
- op = ASM_OP_PROBE_W, fmt = ASM_FMT_M38;
- break;
- }
- break;
- case 0x1:
- op = ASM_OP_CHK_S_M, fmt = ASM_FMT_M20;
- break;
- case 0x3:
- op = ASM_OP_CHK_S, fmt = ASM_FMT_M21;
- break;
- case 0x6:
- op = ASM_OP_ALLOC, fmt = ASM_FMT_M34;
- break;
- }
- break;
- case 0x4:
- if (FIELD(bits, 27, 1) == 0) { /* x */
- switch (FIELD(bits, 30, 7)) { /* x6 + m */
- case 0x0:
- op = ASM_OP_LD1_, fmt = ASM_FMT_M1;
- break;
- case 0x1:
- op = ASM_OP_LD2_, fmt = ASM_FMT_M1;
- break;
- case 0x2:
- op = ASM_OP_LD4_, fmt = ASM_FMT_M1;
- break;
- case 0x3:
- op = ASM_OP_LD8_, fmt = ASM_FMT_M1;
- break;
- case 0x4:
- op = ASM_OP_LD1_S, fmt = ASM_FMT_M1;
- break;
- case 0x5:
- op = ASM_OP_LD2_S, fmt = ASM_FMT_M1;
- break;
- case 0x6:
- op = ASM_OP_LD4_S, fmt = ASM_FMT_M1;
- break;
- case 0x7:
- op = ASM_OP_LD8_S, fmt = ASM_FMT_M1;
- break;
- case 0x8:
- op = ASM_OP_LD1_A, fmt = ASM_FMT_M1;
- break;
- case 0x9:
- op = ASM_OP_LD2_A, fmt = ASM_FMT_M1;
- break;
- case 0xA:
- op = ASM_OP_LD4_A, fmt = ASM_FMT_M1;
- break;
- case 0xB:
- op = ASM_OP_LD8_A, fmt = ASM_FMT_M1;
- break;
- case 0xC:
- op = ASM_OP_LD1_SA, fmt = ASM_FMT_M1;
- break;
- case 0xD:
- op = ASM_OP_LD2_SA, fmt = ASM_FMT_M1;
- break;
- case 0xE:
- op = ASM_OP_LD4_SA, fmt = ASM_FMT_M1;
- break;
- case 0xF:
- op = ASM_OP_LD8_SA, fmt = ASM_FMT_M1;
- break;
- case 0x10:
- op = ASM_OP_LD1_BIAS, fmt = ASM_FMT_M1;
- break;
- case 0x11:
- op = ASM_OP_LD2_BIAS, fmt = ASM_FMT_M1;
- break;
- case 0x12:
- op = ASM_OP_LD4_BIAS, fmt = ASM_FMT_M1;
- break;
- case 0x13:
- op = ASM_OP_LD8_BIAS, fmt = ASM_FMT_M1;
- break;
- case 0x14:
- op = ASM_OP_LD1_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x15:
- op = ASM_OP_LD2_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x16:
- op = ASM_OP_LD4_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x17:
- op = ASM_OP_LD8_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x1B:
- op = ASM_OP_LD8_FILL, fmt = ASM_FMT_M1;
- break;
- case 0x20:
- op = ASM_OP_LD1_C_CLR, fmt = ASM_FMT_M1;
- break;
- case 0x21:
- op = ASM_OP_LD2_C_CLR, fmt = ASM_FMT_M1;
- break;
- case 0x22:
- op = ASM_OP_LD4_C_CLR, fmt = ASM_FMT_M1;
- break;
- case 0x23:
- op = ASM_OP_LD8_C_CLR, fmt = ASM_FMT_M1;
- break;
- case 0x24:
- op = ASM_OP_LD1_C_NC, fmt = ASM_FMT_M1;
- break;
- case 0x25:
- op = ASM_OP_LD2_C_NC, fmt = ASM_FMT_M1;
- break;
- case 0x26:
- op = ASM_OP_LD4_C_NC, fmt = ASM_FMT_M1;
- break;
- case 0x27:
- op = ASM_OP_LD8_C_NC, fmt = ASM_FMT_M1;
- break;
- case 0x28:
- op = ASM_OP_LD1_C_CLR_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x29:
- op = ASM_OP_LD2_C_CLR_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x2A:
- op = ASM_OP_LD4_C_CLR_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x2B:
- op = ASM_OP_LD8_C_CLR_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x30:
- op = ASM_OP_ST1_, fmt = ASM_FMT_M4;
- break;
- case 0x31:
- op = ASM_OP_ST2_, fmt = ASM_FMT_M4;
- break;
- case 0x32:
- op = ASM_OP_ST4_, fmt = ASM_FMT_M4;
- break;
- case 0x33:
- op = ASM_OP_ST8_, fmt = ASM_FMT_M4;
- break;
- case 0x34:
- op = ASM_OP_ST1_REL, fmt = ASM_FMT_M4;
- break;
- case 0x35:
- op = ASM_OP_ST2_REL, fmt = ASM_FMT_M4;
- break;
- case 0x36:
- op = ASM_OP_ST4_REL, fmt = ASM_FMT_M4;
- break;
- case 0x37:
- op = ASM_OP_ST8_REL, fmt = ASM_FMT_M4;
- break;
- case 0x3B:
- op = ASM_OP_ST8_SPILL, fmt = ASM_FMT_M4;
- break;
- case 0x40:
- op = ASM_OP_LD1_, fmt = ASM_FMT_M2;
- break;
- case 0x41:
- op = ASM_OP_LD2_, fmt = ASM_FMT_M2;
- break;
- case 0x42:
- op = ASM_OP_LD4_, fmt = ASM_FMT_M2;
- break;
- case 0x43:
- op = ASM_OP_LD8_, fmt = ASM_FMT_M2;
- break;
- case 0x44:
- op = ASM_OP_LD1_S, fmt = ASM_FMT_M2;
- break;
- case 0x45:
- op = ASM_OP_LD2_S, fmt = ASM_FMT_M2;
- break;
- case 0x46:
- op = ASM_OP_LD4_S, fmt = ASM_FMT_M2;
- break;
- case 0x47:
- op = ASM_OP_LD8_S, fmt = ASM_FMT_M2;
- break;
- case 0x48:
- op = ASM_OP_LD1_A, fmt = ASM_FMT_M2;
- break;
- case 0x49:
- op = ASM_OP_LD2_A, fmt = ASM_FMT_M2;
- break;
- case 0x4A:
- op = ASM_OP_LD4_A, fmt = ASM_FMT_M2;
- break;
- case 0x4B:
- op = ASM_OP_LD8_A, fmt = ASM_FMT_M2;
- break;
- case 0x4C:
- op = ASM_OP_LD1_SA, fmt = ASM_FMT_M2;
- break;
- case 0x4D:
- op = ASM_OP_LD2_SA, fmt = ASM_FMT_M2;
- break;
- case 0x4E:
- op = ASM_OP_LD4_SA, fmt = ASM_FMT_M2;
- break;
- case 0x4F:
- op = ASM_OP_LD8_SA, fmt = ASM_FMT_M2;
- break;
- case 0x50:
- op = ASM_OP_LD1_BIAS, fmt = ASM_FMT_M2;
- break;
- case 0x51:
- op = ASM_OP_LD2_BIAS, fmt = ASM_FMT_M2;
- break;
- case 0x52:
- op = ASM_OP_LD4_BIAS, fmt = ASM_FMT_M2;
- break;
- case 0x53:
- op = ASM_OP_LD8_BIAS, fmt = ASM_FMT_M2;
- break;
- case 0x54:
- op = ASM_OP_LD1_ACQ, fmt = ASM_FMT_M2;
- break;
- case 0x55:
- op = ASM_OP_LD2_ACQ, fmt = ASM_FMT_M2;
- break;
- case 0x56:
- op = ASM_OP_LD4_ACQ, fmt = ASM_FMT_M2;
- break;
- case 0x57:
- op = ASM_OP_LD8_ACQ, fmt = ASM_FMT_M2;
- break;
- case 0x5B:
- op = ASM_OP_LD8_FILL, fmt = ASM_FMT_M2;
- break;
- case 0x60:
- op = ASM_OP_LD1_C_CLR, fmt = ASM_FMT_M2;
- break;
- case 0x61:
- op = ASM_OP_LD2_C_CLR, fmt = ASM_FMT_M2;
- break;
- case 0x62:
- op = ASM_OP_LD4_C_CLR, fmt = ASM_FMT_M2;
- break;
- case 0x63:
- op = ASM_OP_LD8_C_CLR, fmt = ASM_FMT_M2;
- break;
- case 0x64:
- op = ASM_OP_LD1_C_NC, fmt = ASM_FMT_M2;
- break;
- case 0x65:
- op = ASM_OP_LD2_C_NC, fmt = ASM_FMT_M2;
- break;
- case 0x66:
- op = ASM_OP_LD4_C_NC, fmt = ASM_FMT_M2;
- break;
- case 0x67:
- op = ASM_OP_LD8_C_NC, fmt = ASM_FMT_M2;
- break;
- case 0x68:
- op = ASM_OP_LD1_C_CLR_ACQ, fmt = ASM_FMT_M2;
- break;
- case 0x69:
- op = ASM_OP_LD2_C_CLR_ACQ, fmt = ASM_FMT_M2;
- break;
- case 0x6A:
- op = ASM_OP_LD4_C_CLR_ACQ, fmt = ASM_FMT_M2;
- break;
- case 0x6B:
- op = ASM_OP_LD8_C_CLR_ACQ, fmt = ASM_FMT_M2;
- break;
- }
- } else {
- switch (FIELD(bits, 30, 7)) { /* x6 + m */
- case 0x0:
- op = ASM_OP_CMPXCHG1_ACQ, fmt = ASM_FMT_M16;
- break;
- case 0x1:
- op = ASM_OP_CMPXCHG2_ACQ, fmt = ASM_FMT_M16;
- break;
- case 0x2:
- op = ASM_OP_CMPXCHG4_ACQ, fmt = ASM_FMT_M16;
- break;
- case 0x3:
- op = ASM_OP_CMPXCHG8_ACQ, fmt = ASM_FMT_M16;
- break;
- case 0x4:
- op = ASM_OP_CMPXCHG1_REL, fmt = ASM_FMT_M16;
- break;
- case 0x5:
- op = ASM_OP_CMPXCHG2_REL, fmt = ASM_FMT_M16;
- break;
- case 0x6:
- op = ASM_OP_CMPXCHG4_REL, fmt = ASM_FMT_M16;
- break;
- case 0x7:
- op = ASM_OP_CMPXCHG8_REL, fmt = ASM_FMT_M16;
- break;
- case 0x8:
- op = ASM_OP_XCHG1, fmt = ASM_FMT_M16;
- break;
- case 0x9:
- op = ASM_OP_XCHG2, fmt = ASM_FMT_M16;
- break;
- case 0xA:
- op = ASM_OP_XCHG4, fmt = ASM_FMT_M16;
- break;
- case 0xB:
- op = ASM_OP_XCHG8, fmt = ASM_FMT_M16;
- break;
- case 0x12:
- op = ASM_OP_FETCHADD4_ACQ, fmt = ASM_FMT_M17;
- break;
- case 0x13:
- op = ASM_OP_FETCHADD8_ACQ, fmt = ASM_FMT_M17;
- break;
- case 0x16:
- op = ASM_OP_FETCHADD4_REL, fmt = ASM_FMT_M17;
- break;
- case 0x17:
- op = ASM_OP_FETCHADD8_REL, fmt = ASM_FMT_M17;
- break;
- case 0x1C:
- op = ASM_OP_GETF_SIG, fmt = ASM_FMT_M19;
- break;
- case 0x1D:
- op = ASM_OP_GETF_EXP, fmt = ASM_FMT_M19;
- break;
- case 0x1E:
- op = ASM_OP_GETF_S, fmt = ASM_FMT_M19;
- break;
- case 0x1F:
- op = ASM_OP_GETF_D, fmt = ASM_FMT_M19;
- break;
- case 0x20:
- op = ASM_OP_CMP8XCHG16_ACQ, fmt = ASM_FMT_M16;
- break;
- case 0x24:
- op = ASM_OP_CMP8XCHG16_REL, fmt = ASM_FMT_M16;
- break;
- case 0x28:
- op = ASM_OP_LD16_, fmt = ASM_FMT_M1;
- break;
- case 0x2C:
- op = ASM_OP_LD16_ACQ, fmt = ASM_FMT_M1;
- break;
- case 0x30:
- op = ASM_OP_ST16_, fmt = ASM_FMT_M4;
- break;
- case 0x34:
- op = ASM_OP_ST16_REL, fmt = ASM_FMT_M4;
- break;
- }
- }
- break;
- case 0x5:
- switch (FIELD(bits, 30, 6)) { /* x6 */
- case 0x0:
- op = ASM_OP_LD1_, fmt = ASM_FMT_M3;
- break;
- case 0x1:
- op = ASM_OP_LD2_, fmt = ASM_FMT_M3;
- break;
- case 0x2:
- op = ASM_OP_LD4_, fmt = ASM_FMT_M3;
- break;
- case 0x3:
- op = ASM_OP_LD8_, fmt = ASM_FMT_M3;
- break;
- case 0x4:
- op = ASM_OP_LD1_S, fmt = ASM_FMT_M3;
- break;
- case 0x5:
- op = ASM_OP_LD2_S, fmt = ASM_FMT_M3;
- break;
- case 0x6:
- op = ASM_OP_LD4_S, fmt = ASM_FMT_M3;
- break;
- case 0x7:
- op = ASM_OP_LD8_S, fmt = ASM_FMT_M3;
- break;
- case 0x8:
- op = ASM_OP_LD1_A, fmt = ASM_FMT_M3;
- break;
- case 0x9:
- op = ASM_OP_LD2_A, fmt = ASM_FMT_M3;
- break;
- case 0xA:
- op = ASM_OP_LD4_A, fmt = ASM_FMT_M3;
- break;
- case 0xB:
- op = ASM_OP_LD8_A, fmt = ASM_FMT_M3;
- break;
- case 0xC:
- op = ASM_OP_LD1_SA, fmt = ASM_FMT_M3;
- break;
- case 0xD:
- op = ASM_OP_LD2_SA, fmt = ASM_FMT_M3;
- break;
- case 0xE:
- op = ASM_OP_LD4_SA, fmt = ASM_FMT_M3;
- break;
- case 0xF:
- op = ASM_OP_LD8_SA, fmt = ASM_FMT_M3;
- break;
- case 0x10:
- op = ASM_OP_LD1_BIAS, fmt = ASM_FMT_M3;
- break;
- case 0x11:
- op = ASM_OP_LD2_BIAS, fmt = ASM_FMT_M3;
- break;
- case 0x12:
- op = ASM_OP_LD4_BIAS, fmt = ASM_FMT_M3;
- break;
- case 0x13:
- op = ASM_OP_LD8_BIAS, fmt = ASM_FMT_M3;
- break;
- case 0x14:
- op = ASM_OP_LD1_ACQ, fmt = ASM_FMT_M3;
- break;
- case 0x15:
- op = ASM_OP_LD2_ACQ, fmt = ASM_FMT_M3;
- break;
- case 0x16:
- op = ASM_OP_LD4_ACQ, fmt = ASM_FMT_M3;
- break;
- case 0x17:
- op = ASM_OP_LD8_ACQ, fmt = ASM_FMT_M3;
- break;
- case 0x1B:
- op = ASM_OP_LD8_FILL, fmt = ASM_FMT_M3;
- break;
- case 0x20:
- op = ASM_OP_LD1_C_CLR, fmt = ASM_FMT_M3;
- break;
- case 0x21:
- op = ASM_OP_LD2_C_CLR, fmt = ASM_FMT_M3;
- break;
- case 0x22:
- op = ASM_OP_LD4_C_CLR, fmt = ASM_FMT_M3;
- break;
- case 0x23:
- op = ASM_OP_LD8_C_CLR, fmt = ASM_FMT_M3;
- break;
- case 0x24:
- op = ASM_OP_LD1_C_NC, fmt = ASM_FMT_M3;
- break;
- case 0x25:
- op = ASM_OP_LD2_C_NC, fmt = ASM_FMT_M3;
- break;
- case 0x26:
- op = ASM_OP_LD4_C_NC, fmt = ASM_FMT_M3;
- break;
- case 0x27:
- op = ASM_OP_LD8_C_NC, fmt = ASM_FMT_M3;
- break;
- case 0x28:
- op = ASM_OP_LD1_C_CLR_ACQ, fmt = ASM_FMT_M3;
- break;
- case 0x29:
- op = ASM_OP_LD2_C_CLR_ACQ, fmt = ASM_FMT_M3;
- break;
- case 0x2A:
- op = ASM_OP_LD4_C_CLR_ACQ, fmt = ASM_FMT_M3;
- break;
- case 0x2B:
- op = ASM_OP_LD8_C_CLR_ACQ, fmt = ASM_FMT_M3;
- break;
- case 0x30:
- op = ASM_OP_ST1_, fmt = ASM_FMT_M5;
- break;
- case 0x31:
- op = ASM_OP_ST2_, fmt = ASM_FMT_M5;
- break;
- case 0x32:
- op = ASM_OP_ST4_, fmt = ASM_FMT_M5;
- break;
- case 0x33:
- op = ASM_OP_ST8_, fmt = ASM_FMT_M5;
- break;
- case 0x34:
- op = ASM_OP_ST1_REL, fmt = ASM_FMT_M5;
- break;
- case 0x35:
- op = ASM_OP_ST2_REL, fmt = ASM_FMT_M5;
- break;
- case 0x36:
- op = ASM_OP_ST4_REL, fmt = ASM_FMT_M5;
- break;
- case 0x37:
- op = ASM_OP_ST8_REL, fmt = ASM_FMT_M5;
- break;
- case 0x3B:
- op = ASM_OP_ST8_SPILL, fmt = ASM_FMT_M5;
- break;
- }
- break;
- case 0x6:
- if (FIELD(bits, 27, 1) == 0) { /* x */
- switch (FIELD(bits, 30, 7)) { /* x6 + m */
- case 0x0:
- op = ASM_OP_LDFE_, fmt = ASM_FMT_M6;
- break;
- case 0x1:
- op = ASM_OP_LDF8_, fmt = ASM_FMT_M6;
- break;
- case 0x2:
- op = ASM_OP_LDFS_, fmt = ASM_FMT_M6;
- break;
- case 0x3:
- op = ASM_OP_LDFD_, fmt = ASM_FMT_M6;
- break;
- case 0x4:
- op = ASM_OP_LDFE_S, fmt = ASM_FMT_M6;
- break;
- case 0x5:
- op = ASM_OP_LDF8_S, fmt = ASM_FMT_M6;
- break;
- case 0x6:
- op = ASM_OP_LDFS_S, fmt = ASM_FMT_M6;
- break;
- case 0x7:
- op = ASM_OP_LDFD_S, fmt = ASM_FMT_M6;
- break;
- case 0x8:
- op = ASM_OP_LDFE_A, fmt = ASM_FMT_M6;
- break;
- case 0x9:
- op = ASM_OP_LDF8_A, fmt = ASM_FMT_M6;
- break;
- case 0xA:
- op = ASM_OP_LDFS_A, fmt = ASM_FMT_M6;
- break;
- case 0xB:
- op = ASM_OP_LDFD_A, fmt = ASM_FMT_M6;
- break;
- case 0xC:
- op = ASM_OP_LDFE_SA, fmt = ASM_FMT_M6;
- break;
- case 0xD:
- op = ASM_OP_LDF8_SA, fmt = ASM_FMT_M6;
- break;
- case 0xE:
- op = ASM_OP_LDFS_SA, fmt = ASM_FMT_M6;
- break;
- case 0xF:
- op = ASM_OP_LDFD_SA, fmt = ASM_FMT_M6;
- break;
- case 0x1B:
- op = ASM_OP_LDF_FILL, fmt = ASM_FMT_M6;
- break;
- case 0x20:
- op = ASM_OP_LDFE_C_CLR, fmt = ASM_FMT_M6;
- break;
- case 0x21:
- op = ASM_OP_LDF8_C_CLR, fmt = ASM_FMT_M6;
- break;
- case 0x22:
- op = ASM_OP_LDFS_C_CLR, fmt = ASM_FMT_M6;
- break;
- case 0x23:
- op = ASM_OP_LDFD_C_CLR, fmt = ASM_FMT_M6;
- break;
- case 0x24:
- op = ASM_OP_LDFE_C_NC, fmt = ASM_FMT_M6;
- break;
- case 0x25:
- op = ASM_OP_LDF8_C_NC, fmt = ASM_FMT_M6;
- break;
- case 0x26:
- op = ASM_OP_LDFS_C_NC, fmt = ASM_FMT_M6;
- break;
- case 0x27:
- op = ASM_OP_LDFD_C_NC, fmt = ASM_FMT_M6;
- break;
- case 0x2C:
- op = ASM_OP_LFETCH_, fmt = ASM_FMT_M13;
- break;
- case 0x2D:
- op = ASM_OP_LFETCH_EXCL, fmt = ASM_FMT_M13;
- break;
- case 0x2E:
- op = ASM_OP_LFETCH_FAULT, fmt = ASM_FMT_M13;
- break;
- case 0x2F:
- op = ASM_OP_LFETCH_FAULT_EXCL,
- fmt = ASM_FMT_M13;
- break;
- case 0x30:
- op = ASM_OP_STFE, fmt = ASM_FMT_M9;
- break;
- case 0x31:
- op = ASM_OP_STF8, fmt = ASM_FMT_M9;
- break;
- case 0x32:
- op = ASM_OP_STFS, fmt = ASM_FMT_M9;
- break;
- case 0x33:
- op = ASM_OP_STFD, fmt = ASM_FMT_M9;
- break;
- case 0x3B:
- op = ASM_OP_STF_SPILL, fmt = ASM_FMT_M9;
- break;
- case 0x40:
- op = ASM_OP_LDFE_, fmt = ASM_FMT_M7;
- break;
- case 0x41:
- op = ASM_OP_LDF8_, fmt = ASM_FMT_M7;
- break;
- case 0x42:
- op = ASM_OP_LDFS_, fmt = ASM_FMT_M7;
- break;
- case 0x43:
- op = ASM_OP_LDFD_, fmt = ASM_FMT_M7;
- break;
- case 0x44:
- op = ASM_OP_LDFE_S, fmt = ASM_FMT_M7;
- break;
- case 0x45:
- op = ASM_OP_LDF8_S, fmt = ASM_FMT_M7;
- break;
- case 0x46:
- op = ASM_OP_LDFS_S, fmt = ASM_FMT_M7;
- break;
- case 0x47:
- op = ASM_OP_LDFD_S, fmt = ASM_FMT_M7;
- break;
- case 0x48:
- op = ASM_OP_LDFE_A, fmt = ASM_FMT_M7;
- break;
- case 0x49:
- op = ASM_OP_LDF8_A, fmt = ASM_FMT_M7;
- break;
- case 0x4A:
- op = ASM_OP_LDFS_A, fmt = ASM_FMT_M7;
- break;
- case 0x4B:
- op = ASM_OP_LDFD_A, fmt = ASM_FMT_M7;
- break;
- case 0x4C:
- op = ASM_OP_LDFE_SA, fmt = ASM_FMT_M7;
- break;
- case 0x4D:
- op = ASM_OP_LDF8_SA, fmt = ASM_FMT_M7;
- break;
- case 0x4E:
- op = ASM_OP_LDFS_SA, fmt = ASM_FMT_M7;
- break;
- case 0x4F:
- op = ASM_OP_LDFD_SA, fmt = ASM_FMT_M7;
- break;
- case 0x5B:
- op = ASM_OP_LDF_FILL, fmt = ASM_FMT_M7;
- break;
- case 0x60:
- op = ASM_OP_LDFE_C_CLR, fmt = ASM_FMT_M7;
- break;
- case 0x61:
- op = ASM_OP_LDF8_C_CLR, fmt = ASM_FMT_M7;
- break;
- case 0x62:
- op = ASM_OP_LDFS_C_CLR, fmt = ASM_FMT_M7;
- break;
- case 0x63:
- op = ASM_OP_LDFD_C_CLR, fmt = ASM_FMT_M7;
- break;
- case 0x64:
- op = ASM_OP_LDFE_C_NC, fmt = ASM_FMT_M7;
- break;
- case 0x65:
- op = ASM_OP_LDF8_C_NC, fmt = ASM_FMT_M7;
- break;
- case 0x66:
- op = ASM_OP_LDFS_C_NC, fmt = ASM_FMT_M7;
- break;
- case 0x67:
- op = ASM_OP_LDFD_C_NC, fmt = ASM_FMT_M7;
- break;
- case 0x6C:
- op = ASM_OP_LFETCH_, fmt = ASM_FMT_M14;
- break;
- case 0x6D:
- op = ASM_OP_LFETCH_EXCL, fmt = ASM_FMT_M14;
- break;
- case 0x6E:
- op = ASM_OP_LFETCH_FAULT, fmt = ASM_FMT_M14;
- break;
- case 0x6F:
- op = ASM_OP_LFETCH_FAULT_EXCL,
- fmt = ASM_FMT_M14;
- break;
- }
- } else {
- switch (FIELD(bits, 30, 7)) { /* x6 + m */
- case 0x1:
- op = ASM_OP_LDFP8_, fmt = ASM_FMT_M11;
- break;
- case 0x2:
- op = ASM_OP_LDFPS_, fmt = ASM_FMT_M11;
- break;
- case 0x3:
- op = ASM_OP_LDFPD_, fmt = ASM_FMT_M11;
- break;
- case 0x5:
- op = ASM_OP_LDFP8_S, fmt = ASM_FMT_M11;
- break;
- case 0x6:
- op = ASM_OP_LDFPS_S, fmt = ASM_FMT_M11;
- break;
- case 0x7:
- op = ASM_OP_LDFPD_S, fmt = ASM_FMT_M11;
- break;
- case 0x9:
- op = ASM_OP_LDFP8_A, fmt = ASM_FMT_M11;
- break;
- case 0xA:
- op = ASM_OP_LDFPS_A, fmt = ASM_FMT_M11;
- break;
- case 0xB:
- op = ASM_OP_LDFPD_A, fmt = ASM_FMT_M11;
- break;
- case 0xD:
- op = ASM_OP_LDFP8_SA, fmt = ASM_FMT_M11;
- break;
- case 0xE:
- op = ASM_OP_LDFPS_SA, fmt = ASM_FMT_M11;
- break;
- case 0xF:
- op = ASM_OP_LDFPD_SA, fmt = ASM_FMT_M11;
- break;
- case 0x1C:
- op = ASM_OP_SETF_SIG, fmt = ASM_FMT_M18;
- break;
- case 0x1D:
- op = ASM_OP_SETF_EXP, fmt = ASM_FMT_M18;
- break;
- case 0x1E:
- op = ASM_OP_SETF_S, fmt = ASM_FMT_M18;
- break;
- case 0x1F:
- op = ASM_OP_SETF_D, fmt = ASM_FMT_M18;
- break;
- case 0x21:
- op = ASM_OP_LDFP8_C_CLR, fmt = ASM_FMT_M11;
- break;
- case 0x22:
- op = ASM_OP_LDFPS_C_CLR, fmt = ASM_FMT_M11;
- break;
- case 0x23:
- op = ASM_OP_LDFPD_C_CLR, fmt = ASM_FMT_M11;
- break;
- case 0x25:
- op = ASM_OP_LDFP8_C_NC, fmt = ASM_FMT_M11;
- break;
- case 0x26:
- op = ASM_OP_LDFPS_C_NC, fmt = ASM_FMT_M11;
- break;
- case 0x27:
- op = ASM_OP_LDFPD_C_NC, fmt = ASM_FMT_M11;
- break;
- case 0x41:
- op = ASM_OP_LDFP8_, fmt = ASM_FMT_M12;
- break;
- case 0x42:
- op = ASM_OP_LDFPS_, fmt = ASM_FMT_M12;
- break;
- case 0x43:
- op = ASM_OP_LDFPD_, fmt = ASM_FMT_M12;
- break;
- case 0x45:
- op = ASM_OP_LDFP8_S, fmt = ASM_FMT_M12;
- break;
- case 0x46:
- op = ASM_OP_LDFPS_S, fmt = ASM_FMT_M12;
- break;
- case 0x47:
- op = ASM_OP_LDFPD_S, fmt = ASM_FMT_M12;
- break;
- case 0x49:
- op = ASM_OP_LDFP8_A, fmt = ASM_FMT_M12;
- break;
- case 0x4A:
- op = ASM_OP_LDFPS_A, fmt = ASM_FMT_M12;
- break;
- case 0x4B:
- op = ASM_OP_LDFPD_A, fmt = ASM_FMT_M12;
- break;
- case 0x4D:
- op = ASM_OP_LDFP8_SA, fmt = ASM_FMT_M12;
- break;
- case 0x4E:
- op = ASM_OP_LDFPS_SA, fmt = ASM_FMT_M12;
- break;
- case 0x4F:
- op = ASM_OP_LDFPD_SA, fmt = ASM_FMT_M12;
- break;
- case 0x61:
- op = ASM_OP_LDFP8_C_CLR, fmt = ASM_FMT_M12;
- break;
- case 0x62:
- op = ASM_OP_LDFPS_C_CLR, fmt = ASM_FMT_M12;
- break;
- case 0x63:
- op = ASM_OP_LDFPD_C_CLR, fmt = ASM_FMT_M12;
- break;
- case 0x65:
- op = ASM_OP_LDFP8_C_NC, fmt = ASM_FMT_M12;
- break;
- case 0x66:
- op = ASM_OP_LDFPS_C_NC, fmt = ASM_FMT_M12;
- break;
- case 0x67:
- op = ASM_OP_LDFPD_C_NC, fmt = ASM_FMT_M12;
- break;
- }
- }
- break;
- case 0x7:
- switch (FIELD(bits, 30, 6)) { /* x6 */
- case 0x0:
- op = ASM_OP_LDFE_, fmt = ASM_FMT_M8;
- break;
- case 0x1:
- op = ASM_OP_LDF8_, fmt = ASM_FMT_M8;
- break;
- case 0x2:
- op = ASM_OP_LDFS_, fmt = ASM_FMT_M8;
- break;
- case 0x3:
- op = ASM_OP_LDFD_, fmt = ASM_FMT_M8;
- break;
- case 0x4:
- op = ASM_OP_LDFE_S, fmt = ASM_FMT_M8;
- break;
- case 0x5:
- op = ASM_OP_LDF8_S, fmt = ASM_FMT_M8;
- break;
- case 0x6:
- op = ASM_OP_LDFS_S, fmt = ASM_FMT_M8;
- break;
- case 0x7:
- op = ASM_OP_LDFD_S, fmt = ASM_FMT_M8;
- break;
- case 0x8:
- op = ASM_OP_LDFE_A, fmt = ASM_FMT_M8;
- break;
- case 0x9:
- op = ASM_OP_LDF8_A, fmt = ASM_FMT_M8;
- break;
- case 0xA:
- op = ASM_OP_LDFS_A, fmt = ASM_FMT_M8;
- break;
- case 0xB:
- op = ASM_OP_LDFD_A, fmt = ASM_FMT_M8;
- break;
- case 0xC:
- op = ASM_OP_LDFE_SA, fmt = ASM_FMT_M8;
- break;
- case 0xD:
- op = ASM_OP_LDF8_SA, fmt = ASM_FMT_M8;
- break;
- case 0xE:
- op = ASM_OP_LDFS_SA, fmt = ASM_FMT_M8;
- break;
- case 0xF:
- op = ASM_OP_LDFD_SA, fmt = ASM_FMT_M8;
- break;
- case 0x1B:
- op = ASM_OP_LDF_FILL, fmt = ASM_FMT_M8;
- break;
- case 0x20:
- op = ASM_OP_LDFE_C_CLR, fmt = ASM_FMT_M8;
- break;
- case 0x21:
- op = ASM_OP_LDF8_C_CLR, fmt = ASM_FMT_M8;
- break;
- case 0x22:
- op = ASM_OP_LDFS_C_CLR, fmt = ASM_FMT_M8;
- break;
- case 0x23:
- op = ASM_OP_LDFD_C_CLR, fmt = ASM_FMT_M8;
- break;
- case 0x24:
- op = ASM_OP_LDFE_C_NC, fmt = ASM_FMT_M8;
- break;
- case 0x25:
- op = ASM_OP_LDF8_C_NC, fmt = ASM_FMT_M8;
- break;
- case 0x26:
- op = ASM_OP_LDFS_C_NC, fmt = ASM_FMT_M8;
- break;
- case 0x27:
- op = ASM_OP_LDFD_C_NC, fmt = ASM_FMT_M8;
- break;
- case 0x2C:
- op = ASM_OP_LFETCH_, fmt = ASM_FMT_M15;
- break;
- case 0x2D:
- op = ASM_OP_LFETCH_EXCL, fmt = ASM_FMT_M15;
- break;
- case 0x2E:
- op = ASM_OP_LFETCH_FAULT, fmt = ASM_FMT_M15;
- break;
- case 0x2F:
- op = ASM_OP_LFETCH_FAULT_EXCL, fmt = ASM_FMT_M15;
- break;
- case 0x30:
- op = ASM_OP_STFE, fmt = ASM_FMT_M10;
- break;
- case 0x31:
- op = ASM_OP_STF8, fmt = ASM_FMT_M10;
- break;
- case 0x32:
- op = ASM_OP_STFS, fmt = ASM_FMT_M10;
- break;
- case 0x33:
- op = ASM_OP_STFD, fmt = ASM_FMT_M10;
- break;
- case 0x3B:
- op = ASM_OP_STF_SPILL, fmt = ASM_FMT_M10;
- break;
- }
- break;
- }
-
- if (op != ASM_OP_NONE)
- return (asm_extract(op, fmt, bits, b, slot));
- return (0);
-}
-
-/*
- * Decode X-unit instructions.
- */
-static int
-asm_decodeX(uint64_t ip, struct asm_bundle *b, int slot)
-{
- uint64_t bits;
- enum asm_fmt fmt;
- enum asm_op op;
-
- KASSERT(slot == 2, ("foo"));
- bits = SLOT(ip, slot);
- fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
- /* Initialize slot 1 (slot - 1) */
- b->b_inst[slot - 1].i_format = ASM_FMT_NONE;
- b->b_inst[slot - 1].i_bits = SLOT(ip, slot - 1);
-
- switch((int)OPCODE(bits)) {
- case 0x0:
- if (FIELD(bits, 33, 3) == 0) { /* x3 */
- switch (FIELD(bits, 27, 6)) { /* x6 */
- case 0x0:
- op = ASM_OP_BREAK_X, fmt = ASM_FMT_X1;
- break;
- case 0x1:
- op = ASM_OP_NOP_X, fmt = ASM_FMT_X1;
- break;
- }
- }
- break;
- case 0x6:
- if (FIELD(bits, 20, 1) == 0)
- op = ASM_OP_MOVL, fmt = ASM_FMT_X2;
- break;
- case 0xC:
- if (FIELD(bits, 6, 3) == 0) /* btype */
- op = ASM_OP_BRL_COND, fmt = ASM_FMT_X3;
- break;
- case 0xD:
- op = ASM_OP_BRL_CALL, fmt = ASM_FMT_X4;
- break;
- }
-
- if (op != ASM_OP_NONE)
- return (asm_extract(op, fmt, bits, b, slot));
- return (0);
-}
-
-int
-asm_decode(uint64_t ip, struct asm_bundle *b)
-{
- const char *tp;
- unsigned int slot;
- int ok;
-
- memset(b, 0, sizeof(*b));
-
- b->b_templ = asm_templname[TMPL(ip)];
- if (b->b_templ == 0)
- return (0);
-
- slot = 0;
- tp = b->b_templ;
-
- ok = 1;
- while (ok && *tp != 0) {
- switch (*tp++) {
- case 'B':
- ok = asm_decodeB(ip, b, slot++);
- break;
- case 'F':
- ok = asm_decodeF(ip, b, slot++);
- break;
- case 'I':
- ok = asm_decodeI(ip, b, slot++);
- break;
- case 'L':
- ok = (slot++ == 1) ? 1 : 0;
- break;
- case 'M':
- ok = asm_decodeM(ip, b, slot++);
- break;
- case 'X':
- ok = asm_decodeX(ip, b, slot++);
- break;
- case ';':
- ok = 1;
- break;
- default:
- ok = 0;
- break;
- }
- }
- return (ok);
-}
--- sys/ia64/disasm/disasm.h
+++ /dev/null
@@ -1,323 +0,0 @@
-/*-
- * Copyright (c) 2000-2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/disasm/disasm.h,v 1.3 2005/01/06 22:18:22 imp Exp $
- */
-
-#ifndef _DISASM_H_
-#define _DISASM_H_
-
-#ifndef _DISASM_INT_H_
-#define ASM_ADDITIONAL_OPCODES ASM_OP_NUMBER_OF_OPCODES
-#endif
-
-/* Application registers. */
-#define AR_K0 0
-#define AR_K1 1
-#define AR_K2 2
-#define AR_K3 3
-#define AR_K4 4
-#define AR_K5 5
-#define AR_K6 6
-#define AR_K7 7
-#define AR_RSC 16
-#define AR_BSP 17
-#define AR_BSPSTORE 18
-#define AR_RNAT 19
-#define AR_FCR 21
-#define AR_EFLAG 24
-#define AR_CSD 25
-#define AR_SSD 26
-#define AR_CFLG 27
-#define AR_FSR 28
-#define AR_FIR 29
-#define AR_FDR 30
-#define AR_CCV 32
-#define AR_UNAT 36
-#define AR_FPSR 40
-#define AR_ITC 44
-#define AR_PFS 64
-#define AR_LC 65
-#define AR_EC 66
-
-/* Control registers. */
-#define CR_DCR 0
-#define CR_ITM 1
-#define CR_IVA 2
-#define CR_PTA 8
-#define CR_IPSR 16
-#define CR_ISR 17
-#define CR_IIP 19
-#define CR_IFA 20
-#define CR_ITIR 21
-#define CR_IIPA 22
-#define CR_IFS 23
-#define CR_IIM 24
-#define CR_IHA 25
-#define CR_LID 64
-#define CR_IVR 65
-#define CR_TPR 66
-#define CR_EOI 67
-#define CR_IRR0 68
-#define CR_IRR1 69
-#define CR_IRR2 70
-#define CR_IRR3 71
-#define CR_ITV 72
-#define CR_PMV 73
-#define CR_CMCV 74
-#define CR_LRR0 80
-#define CR_LRR1 81
-
-enum asm_cmpltr_class {
- ASM_CC_NONE,
- ASM_CC_ACLR,
- ASM_CC_BSW, ASM_CC_BTYPE, ASM_CC_BWH,
- ASM_CC_CHK, ASM_CC_CLRRRB, ASM_CC_CREL, ASM_CC_CTYPE,
- ASM_CC_DEP, ASM_CC_DH,
- ASM_CC_FC, ASM_CC_FCREL, ASM_CC_FCTYPE, ASM_CC_FCVT, ASM_CC_FLDTYPE,
- ASM_CC_FMERGE, ASM_CC_FREL, ASM_CC_FSWAP,
- ASM_CC_GETF,
- ASM_CC_IH, ASM_CC_INVALA, ASM_CC_IPWH, ASM_CC_ITC, ASM_CC_ITR,
- ASM_CC_LDHINT, ASM_CC_LDTYPE, ASM_CC_LFETCH, ASM_CC_LFHINT,
- ASM_CC_LFTYPE, ASM_CC_LR,
- ASM_CC_MF, ASM_CC_MOV, ASM_CC_MWH,
- ASM_CC_PAVG, ASM_CC_PC, ASM_CC_PH, ASM_CC_PREL, ASM_CC_PRTYPE,
- ASM_CC_PTC, ASM_CC_PTR, ASM_CC_PVEC,
- ASM_CC_SAT, ASM_CC_SEM, ASM_CC_SETF, ASM_CC_SF, ASM_CC_SRLZ,
- ASM_CC_STHINT, ASM_CC_STTYPE, ASM_CC_SYNC,
- ASM_CC_RW,
- ASM_CC_TREL, ASM_CC_TRUNC,
- ASM_CC_UNIT, ASM_CC_UNPACK, ASM_CC_UNS,
- ASM_CC_XMA
-};
-
-enum asm_cmpltr_type {
- ASM_CT_NONE,
- ASM_CT_COND = ASM_CT_NONE,
-
- ASM_CT_0, ASM_CT_1,
- ASM_CT_A, ASM_CT_ACQ, ASM_CT_AND,
- ASM_CT_B, ASM_CT_BIAS,
- ASM_CT_C_CLR, ASM_CT_C_CLR_ACQ, ASM_CT_C_NC, ASM_CT_CALL,
- ASM_CT_CEXIT, ASM_CT_CLOOP, ASM_CT_CLR, ASM_CT_CTOP,
- ASM_CT_D, ASM_CT_DC_DC, ASM_CT_DC_NT, ASM_CT_DPNT, ASM_CT_DPTK,
- ASM_CT_E, ASM_CT_EQ, ASM_CT_EXCL, ASM_CT_EXIT, ASM_CT_EXP,
- ASM_CT_F, ASM_CT_FAULT, ASM_CT_FEW, ASM_CT_FILL, ASM_CT_FX, ASM_CT_FXU,
- ASM_CT_G, ASM_CT_GA, ASM_CT_GE, ASM_CT_GT,
- ASM_CT_H, ASM_CT_HU,
- ASM_CT_I, ASM_CT_IA, ASM_CT_IMP,
- ASM_CT_L, ASM_CT_LE, ASM_CT_LOOP, ASM_CT_LR, ASM_CT_LT, ASM_CT_LTU,
- ASM_CT_M, ASM_CT_MANY,
- ASM_CT_NC, ASM_CT_NE, ASM_CT_NEQ, ASM_CT_NL, ASM_CT_NLE, ASM_CT_NLT,
- ASM_CT_NM, ASM_CT_NR, ASM_CT_NS, ASM_CT_NT_DC, ASM_CT_NT_NT,
- ASM_CT_NT_TK, ASM_CT_NT1, ASM_CT_NT2, ASM_CT_NTA, ASM_CT_NZ,
- ASM_CT_OR, ASM_CT_OR_ANDCM, ASM_CT_ORD,
- ASM_CT_PR,
- ASM_CT_R, ASM_CT_RAZ, ASM_CT_REL, ASM_CT_RET, ASM_CT_RW,
- ASM_CT_S, ASM_CT_S0, ASM_CT_S1, ASM_CT_S2, ASM_CT_S3, ASM_CT_SA,
- ASM_CT_SE, ASM_CT_SIG, ASM_CT_SPILL, ASM_CT_SPNT, ASM_CT_SPTK,
- ASM_CT_SSS,
- ASM_CT_TK_DC, ASM_CT_TK_NT, ASM_CT_TK_TK, ASM_CT_TRUNC,
- ASM_CT_U, ASM_CT_UNC, ASM_CT_UNORD, ASM_CT_USS, ASM_CT_UUS, ASM_CT_UUU,
- ASM_CT_W, ASM_CT_WEXIT, ASM_CT_WTOP,
- ASM_CT_X, ASM_CT_XF,
- ASM_CT_Z,
-};
-
-/* Completer. */
-struct asm_cmpltr {
- enum asm_cmpltr_class c_class;
- enum asm_cmpltr_type c_type;
-};
-
-/* Operand types. */
-enum asm_oper_type {
- ASM_OPER_NONE,
- ASM_OPER_AREG, /* = ar# */
- ASM_OPER_BREG, /* = b# */
- ASM_OPER_CPUID, /* = cpuid[r#] */
- ASM_OPER_CREG, /* = cr# */
- ASM_OPER_DBR, /* = dbr[r#] */
- ASM_OPER_DISP, /* IP relative displacement. */
- ASM_OPER_DTR, /* = dtr[r#] */
- ASM_OPER_FREG, /* = f# */
- ASM_OPER_GREG, /* = r# */
- ASM_OPER_IBR, /* = ibr[r#] */
- ASM_OPER_IMM, /* Immediate */
- ASM_OPER_IP, /* = ip */
- ASM_OPER_ITR, /* = itr[r#] */
- ASM_OPER_MEM, /* = [r#] */
- ASM_OPER_MSR, /* = msr[r#] */
- ASM_OPER_PKR, /* = pkr[r#] */
- ASM_OPER_PMC, /* = pmc[r#] */
- ASM_OPER_PMD, /* = pmd[r#] */
- ASM_OPER_PR, /* = pr */
- ASM_OPER_PR_ROT, /* = pr.rot */
- ASM_OPER_PREG, /* = p# */
- ASM_OPER_PSR, /* = psr */
- ASM_OPER_PSR_L, /* = psr.l */
- ASM_OPER_PSR_UM, /* = psr.um */
- ASM_OPER_RR /* = rr[r#] */
-};
-
-/* Operand */
-struct asm_oper {
- enum asm_oper_type o_type;
- uint64_t o_value;
-};
-
-/* Instruction formats. */
-enum asm_fmt {
- ASM_FMT_NONE,
- ASM_FMT_A = 0x0100,
- ASM_FMT_A1, ASM_FMT_A2, ASM_FMT_A3, ASM_FMT_A4,
- ASM_FMT_A5, ASM_FMT_A6, ASM_FMT_A7, ASM_FMT_A8,
- ASM_FMT_A9, ASM_FMT_A10,
- ASM_FMT_B = 0x0200,
- ASM_FMT_B1, ASM_FMT_B2, ASM_FMT_B3, ASM_FMT_B4,
- ASM_FMT_B5, ASM_FMT_B6, ASM_FMT_B7, ASM_FMT_B8,
- ASM_FMT_B9,
- ASM_FMT_F = 0x0300,
- ASM_FMT_F1, ASM_FMT_F2, ASM_FMT_F3, ASM_FMT_F4,
- ASM_FMT_F5, ASM_FMT_F6, ASM_FMT_F7, ASM_FMT_F8,
- ASM_FMT_F9, ASM_FMT_F10, ASM_FMT_F11, ASM_FMT_F12,
- ASM_FMT_F13, ASM_FMT_F14, ASM_FMT_F15,
- ASM_FMT_I = 0x0400,
- ASM_FMT_I1, ASM_FMT_I2, ASM_FMT_I3, ASM_FMT_I4,
- ASM_FMT_I5, ASM_FMT_I6, ASM_FMT_I7, ASM_FMT_I8,
- ASM_FMT_I9, ASM_FMT_I10, ASM_FMT_I11, ASM_FMT_I12,
- ASM_FMT_I13, ASM_FMT_I14, ASM_FMT_I15, ASM_FMT_I16,
- ASM_FMT_I17, ASM_FMT_I19, ASM_FMT_I20, ASM_FMT_I21,
- ASM_FMT_I22, ASM_FMT_I23, ASM_FMT_I24, ASM_FMT_I25,
- ASM_FMT_I26, ASM_FMT_I27, ASM_FMT_I28, ASM_FMT_I29,
- ASM_FMT_M = 0x0500,
- ASM_FMT_M1, ASM_FMT_M2, ASM_FMT_M3, ASM_FMT_M4,
- ASM_FMT_M5, ASM_FMT_M6, ASM_FMT_M7, ASM_FMT_M8,
- ASM_FMT_M9, ASM_FMT_M10, ASM_FMT_M11, ASM_FMT_M12,
- ASM_FMT_M13, ASM_FMT_M14, ASM_FMT_M15, ASM_FMT_M16,
- ASM_FMT_M17, ASM_FMT_M18, ASM_FMT_M19, ASM_FMT_M20,
- ASM_FMT_M21, ASM_FMT_M22, ASM_FMT_M23, ASM_FMT_M24,
- ASM_FMT_M25, ASM_FMT_M26, ASM_FMT_M27, ASM_FMT_M28,
- ASM_FMT_M29, ASM_FMT_M30, ASM_FMT_M31, ASM_FMT_M32,
- ASM_FMT_M33, ASM_FMT_M34, ASM_FMT_M35, ASM_FMT_M36,
- ASM_FMT_M37, ASM_FMT_M38, ASM_FMT_M39, ASM_FMT_M40,
- ASM_FMT_M41, ASM_FMT_M42, ASM_FMT_M43, ASM_FMT_M44,
- ASM_FMT_M45, ASM_FMT_M46,
- ASM_FMT_X = 0x0600,
- ASM_FMT_X1, ASM_FMT_X2, ASM_FMT_X3, ASM_FMT_X4
-};
-
-/* Instruction opcodes. */
-enum asm_op {
- ASM_OP_NONE,
- ASM_OP_ADD, ASM_OP_ADDL, ASM_OP_ADDP4, ASM_OP_ADDS, ASM_OP_ALLOC,
- ASM_OP_AND, ASM_OP_ANDCM,
- ASM_OP_BR, ASM_OP_BREAK, ASM_OP_BRL, ASM_OP_BRP, ASM_OP_BSW,
- ASM_OP_CHK, ASM_OP_CLRRRB, ASM_OP_CMP, ASM_OP_CMP4, ASM_OP_CMP8XCHG16,
- ASM_OP_CMPXCHG1, ASM_OP_CMPXCHG2, ASM_OP_CMPXCHG4, ASM_OP_CMPXCHG8,
- ASM_OP_COVER, ASM_OP_CZX1, ASM_OP_CZX2,
- ASM_OP_DEP,
- ASM_OP_EPC, ASM_OP_EXTR,
- ASM_OP_FAMAX, ASM_OP_FAMIN, ASM_OP_FAND, ASM_OP_FANDCM, ASM_OP_FC,
- ASM_OP_FCHKF, ASM_OP_FCLASS, ASM_OP_FCLRF, ASM_OP_FCMP, ASM_OP_FCVT,
- ASM_OP_FETCHADD4, ASM_OP_FETCHADD8, ASM_OP_FLUSHRS, ASM_OP_FMA,
- ASM_OP_FMAX, ASM_OP_FMERGE, ASM_OP_FMIN, ASM_OP_FMIX, ASM_OP_FMS,
- ASM_OP_FNMA, ASM_OP_FOR, ASM_OP_FPACK, ASM_OP_FPAMAX, ASM_OP_FPAMIN,
- ASM_OP_FPCMP, ASM_OP_FPCVT, ASM_OP_FPMA, ASM_OP_FPMAX, ASM_OP_FPMERGE,
- ASM_OP_FPMIN, ASM_OP_FPMS, ASM_OP_FPNMA, ASM_OP_FPRCPA,
- ASM_OP_FPRSQRTA, ASM_OP_FRCPA, ASM_OP_FRSQRTA, ASM_OP_FSELECT,
- ASM_OP_FSETC, ASM_OP_FSWAP, ASM_OP_FSXT, ASM_OP_FWB, ASM_OP_FXOR,
- ASM_OP_GETF,
- ASM_OP_INVALA, ASM_OP_ITC, ASM_OP_ITR,
- ASM_OP_LD1, ASM_OP_LD16, ASM_OP_LD2, ASM_OP_LD4, ASM_OP_LD8,
- ASM_OP_LDF, ASM_OP_LDF8, ASM_OP_LDFD, ASM_OP_LDFE, ASM_OP_LDFP8,
- ASM_OP_LDFPD, ASM_OP_LDFPS, ASM_OP_LDFS, ASM_OP_LFETCH, ASM_OP_LOADRS,
- ASM_OP_MF, ASM_OP_MIX1, ASM_OP_MIX2, ASM_OP_MIX4, ASM_OP_MOV,
- ASM_OP_MOVL, ASM_OP_MUX1, ASM_OP_MUX2,
- ASM_OP_NOP,
- ASM_OP_OR,
- ASM_OP_PACK2, ASM_OP_PACK4, ASM_OP_PADD1, ASM_OP_PADD2, ASM_OP_PADD4,
- ASM_OP_PAVG1, ASM_OP_PAVG2, ASM_OP_PAVGSUB1, ASM_OP_PAVGSUB2,
- ASM_OP_PCMP1, ASM_OP_PCMP2, ASM_OP_PCMP4, ASM_OP_PMAX1, ASM_OP_PMAX2,
- ASM_OP_PMIN1, ASM_OP_PMIN2, ASM_OP_PMPY2, ASM_OP_PMPYSHR2,
- ASM_OP_POPCNT, ASM_OP_PROBE, ASM_OP_PSAD1, ASM_OP_PSHL2, ASM_OP_PSHL4,
- ASM_OP_PSHLADD2, ASM_OP_PSHR2, ASM_OP_PSHR4, ASM_OP_PSHRADD2,
- ASM_OP_PSUB1, ASM_OP_PSUB2, ASM_OP_PSUB4, ASM_OP_PTC, ASM_OP_PTR,
- ASM_OP_RFI, ASM_OP_RSM, ASM_OP_RUM,
- ASM_OP_SETF, ASM_OP_SHL, ASM_OP_SHLADD, ASM_OP_SHLADDP4, ASM_OP_SHR,
- ASM_OP_SHRP, ASM_OP_SRLZ, ASM_OP_SSM, ASM_OP_ST1, ASM_OP_ST16,
- ASM_OP_ST2, ASM_OP_ST4, ASM_OP_ST8, ASM_OP_STF, ASM_OP_STF8,
- ASM_OP_STFD, ASM_OP_STFE, ASM_OP_STFS, ASM_OP_SUB, ASM_OP_SUM,
- ASM_OP_SXT1, ASM_OP_SXT2, ASM_OP_SXT4, ASM_OP_SYNC,
- ASM_OP_TAK, ASM_OP_TBIT, ASM_OP_THASH, ASM_OP_TNAT, ASM_OP_TPA,
- ASM_OP_TTAG,
- ASM_OP_UNPACK1, ASM_OP_UNPACK2, ASM_OP_UNPACK4,
- ASM_OP_XCHG1, ASM_OP_XCHG2, ASM_OP_XCHG4, ASM_OP_XCHG8, ASM_OP_XMA,
- ASM_OP_XOR,
- ASM_OP_ZXT1, ASM_OP_ZXT2, ASM_OP_ZXT4,
- /* Additional opcodes used only internally. */
- ASM_ADDITIONAL_OPCODES
-};
-
-/* Instruction. */
-struct asm_inst {
- uint64_t i_bits;
- struct asm_oper i_oper[7];
- struct asm_cmpltr i_cmpltr[5];
- enum asm_fmt i_format;
- enum asm_op i_op;
- int i_ncmpltrs;
- int i_srcidx;
-};
-
-struct asm_bundle {
- const char *b_templ;
- struct asm_inst b_inst[3];
-};
-
-/* Functional units. */
-enum asm_unit {
- ASM_UNIT_NONE,
- ASM_UNIT_A = 0x0100, /* A unit. */
- ASM_UNIT_B = 0x0200, /* B unit. */
- ASM_UNIT_F = 0x0300, /* F unit. */
- ASM_UNIT_I = 0x0400, /* I unit. */
- ASM_UNIT_M = 0x0500, /* M unit. */
- ASM_UNIT_X = 0x0600 /* X unit. */
-};
-
-#ifdef _DISASM_INT_H_
-int asm_extract(enum asm_op, enum asm_fmt, uint64_t, struct asm_bundle *, int);
-#endif
-
-int asm_decode(uint64_t, struct asm_bundle *);
-
-void asm_completer(const struct asm_cmpltr *, char *);
-void asm_mnemonic(const enum asm_op, char *);
-void asm_operand(const struct asm_oper *, char *, uint64_t);
-void asm_print_bundle(const struct asm_bundle *, uint64_t);
-void asm_print_inst(const struct asm_bundle *, int, uint64_t);
-
-#endif /* _DISASM_H_ */
--- sys/ia64/ia32/ia32_trap.c
+++ /dev/null
@@ -1,293 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia32/ia32_trap.c,v 1.5 2005/04/12 23:18:54 jhb Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/ktr.h>
-#include <sys/sysproto.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/pioctl.h>
-#include <sys/proc.h>
-#include <sys/signalvar.h>
-#include <sys/syscall.h>
-#include <sys/sysent.h>
-#include <machine/cpu.h>
-#include <machine/fpu.h>
-#include <machine/frame.h>
-#include <machine/md_var.h>
-#include <i386/include/psl.h>
-
-#ifdef WITNESS
-extern char *syscallnames[];
-#endif
-
-static void
-ia32_syscall(struct trapframe *tf)
-{
- uint64_t args64[8];
- uint32_t args[8];
- struct thread *td;
- struct proc *p;
- struct sysent *callp;
- caddr_t params;
- register_t eflags;
- u_int code;
- int error, i, narg;
-
- PCPU_LAZY_INC(cnt.v_syscall);
-
- td = curthread;
- params = (caddr_t)(tf->tf_special.sp & ((1L<<32)-1)) +
- sizeof(uint32_t);
- code = tf->tf_scratch.gr8; /* eax */
- eflags = ia64_get_eflag();
- p = td->td_proc;
-
- if (p->p_sysent->sv_prepsyscall == NULL) {
- if (code == SYS_syscall) {
- /* Code is first argument, followed by actual args. */
- code = fuword32(params);
- params += sizeof(int);
- } else if (code == SYS___syscall) {
- /*
- * Like syscall, but code is a quad, so as to maintain
- * quad alignment for the rest of the arguments. We
- * use a 32-bit fetch in case params is not aligned.
- */
- code = fuword32(params);
- params += sizeof(quad_t);
- }
- } else
- (*p->p_sysent->sv_prepsyscall)(tf, args, &code, ¶ms);
-
- if (p->p_sysent->sv_mask)
- code &= p->p_sysent->sv_mask;
-
- if (code >= p->p_sysent->sv_size)
- callp = &p->p_sysent->sv_table[0];
- else
- callp = &p->p_sysent->sv_table[code];
-
- narg = callp->sy_narg & SYF_ARGMASK;
-
- /* copyin and the ktrsyscall()/ktrsysret() code is MP-aware */
- if (params != NULL && narg != 0)
- error = copyin(params, (caddr_t)args, narg * sizeof(int));
- else
- error = 0;
-
- for (i = 0; i < narg; i++)
- args64[i] = args[i];
-
-#ifdef KTRACE
- if (KTRPOINT(td, KTR_SYSCALL))
- ktrsyscall(code, narg, args64);
-#endif
- /*
- * Try to run the syscall without Giant if the syscall
- * is MP safe.
- */
- if ((callp->sy_narg & SYF_MPSAFE) == 0)
- mtx_lock(&Giant);
-
- if (error == 0) {
- td->td_retval[0] = 0;
- td->td_retval[1] = tf->tf_scratch.gr10; /* edx */
-
- STOPEVENT(p, S_SCE, narg);
-
- error = (*callp->sy_call)(td, args64);
- }
-
- switch (error) {
- case 0:
- tf->tf_scratch.gr8 = td->td_retval[0]; /* eax */
- tf->tf_scratch.gr10 = td->td_retval[1]; /* edx */
- ia64_set_eflag(ia64_get_eflag() & ~PSL_C);
- break;
-
- case ERESTART:
- /*
- * Reconstruct pc, assuming lcall $X,y is 7 bytes,
- * int 0x80 is 2 bytes. XXX Assume int 0x80.
- */
- tf->tf_special.iip -= 2;
- break;
-
- case EJUSTRETURN:
- break;
-
- default:
- if (p->p_sysent->sv_errsize) {
- if (error >= p->p_sysent->sv_errsize)
- error = -1; /* XXX */
- else
- error = p->p_sysent->sv_errtbl[error];
- }
- tf->tf_scratch.gr8 = error;
- ia64_set_eflag(ia64_get_eflag() | PSL_C);
- break;
- }
-
- /*
- * Release Giant if we previously set it.
- */
- if ((callp->sy_narg & SYF_MPSAFE) == 0)
- mtx_unlock(&Giant);
-
- /*
- * Traced syscall.
- */
- if ((eflags & PSL_T) && !(eflags & PSL_VM)) {
- ia64_set_eflag(ia64_get_eflag() & ~PSL_T);
- trapsignal(td, SIGTRAP, 0);
- }
-
-#ifdef KTRACE
- if (KTRPOINT(td, KTR_SYSRET))
- ktrsysret(code, error, td->td_retval[0]);
-#endif
-
- /*
- * This works because errno is findable through the
- * register set. If we ever support an emulation where this
- * is not the case, this code will need to be revisited.
- */
- STOPEVENT(p, S_SCX, code);
-
- WITNESS_WARN(WARN_PANIC, NULL, "System call %s returning",
- (code >= 0 && code < SYS_MAXSYSCALL) ? syscallnames[code] : "???");
- mtx_assert(&sched_lock, MA_NOTOWNED);
- mtx_assert(&Giant, MA_NOTOWNED);
-}
-
-/*
- * ia32_trap() is called from exception.S to handle the IA-32 specific
- * interruption vectors.
- */
-void
-ia32_trap(int vector, struct trapframe *tf)
-{
- struct proc *p;
- struct thread *td;
- uint64_t ucode;
- int sig;
- u_int sticks;
-
- KASSERT(TRAPF_USERMODE(tf), ("%s: In kernel mode???", __func__));
-
- ia64_set_fpsr(IA64_FPSR_DEFAULT);
- PCPU_LAZY_INC(cnt.v_trap);
-
- td = curthread;
- td->td_frame = tf;
- sticks = td->td_sticks;
- p = td->td_proc;
- if (td->td_ucred != p->p_ucred)
- cred_update_thread(td);
- sig = 0;
- ucode = 0;
- switch (vector) {
- case IA64_VEC_IA32_EXCEPTION:
- switch ((tf->tf_special.isr >> 16) & 0xffff) {
- case IA32_EXCEPTION_DIVIDE:
- ucode = FPE_INTDIV;
- sig = SIGFPE;
- break;
- case IA32_EXCEPTION_DEBUG:
- case IA32_EXCEPTION_BREAK:
- sig = SIGTRAP;
- break;
- case IA32_EXCEPTION_OVERFLOW:
- ucode = FPE_INTOVF;
- sig = SIGFPE;
- break;
- case IA32_EXCEPTION_BOUND:
- ucode = FPE_FLTSUB;
- sig = SIGFPE;
- break;
- case IA32_EXCEPTION_DNA:
- ucode = 0;
- sig = SIGFPE;
- break;
- case IA32_EXCEPTION_NOT_PRESENT:
- case IA32_EXCEPTION_STACK_FAULT:
- case IA32_EXCEPTION_GPFAULT:
- ucode = (tf->tf_special.isr & 0xffff) + BUS_SEGM_FAULT;
- sig = SIGBUS;
- break;
- case IA32_EXCEPTION_FPERROR:
- ucode = 0; /* XXX */
- sig = SIGFPE;
- break;
- case IA32_EXCEPTION_ALIGNMENT_CHECK:
- ucode = tf->tf_special.ifa; /* VA */
- sig = SIGBUS;
- break;
- case IA32_EXCEPTION_STREAMING_SIMD:
- ucode = 0; /* XXX */
- sig = SIGFPE;
- break;
- default:
- trap_panic(vector, tf);
- break;
- }
- break;
-
- case IA64_VEC_IA32_INTERCEPT:
- /* XXX Maybe need to emulate ia32 instruction. */
- trap_panic(vector, tf);
-
- case IA64_VEC_IA32_INTERRUPT:
- /* INT n instruction - probably a syscall. */
- if (((tf->tf_special.isr >> 16) & 0xffff) == 0x80) {
- ia32_syscall(tf);
- goto out;
- }
- ucode = (tf->tf_special.isr >> 16) & 0xffff;
- sig = SIGILL;
- break;
-
- default:
- /* Should never happen of course. */
- trap_panic(vector, tf);
- break;
- }
-
- KASSERT(sig != 0, ("%s: signal not set", __func__));
-
- trapsignal(td, sig, ucode);
-
-out:
- userret(td, tf, sticks);
- mtx_assert(&Giant, MA_NOTOWNED);
- do_ast(tf);
-}
--- sys/ia64/ia32/ia32_reg.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*-
- * Copyright (c) 2005 Peter Wemm
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia32/ia32_reg.c,v 1.1 2005/06/30 07:49:22 peter Exp $
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/ia32/ia32_reg.c,v 1.1 2005/06/30 07:49:22 peter Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/proc.h>
-#include <sys/procfs.h>
-
-#include <compat/ia32/ia32_reg.h>
-
-int
-fill_regs32(struct thread *td, struct reg32 *regs)
-{
-
- bzero(regs, sizeof(*regs));
- return (EOPNOTSUPP);
-}
-
-int
-set_regs32(struct thread *td, struct reg32 *regs)
-{
-
- return (EOPNOTSUPP);
-}
-
-int
-fill_fpregs32(struct thread *td, struct fpreg32 *regs)
-{
-
- bzero(regs, sizeof(*regs));
- return (EOPNOTSUPP);
-}
-
-int
-set_fpregs32(struct thread *td, struct fpreg32 *regs)
-{
-
- return (EOPNOTSUPP);
-}
-
-int
-fill_dbregs32(struct thread *td, struct dbreg32 *regs)
-{
-
- bzero(regs, sizeof(*regs));
- return (EOPNOTSUPP);
-}
-
-int
-set_dbregs32(struct thread *td, struct dbreg32 *regs)
-{
-
- return (EOPNOTSUPP);
-}
--- sys/ia64/ia32/ia32_sigtramp.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*-
- * Copyright (c) 2002 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia32/ia32_sigtramp.c,v 1.1 2003/12/11 01:05:09 peter Exp $
- */
-
-char ia32_sigcode[] = {
- 0xff, 0x54, 0x24, 0x10, /* call *SIGF_HANDLER(%esp) */
- 0x8d, 0x44, 0x24, 0x14, /* lea SIGF_UC(%esp),%eax */
- 0x50, /* pushl %eax */
- 0xf7, 0x40, 0x54, 0x00, 0x00, 0x02, 0x02, /* testl $PSL_VM,UC_EFLAGS(%eax) */
- 0x75, 0x03, /* jne 9f */
- 0x8e, 0x68, 0x14, /* movl UC_GS(%eax),%gs */
- 0xb8, 0x57, 0x01, 0x00, 0x00, /* 9: movl $SYS_sigreturn,%eax */
- 0x50, /* pushl %eax */
- 0xcd, 0x80, /* int $0x80 */
- 0xeb, 0xfe, /* 0: jmp 0b */
- 0
-};
-int sz_ia32_sigcode = sizeof(ia32_sigcode);
--- sys/ia64/ia32/ia32_signal.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/*-
- * Copyright (c) 2002 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/ia32/ia32_signal.c,v 1.7 2003/12/18 06:59:18 peter Exp $
- */
-
-#include "opt_compat.h"
-
-#define __ELF_WORD_SIZE 32
-
-#include <sys/param.h>
-#include <sys/exec.h>
-#include <sys/fcntl.h>
-#include <sys/imgact.h>
-#include <sys/kernel.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/mman.h>
-#include <sys/namei.h>
-#include <sys/pioctl.h>
-#include <sys/proc.h>
-#include <sys/procfs.h>
-#include <sys/resourcevar.h>
-#include <sys/systm.h>
-#include <sys/signalvar.h>
-#include <sys/stat.h>
-#include <sys/sx.h>
-#include <sys/syscall.h>
-#include <sys/sysctl.h>
-#include <sys/sysent.h>
-#include <sys/vnode.h>
-#include <sys/imgact_elf.h>
-#include <sys/sysproto.h>
-
-#include <machine/frame.h>
-#include <machine/md_var.h>
-#include <machine/pcb.h>
-
-#include <vm/vm.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-#include <vm/vm_map.h>
-#include <vm/vm_object.h>
-#include <vm/vm_extern.h>
-
-#include <compat/freebsd32/freebsd32_util.h>
-#include <compat/freebsd32/freebsd32_proto.h>
-#include <compat/ia32/ia32_signal.h>
-#include <i386/include/psl.h>
-#include <i386/include/segments.h>
-#include <i386/include/specialreg.h>
-
-/*
- * Signal sending has not been implemented on ia64. This causes
- * the sigtramp code to not understand the arguments and the application
- * will generally crash if it tries to handle a signal. Calling
- * sendsig() means that at least untrapped signals will work.
- */
-void
-ia32_sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
-{
- sendsig(catcher, sig, mask, code);
-}
-
-#ifdef COMPAT_FREEBSD4
-int
-freebsd4_freebsd32_sigreturn(struct thread *td, struct freebsd4_freebsd32_sigreturn_args *uap)
-{
- return (sigreturn(td, (struct sigreturn_args *)uap));
-}
-#endif
-
-int
-freebsd32_sigreturn(struct thread *td, struct freebsd32_sigreturn_args *uap)
-{
- return (sigreturn(td, (struct sigreturn_args *)uap));
-}
-
-
-void
-ia32_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings)
-{
- struct trapframe *tf = td->td_frame;
- vm_offset_t gdt, ldt;
- u_int64_t codesel, datasel, ldtsel;
- u_int64_t codeseg, dataseg, gdtseg, ldtseg;
- struct segment_descriptor desc;
- struct vmspace *vmspace = td->td_proc->p_vmspace;
-
- exec_setregs(td, entry, stack, ps_strings);
-
- /* Non-syscall frames are cleared by exec_setregs() */
- if (tf->tf_flags & FRAME_SYSCALL) {
- bzero(&tf->tf_scratch, sizeof(tf->tf_scratch));
- bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp));
- } else
- tf->tf_special.ndirty = 0;
-
- tf->tf_special.psr |= IA64_PSR_IS;
- tf->tf_special.sp = stack;
-
- /* Point the RSE backstore to something harmless. */
- tf->tf_special.bspstore = (FREEBSD32_PS_STRINGS - sz_ia32_sigcode -
- SPARE_USRSPACE + 15) & ~15;
-
- codesel = LSEL(LUCODE_SEL, SEL_UPL);
- datasel = LSEL(LUDATA_SEL, SEL_UPL);
- ldtsel = GSEL(GLDT_SEL, SEL_UPL);
-
- /* Setup ia32 segment registers. */
- tf->tf_scratch.gr16 = (datasel << 48) | (datasel << 32) |
- (datasel << 16) | datasel;
- tf->tf_scratch.gr17 = (ldtsel << 32) | (datasel << 16) | codesel;
-
- /*
- * Build the GDT and LDT.
- */
- gdt = FREEBSD32_USRSTACK;
- vm_map_find(&vmspace->vm_map, 0, 0, &gdt, IA32_PAGE_SIZE << 1, 0,
- VM_PROT_ALL, VM_PROT_ALL, 0);
- ldt = gdt + IA32_PAGE_SIZE;
-
- desc.sd_lolimit = 8*NLDT-1;
- desc.sd_lobase = ldt & 0xffffff;
- desc.sd_type = SDT_SYSLDT;
- desc.sd_dpl = SEL_UPL;
- desc.sd_p = 1;
- desc.sd_hilimit = 0;
- desc.sd_def32 = 0;
- desc.sd_gran = 0;
- desc.sd_hibase = ldt >> 24;
- copyout(&desc, (caddr_t) gdt + 8*GLDT_SEL, sizeof(desc));
-
- desc.sd_lolimit = ((FREEBSD32_USRSTACK >> 12) - 1) & 0xffff;
- desc.sd_lobase = 0;
- desc.sd_type = SDT_MEMERA;
- desc.sd_dpl = SEL_UPL;
- desc.sd_p = 1;
- desc.sd_hilimit = ((FREEBSD32_USRSTACK >> 12) - 1) >> 16;
- desc.sd_def32 = 1;
- desc.sd_gran = 1;
- desc.sd_hibase = 0;
- copyout(&desc, (caddr_t) ldt + 8*LUCODE_SEL, sizeof(desc));
- desc.sd_type = SDT_MEMRWA;
- copyout(&desc, (caddr_t) ldt + 8*LUDATA_SEL, sizeof(desc));
-
- codeseg = 0 /* base */
- + (((FREEBSD32_USRSTACK >> 12) - 1) << 32) /* limit */
- + ((long)SDT_MEMERA << 52)
- + ((long)SEL_UPL << 57)
- + (1L << 59) /* present */
- + (1L << 62) /* 32 bits */
- + (1L << 63); /* page granularity */
- dataseg = 0 /* base */
- + (((FREEBSD32_USRSTACK >> 12) - 1) << 32) /* limit */
- + ((long)SDT_MEMRWA << 52)
- + ((long)SEL_UPL << 57)
- + (1L << 59) /* present */
- + (1L << 62) /* 32 bits */
- + (1L << 63); /* page granularity */
-
- tf->tf_scratch.csd = codeseg;
- tf->tf_scratch.ssd = dataseg;
- tf->tf_scratch.gr24 = dataseg; /* ESD */
- tf->tf_scratch.gr27 = dataseg; /* DSD */
- tf->tf_scratch.gr28 = dataseg; /* FSD */
- tf->tf_scratch.gr29 = dataseg; /* GSD */
-
- gdtseg = gdt /* base */
- + ((8L*NGDT - 1) << 32) /* limit */
- + ((long)SDT_SYSNULL << 52)
- + ((long)SEL_UPL << 57)
- + (1L << 59) /* present */
- + (0L << 62) /* 16 bits */
- + (0L << 63); /* byte granularity */
- ldtseg = ldt /* base */
- + ((8L*NLDT - 1) << 32) /* limit */
- + ((long)SDT_SYSLDT << 52)
- + ((long)SEL_UPL << 57)
- + (1L << 59) /* present */
- + (0L << 62) /* 16 bits */
- + (0L << 63); /* byte granularity */
-
- tf->tf_scratch.gr30 = ldtseg; /* LDTD */
- tf->tf_scratch.gr31 = gdtseg; /* GDTD */
-
- /* Set ia32 control registers on this processor. */
- ia64_set_cflg(CR0_PE | CR0_PG | ((long)(CR4_XMM | CR4_FXSR) << 32));
- ia64_set_eflag(PSL_USER);
-
- /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
- tf->tf_scratch.gr11 = FREEBSD32_PS_STRINGS;
-
- /*
- * XXX - Linux emulator
- * Make sure sure edx is 0x0 on entry. Linux binaries depend
- * on it.
- */
- td->td_retval[1] = 0;
-}
-
-void
-ia32_restorectx(struct pcb *pcb)
-{
-
- ia64_set_cflg(pcb->pcb_ia32_cflg);
- ia64_set_eflag(pcb->pcb_ia32_eflag);
- ia64_set_fcr(pcb->pcb_ia32_fcr);
- ia64_set_fdr(pcb->pcb_ia32_fdr);
- ia64_set_fir(pcb->pcb_ia32_fir);
- ia64_set_fsr(pcb->pcb_ia32_fsr);
-}
-
-void
-ia32_savectx(struct pcb *pcb)
-{
-
- pcb->pcb_ia32_cflg = ia64_get_cflg();
- pcb->pcb_ia32_eflag = ia64_get_eflag();
- pcb->pcb_ia32_fcr = ia64_get_fcr();
- pcb->pcb_ia32_fdr = ia64_get_fdr();
- pcb->pcb_ia32_fir = ia64_get_fir();
- pcb->pcb_ia32_fsr = ia64_get_fsr();
-}
--- sys/ia64/isa/isa_dma.c
+++ /dev/null
@@ -1,508 +0,0 @@
-/*-
- * Copyright (c) 1991 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
- * from: isa_dma.c,v 1.3 1999/05/09 23:56:00 peter Exp $
- * $FreeBSD: src/sys/ia64/isa/isa_dma.c,v 1.9 2005/05/14 10:14:56 nyan Exp $
- */
-
-/*
- * code to manage AT bus
- *
- * 92/08/18 Frank P. MacLachlan (fpm at crash.cts.com):
- * Fixed uninitialized variable problem and added code to deal
- * with DMA page boundaries in isa_dmarangecheck(). Fixed word
- * mode DMA count compution and reorganized DMA setup code in
- * isa_dmastart()
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/bus.h>
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/pmap.h>
-#include <isa/isareg.h>
-#include <isa/isavar.h>
-#include <isa/isa_dmareg.h>
-#include <machine/bus.h>
-
-static bus_dma_tag_t dma_tag[8];
-static bus_dmamap_t dma_map[8];
-static u_int8_t dma_busy = 0; /* Used in isa_dmastart() */
-static u_int8_t dma_inuse = 0; /* User for acquire/release */
-static u_int8_t dma_auto_mode = 0;
-static u_int8_t dma_bounced = 0;
-
-#define VALID_DMA_MASK (7)
-
-/* high byte of address is stored in this port for i-th dma channel */
-static int dmapageport[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
-
-/*
- * Setup a DMA channel's bounce buffer.
- */
-int
-isa_dma_init(int chan, u_int bouncebufsize, int flag __unused)
-{
- static int initted = 0;
- bus_addr_t boundary = chan >= 4 ? 0x20000 : 0x10000;
-
- if (!initted) {
- /*
- * Reset the DMA hardware.
- */
- outb(DMA1_RESET, 0);
- outb(DMA2_RESET, 0);
- isa_dmacascade(4);
-
- initted = 1;
- }
-
-#ifdef DIAGNOSTIC
- if (chan & ~VALID_DMA_MASK)
- panic("isa_dma_init: channel out of range");
-
- if (dma_tag[chan] || dma_map[chan])
- panic("isa_dma_init: impossible request");
-#endif
-
- if (bus_dma_tag_create(/*parent*/NULL,
- /*alignment*/2,
- /*boundary*/boundary,
- /*lowaddr*/BUS_SPACE_MAXADDR_24BIT,
- /*highaddr*/BUS_SPACE_MAXADDR,
- /*filter*/NULL, /*filterarg*/NULL,
- /*maxsize*/bouncebufsize,
- /*nsegments*/1, /*maxsegz*/0x3ffff,
- /*flags*/BUS_DMA_ISA,
- /*lockfunc*/busdma_lock_mutex,
- /*lockarg*/&Giant,
- &dma_tag[chan]) != 0) {
- panic("isa_dma_init: unable to create dma tag\n");
- }
-
- if (bus_dmamap_create(dma_tag[chan], 0, &dma_map[chan])) {
- panic("isa_dma_init: unable to create dma map\n");
- }
-
- return (0);
-}
-
-/*
- * Register a DMA channel's usage. Usually called from a device driver
- * in open() or during its initialization.
- */
-int
-isa_dma_acquire(chan)
- int chan;
-{
-#ifdef DIAGNOSTIC
- if (chan & ~VALID_DMA_MASK)
- panic("isa_dma_acquire: channel out of range");
-#endif
-
- if (dma_inuse & (1 << chan)) {
- printf("isa_dma_acquire: channel %d already in use\n", chan);
- return (EBUSY);
- }
- dma_inuse |= (1 << chan);
- dma_auto_mode &= ~(1 << chan);
-
- return (0);
-}
-
-/*
- * Unregister a DMA channel's usage. Usually called from a device driver
- * during close() or during its shutdown.
- */
-void
-isa_dma_release(chan)
- int chan;
-{
-#ifdef DIAGNOSTIC
- if (chan & ~VALID_DMA_MASK)
- panic("isa_dma_release: channel out of range");
-
- if ((dma_inuse & (1 << chan)) == 0)
- printf("isa_dma_release: channel %d not in use\n", chan);
-#endif
-
- if (dma_busy & (1 << chan)) {
- dma_busy &= ~(1 << chan);
- /*
- * XXX We should also do "dma_bounced &= (1 << chan);"
- * because we are acting on behalf of isa_dmadone() which
- * was not called to end the last DMA operation. This does
- * not matter now, but it may in the future.
- */
- }
-
- dma_inuse &= ~(1 << chan);
- dma_auto_mode &= ~(1 << chan);
-}
-
-/*
- * isa_dmacascade(): program 8237 DMA controller channel to accept
- * external dma control by a board.
- */
-void
-isa_dmacascade(chan)
- int chan;
-{
-#ifdef DIAGNOSTIC
- if (chan & ~VALID_DMA_MASK)
- panic("isa_dmacascade: channel out of range");
-#endif
-
- /* set dma channel mode, and set dma channel mode */
- if ((chan & 4) == 0) {
- outb(DMA1_MODE, DMA37MD_CASCADE | chan);
- outb(DMA1_SMSK, chan);
- } else {
- outb(DMA2_MODE, DMA37MD_CASCADE | (chan & 3));
- outb(DMA2_SMSK, chan & 3);
- }
-}
-
-/*
- * isa_dmastart(): program 8237 DMA controller channel.
- */
-
-struct isa_dmastart_arg {
- caddr_t addr;
- int chan;
- int flags;
-};
-
-static void isa_dmastart_cb(void *arg, bus_dma_segment_t *segs, int nseg,
- int error)
-{
-#if 0
- caddr_t addr = ((struct isa_dmastart_arg *) arg)->addr;
-#endif
- int chan = ((struct isa_dmastart_arg *) arg)->chan;
- int flags = ((struct isa_dmastart_arg *) arg)->flags;
- bus_addr_t phys = segs->ds_addr;
- int nbytes = segs->ds_len;
- int waport;
-
- if (nseg != 1)
- panic("isa_dmastart: transfer mapping not contiguous");
-
-#if 0
- if ((chipset.sgmap == NULL) &&
- (pmap_extract(kernel_pmap, (vm_offset_t)addr)
- > BUS_SPACE_MAXADDR_24BIT)) {
- /* we bounced */
- dma_bounced |= (1 << chan);
- /* copy bounce buffer on write */
- if (!(flags & ISADMA_READ))
- bus_dmamap_sync(dma_tag[chan], dma_map[chan],
- BUS_DMASYNC_PREWRITE);
- }
-#endif
-
- if ((chan & 4) == 0) {
- /*
- * Program one of DMA channels 0..3. These are
- * byte mode channels.
- */
- /* set dma channel mode, and reset address ff */
-
- /* If ISADMA_RAW flag is set, then use autoinitialise mode */
- if (flags & ISADMA_RAW) {
- if (flags & ISADMA_READ)
- outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
- else
- outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
- }
- else
- if (flags & ISADMA_READ)
- outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
- else
- outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
- outb(DMA1_FFC, 0);
-
- /* send start address */
- waport = DMA1_CHN(chan);
- outb(waport, phys);
- outb(waport, phys>>8);
- outb(dmapageport[chan], phys>>16);
-
- /* send count */
- outb(waport + 1, --nbytes);
- outb(waport + 1, nbytes>>8);
-
- /* unmask channel */
- outb(DMA1_SMSK, chan);
- } else {
- /*
- * Program one of DMA channels 4..7. These are
- * word mode channels.
- */
- /* set dma channel mode, and reset address ff */
-
- /* If ISADMA_RAW flag is set, then use autoinitialise mode */
- if (flags & ISADMA_RAW) {
- if (flags & ISADMA_READ)
- outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
- else
- outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
- }
- else
- if (flags & ISADMA_READ)
- outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
- else
- outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
- outb(DMA2_FFC, 0);
-
- /* send start address */
- waport = DMA2_CHN(chan - 4);
- outb(waport, phys>>1);
- outb(waport, phys>>9);
- outb(dmapageport[chan], phys>>16);
-
- /* send count */
- nbytes >>= 1;
- outb(waport + 2, --nbytes);
- outb(waport + 2, nbytes>>8);
-
- /* unmask channel */
- outb(DMA2_SMSK, chan & 3);
- }
-}
-
-void
-isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
-{
- struct isa_dmastart_arg args;
-
-#ifdef DIAGNOSTIC
- if (chan & ~VALID_DMA_MASK)
- panic("isa_dmastart: channel out of range");
-
- if ((chan < 4 && nbytes > (1<<16))
- || (chan >= 4 && (nbytes > (1<<17) || (uintptr_t)addr & 1)))
- panic("isa_dmastart: impossible request");
-
- if ((dma_inuse & (1 << chan)) == 0)
- printf("isa_dmastart: channel %d not acquired\n", chan);
-#endif
-
-#if 0
- /*
- * XXX This should be checked, but drivers like ad1848 only call
- * isa_dmastart() once because they use Auto DMA mode. If we
- * leave this in, drivers that do this will print this continuously.
- */
- if (dma_busy & (1 << chan))
- printf("isa_dmastart: channel %d busy\n", chan);
-#endif
-
- if (!dma_tag || !dma_map[chan])
- panic("isa_dmastart: called without isa_dma_init");
-
- dma_busy |= (1 << chan);
-
- if (flags & ISADMA_RAW) {
- dma_auto_mode |= (1 << chan);
- } else {
- dma_auto_mode &= ~(1 << chan);
- }
-
- /*
- * Freeze dma while updating registers.
- */
- outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
-
- args.addr = addr;
- args.chan = chan;
- args.flags = flags;
- bus_dmamap_load(dma_tag[chan], dma_map[chan], addr, nbytes,
- isa_dmastart_cb, &args, 0);
-}
-
-void
-isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
-{
-#ifdef DIAGNOSTIC
- if (chan & ~VALID_DMA_MASK)
- panic("isa_dmadone: channel out of range");
-
- if ((dma_inuse & (1 << chan)) == 0)
- printf("isa_dmadone: channel %d not acquired\n", chan);
-#endif
-
- if (((dma_busy & (1 << chan)) == 0) &&
- (dma_auto_mode & (1 << chan)) == 0 )
- printf("isa_dmadone: channel %d not busy\n", chan);
-
- if (dma_bounced & (1 << chan)) {
- /* copy bounce buffer on read */
- if (flags & ISADMA_READ) {
- bus_dmamap_sync(dma_tag[chan], dma_map[chan],
- BUS_DMASYNC_POSTREAD);
- }
- dma_bounced &= ~(1 << chan);
- }
-
- if ((dma_auto_mode & (1 << chan)) == 0) {
- outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
- bus_dmamap_unload(dma_tag[chan], dma_map[chan]);
- }
-
- dma_busy &= ~(1 << chan);
-}
-
-/*
- * Query the progress of a transfer on a DMA channel.
- *
- * To avoid having to interrupt a transfer in progress, we sample
- * each of the high and low databytes twice, and apply the following
- * logic to determine the correct count.
- *
- * Reads are performed with interrupts disabled, thus it is to be
- * expected that the time between reads is very small. At most
- * one rollover in the low count byte can be expected within the
- * four reads that are performed.
- *
- * There are three gaps in which a rollover can occur :
- *
- * - read low1
- * gap1
- * - read high1
- * gap2
- * - read low2
- * gap3
- * - read high2
- *
- * If a rollover occurs in gap1 or gap2, the low2 value will be
- * greater than the low1 value. In this case, low2 and high2 are a
- * corresponding pair.
- *
- * In any other case, low1 and high1 can be considered to be correct.
- *
- * The function returns the number of bytes remaining in the transfer,
- * or -1 if the channel requested is not active.
- *
- */
-int
-isa_dmastatus(int chan)
-{
- u_long cnt = 0;
- int ffport, waport;
- u_long low1, high1, low2, high2;
- int s;
-
- /* channel active? */
- if ((dma_inuse & (1 << chan)) == 0) {
- printf("isa_dmastatus: channel %d not active\n", chan);
- return(-1);
- }
- /* channel busy? */
-
- if (((dma_busy & (1 << chan)) == 0) &&
- (dma_auto_mode & (1 << chan)) == 0 ) {
- printf("chan %d not busy\n", chan);
- return -2 ;
- }
- if (chan < 4) { /* low DMA controller */
- ffport = DMA1_FFC;
- waport = DMA1_CHN(chan) + 1;
- } else { /* high DMA controller */
- ffport = DMA2_FFC;
- waport = DMA2_CHN(chan - 4) + 2;
- }
-
- s = splhigh(); /* no interrupts Mr Jones! */
- outb(ffport, 0); /* clear register LSB flipflop */
- low1 = inb(waport);
- high1 = inb(waport);
- outb(ffport, 0); /* clear again */
- low2 = inb(waport);
- high2 = inb(waport);
- splx(s); /* enable interrupts again */
-
- /*
- * Now decide if a wrap has tried to skew our results.
- * Note that after TC, the count will read 0xffff, while we want
- * to return zero, so we add and then mask to compensate.
- */
- if (low1 >= low2) {
- cnt = (low1 + (high1 << 8) + 1) & 0xffff;
- } else {
- cnt = (low2 + (high2 << 8) + 1) & 0xffff;
- }
-
- if (chan >= 4) /* high channels move words */
- cnt *= 2;
- return(cnt);
-}
-
-/*
- * Reached terminal count yet ?
- */
-int
-isa_dmatc(int chan)
-{
-
- if (chan < 4)
- return(inb(DMA1_STATUS) & (1 << chan));
- else
- return(inb(DMA2_STATUS) & (1 << (chan & 3)));
-}
-
-/*
- * Stop a DMA transfer currently in progress.
- */
-int
-isa_dmastop(int chan)
-{
- if ((dma_inuse & (1 << chan)) == 0)
- printf("isa_dmastop: channel %d not acquired\n", chan);
-
- if (((dma_busy & (1 << chan)) == 0) &&
- ((dma_auto_mode & (1 << chan)) == 0)) {
- printf("chan %d not busy\n", chan);
- return -2 ;
- }
-
- if ((chan & 4) == 0) {
- outb(DMA1_SMSK, (chan & 3) | 4 /* disable mask */);
- } else {
- outb(DMA2_SMSK, (chan & 3) | 4 /* disable mask */);
- }
- return(isa_dmastatus(chan));
-}
--- sys/ia64/isa/isa.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/isa/isa.c,v 1.3 2004/03/17 21:45:55 jmg Exp $
- */
-
-/*
- * Modifications for Intel architecture by Garrett A. Wollman.
- * Copyright 1998 Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby
- * granted, provided that both the above copyright notice and this
- * permission notice appear in all copies, that both the above
- * copyright notice and this permission notice appear in all
- * supporting documentation, and that the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * software without specific, written prior permission. M.I.T. makes
- * no representations about the suitability of this software for any
- * purpose. It is provided "as is" without express or implied
- * warranty.
- *
- * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
- * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
- * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/malloc.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-
-#include <machine/resource.h>
-
-#include <isa/isareg.h>
-#include <isa/isavar.h>
-#include <isa/isa_common.h>
-
-void
-isa_init(device_t dev)
-{
-}
-
-intrmask_t
-isa_irq_pending(void)
-{
- u_char irr1;
- u_char irr2;
-
- irr1 = inb(IO_ICU1);
- irr2 = inb(IO_ICU2);
- return ((irr2 << 8) | irr1);
-}
-
-/*
- * This implementation simply passes the request up to the parent
- * bus, which in our case is the special i386 nexus, substituting any
- * configured values if the caller defaulted. We can get away with
- * this because there is no special mapping for ISA resources on an Intel
- * platform. When porting this code to another architecture, it may be
- * necessary to interpose a mapping layer here.
- */
-struct resource *
-isa_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- /*
- * Consider adding a resource definition.
- */
- int passthrough = (device_get_parent(child) != bus);
- int isdefault = (start == 0UL && end == ~0UL);
- struct isa_device* idev = DEVTOISA(child);
- struct resource_list *rl = &idev->id_resources;
- struct resource_list_entry *rle;
-
- if (!passthrough && !isdefault) {
- rle = resource_list_find(rl, type, *rid);
- if (!rle) {
- if (*rid < 0)
- return 0;
- switch (type) {
- case SYS_RES_IRQ:
- if (*rid >= ISA_NIRQ)
- return 0;
- break;
- case SYS_RES_DRQ:
- if (*rid >= ISA_NDRQ)
- return 0;
- break;
- case SYS_RES_MEMORY:
- if (*rid >= ISA_NMEM)
- return 0;
- break;
- case SYS_RES_IOPORT:
- if (*rid >= ISA_NPORT)
- return 0;
- break;
- default:
- return 0;
- }
- resource_list_add(rl, type, *rid, start, end, count);
- }
- }
-
- return resource_list_alloc(rl, bus, child, type, rid,
- start, end, count, flags);
-}
-
-int
-isa_release_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- struct isa_device* idev = DEVTOISA(child);
- struct resource_list *rl = &idev->id_resources;
- return resource_list_release(rl, bus, child, type, rid, r);
-}
-
-/*
- * We can't use the bus_generic_* versions of these methods because those
- * methods always pass the bus param as the requesting device, and we need
- * to pass the child (the i386 nexus knows about this and is prepared to
- * deal).
- */
-int
-isa_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
- void (*ihand)(void *), void *arg, void **cookiep)
-{
- return (BUS_SETUP_INTR(device_get_parent(bus), child, r, flags,
- ihand, arg, cookiep));
-}
-
-int
-isa_teardown_intr(device_t bus, device_t child, struct resource *r,
- void *cookie)
-{
- return (BUS_TEARDOWN_INTR(device_get_parent(bus), child, r, cookie));
-}
--- sys/arm/include/signal.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*-
- * Copyright (c) 1986, 1989, 1991, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)signal.h 8.1 (Berkeley) 6/11/93
- * from: FreeBSD: src/sys/i386/include/signal.h,v 1.13 2000/11/09
- * from: FreeBSD: src/sys/sparc64/include/signal.h,v 1.6 2001/09/30 18:52:17
- * $FreeBSD: src/sys/arm/include/signal.h,v 1.6 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_SIGNAL_H_
-#define _MACHINE_SIGNAL_H_
-
-#include <sys/cdefs.h>
-
-typedef long sig_atomic_t;
-
-#if __XSI_VISIBLE
-#define MINSIGSTKSZ (1024 * 4)
-#endif
-
-#if __BSD_VISIBLE
-
-struct sigcontext {
-};
-
-#endif
-
-#endif /* !_MACHINE_SIGNAL_H_ */
--- sys/arm/include/ptrace.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/* $NetBSD: ptrace.h,v 1.2 2001/02/23 21:23:52 reinoud Exp $ */
-/* $FreeBSD: src/sys/arm/include/ptrace.h,v 1.1 2004/05/14 11:46:44 cognet Exp $ */
-
-#ifndef _MACHINE_PTRACE_H_
-#define _MACHINE_PTRACE_H_
-
-#endif /* !_MACHINE_PTRACE_H */
-
--- sys/arm/include/setjmp.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/* $NetBSD: setjmp.h,v 1.2 2001/08/25 14:45:59 bjh21 Exp $ */
-/* $FreeBSD: src/sys/arm/include/setjmp.h,v 1.2 2004/07/12 21:23:58 cognet Exp $ */
-
-/*
- * machine/setjmp.h: machine dependent setjmp-related information.
- */
-
-#ifndef _MACHINE_SETJMP_H_
-#define _MACHINE_SETJMP_H_
-#ifdef __ELF__
-#define _JBLEN 64 /* size, in longs, of a jmp_buf */
-#else
-#define _JBLEN 29 /* size, in longs, of a jmp_buf */
-#endif
-
-/*
- * NOTE: The internal structure of a jmp_buf is *PRIVATE*
- * This information is provided as there is software
- * that fiddles with this with obtain the stack pointer
- * (yes really ! and its commercial !).
- *
- * Description of the setjmp buffer
- *
- * word 0 magic number (dependant on creator)
- * 1 - 3 f4 fp register 4
- * 4 - 6 f5 fp register 5
- * 7 - 9 f6 fp register 6
- * 10 - 12 f7 fp register 7
- * 13 fpsr fp status register
- * 14 r4 register 4
- * 15 r5 register 5
- * 16 r6 register 6
- * 17 r7 register 7
- * 18 r8 register 8
- * 19 r9 register 9
- * 20 r10 register 10 (sl)
- * 21 r11 register 11 (fp)
- * 22 r12 register 12 (ip)
- * 23 r13 register 13 (sp)
- * 24 r14 register 14 (lr)
- * 25 signal mask (dependant on magic)
- * 26 (con't)
- * 27 (con't)
- * 28 (con't)
- *
- * The magic number number identifies the jmp_buf and
- * how the buffer was created as well as providing
- * a sanity check
- *
- * A side note I should mention - Please do not tamper
- * with the floating point fields. While they are
- * always saved and restored at the moment this cannot
- * be garenteed especially if the compiler happens
- * to be generating soft-float code so no fp
- * registers will be used.
- *
- * Whilst this can be seen an encouraging people to
- * use the setjmp buffer in this way I think that it
- * is for the best then if changes occur compiles will
- * break rather than just having new builds falling over
- * mysteriously.
- */
-
-#define _JB_MAGIC__SETJMP 0x4278f500
-#define _JB_MAGIC_SETJMP 0x4278f501
-
-/* Valid for all jmp_buf's */
-
-#define _JB_MAGIC 0
-#define _JB_REG_F4 1
-#define _JB_REG_F5 4
-#define _JB_REG_F6 7
-#define _JB_REG_F7 10
-#define _JB_REG_FPSR 13
-#define _JB_REG_R4 14
-#define _JB_REG_R5 15
-#define _JB_REG_R6 16
-#define _JB_REG_R7 17
-#define _JB_REG_R8 18
-#define _JB_REG_R9 19
-#define _JB_REG_R10 20
-#define _JB_REG_R11 21
-#define _JB_REG_R12 22
-#define _JB_REG_R13 23
-#define _JB_REG_R14 24
-
-/* Only valid with the _JB_MAGIC_SETJMP magic */
-
-#define _JB_SIGMASK 25
-#if __BSD_VISIBLE || __POSIX_VISIBLE || __XSI_VISIBLE
-typedef struct _sigjmp_buf { int _sjb[_JBLEN + 1]; } sigjmp_buf[1];
-#endif
-
-typedef struct _jmp_buf { int _jb[_JBLEN + 1]; } jmp_buf[1];
-
-#endif /* !_MACHINE_SETJMP_H_ */
--- sys/arm/include/swi.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* $NetBSD: swi.h,v 1.1 2002/01/13 15:03:06 bjh21 Exp $ */
-/* $FreeBSD: src/sys/arm/include/swi.h,v 1.2 2005/01/05 21:58:48 imp Exp $ */
-
-/*-
- * This file is in the Public Domain.
- * Ben Harris, 2002.
- */
-
-#ifndef _MACHINE_SWI_H_
-#define _MACHINE_SWI_H_
-
-#define SWI_OS_MASK 0xf00000
-#define SWI_OS_RISCOS 0x000000
-#define SWI_OS_RISCIX 0x800000
-#define SWI_OS_LINUX 0x900000
-#define SWI_OS_NETBSD 0xa00000
-#define SWI_OS_ARM 0xf00000
-
-#define SWI_IMB 0xf00000
-#define SWI_IMBrange 0xf00001
-
-#endif /* !_MACHINE_SWI_H_ */
-
--- sys/arm/include/floatingpoint.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*-
- * Copyright (c) 1993 Andrew Moore, Talke Studio
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#) floatingpoint.h 1.0 (Berkeley) 9/23/93
- * $FreeBSD: src/sys/arm/include/floatingpoint.h,v 1.1 2004/05/14 11:46:44 cognet Exp $
- */
-
-#ifndef _FLOATINGPOINT_H_
-#define _FLOATINGPOINT_H_
-
-#include <machine/ieeefp.h>
-
-#endif /* !_FLOATINGPOINT_H_ */
--- sys/arm/include/machdep.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* $NetBSD: machdep.h,v 1.7 2002/02/21 02:52:21 thorpej Exp $ */
-/* $FreeBSD: src/sys/arm/include/machdep.h,v 1.2 2005/02/26 18:59:01 cognet Exp $ */
-
-#ifndef _MACHDEP_BOOT_MACHDEP_H_
-#define _MACHDEP_BOOT_MACHDEP_H_
-
-/* misc prototypes used by the many arm machdeps */
-void halt (void);
-void data_abort_handler (trapframe_t *);
-void prefetch_abort_handler (trapframe_t *);
-void undefinedinstruction_bounce (trapframe_t *);
-
-void arm_lock_cache_line(vm_offset_t);
-
-#endif /* !_MACHINE_MACHDEP_H_ */
--- sys/arm/include/bus_dma.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
- * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Christopher G. Demetriou
- * for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/bus_dma.h,v 1.1 2005/03/14 16:46:27 scottl Exp $
- */
-
-#ifndef _ARM_BUS_DMA_H
-#define _ARM_BUS_DMA_H
-
-#include <sys/bus_dma.h>
-
-/* Bus Space DMA macros */
-
-#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
-
-#ifdef _ARM32_BUS_DMA_PRIVATE
-/*
- * arm32_dma_range
- *
- * This structure describes a valid DMA range.
- */
-struct arm32_dma_range {
- bus_addr_t dr_sysbase; /* system base address */
- bus_addr_t dr_busbase; /* appears here on bus */
- bus_size_t dr_len; /* length of range */
-};
-
-/* _dm_buftype */
-#define ARM32_BUFTYPE_INVALID 0
-#define ARM32_BUFTYPE_LINEAR 1
-#define ARM32_BUFTYPE_MBUF 2
-#define ARM32_BUFTYPE_UIO 3
-#define ARM32_BUFTYPE_RAW 4
-
-struct arm32_dma_range *bus_dma_get_range(void);
-int bus_dma_get_range_nb(void);
-
-#endif /* _ARM32_BUS_DMA_PRIVATE */
-
-#endif /* _ARM_BUS_DMA_H */
--- sys/arm/include/asmacros.h
+++ /dev/null
@@ -1,191 +0,0 @@
-/* $NetBSD: frame.h,v 1.6 2003/10/05 19:44:58 matt Exp $ */
-
-/*-
- * Copyright (c) 1994-1997 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/asmacros.h,v 1.4 2005/04/07 22:03:04 cognet Exp $
- */
-
-#ifndef _MACHINE_ASMACROS_H_
-#define _MACHINE_ASMACROS_H_
-
-#ifdef _KERNEL
-
-#ifdef LOCORE
-
-/*
- * ASM macros for pushing and pulling trapframes from the stack
- *
- * These macros are used to handle the irqframe and trapframe structures
- * defined above.
- */
-
-/*
- * PUSHFRAME - macro to push a trap frame on the stack in the current mode
- * Since the current mode is used, the SVC lr field is not defined.
- *
- * NOTE: r13 and r14 are stored separately as a work around for the
- * SA110 rev 2 STM^ bug
- */
-
-#define PUSHFRAME \
- str lr, [sp, #-4]!; /* Push the return address */ \
- sub sp, sp, #(4*17); /* Adjust the stack pointer */ \
- stmia sp, {r0-r12}; /* Push the user mode registers */ \
- add r0, sp, #(4*13); /* Adjust the stack pointer */ \
- stmia r0, {r13-r14}^; /* Push the user mode registers */ \
- mov r0, r0; /* NOP for previous instruction */ \
- mrs r0, spsr_all; /* Put the SPSR on the stack */ \
- str r0, [sp, #-4]!;
-
-/*
- * PULLFRAME - macro to pull a trap frame from the stack in the current mode
- * Since the current mode is used, the SVC lr field is ignored.
- */
-
-#define PULLFRAME \
- ldr r0, [sp], #0x0004; /* Get the SPSR from stack */ \
- msr spsr_all, r0; \
- ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
- mov r0, r0; /* NOP for previous instruction */ \
- add sp, sp, #(4*17); /* Adjust the stack pointer */ \
- ldr lr, [sp], #0x0004; /* Pull the return address */
-
-/*
- * PUSHFRAMEINSVC - macro to push a trap frame on the stack in SVC32 mode
- * This should only be used if the processor is not currently in SVC32
- * mode. The processor mode is switched to SVC mode and the trap frame is
- * stored. The SVC lr field is used to store the previous value of
- * lr in SVC mode.
- *
- * NOTE: r13 and r14 are stored separately as a work around for the
- * SA110 rev 2 STM^ bug
- */
-
-#define PUSHFRAMEINSVC \
- stmdb sp, {r0-r3}; /* Save 4 registers */ \
- mov r0, lr; /* Save xxx32 r14 */ \
- mov r1, sp; /* Save xxx32 sp */ \
- mrs r3, spsr; /* Save xxx32 spsr */ \
- mrs r2, cpsr; /* Get the CPSR */ \
- bic r2, r2, #(PSR_MODE); /* Fix for SVC mode */ \
- orr r2, r2, #(PSR_SVC32_MODE); \
- msr cpsr_c, r2; /* Punch into SVC mode */ \
- mov r2, sp; /* Save SVC sp */ \
- str r0, [sp, #-4]!; /* Push return address */ \
- str lr, [sp, #-4]!; /* Push SVC lr */ \
- str r2, [sp, #-4]!; /* Push SVC sp */ \
- msr spsr_all, r3; /* Restore correct spsr */ \
- ldmdb r1, {r0-r3}; /* Restore 4 regs from xxx mode */ \
- sub sp, sp, #(4*15); /* Adjust the stack pointer */ \
- stmia sp, {r0-r12}; /* Push the user mode registers */ \
- add r0, sp, #(4*13); /* Adjust the stack pointer */ \
- stmia r0, {r13-r14}^; /* Push the user mode registers */ \
- mov r0, r0; /* NOP for previous instruction */ \
- ldr r5, =0xe0000004; /* Check if there's any RAS */ \
- ldr r3, [r5]; \
- cmp r3, #0; /* Is the update needed ? */ \
- beq 1f; \
- ldr lr, [r0, #16]; \
- ldr r1, =0xe0000008; \
- ldr r4, [r1]; /* Get the end of the RAS */ \
- mov r2, #0; /* Reset the magic addresses */ \
- str r2, [r5]; \
- str r2, [r1]; \
- cmp lr, r3; /* Were we in the RAS ? */ \
- blt 1f; \
- cmp lr, r4; \
- strlt r3, [r0, #16]; /* Yes, update the pc */ \
- 1: \
- mrs r0, spsr_all; /* Put the SPSR on the stack */ \
- str r0, [sp, #-4]!
-
-/*
- * PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack
- * in SVC32 mode and restore the saved processor mode and PC.
- * This should be used when the SVC lr register needs to be restored on
- * exit.
- */
-
-#define PULLFRAMEFROMSVCANDEXIT \
- ldr r0, [sp], #0x0004; /* Get the SPSR from stack */ \
- msr spsr_all, r0; /* restore SPSR */ \
- ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
- mov r0, r0; /* NOP for previous instruction */ \
- add sp, sp, #(4*15); /* Adjust the stack pointer */ \
- ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */
-
-#define DATA(name) \
- .data ; \
- _ALIGN_DATA ; \
- .globl name ; \
- .type name, %object ; \
-name:
-
-#define EMPTY
-
-
-#define DO_AST \
- ldr r0, [sp] /* Get the SPSR from stack */ ;\
- mrs r4, cpsr /* save CPSR */ ;\
- orr r1, r4, #(I32_bit) ;\
- msr cpsr_c, r1 /* Disable interrupts */ ;\
- and r0, r0, #(PSR_MODE) /* Returning to USR mode? */ ;\
- teq r0, #(PSR_USR32_MODE) ;\
- bne 2f /* Nope, get out now */ ;\
- bic r4, r4, #(I32_bit) ;\
-1: ldr r5, .Lcurthread ;\
- ldr r5, [r5] ;\
- ldr r1, [r5, #(TD_FLAGS)] ;\
- and r1, r1, #(TDF_ASTPENDING|TDF_NEEDRESCHED) ;\
- teq r1, #0x00000000 ;\
- beq 2f /* Nope. Just bail */ ;\
- msr cpsr_c, r4 /* Restore interrupts */ ;\
- mov r0, sp ;\
- bl _C_LABEL(ast) /* ast(frame) */ ;\
- orr r0, r4, #(I32_bit) ;\
- msr cpsr_c, r0 ;\
- b 1b ;\
-2:
-
-
-#define AST_LOCALS ;\
-.Lcurthread: ;\
- .word _C_LABEL(__pcpu) + PC_CURTHREAD
-
-#endif /* LOCORE */
-
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_ASMACROS_H_ */
--- sys/arm/include/resource.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*-
- * Copyright 1998 Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby
- * granted, provided that both the above copyright notice and this
- * permission notice appear in all copies, that both the above
- * copyright notice and this permission notice appear in all
- * supporting documentation, and that the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * software without specific, written prior permission. M.I.T. makes
- * no representations about the suitability of this software for any
- * purpose. It is provided "as is" without express or implied
- * warranty.
- *
- * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
- * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
- * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/resource.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_RESOURCE_H_
-#define _MACHINE_RESOURCE_H_ 1
-
-/*
- * Definitions of resource types for Intel Architecture machines
- * with support for legacy ISA devices and drivers.
- */
-
-#define SYS_RES_IRQ 1 /* interrupt lines */
-#define SYS_RES_DRQ 2 /* isa dma lines */
-#define SYS_RES_MEMORY 3 /* i/o memory */
-#define SYS_RES_IOPORT 4 /* i/o ports */
-
-#endif /* !_MACHINE_RESOURCE_H_ */
--- sys/arm/include/smp.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* $FreeBSD: src/sys/arm/include/smp.h,v 1.1 2004/05/14 11:46:44 cognet Exp $ */
-
-#ifndef _MACHINE_SMP_H_
-#define _MACHINE_SMP_H_
-
-#endif /* !_MACHINE_SMP_H_ */
--- sys/arm/include/param.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*-
- * Copyright (c) 2001 David E. O'Brien
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)param.h 5.8 (Berkeley) 6/28/91
- * $FreeBSD: src/sys/arm/include/param.h,v 1.9 2004/11/20 16:51:32 cognet Exp $
- */
-
-/*
- * Machine dependent constants for StrongARM
- */
-
-/*
- * Round p (pointer or byte index) up to a correctly-aligned value
- * for all data types (int, long, ...). The result is unsigned int
- * and must be cast to any desired pointer type.
- */
-#ifndef _ALIGNBYTES
-#define _ALIGNBYTES (sizeof(int) - 1)
-#endif
-#ifndef _ALIGN
-#define _ALIGN(p) (((unsigned)(p) + _ALIGNBYTES) & ~_ALIGNBYTES)
-#endif
-
-#define STACKALIGNBYTES (8 - 1)
-#define STACKALIGN(p) ((u_int)(p) & ~STACKALIGNBYTES)
-#ifndef _MACHINE
-#define _MACHINE "arm"
-#endif
-#ifndef _MACHINE_ARCH
-#define _MACHINE_ARCH "arm"
-#endif
-
-#ifndef _NO_NAMESPACE_POLLUTION
-
-#ifndef _MACHINE_PARAM_H_
-#define _MACHINE_PARAM_H_
-
-#ifndef MACHINE
-#define MACHINE "arm"
-#endif
-#ifndef MACHINE_ARCH
-#define MACHINE_ARCH "arm"
-#endif
-#define MID_MACHINE MID_ARM6
-
-#ifdef SMP
-#define MAXCPU 2
-#else
-#define MAXCPU 1
-#endif /* SMP */
-
-#define ALIGNBYTES _ALIGNBYTES
-#define ALIGN(p) _ALIGN(p)
-
-#define PAGE_SHIFT 12
-#define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */
-#define PAGE_MASK (PAGE_SIZE - 1)
-#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
-
-#define PDR_SHIFT 20 /* log2(NBPDR) */
-#define NBPDR (1 << PDR_SHIFT)
-#define NPDEPG (1 << (32 - PDR_SHIFT))
-
-#ifndef KSTACK_PAGES
-#define KSTACK_PAGES 2
-#endif /* !KSTACK_PAGES */
-
-#ifndef FPCONTEXTSIZE
-#define FPCONTEXTSIZE (0x100)
-#endif
-
-#ifndef KSTACK_GUARD_PAGES
-#define KSTACK_GUARD_PAGES 1
-#endif /* !KSTACK_GUARD_PAGES */
-
-#define USPACE_SVC_STACK_TOP KSTACK_PAGES * PAGE_SIZE
-#define USPACE_SVC_STACK_BOTTOM (USPACE_SVC_STACK_TOP - 0x1000)
-#define USPACE_UNDEF_STACK_TOP (USPACE_SVC_STACK_BOTTOM - 0x10)
-#define USPACE_UNDEF_STACK_BOTTOM (FPCONTEXTSIZE + 10)
-/*
- * Mach derived conversion macros
- */
-#define trunc_page(x) ((x) & ~PAGE_MASK)
-#define round_page(x) (((x) + PAGE_MASK) & ~PAGE_MASK)
-#define trunc_4mpage(x) ((unsigned)(x) & ~PDRMASK)
-#define round_4mpage(x) ((((unsigned)(x)) + PDRMASK) & ~PDRMASK)
-
-#define atop(x) ((unsigned)(x) >> PAGE_SHIFT)
-#define ptoa(x) ((unsigned)(x) << PAGE_SHIFT)
-
-#define arm32_btop(x) ((unsigned)(x) >> PAGE_SHIFT)
-#define arm32_ptob(x) ((unsigned)(x) << PAGE_SHIFT)
-
-#define pgtok(x) ((x) * (PAGE_SIZE / 1024))
-
-#endif /* !_MACHINE_PARAM_H_ */
-#endif /* !_NO_NAMESPACE_POLLUTION */
--- sys/arm/include/trap.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* $NetBSD: trap.h,v 1.1 2001/02/23 03:48:19 ichiro Exp $ */
-/* $FreeBSD: src/sys/arm/include/trap.h,v 1.2 2005/01/10 22:43:16 cognet Exp $ */
-
-#ifndef _MACHINE_TRAP_H_
-#define _MACHINE_TRAP_H_
-#define GDB_BREAKPOINT 0xe6000011
-#define GDB5_BREAKPOINT 0xe7ffdefe
-#define PTRACE_BREAKPOINT 0xe7fffff0
-#define KERNEL_BREAKPOINT 0xe7ffffff
-#endif /* _MACHINE_TRAP_H_ */
--- sys/arm/include/asm.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/* $NetBSD: asm.h,v 1.5 2003/08/07 16:26:53 agc Exp $ */
-
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)asm.h 5.5 (Berkeley) 5/7/91
- *
- * $FreeBSD: src/sys/arm/include/asm.h,v 1.4 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_ASM_H_
-#define _MACHINE_ASM_H_
-#include <sys/cdefs.h>
-
-#ifdef __ELF__
-# define _C_LABEL(x) x
-#else
-# ifdef __STDC__
-# define _C_LABEL(x) _ ## x
-# else
-# define _C_LABEL(x) _/**/x
-# endif
-#endif
-#define _ASM_LABEL(x) x
-
-#ifndef _JB_MAGIC__SETJMP
-#define _JB_MAGIC__SETJMP 0x4278f500
-#define _JB_MAGIC_SETJMP 0x4278f501
-#endif
-#if 0
-#ifdef __STDC__
-# define __CONCAT(x,y) x ## y
-# define __STRING(x) #x
-#else
-# define __CONCAT(x,y) x/**/y
-# define __STRING(x) "x"
-#endif
-#endif
-
-#define I32_bit (1 << 7) /* IRQ disable */
-#define F32_bit (1 << 6) /* FIQ disable */
-
-#define CPU_CONTROL_32BP_ENABLE 0x00000010 /* P: 32-bit exception handlers */
-#define CPU_CONTROL_32BD_ENABLE 0x00000020 /* D: 32-bit addressing */
-
-#ifndef _ALIGN_TEXT
-# define _ALIGN_TEXT .align 0
-#endif
-
-/*
- * gas/arm uses @ as a single comment character and thus cannot be used here
- * Instead it recognised the # instead of an @ symbols in .type directives
- * We define a couple of macros so that assembly code will not be dependant
- * on one or the other.
- */
-#define _ASM_TYPE_FUNCTION #function
-#define _ASM_TYPE_OBJECT #object
-#define GLOBAL(X) .globl x
-#define _ENTRY(x) \
- .text; _ALIGN_TEXT; .globl x; .type x,_ASM_TYPE_FUNCTION; x:
-
-#ifdef GPROF
-# define _PROF_PROLOGUE \
- mov ip, lr; bl _mcount
-#else
-# define _PROF_PROLOGUE
-#endif
-
-#define ENTRY(y) _ENTRY(_C_LABEL(y)); _PROF_PROLOGUE
-#define ENTRY_NP(y) _ENTRY(_C_LABEL(y))
-#define ASENTRY(y) _ENTRY(_ASM_LABEL(y)); _PROF_PROLOGUE
-#define ASENTRY_NP(y) _ENTRY(_ASM_LABEL(y))
-
-#define ASMSTR .asciz
-
-#if defined(__ELF__) && defined(PIC)
-#ifdef __STDC__
-#define PIC_SYM(x,y) x ## ( ## y ## )
-#else
-#define PIC_SYM(x,y) x/**/(/**/y/**/)
-#endif
-#else
-#define PIC_SYM(x,y) x
-#endif
-
-#undef __FBSDID
-#if !defined(lint) && !defined(STRIP_FBSDID)
-#define __FBSDID(s) .ident s
-#else
-#define __FBSDID(s) /* nothing */
-#endif
-
-
-#ifdef __ELF__
-#define WEAK_ALIAS(alias,sym) \
- .weak alias; \
- alias = sym
-#endif
-
-#ifdef __STDC__
-#define WARN_REFERENCES(sym,msg) \
- .stabs msg ## ,30,0,0,0 ; \
- .stabs __STRING(_C_LABEL(sym)) ## ,1,0,0,0
-#elif defined(__ELF__)
-#define WARN_REFERENCES(sym,msg) \
- .stabs msg,30,0,0,0 ; \
- .stabs __STRING(sym),1,0,0,0
-#else
-#define WARN_REFERENCES(sym,msg) \
- .stabs msg,30,0,0,0 ; \
- .stabs __STRING(_/**/sym),1,0,0,0
-#endif /* __STDC__ */
-
-
-#if defined (__ARM_ARCH_6__) || defined (__ARM_ARCH_6J__)
-#define _ARM_ARCH_6
-#endif
-
-#if defined (_ARM_ARCH_6) || defined (__ARM_ARCH_5__) || \
- defined (__ARM_ARCH_5T__) || defined (__ARM_ARCH_5TE__) || \
- defined (__ARM_ARCH_5TEJ__)
-#define _ARM_ARCH_5
-#endif
-
-#if defined (_ARM_ARCH_5) || defined (__ARM_ARCH_4T__)
-#define _ARM_ARCH_4T
-#endif
-
-
-#if defined (_ARM_ARCH_4T)
-# define RET bx lr
-# define RETeq bxeq lr
-# define RETne bxne lr
-# ifdef __STDC__
-# define RETc(c) bx##c lr
-# else
-# define RETc(c) bx/**/c lr
-# endif
-#else
-# define RET mov pc, lr
-# define RETeq moveq pc, lr
-# define RETne movne pc, lr
-# ifdef __STDC__
-# define RETc(c) mov##c pc, lr
-# else
-# define RETc(c) mov/**/c pc, lr
-# endif
-#endif
-
-#endif /* !_MACHINE_ASM_H_ */
--- sys/arm/include/sf_buf.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*-
- * Copyright (c) 2003 Alan L. Cox <alc at cs.rice.edu>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/sf_buf.h,v 1.1 2004/05/14 11:46:44 cognet Exp $
- */
-
-#ifndef _MACHINE_SF_BUF_H_
-#define _MACHINE_SF_BUF_H_
-
-#include <sys/queue.h>
-
-struct vm_page;
-
-struct sf_buf {
- LIST_ENTRY(sf_buf) list_entry; /* list of buffers */
- TAILQ_ENTRY(sf_buf) free_entry; /* list of buffers */
- struct vm_page *m; /* currently mapped page */
- vm_offset_t kva; /* va of mapping */
- int ref_count; /* usage of this mapping */
-};
-
-static __inline vm_offset_t
-sf_buf_kva(struct sf_buf *sf)
-{
-
- return (sf->kva);
-}
-
-static __inline struct vm_page *
-sf_buf_page(struct sf_buf *sf)
-{
-
- return (sf->m);
-}
-
-#endif /* !_MACHINE_SF_BUF_H_ */
--- sys/arm/include/_stdint.h
+++ /dev/null
@@ -1,171 +0,0 @@
-/*-
- * Copyright (c) 2001, 2002 Mike Barcroft <mike at FreeBSD.org>
- * Copyright (c) 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Klaus Klein.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/_stdint.h,v 1.2 2004/05/18 16:04:56 stefanf Exp $
- */
-
-#ifndef _MACHINE__STDINT_H_
-#define _MACHINE__STDINT_H_
-
-#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS)
-
-#define INT8_C(c) (c)
-#define INT16_C(c) (c)
-#define INT32_C(c) (c)
-#define INT64_C(c) (c ## LL)
-
-#define UINT8_C(c) (c)
-#define UINT16_C(c) (c)
-#define UINT32_C(c) (c ## U)
-#define UINT64_C(c) (c ## ULL)
-
-#define INTMAX_C(c) (c ## LL)
-#define UINTMAX_C(c) (c ## ULL)
-
-#endif /* !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) */
-
-#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS)
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.1 Limits of exact-width integer types
- */
-/* Minimum values of exact-width signed integer types. */
-#define INT8_MIN (-0x7f-1)
-#define INT16_MIN (-0x7fff-1)
-#define INT32_MIN (-0x7fffffff-1)
-#define INT64_MIN (-0x7fffffffffffffffLL-1)
-
-/* Maximum values of exact-width signed integer types. */
-#define INT8_MAX 0x7f
-#define INT16_MAX 0x7fff
-#define INT32_MAX 0x7fffffff
-#define INT64_MAX 0x7fffffffffffffffLL
-
-/* Maximum values of exact-width unsigned integer types. */
-#define UINT8_MAX 0xff
-#define UINT16_MAX 0xffff
-#define UINT32_MAX 0xffffffffU
-#define UINT64_MAX 0xffffffffffffffffULL
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.2 Limits of minimum-width integer types
- */
-/* Minimum values of minimum-width signed integer types. */
-#define INT_LEAST8_MIN INT8_MIN
-#define INT_LEAST16_MIN INT16_MIN
-#define INT_LEAST32_MIN INT32_MIN
-#define INT_LEAST64_MIN INT64_MIN
-
-/* Maximum values of minimum-width signed integer types. */
-#define INT_LEAST8_MAX INT8_MAX
-#define INT_LEAST16_MAX INT16_MAX
-#define INT_LEAST32_MAX INT32_MAX
-#define INT_LEAST64_MAX INT64_MAX
-
-/* Maximum values of minimum-width unsigned integer types. */
-#define UINT_LEAST8_MAX UINT8_MAX
-#define UINT_LEAST16_MAX UINT16_MAX
-#define UINT_LEAST32_MAX UINT32_MAX
-#define UINT_LEAST64_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.3 Limits of fastest minimum-width integer types
- */
-/* Minimum values of fastest minimum-width signed integer types. */
-#define INT_FAST8_MIN INT32_MIN
-#define INT_FAST16_MIN INT32_MIN
-#define INT_FAST32_MIN INT32_MIN
-#define INT_FAST64_MIN INT64_MIN
-
-/* Maximum values of fastest minimum-width signed integer types. */
-#define INT_FAST8_MAX INT32_MAX
-#define INT_FAST16_MAX INT32_MAX
-#define INT_FAST32_MAX INT32_MAX
-#define INT_FAST64_MAX INT64_MAX
-
-/* Maximum values of fastest minimum-width unsigned integer types. */
-#define UINT_FAST8_MAX UINT32_MAX
-#define UINT_FAST16_MAX UINT32_MAX
-#define UINT_FAST32_MAX UINT32_MAX
-#define UINT_FAST64_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.4 Limits of integer types capable of holding object pointers
- */
-#define INTPTR_MIN INT32_MIN
-#define INTPTR_MAX INT32_MAX
-#define UINTPTR_MAX UINT32_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.5 Limits of greatest-width integer types
- */
-#define INTMAX_MIN INT64_MIN
-#define INTMAX_MAX INT64_MAX
-#define UINTMAX_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.3 Limits of other integer types
- */
-/* Limits of ptrdiff_t. */
-#define PTRDIFF_MIN INT32_MIN
-#define PTRDIFF_MAX INT32_MAX
-
-/* Limits of sig_atomic_t. */
-#define SIG_ATOMIC_MIN INT32_MIN
-#define SIG_ATOMIC_MAX INT32_MAX
-
-/* Limit of size_t. */
-#define SIZE_MAX UINT32_MAX
-
-#ifndef WCHAR_MIN /* Also possibly defined in <wchar.h> */
-/* Limits of wchar_t. */
-#define WCHAR_MIN INT32_MIN
-#define WCHAR_MAX INT32_MAX
-#endif
-
-/* Limits of wint_t. */
-#define WINT_MIN INT32_MIN
-#define WINT_MAX INT32_MAX
-
-#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */
-
-#endif /* !_MACHINE__STDINT_H_ */
--- sys/arm/include/_types.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/*-
- * Copyright (c) 2002 Mike Barcroft <mike at FreeBSD.org>
- * Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * From: @(#)ansi.h 8.2 (Berkeley) 1/4/94
- * From: @(#)types.h 8.3 (Berkeley) 1/5/94
- * $FreeBSD: src/sys/arm/include/_types.h,v 1.6 2005/03/02 21:33:22 joerg Exp $
- */
-
-#ifndef _MACHINE__TYPES_H_
-#define _MACHINE__TYPES_H_
-
-#ifndef _SYS_CDEFS_H_
-#error this file needs sys/cdefs.h as a prerequisite
-#endif
-
-/*
- * Basic types upon which most other types are built.
- */
-typedef __signed char __int8_t;
-typedef unsigned char __uint8_t;
-typedef short __int16_t;
-typedef unsigned short __uint16_t;
-typedef int __int32_t;
-typedef unsigned int __uint32_t;
-
-#ifdef __GNUCLIKE_ATTRIBUTE_MODE_DI
-typedef int __attribute__((__mode__(__DI__))) __int64_t;
-typedef unsigned int __attribute__((__mode__(__DI__))) __uint64_t;
-#else
-/* LONGLONG */
-typedef long long __int64_t;
-/* LONGLONG */
-typedef unsigned long long __uint64_t;
-#endif
-
-/*
- * Standard type definitions.
- */
-typedef __uint32_t __clock_t; /* clock()... */
-typedef unsigned int __cpumask_t;
-typedef __int32_t __critical_t;
-typedef double __double_t;
-typedef double __float_t;
-typedef __int32_t __intfptr_t;
-typedef __int64_t __intmax_t;
-typedef __int32_t __intptr_t;
-typedef __int32_t __int_fast8_t;
-typedef __int32_t __int_fast16_t;
-typedef __int32_t __int_fast32_t;
-typedef __int64_t __int_fast64_t;
-typedef __int8_t __int_least8_t;
-typedef __int16_t __int_least16_t;
-typedef __int32_t __int_least32_t;
-typedef __int64_t __int_least64_t;
-typedef __int32_t __ptrdiff_t; /* ptr1 - ptr2 */
-typedef __int32_t __register_t;
-typedef __int32_t __segsz_t; /* segment size (in pages) */
-typedef __uint32_t __size_t; /* sizeof() */
-typedef __int32_t __ssize_t; /* byte count or error */
-typedef __int32_t __time_t; /* time()... */
-typedef __uint32_t __uintfptr_t;
-typedef __uint64_t __uintmax_t;
-typedef __uint32_t __uintptr_t;
-typedef __uint32_t __uint_fast8_t;
-typedef __uint32_t __uint_fast16_t;
-typedef __uint32_t __uint_fast32_t;
-typedef __uint64_t __uint_fast64_t;
-typedef __uint8_t __uint_least8_t;
-typedef __uint16_t __uint_least16_t;
-typedef __uint32_t __uint_least32_t;
-typedef __uint64_t __uint_least64_t;
-typedef __uint32_t __u_register_t;
-typedef __uint32_t __vm_offset_t;
-typedef __int64_t __vm_ooffset_t;
-typedef __uint32_t __vm_paddr_t;
-typedef __uint64_t __vm_pindex_t;
-typedef __uint32_t __vm_size_t;
-
-/*
- * Unusual type definitions.
- */
-#ifdef __GNUCLIKE_BUILTIN_VARARGS
-typedef __builtin_va_list __va_list; /* internally known to gcc */
-#else
-typedef char * __va_list;
-#endif /* __GNUCLIKE_BUILTIN_VARARGS */
-#if defined(__GNUCLIKE_BUILTIN_VAALIST) && !defined(__GNUC_VA_LIST) \
- && !defined(__NO_GNUC_VA_LIST)
-#define __GNUC_VA_LIST
-typedef __va_list __gnuc_va_list; /* compatibility w/GNU headers*/
-#endif
-
-#endif /* !_MACHINE__TYPES_H_ */
--- sys/arm/include/runq.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*-
- * Copyright (c) 2001 Jake Burkholder <jake at FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/runq.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_RUNQ_H_
-#define _MACHINE_RUNQ_H_
-
-#define RQB_LEN (2) /* Number of priority status words. */
-#define RQB_L2BPW (5) /* Log2(sizeof(rqb_word_t) * NBBY)). */
-#define RQB_BPW (1<<RQB_L2BPW) /* Bits in an rqb_word_t. */
-
-#define RQB_BIT(pri) (1 << ((pri) & (RQB_BPW - 1)))
-#define RQB_WORD(pri) ((pri) >> RQB_L2BPW)
-
-#define RQB_FFS(word) (ffs(word) - 1)
-
-/*
- * Type of run queue status word.
- */
-typedef u_int32_t rqb_word_t;
-
-#endif
--- sys/arm/include/db_machdep.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*-
- * Mach Operating System
- * Copyright (c) 1991,1990 Carnegie Mellon University
- * All Rights Reserved.
- *
- * Permission to use, copy, modify and distribute this software and its
- * documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
- * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie Mellon
- * the rights to redistribute these changes.
- *
- * from: FreeBSD: src/sys/i386/include/db_machdep.h,v 1.16 1999/10/04
- * $FreeBSD: src/sys/arm/include/db_machdep.h,v 1.5 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_DB_MACHDEP_H_
-#define _MACHINE_DB_MACHDEP_H_
-
-#include <machine/frame.h>
-#include <machine/trap.h>
-#include <machine/armreg.h>
-
-#define T_BREAKPOINT (1)
-typedef vm_offset_t db_addr_t;
-typedef int db_expr_t;
-
-#define PC_REGS() ((db_addr_t)kdb_thrctx->un_32.pcb32_pc)
-
-#define BKPT_INST (KERNEL_BREAKPOINT)
-#define BKPT_SIZE (INSN_SIZE)
-#define BKPT_SET(inst) (BKPT_INST)
-
-#define BKPT_SKIP do { \
- kdb_frame->tf_pc += BKPT_SIZE; \
-} while (0)
-
-#define SOFTWARE_SSTEP 1
-
-#define IS_BREAKPOINT_TRAP(type, code) (type == T_BREAKPOINT)
-#define IS_WATCHPOINT_TRAP(type, code) (0)
-
-
-#define inst_trap_return(ins) (0)
-/* ldmxx reg, {..., pc}
- 01800000 stack mode
- 000f0000 register
- 0000ffff register list */
-/* mov pc, reg
- 0000000f register */
-#define inst_return(ins) (((ins) & 0x0e108000) == 0x08108000 || \
- ((ins) & 0x0ff0fff0) == 0x01a0f000 || \
- ((ins) & 0x0ffffff0) == 0x012fff10) /* bx */
-/* bl ...
- 00ffffff offset>>2 */
-#define inst_call(ins) (((ins) & 0x0f000000) == 0x0b000000)
-/* b ...
- 00ffffff offset>>2 */
-/* ldr pc, [pc, reg, lsl #2]
- 0000000f register */
-
-#define inst_branch(ins) (((ins) & 0x0f000000) == 0x0a000000 || \
- ((ins) & 0x0fdffff0) == 0x079ff100)
-
-#define inst_load(ins) (0)
-#define inst_store(ins) (0)
-
-#define next_instr_address(pc, bd) ((bd) ? (pc) : ((pc) + INSN_SIZE))
-
-#define DB_SMALL_VALUE_MAX (0x7fffffff)
-#define DB_SMALL_VALUE_MIN (-0x40001)
-
-#define DB_ELFSIZE 32
-
-int db_validate_address(vm_offset_t);
-
-u_int branch_taken (u_int insn, u_int pc);
-
-#endif /* !_MACHINE_DB_MACHDEP_H_ */
--- sys/arm/include/pcpu.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*-
- * Copyright (c) 1999 Luoqi Chen <luoqi at freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: FreeBSD: src/sys/i386/include/globaldata.h,v 1.27 2001/04/27
- * $FreeBSD: src/sys/arm/include/pcpu.h,v 1.2 2004/11/04 19:19:44 cognet Exp $
- */
-
-#ifndef _MACHINE_PCPU_H_
-#define _MACHINE_PCPU_H_
-
-#ifdef _KERNEL
-
-#include <machine/asmacros.h>
-#include <machine/frame.h>
-
-#define ALT_STACK_SIZE 128
-
-struct vmspace;
-
-/*
- * Inside the kernel, the globally reserved register g7 is used to
- * point at the globaldata structure.
- */
-#define PCPU_MD_FIELDS \
- struct pcup *pc_prvspace;
-
-struct pcb;
-struct pcpu;
-
-extern struct pcpu *pcpup;
-extern struct pcpu __pcpu;
-
-#define PCPU_GET(member) (__pcpu.pc_ ## member)
-#define PCPU_PTR(member) (&__pcpu.pc_ ## member)
-#define PCPU_SET(member,value) (__pcpu.pc_ ## member = (value))
-
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_PCPU_H_ */
--- sys/arm/include/elf.h
+++ /dev/null
@@ -1,128 +0,0 @@
-/*-
- * Copyright (c) 2001 David E. O'Brien
- * Copyright (c) 1996-1997 John D. Polstra.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/elf.h,v 1.5 2004/05/04 22:21:36 cognet Exp $
- */
-
-#ifndef _MACHINE_ELF_H_
-#define _MACHINE_ELF_H_ 1
-
-/*
- * EABI ELF definitions for the StrongARM architecture.
- * See "ARM ELF", document no. `SWS ESPC 0003 A-08' for details.
- */
-
-#include <sys/elf32.h> /* Definitions common to all 32 bit architectures. */
-
-#define __ELF_WORD_SIZE 32 /* Used by <sys/elf_generic.h> */
-#include <sys/elf_generic.h>
-
-typedef struct { /* Auxiliary vector entry on initial stack */
- int a_type; /* Entry type. */
- union {
- long a_val; /* Integer value. */
- void *a_ptr; /* Address. */
- void (*a_fcn)(void); /* Function pointer (not used). */
- } a_un;
-} Elf32_Auxinfo;
-
-__ElfType(Auxinfo);
-
-#define ELF_ARCH EM_ARM
-
-#define ELF_MACHINE_OK(x) ((x) == EM_ARM)
-
-/*
- * Relocation types.
- */
-
-/* Values for a_type. */
-#define AT_NULL 0 /* Terminates the vector. */
-#define AT_IGNORE 1 /* Ignored entry. */
-#define AT_EXECFD 2 /* File descriptor of program to load. */
-#define AT_PHDR 3 /* Program header of program already loaded. */
-#define AT_PHENT 4 /* Size of each program header entry. */
-#define AT_PHNUM 5 /* Number of program header entries. */
-#define AT_PAGESZ 6 /* Page size in bytes. */
-#define AT_BASE 7 /* Interpreter's base address. */
-#define AT_FLAGS 8 /* Flags (unused). */
-#define AT_ENTRY 9 /* Where interpreter should transfer control. */
-
-#define AT_BRK 10 /* Starting point for sbrk and brk. */
-#define AT_DEBUG 11 /* Debugging level. */
-
-#define AT_NOTELF 10 /* Program is not ELF ?? */
-#define AT_UID 11 /* Real uid. */
-#define AT_EUID 12 /* Effective uid. */
-#define AT_GID 13 /* Real gid. */
-#define AT_EGID 14 /* Effective gid. */
-
-#define AT_COUNT 15 /* Count of defined aux entry types. */
-
-#define R_ARM_NONE 0 /* No relocation. */
-#define R_ARM_PC24 1
-#define R_ARM_ABS32 2
-#define R_ARM_REL32 3
-#define R_ARM_PC13 4
-#define R_ARM_ABS16 5
-#define R_ARM_ABS12 6
-#define R_ARM_THM_ABS5 7
-#define R_ARM_ABS8 8
-#define R_ARM_SBREL32 9
-#define R_ARM_THM_PC22 10
-#define R_ARM_THM_PC8 11
-#define R_ARM_AMP_VCALL9 12
-#define R_ARM_SWI24 13
-#define R_ARM_THM_SWI8 14
-#define R_ARM_XPC25 15
-#define R_ARM_THM_XPC22 16
-#define R_ARM_COPY 20 /* Copy data from shared object. */
-#define R_ARM_GLOB_DAT 21 /* Set GOT entry to data address. */
-#define R_ARM_JUMP_SLOT 22 /* Set GOT entry to code address. */
-#define R_ARM_RELATIVE 23 /* Add load address of shared object. */
-#define R_ARM_GOTOFF 24 /* Add GOT-relative symbol address. */
-#define R_ARM_GOTPC 25 /* Add PC-relative GOT table address. */
-#define R_ARM_GOT32 26 /* Add PC-relative GOT offset. */
-#define R_ARM_PLT32 27 /* Add PC-relative PLT offset. */
-#define R_ARM_GNU_VTENTRY 100
-#define R_ARM_GNU_VTINHERIT 101
-#define R_ARM_RSBREL32 250
-#define R_ARM_THM_RPC22 251
-#define R_ARM_RREL32 252
-#define R_ARM_RABS32 253
-#define R_ARM_RPC24 254
-#define R_ARM_RBASE 255
-
-#define R_ARM_COUNT 33 /* Count of defined relocation types. */
-
-
-/* Define "machine" characteristics */
-#define ELF_TARG_CLASS ELFCLASS32
-#define ELF_TARG_DATA ELFDATA2LSB
-#define ELF_TARG_MACH EM_ARM
-#define ELF_TARG_VER 1
-
-#endif /* !_MACHINE_ELF_H_ */
--- sys/arm/include/bootconfig.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/* $NetBSD: bootconfig.h,v 1.1 2001/05/13 13:46:23 bjh21 Exp $ */
-
-/*-
- * Copyright (c) 1994 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/bootconfig.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_BOOTCONFIG_H_
-#define _MACHINE_BOOTCONFIG_H_
-
-#ifdef _KERNEL
-#define BOOTOPT_TYPE_BOOLEAN 0
-#define BOOTOPT_TYPE_STRING 1
-#define BOOTOPT_TYPE_INT 2
-#define BOOTOPT_TYPE_BININT 3
-#define BOOTOPT_TYPE_HEXINT 4
-#define BOOTOPT_TYPE_MASK 7
-
-int get_bootconf_option __P((char *, char *, int, void *));
-
-extern char *boot_args;
-extern char *boot_file;
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_BOOTCONFIG_H_ */
--- sys/arm/include/vmparam.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/* $NetBSD: vmparam.h,v 1.26 2003/08/07 16:27:47 agc Exp $ */
-
-/*-
- * Copyright (c) 1988 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/vmparam.h,v 1.5 2005/06/07 23:04:24 cognet Exp $
- */
-
-#ifndef _MACHINE_VMPARAM_H_
-#define _MACHINE_VMPARAM_H_
-
-
-/*#include <arm/arm32/vmparam.h>
-*/
-/*
- * Address space constants
- */
-
-/*
- * The line between user space and kernel space
- * Mappings >= KERNEL_BASE are constant across all processes
- */
-#define KERNBASE 0xc0000000
-
-/*
- * Override the default pager_map size, there's not enough KVA.
- */
-/*
- * Size of User Raw I/O map
- */
-
-#define USRIOSIZE 300
-
-/* virtual sizes (bytes) for various kernel submaps */
-
-#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE)
-
-/*
- * max number of non-contig chunks of physical RAM you can have
- */
-
-#define VM_PHYSSEG_MAX 32
-
-/*
- * when converting a physical address to a vm_page structure, we
- * want to use a binary search on the chunks of physical memory
- * to find our RAM
- */
-
-#define VM_PHYSSEG_STRAT VM_PSTRAT_BSEARCH
-
-/*
- * this indicates that we can't add RAM to the VM system after the
- * vm system is init'd.
- */
-
-#define VM_PHYSSEG_NOADD
-
-/*
- * we support 2 free lists:
- *
- * - DEFAULT for all systems
- * - ISADMA for the ISA DMA range on Sharks only
- */
-
-#define VM_NFREELIST 2
-#define VM_FREELIST_DEFAULT 0
-#define VM_FREELIST_ISADMA 1
-
-#define UPT_MAX_ADDRESS VADDR(UPTPTDI + 3, 0)
-#define UPT_MIN_ADDRESS VADDR(UPTPTDI, 0)
-
-#define VM_MIN_ADDRESS (0x00001000)
-#define VM_MAXUSER_ADDRESS KERNBASE
-#define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS
-
-#define USRSTACK VM_MAXUSER_ADDRESS
-
-/* initial pagein size of beginning of executable file */
-#ifndef VM_INITIAL_PAGEIN
-#define VM_INITIAL_PAGEIN 16
-#endif
-
-#ifndef VM_MIN_KERNEL_ADDRESS
-#define VM_MIN_KERNEL_ADDRESS KERNBASE
-#endif
-
-#define VM_MAX_KERNEL_ADDRESS 0xffffffff
-/*
- * Virtual size (bytes) for various kernel submaps.
- */
-
-#ifndef VM_KMEM_SIZE
-#define VM_KMEM_SIZE (12*1024*1024)
-#endif
-
-#define MAXTSIZ (16*1024*1024)
-#define DFLDSIZ (128*1024*1024)
-#define MAXDSIZ (512*1024*1024)
-#define DFLSSIZ (2*1024*1024)
-#define MAXSSIZ (8*1024*1024)
-#define SGROWSIZ (128*1024)
-#define MAXSLP 20
-
-#define VM_PROT_READ_IS_EXEC
-
-#ifdef ARM_USE_SMALL_ALLOC
-#define UMA_MD_SMALL_ALLOC
-#endif /* ARM_USE_SMALL_ALLOC */
-#endif /* _MACHINE_VMPARAM_H_ */
--- sys/arm/include/sigframe.h
+++ /dev/null
@@ -1,2 +0,0 @@
-/* $FreeBSD: src/sys/arm/include/sigframe.h,v 1.1 2004/05/14 11:46:44 cognet Exp $ */
-#include <machine/frame.h>
--- sys/arm/include/metadata.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*-
- * Copyright (c) 2003 Peter Wemm <peter at FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/metadata.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_METADATA_H_
-#define _MACHINE_METADATA_H_
-
-#define MODINFOMD_SMAP 0x1001
-
-#endif /* !_MACHINE_METADATA_H_ */
--- sys/arm/include/clock.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*-
- * Copyright (c) 2004 Olivier Houchard
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/clock.h,v 1.1 2004/05/14 11:46:44 cognet Exp $
- */
-
-#ifndef _MACHINE_CLOCK_H_
-#define _MACHINE_CLOCK_H_
-
-#endif /* !_MACHINE_CLOCK_H_ */
--- sys/arm/include/atomic.h
+++ /dev/null
@@ -1,333 +0,0 @@
-/* $NetBSD: atomic.h,v 1.1 2002/10/19 12:22:34 bsh Exp $ */
-
-/*-
- * Copyright (C) 2003-2004 Olivier Houchard
- * Copyright (C) 1994-1997 Mark Brinicombe
- * Copyright (C) 1994 Brini
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of Brini may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
- * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
- * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/atomic.h,v 1.8.2.3 2005/10/06 18:12:05 jhb Exp $
- */
-
-#ifndef _MACHINE_ATOMIC_H_
-#define _MACHINE_ATOMIC_H_
-
-
-
-#ifndef _LOCORE
-
-#include <sys/types.h>
-
-#ifndef I32_bit
-#define I32_bit (1 << 7) /* IRQ disable */
-#endif
-#ifndef F32_bit
-#define F32_bit (1 << 6) /* FIQ disable */
-#endif
-
-#define __with_interrupts_disabled(expr) \
- do { \
- u_int cpsr_save, tmp; \
- \
- __asm __volatile( \
- "mrs %0, cpsr;" \
- "orr %1, %0, %2;" \
- "msr cpsr_all, %1;" \
- : "=r" (cpsr_save), "=r" (tmp) \
- : "I" (I32_bit) \
- : "cc" ); \
- (expr); \
- __asm __volatile( \
- "msr cpsr_all, %0" \
- : /* no output */ \
- : "r" (cpsr_save) \
- : "cc" ); \
- } while(0)
-
-#define ARM_RAS_START 0xe0000004
-#define ARM_RAS_END 0xe0000008
-
-static __inline uint32_t
-__swp(uint32_t val, volatile uint32_t *ptr)
-{
- __asm __volatile("swp %0, %2, [%3]"
- : "=&r" (val), "=m" (*ptr)
- : "r" (val) , "r" (ptr), "m" (*ptr)
- : "memory");
- return (val);
-}
-
-
-#ifdef _KERNEL
-static __inline void
-atomic_set_32(volatile uint32_t *address, uint32_t setmask)
-{
- __with_interrupts_disabled(*address |= setmask);
-}
-
-static __inline void
-atomic_clear_32(volatile uint32_t *address, uint32_t clearmask)
-{
- __with_interrupts_disabled(*address &= ~clearmask);
-}
-
-static __inline u_int32_t
-atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval)
-{
- int ret;
-
- __with_interrupts_disabled(
- {
- if (*p == cmpval) {
- *p = newval;
- ret = 1;
- } else {
- ret = 0;
- }
- });
- return (ret);
-}
-
-static __inline void
-atomic_add_32(volatile u_int32_t *p, u_int32_t val)
-{
- __with_interrupts_disabled(*p += val);
-}
-
-static __inline void
-atomic_subtract_32(volatile u_int32_t *p, u_int32_t val)
-{
- __with_interrupts_disabled(*p -= val);
-}
-
-static __inline uint32_t
-atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
-{
- uint32_t value;
-
- __with_interrupts_disabled(
- {
- value = *p;
- *p += v;
- });
- return (value);
-}
-
-#else /* !_KERNEL */
-
-static __inline u_int32_t
-atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval)
-{
- register int done, ras_start;
-
- __asm __volatile("1:\n"
- "mov %0, #0xe0000008\n"
- "adr %1, 2f\n"
- "str %1, [%0]\n"
- "adr %1, 1b\n"
- "mov %0, #0xe0000004\n"
- "str %1, [%0]\n"
- "ldr %1, [%2]\n"
- "cmp %1, %3\n"
- "streq %4, [%2]\n"
- "2:\n"
- "mov %1, #0\n"
- "str %1, [%0]\n"
- "moveq %1, #1\n"
- "movne %1, #0\n"
- : "=r" (ras_start), "=r" (done)
- ,"+r" (p), "+r" (cmpval), "+r" (newval));
- return (done);
-}
-
-static __inline void
-atomic_add_32(volatile u_int32_t *p, u_int32_t val)
-{
- int ras_start, start;
-
- __asm __volatile("1:\n"
- "mov %0, #0xe0000008\n"
- "adr %1, 2f\n"
- "str %1, [%0]\n"
- "adr %1, 1b\n"
- "mov %0, #0xe0000004\n"
- "str %1, [%0]\n"
- "ldr %1, [%2]\n"
- "add %1, %1, %3\n"
- "str %1, [%2]\n"
- "2:\n"
- "mov %1, #0\n"
- "str %1, [%0]\n"
- : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val));
-}
-
-static __inline void
-atomic_subtract_32(volatile u_int32_t *p, u_int32_t val)
-{
- int ras_start, start;
-
- __asm __volatile("1:\n"
- "mov %0, #0xe0000008\n"
- "adr %1, 2f\n"
- "str %1, [%0]\n"
- "adr %1, 1b\n"
- "mov %0, #0xe0000004\n"
- "str %1, [%0]\n"
- "ldr %1, [%2]\n"
- "sub %1, %1, %3\n"
- "str %1, [%2]\n"
- "2:\n"
- "mov %1, #0\n"
- "str %1, [%0]\n"
-
- : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val));
-}
-
-static __inline void
-atomic_set_32(volatile uint32_t *address, uint32_t setmask)
-{
- int ras_start, start;
-
- __asm __volatile("1:\n"
- "mov %0, #0xe0000008\n"
- "adr %1, 2f\n"
- "str %1, [%0]\n"
- "adr %1, 1b\n"
- "mov %0, #0xe0000004\n"
- "str %1, [%0]\n"
- "ldr %1, [%2]\n"
- "orr %1, %1, %3\n"
- "str %1, [%2]\n"
- "2:\n"
- "mov %1, #0\n"
- "str %1, [%0]\n"
-
- : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (setmask));
-}
-
-static __inline void
-atomic_clear_32(volatile uint32_t *address, uint32_t clearmask)
-{
- int ras_start, start;
-
- __asm __volatile("1:\n"
- "mov %0, #0xe0000008\n"
- "adr %1, 2f\n"
- "str %1, [%0]\n"
- "adr %1, 1b\n"
- "mov %0, #0xe0000004\n"
- "str %1, [%0]\n"
- "ldr %1, [%2]\n"
- "bic %1, %1, %3\n"
- "str %1, [%2]\n"
- "2:\n"
- "mov %1, #0\n"
- "str %1, [%0]\n"
- : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (clearmask));
-
-}
-
-static __inline uint32_t
-atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
-{
- uint32_t ras_start, start;
-
- __asm __volatile("1:\n"
- "mov %0, #0xe0000008\n"
- "adr %1, 2f\n"
- "str %1, [%0]\n"
- "adr %1, 1b\n"
- "mov %0, #0xe0000004\n"
- "str %1, [%0]\n"
- "ldr %1, %2\n"
- "add %3, %1, %3\n"
- "str %3, %2\n"
- "2:\n"
- "mov %3, #0\n"
- "str %3, [%0]\n"
- : "=r" (ras_start), "=r" (start), "=m" (*p), "+r" (v));
- return (start);
-}
-
-
-#endif /* _KERNEL */
-
-static __inline int
-atomic_load_32(volatile uint32_t *v)
-{
-
- return (*v);
-}
-
-static __inline void
-atomic_store_32(volatile uint32_t *dst, uint32_t src)
-{
- *dst = src;
-}
-
-static __inline uint32_t
-atomic_readandclear_32(volatile u_int32_t *p)
-{
-
- return (__swp(0, p));
-}
-
-#undef __with_interrupts_disabled
-
-#endif /* _LOCORE */
-
-
-#define atomic_set_rel_int atomic_set_32
-#define atomic_set_int atomic_set_32
-#define atomic_readandclear_int atomic_readandclear_32
-#define atomic_clear_int atomic_clear_32
-#define atomic_subtract_int atomic_subtract_32
-#define atomic_subtract_rel_int atomic_subtract_32
-#define atomic_subtract_acq_int atomic_subtract_32
-#define atomic_add_int atomic_add_32
-#define atomic_add_rel_int atomic_add_32
-#define atomic_add_acq_int atomic_add_32
-#define atomic_cmpset_int atomic_cmpset_32
-#define atomic_cmpset_rel_int atomic_cmpset_32
-#define atomic_cmpset_rel_ptr atomic_cmpset_ptr
-#define atomic_cmpset_acq_int atomic_cmpset_32
-#define atomic_cmpset_acq_ptr atomic_cmpset_ptr
-#define atomic_store_rel_ptr atomic_store_ptr
-#define atomic_store_rel_int atomic_store_32
-#define atomic_cmpset_rel_32 atomic_cmpset_32
-#define atomic_cmpset_rel_ptr atomic_cmpset_ptr
-#define atomic_load_acq_int atomic_load_32
-#define atomic_clear_ptr atomic_clear_32
-#define atomic_store_ptr atomic_store_32
-#define atomic_cmpset_ptr atomic_cmpset_32
-#define atomic_set_ptr atomic_set_32
-#define atomic_fetchadd_int atomic_fetchadd_32
-
-#endif /* _MACHINE_ATOMIC_H_ */
--- sys/arm/include/frame.h
+++ /dev/null
@@ -1,188 +0,0 @@
-/* $NetBSD: frame.h,v 1.5 2002/10/19 00:10:54 bjh21 Exp $ */
-
-/*-
- * Copyright (c) 1994-1997 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * frame.h
- *
- * Stack frames structures
- *
- * Created : 30/09/94
- *
- * $FreeBSD: src/sys/arm/include/frame.h,v 1.3 2005/01/05 21:58:48 imp Exp $
- *
- */
-
-#ifndef _MACHINE_FRAME_H_
-#define _MACHINE_FRAME_H_
-
-#ifndef _LOCORE
-
-#include <sys/signal.h>
-#include <sys/ucontext.h>
-
-
-/*
- * Trap frame. Pushed onto the kernel stack on a trap (synchronous exception).
- */
-
-typedef struct trapframe {
- register_t tf_spsr; /* Zero on arm26 */
- register_t tf_r0;
- register_t tf_r1;
- register_t tf_r2;
- register_t tf_r3;
- register_t tf_r4;
- register_t tf_r5;
- register_t tf_r6;
- register_t tf_r7;
- register_t tf_r8;
- register_t tf_r9;
- register_t tf_r10;
- register_t tf_r11;
- register_t tf_r12;
- register_t tf_usr_sp;
- register_t tf_usr_lr;
- register_t tf_svc_sp; /* Not used on arm26 */
- register_t tf_svc_lr; /* Not used on arm26 */
- register_t tf_pc;
-} trapframe_t;
-
-/* Register numbers */
-#define tf_r13 tf_usr_sp
-#define tf_r14 tf_usr_lr
-#define tf_r15 tf_pc
-/*
- * * Scheduler activations upcall frame. Pushed onto user stack before
- * * calling an SA upcall.
- * */
-
-struct saframe {
-#if 0 /* in registers on entry to upcall */
- int sa_type;
- struct sa_t ** sa_sas;
- int sa_events;
- int sa_interrupted;
-#endif
- void * sa_arg;
-};
-
-/*
- * * Signal frame. Pushed onto user stack before calling sigcode.
- * */
-
-/* the pointers are use in the trampoline code to locate the ucontext */
-struct sigframe {
- siginfo_t sf_si; /* actual saved siginfo */
- ucontext_t sf_uc; /* actual saved ucontext */
-};
-
-/*
- * System stack frames.
- */
-
-
-typedef struct irqframe {
- unsigned int if_spsr;
- unsigned int if_r0;
- unsigned int if_r1;
- unsigned int if_r2;
- unsigned int if_r3;
- unsigned int if_r4;
- unsigned int if_r5;
- unsigned int if_r6;
- unsigned int if_r7;
- unsigned int if_r8;
- unsigned int if_r9;
- unsigned int if_r10;
- unsigned int if_r11;
- unsigned int if_r12;
- unsigned int if_usr_sp;
- unsigned int if_usr_lr;
- unsigned int if_svc_sp;
- unsigned int if_svc_lr;
- unsigned int if_pc;
-} irqframe_t;
-
-typedef struct clockframe {
- unsigned int if_spsr;
- unsigned int if_r0;
- unsigned int if_r1;
- unsigned int if_r2;
- unsigned int if_r3;
- unsigned int if_r4;
- unsigned int if_r5;
- unsigned int if_r6;
- unsigned int if_r7;
- unsigned int if_r8;
- unsigned int if_r9;
- unsigned int if_r10;
- unsigned int if_r11;
- unsigned int if_r12;
- unsigned int if_usr_sp;
- unsigned int if_usr_lr;
- unsigned int if_svc_sp;
- unsigned int if_svc_lr;
- unsigned int if_pc;
-} clockframe_t;
-
-/*
- * Switch frame
- */
-
-struct switchframe {
- u_int sf_r4;
- u_int sf_r5;
- u_int sf_r6;
- u_int sf_r7;
- u_int sf_pc;
-};
-
-/*
- * Stack frame. Used during stack traces (db_trace.c)
- */
-struct frame {
- u_int fr_fp;
- u_int fr_sp;
- u_int fr_lr;
- u_int fr_pc;
-};
-
-#endif /* !_LOCORE */
-
-#endif /* _MACHINE_FRAME_H_ */
-
-/* End of frame.h */
--- sys/arm/include/mutex.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*-
- * Copyright (c) 2001 Jake Burkholder.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/mutex.h,v 1.1 2004/05/14 11:46:44 cognet Exp $
- */
-
-#ifndef _MACHINE_MUTEX_H_
-#define _MACHINE_MUTEX_H_
-
-#endif /* !_MACHINE_MUTEX_H_ */
--- sys/arm/include/cpu.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* $NetBSD: cpu.h,v 1.2 2001/02/23 21:23:52 reinoud Exp $ */
-/* $FreeBSD: src/sys/arm/include/cpu.h,v 1.4 2005/02/01 06:36:27 njl Exp $ */
-
-#ifndef MACHINE_CPU_H
-#define MACHINE_CPU_H
-
-#include <machine/armreg.h>
-
-void cpu_halt(void);
-void swi_vm(void *);
-
-#ifdef _KERNEL
-static __inline uint64_t
-get_cyclecount(void)
-{
- struct bintime bt;
-
- binuptime(&bt);
- return (bt.frac ^ bt.sec);
-
-}
-#endif
-
-#define CPU_CONSDEV 1
-#define CPU_ADJKERNTZ 2 /* int: timezone offset (seconds) */
-#define CPU_DISRTCSET 3 /* int: disable resettodr() call */
-#define CPU_BOOTINFO 4 /* struct: bootinfo */
-#define CPU_WALLCLOCK 5 /* int: indicates wall CMOS clock */
-#define CPU_MAXID 6 /* number of valid machdep ids */
-
-
-#define CLKF_USERMODE(frame) ((frame->if_spsr & PSR_MODE) == PSR_USR32_MODE)
-
-#define TRAPF_USERMODE(frame) ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
-#define CLKF_PC(frame) (frame->if_pc)
-
-#define TRAPF_PC(tfp) ((tfp)->tf_pc)
-
-#define cpu_getstack(td) ((td)->td_frame->tf_usr_sp)
-#define cpu_setstack(td, sp) ((td)->td_frame->tf_usr_sp = (sp))
-#define cpu_spinwait() /* nothing */
-
-#define ARM_NVEC 8
-#define ARM_VEC_ALL 0xffffffff
-
-extern vm_offset_t vector_page;
-
-void arm_vector_init(vm_offset_t, int);
-void fork_trampoline(void);
-void identify_arm_cpu(void);
-void *initarm(void *, void *);
-
-extern char btext[];
-extern char etext[];
-int badaddr_read (void *, size_t, void *);
-#endif /* !MACHINE_CPU_H */
--- sys/arm/include/proc.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*-
- * Copyright (c) 1991 Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)proc.h 7.1 (Berkeley) 5/15/91
- * from: FreeBSD: src/sys/i386/include/proc.h,v 1.11 2001/06/29
- * $FreeBSD: src/sys/arm/include/proc.h,v 1.5 2005/04/04 21:53:52 jhb Exp $
- */
-
-#ifndef _MACHINE_PROC_H_
-#define _MACHINE_PROC_H_
-
-#include <machine/utrap.h>
-
-struct md_utrap {
- utrap_entry_t *ut_precise[UT_MAX]; /* must be first */
- int ut_refcnt;
-};
-
-struct mdthread {
- int md_spinlock_count; /* (k) */
- register_t md_saved_cspr; /* (k) */
- int md_ptrace_instr;
- int md_ptrace_addr;
- void *md_tp;
-};
-
-struct mdproc {
- struct md_utrap *md_utrap;
- void *md_sigtramp;
-};
-
-#endif /* !_MACHINE_PROC_H_ */
--- sys/arm/include/bus.h
+++ /dev/null
@@ -1,621 +0,0 @@
-/* $NetBSD: bus.h,v 1.11 2003/07/28 17:35:54 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
- * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Christopher G. Demetriou
- * for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/bus.h,v 1.8 2005/04/18 21:45:33 imp Exp $
- */
-
-#ifndef _MACHINE_BUS_H_
-#define _MACHINE_BUS_H_
-
-#include <machine/_bus.h>
-
-/*
- * int bus_space_map (bus_space_tag_t t, bus_addr_t addr,
- * bus_size_t size, int flags, bus_space_handle_t *bshp);
- *
- * Map a region of bus space.
- */
-
-#define BUS_SPACE_MAP_CACHEABLE 0x01
-#define BUS_SPACE_MAP_LINEAR 0x02
-#define BUS_SPACE_MAP_PREFETCHABLE 0x04
-
-struct bus_space {
- /* cookie */
- void *bs_cookie;
-
- /* mapping/unmapping */
- int (*bs_map) (void *, bus_addr_t, bus_size_t,
- int, bus_space_handle_t *);
- void (*bs_unmap) (void *, bus_size_t);
- int (*bs_subregion) (void *, bus_space_handle_t,
- bus_size_t, bus_size_t, bus_space_handle_t *);
-
- /* allocation/deallocation */
- int (*bs_alloc) (void *, bus_addr_t, bus_addr_t,
- bus_size_t, bus_size_t, bus_size_t, int,
- bus_addr_t *, bus_space_handle_t *);
- void (*bs_free) (void *, bus_space_handle_t,
- bus_size_t);
-
- /* get kernel virtual address */
- /* barrier */
- void (*bs_barrier) (void *, bus_space_handle_t,
- bus_size_t, bus_size_t, int);
-
- /* read (single) */
- u_int8_t (*bs_r_1) (void *, bus_space_handle_t, bus_size_t);
- u_int16_t (*bs_r_2) (void *, bus_space_handle_t, bus_size_t);
- u_int32_t (*bs_r_4) (void *, bus_space_handle_t, bus_size_t);
- u_int64_t (*bs_r_8) (void *, bus_space_handle_t, bus_size_t);
-
- /* read multiple */
- void (*bs_rm_1) (void *, bus_space_handle_t, bus_size_t,
- u_int8_t *, bus_size_t);
- void (*bs_rm_2) (void *, bus_space_handle_t, bus_size_t,
- u_int16_t *, bus_size_t);
- void (*bs_rm_4) (void *, bus_space_handle_t,
- bus_size_t, u_int32_t *, bus_size_t);
- void (*bs_rm_8) (void *, bus_space_handle_t,
- bus_size_t, u_int64_t *, bus_size_t);
-
- /* read region */
- void (*bs_rr_1) (void *, bus_space_handle_t,
- bus_size_t, u_int8_t *, bus_size_t);
- void (*bs_rr_2) (void *, bus_space_handle_t,
- bus_size_t, u_int16_t *, bus_size_t);
- void (*bs_rr_4) (void *, bus_space_handle_t,
- bus_size_t, u_int32_t *, bus_size_t);
- void (*bs_rr_8) (void *, bus_space_handle_t,
- bus_size_t, u_int64_t *, bus_size_t);
-
- /* write (single) */
- void (*bs_w_1) (void *, bus_space_handle_t,
- bus_size_t, u_int8_t);
- void (*bs_w_2) (void *, bus_space_handle_t,
- bus_size_t, u_int16_t);
- void (*bs_w_4) (void *, bus_space_handle_t,
- bus_size_t, u_int32_t);
- void (*bs_w_8) (void *, bus_space_handle_t,
- bus_size_t, u_int64_t);
-
- /* write multiple */
- void (*bs_wm_1) (void *, bus_space_handle_t,
- bus_size_t, const u_int8_t *, bus_size_t);
- void (*bs_wm_2) (void *, bus_space_handle_t,
- bus_size_t, const u_int16_t *, bus_size_t);
- void (*bs_wm_4) (void *, bus_space_handle_t,
- bus_size_t, const u_int32_t *, bus_size_t);
- void (*bs_wm_8) (void *, bus_space_handle_t,
- bus_size_t, const u_int64_t *, bus_size_t);
-
- /* write region */
- void (*bs_wr_1) (void *, bus_space_handle_t,
- bus_size_t, const u_int8_t *, bus_size_t);
- void (*bs_wr_2) (void *, bus_space_handle_t,
- bus_size_t, const u_int16_t *, bus_size_t);
- void (*bs_wr_4) (void *, bus_space_handle_t,
- bus_size_t, const u_int32_t *, bus_size_t);
- void (*bs_wr_8) (void *, bus_space_handle_t,
- bus_size_t, const u_int64_t *, bus_size_t);
-
- /* set multiple */
- void (*bs_sm_1) (void *, bus_space_handle_t,
- bus_size_t, u_int8_t, bus_size_t);
- void (*bs_sm_2) (void *, bus_space_handle_t,
- bus_size_t, u_int16_t, bus_size_t);
- void (*bs_sm_4) (void *, bus_space_handle_t,
- bus_size_t, u_int32_t, bus_size_t);
- void (*bs_sm_8) (void *, bus_space_handle_t,
- bus_size_t, u_int64_t, bus_size_t);
-
- /* set region */
- void (*bs_sr_1) (void *, bus_space_handle_t,
- bus_size_t, u_int8_t, bus_size_t);
- void (*bs_sr_2) (void *, bus_space_handle_t,
- bus_size_t, u_int16_t, bus_size_t);
- void (*bs_sr_4) (void *, bus_space_handle_t,
- bus_size_t, u_int32_t, bus_size_t);
- void (*bs_sr_8) (void *, bus_space_handle_t,
- bus_size_t, u_int64_t, bus_size_t);
-
- /* copy */
- void (*bs_c_1) (void *, bus_space_handle_t, bus_size_t,
- bus_space_handle_t, bus_size_t, bus_size_t);
- void (*bs_c_2) (void *, bus_space_handle_t, bus_size_t,
- bus_space_handle_t, bus_size_t, bus_size_t);
- void (*bs_c_4) (void *, bus_space_handle_t, bus_size_t,
- bus_space_handle_t, bus_size_t, bus_size_t);
- void (*bs_c_8) (void *, bus_space_handle_t, bus_size_t,
- bus_space_handle_t, bus_size_t, bus_size_t);
-
-};
-
-
-/*
- * Utility macros; INTERNAL USE ONLY.
- */
-#define __bs_c(a,b) __CONCAT(a,b)
-#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
-
-#define __bs_rs(sz, t, h, o) \
- (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
-#define __bs_ws(sz, t, h, o, v) \
- (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
-#define __bs_nonsingle(type, sz, t, h, o, a, c) \
- (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
-#define __bs_set(type, sz, t, h, o, v, c) \
- (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
-#define __bs_copy(sz, t, h1, o1, h2, o2, cnt) \
- (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
-
-
-/*
- * Mapping and unmapping operations.
- */
-#define bus_space_map(t, a, s, c, hp) \
- (*(t)->bs_map)((t)->bs_cookie, (a), (s), (c), (hp))
-#define bus_space_unmap(t, h, s) \
- (*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
-#define bus_space_subregion(t, h, o, s, hp) \
- (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
-
-
-/*
- * Allocation and deallocation operations.
- */
-#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) \
- (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
- (c), (ap), (hp))
-#define bus_space_free(t, h, s) \
- (*(t)->bs_free)((t)->bs_cookie, (h), (s))
-
-/*
- * Bus barrier operations.
- */
-#define bus_space_barrier(t, h, o, l, f) \
- (*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f))
-
-#define BUS_SPACE_BARRIER_READ 0x01
-#define BUS_SPACE_BARRIER_WRITE 0x02
-
-/*
- * Bus read (single) operations.
- */
-#define bus_space_read_1(t, h, o) __bs_rs(1,(t),(h),(o))
-#define bus_space_read_2(t, h, o) __bs_rs(2,(t),(h),(o))
-#define bus_space_read_4(t, h, o) __bs_rs(4,(t),(h),(o))
-#define bus_space_read_8(t, h, o) __bs_rs(8,(t),(h),(o))
-
-
-/*
- * Bus read multiple operations.
- */
-#define bus_space_read_multi_1(t, h, o, a, c) \
- __bs_nonsingle(rm,1,(t),(h),(o),(a),(c))
-#define bus_space_read_multi_2(t, h, o, a, c) \
- __bs_nonsingle(rm,2,(t),(h),(o),(a),(c))
-#define bus_space_read_multi_4(t, h, o, a, c) \
- __bs_nonsingle(rm,4,(t),(h),(o),(a),(c))
-#define bus_space_read_multi_8(t, h, o, a, c) \
- __bs_nonsingle(rm,8,(t),(h),(o),(a),(c))
-
-
-/*
- * Bus read region operations.
- */
-#define bus_space_read_region_1(t, h, o, a, c) \
- __bs_nonsingle(rr,1,(t),(h),(o),(a),(c))
-#define bus_space_read_region_2(t, h, o, a, c) \
- __bs_nonsingle(rr,2,(t),(h),(o),(a),(c))
-#define bus_space_read_region_4(t, h, o, a, c) \
- __bs_nonsingle(rr,4,(t),(h),(o),(a),(c))
-#define bus_space_read_region_8(t, h, o, a, c) \
- __bs_nonsingle(rr,8,(t),(h),(o),(a),(c))
-
-
-/*
- * Bus write (single) operations.
- */
-#define bus_space_write_1(t, h, o, v) __bs_ws(1,(t),(h),(o),(v))
-#define bus_space_write_2(t, h, o, v) __bs_ws(2,(t),(h),(o),(v))
-#define bus_space_write_4(t, h, o, v) __bs_ws(4,(t),(h),(o),(v))
-#define bus_space_write_8(t, h, o, v) __bs_ws(8,(t),(h),(o),(v))
-
-
-/*
- * Bus write multiple operations.
- */
-#define bus_space_write_multi_1(t, h, o, a, c) \
- __bs_nonsingle(wm,1,(t),(h),(o),(a),(c))
-#define bus_space_write_multi_2(t, h, o, a, c) \
- __bs_nonsingle(wm,2,(t),(h),(o),(a),(c))
-#define bus_space_write_multi_4(t, h, o, a, c) \
- __bs_nonsingle(wm,4,(t),(h),(o),(a),(c))
-#define bus_space_write_multi_8(t, h, o, a, c) \
- __bs_nonsingle(wm,8,(t),(h),(o),(a),(c))
-
-
-/*
- * Bus write region operations.
- */
-#define bus_space_write_region_1(t, h, o, a, c) \
- __bs_nonsingle(wr,1,(t),(h),(o),(a),(c))
-#define bus_space_write_region_2(t, h, o, a, c) \
- __bs_nonsingle(wr,2,(t),(h),(o),(a),(c))
-#define bus_space_write_region_4(t, h, o, a, c) \
- __bs_nonsingle(wr,4,(t),(h),(o),(a),(c))
-#define bus_space_write_region_8(t, h, o, a, c) \
- __bs_nonsingle(wr,8,(t),(h),(o),(a),(c))
-
-
-/*
- * Set multiple operations.
- */
-#define bus_space_set_multi_1(t, h, o, v, c) \
- __bs_set(sm,1,(t),(h),(o),(v),(c))
-#define bus_space_set_multi_2(t, h, o, v, c) \
- __bs_set(sm,2,(t),(h),(o),(v),(c))
-#define bus_space_set_multi_4(t, h, o, v, c) \
- __bs_set(sm,4,(t),(h),(o),(v),(c))
-#define bus_space_set_multi_8(t, h, o, v, c) \
- __bs_set(sm,8,(t),(h),(o),(v),(c))
-
-
-/*
- * Set region operations.
- */
-#define bus_space_set_region_1(t, h, o, v, c) \
- __bs_set(sr,1,(t),(h),(o),(v),(c))
-#define bus_space_set_region_2(t, h, o, v, c) \
- __bs_set(sr,2,(t),(h),(o),(v),(c))
-#define bus_space_set_region_4(t, h, o, v, c) \
- __bs_set(sr,4,(t),(h),(o),(v),(c))
-#define bus_space_set_region_8(t, h, o, v, c) \
- __bs_set(sr,8,(t),(h),(o),(v),(c))
-
-
-/*
- * Copy operations.
- */
-#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
- __bs_copy(1, t, h1, o1, h2, o2, c)
-#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
- __bs_copy(2, t, h1, o1, h2, o2, c)
-#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
- __bs_copy(4, t, h1, o1, h2, o2, c)
-#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
- __bs_copy(8, t, h1, o1, h2, o2, c)
-
-/*
- * Macros to provide prototypes for all the functions used in the
- * bus_space structure
- */
-
-#define bs_map_proto(f) \
-int __bs_c(f,_bs_map) (void *t, bus_addr_t addr, \
- bus_size_t size, int cacheable, bus_space_handle_t *bshp);
-
-#define bs_unmap_proto(f) \
-void __bs_c(f,_bs_unmap) (void *t, bus_size_t size);
-
-#define bs_subregion_proto(f) \
-int __bs_c(f,_bs_subregion) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, bus_size_t size, \
- bus_space_handle_t *nbshp);
-
-#define bs_alloc_proto(f) \
-int __bs_c(f,_bs_alloc) (void *t, bus_addr_t rstart, \
- bus_addr_t rend, bus_size_t size, bus_size_t align, \
- bus_size_t boundary, int cacheable, bus_addr_t *addrp, \
- bus_space_handle_t *bshp);
-
-#define bs_free_proto(f) \
-void __bs_c(f,_bs_free) (void *t, bus_space_handle_t bsh, \
- bus_size_t size);
-
-#define bs_mmap_proto(f) \
-int __bs_c(f,_bs_mmap) (struct cdev *, vm_offset_t, vm_paddr_t *, int);
-
-#define bs_barrier_proto(f) \
-void __bs_c(f,_bs_barrier) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, bus_size_t len, int flags);
-
-#define bs_r_1_proto(f) \
-u_int8_t __bs_c(f,_bs_r_1) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset);
-
-#define bs_r_2_proto(f) \
-u_int16_t __bs_c(f,_bs_r_2) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset);
-
-#define bs_r_4_proto(f) \
-u_int32_t __bs_c(f,_bs_r_4) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset);
-
-#define bs_r_8_proto(f) \
-u_int64_t __bs_c(f,_bs_r_8) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset);
-
-#define bs_w_1_proto(f) \
-void __bs_c(f,_bs_w_1) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int8_t value);
-
-#define bs_w_2_proto(f) \
-void __bs_c(f,_bs_w_2) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int16_t value);
-
-#define bs_w_4_proto(f) \
-void __bs_c(f,_bs_w_4) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int32_t value);
-
-#define bs_w_8_proto(f) \
-void __bs_c(f,_bs_w_8) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int64_t value);
-
-#define bs_rm_1_proto(f) \
-void __bs_c(f,_bs_rm_1) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int8_t *addr, bus_size_t count);
-
-#define bs_rm_2_proto(f) \
-void __bs_c(f,_bs_rm_2) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int16_t *addr, bus_size_t count);
-
-#define bs_rm_4_proto(f) \
-void __bs_c(f,_bs_rm_4) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int32_t *addr, bus_size_t count);
-
-#define bs_rm_8_proto(f) \
-void __bs_c(f,_bs_rm_8) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int64_t *addr, bus_size_t count);
-
-#define bs_wm_1_proto(f) \
-void __bs_c(f,_bs_wm_1) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, const u_int8_t *addr, bus_size_t count);
-
-#define bs_wm_2_proto(f) \
-void __bs_c(f,_bs_wm_2) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, const u_int16_t *addr, bus_size_t count);
-
-#define bs_wm_4_proto(f) \
-void __bs_c(f,_bs_wm_4) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, const u_int32_t *addr, bus_size_t count);
-
-#define bs_wm_8_proto(f) \
-void __bs_c(f,_bs_wm_8) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, const u_int64_t *addr, bus_size_t count);
-
-#define bs_rr_1_proto(f) \
-void __bs_c(f, _bs_rr_1) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int8_t *addr, bus_size_t count);
-
-#define bs_rr_2_proto(f) \
-void __bs_c(f, _bs_rr_2) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int16_t *addr, bus_size_t count);
-
-#define bs_rr_4_proto(f) \
-void __bs_c(f, _bs_rr_4) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int32_t *addr, bus_size_t count);
-
-#define bs_rr_8_proto(f) \
-void __bs_c(f, _bs_rr_8) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int64_t *addr, bus_size_t count);
-
-#define bs_wr_1_proto(f) \
-void __bs_c(f, _bs_wr_1) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, const u_int8_t *addr, bus_size_t count);
-
-#define bs_wr_2_proto(f) \
-void __bs_c(f, _bs_wr_2) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, const u_int16_t *addr, bus_size_t count);
-
-#define bs_wr_4_proto(f) \
-void __bs_c(f, _bs_wr_4) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, const u_int32_t *addr, bus_size_t count);
-
-#define bs_wr_8_proto(f) \
-void __bs_c(f, _bs_wr_8) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, const u_int64_t *addr, bus_size_t count);
-
-#define bs_sm_1_proto(f) \
-void __bs_c(f,_bs_sm_1) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int8_t value, bus_size_t count);
-
-#define bs_sm_2_proto(f) \
-void __bs_c(f,_bs_sm_2) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int16_t value, bus_size_t count);
-
-#define bs_sm_4_proto(f) \
-void __bs_c(f,_bs_sm_4) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int32_t value, bus_size_t count);
-
-#define bs_sm_8_proto(f) \
-void __bs_c(f,_bs_sm_8) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int64_t value, bus_size_t count);
-
-#define bs_sr_1_proto(f) \
-void __bs_c(f,_bs_sr_1) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int8_t value, bus_size_t count);
-
-#define bs_sr_2_proto(f) \
-void __bs_c(f,_bs_sr_2) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int16_t value, bus_size_t count);
-
-#define bs_sr_4_proto(f) \
-void __bs_c(f,_bs_sr_4) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int32_t value, bus_size_t count);
-
-#define bs_sr_8_proto(f) \
-void __bs_c(f,_bs_sr_8) (void *t, bus_space_handle_t bsh, \
- bus_size_t offset, u_int64_t value, bus_size_t count);
-
-#define bs_c_1_proto(f) \
-void __bs_c(f,_bs_c_1) (void *t, bus_space_handle_t bsh1, \
- bus_size_t offset1, bus_space_handle_t bsh2, \
- bus_size_t offset2, bus_size_t count);
-
-#define bs_c_2_proto(f) \
-void __bs_c(f,_bs_c_2) (void *t, bus_space_handle_t bsh1, \
- bus_size_t offset1, bus_space_handle_t bsh2, \
- bus_size_t offset2, bus_size_t count);
-
-#define bs_c_4_proto(f) \
-void __bs_c(f,_bs_c_4) (void *t, bus_space_handle_t bsh1, \
- bus_size_t offset1, bus_space_handle_t bsh2, \
- bus_size_t offset2, bus_size_t count);
-
-#define bs_c_8_proto(f) \
-void __bs_c(f,_bs_c_8) (void *t, bus_space_handle_t bsh1, \
- bus_size_t offset1, bus_space_handle_t bsh2, \
- bus_size_t offset2, bus_size_t count);
-
-#define bs_protos(f) \
-bs_map_proto(f); \
-bs_unmap_proto(f); \
-bs_subregion_proto(f); \
-bs_alloc_proto(f); \
-bs_free_proto(f); \
-bs_mmap_proto(f); \
-bs_barrier_proto(f); \
-bs_r_1_proto(f); \
-bs_r_2_proto(f); \
-bs_r_4_proto(f); \
-bs_r_8_proto(f); \
-bs_w_1_proto(f); \
-bs_w_2_proto(f); \
-bs_w_4_proto(f); \
-bs_w_8_proto(f); \
-bs_rm_1_proto(f); \
-bs_rm_2_proto(f); \
-bs_rm_4_proto(f); \
-bs_rm_8_proto(f); \
-bs_wm_1_proto(f); \
-bs_wm_2_proto(f); \
-bs_wm_4_proto(f); \
-bs_wm_8_proto(f); \
-bs_rr_1_proto(f); \
-bs_rr_2_proto(f); \
-bs_rr_4_proto(f); \
-bs_rr_8_proto(f); \
-bs_wr_1_proto(f); \
-bs_wr_2_proto(f); \
-bs_wr_4_proto(f); \
-bs_wr_8_proto(f); \
-bs_sm_1_proto(f); \
-bs_sm_2_proto(f); \
-bs_sm_4_proto(f); \
-bs_sm_8_proto(f); \
-bs_sr_1_proto(f); \
-bs_sr_2_proto(f); \
-bs_sr_4_proto(f); \
-bs_sr_8_proto(f); \
-bs_c_1_proto(f); \
-bs_c_2_proto(f); \
-bs_c_4_proto(f); \
-bs_c_8_proto(f);
-
-#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
-
-#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
-#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
-#define BUS_SPACE_MAXADDR 0xFFFFFFFF
-#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
-#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
-#define BUS_SPACE_MAXSIZE 0xFFFFFFFF
-
-/* XXX: is this right ? */
-#define bus_space_read_stream_1(t, h, o) bus_space_read_1((t), (h), (o))
-#define bus_space_read_stream_2(t, h, o) bus_space_read_2((t), (h), (o))
-#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o))
-
-#define bus_space_read_multi_stream_1(t, h, o, a, c) \
- bus_space_read_multi_1((t), (h), (o), (a), (c))
-#define bus_space_read_multi_stream_2(t, h, o, a, c) \
- bus_space_read_multi_2((t), (h), (o), (a), (c))
-#define bus_space_read_multi_stream_4(t, h, o, a, c) \
- bus_space_read_multi_4((t), (h), (o), (a), (c))
-
-#define bus_space_write_stream_1(t, h, o, v) \
- bus_space_write_1((t), (h), (o), (v))
-#define bus_space_write_stream_2(t, h, o, v) \
- bus_space_write_2((t), (h), (o), (v))
-#define bus_space_write_stream_4(t, h, o, v) \
- bus_space_write_4((t), (h), (o), (v))
-
-#define bus_space_write_multi_stream_1(t, h, o, a, c) \
- bus_space_write_multi_1((t), (h), (o), (a), (c))
-#define bus_space_write_multi_stream_2(t, h, o, a, c) \
- bus_space_write_multi_2((t), (h), (o), (a), (c))
-#define bus_space_write_multi_stream_4(t, h, o, a, c) \
- bus_space_write_multi_4((t), (h), (o), (a), (c))
-
-
-#include <machine/bus_dma.h>
-
-#endif /* _MACHINE_BUS_H_ */
--- sys/arm/include/_limits.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*-
- * Copyright (c) 1988, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)limits.h 8.3 (Berkeley) 1/4/94
- * $FreeBSD: src/sys/arm/include/_limits.h,v 1.8 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE__LIMITS_H_
-#define _MACHINE__LIMITS_H_
-
-/*
- * According to ANSI (section 2.2.4.2), the values below must be usable by
- * #if preprocessing directives. Additionally, the expression must have the
- * same type as would an expression that is an object of the corresponding
- * type converted according to the integral promotions. The subtraction for
- * INT_MIN, etc., is so the value is not unsigned; e.g., 0x80000000 is an
- * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2).
- * These numbers are for the default configuration of gcc. They work for
- * some other compilers as well, but this should not be depended on.
- */
-
-#define __CHAR_BIT 8 /* number of bits in a char */
-
-#define __SCHAR_MAX 0x7f /* max value for a signed char */
-#define __SCHAR_MIN (-0x7f - 1) /* min value for a signed char */
-
-#define __UCHAR_MAX 0xff /* max value for an unsigned char */
-
-#define __USHRT_MAX 0xffff /* max value for an unsigned short */
-#define __SHRT_MAX 0x7fff /* max value for a short */
-#define __SHRT_MIN (-0x7fff - 1) /* min value for a short */
-
-#define __UINT_MAX 0xffffffffU /* max value for an unsigned int */
-#define __INT_MAX 0x7fffffff /* max value for an int */
-#define __INT_MIN (-0x7fffffff - 1) /* min value for an int */
-
-/* Bad hack for gcc configured to give 64-bit longs. */
-#ifdef _LARGE_LONG
-#define __ULONG_MAX 0xffffffffffffffffUL
-#define __LONG_MAX 0x7fffffffffffffffL
-#define __LONG_MIN (-0x7fffffffffffffffL - 1)
-#else
-#define __ULONG_MAX 0xffffffffUL /* max value for an unsigned long */
-#define __LONG_MAX 0x7fffffffL /* max value for a long */
-#define __LONG_MIN (-0x7fffffffL - 1) /* min value for a long */
-#endif
-
- /* max value for an unsigned long long */
-#define __ULLONG_MAX 0xffffffffffffffffULL
-#define __LLONG_MAX 0x7fffffffffffffffLL /* max value for a long long */
-#define __LLONG_MIN (-0x7fffffffffffffffLL - 1) /* min for a long long */
-
-#define __SSIZE_MAX __INT_MAX /* max value for a ssize_t */
-
-#define __SIZE_T_MAX __UINT_MAX /* max value for a size_t */
-
-#define __OFF_MAX __LLONG_MAX /* max value for a off_t */
-#define __OFF_MIN __LLONG_MIN /* min value for a off_t */
-
-/* Quads and long longs are the same size. Ensure they stay in sync. */
-#define __UQUAD_MAX __ULLONG_MAX /* max value for a uquad_t */
-#define __QUAD_MAX __LLONG_MAX /* max value for a quad_t */
-#define __QUAD_MIN __LLONG_MIN /* min value for a quad_t */
-
-#ifdef _LARGE_LONG
-#define __LONG_BIT 64
-#else
-#define __LONG_BIT 32
-#endif
-#define __WORD_BIT 32
-
-#endif /* !_MACHINE__LIMITS_H_ */
--- sys/arm/include/fiq.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* $NetBSD: fiq.h,v 1.1 2001/12/20 01:20:23 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/fiq.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- *
- */
-
-#ifndef _MACHINE_FIQ_H_
-#define _MACHINE_FIQ_H_
-
-#include <sys/queue.h>
-
-struct fiqregs {
- u_int fr_r8; /* FIQ mode r8 */
- u_int fr_r9; /* FIQ mode r9 */
- u_int fr_r10; /* FIQ mode r10 */
- u_int fr_r11; /* FIQ mode r11 */
- u_int fr_r12; /* FIQ mode r12 */
- u_int fr_r13; /* FIQ mode r13 */
-};
-
-struct fiqhandler {
- TAILQ_ENTRY(fiqhandler) fh_list;/* link in the FIQ handler stack */
- void *fh_func; /* FIQ handler routine */
- size_t fh_size; /* size of FIQ handler */
- int fh_flags; /* flags; see below */
- struct fiqregs *fh_regs; /* pointer to regs structure */
-};
-
-#define FH_CANPUSH 0x01 /* can push this handler out of the way */
-
-int fiq_claim(struct fiqhandler *);
-void fiq_release(struct fiqhandler *);
-
-void fiq_getregs(struct fiqregs *);
-void fiq_setregs(struct fiqregs *);
-
-#endif /* _MACHINE_FIQ_H_ */
--- sys/arm/include/stdarg.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*-
- * Copyright (c) 2002 David E. O'Brien. All rights reserved.
- * Copyright (c) 1991, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)stdarg.h 8.1 (Berkeley) 6/10/93
- * $FreeBSD: src/sys/arm/include/stdarg.h,v 1.3 2005/03/02 21:33:22 joerg Exp $
- */
-
-#ifndef _MACHINE_STDARG_H_
-#define _MACHINE_STDARG_H_
-
-#include <sys/cdefs.h>
-#include <sys/_types.h>
-
-#ifndef _VA_LIST_DECLARED
-#define _VA_LIST_DECLARED
-typedef __va_list va_list;
-#endif
-
-#ifdef __GNUCLIKE_BUILTIN_STDARG
-
-#define va_start(ap, last) \
- __builtin_stdarg_start((ap), (last))
-
-#define va_arg(ap, type) \
- __builtin_va_arg((ap), type)
-
-#if __ISO_C_VISIBLE >= 1999
-#define va_copy(dest, src) \
- __builtin_va_copy((dest), (src))
-#endif
-
-#define va_end(ap) \
- __builtin_va_end(ap)
-
-#else /* !__GNUCLIKE_BUILTIN_STDARG */
-
-#define __va_size(type) \
- (((sizeof(type) + sizeof(int) - 1) / sizeof(int)) * sizeof(int))
-
-#ifdef __GNUCLIKE_BUILTIN_NEXT_ARG
-#define va_start(ap, last) \
- ((ap) = (va_list)__builtin_next_arg(last))
-#else /* !__GNUCLIKE_BUILTIN_NEXT_ARG */
-#define va_start(ap, last) \
- ((ap) = (va_list)&(last) + __va_size(last))
-#endif /* __GNUCLIKE_BUILTIN_NEXT_ARG */
-
-#define va_arg(ap, type) \
- (*(type *)((ap) += __va_size(type), (ap) - __va_size(type)))
-
-#define va_end(ap)
-
-#endif /* __GNUCLIKE_BUILTIN_STDARG */
-
-#endif /* !_MACHINE_STDARG_H_ */
--- sys/arm/include/float.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * Copyright (c) 1989 Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)float.h 7.1 (Berkeley) 5/8/90
- * $FreeBSD: src/sys/arm/include/float.h,v 1.5 2005/03/20 00:34:24 cognet Exp $
- */
-
-#ifndef _MACHINE_FLOAT_H_
-#define _MACHINE_FLOAT_H_ 1
-
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-extern int __flt_rounds(void);
-__END_DECLS
-
-#define FLT_RADIX 2 /* b */
-#define FLT_ROUNDS -1
-#define FLT_EVAL_METHOD (-1) /* XXX */
-#define DECIMAL_DIG 17 /* max precision in decimal digits */
-
-#define FLT_MANT_DIG 24 /* p */
-#define FLT_EPSILON 1.19209290E-07F /* b**(1-p) */
-#define FLT_DIG 6 /* floor((p-1)*log10(b))+(b == 10) */
-#define FLT_MIN_EXP (-125) /* emin */
-#define FLT_MIN 1.17549435E-38F /* b**(emin-1) */
-#define FLT_MIN_10_EXP (-37) /* ceil(log10(b**(emin-1))) */
-#define FLT_MAX_EXP 128 /* emax */
-#define FLT_MAX 3.40282347E+38F /* (1-b**(-p))*b**emax */
-#define FLT_MAX_10_EXP 38 /* floor(log10((1-b**(-p))*b**emax)) */
-
-#define DBL_MANT_DIG 53
-#define DBL_EPSILON 2.2204460492503131E-16
-#define DBL_DIG 15
-#define DBL_MIN_EXP (-1021)
-#define DBL_MIN 2.2250738585072014E-308
-#define DBL_MIN_10_EXP (-307)
-#define DBL_MAX_EXP 1024
-#define DBL_MAX 1.7976931348623157E+308
-#define DBL_MAX_10_EXP 308
-
-#define LDBL_MANT_DIG DBL_MANT_DIG
-#define LDBL_EPSILON DBL_EPSILON
-#define LDBL_DIG DBL_DIG
-#define LDBL_MIN_EXP DBL_MIN_EXP
-#define LDBL_MIN DBL_MIN
-#define LDBL_MIN_10_EXP DBL_MIN_10_EXP
-#define LDBL_MAX_EXP DBL_MAX_EXP
-#define LDBL_MAX DBL_MAX
-#define LDBL_MAX_10_EXP DBL_MAX_10_EXP
-#endif /* _MACHINE_FLOAT_H_ */
--- sys/arm/include/endian.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/*-
- * Copyright (c) 2001 David E. O'Brien
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)endian.h 8.1 (Berkeley) 6/10/93
- * $NetBSD: endian.h,v 1.7 1999/08/21 05:53:51 simonb Exp $
- * $FreeBSD: src/sys/arm/include/endian.h,v 1.9 2005/05/24 21:43:16 cognet Exp $
- */
-
-#ifndef _ENDIAN_H_
-#define _ENDIAN_H_
-
-#include <sys/_types.h>
-
-/*
- * Definitions for byte order, according to byte significance from low
- * address to high.
- */
-#define _LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
-#define _BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */
-#define _PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */
-
-#ifdef __ARMEB__
-#define _BYTE_ORDER _BIG_ENDIAN
-#else
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#endif /* __ARMEB__ */
-
-#if __BSD_VISIBLE
-#define LITTLE_ENDIAN _LITTLE_ENDIAN
-#define BIG_ENDIAN _BIG_ENDIAN
-#define PDP_ENDIAN _PDP_ENDIAN
-#define BYTE_ORDER _BYTE_ORDER
-#endif
-
-#ifdef __ARMEB__
-#define _QUAD_HIGHWORD 0
-#define _QUAD_LOWWORD 1
-#define __ntohl(x) ((__uint32_t)(x))
-#define __ntohs(x) ((__uint16_t)(x))
-#define __htonl(x) ((__uint32_t)(x))
-#define __htons(x) ((__uint16_t)(x))
-#else
-#define _QUAD_HIGHWORD 1
-#define _QUAD_LOWWORD 0
-#define __ntohl(x) (__bswap32(x))
-#define __ntohs(x) (__bswap16(x))
-#define __htonl(x) (__bswap32(x))
-#define __htons(x) (__bswap16(x))
-#endif /* __ARMEB__ */
-
-static __inline __uint64_t
-__bswap64(__uint64_t _x)
-{
-
- return ((_x >> 56) | ((_x >> 40) & 0xff00) | ((_x >> 24) & 0xff0000) |
- ((_x >> 8) & 0xff000000) | ((_x << 8) & ((__uint64_t)0xff << 32)) |
- ((_x << 24) & ((__uint64_t)0xff << 40)) |
- ((_x << 40) & ((__uint64_t)0xff << 48)) | ((_x << 56)));
-}
-
-static __inline __uint32_t
-__bswap32_var(__uint32_t v)
-{
- __uint32_t t1;
-
- __asm __volatile("eor %1, %0, %0, ror #16\n"
- "bic %1, %1, #0x00ff0000\n"
- "mov %0, %0, ror #8\n"
- "eor %0, %0, %1, lsr #8\n"
- : "+r" (v), "=r" (t1));
-
- return (v);
- }
-
-static __inline __uint16_t
-__bswap16_var(__uint16_t v)
-{
- __asm __volatile(
- "mov %0, %1, ror #8\n"
- "orr %0, %0, %0, lsr #16\n"
- "bic %0, %0, %0, lsl #16"
- : "=r" (v)
- : "0" (v));
-
- return (v);
-}
-
-#ifdef __OPTIMIZE__
-
-#define __bswap32_constant(x) \
- ((((x) & 0xff000000U) >> 24) | \
- (((x) & 0x00ff0000U) >> 8) | \
- (((x) & 0x0000ff00U) << 8) | \
- (((x) & 0x000000ffU) << 24))
-
-#define __bswap16_constant(x) \
- ((((x) & 0xff00) >> 8) | \
- (((x) & 0x00ff) << 8))
-
-#define __bswap16(x) \
- ((__uint16_t)(__builtin_constant_p(x) ? \
- __bswap16_constant(x) : \
- __bswap16_var(x)))
-
-#define __bswap32(x) \
- ((__uint32_t)(__builtin_constant_p(x) ? \
- __bswap32_constant(x) : \
- __bswap32_var(x)))
-
-#else
-#define __bswap16(x) __bswap16_var(x)
-#define __bswap32(x) __bswap32_var(x)
-
-#endif /* __OPTIMIZE__ */
-#endif /* !_ENDIAN_H_ */
--- sys/arm/include/ieeefp.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/* $NetBSD: ieeefp.h,v 1.1 2001/01/10 19:02:06 bjh21 Exp $ */
-/* $FreeBSD: src/sys/arm/include/ieeefp.h,v 1.2 2005/01/05 21:58:48 imp Exp $ */
-/*-
- * Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995
- * Public domain.
- */
-
-#ifndef _MACHINE_IEEEFP_H_
-#define _MACHINE_IEEEFP_H_
-
-/* FP exception codes */
-#define FP_EXCEPT_INV 0
-#define FP_EXCEPT_DZ 1
-#define FP_EXCEPT_OFL 2
-#define FP_EXCEPT_UFL 3
-#define FP_EXCEPT_IMP 4
-
-/* Exception type (used by fpsetmask() et al.) */
-
-typedef int fp_except;
-
-/* Bit defines for fp_except */
-
-#define FP_X_INV (1 << FP_EXCEPT_INV) /* invalid operation exception */
-#define FP_X_DZ (1 << FP_EXCEPT_DZ) /* divide-by-zero exception */
-#define FP_X_OFL (1 << FP_EXCEPT_OFL) /* overflow exception */
-#define FP_X_UFL (1 << FP_EXCEPT_UFL) /* underflow exception */
-#define FP_X_IMP (1 << FP_EXCEPT_IMP) /* imprecise (loss of precision; "inexact") */
-
-/* Rounding modes */
-
-typedef enum {
- FP_RN=0, /* round to nearest representable number */
- FP_RP=1, /* round toward positive infinity */
- FP_RM=2, /* round toward negative infinity */
- FP_RZ=3 /* round to zero (truncate) */
-} fp_rnd_t;
-
-/*
- * FP precision modes
- */
-typedef enum {
- FP_PS=0, /* 24 bit (single-precision) */
- FP_PRS, /* reserved */
- FP_PD, /* 53 bit (double-precision) */
- FP_PE /* 64 bit (extended-precision) */
-} fp_prec_t;
-
-#define fp_except_t int
-
-#endif /* _MACHINE_IEEEFP_H_ */
--- sys/arm/include/in_cksum.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from tahoe: in_cksum.c 1.2 86/01/05
- * from: @(#)in_cksum.c 1.3 (Berkeley) 1/19/91
- * from: Id: in_cksum.c,v 1.8 1995/12/03 18:35:19 bde Exp
- * $FreeBSD: src/sys/arm/include/in_cksum.h,v 1.2 2005/05/24 21:44:34 cognet Exp $
- */
-
-#ifndef _MACHINE_IN_CKSUM_H_
-#define _MACHINE_IN_CKSUM_H_ 1
-
-#include <sys/cdefs.h>
-
-#ifdef _KERNEL
-u_short in_cksum(struct mbuf *m, int len);
-u_short in_addword(u_short sum, u_short b);
-u_short in_pseudo(u_int sum, u_int b, u_int c);
-u_short in_cksum_skip(struct mbuf *m, int len, int skip);
-u_int do_cksum(const void *, int);
-static __inline u_int
-in_cksum_hdr(const struct ip *ip)
-{
- u_int sum = do_cksum(ip, sizeof(struct ip));
-
- sum = (sum & 0xffff) + (sum >> 16);
- if (sum > 0xffff)
- sum -= 0xffff;
- return (~sum & 0xffff);
-}
-#endif /* _KERNEL */
-#endif /* _MACHINE_IN_CKSUM_H_ */
--- sys/arm/include/reg.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/* $NetBSD: reg.h,v 1.2 2001/02/23 21:23:52 reinoud Exp $ */
-/* $FreeBSD: src/sys/arm/include/reg.h,v 1.2 2004/11/04 19:20:54 cognet Exp $ */
-#ifndef MACHINE_REG_H
-#define MACHINE_REG_H
-
-#include <machine/fp.h>
-
-struct reg {
- unsigned int r[13];
- unsigned int r_sp;
- unsigned int r_lr;
- unsigned int r_pc;
- unsigned int r_cpsr;
-};
-
-struct fpreg {
- unsigned int fpr_fpsr;
- fp_reg_t fpr[8];
-};
-
-struct dbreg {
- unsigned int dr[8]; /* debug registers */
-};
-
-#ifdef _KERNEL
-int fill_regs(struct thread *, struct reg *);
-int set_regs(struct thread *, struct reg *);
-int fill_fpregs(struct thread *, struct fpreg *);
-int set_fpregs(struct thread *, struct fpreg *);
-int fill_dbregs(struct thread *, struct dbreg *);
-int set_dbregs(struct thread *, struct dbreg *);
-#endif
-
-#endif /* !MACHINE_REG_H */
--- sys/arm/include/disassem.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/* $NetBSD: disassem.h,v 1.4 2001/03/04 04:15:58 matt Exp $ */
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Define the interface structure required by the disassembler.
- *
- * $FreeBSD: src/sys/arm/include/disassem.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_DISASSEM_H_
-#define _MACHINE_DISASSEM_H_
-typedef struct {
- u_int (*di_readword)(u_int);
- void (*di_printaddr)(u_int);
- void (*di_printf)(const char *, ...) __printflike(1, 2);
-} disasm_interface_t;
-
-/* Prototypes for callable functions */
-
-vm_offset_t disasm(const disasm_interface_t *, vm_offset_t, int);
-void disassemble(u_int);
-
-#endif /* !_MACHINE_DISASSEM_H_ */
--- sys/arm/include/md_var.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*-
- * Copyright (c) 1995 Bruce D. Evans.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the author nor the names of contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: FreeBSD: src/sys/i386/include/md_var.h,v 1.40 2001/07/12
- * $FreeBSD: src/sys/arm/include/md_var.h,v 1.2 2004/09/23 22:30:05 cognet Exp $
- */
-
-#ifndef _MACHINE_MD_VAR_H_
-#define _MACHINE_MD_VAR_H_
-
-extern char sigcode[];
-extern int szsigcode;
-
-#endif /* !_MACHINE_MD_VAR_H_ */
--- sys/arm/include/armreg.h
+++ /dev/null
@@ -1,299 +0,0 @@
-/* $NetBSD: armreg.h,v 1.28 2003/10/31 16:30:15 scw Exp $ */
-
-/*-
- * Copyright (c) 1998, 2001 Ben Harris
- * Copyright (c) 1994-1996 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/armreg.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef MACHINE_ARMREG_H
-#define MACHINE_ARMREG_H
-#define INSN_SIZE 4
-#define INSN_COND_MASK 0xf0000000 /* Condition mask */
-#define PSR_MODE 0x0000001f /* mode mask */
-#define PSR_USR26_MODE 0x00000000
-#define PSR_FIQ26_MODE 0x00000001
-#define PSR_IRQ26_MODE 0x00000002
-#define PSR_SVC26_MODE 0x00000003
-#define PSR_USR32_MODE 0x00000010
-#define PSR_FIQ32_MODE 0x00000011
-#define PSR_IRQ32_MODE 0x00000012
-#define PSR_SVC32_MODE 0x00000013
-#define PSR_ABT32_MODE 0x00000017
-#define PSR_UND32_MODE 0x0000001b
-#define PSR_SYS32_MODE 0x0000001f
-#define PSR_32_MODE 0x00000010
-#define PSR_FLAGS 0xf0000000 /* flags */
-
-#define PSR_C_bit (1 << 29) /* carry */
-
-/* The high-order byte is always the implementor */
-#define CPU_ID_IMPLEMENTOR_MASK 0xff000000
-#define CPU_ID_ARM_LTD 0x41000000 /* 'A' */
-#define CPU_ID_DEC 0x44000000 /* 'D' */
-#define CPU_ID_INTEL 0x69000000 /* 'i' */
-#define CPU_ID_TI 0x54000000 /* 'T' */
-
-/* How to decide what format the CPUID is in. */
-#define CPU_ID_ISOLD(x) (((x) & 0x0000f000) == 0x00000000)
-#define CPU_ID_IS7(x) (((x) & 0x0000f000) == 0x00007000)
-#define CPU_ID_ISNEW(x) (!CPU_ID_ISOLD(x) && !CPU_ID_IS7(x))
-
-/* On ARM3 and ARM6, this byte holds the foundry ID. */
-#define CPU_ID_FOUNDRY_MASK 0x00ff0000
-#define CPU_ID_FOUNDRY_VLSI 0x00560000
-
-/* On ARM7 it holds the architecture and variant (sub-model) */
-#define CPU_ID_7ARCH_MASK 0x00800000
-#define CPU_ID_7ARCH_V3 0x00000000
-#define CPU_ID_7ARCH_V4T 0x00800000
-#define CPU_ID_7VARIANT_MASK 0x007f0000
-
-/* On more recent ARMs, it does the same, but in a different format */
-#define CPU_ID_ARCH_MASK 0x000f0000
-#define CPU_ID_ARCH_V3 0x00000000
-#define CPU_ID_ARCH_V4 0x00010000
-#define CPU_ID_ARCH_V4T 0x00020000
-#define CPU_ID_ARCH_V5 0x00030000
-#define CPU_ID_ARCH_V5T 0x00040000
-#define CPU_ID_ARCH_V5TE 0x00050000
-#define CPU_ID_VARIANT_MASK 0x00f00000
-
-/* Next three nybbles are part number */
-#define CPU_ID_PARTNO_MASK 0x0000fff0
-
-/* Intel XScale has sub fields in part number */
-#define CPU_ID_XSCALE_COREGEN_MASK 0x0000e000 /* core generation */
-#define CPU_ID_XSCALE_COREREV_MASK 0x00001c00 /* core revision */
-#define CPU_ID_XSCALE_PRODUCT_MASK 0x000003f0 /* product number */
-
-/* And finally, the revision number. */
-#define CPU_ID_REVISION_MASK 0x0000000f
-
-/* Individual CPUs are probably best IDed by everything but the revision. */
-#define CPU_ID_CPU_MASK 0xfffffff0
-
-/* Fake CPU IDs for ARMs without CP15 */
-#define CPU_ID_ARM2 0x41560200
-#define CPU_ID_ARM250 0x41560250
-
-/* Pre-ARM7 CPUs -- [15:12] == 0 */
-#define CPU_ID_ARM3 0x41560300
-#define CPU_ID_ARM600 0x41560600
-#define CPU_ID_ARM610 0x41560610
-#define CPU_ID_ARM620 0x41560620
-
-/* ARM7 CPUs -- [15:12] == 7 */
-#define CPU_ID_ARM700 0x41007000 /* XXX This is a guess. */
-#define CPU_ID_ARM710 0x41007100
-#define CPU_ID_ARM7500 0x41027100 /* XXX This is a guess. */
-#define CPU_ID_ARM710A 0x41047100 /* inc ARM7100 */
-#define CPU_ID_ARM7500FE 0x41077100
-#define CPU_ID_ARM710T 0x41807100
-#define CPU_ID_ARM720T 0x41807200
-#define CPU_ID_ARM740T8K 0x41807400 /* XXX no MMU, 8KB cache */
-#define CPU_ID_ARM740T4K 0x41817400 /* XXX no MMU, 4KB cache */
-
-/* Post-ARM7 CPUs */
-#define CPU_ID_ARM810 0x41018100
-#define CPU_ID_ARM920T 0x41129200
-#define CPU_ID_ARM922T 0x41029220
-#define CPU_ID_ARM940T 0x41029400 /* XXX no MMU */
-#define CPU_ID_ARM946ES 0x41049460 /* XXX no MMU */
-#define CPU_ID_ARM966ES 0x41049660 /* XXX no MMU */
-#define CPU_ID_ARM966ESR1 0x41059660 /* XXX no MMU */
-#define CPU_ID_ARM1020E 0x4115a200 /* (AKA arm10 rev 1) */
-#define CPU_ID_ARM1022ES 0x4105a220
-#define CPU_ID_SA110 0x4401a100
-#define CPU_ID_SA1100 0x4401a110
-#define CPU_ID_TI925T 0x54029250
-#define CPU_ID_SA1110 0x6901b110
-#define CPU_ID_IXP1200 0x6901c120
-#define CPU_ID_80200 0x69052000
-#define CPU_ID_PXA250 0x69052100 /* sans core revision */
-#define CPU_ID_PXA210 0x69052120
-#define CPU_ID_PXA250A 0x69052100 /* 1st version Core */
-#define CPU_ID_PXA210A 0x69052120 /* 1st version Core */
-#define CPU_ID_PXA250B 0x69052900 /* 3rd version Core */
-#define CPU_ID_PXA210B 0x69052920 /* 3rd version Core */
-#define CPU_ID_PXA250C 0x69052d00 /* 4th version Core */
-#define CPU_ID_PXA210C 0x69052d20 /* 4th version Core */
-#define CPU_ID_80321_400 0x69052420
-#define CPU_ID_80321_600 0x69052430
-#define CPU_ID_80321_400_B0 0x69052c20
-#define CPU_ID_80321_600_B0 0x69052c30
-#define CPU_ID_IXP425_533 0x690541c0
-#define CPU_ID_IXP425_400 0x690541d0
-#define CPU_ID_IXP425_266 0x690541f0
-
-/* ARM3-specific coprocessor 15 registers */
-#define ARM3_CP15_FLUSH 1
-#define ARM3_CP15_CONTROL 2
-#define ARM3_CP15_CACHEABLE 3
-#define ARM3_CP15_UPDATEABLE 4
-#define ARM3_CP15_DISRUPTIVE 5
-
-/* ARM3 Control register bits */
-#define ARM3_CTL_CACHE_ON 0x00000001
-#define ARM3_CTL_SHARED 0x00000002
-#define ARM3_CTL_MONITOR 0x00000004
-
-/*
- * Post-ARM3 CP15 registers:
- *
- * 1 Control register
- *
- * 2 Translation Table Base
- *
- * 3 Domain Access Control
- *
- * 4 Reserved
- *
- * 5 Fault Status
- *
- * 6 Fault Address
- *
- * 7 Cache/write-buffer Control
- *
- * 8 TLB Control
- *
- * 9 Cache Lockdown
- *
- * 10 TLB Lockdown
- *
- * 11 Reserved
- *
- * 12 Reserved
- *
- * 13 Process ID (for FCSE)
- *
- * 14 Reserved
- *
- * 15 Implementation Dependent
- */
-
-/* Some of the definitions below need cleaning up for V3/V4 architectures */
-
-/* CPU control register (CP15 register 1) */
-#define CPU_CONTROL_MMU_ENABLE 0x00000001 /* M: MMU/Protection unit enable */
-#define CPU_CONTROL_AFLT_ENABLE 0x00000002 /* A: Alignment fault enable */
-#define CPU_CONTROL_DC_ENABLE 0x00000004 /* C: IDC/DC enable */
-#define CPU_CONTROL_WBUF_ENABLE 0x00000008 /* W: Write buffer enable */
-#define CPU_CONTROL_32BP_ENABLE 0x00000010 /* P: 32-bit exception handlers */
-#define CPU_CONTROL_32BD_ENABLE 0x00000020 /* D: 32-bit addressing */
-#define CPU_CONTROL_LABT_ENABLE 0x00000040 /* L: Late abort enable */
-#define CPU_CONTROL_BEND_ENABLE 0x00000080 /* B: Big-endian mode */
-#define CPU_CONTROL_SYST_ENABLE 0x00000100 /* S: System protection bit */
-#define CPU_CONTROL_ROM_ENABLE 0x00000200 /* R: ROM protection bit */
-#define CPU_CONTROL_CPCLK 0x00000400 /* F: Implementation defined */
-#define CPU_CONTROL_BPRD_ENABLE 0x00000800 /* Z: Branch prediction enable */
-#define CPU_CONTROL_IC_ENABLE 0x00001000 /* I: IC enable */
-#define CPU_CONTROL_VECRELOC 0x00002000 /* V: Vector relocation */
-#define CPU_CONTROL_ROUNDROBIN 0x00004000 /* RR: Predictable replacement */
-#define CPU_CONTROL_V4COMPAT 0x00008000 /* L4: ARMv4 compat LDR R15 etc */
-
-#define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE
-
-/* XScale Auxillary Control Register (CP15 register 1, opcode2 1) */
-#define XSCALE_AUXCTL_K 0x00000001 /* dis. write buffer coalescing */
-#define XSCALE_AUXCTL_P 0x00000002 /* ECC protect page table access */
-#define XSCALE_AUXCTL_MD_WB_RA 0x00000000 /* mini-D$ wb, read-allocate */
-#define XSCALE_AUXCTL_MD_WB_RWA 0x00000010 /* mini-D$ wb, read/write-allocate */
-#define XSCALE_AUXCTL_MD_WT 0x00000020 /* mini-D$ wt, read-allocate */
-#define XSCALE_AUXCTL_MD_MASK 0x00000030
-
-/* Cache type register definitions */
-#define CPU_CT_ISIZE(x) ((x) & 0xfff) /* I$ info */
-#define CPU_CT_DSIZE(x) (((x) >> 12) & 0xfff) /* D$ info */
-#define CPU_CT_S (1U << 24) /* split cache */
-#define CPU_CT_CTYPE(x) (((x) >> 25) & 0xf) /* cache type */
-
-#define CPU_CT_CTYPE_WT 0 /* write-through */
-#define CPU_CT_CTYPE_WB1 1 /* write-back, clean w/ read */
-#define CPU_CT_CTYPE_WB2 2 /* w/b, clean w/ cp15,7 */
-#define CPU_CT_CTYPE_WB6 6 /* w/b, cp15,7, lockdown fmt A */
-#define CPU_CT_CTYPE_WB7 7 /* w/b, cp15,7, lockdown fmt B */
-
-#define CPU_CT_xSIZE_LEN(x) ((x) & 0x3) /* line size */
-#define CPU_CT_xSIZE_M (1U << 2) /* multiplier */
-#define CPU_CT_xSIZE_ASSOC(x) (((x) >> 3) & 0x7) /* associativity */
-#define CPU_CT_xSIZE_SIZE(x) (((x) >> 6) & 0x7) /* size */
-
-/* Fault status register definitions */
-
-#define FAULT_TYPE_MASK 0x0f
-#define FAULT_USER 0x10
-
-#define FAULT_WRTBUF_0 0x00 /* Vector Exception */
-#define FAULT_WRTBUF_1 0x02 /* Terminal Exception */
-#define FAULT_BUSERR_0 0x04 /* External Abort on Linefetch -- Section */
-#define FAULT_BUSERR_1 0x06 /* External Abort on Linefetch -- Page */
-#define FAULT_BUSERR_2 0x08 /* External Abort on Non-linefetch -- Section */
-#define FAULT_BUSERR_3 0x0a /* External Abort on Non-linefetch -- Page */
-#define FAULT_BUSTRNL1 0x0c /* External abort on Translation -- Level 1 */
-#define FAULT_BUSTRNL2 0x0e /* External abort on Translation -- Level 2 */
-#define FAULT_ALIGN_0 0x01 /* Alignment */
-#define FAULT_ALIGN_1 0x03 /* Alignment */
-#define FAULT_TRANS_S 0x05 /* Translation -- Section */
-#define FAULT_TRANS_P 0x07 /* Translation -- Page */
-#define FAULT_DOMAIN_S 0x09 /* Domain -- Section */
-#define FAULT_DOMAIN_P 0x0b /* Domain -- Page */
-#define FAULT_PERM_S 0x0d /* Permission -- Section */
-#define FAULT_PERM_P 0x0f /* Permission -- Page */
-
-#define FAULT_IMPRECISE 0x400 /* Imprecise exception (XSCALE) */
-
-/*
- * Address of the vector page, low and high versions.
- */
-#define ARM_VECTORS_LOW 0x00000000U
-#define ARM_VECTORS_HIGH 0xffff0000U
-
-/*
- * ARM Instructions
- *
- * 3 3 2 2 2
- * 1 0 9 8 7 0
- * +-------+-------------------------------------------------------+
- * | cond | instruction dependant |
- * |c c c c| |
- * +-------+-------------------------------------------------------+
- */
-
-#define INSN_SIZE 4 /* Always 4 bytes */
-#define INSN_COND_MASK 0xf0000000 /* Condition mask */
-#define INSN_COND_AL 0xe0000000 /* Always condition */
-
-#endif /* !MACHINE_ARMREG_H */
--- sys/arm/include/_inttypes.h
+++ /dev/null
@@ -1,220 +0,0 @@
-/*-
- * Copyright (c) 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Klaus Klein.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * From: $NetBSD: int_fmtio.h,v 1.2 2001/04/26 16:25:21 kleink Exp $
- * $FreeBSD: src/sys/arm/include/_inttypes.h,v 1.1 2004/05/14 11:46:44 cognet Exp $
- */
-
-#ifndef _MACHINE_INTTYPES_H_
-#define _MACHINE_INTTYPES_H_
-
-/*
- * Macros for format specifiers.
- */
-
-/* fprintf(3) macros for signed integers. */
-
-#define PRId8 "d" /* int8_t */
-#define PRId16 "d" /* int16_t */
-#define PRId32 "d" /* int32_t */
-#define PRId64 "lld" /* int64_t */
-#define PRIdLEAST8 "d" /* int_least8_t */
-#define PRIdLEAST16 "d" /* int_least16_t */
-#define PRIdLEAST32 "d" /* int_least32_t */
-#define PRIdLEAST64 "lld" /* int_least64_t */
-#define PRIdFAST8 "d" /* int_fast8_t */
-#define PRIdFAST16 "d" /* int_fast16_t */
-#define PRIdFAST32 "d" /* int_fast32_t */
-#define PRIdFAST64 "lld" /* int_fast64_t */
-#define PRIdMAX "jd" /* intmax_t */
-#define PRIdPTR "d" /* intptr_t */
-
-#define PRIi8 "i" /* int8_t */
-#define PRIi16 "i" /* int16_t */
-#define PRIi32 "i" /* int32_t */
-#define PRIi64 "lli" /* int64_t */
-#define PRIiLEAST8 "i" /* int_least8_t */
-#define PRIiLEAST16 "i" /* int_least16_t */
-#define PRIiLEAST32 "i" /* int_least32_t */
-#define PRIiLEAST64 "lli" /* int_least64_t */
-#define PRIiFAST8 "i" /* int_fast8_t */
-#define PRIiFAST16 "i" /* int_fast16_t */
-#define PRIiFAST32 "i" /* int_fast32_t */
-#define PRIiFAST64 "lli" /* int_fast64_t */
-#define PRIiMAX "ji" /* intmax_t */
-#define PRIiPTR "i" /* intptr_t */
-
-/* fprintf(3) macros for unsigned integers. */
-
-#define PRIo8 "o" /* uint8_t */
-#define PRIo16 "o" /* uint16_t */
-#define PRIo32 "o" /* uint32_t */
-#define PRIo64 "llo" /* uint64_t */
-#define PRIoLEAST8 "o" /* uint_least8_t */
-#define PRIoLEAST16 "o" /* uint_least16_t */
-#define PRIoLEAST32 "o" /* uint_least32_t */
-#define PRIoLEAST64 "llo" /* uint_least64_t */
-#define PRIoFAST8 "o" /* uint_fast8_t */
-#define PRIoFAST16 "o" /* uint_fast16_t */
-#define PRIoFAST32 "o" /* uint_fast32_t */
-#define PRIoFAST64 "llo" /* uint_fast64_t */
-#define PRIoMAX "jo" /* uintmax_t */
-#define PRIoPTR "o" /* uintptr_t */
-
-#define PRIu8 "u" /* uint8_t */
-#define PRIu16 "u" /* uint16_t */
-#define PRIu32 "u" /* uint32_t */
-#define PRIu64 "llu" /* uint64_t */
-#define PRIuLEAST8 "u" /* uint_least8_t */
-#define PRIuLEAST16 "u" /* uint_least16_t */
-#define PRIuLEAST32 "u" /* uint_least32_t */
-#define PRIuLEAST64 "llu" /* uint_least64_t */
-#define PRIuFAST8 "u" /* uint_fast8_t */
-#define PRIuFAST16 "u" /* uint_fast16_t */
-#define PRIuFAST32 "u" /* uint_fast32_t */
-#define PRIuFAST64 "llu" /* uint_fast64_t */
-#define PRIuMAX "ju" /* uintmax_t */
-#define PRIuPTR "u" /* uintptr_t */
-
-#define PRIx8 "x" /* uint8_t */
-#define PRIx16 "x" /* uint16_t */
-#define PRIx32 "x" /* uint32_t */
-#define PRIx64 "llx" /* uint64_t */
-#define PRIxLEAST8 "x" /* uint_least8_t */
-#define PRIxLEAST16 "x" /* uint_least16_t */
-#define PRIxLEAST32 "x" /* uint_least32_t */
-#define PRIxLEAST64 "llx" /* uint_least64_t */
-#define PRIxFAST8 "x" /* uint_fast8_t */
-#define PRIxFAST16 "x" /* uint_fast16_t */
-#define PRIxFAST32 "x" /* uint_fast32_t */
-#define PRIxFAST64 "llx" /* uint_fast64_t */
-#define PRIxMAX "jx" /* uintmax_t */
-#define PRIxPTR "x" /* uintptr_t */
-
-#define PRIX8 "X" /* uint8_t */
-#define PRIX16 "X" /* uint16_t */
-#define PRIX32 "X" /* uint32_t */
-#define PRIX64 "llX" /* uint64_t */
-#define PRIXLEAST8 "X" /* uint_least8_t */
-#define PRIXLEAST16 "X" /* uint_least16_t */
-#define PRIXLEAST32 "X" /* uint_least32_t */
-#define PRIXLEAST64 "llX" /* uint_least64_t */
-#define PRIXFAST8 "X" /* uint_fast8_t */
-#define PRIXFAST16 "X" /* uint_fast16_t */
-#define PRIXFAST32 "X" /* uint_fast32_t */
-#define PRIXFAST64 "llX" /* uint_fast64_t */
-#define PRIXMAX "jX" /* uintmax_t */
-#define PRIXPTR "X" /* uintptr_t */
-
-/* fscanf(3) macros for signed integers. */
-
-#define SCNd8 "hhd" /* int8_t */
-#define SCNd16 "hd" /* int16_t */
-#define SCNd32 "d" /* int32_t */
-#define SCNd64 "lld" /* int64_t */
-#define SCNdLEAST8 "hhd" /* int_least8_t */
-#define SCNdLEAST16 "hd" /* int_least16_t */
-#define SCNdLEAST32 "d" /* int_least32_t */
-#define SCNdLEAST64 "lld" /* int_least64_t */
-#define SCNdFAST8 "d" /* int_fast8_t */
-#define SCNdFAST16 "d" /* int_fast16_t */
-#define SCNdFAST32 "d" /* int_fast32_t */
-#define SCNdFAST64 "lld" /* int_fast64_t */
-#define SCNdMAX "jd" /* intmax_t */
-#define SCNdPTR "d" /* intptr_t */
-
-#define SCNi8 "hhi" /* int8_t */
-#define SCNi16 "hi" /* int16_t */
-#define SCNi32 "i" /* int32_t */
-#define SCNi64 "lli" /* int64_t */
-#define SCNiLEAST8 "hhi" /* int_least8_t */
-#define SCNiLEAST16 "hi" /* int_least16_t */
-#define SCNiLEAST32 "i" /* int_least32_t */
-#define SCNiLEAST64 "lli" /* int_least64_t */
-#define SCNiFAST8 "i" /* int_fast8_t */
-#define SCNiFAST16 "i" /* int_fast16_t */
-#define SCNiFAST32 "i" /* int_fast32_t */
-#define SCNiFAST64 "lli" /* int_fast64_t */
-#define SCNiMAX "ji" /* intmax_t */
-#define SCNiPTR "i" /* intptr_t */
-
-/* fscanf(3) macros for unsigned integers. */
-
-#define SCNo8 "hho" /* uint8_t */
-#define SCNo16 "ho" /* uint16_t */
-#define SCNo32 "o" /* uint32_t */
-#define SCNo64 "llo" /* uint64_t */
-#define SCNoLEAST8 "hho" /* uint_least8_t */
-#define SCNoLEAST16 "ho" /* uint_least16_t */
-#define SCNoLEAST32 "o" /* uint_least32_t */
-#define SCNoLEAST64 "llo" /* uint_least64_t */
-#define SCNoFAST8 "o" /* uint_fast8_t */
-#define SCNoFAST16 "o" /* uint_fast16_t */
-#define SCNoFAST32 "o" /* uint_fast32_t */
-#define SCNoFAST64 "llo" /* uint_fast64_t */
-#define SCNoMAX "jo" /* uintmax_t */
-#define SCNoPTR "o" /* uintptr_t */
-
-#define SCNu8 "hhu" /* uint8_t */
-#define SCNu16 "hu" /* uint16_t */
-#define SCNu32 "u" /* uint32_t */
-#define SCNu64 "llu" /* uint64_t */
-#define SCNuLEAST8 "hhu" /* uint_least8_t */
-#define SCNuLEAST16 "hu" /* uint_least16_t */
-#define SCNuLEAST32 "u" /* uint_least32_t */
-#define SCNuLEAST64 "llu" /* uint_least64_t */
-#define SCNuFAST8 "u" /* uint_fast8_t */
-#define SCNuFAST16 "u" /* uint_fast16_t */
-#define SCNuFAST32 "u" /* uint_fast32_t */
-#define SCNuFAST64 "llu" /* uint_fast64_t */
-#define SCNuMAX "ju" /* uintmax_t */
-#define SCNuPTR "u" /* uintptr_t */
-
-#define SCNx8 "hhx" /* uint8_t */
-#define SCNx16 "hx" /* uint16_t */
-#define SCNx32 "x" /* uint32_t */
-#define SCNx64 "llx" /* uint64_t */
-#define SCNxLEAST8 "hhx" /* uint_least8_t */
-#define SCNxLEAST16 "hx" /* uint_least16_t */
-#define SCNxLEAST32 "x" /* uint_least32_t */
-#define SCNxLEAST64 "llx" /* uint_least64_t */
-#define SCNxFAST8 "x" /* uint_fast8_t */
-#define SCNxFAST16 "x" /* uint_fast16_t */
-#define SCNxFAST32 "x" /* uint_fast32_t */
-#define SCNxFAST64 "llx" /* uint_fast64_t */
-#define SCNxMAX "jx" /* uintmax_t */
-#define SCNxPTR "x" /* uintptr_t */
-
-#endif /* !_MACHINE_INTTYPES_H_ */
--- sys/arm/include/kdb.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/kdb.h,v 1.3 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_KDB_H_
-#define _MACHINE_KDB_H_
-
-#include <machine/frame.h>
-#include <machine/psl.h>
-#include <machine/cpufunc.h>
-
-static __inline void
-kdb_cpu_clear_singlestep(void)
-{
-}
-
-static __inline void
-kdb_cpu_set_singlestep(void)
-{
-}
-
-static __inline void
-kdb_cpu_trap(int type, int code)
-{
- cpu_idcache_wbinv_all();
-}
-
-#endif /* _MACHINE_KDB_H_ */
--- sys/arm/include/ieee.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/* $NetBSD: ieee754.h,v 1.4 2003/10/27 02:30:26 simonb Exp $ */
-
-/*-
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This software was developed by the Computer Systems Engineering group
- * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
- * contributed to Berkeley.
- *
- * All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratory.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)ieee.h 8.1 (Berkeley) 6/11/93
- *
- * $FreeBSD: src/sys/arm/include/ieee.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- *
- */
-
-/*
- * NOTICE: This is not a standalone file. To use it, #include it in
- * your port's ieee.h header.
- */
-
-#include <machine/endian.h>
-
-/*
- * <sys/ieee754.h> defines the layout of IEEE 754 floating point types.
- * Only single-precision and double-precision types are defined here;
- * extended types, if available, are defined in the machine-dependent
- * header.
- */
-
-/*
- * Define the number of bits in each fraction and exponent.
- *
- * k k+1
- * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented
- *
- * (-exp_bias+1)
- * as fractions that look like 0.fffff x 2 . This means that
- *
- * -126
- * the number 0.10000 x 2 , for instance, is the same as the normalized
- *
- * -127 -128
- * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero
- *
- * -129
- * in the fraction; to represent 2 , we need two, and so on. This
- *
- * (-exp_bias-fracbits+1)
- * implies that the smallest denormalized number is 2
- *
- * for whichever format we are talking about: for single precision, for
- *
- * -126 -149
- * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and
- *
- * -149 == -127 - 23 + 1.
- */
-#define SNG_EXPBITS 8
-#define SNG_FRACBITS 23
-
-#define DBL_EXPBITS 11
-#define DBL_FRACBITS 52
-
-struct ieee_single {
-#if _BYTE_ORDER == _BIG_ENDIAN
- u_int sng_sign:1;
- u_int sng_exp:8;
- u_int sng_frac:23;
-#else
- u_int sng_frac:23;
- u_int sng_exp:8;
- u_int sng_sign:1;
-#endif
-};
-
-struct ieee_double {
-#if _BYTE_ORDER == _BIG_ENDIAN
- u_int dbl_sign:1;
- u_int dbl_exp:11;
- u_int dbl_frach:20;
- u_int dbl_fracl;
-#else
- u_int dbl_fracl;
- u_int dbl_frach:20;
- u_int dbl_exp:11;
- u_int dbl_sign:1;
-#endif
-};
-
-/*
- * Floats whose exponent is in [1..INFNAN) (of whatever type) are
- * `normal'. Floats whose exponent is INFNAN are either Inf or NaN.
- * Floats whose exponent is zero are either zero (iff all fraction
- * bits are zero) or subnormal values.
- *
- * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
- * high fraction; if the bit is set, it is a `quiet NaN'.
- */
-#define SNG_EXP_INFNAN 255
-#define DBL_EXP_INFNAN 2047
-
-#if 0
-#define SNG_QUIETNAN (1 << 22)
-#define DBL_QUIETNAN (1 << 19)
-#endif
-
-/*
- * Exponent biases.
- */
-#define SNG_EXP_BIAS 127
-#define DBL_EXP_BIAS 1023
-
-/*
- * Convenience data structures.
- */
-union ieee_single_u {
- float sngu_f;
- struct ieee_single sngu_sng;
-};
-
-union ieee_double_u {
- double dblu_d;
- struct ieee_double dblu_dbl;
-};
--- sys/arm/include/pte.h
+++ /dev/null
@@ -1,301 +0,0 @@
-/* $NetBSD: pte.h,v 1.1 2001/11/23 17:39:04 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1994 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the RiscBSD team.
- * 4. The name "RiscBSD" nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY RISCBSD ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL RISCBSD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/pte.h,v 1.3 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_PTE_H_
-#define _MACHINE_PTE_H_
-
-#define PDSHIFT 20 /* LOG2(NBPDR) */
-#define NBPD (1 << PDSHIFT) /* bytes/page dir */
-#define NPTEPD (NBPD / PAGE_SIZE)
-
-#ifndef LOCORE
-typedef uint32_t pd_entry_t; /* page directory entry */
-typedef uint32_t pt_entry_t; /* page table entry */
-#endif
-
-#define PD_MASK 0xfff00000 /* page directory address bits */
-#define PT_MASK 0x000ff000 /* page table address bits */
-
-#define PG_FRAME 0xfffff000
-
-/* The PT_SIZE definition is misleading... A page table is only 0x400
- * bytes long. But since VM mapping can only be done to 0x1000 a single
- * 1KB blocks cannot be steered to a va by itself. Therefore the
- * pages tables are allocated in blocks of 4. i.e. if a 1 KB block
- * was allocated for a PT then the other 3KB would also get mapped
- * whenever the 1KB was mapped.
- */
-
-#define PT_RSIZE 0x0400 /* Real page table size */
-#define PT_SIZE 0x1000
-#define PD_SIZE 0x4000
-
-/* Page table types and masks */
-#define L1_PAGE 0x01 /* L1 page table mapping */
-#define L1_SECTION 0x02 /* L1 section mapping */
-#define L1_FPAGE 0x03 /* L1 fine page mapping */
-#define L1_MASK 0x03 /* Mask for L1 entry type */
-#define L2_LPAGE 0x01 /* L2 large page (64KB) */
-#define L2_SPAGE 0x02 /* L2 small page (4KB) */
-#define L2_MASK 0x03 /* Mask for L2 entry type */
-#define L2_INVAL 0x00 /* L2 invalid type */
-
-/* PTE construction macros */
-#define L2_LPTE(p, a, f) ((p) | PT_AP(a) | L2_LPAGE | (f))
-#define L2_SPTE(p, a, f) ((p) | PT_AP(a) | L2_SPAGE | (f))
-#define L2_PTE(p, a) L2_SPTE((p), (a), PT_CACHEABLE)
-#define L2_PTE_NC(p, a) L2_SPTE((p), (a), PT_B)
-#define L2_PTE_NC_NB(p, a) L2_SPTE((p), (a), 0)
-#define L1_SECPTE(p, a, f) ((p) | ((a) << AP_SECTION_SHIFT) | (f) \
- | L1_SECTION | PT_U)
-
-#define L1_PTE(p) ((p) | 0x00 | L1_PAGE | PT_U)
-#define L1_SEC(p, c) L1_SECPTE((p), AP_KRW, (c))
-
-#define L1_SEC_SIZE (1 << PDSHIFT)
-#define L2_LPAGE_SIZE (NBPG * 16)
-
-/* Domain types */
-#define DOMAIN_FAULT 0x00
-#define DOMAIN_CLIENT 0x01
-#define DOMAIN_RESERVED 0x02
-#define DOMAIN_MANAGER 0x03
-
-/* L1 and L2 address masks */
-#define L1_ADDR_MASK 0xfffffc00
-#define L2_ADDR_MASK 0xfffff000
-
-/*
- * The ARM MMU architecture was introduced with ARM v3 (previous ARM
- * architecture versions used an optional off-CPU memory controller
- * to perform address translation).
- *
- * The ARM MMU consists of a TLB and translation table walking logic.
- * There is typically one TLB per memory interface (or, put another
- * way, one TLB per software-visible cache).
- *
- * The ARM MMU is capable of mapping memory in the following chunks:
- *
- * 1M Sections (L1 table)
- *
- * 64K Large Pages (L2 table)
- *
- * 4K Small Pages (L2 table)
- *
- * 1K Tiny Pages (L2 table)
- *
- * There are two types of L2 tables: Coarse Tables and Fine Tables.
- * Coarse Tables can map Large and Small Pages. Fine Tables can
- * map Tiny Pages.
- *
- * Coarse Tables can define 4 Subpages within Large and Small pages.
- * Subpages define different permissions for each Subpage within
- * a Page.
- *
- * Coarse Tables are 1K in length. Fine tables are 4K in length.
- *
- * The Translation Table Base register holds the pointer to the
- * L1 Table. The L1 Table is a 16K contiguous chunk of memory
- * aligned to a 16K boundary. Each entry in the L1 Table maps
- * 1M of virtual address space, either via a Section mapping or
- * via an L2 Table.
- *
- * In addition, the Fast Context Switching Extension (FCSE) is available
- * on some ARM v4 and ARM v5 processors. FCSE is a way of eliminating
- * TLB/cache flushes on context switch by use of a smaller address space
- * and a "process ID" that modifies the virtual address before being
- * presented to the translation logic.
- */
-
-#define L1_S_SIZE 0x00100000 /* 1M */
-#define L1_S_OFFSET (L1_S_SIZE - 1)
-#define L1_S_FRAME (~L1_S_OFFSET)
-#define L1_S_SHIFT 20
-
-#define L2_L_SIZE 0x00010000 /* 64K */
-#define L2_L_OFFSET (L2_L_SIZE - 1)
-#define L2_L_FRAME (~L2_L_OFFSET)
-#define L2_L_SHIFT 16
-
-#define L2_S_SIZE 0x00001000 /* 4K */
-#define L2_S_OFFSET (L2_S_SIZE - 1)
-#define L2_S_FRAME (~L2_S_OFFSET)
-#define L2_S_SHIFT 12
-
-#define L2_T_SIZE 0x00000400 /* 1K */
-#define L2_T_OFFSET (L2_T_SIZE - 1)
-#define L2_T_FRAME (~L2_T_OFFSET)
-#define L2_T_SHIFT 10
-
-/*
- * The NetBSD VM implementation only works on whole pages (4K),
- * whereas the ARM MMU's Coarse tables are sized in terms of 1K
- * (16K L1 table, 1K L2 table).
- *
- * So, we allocate L2 tables 4 at a time, thus yielding a 4K L2
- * table.
- */
-#define L1_ADDR_BITS 0xfff00000 /* L1 PTE address bits */
-#define L2_ADDR_BITS 0x000ff000 /* L2 PTE address bits */
-
-#define L1_TABLE_SIZE 0x4000 /* 16K */
-#define L2_TABLE_SIZE 0x1000 /* 4K */
-/*
- * The new pmap deals with the 1KB coarse L2 tables by
- * allocating them from a pool. Until every port has been converted,
- * keep the old L2_TABLE_SIZE define lying around. Converted ports
- * should use L2_TABLE_SIZE_REAL until then.
- */
-#define L2_TABLE_SIZE_REAL 0x400 /* 1K */
-
-/*
- * ARM L1 Descriptors
- */
-
-#define L1_TYPE_INV 0x00 /* Invalid (fault) */
-#define L1_TYPE_C 0x01 /* Coarse L2 */
-#define L1_TYPE_S 0x02 /* Section */
-#define L1_TYPE_F 0x03 /* Fine L2 */
-#define L1_TYPE_MASK 0x03 /* mask of type bits */
-
-/* L1 Section Descriptor */
-#define L1_S_B 0x00000004 /* bufferable Section */
-#define L1_S_C 0x00000008 /* cacheable Section */
-#define L1_S_IMP 0x00000010 /* implementation defined */
-#define L1_S_DOM(x) ((x) << 5) /* domain */
-#define L1_S_DOM_MASK L1_S_DOM(0xf)
-#define L1_S_AP(x) ((x) << 10) /* access permissions */
-#define L1_S_ADDR_MASK 0xfff00000 /* phys address of section */
-
-#define L1_S_XSCALE_P 0x00000200 /* ECC enable for this section */
-#define L1_S_XSCALE_TEX(x) ((x) << 12) /* Type Extension */
-
-/* L1 Coarse Descriptor */
-#define L1_C_IMP0 0x00000004 /* implementation defined */
-#define L1_C_IMP1 0x00000008 /* implementation defined */
-#define L1_C_IMP2 0x00000010 /* implementation defined */
-#define L1_C_DOM(x) ((x) << 5) /* domain */
-#define L1_C_DOM_MASK L1_C_DOM(0xf)
-#define L1_C_ADDR_MASK 0xfffffc00 /* phys address of L2 Table */
-
-#define L1_C_XSCALE_P 0x00000200 /* ECC enable for this section */
-
-/* L1 Fine Descriptor */
-#define L1_F_IMP0 0x00000004 /* implementation defined */
-#define L1_F_IMP1 0x00000008 /* implementation defined */
-#define L1_F_IMP2 0x00000010 /* implementation defined */
-#define L1_F_DOM(x) ((x) << 5) /* domain */
-#define L1_F_DOM_MASK L1_F_DOM(0xf)
-#define L1_F_ADDR_MASK 0xfffff000 /* phys address of L2 Table */
-
-#define L1_F_XSCALE_P 0x00000200 /* ECC enable for this section */
-
-/*
- * ARM L2 Descriptors
- */
-
-#define L2_TYPE_INV 0x00 /* Invalid (fault) */
-#define L2_TYPE_L 0x01 /* Large Page */
-#define L2_TYPE_S 0x02 /* Small Page */
-#define L2_TYPE_T 0x03 /* Tiny Page */
-#define L2_TYPE_MASK 0x03 /* mask of type bits */
-
- /*
- * This L2 Descriptor type is available on XScale processors
- * when using a Coarse L1 Descriptor. The Extended Small
- * Descriptor has the same format as the XScale Tiny Descriptor,
- * but describes a 4K page, rather than a 1K page.
- */
-#define L2_TYPE_XSCALE_XS 0x03 /* XScale Extended Small Page */
-
-#define L2_B 0x00000004 /* Bufferable page */
-#define L2_C 0x00000008 /* Cacheable page */
-#define L2_AP0(x) ((x) << 4) /* access permissions (sp 0) */
-#define L2_AP1(x) ((x) << 6) /* access permissions (sp 1) */
-#define L2_AP2(x) ((x) << 8) /* access permissions (sp 2) */
-#define L2_AP3(x) ((x) << 10) /* access permissions (sp 3) */
-#define L2_AP(x) (L2_AP0(x) | L2_AP1(x) | L2_AP2(x) | L2_AP3(x))
-
-#define L2_XSCALE_L_TEX(x) ((x) << 12) /* Type Extension */
-#define L2_XSCALE_T_TEX(x) ((x) << 6) /* Type Extension */
-
-/*
- * Access Permissions for L1 and L2 Descriptors.
- */
-#define AP_W 0x01 /* writable */
-#define AP_U 0x02 /* user */
-
-/*
- * Short-hand for common AP_* constants.
- *
- * Note: These values assume the S (System) bit is set and
- * the R (ROM) bit is clear in CP15 register 1.
- */
-#define AP_KR 0x00 /* kernel read */
-#define AP_KRW 0x01 /* kernel read/write */
-#define AP_KRWUR 0x02 /* kernel read/write usr read */
-#define AP_KRWURW 0x03 /* kernel read/write usr read/write */
-
-/*
- * Domain Types for the Domain Access Control Register.
- */
-#define DOMAIN_FAULT 0x00 /* no access */
-#define DOMAIN_CLIENT 0x01 /* client */
-#define DOMAIN_RESERVED 0x02 /* reserved */
-#define DOMAIN_MANAGER 0x03 /* manager */
-
-/*
- * Type Extension bits for XScale processors.
- *
- * Behavior of C and B when X == 0:
- *
- * C B Cacheable Bufferable Write Policy Line Allocate Policy
- * 0 0 N N - -
- * 0 1 N Y - -
- * 1 0 Y Y Write-through Read Allocate
- * 1 1 Y Y Write-back Read Allocate
- *
- * Behavior of C and B when X == 1:
- * C B Cacheable Bufferable Write Policy Line Allocate Policy
- * 0 0 - - - - DO NOT USE
- * 0 1 N Y - -
- * 1 0 Mini-Data - - -
- * 1 1 Y Y Write-back R/W Allocate
- */
-#define TEX_XSCALE_X 0x01 /* X modifies C and B */
-#endif /* !_MACHINE_PTE_H_ */
-
-/* End of pte.h */
--- sys/arm/include/reloc.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*-
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)reloc.h 8.1 (Berkeley) 6/10/93
- * $FreeBSD: src/sys/arm/include/reloc.h,v 1.1 2004/05/14 11:46:44 cognet Exp $
- */
-
-#ifndef _MACHINE_RELOC_H_
-#define _MACHINE_RELOC_H_
-
-/* Relocation format. */
-struct relocation_info {
- int r_address; /* offset in text or data segment */
- unsigned int r_symbolnum : 24, /* ordinal number of add symbol */
- r_pcrel : 1, /* 1 if value should be pc-relative */
- r_length : 2, /* log base 2 of value's width */
- r_extern : 1, /* 1 if need to add symbol to value */
- r_baserel : 1, /* linkage table relative */
- r_jmptable : 1, /* relocate to jump table */
- r_relative : 1, /* load address relative */
- r_copy : 1; /* run time copy */
-};
-
-#endif
--- sys/arm/include/exec.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*-
- * Copyright (c) 2001 David E. O'Brien
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the author nor the names of any co-contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/exec.h,v 1.3 2005/02/19 21:16:48 ru Exp $
- */
-
-#ifndef _MACHINE_EXEC_H_
-#define _MACHINE_EXEC_H_
-
-#define __LDPGSZ 4096
-
-#endif /* !_MACHINE_EXEC_H_ */
--- sys/arm/include/pmc_mdep.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*-
- * This file is in the public domain.
- *
- * $FreeBSD: src/sys/arm/include/pmc_mdep.h,v 1.2 2005/06/09 19:45:06 jkoshy Exp $
- */
-
-#ifndef _MACHINE_PMC_MDEP_H_
-#define _MACHINE_PMC_MDEP_H_
-
-union pmc_md_op_pmcallocate {
- uint64_t __pad[4];
-};
-
-/* Logging */
-#define PMCLOG_READADDR PMCLOG_READ32
-#define PMCLOG_EMITADDR PMCLOG_EMIT32
-
-#if _KERNEL
-union pmc_md_pmc {
-};
-
-#endif
-
-#endif /* !_MACHINE_PMC_MDEP_H_ */
--- sys/arm/include/pmap.h
+++ /dev/null
@@ -1,524 +0,0 @@
-/*-
- * Copyright (c) 1991 Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and William Jolitz of UUNET Technologies Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Derived from hp300 version by Mike Hibler, this version by William
- * Jolitz uses a recursive map [a pde points to the page directory] to
- * map the page tables using the pagetables themselves. This is done to
- * reduce the impact on kernel virtual memory for lots of sparse address
- * space, and to reduce the cost of memory to each process.
- *
- * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
- * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
- * from: FreeBSD: src/sys/i386/include/pmap.h,v 1.70 2000/11/30
- *
- * $FreeBSD: src/sys/arm/include/pmap.h,v 1.10 2005/06/07 23:04:24 cognet Exp $
- */
-
-#ifndef _MACHINE_PMAP_H_
-#define _MACHINE_PMAP_H_
-
-#include <machine/pte.h>
-
-/*
- * Pte related macros
- */
-#define PTE_NOCACHE 0
-#define PTE_CACHE 1
-#define PTE_PAGETABLE 2
-
-#ifndef LOCORE
-
-#include <sys/queue.h>
-
-#define PDESIZE sizeof(pd_entry_t) /* for assembly files */
-#define PTESIZE sizeof(pt_entry_t) /* for assembly files */
-
-#ifdef _KERNEL
-
-#define vtophys(va) pmap_extract(pmap_kernel(), (vm_offset_t)(va))
-#define pmap_kextract(va) pmap_extract(pmap_kernel(), (vm_offset_t)(va))
-
-#endif
-
-#define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list))
-/*
- * Pmap stuff
- */
-
-/*
- * This structure is used to hold a virtual<->physical address
- * association and is used mostly by bootstrap code
- */
-struct pv_addr {
- SLIST_ENTRY(pv_addr) pv_list;
- vm_offset_t pv_va;
- vm_paddr_t pv_pa;
-};
-
-struct pv_entry;
-
-struct md_page {
- int pvh_attrs;
- u_int uro_mappings;
- u_int urw_mappings;
- union {
- u_short s_mappings[2]; /* Assume kernel count <= 65535 */
- u_int i_mappings;
- } k_u;
-#define kro_mappings k_u.s_mappings[0]
-#define krw_mappings k_u.s_mappings[1]
-#define k_mappings k_u.i_mappings
- int pv_list_count;
- TAILQ_HEAD(,pv_entry) pv_list;
-};
-
-#define VM_MDPAGE_INIT(pg) \
-do { \
- TAILQ_INIT(&pg->pv_list); \
- mtx_init(&(pg)->md_page.pvh_mtx, "MDPAGE Mutex", NULL, MTX_DEV);\
- (pg)->mdpage.pvh_attrs = 0; \
- (pg)->mdpage.uro_mappings = 0; \
- (pg)->mdpage.urw_mappings = 0; \
- (pg)->mdpage.k_mappings = 0; \
-} while (/*CONSTCOND*/0)
-
-struct l1_ttable;
-struct l2_dtable;
-
-
-/*
- * The number of L2 descriptor tables which can be tracked by an l2_dtable.
- * A bucket size of 16 provides for 16MB of contiguous virtual address
- * space per l2_dtable. Most processes will, therefore, require only two or
- * three of these to map their whole working set.
- */
-#define L2_BUCKET_LOG2 4
-#define L2_BUCKET_SIZE (1 << L2_BUCKET_LOG2)
-/*
- * Given the above "L2-descriptors-per-l2_dtable" constant, the number
- * of l2_dtable structures required to track all possible page descriptors
- * mappable by an L1 translation table is given by the following constants:
- */
-#define L2_LOG2 ((32 - L1_S_SHIFT) - L2_BUCKET_LOG2)
-#define L2_SIZE (1 << L2_LOG2)
-
-struct pmap {
- u_int8_t pm_domain;
- struct l1_ttable *pm_l1;
- struct l2_dtable *pm_l2[L2_SIZE];
- pd_entry_t *pm_pdir; /* KVA of page directory */
- int pm_count; /* reference count */
- int pm_active; /* active on cpus */
- struct pmap_statistics pm_stats; /* pmap statictics */
- TAILQ_HEAD(,pv_entry) pm_pvlist; /* list of mappings in pmap */
- LIST_ENTRY(pmap) pm_list; /* List of all pmaps */
-};
-
-typedef struct pmap *pmap_t;
-
-#ifdef _KERNEL
-extern pmap_t kernel_pmap;
-#define pmap_kernel() kernel_pmap
-
-#endif
-
-
-/*
- * For each vm_page_t, there is a list of all currently valid virtual
- * mappings of that page. An entry is a pv_entry_t, the list is pv_table.
- */
-typedef struct pv_entry {
- pmap_t pv_pmap; /* pmap where mapping lies */
- vm_offset_t pv_va; /* virtual address for mapping */
- TAILQ_ENTRY(pv_entry) pv_list;
- TAILQ_ENTRY(pv_entry) pv_plist;
- int pv_flags; /* flags (wired, etc...) */
-} *pv_entry_t;
-
-#define PV_ENTRY_NULL ((pv_entry_t) 0)
-
-#ifdef _KERNEL
-
-boolean_t pmap_get_pde_pte(pmap_t, vm_offset_t, pd_entry_t **, pt_entry_t **);
-
-/*
- * virtual address to page table entry and
- * to physical address. Likewise for alternate address space.
- * Note: these work recursively, thus vtopte of a pte will give
- * the corresponding pde that in turn maps it.
- */
-
-/*
- * The current top of kernel VM.
- */
-extern vm_offset_t pmap_curmaxkvaddr;
-
-struct pcb;
-
-void pmap_set_pcb_pagedir(pmap_t, struct pcb *);
-/* Virtual address to page table entry */
-static __inline pt_entry_t *
-vtopte(vm_offset_t va)
-{
- pd_entry_t *pdep;
- pt_entry_t *ptep;
-
- if (pmap_get_pde_pte(pmap_kernel(), va, &pdep, &ptep) == FALSE)
- return (NULL);
- return (ptep);
-}
-
-extern vm_offset_t avail_end;
-extern vm_offset_t clean_eva;
-extern vm_offset_t clean_sva;
-extern vm_offset_t phys_avail[];
-extern vm_offset_t virtual_avail;
-extern vm_offset_t virtual_end;
-
-void pmap_bootstrap(vm_offset_t, vm_offset_t, struct pv_addr *);
-void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
-void pmap_kenter_user(vm_offset_t va, vm_paddr_t pa);
-void pmap_kremove(vm_offset_t);
-void *pmap_mapdev(vm_offset_t, vm_size_t);
-void pmap_unmapdev(vm_offset_t, vm_size_t);
-vm_page_t pmap_use_pt(pmap_t, vm_offset_t);
-void pmap_debug(int);
-void pmap_map_section(vm_offset_t, vm_offset_t, vm_offset_t, int, int);
-void pmap_link_l2pt(vm_offset_t, vm_offset_t, struct pv_addr *);
-vm_size_t pmap_map_chunk(vm_offset_t, vm_offset_t, vm_offset_t, vm_size_t, int, int);
-void
-pmap_map_entry(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa, int prot,
- int cache);
-int pmap_fault_fixup(pmap_t, vm_offset_t, vm_prot_t, int);
-
-/*
- * Definitions for MMU domains
- */
-#define PMAP_DOMAINS 15 /* 15 'user' domains (0-14) */
-#define PMAP_DOMAIN_KERNEL 15 /* The kernel uses domain #15 */
-
-/*
- * The new pmap ensures that page-tables are always mapping Write-Thru.
- * Thus, on some platforms we can run fast and loose and avoid syncing PTEs
- * on every change.
- *
- * Unfortunately, not all CPUs have a write-through cache mode. So we
- * define PMAP_NEEDS_PTE_SYNC for C code to conditionally do PTE syncs,
- * and if there is the chance for PTE syncs to be needed, we define
- * PMAP_INCLUDE_PTE_SYNC so e.g. assembly code can include (and run)
- * the code.
- */
-extern int pmap_needs_pte_sync;
-
-/*
- * These macros define the various bit masks in the PTE.
- *
- * We use these macros since we use different bits on different processor
- * models.
- */
-#define L1_S_PROT_U (L1_S_AP(AP_U))
-#define L1_S_PROT_W (L1_S_AP(AP_W))
-#define L1_S_PROT_MASK (L1_S_PROT_U|L1_S_PROT_W)
-
-#define L1_S_CACHE_MASK_generic (L1_S_B|L1_S_C)
-#define L1_S_CACHE_MASK_xscale (L1_S_B|L1_S_C|L1_S_XSCALE_TEX(TEX_XSCALE_X))
-
-#define L2_L_PROT_U (L2_AP(AP_U))
-#define L2_L_PROT_W (L2_AP(AP_W))
-#define L2_L_PROT_MASK (L2_L_PROT_U|L2_L_PROT_W)
-
-#define L2_L_CACHE_MASK_generic (L2_B|L2_C)
-#define L2_L_CACHE_MASK_xscale (L2_B|L2_C|L2_XSCALE_L_TEX(TEX_XSCALE_X))
-
-#define L2_S_PROT_U_generic (L2_AP(AP_U))
-#define L2_S_PROT_W_generic (L2_AP(AP_W))
-#define L2_S_PROT_MASK_generic (L2_S_PROT_U|L2_S_PROT_W)
-
-#define L2_S_PROT_U_xscale (L2_AP0(AP_U))
-#define L2_S_PROT_W_xscale (L2_AP0(AP_W))
-#define L2_S_PROT_MASK_xscale (L2_S_PROT_U|L2_S_PROT_W)
-
-#define L2_S_CACHE_MASK_generic (L2_B|L2_C)
-#define L2_S_CACHE_MASK_xscale (L2_B|L2_C|L2_XSCALE_T_TEX(TEX_XSCALE_X))
-
-#define L1_S_PROTO_generic (L1_TYPE_S | L1_S_IMP)
-#define L1_S_PROTO_xscale (L1_TYPE_S)
-
-#define L1_C_PROTO_generic (L1_TYPE_C | L1_C_IMP2)
-#define L1_C_PROTO_xscale (L1_TYPE_C)
-
-#define L2_L_PROTO (L2_TYPE_L)
-
-#define L2_S_PROTO_generic (L2_TYPE_S)
-#define L2_S_PROTO_xscale (L2_TYPE_XSCALE_XS)
-
-/*
- * User-visible names for the ones that vary with MMU class.
- */
-
-#if ARM_NMMUS > 1
-/* More than one MMU class configured; use variables. */
-#define L2_S_PROT_U pte_l2_s_prot_u
-#define L2_S_PROT_W pte_l2_s_prot_w
-#define L2_S_PROT_MASK pte_l2_s_prot_mask
-
-#define L1_S_CACHE_MASK pte_l1_s_cache_mask
-#define L2_L_CACHE_MASK pte_l2_l_cache_mask
-#define L2_S_CACHE_MASK pte_l2_s_cache_mask
-
-#define L1_S_PROTO pte_l1_s_proto
-#define L1_C_PROTO pte_l1_c_proto
-#define L2_S_PROTO pte_l2_s_proto
-
-#elif (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
-#define L2_S_PROT_U L2_S_PROT_U_generic
-#define L2_S_PROT_W L2_S_PROT_W_generic
-#define L2_S_PROT_MASK L2_S_PROT_MASK_generic
-
-#define L1_S_CACHE_MASK L1_S_CACHE_MASK_generic
-#define L2_L_CACHE_MASK L2_L_CACHE_MASK_generic
-#define L2_S_CACHE_MASK L2_S_CACHE_MASK_generic
-
-#define L1_S_PROTO L1_S_PROTO_generic
-#define L1_C_PROTO L1_C_PROTO_generic
-#define L2_S_PROTO L2_S_PROTO_generic
-
-#elif ARM_MMU_XSCALE == 1
-#define L2_S_PROT_U L2_S_PROT_U_xscale
-#define L2_S_PROT_W L2_S_PROT_W_xscale
-#define L2_S_PROT_MASK L2_S_PROT_MASK_xscale
-
-#define L1_S_CACHE_MASK L1_S_CACHE_MASK_xscale
-#define L2_L_CACHE_MASK L2_L_CACHE_MASK_xscale
-#define L2_S_CACHE_MASK L2_S_CACHE_MASK_xscale
-
-#define L1_S_PROTO L1_S_PROTO_xscale
-#define L1_C_PROTO L1_C_PROTO_xscale
-#define L2_S_PROTO L2_S_PROTO_xscale
-
-#endif /* ARM_NMMUS > 1 */
-
-#if (ARM_MMU_SA1 == 1) && (ARM_NMMUS == 1)
-#define PMAP_NEEDS_PTE_SYNC 1
-#define PMAP_INCLUDE_PTE_SYNC
-#elif (ARM_MMU_SA1 == 0)
-#define PMAP_NEEDS_PTE_SYNC 0
-#endif
-
-/*
- * These macros return various bits based on kernel/user and protection.
- * Note that the compiler will usually fold these at compile time.
- */
-#define L1_S_PROT(ku, pr) ((((ku) == PTE_USER) ? L1_S_PROT_U : 0) | \
- (((pr) & VM_PROT_WRITE) ? L1_S_PROT_W : 0))
-
-#define L2_L_PROT(ku, pr) ((((ku) == PTE_USER) ? L2_L_PROT_U : 0) | \
- (((pr) & VM_PROT_WRITE) ? L2_L_PROT_W : 0))
-
-#define L2_S_PROT(ku, pr) ((((ku) == PTE_USER) ? L2_S_PROT_U : 0) | \
- (((pr) & VM_PROT_WRITE) ? L2_S_PROT_W : 0))
-
-/*
- * Macros to test if a mapping is mappable with an L1 Section mapping
- * or an L2 Large Page mapping.
- */
-#define L1_S_MAPPABLE_P(va, pa, size) \
- ((((va) | (pa)) & L1_S_OFFSET) == 0 && (size) >= L1_S_SIZE)
-
-#define L2_L_MAPPABLE_P(va, pa, size) \
- ((((va) | (pa)) & L2_L_OFFSET) == 0 && (size) >= L2_L_SIZE)
-
-/*
- * Provide a fallback in case we were not able to determine it at
- * compile-time.
- */
-#ifndef PMAP_NEEDS_PTE_SYNC
-#define PMAP_NEEDS_PTE_SYNC pmap_needs_pte_sync
-#define PMAP_INCLUDE_PTE_SYNC
-#endif
-
-#define PTE_SYNC(pte) \
-do { \
- if (PMAP_NEEDS_PTE_SYNC) \
- cpu_dcache_wb_range((vm_offset_t)(pte), sizeof(pt_entry_t));\
-} while (/*CONSTCOND*/0)
-
-#define PTE_SYNC_RANGE(pte, cnt) \
-do { \
- if (PMAP_NEEDS_PTE_SYNC) { \
- cpu_dcache_wb_range((vm_offset_t)(pte), \
- (cnt) << 2); /* * sizeof(pt_entry_t) */ \
- } \
-} while (/*CONSTCOND*/0)
-
-extern pt_entry_t pte_l1_s_cache_mode;
-extern pt_entry_t pte_l1_s_cache_mask;
-
-extern pt_entry_t pte_l2_l_cache_mode;
-extern pt_entry_t pte_l2_l_cache_mask;
-
-extern pt_entry_t pte_l2_s_cache_mode;
-extern pt_entry_t pte_l2_s_cache_mask;
-
-extern pt_entry_t pte_l1_s_cache_mode_pt;
-extern pt_entry_t pte_l2_l_cache_mode_pt;
-extern pt_entry_t pte_l2_s_cache_mode_pt;
-
-extern pt_entry_t pte_l2_s_prot_u;
-extern pt_entry_t pte_l2_s_prot_w;
-extern pt_entry_t pte_l2_s_prot_mask;
-
-extern pt_entry_t pte_l1_s_proto;
-extern pt_entry_t pte_l1_c_proto;
-extern pt_entry_t pte_l2_s_proto;
-
-extern void (*pmap_copy_page_func)(vm_paddr_t, vm_paddr_t);
-extern void (*pmap_zero_page_func)(vm_paddr_t, int, int);
-
-#if (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0
-void pmap_copy_page_generic(vm_paddr_t, vm_paddr_t);
-void pmap_zero_page_generic(vm_paddr_t, int, int);
-
-void pmap_pte_init_generic(void);
-#if defined(CPU_ARM8)
-void pmap_pte_init_arm8(void);
-#endif
-#if defined(CPU_ARM9)
-void pmap_pte_init_arm9(void);
-#endif /* CPU_ARM9 */
-#if defined(CPU_ARM10)
-void pmap_pte_init_arm10(void);
-#endif /* CPU_ARM10 */
-#endif /* (ARM_MMU_GENERIC + ARM_MMU_SA1) != 0 */
-
-#if /* ARM_MMU_SA1 == */1
-void pmap_pte_init_sa1(void);
-#endif /* ARM_MMU_SA1 == 1 */
-
-#if ARM_MMU_XSCALE == 1
-void pmap_copy_page_xscale(vm_paddr_t, vm_paddr_t);
-void pmap_zero_page_xscale(vm_paddr_t, int, int);
-
-void pmap_pte_init_xscale(void);
-
-void xscale_setup_minidata(vm_offset_t, vm_offset_t, vm_offset_t);
-
-void pmap_use_minicache(vm_offset_t, vm_size_t);
-#endif /* ARM_MMU_XSCALE == 1 */
-#define PTE_KERNEL 0
-#define PTE_USER 1
-#define l1pte_valid(pde) ((pde) != 0)
-#define l1pte_section_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_S)
-#define l1pte_page_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_C)
-#define l1pte_fpage_p(pde) (((pde) & L1_TYPE_MASK) == L1_TYPE_F)
-
-#define l2pte_index(v) (((v) & L2_ADDR_BITS) >> L2_S_SHIFT)
-#define l2pte_valid(pte) ((pte) != 0)
-#define l2pte_pa(pte) ((pte) & L2_S_FRAME)
-#define l2pte_minidata(pte) (((pte) & \
- (L2_B | L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X)))\
- == (L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X)))
-
-/* L1 and L2 page table macros */
-#define pmap_pde_v(pde) l1pte_valid(*(pde))
-#define pmap_pde_section(pde) l1pte_section_p(*(pde))
-#define pmap_pde_page(pde) l1pte_page_p(*(pde))
-#define pmap_pde_fpage(pde) l1pte_fpage_p(*(pde))
-
-#define pmap_pte_v(pte) l2pte_valid(*(pte))
-#define pmap_pte_pa(pte) l2pte_pa(*(pte))
-
-/*
- * Flags that indicate attributes of pages or mappings of pages.
- *
- * The PVF_MOD and PVF_REF flags are stored in the mdpage for each
- * page. PVF_WIRED, PVF_WRITE, and PVF_NC are kept in individual
- * pv_entry's for each page. They live in the same "namespace" so
- * that we can clear multiple attributes at a time.
- *
- * Note the "non-cacheable" flag generally means the page has
- * multiple mappings in a given address space.
- */
-#define PVF_MOD 0x01 /* page is modified */
-#define PVF_REF 0x02 /* page is referenced */
-#define PVF_WIRED 0x04 /* mapping is wired */
-#define PVF_WRITE 0x08 /* mapping is writable */
-#define PVF_EXEC 0x10 /* mapping is executable */
-#define PVF_UNC 0x20 /* mapping is 'user' non-cacheable */
-#define PVF_KNC 0x40 /* mapping is 'kernel' non-cacheable */
-#define PVF_NC (PVF_UNC|PVF_KNC)
-
-void vector_page_setprot(int);
-
-void pmap_update(pmap_t);
-
-/*
- * This structure is used by machine-dependent code to describe
- * static mappings of devices, created at bootstrap time.
- */
-struct pmap_devmap {
- vm_offset_t pd_va; /* virtual address */
- vm_paddr_t pd_pa; /* physical address */
- vm_size_t pd_size; /* size of region */
- vm_prot_t pd_prot; /* protection code */
- int pd_cache; /* cache attributes */
-};
-
-const struct pmap_devmap *pmap_devmap_find_pa(vm_paddr_t, vm_size_t);
-const struct pmap_devmap *pmap_devmap_find_va(vm_offset_t, vm_size_t);
-
-void pmap_devmap_bootstrap(vm_offset_t, const struct pmap_devmap *);
-void pmap_devmap_register(const struct pmap_devmap *);
-
-#define SECTION_CACHE 0x1
-#define SECTION_PT 0x2
-void pmap_kenter_section(vm_offset_t, vm_paddr_t, int flags);
-
-extern char *_tmppt;
-
-#ifdef ARM_USE_SMALL_ALLOC
-void arm_add_smallalloc_pages(void *, void *, int, int);
-void arm_busy_pages(void);
-struct arm_small_page {
- void *addr;
- TAILQ_ENTRY(arm_small_page) pg_list;
-};
-#endif
-#endif /* _KERNEL */
-
-#endif /* !LOCORE */
-
-#endif /* !_MACHINE_PMAP_H_ */
--- sys/arm/include/psl.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/* $NetBSD: psl.h,v 1.6 2003/06/16 20:00:58 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1995 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * psl.h
- *
- * spl prototypes.
- * Eventually this will become a set of defines.
- *
- * Created : 21/07/95
- *
- * $FreeBSD: src/sys/arm/include/psl.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_PSL_H_
-#define _MACHINE_PSL_H_
-#include <machine/intr.h>
-
-/*
- * These are the different SPL states
- *
- * Each state has an interrupt mask associated with it which
- * indicate which interrupts are allowed.
- */
-
-#define _SPL_0 0
-#define _SPL_SOFTCLOCK 1
-#define _SPL_SOFTNET 2
-#define _SPL_BIO 3
-#define _SPL_NET 4
-#define _SPL_SOFTSERIAL 5
-#define _SPL_TTY 6
-#define _SPL_VM 7
-#define _SPL_AUDIO 8
-#define _SPL_CLOCK 9
-#define _SPL_STATCLOCK 10
-#define _SPL_HIGH 11
-#define _SPL_SERIAL 12
-#define _SPL_LEVELS 13
-
-#ifdef _KERNEL
-#ifndef _LOCORE
-extern int current_spl_level;
-
-extern u_int spl_masks[_SPL_LEVELS + 1];
-extern u_int spl_smasks[_SPL_LEVELS];
-#endif /* _LOCORE */
-#endif /* _KERNEL */
-
-#endif /* _ARM_PSL_H_ */
-/* End of psl.h */
--- sys/arm/include/utrap.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*-
- * Copyright (c) 2001 Jake Burkholder.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/utrap.h,v 1.1 2004/05/14 11:46:44 cognet Exp $
- */
-
-#ifndef _MACHINE_UTRAP_H_
-#define _MACHINE_UTRAP_H_
-
-#define UT_INSTRUCTION_EXCEPTION 1
-#define UT_INSTRUCTION_ERROR 2
-#define UT_INSTRUCTION_PROTECTION 3
-#define UT_ILLTRAP_INSTRUCTION 4
-#define UT_ILLEGAL_INSTRUCTION 5
-#define UT_PRIVILEGED_OPCODE 6
-#define UT_FP_DISABLED 7
-#define UT_FP_EXCEPTION_IEEE_754 8
-#define UT_FP_EXCEPTION_OTHER 9
-#define UT_TAG_OFERFLOW 10
-#define UT_DIVISION_BY_ZERO 11
-#define UT_DATA_EXCEPTION 12
-#define UT_DATA_ERROR 13
-#define UT_DATA_PROTECTION 14
-#define UT_MEM_ADDRESS_NOT_ALIGNED 15
-#define UT_PRIVILEGED_ACTION 16
-#define UT_ASYNC_DATA_ERROR 17
-#define UT_TRAP_INSTRUCTION_16 18
-#define UT_TRAP_INSTRUCTION_17 19
-#define UT_TRAP_INSTRUCTION_18 20
-#define UT_TRAP_INSTRUCTION_19 21
-#define UT_TRAP_INSTRUCTION_20 22
-#define UT_TRAP_INSTRUCTION_21 23
-#define UT_TRAP_INSTRUCTION_22 24
-#define UT_TRAP_INSTRUCTION_23 25
-#define UT_TRAP_INSTRUCTION_24 26
-#define UT_TRAP_INSTRUCTION_25 27
-#define UT_TRAP_INSTRUCTION_26 28
-#define UT_TRAP_INSTRUCTION_27 29
-#define UT_TRAP_INSTRUCTION_28 30
-#define UT_TRAP_INSTRUCTION_29 31
-#define UT_TRAP_INSTRUCTION_30 32
-#define UT_TRAP_INSTRUCTION_31 33
-#define UT_INSTRUCTION_MISS 34
-#define UT_DATA_MISS 35
-#define UT_MAX 36
-
-#define ST_SUNOS_SYSCALL 0
-#define ST_BREAKPOINT 1
-#define ST_DIVISION_BY_ZERO 2
-#define ST_FLUSH_WINDOWS 3 /* XXX implement! */
-#define ST_CLEAN_WINDOW 4
-#define ST_RANGE_CHECK 5
-#define ST_FIX_ALIGNMENT 6
-#define ST_INTEGER_OVERFLOW 7
-/* 8 is 32-bit ABI syscall (old solaris syscall?) */
-#define ST_BSD_SYSCALL 9
-#define ST_FP_RESTORE 10
-/* 11-15 are available */
-/* 16 is linux 32 bit syscall (but supposed to be reserved, grr) */
-/* 17 is old linux 64 bit syscall (but supposed to be reserved, grr) */
-/* 16-31 are reserved for user applications (utraps) */
-#define ST_GETCC 32 /* XXX implement! */
-#define ST_SETCC 33 /* XXX implement! */
-#define ST_GETPSR 34 /* XXX implement! */
-#define ST_SETPSR 35 /* XXX implement! */
-/* 36-63 are available */
-#define ST_SOLARIS_SYSCALL 64
-#define ST_SYSCALL 65
-#define ST_SYSCALL32 66
-/* 67 is reserved to OS source licensee */
-/* 68 is return from deferred trap (not supported) */
-/* 69-95 are reserved to SPARC international */
-/* 96-108 are available */
-/* 109 is linux 64 bit syscall */
-/* 110 is linux 64 bit getcontext (?) */
-/* 111 is linux 64 bit setcontext (?) */
-/* 112-255 are available */
-
-#define UTH_NOCHANGE (-1)
-
-#ifndef __ASM__
-
-typedef int utrap_entry_t;
-typedef void *utrap_handler_t;
-
-#endif
-
-#endif
--- sys/arm/include/fp.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/* $NetBSD: fp.h,v 1.1 2001/01/10 19:02:06 bjh21 Exp $ */
-
-/*-
- * Copyright (c) 1995 Mark Brinicombe.
- * Copyright (c) 1995 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * fp.h
- *
- * FP info
- *
- * Created : 10/10/95
- *
- * $FreeBSD: src/sys/arm/include/fp.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_FP_H
-#define _MACHINE_FP_H
-
-/*
- * An extended precision floating point number
- */
-
-typedef struct fp_extended_precision {
- u_int32_t fp_exponent;
- u_int32_t fp_mantissa_hi;
- u_int32_t fp_mantissa_lo;
-} fp_extended_precision_t;
-
-typedef struct fp_extended_precision fp_reg_t;
-
-/*
- * Information about the FPE-SP state that is stored in the pcb
- *
- * This needs to move and be hidden from userland.
- */
-
-struct fpe_sp_state {
- unsigned int fp_flags;
- unsigned int fp_sr;
- unsigned int fp_cr;
- fp_reg_t fp_registers[16];
-};
-
-/*
- * Type for a saved FP context, if we want to translate the context to a
- * user-readable form
- */
-
-typedef struct {
- u_int32_t fpsr;
- fp_extended_precision_t regs[8];
-} fp_state_t;
-
-#endif /* _MACHINE_FP_H_ */
-
-/* End of fp.h */
--- sys/arm/include/limits.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*-
- * Copyright (c) 1988, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)limits.h 8.3 (Berkeley) 1/4/94
- * $FreeBSD: src/sys/arm/include/limits.h,v 1.8 2005/03/02 21:33:22 joerg Exp $
- */
-
-#ifndef _MACHINE_LIMITS_H_
-#define _MACHINE_LIMITS_H_
-
-#include <sys/cdefs.h>
-
-#ifdef __CC_SUPPORTS_WARNING
-#warning "machine/limits.h is deprecated. Include sys/limits.h instead."
-#endif
-
-#include <sys/limits.h>
-
-#endif /* !_MACHINE_LIMITS_H_ */
--- sys/arm/include/katelib.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/* $NetBSD: katelib.h,v 1.3 2001/11/23 19:21:48 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1994-1996 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * katelib.h
- *
- * Prototypes for machine specific functions. Most of these
- * could be inlined.
- *
- * This should not really be a separate header file. Eventually I will merge
- * this into other header files once I have decided where the declarations
- * should go.
- *
- * Created : 18/09/94
- *
- * Based on kate/katelib/prototypes.h
- *
- * $FreeBSD: src/sys/arm/include/katelib.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-/*
- * USE OF THIS FILE IS DEPRECATED
- */
-
-#ifndef _MACHINE_KATELIB_H_
-#define _MACHINE_KATELIB_H_
-#include <sys/types.h>
-#include <machine/cpufunc.h>
-
-#ifdef _KERNEL
-
-/* Assembly modules */
-
-/* In blockio.S */
-#include <machine/blockio.h>
-
-/* Macros for reading and writing words, shorts, bytes */
-
-#define WriteWord(a, b) \
-*((volatile unsigned int *)(a)) = (b)
-
-#define ReadWord(a) \
-(*((volatile unsigned int *)(a)))
-
-#define WriteShort(a, b) \
-*((volatile unsigned int *)(a)) = ((b) | ((b) << 16))
-
-#define ReadShort(a) \
-((*((volatile unsigned int *)(a))) & 0xffff)
-
-#define WriteByte(a, b) \
-*((volatile unsigned char *)(a)) = (b)
-
-#define ReadByte(a) \
-(*((volatile unsigned char *)(a)))
-
-/* Define in/out macros */
-
-#define inb(port) ReadByte((port))
-#define outb(port, byte) WriteByte((port), (byte))
-#define inw(port) ReadShort((port))
-#define outw(port, word) WriteShort((port), (word))
-#define inl(port) ReadWord((port))
-#define outl(port, lword) WriteWord((port), (lword))
-
-#endif
-
-#endif /* !_MACHINE_KATELIB_H_ */
-/* End of katelib.h */
--- sys/arm/include/memdev.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*-
- * Copyright (c) 2004 Mark R V Murray
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer
- * in this position and unchanged.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/memdev.h,v 1.1 2004/11/07 23:01:36 cognet Exp $
- */
-
-#define CDEV_MAJOR 2
-#define CDEV_MINOR_MEM 0
-#define CDEV_MINOR_KMEM 1
-
-d_open_t memopen;
-d_read_t memrw;
-d_mmap_t memmmap;
-#define memioctl (d_ioctl_t *)NULL
-
-void dev_mem_md_init(void);
--- sys/arm/include/cpufunc.h
+++ /dev/null
@@ -1,518 +0,0 @@
-/* $NetBSD: cpufunc.h,v 1.29 2003/09/06 09:08:35 rearnsha Exp $ */
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Causality Limited.
- * 4. The name of Causality Limited may not be used to endorse or promote
- * products derived from this software without specific prior written
- * permission.
- *
- * THIS SOFTWARE IS PROVIDED BY CAUSALITY LIMITED ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL CAUSALITY LIMITED BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * cpufunc.h
- *
- * Prototypes for cpu, mmu and tlb related functions.
- *
- * $FreeBSD: src/sys/arm/include/cpufunc.h,v 1.7 2005/06/03 19:49:53 cognet Exp $
- */
-
-#ifndef _MACHINE_CPUFUNC_H_
-#define _MACHINE_CPUFUNC_H_
-
-#ifdef _KERNEL
-
-#include <sys/types.h>
-#include <machine/cpuconf.h>
-#include <machine/katelib.h> /* For in[bwl] and out[bwl] */
-
-static __inline void
-breakpoint(void)
-{
- __asm(".word 0xe7ffffff");
-}
-
-struct cpu_functions {
-
- /* CPU functions */
-
- u_int (*cf_id) (void);
- void (*cf_cpwait) (void);
-
- /* MMU functions */
-
- u_int (*cf_control) (u_int bic, u_int eor);
- void (*cf_domains) (u_int domains);
- void (*cf_setttb) (u_int ttb);
- u_int (*cf_faultstatus) (void);
- u_int (*cf_faultaddress) (void);
-
- /* TLB functions */
-
- void (*cf_tlb_flushID) (void);
- void (*cf_tlb_flushID_SE) (u_int va);
- void (*cf_tlb_flushI) (void);
- void (*cf_tlb_flushI_SE) (u_int va);
- void (*cf_tlb_flushD) (void);
- void (*cf_tlb_flushD_SE) (u_int va);
-
- /*
- * Cache operations:
- *
- * We define the following primitives:
- *
- * icache_sync_all Synchronize I-cache
- * icache_sync_range Synchronize I-cache range
- *
- * dcache_wbinv_all Write-back and Invalidate D-cache
- * dcache_wbinv_range Write-back and Invalidate D-cache range
- * dcache_inv_range Invalidate D-cache range
- * dcache_wb_range Write-back D-cache range
- *
- * idcache_wbinv_all Write-back and Invalidate D-cache,
- * Invalidate I-cache
- * idcache_wbinv_range Write-back and Invalidate D-cache,
- * Invalidate I-cache range
- *
- * Note that the ARM term for "write-back" is "clean". We use
- * the term "write-back" since it's a more common way to describe
- * the operation.
- *
- * There are some rules that must be followed:
- *
- * I-cache Synch (all or range):
- * The goal is to synchronize the instruction stream,
- * so you may beed to write-back dirty D-cache blocks
- * first. If a range is requested, and you can't
- * synchronize just a range, you have to hit the whole
- * thing.
- *
- * D-cache Write-Back and Invalidate range:
- * If you can't WB-Inv a range, you must WB-Inv the
- * entire D-cache.
- *
- * D-cache Invalidate:
- * If you can't Inv the D-cache, you must Write-Back
- * and Invalidate. Code that uses this operation
- * MUST NOT assume that the D-cache will not be written
- * back to memory.
- *
- * D-cache Write-Back:
- * If you can't Write-back without doing an Inv,
- * that's fine. Then treat this as a WB-Inv.
- * Skipping the invalidate is merely an optimization.
- *
- * All operations:
- * Valid virtual addresses must be passed to each
- * cache operation.
- */
- void (*cf_icache_sync_all) (void);
- void (*cf_icache_sync_range) (vm_offset_t, vm_size_t);
-
- void (*cf_dcache_wbinv_all) (void);
- void (*cf_dcache_wbinv_range) (vm_offset_t, vm_size_t);
- void (*cf_dcache_inv_range) (vm_offset_t, vm_size_t);
- void (*cf_dcache_wb_range) (vm_offset_t, vm_size_t);
-
- void (*cf_idcache_wbinv_all) (void);
- void (*cf_idcache_wbinv_range) (vm_offset_t, vm_size_t);
-
- /* Other functions */
-
- void (*cf_flush_prefetchbuf) (void);
- void (*cf_drain_writebuf) (void);
- void (*cf_flush_brnchtgt_C) (void);
- void (*cf_flush_brnchtgt_E) (u_int va);
-
- void (*cf_sleep) (int mode);
-
- /* Soft functions */
-
- int (*cf_dataabt_fixup) (void *arg);
- int (*cf_prefetchabt_fixup) (void *arg);
-
- void (*cf_context_switch) (void);
-
- void (*cf_setup) (char *string);
-};
-
-extern struct cpu_functions cpufuncs;
-extern u_int cputype;
-
-#define cpu_id() cpufuncs.cf_id()
-#define cpu_cpwait() cpufuncs.cf_cpwait()
-
-#define cpu_control(c, e) cpufuncs.cf_control(c, e)
-#define cpu_domains(d) cpufuncs.cf_domains(d)
-#define cpu_setttb(t) cpufuncs.cf_setttb(t)
-#define cpu_faultstatus() cpufuncs.cf_faultstatus()
-#define cpu_faultaddress() cpufuncs.cf_faultaddress()
-
-#define cpu_tlb_flushID() cpufuncs.cf_tlb_flushID()
-#define cpu_tlb_flushID_SE(e) cpufuncs.cf_tlb_flushID_SE(e)
-#define cpu_tlb_flushI() cpufuncs.cf_tlb_flushI()
-#define cpu_tlb_flushI_SE(e) cpufuncs.cf_tlb_flushI_SE(e)
-#define cpu_tlb_flushD() cpufuncs.cf_tlb_flushD()
-#define cpu_tlb_flushD_SE(e) cpufuncs.cf_tlb_flushD_SE(e)
-
-#define cpu_icache_sync_all() cpufuncs.cf_icache_sync_all()
-#define cpu_icache_sync_range(a, s) cpufuncs.cf_icache_sync_range((a), (s))
-
-#define cpu_dcache_wbinv_all() cpufuncs.cf_dcache_wbinv_all()
-#define cpu_dcache_wbinv_range(a, s) cpufuncs.cf_dcache_wbinv_range((a), (s))
-#define cpu_dcache_inv_range(a, s) cpufuncs.cf_dcache_inv_range((a), (s))
-#define cpu_dcache_wb_range(a, s) cpufuncs.cf_dcache_wb_range((a), (s))
-
-#define cpu_idcache_wbinv_all() cpufuncs.cf_idcache_wbinv_all()
-#define cpu_idcache_wbinv_range(a, s) cpufuncs.cf_idcache_wbinv_range((a), (s))
-
-#define cpu_flush_prefetchbuf() cpufuncs.cf_flush_prefetchbuf()
-#define cpu_drain_writebuf() cpufuncs.cf_drain_writebuf()
-#define cpu_flush_brnchtgt_C() cpufuncs.cf_flush_brnchtgt_C()
-#define cpu_flush_brnchtgt_E(e) cpufuncs.cf_flush_brnchtgt_E(e)
-
-#define cpu_sleep(m) cpufuncs.cf_sleep(m)
-
-#define cpu_dataabt_fixup(a) cpufuncs.cf_dataabt_fixup(a)
-#define cpu_prefetchabt_fixup(a) cpufuncs.cf_prefetchabt_fixup(a)
-#define ABORT_FIXUP_OK 0 /* fixup succeeded */
-#define ABORT_FIXUP_FAILED 1 /* fixup failed */
-#define ABORT_FIXUP_RETURN 2 /* abort handler should return */
-
-#define cpu_setup(a) cpufuncs.cf_setup(a)
-
-int set_cpufuncs (void);
-#define ARCHITECTURE_NOT_PRESENT 1 /* known but not configured */
-#define ARCHITECTURE_NOT_SUPPORTED 2 /* not known */
-
-void cpufunc_nullop (void);
-int cpufunc_null_fixup (void *);
-int early_abort_fixup (void *);
-int late_abort_fixup (void *);
-u_int cpufunc_id (void);
-u_int cpufunc_control (u_int clear, u_int bic);
-void cpufunc_domains (u_int domains);
-u_int cpufunc_faultstatus (void);
-u_int cpufunc_faultaddress (void);
-
-#ifdef CPU_ARM3
-u_int arm3_control (u_int clear, u_int bic);
-void arm3_cache_flush (void);
-#endif /* CPU_ARM3 */
-
-#if defined(CPU_ARM6) || defined(CPU_ARM7)
-void arm67_setttb (u_int ttb);
-void arm67_tlb_flush (void);
-void arm67_tlb_purge (u_int va);
-void arm67_cache_flush (void);
-void arm67_context_switch (void);
-#endif /* CPU_ARM6 || CPU_ARM7 */
-
-#ifdef CPU_ARM6
-void arm6_setup (char *string);
-#endif /* CPU_ARM6 */
-
-#ifdef CPU_ARM7
-void arm7_setup (char *string);
-#endif /* CPU_ARM7 */
-
-#ifdef CPU_ARM7TDMI
-int arm7_dataabt_fixup (void *arg);
-void arm7tdmi_setup (char *string);
-void arm7tdmi_setttb (u_int ttb);
-void arm7tdmi_tlb_flushID (void);
-void arm7tdmi_tlb_flushID_SE (u_int va);
-void arm7tdmi_cache_flushID (void);
-void arm7tdmi_context_switch (void);
-#endif /* CPU_ARM7TDMI */
-
-#ifdef CPU_ARM8
-void arm8_setttb (u_int ttb);
-void arm8_tlb_flushID (void);
-void arm8_tlb_flushID_SE (u_int va);
-void arm8_cache_flushID (void);
-void arm8_cache_flushID_E (u_int entry);
-void arm8_cache_cleanID (void);
-void arm8_cache_cleanID_E (u_int entry);
-void arm8_cache_purgeID (void);
-void arm8_cache_purgeID_E (u_int entry);
-
-void arm8_cache_syncI (void);
-void arm8_cache_cleanID_rng (vm_offset_t start, vm_size_t end);
-void arm8_cache_cleanD_rng (vm_offset_t start, vm_size_t end);
-void arm8_cache_purgeID_rng (vm_offset_t start, vm_size_t end);
-void arm8_cache_purgeD_rng (vm_offset_t start, vm_size_t end);
-void arm8_cache_syncI_rng (vm_offset_t start, vm_size_t end);
-
-void arm8_context_switch (void);
-
-void arm8_setup (char *string);
-
-u_int arm8_clock_config (u_int, u_int);
-#endif
-
-#ifdef CPU_SA110
-void sa110_setup (char *string);
-void sa110_context_switch (void);
-#endif /* CPU_SA110 */
-
-#if defined(CPU_SA1100) || defined(CPU_SA1110)
-void sa11x0_drain_readbuf (void);
-
-void sa11x0_context_switch (void);
-void sa11x0_cpu_sleep (int mode);
-
-void sa11x0_setup (char *string);
-#endif
-
-#if defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110)
-void sa1_setttb (u_int ttb);
-
-void sa1_tlb_flushID_SE (u_int va);
-
-void sa1_cache_flushID (void);
-void sa1_cache_flushI (void);
-void sa1_cache_flushD (void);
-void sa1_cache_flushD_SE (u_int entry);
-
-void sa1_cache_cleanID (void);
-void sa1_cache_cleanD (void);
-void sa1_cache_cleanD_E (u_int entry);
-
-void sa1_cache_purgeID (void);
-void sa1_cache_purgeID_E (u_int entry);
-void sa1_cache_purgeD (void);
-void sa1_cache_purgeD_E (u_int entry);
-
-void sa1_cache_syncI (void);
-void sa1_cache_cleanID_rng (vm_offset_t start, vm_size_t end);
-void sa1_cache_cleanD_rng (vm_offset_t start, vm_size_t end);
-void sa1_cache_purgeID_rng (vm_offset_t start, vm_size_t end);
-void sa1_cache_purgeD_rng (vm_offset_t start, vm_size_t end);
-void sa1_cache_syncI_rng (vm_offset_t start, vm_size_t end);
-
-#endif
-
-#ifdef CPU_ARM9
-void arm9_setttb (u_int);
-
-void arm9_tlb_flushID_SE (u_int va);
-
-void arm9_icache_sync_all __P((void));
-void arm9_icache_sync_range __P((vm_offset_t, vm_size_t));
-
-void arm9_dcache_wbinv_all __P((void));
-void arm9_dcache_wbinv_range __P((vm_offset_t, vm_size_t));
-void arm9_dcache_inv_range __P((vm_offset_t, vm_size_t));
-void arm9_dcache_wb_range __P((vm_offset_t, vm_size_t));
-
-void arm9_idcache_wbinv_all __P((void));
-void arm9_idcache_wbinv_range __P((vm_offset_t, vm_size_t));
-
-void arm9_context_switch (void);
-
-void arm9_setup (char *string);
-
-extern unsigned arm9_dcache_sets_max;
-extern unsigned arm9_dcache_sets_inc;
-extern unsigned arm9_dcache_index_max;
-extern unsigned arm9_dcache_index_inc;
-#endif
-
-#ifdef CPU_ARM10
-void arm10_setttb (u_int);
-
-void arm10_tlb_flushID_SE (u_int);
-void arm10_tlb_flushI_SE (u_int);
-
-void arm10_icache_sync_all (void);
-void arm10_icache_sync_range (vm_offset_t, vm_size_t);
-
-void arm10_dcache_wbinv_all (void);
-void arm10_dcache_wbinv_range (vm_offset_t, vm_size_t);
-void arm10_dcache_inv_range (vm_offset_t, vm_size_t);
-void arm10_dcache_wb_range (vm_offset_t, vm_size_t);
-
-void arm10_idcache_wbinv_all (void);
-void arm10_idcache_wbinv_range (vm_offset_t, vm_size_t);
-
-void arm10_context_switch (void);
-
-void arm10_setup (char *string);
-
-extern unsigned arm10_dcache_sets_max;
-extern unsigned arm10_dcache_sets_inc;
-extern unsigned arm10_dcache_index_max;
-extern unsigned arm10_dcache_index_inc;
-#endif
-
-#if defined(CPU_ARM9) || defined(CPU_ARM10) || defined(CPU_SA110) || \
- defined(CPU_SA1100) || defined(CPU_SA1110) || \
- defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
-
-void armv4_tlb_flushID (void);
-void armv4_tlb_flushI (void);
-void armv4_tlb_flushD (void);
-void armv4_tlb_flushD_SE (u_int va);
-
-void armv4_drain_writebuf (void);
-#endif
-
-#if defined(CPU_IXP12X0)
-void ixp12x0_drain_readbuf (void);
-void ixp12x0_context_switch (void);
-void ixp12x0_setup (char *string);
-#endif
-
-#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)
-void xscale_cpwait (void);
-
-void xscale_cpu_sleep (int mode);
-
-u_int xscale_control (u_int clear, u_int bic);
-
-void xscale_setttb (u_int ttb);
-
-void xscale_tlb_flushID_SE (u_int va);
-
-void xscale_cache_flushID (void);
-void xscale_cache_flushI (void);
-void xscale_cache_flushD (void);
-void xscale_cache_flushD_SE (u_int entry);
-
-void xscale_cache_cleanID (void);
-void xscale_cache_cleanD (void);
-void xscale_cache_cleanD_E (u_int entry);
-
-void xscale_cache_clean_minidata (void);
-
-void xscale_cache_purgeID (void);
-void xscale_cache_purgeID_E (u_int entry);
-void xscale_cache_purgeD (void);
-void xscale_cache_purgeD_E (u_int entry);
-
-void xscale_cache_syncI (void);
-void xscale_cache_cleanID_rng (vm_offset_t start, vm_size_t end);
-void xscale_cache_cleanD_rng (vm_offset_t start, vm_size_t end);
-void xscale_cache_purgeID_rng (vm_offset_t start, vm_size_t end);
-void xscale_cache_purgeD_rng (vm_offset_t start, vm_size_t end);
-void xscale_cache_syncI_rng (vm_offset_t start, vm_size_t end);
-void xscale_cache_flushD_rng (vm_offset_t start, vm_size_t end);
-
-void xscale_context_switch (void);
-
-void xscale_setup (char *string);
-#endif /* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 */
-
-#define tlb_flush cpu_tlb_flushID
-#define setttb cpu_setttb
-#define drain_writebuf cpu_drain_writebuf
-
-/*
- * Macros for manipulating CPU interrupts
- */
-static __inline u_int32_t __set_cpsr_c(u_int bic, u_int eor) __attribute__((__unused__));
-
-static __inline u_int32_t
-__set_cpsr_c(u_int bic, u_int eor)
-{
- u_int32_t tmp, ret;
-
- __asm __volatile(
- "mrs %0, cpsr\n" /* Get the CPSR */
- "bic %1, %0, %2\n" /* Clear bits */
- "eor %1, %1, %3\n" /* XOR bits */
- "msr cpsr_c, %1\n" /* Set the control field of CPSR */
- : "=&r" (ret), "=&r" (tmp)
- : "r" (bic), "r" (eor) : "memory");
-
- return ret;
-}
-
-#define disable_interrupts(mask) \
- (__set_cpsr_c((mask) & (I32_bit | F32_bit), \
- (mask) & (I32_bit | F32_bit)))
-
-#define enable_interrupts(mask) \
- (__set_cpsr_c((mask | F32_bit) & (I32_bit | F32_bit), 0))
-
-#define restore_interrupts(old_cpsr) \
- (__set_cpsr_c((I32_bit | F32_bit), (old_cpsr) & (I32_bit | F32_bit)))
-
-#define intr_disable() \
- disable_interrupts(I32_bit | F32_bit)
-#define intr_restore(s) \
- restore_interrupts(s)
-/* Functions to manipulate the CPSR. */
-u_int SetCPSR(u_int bic, u_int eor);
-u_int GetCPSR(void);
-
-/*
- * Functions to manipulate cpu r13
- * (in arm/arm32/setstack.S)
- */
-
-void set_stackptr __P((u_int mode, u_int address));
-u_int get_stackptr __P((u_int mode));
-
-/*
- * Miscellany
- */
-
-int get_pc_str_offset __P((void));
-
-/*
- * CPU functions from locore.S
- */
-
-void cpu_reset __P((void)) __attribute__((__noreturn__));
-
-/*
- * Cache info variables.
- */
-
-/* PRIMARY CACHE VARIABLES */
-extern int arm_picache_size;
-extern int arm_picache_line_size;
-extern int arm_picache_ways;
-
-extern int arm_pdcache_size; /* and unified */
-extern int arm_pdcache_line_size;
-extern int arm_pdcache_ways;
-
-extern int arm_pcache_type;
-extern int arm_pcache_unified;
-
-extern int arm_dcache_align;
-extern int arm_dcache_align_mask;
-
-#endif /* _KERNEL */
-#endif /* _MACHINE_CPUFUNC_H_ */
-
-/* End of cpufunc.h */
--- sys/arm/include/pcb.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/* $NetBSD: pcb.h,v 1.10 2003/10/13 21:46:39 scw Exp $ */
-
-/*-
- * Copyright (c) 2001 Matt Thomas <matt at 3am-software.com>.
- * Copyright (c) 1994 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the RiscBSD team.
- * 4. The name "RiscBSD" nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY RISCBSD ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL RISCBSD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/pcb.h,v 1.5 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_PCB_H_
-#define _MACHINE_PCB_H_
-
-#include <machine/frame.h>
-#include <machine/fp.h>
-
-
-struct trapframe;
-
-struct pcb_arm32 {
- vm_offset_t pcb32_pagedir; /* PT hooks */
- uint32_t *pcb32_pl1vec; /* PTR to vector_base L1 entry*/
- uint32_t pcb32_l1vec; /* Value to stuff on ctx sw */
- u_int pcb32_dacr; /* Domain Access Control Reg */
- /*
- * WARNING!
- * cpuswitch.S relies on pcb32_r8 being quad-aligned in struct pcb
- * (due to the use of "strd" when compiled for XSCALE)
- */
- u_int pcb32_r8; /* used */
- u_int pcb32_r9; /* used */
- u_int pcb32_r10; /* used */
- u_int pcb32_r11; /* used */
- u_int pcb32_r12; /* used */
- u_int pcb32_sp; /* used */
- u_int pcb32_lr;
- u_int pcb32_pc;
- u_int pcb32_und_sp;
-};
-#define pcb_pagedir un_32.pcb32_pagedir
-#define pcb_pl1vec un_32.pcb32_pl1vec
-#define pcb_l1vec un_32.pcb32_l1vec
-#define pcb_dacr un_32.pcb32_dacr
-#define pcb_cstate un_32.pcb32_cstate
-
-/*
- * WARNING!
- * See warning for struct pcb_arm32, above, before changing struct pcb!
- */
-struct pcb {
- u_int pcb_flags;
-#define PCB_OWNFPU 0x00000001
-#define PCB_NOALIGNFLT 0x00000002
- caddr_t pcb_onfault; /* On fault handler */
- struct pcb_arm32 un_32;
- struct fpe_sp_state pcb_fpstate; /* Floating Point state */
-};
-
-/*
- * No additional data for core dumps.
- */
-struct md_coredump {
- int md_empty;
-};
-
-void makectx(struct trapframe *tf, struct pcb *pcb);
-
-#ifdef _KERNEL
-
-void savectx(struct pcb *);
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_PCB_H_ */
--- sys/arm/include/ucontext.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/* $NetBSD: mcontext.h,v 1.4 2003/10/08 22:43:01 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Klaus Klein and by Jason R. Thorpe of Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/ucontext.h,v 1.2 2004/05/14 11:46:44 cognet Exp $
- */
-
-#ifndef _MACHINE_MCONTEXT_H_
-#define _MACHINE_MCONTEXT_H_
-/*
- * General register state
- */
-#define _NGREG 17
-typedef unsigned int __greg_t;
-typedef __greg_t __gregset_t[_NGREG];
-
-#define _REG_R0 0
-#define _REG_R1 1
-#define _REG_R2 2
-#define _REG_R3 3
-#define _REG_R4 4
-#define _REG_R5 5
-#define _REG_R6 6
-#define _REG_R7 7
-#define _REG_R8 8
-#define _REG_R9 9
-#define _REG_R10 10
-#define _REG_R11 11
-#define _REG_R12 12
-#define _REG_R13 13
-#define _REG_R14 14
-#define _REG_R15 15
-#define _REG_CPSR 16
-/* Convenience synonyms */
-#define _REG_FP _REG_R11
-#define _REG_SP _REG_R13
-#define _REG_LR _REG_R14
-#define _REG_PC _REG_R15
-
-/*
- * Floating point register state
- */
-/* Note: the storage layout of this structure must be identical to ARMFPE! */
-typedef struct {
- unsigned int __fp_fpsr;
- struct {
- unsigned int __fp_exponent;
- unsigned int __fp_mantissa_hi;
- unsigned int __fp_mantissa_lo;
- } __fp_fr[8];
-} __fpregset_t;
-
-typedef struct {
- unsigned int __vfp_fpscr;
- unsigned int __vfp_fstmx[33];
- unsigned int __vfp_fpsid;
-} __vfpregset_t;
-
-typedef struct {
- __gregset_t __gregs;
- union {
- __fpregset_t __fpregs;
- __vfpregset_t __vfpregs;
- } __fpu;
-} mcontext_t;
-
-/* Machine-dependent uc_flags */
-#define _UC_ARM_VFP 0x00010000 /* FPU field is VFP */
-
-/* used by signal delivery to indicate status of signal stack */
-#define _UC_SETSTACK 0x00020000
-#define _UC_CLRSTACK 0x00040000
-
-#define _UC_MACHINE_PAD 3 /* Padding appended to ucontext_t */
-
-#define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_SP])
-#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
-#define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_R0])
-
-#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc)
-
-#endif /* !_MACHINE_MCONTEXT_H_ */
--- sys/arm/include/sysarch.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* $NetBSD: sysarch.h,v 1.5 2003/09/11 09:40:12 kleink Exp $ */
-
-/*-
- * Copyright (c) 1996-1997 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/* $FreeBSD: src/sys/arm/include/sysarch.h,v 1.4 2005/02/26 18:59:01 cognet Exp $ */
-
-#ifndef _ARM_SYSARCH_H_
-#define _ARM_SYSARCH_H_
-
-#include <sys/cdefs.h>
-
-/*
- * Pickup definition of uintptr_t
- */
-#include <sys/stdint.h>
-
-/*
- * Architecture specific syscalls (arm)
- */
-
-#define ARM_SYNC_ICACHE 0
-#define ARM_DRAIN_WRITEBUF 1
-#define ARM_SET_TP 2
-#define ARM_GET_TP 3
-
-#define ARM_TP_ADDRESS 0xe0000000 /* Magic */
-
-struct arm_sync_icache_args {
- uintptr_t addr; /* Virtual start address */
- size_t len; /* Region size */
-};
-
-#ifndef _KERNEL
-__BEGIN_DECLS
-int arm_sync_icache (u_int addr, int len);
-int arm_drain_writebuf (void);
-int sysarch(int, void *);
-__END_DECLS
-#endif
-
-#endif /* !_ARM_SYSARCH_H_ */
--- sys/arm/include/cpuconf.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/* $NetBSD: cpuconf.h,v 1.8 2003/09/06 08:55:42 rearnsha Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/cpuconf.h,v 1.5 2005/05/26 16:05:22 cognet Exp $
- *
- */
-
-#ifndef _MACHINE_CPUCONF_H_
-#define _MACHINE_CPUCONF_H_
-
-/*
- * IF YOU CHANGE THIS FILE, MAKE SURE TO UPDATE THE DEFINITION OF
- * "PMAP_NEEDS_PTE_SYNC" IN <arm/arm32/pmap.h> FOR THE CPU TYPE
- * YOU ARE ADDING SUPPORT FOR.
- */
-
-/*
- * Step 1: Count the number of CPU types configured into the kernel.
- */
-#define CPU_NTYPES 2
-
-/*
- * Step 2: Determine which ARM architecture versions are configured.
- */
-
-#if (defined(CPU_ARM7TDMI) || defined(CPU_ARM8) || defined(CPU_ARM9) || \
- defined(CPU_ARM10) || defined(CPU_SA110) || defined(CPU_SA1100) || \
- defined(CPU_SA1110) || defined(CPU_IXP12X0) || defined(CPU_XSCALE_IXP425))
-#define ARM_ARCH_4 1
-#else
-#define ARM_ARCH_4 0
-#endif
-
-#if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0))
-#define ARM_ARCH_5 1
-#else
-#define ARM_ARCH_5 0
-#endif
-
-#define ARM_NARCH (ARM_ARCH_4 + ARM_ARCH_5)
-#if ARM_NARCH == 0 && !defined(KLD_MODULE)
-#error ARM_NARCH is 0
-#endif
-
-/*
- * Step 3: Define which MMU classes are configured:
- *
- * ARM_MMU_MEMC Prehistoric, external memory controller
- * and MMU for ARMv2 CPUs.
- *
- * ARM_MMU_GENERIC Generic ARM MMU, compatible with ARM6.
- *
- * ARM_MMU_SA1 StrongARM SA-1 MMU. Compatible with generic
- * ARM MMU, but has no write-through cache mode.
- *
- * ARM_MMU_XSCALE XScale MMU. Compatible with generic ARM
- * MMU, but also has several extensions which
- * require different PTE layout to use.
- */
-#if (defined(CPU_ARM2) || defined(CPU_ARM250) || defined(CPU_ARM3))
-#define ARM_MMU_MEMC 1
-#else
-#define ARM_MMU_MEMC 0
-#endif
-
-#if (defined(CPU_ARM6) || defined(CPU_ARM7) || defined(CPU_ARM7TDMI) || \
- defined(CPU_ARM8) || defined(CPU_ARM9) || defined(CPU_ARM10))
-#define ARM_MMU_GENERIC 1
-#else
-#define ARM_MMU_GENERIC 0
-#endif
-
-#if (defined(CPU_SA110) || defined(CPU_SA1100) || defined(CPU_SA1110) ||\
- defined(CPU_IXP12X0))
-#define ARM_MMU_SA1 1
-#else
-#define ARM_MMU_SA1 0
-#endif
-
-#if(defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \
- defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425))
-#define ARM_MMU_XSCALE 1
-#else
-#define ARM_MMU_XSCALE 0
-#endif
-
-#define ARM_NMMUS (ARM_MMU_MEMC + ARM_MMU_GENERIC + \
- ARM_MMU_SA1 + ARM_MMU_XSCALE)
-#if ARM_NMMUS == 0 && !defined(KLD_MODULE)
-#error ARM_NMMUS is 0
-#endif
-
-/*
- * Step 4: Define features that may be present on a subset of CPUs
- *
- * ARM_XSCALE_PMU Performance Monitoring Unit on 80200 and 80321
- */
-
-#if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321))
-#define ARM_XSCALE_PMU 1
-#else
-#define ARM_XSCALE_PMU 0
-#endif
-
-#endif /* _MACHINE_CPUCONF_H_ */
--- sys/arm/include/profile.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/*-
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)profile.h 8.1 (Berkeley) 6/11/93
- * $FreeBSD: src/sys/arm/include/profile.h,v 1.6 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _MACHINE_PROFILE_H_
-#define _MACHINE_PROFILE_H_
-
-/*
- * Config generates something to tell the compiler to align functions on 32
- * byte boundaries. A strict alignment is good for keeping the tables small.
- */
-#define FUNCTION_ALIGNMENT 16
-
-
-#define _MCOUNT_DECL void mcount
-
-typedef u_long fptrdiff_t;
-
-/*
- * Cannot implement mcount in C as GCC will trash the ip register when it
- * pushes a trapframe. Pity we cannot insert assembly before the function
- * prologue.
- */
-
-#ifndef PLTSYM
-#define PLTSYM
-#endif
-
-#define MCOUNT \
- __asm__(".text"); \
- __asm__(".align 0"); \
- __asm__(".type _mcount ,%function"); \
- __asm__(".global _mcount"); \
- __asm__("_mcount:"); \
- /* \
- * Preserve registers that are trashed during mcount \
- */ \
- __asm__("stmfd sp!, {r0-r3, ip, lr}"); \
- /* \
- * find the return address for mcount, \
- * and the return address for mcount's caller. \
- * \
- * frompcindex = pc pushed by call into self. \
- */ \
- __asm__("mov r0, ip"); \
- /* \
- * selfpc = pc pushed by mcount call \
- */ \
- __asm__("mov r1, lr"); \
- /* \
- * Call the real mcount code \
- */ \
- __asm__("bl mcount"); \
- /* \
- * Restore registers that were trashed during mcount \
- */ \
- __asm__("ldmfd sp!, {r0-r3, lr, pc}");
-void bintr(void);
-void btrap(void);
-void eintr(void);
-void user(void);
-
-#define MCOUNT_FROMPC_USER(pc) \
- ((pc < (uintfptr_t)VM_MAXUSER_ADDRESS) ? (uintfptr_t)user : pc)
-
-#define MCOUNT_FROMPC_INTR(pc) \
- ((pc >= (uintfptr_t)btrap && pc < (uintfptr_t)eintr) ? \
- ((pc >= (uintfptr_t)bintr) ? (uintfptr_t)bintr : \
- (uintfptr_t)btrap) : ~0U)
-
-
-#ifdef _KERNEL
-
-#define MCOUNT_DECL(s) register_t s;
-
-#include <machine/asm.h>
-#include <machine/cpufunc.h>
-/*
- * splhigh() and splx() are heavyweight, and call mcount(). Therefore
- * we disabled interrupts (IRQ, but not FIQ) directly on the CPU.
- *
- * We're lucky that the CPSR and 's' both happen to be 'int's.
- */
-#define MCOUNT_ENTER(s) {s = intr_disable(); } /* kill IRQ */
-#define MCOUNT_EXIT(s) {intr_restore(s); } /* restore old value */
-
-void mcount(uintfptr_t frompc, uintfptr_t selfpc);
-
-#else
-typedef u_int uintfptr_t;
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_PROFILE_H_ */
--- sys/arm/include/intr.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* $NetBSD: intr.h,v 1.7 2003/06/16 20:01:00 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/intr.h,v 1.5 2005/06/09 12:26:19 cognet Exp $
- *
- */
-
-#ifndef _MACHINE_INTR_H_
-#define _MACHINE_INTR_H_
-
-#ifdef CPU_ARM9
-#define NIRQ 64
-#else
-#define NIRQ 32
-#endif
-
-#include <machine/psl.h>
-
-int arm_get_next_irq(void);
-void arm_mask_irq(uintptr_t);
-void arm_unmask_irq(uintptr_t);
-void arm_setup_irqhandler(const char *, void (*)(void*), void *, int, int,
- void **);
-int arm_remove_irqhandler(void *);
-#endif /* _MACHINE_INTR_H */
--- sys/arm/include/_bus.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*-
-% * Copyright (c) 2005 M. Warner Losh.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/_bus.h,v 1.1 2005/04/18 21:45:33 imp Exp $
- */
-
-#ifndef ARM_INCLUDE__BUS_H
-#define ARM_INCLUDE__BUS_H
-
-/*
- * Addresses (in bus space).
- */
-typedef u_long bus_addr_t;
-typedef u_long bus_size_t;
-
-/*
- * Access methods for bus space.
- */
-typedef struct bus_space *bus_space_tag_t;
-typedef u_long bus_space_handle_t;
-
-#endif /* ARM_INCLUDE__BUS_H */
--- sys/arm/include/undefined.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/* $NetBSD: undefined.h,v 1.4 2001/12/20 01:20:23 thorpej Exp $ */
-
-/*-
- * Copyright (c) 1995-1996 Mark Brinicombe.
- * Copyright (c) 1995 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * undefined.h
- *
- * Undefined instruction types, symbols and prototypes
- *
- * Created : 08/02/95
- *
- * $FreeBSD: src/sys/arm/include/undefined.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-
-#ifndef _MACHINE_UNDEFINED_H_
-#define _MACHINE_UNDEFINED_H_
-#ifdef _KERNEL
-
-#include <sys/queue.h>
-
-typedef int (*undef_handler_t) __P((unsigned int, unsigned int, trapframe_t *, int));
-
-#define FP_COPROC 1
-#define FP_COPROC2 2
-#define MAX_COPROCS 16
-
-/* Prototypes for undefined.c */
-
-void *install_coproc_handler __P((int, undef_handler_t));
-void remove_coproc_handler __P((void *));
-void undefined_init __P((void));
-
-/*
- * XXX Stuff below here is for use before malloc() is available. Most code
- * shouldn't use it.
- */
-
-struct undefined_handler {
- LIST_ENTRY(undefined_handler) uh_link;
- undef_handler_t uh_handler;
-};
-
-/*
- * Handlers installed using install_coproc_handler_static shouldn't be
- * removed.
- */
-void install_coproc_handler_static __P((int, struct undefined_handler *));
-
-/* Calls up to undefined.c from trap handlers */
-void undefinedinstruction(struct trapframe *);
-
-#endif
-
-/* End of undefined.h */
-
-#endif /* _MACHINE_UNDEFINED_H_ */
--- sys/arm/include/blockio.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* $NetBSD: blockio.h,v 1.2 2001/06/02 10:44:56 bjh21 Exp $ */
-
-/*-
- * Copyright (c) 2001 Ben Harris
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/include/blockio.h,v 1.1 2004/05/14 11:46:44 cognet Exp $
- *
- */
-/*
- * blockio.h - low level functions for bulk PIO data transfer
- */
-
-#ifndef _MACHINE_BLOCKIO_H_
-#define _MACHINE_BLOCKIO_H_
-
-/*
- * All these take three arguments:
- * I/O address
- * Memory address
- * Number of bytes to copy
- */
-
-void read_multi_1(u_int, void *, u_int);
-void write_multi_1(u_int, const void *, u_int);
-#define read_multi_2 insw16
-#define write_multi_2 outsw16
-
-void insw(u_int, void *, u_int);
-void outsw(u_int, void *, u_int);
-void insw16(u_int, void *, u_int);
-void outsw16(u_int, void *, u_int);
-
-#endif /* !_MACHINE_BLOCKIO_H_ */
--- sys/arm/xscale/xscalevar.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* $NetBSD: xscalevar.h,v 1.1 2002/10/08 23:59:41 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/xscale/xscalevar.h,v 1.2 2005/01/05 21:58:49 imp Exp $
- *
- */
-
-#ifndef _ARM_XSCALE_XSCALEVAR_H_
-#define _ARM_XSCALE_XSCALEVAR_H_
-
-/* Performance Monitoring Unit */
-void xscale_pmu_init(void);
-int xscale_pmc_dispatch(void *);
-
-#endif /* _ARM_XSCALE_XSCALEVAR_H_ */
--- sys/arm/xscale/xscalereg.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/* $NetBSD: xscalereg.h,v 1.2 2002/08/07 05:15:02 briggs Exp $ */
-
-/*-
- * Copyright (c) 2001 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/xscale/xscalereg.h,v 1.2 2005/01/05 21:58:49 imp Exp $
- */
-
-#ifndef _ARM_XSCALE_XSCALEREG_H_
-#define _ARM_XSCALE_XSCALEREG_H_
-
-/*
- * Register definitions for the Intel XScale processor core.
- */
-
-/*
- * Performance Monitoring Unit (CP14)
- *
- * CP14.0 Performance Monitor Control Register
- * CP14.1 Clock Counter
- * CP14.2 Performance Counter Register 0
- * CP14.3 Performance Counter Register 1
- */
-
-#define PMNC_E 0x00000001 /* enable counters */
-#define PMNC_P 0x00000002 /* reset both PMNs to 0 */
-#define PMNC_C 0x00000004 /* clock counter reset */
-#define PMNC_D 0x00000008 /* clock counter / 64 */
-#define PMNC_PMN0_IE 0x00000010 /* enable PMN0 interrupt */
-#define PMNC_PMN1_IE 0x00000020 /* enable PMN1 interrupt */
-#define PMNC_CC_IE 0x00000040 /* enable clock counter interrupt */
-#define PMNC_PMN0_IF 0x00000100 /* PMN0 overflow/interrupt */
-#define PMNC_PMN1_IF 0x00000200 /* PMN1 overflow/interrupt */
-#define PMNC_CC_IF 0x00000400 /* clock counter overflow/interrupt */
-#define PMNC_EVCNT0_MASK 0x000ff000 /* event to count for PMN0 */
-#define PMNC_EVCNT0_SHIFT 12
-#define PMNC_EVCNT1_MASK 0x0ff00000 /* event to count for PMN1 */
-#define PMNC_EVCNT1_SHIFT 20
-
-void xscale_pmu_init(void);
-
-#endif /* _ARM_XSCALE_XSCALEREG_H_ */
--- sys/arm/xscale/std.xscale
+++ /dev/null
@@ -1,2 +0,0 @@
-# $FreeBSD: src/sys/arm/xscale/std.xscale,v 1.1 2005/02/26 18:59:01 cognet Exp $
-options ARM_CACHE_LOCK_ENABLE
--- sys/ia64/include/sapicvar.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/sapicvar.h,v 1.4 2003/09/10 22:49:38 marcel Exp $
- */
-
-#ifndef _MACHINE_SAPICVAR_H_
-#define _MACHINE_SAPICVAR_H_
-
-struct sapic {
- int sa_id; /* I/O SAPIC Id */
- int sa_base; /* ACPI vector base */
- int sa_limit; /* last ACPI vector handled here */
- vm_offset_t sa_registers; /* virtual address of sapic */
-};
-
-#define SAPIC_TRIGGER_EDGE 0
-#define SAPIC_TRIGGER_LEVEL 1
-
-#define SAPIC_POLARITY_HIGH 0
-#define SAPIC_POLARITY_LOW 1
-
-#define SAPIC_DELMODE_FIXED 0
-#define SAPIC_DELMODE_LOWPRI 1
-#define SAPIC_DELMODE_PMI 2
-#define SAPIC_DELMODE_NMI 4
-#define SAPIC_DELMODE_INIT 5
-#define SAPIC_DELMODE_EXTINT 7
-
-int sapic_config_intr(int irq, enum intr_trigger, enum intr_polarity);
-struct sapic *sapic_create(int id, int base, uint64_t address);
-int sapic_enable(int irq, int vector);
-void sapic_eoi(struct sapic *sa, int vector);
-#ifdef DDB
-void sapic_print(struct sapic *sa, int input);
-#endif
-
-#endif /* ! _MACHINE_SAPICVAR_H_ */
--- sys/ia64/include/signal.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/signal.h,v 1.13 2005/01/06 22:18:23 imp Exp $ */
-/* From: NetBSD: signal.h,v 1.3 1997/04/06 08:47:43 cgd Exp */
-
-/*-
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- *
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-#ifndef _MACHINE_SIGNAL_H_
-#define _MACHINE_SIGNAL_H_
-
-#include <sys/cdefs.h>
-#include <sys/_sigset.h>
-
-typedef long sig_atomic_t;
-
-#if __BSD_VISIBLE
-/* portable macros for SIGFPE/ARITHTRAP */
-#define FPE_INTOVF 1 /* integer overflow */
-#define FPE_INTDIV 2 /* integer divide by zero */
-#define FPE_FLTDIV 3 /* floating point divide by zero */
-#define FPE_FLTOVF 4 /* floating point overflow */
-#define FPE_FLTUND 5 /* floating point underflow */
-#define FPE_FLTRES 6 /* floating point inexact result */
-#define FPE_FLTINV 7 /* invalid floating point operation */
-#define FPE_FLTSUB 8 /* subscript out of range */
-
-#define BUS_SEGM_FAULT 30 /* segment protection base */
-#endif
-
-#if __XSI_VISIBLE
-/* Minimum signal stack size. */
-#define MINSIGSTKSZ (3072 * 4)
-#endif
-
-/*
- * Information pushed on stack when a signal is delivered.
- * This is used by the kernel to restore state following
- * execution of the signal handler. It is also made available
- * to the handler to allow it to restore state properly if
- * a non-standard exit is performed.
- */
-
-#if __BSD_VISIBLE
-#include <machine/_regset.h>
-
-/*
- * The sequence of the fields should match those in
- * mcontext_t. Keep them in sync!
- */
-struct sigcontext {
- struct __sigset sc_mask; /* signal mask to restore */
- unsigned long sc_onstack;
- unsigned long sc_flags;
- struct _special sc_special;
- struct _callee_saved sc_preserved;
- struct _callee_saved_fp sc_preserved_fp;
- struct _caller_saved sc_scratch;
- struct _caller_saved_fp sc_scratch_fp;
- struct _high_fp sc_high_fp;
-};
-#endif /* __BSD_VISIBLE */
-
-#endif /* !_MACHINE_SIGNAL_H_*/
--- sys/ia64/include/ptrace.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*-
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)ptrace.h 8.1 (Berkeley) 6/11/93
- * $FreeBSD: src/sys/ia64/include/ptrace.h,v 1.6 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_PTRACE_H_
-#define _MACHINE_PTRACE_H_
-
-#define __HAVE_PTRACE_MACHDEP
-
-/* Fetch/store dirty registers on the kernel stack. */
-#define PT_GETKSTACK (PT_FIRSTMACH + 0)
-#define PT_SETKSTACK (PT_FIRSTMACH + 1)
-
-#endif /* _MACHINE_PTRACE_H_ */
--- sys/ia64/include/setjmp.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*-
- * Copyright (c) 2000
- * Intel Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- *
- * This product includes software developed by Intel Corporation and
- * its contributors.
- *
- * 4. Neither the name of Intel Corporation or its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION AND CONTRIBUTORS ``AS IS''
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
- * THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/setjmp.h,v 1.12 2003/07/26 08:03:43 marcel Exp $
- */
-
-#ifndef _MACHINE_SETJMP_H_
-#define _MACHINE_SETJMP_H_
-
-#include <sys/cdefs.h>
-
-#if __BSD_VISIBLE
-#define JMPBUF_ADDR_OF(buf, item) ((unsigned long)((char *)buf + item))
-
-#define J_UNAT 0
-#define J_NATS 0x8
-#define J_PFS 0x10
-#define J_BSP 0x18
-#define J_RNAT 0x20
-#define J_PREDS 0x28
-#define J_LC 0x30
-#define J_R4 0x38
-#define J_R5 0x40
-#define J_R6 0x48
-#define J_R7 0x50
-#define J_SP 0x58
-#define J_F2 0x60
-#define J_F3 0x70
-#define J_F4 0x80
-#define J_F5 0x90
-#define J_F16 0xa0
-#define J_F17 0xb0
-#define J_F18 0xc0
-#define J_F19 0xd0
-#define J_F20 0xe0
-#define J_F21 0xf0
-#define J_F22 0x100
-#define J_F23 0x110
-#define J_F24 0x120
-#define J_F25 0x130
-#define J_F26 0x140
-#define J_F27 0x150
-#define J_F28 0x160
-#define J_F29 0x170
-#define J_F30 0x180
-#define J_F31 0x190
-#define J_FPSR 0x1a0
-#define J_B0 0x1a8
-#define J_B1 0x1b0
-#define J_B2 0x1b8
-#define J_B3 0x1c0
-#define J_B4 0x1c8
-#define J_B5 0x1d0
-#define J_SIGMASK 0x1d8
-#define J_SIGSET 0x1e0
-#endif /* __BSD_VISIBLE */
-
-#define _JBLEN 0x20 /* Size in long doubles */
-
-/*
- * XXX this check is wrong, since LOCORE is in the application namespace and
- * applications shouldn't be able to affect the implementation. One workaround
- * would be to only check LOCORE if _KERNEL is defined, but unfortunately
- * LOCORE is used outside of the kernel. The best solution would be to rename
- * LOCORE to _LOCORE, so that it can be used in userland to safely affect the
- * implementation.
- */
-#ifndef LOCORE
-
-/*
- * jmp_buf and sigjmp_buf are encapsulated in different structs to force
- * compile-time diagnostics for mismatches. The structs are the same
- * internally to avoid some run-time errors for mismatches.
- */
-#if __BSD_VISIBLE || __POSIX_VISIBLE || __XSI_VISIBLE
-struct _sigjmp_buf {
- long double buf[_JBLEN];
-};
-typedef struct _sigjmp_buf sigjmp_buf[1];
-#endif
-
-struct _jmp_buf {
- long double buf[_JBLEN];
-};
-typedef struct _jmp_buf jmp_buf[1];
-
-#ifdef _KERNEL
-#ifdef CTASSERT
-CTASSERT(sizeof(struct _jmp_buf) == 512);
-#endif
-#endif
-
-#endif /* !LOCORE */
-
-#endif /* !_MACHINE_SETJMP_H_ */
--- sys/ia64/include/fpu.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/fpu.h,v 1.3 2004/12/11 06:15:12 marcel Exp $
- */
-
-#ifndef _MACHINE_FPU_H_
-#define _MACHINE_FPU_H_
-
-/*
- * Floating point status register bits.
- */
-
-#define IA64_FPSR_TRAP_VD 0x0000000000000001L
-#define IA64_FPSR_TRAP_DD 0x0000000000000002L
-#define IA64_FPSR_TRAP_ZD 0x0000000000000004L
-#define IA64_FPSR_TRAP_OD 0x0000000000000008L
-#define IA64_FPSR_TRAP_UD 0x0000000000000010L
-#define IA64_FPSR_TRAP_ID 0x0000000000000020L
-#define IA64_FPSR_SF(i,v) ((v) << ((i)*13+6))
-
-#define IA64_SF_FTZ 0x0001L
-#define IA64_SF_WRE 0x0002L
-#define IA64_SF_PC 0x000cL
-#define IA64_SF_PC_0 0x0000L
-#define IA64_SF_PC_1 0x0004L
-#define IA64_SF_PC_2 0x0008L
-#define IA64_SF_PC_3 0x000cL
-#define IA64_SF_RC 0x0030L
-#define IA64_SF_RC_NEAREST 0x0000L
-#define IA64_SF_RC_NEGINF 0x0010L
-#define IA64_SF_RC_POSINF 0x0020L
-#define IA64_SF_RC_TRUNC 0x0030L
-#define IA64_SF_TD 0x0040L
-#define IA64_SF_V 0x0080L
-#define IA64_SF_D 0x0100L
-#define IA64_SF_Z 0x0200L
-#define IA64_SF_O 0x0400L
-#define IA64_SF_U 0x0800L
-#define IA64_SF_I 0x1000L
-
-#define IA64_SF_DEFAULT (IA64_SF_PC_3 | IA64_SF_RC_NEAREST)
-
-#define IA64_FPSR_DEFAULT (IA64_FPSR_TRAP_VD \
- | IA64_FPSR_TRAP_DD \
- | IA64_FPSR_TRAP_ZD \
- | IA64_FPSR_TRAP_OD \
- | IA64_FPSR_TRAP_UD \
- | IA64_FPSR_TRAP_ID \
- | IA64_FPSR_SF(0, IA64_SF_DEFAULT) \
- | IA64_FPSR_SF(1, (IA64_SF_DEFAULT \
- | IA64_SF_TD \
- | IA64_SF_WRE)) \
- | IA64_FPSR_SF(2, (IA64_SF_DEFAULT \
- | IA64_SF_TD)) \
- | IA64_FPSR_SF(3, (IA64_SF_DEFAULT \
- | IA64_SF_TD)))
-
-struct fpswa_ret {
- unsigned long status;
- unsigned long err1;
- unsigned long err2;
- unsigned long err3;
-};
-
-struct fpswa_bundle {
- long double bits; /* Force 16-byte alignment. */
-};
-
-struct fpswa_fpctx {
- unsigned long mask_low; /* f63 - f2 */
- unsigned long mask_high; /* f127 - f64 */
- union _ia64_fpreg *fp_low_preserved; /* f2 - f5 */
- union _ia64_fpreg *fp_low_volatile; /* f6 - f15 */
- union _ia64_fpreg *fp_high_preserved; /* f16 - f31 */
- union _ia64_fpreg *fp_high_volatile; /* f32 - f127 */
-};
-
-struct fpswa_iface {
- unsigned int if_rev;
- unsigned int __res;
- struct fpswa_ret (*if_fpswa)(unsigned long, struct fpswa_bundle *,
- unsigned long *, unsigned long *, unsigned long *, unsigned long *,
- unsigned long *, struct fpswa_fpctx *);
-};
-
-#endif /* ! _MACHINE_FPU_H_ */
--- sys/ia64/include/floatingpoint.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*-
- * Copyright (c) 1998 John Birrell <jb at cimlogic.com.au>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by John Birrell.
- * 4. Neither the name of the author nor the names of any co-contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/floatingpoint.h,v 1.2 2005/01/06 22:18:23 imp Exp $
- */
-
-#include <machine/ieeefp.h>
--- sys/ia64/include/gdb_machdep.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/gdb_machdep.h,v 1.4 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_GDB_MACHDEP_H_
-#define _MACHINE_GDB_MACHDEP_H_
-
-#define GDB_NREGS 462
-#define GDB_REG_PC 331
-
-#define GDB_BUFSZ (GDB_NREGS*16+128*16)
-
-static __inline size_t
-gdb_cpu_regsz(int regnum)
-{
- return ((regnum >= 128 && regnum < 256) ? 16 : 8);
-}
-
-void *gdb_cpu_getreg(int, size_t *);
-void gdb_cpu_setreg(int, void *);
-int gdb_cpu_signal(int, int);
-int gdb_cpu_query(void);
-
-#endif /* !_MACHINE_GDB_MACHDEP_H_ */
--- sys/ia64/include/bus_dma.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*-
- * Copyright (c) 2005 Scott Long
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-/* $FreeBSD: src/sys/ia64/include/bus_dma.h,v 1.1 2005/03/14 16:46:27 scottl Exp $ */
-
-#ifndef _IA64_BUS_DMA_H_
-#define _IA64_BUS_DMA_H_
-
-#include <sys/bus_dma.h>
-
-#endif /* _IA64_BUS_DMA_H_ */
--- sys/ia64/include/nexusvar.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*-
- * Copyright (c) 2000 Peter Wemm <peter at FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/nexusvar.h,v 1.2 2002/08/22 19:47:10 mux Exp $
- */
-
-#ifndef _MACHINE_NEXUSVAR_H_
-#define _MACHINE_NEXUSVAR_H_ 1
-
-enum nexus_device_ivars {
- NEXUS_IVAR_PCIBUS
-};
-
-#define NEXUS_ACCESSOR(var, ivar, type) \
- __BUS_ACCESSOR(nexus, var, NEXUS, ivar, type)
-
-NEXUS_ACCESSOR(pcibus, PCIBUS, u_int32_t)
-
-#undef NEXUS_ACCESSOR
-
-#endif /* !_MACHINE_NEXUSVAR_H_ */
--- sys/ia64/include/resource.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/resource.h,v 1.2 2005/01/06 22:18:23 imp Exp $ */
-/*-
- * Copyright 1998 Massachusetts Institute of Technology
- *
- * Permission to use, copy, modify, and distribute this software and
- * its documentation for any purpose and without fee is hereby
- * granted, provided that both the above copyright notice and this
- * permission notice appear in all copies, that both the above
- * copyright notice and this permission notice appear in all
- * supporting documentation, and that the name of M.I.T. not be used
- * in advertising or publicity pertaining to distribution of the
- * software without specific, written prior permission. M.I.T. makes
- * no representations about the suitability of this software for any
- * purpose. It is provided "as is" without express or implied
- * warranty.
- *
- * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
- * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
- * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_RESOURCE_H_
-#define _MACHINE_RESOURCE_H_ 1
-
-/*
- * Definitions of resource types for Intel Architecture machines
- * with support for legacy ISA devices and drivers.
- */
-
-#define SYS_RES_IRQ 1 /* interrupt lines */
-#define SYS_RES_DRQ 2 /* isa dma lines */
-#define SYS_RES_MEMORY 3 /* i/o memory */
-#define SYS_RES_IOPORT 4 /* i/o ports */
-
-#endif /* !_MACHINE_RESOURCE_H_ */
--- sys/ia64/include/smp.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * $FreeBSD: src/sys/ia64/include/smp.h,v 1.9.2.1 2005/09/13 21:07:14 marcel Exp $
- */
-#ifndef _MACHINE_SMP_H_
-#define _MACHINE_SMP_H_
-
-#ifdef _KERNEL
-
-/*
- * Interprocessor interrupts for SMP. The following values are indices
- * into the IPI vector table. The SAL gives us the vector used for AP
- * wake-up. We base the other vectors on that. Keep IPI_AP_WAKEUP at
- * index 0. See sal.c for details.
- */
-/* Architecture specific IPIs. */
-#define IPI_AP_WAKEUP 0
-#define IPI_HIGH_FP 1
-#define IPI_MCA_CMCV 2
-#define IPI_MCA_RENDEZ 3
-#define IPI_TEST 4
-/* Machine independent IPIs. */
-#define IPI_AST 5
-#define IPI_RENDEZVOUS 6
-#define IPI_STOP 7
-#define IPI_PREEMPT 8
-
-#define IPI_COUNT 9
-
-#ifndef LOCORE
-
-struct pcpu;
-
-extern int ipi_vector[];
-
-void ipi_all(int ipi);
-void ipi_all_but_self(int ipi);
-void ipi_selected(cpumask_t cpus, int ipi);
-void ipi_self(int ipi);
-void ipi_send(struct pcpu *, int ipi);
-
-#endif /* !LOCORE */
-#endif /* _KERNEL */
-#endif /* !_MACHINE_SMP_H */
--- sys/ia64/include/param.h
+++ /dev/null
@@ -1,141 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/param.h,v 1.20.2.1 2005/09/13 21:07:14 marcel Exp $ */
-/* From: NetBSD: param.h,v 1.20 1997/09/19 13:52:53 leo Exp */
-
-/*-
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: Utah $Hdr: machparam.h 1.11 89/08/14$
- *
- * @(#)param.h 8.1 (Berkeley) 6/10/93
- */
-
-/*
- * Machine dependent constants for the IA64.
- */
-/*
- * Round p (pointer or byte index) up to a correctly-aligned value for all
- * data types (int, long, ...). The result is u_long and must be cast to
- * any desired pointer type.
- *
- * ALIGNED_POINTER is a boolean macro that checks whether an address
- * is valid to fetch data elements of type t from on this architecture.
- * This does not reflect the optimal alignment, just the possibility
- * (within reasonable limits).
- *
- */
-#ifndef _ALIGNBYTES
-#define _ALIGNBYTES 15
-#endif
-#ifndef _ALIGN
-#define _ALIGN(p) (((u_long)(p) + _ALIGNBYTES) &~ _ALIGNBYTES)
-#endif
-#ifndef _ALIGNED_POINTER
-#define _ALIGNED_POINTER(p,t) ((((u_long)(p)) & (sizeof(t)-1)) == 0)
-#endif
-
-#ifndef _MACHINE
-#define _MACHINE ia64
-#endif
-#ifndef _MACHINE_ARCH
-#define _MACHINE_ARCH ia64
-#endif
-
-#ifndef _NO_NAMESPACE_POLLUTION
-
-#ifndef _MACHINE_PARAM_H_
-#define _MACHINE_PARAM_H_
-
-#ifndef MACHINE
-#define MACHINE "ia64"
-#endif
-#ifndef MACHINE_ARCH
-#define MACHINE_ARCH "ia64"
-#endif
-
-#ifdef SMP
-#define MAXCPU 4
-#else
-#define MAXCPU 1
-#endif
-
-/*
- * Round p (pointer or byte index) up to a correctly-aligned value for all
- * data types (int, long, ...). The result is u_long and must be cast to
- * any desired pointer type.
- *
- * ALIGNED_POINTER is a boolean macro that checks whether an address
- * is valid to fetch data elements of type t from on this architecture.
- * This does not reflect the optimal alignment, just the possibility
- * (within reasonable limits).
- *
- */
-#define ALIGNBYTES _ALIGNBYTES
-#define ALIGN(p) _ALIGN(p)
-#define ALIGNED_POINTER(p,t) _ALIGNED_POINTER(p,t)
-
-#ifndef LOG2_PAGE_SIZE
-#define LOG2_PAGE_SIZE 13 /* 8K pages by default. */
-#endif
-#define PAGE_SHIFT (LOG2_PAGE_SIZE)
-#define PAGE_SIZE (1<<(LOG2_PAGE_SIZE))
-#define PAGE_MASK (PAGE_SIZE-1)
-#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
-
-#define CLSIZE 1
-#define CLSIZELOG2 0
-
-/* NOTE: SSIZE, SINCR and UPAGES must be multiples of CLSIZE */
-#define SSIZE 1 /* initial stack size/NBPG */
-#define SINCR 1 /* increment of stack/NBPG */
-
-#ifndef KSTACK_PAGES
-#define KSTACK_PAGES 4 /* pages of kernel stack */
-#endif
-#define KSTACK_GUARD_PAGES 0 /* pages of kstack guard; 0 disables */
-
-/*
- * Mach derived conversion macros
- */
-#define round_page(x) ((((unsigned long)(x)) + PAGE_MASK) & ~(PAGE_MASK))
-#define trunc_page(x) ((unsigned long)(x) & ~(PAGE_MASK))
-
-#define atop(x) ((unsigned long)(x) >> PAGE_SHIFT)
-#define ptoa(x) ((unsigned long)(x) << PAGE_SHIFT)
-
-#define ia64_btop(x) ((unsigned long)(x) >> PAGE_SHIFT)
-#define ia64_ptob(x) ((unsigned long)(x) << PAGE_SHIFT)
-
-#define pgtok(x) ((x) * (PAGE_SIZE / 1024))
-
-#endif /* !_MACHINE_PARAM_H_ */
-#endif /* !_NO_NAMESPACE_POLLUTION */
--- sys/ia64/include/asm.h
+++ /dev/null
@@ -1,188 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/asm.h,v 1.13 2005/01/31 08:16:12 imp Exp $ */
-/* From: NetBSD: asm.h,v 1.18 1997/11/03 04:22:06 ross Exp */
-
-/*-
- * Copyright (c) 1991,1990,1989,1994,1995,1996 Carnegie Mellon University
- * All Rights Reserved.
- *
- * Permission to use, copy, modify and distribute this software and its
- * documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
- * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie Mellon
- * the rights to redistribute these changes.
- */
-
-/*
- * Assembly coding style
- *
- * This file contains macros and register defines to
- * aid in writing more readable assembly code.
- * Some rules to make assembly code understandable by
- * a debugger are also noted.
- */
-
-/*
- * Macro to make a local label name.
- */
-#define LLABEL(name,num) L ## name ## num
-
-/*
- * MCOUNT
- */
-#if defined(GPROF)
-#define MCOUNT \
- alloc out0 = ar.pfs, 8, 0, 4, 0; \
- mov out1 = r1; \
- mov out2 = b0;; \
- mov out3 = r0; \
- br.call.sptk b0 = _mcount;;
-#else
-#define MCOUNT /* nothing */
-#endif
-
-/*
- * ENTRY
- * Declare a global leaf function.
- * A leaf function does not call other functions.
- */
-#define ENTRY(_name_, _n_args_) \
- .global _name_; \
- .align 16; \
- .proc _name_; \
-_name_:; \
- .regstk _n_args_, 0, 0, 0; \
- MCOUNT
-
-#define ENTRY_NOPROFILE(_name_, _n_args_) \
- .global _name_; \
- .align 16; \
- .proc _name_; \
-_name_:; \
- .regstk _n_args_, 0, 0, 0
-
-/*
- * STATIC_ENTRY
- * Declare a local leaf function.
- */
-#define STATIC_ENTRY(_name_, _n_args_) \
- .align 16; \
- .proc _name_; \
-_name_:; \
- .regstk _n_args_, 0, 0, 0 \
- MCOUNT
-/*
- * XENTRY
- * Global alias for a leaf function, or alternate entry point
- */
-#define XENTRY(_name_) \
- .globl _name_; \
-_name_:
-
-/*
- * STATIC_XENTRY
- * Local alias for a leaf function, or alternate entry point
- */
-#define STATIC_XENTRY(_name_) \
-_name_:
-
-
-/*
- * END
- * Function delimiter
- */
-#define END(_name_) \
- .endp _name_
-
-
-/*
- * EXPORT
- * Export a symbol
- */
-#define EXPORT(_name_) \
- .global _name_; \
-_name_:
-
-
-/*
- * IMPORT
- * Make an external name visible, typecheck the size
- */
-#define IMPORT(_name_, _size_) \
- /* .extern _name_,_size_ */
-
-
-/*
- * ABS
- * Define an absolute symbol
- */
-#define ABS(_name_, _value_) \
- .globl _name_; \
-_name_ = _value_
-
-
-/*
- * BSS
- * Allocate un-initialized space for a global symbol
- */
-#define BSS(_name_,_numbytes_) \
- .comm _name_,_numbytes_
-
-
-/*
- * MSG
- * Allocate space for a message (a read-only ascii string)
- */
-#define ASCIZ .asciz
-#define MSG(msg,reg,label) \
- addl reg, at ltoff(label),gp;; \
- ld8 reg=[reg];; \
- .data; \
-label: ASCIZ msg; \
- .text;
-
-
-/*
- * System call glue.
- */
-#define SYSCALLNUM(name) SYS_ ## name
-
-#define CALLSYS_NOERROR(name) \
-{ .mmi ; \
- alloc r9 = ar.pfs, 0, 0, 8, 0 ; \
- mov r31 = ar.k5 ; \
- mov r10 = b0 ;; } \
-{ .mib ; \
- mov r8 = SYSCALLNUM(name) ; \
- mov b7 = r31 ; \
- br.call.sptk b0 = b7 ;; }
-
-
-/*
- * WEAK_ALIAS: create a weak alias (ELF only).
- */
-#define WEAK_ALIAS(alias,sym) \
- .weak alias; \
- alias = sym
-
-/*
- * ID tag macros
- */
-#if !defined(lint) && !defined(STRIP_FBSDID)
-#define __FBSDID(s) .ident s
-#else
-#define __FBSDID(s) /* nothing */
-#endif /* not lint and not STRIP_FBSDID */
--- sys/ia64/include/sf_buf.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*-
- * Copyright (c) 2003 Alan L. Cox <alc at cs.rice.edu>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/sf_buf.h,v 1.2 2004/04/18 07:11:12 alc Exp $
- */
-
-#ifndef _MACHINE_SF_BUF_H_
-#define _MACHINE_SF_BUF_H_
-
-#include <vm/vm.h>
-#include <vm/vm_param.h>
-#include <vm/vm_page.h>
-
-/*
- * On this machine, the only purpose for which sf_buf is used is to implement
- * an opaque pointer required by the machine-independent parts of the kernel.
- * That pointer references the vm_page that is "mapped" by the sf_buf. The
- * actual mapping is provided by the direct virtual-to-physical mapping.
- */
-struct sf_buf;
-
-static __inline vm_offset_t
-sf_buf_kva(struct sf_buf *sf)
-{
-
- return (IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS((vm_page_t)sf)));
-}
-
-static __inline vm_page_t
-sf_buf_page(struct sf_buf *sf)
-{
-
- return ((vm_page_t)sf);
-}
-
-#endif /* !_MACHINE_SF_BUF_H_ */
--- sys/ia64/include/_stdint.h
+++ /dev/null
@@ -1,171 +0,0 @@
-/*-
- * Copyright (c) 2001, 2002 Mike Barcroft <mike at FreeBSD.org>
- * Copyright (c) 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Klaus Klein.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/_stdint.h,v 1.2 2004/05/18 16:04:57 stefanf Exp $
- */
-
-#ifndef _MACHINE__STDINT_H_
-#define _MACHINE__STDINT_H_
-
-#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS)
-
-#define INT8_C(c) (c)
-#define INT16_C(c) (c)
-#define INT32_C(c) (c)
-#define INT64_C(c) (c ## L)
-
-#define UINT8_C(c) (c)
-#define UINT16_C(c) (c)
-#define UINT32_C(c) (c ## U)
-#define UINT64_C(c) (c ## UL)
-
-#define INTMAX_C(c) (c ## L)
-#define UINTMAX_C(c) (c ## UL)
-
-#endif /* !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) */
-
-#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS)
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.1 Limits of exact-width integer types
- */
-/* Minimum values of exact-width signed integer types. */
-#define INT8_MIN (-0x7f-1)
-#define INT16_MIN (-0x7fff-1)
-#define INT32_MIN (-0x7fffffff-1)
-#define INT64_MIN (-0x7fffffffffffffffL-1)
-
-/* Maximum values of exact-width signed integer types. */
-#define INT8_MAX 0x7f
-#define INT16_MAX 0x7fff
-#define INT32_MAX 0x7fffffff
-#define INT64_MAX 0x7fffffffffffffffL
-
-/* Maximum values of exact-width unsigned integer types. */
-#define UINT8_MAX 0xff
-#define UINT16_MAX 0xffff
-#define UINT32_MAX 0xffffffffU
-#define UINT64_MAX 0xffffffffffffffffUL
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.2 Limits of minimum-width integer types
- */
-/* Minimum values of minimum-width signed integer types. */
-#define INT_LEAST8_MIN INT8_MIN
-#define INT_LEAST16_MIN INT16_MIN
-#define INT_LEAST32_MIN INT32_MIN
-#define INT_LEAST64_MIN INT64_MIN
-
-/* Maximum values of minimum-width signed integer types. */
-#define INT_LEAST8_MAX INT8_MAX
-#define INT_LEAST16_MAX INT16_MAX
-#define INT_LEAST32_MAX INT32_MAX
-#define INT_LEAST64_MAX INT64_MAX
-
-/* Maximum values of minimum-width unsigned integer types. */
-#define UINT_LEAST8_MAX UINT8_MAX
-#define UINT_LEAST16_MAX UINT16_MAX
-#define UINT_LEAST32_MAX UINT32_MAX
-#define UINT_LEAST64_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.3 Limits of fastest minimum-width integer types
- */
-/* Minimum values of fastest minimum-width signed integer types. */
-#define INT_FAST8_MIN INT32_MIN
-#define INT_FAST16_MIN INT32_MIN
-#define INT_FAST32_MIN INT32_MIN
-#define INT_FAST64_MIN INT64_MIN
-
-/* Maximum values of fastest minimum-width signed integer types. */
-#define INT_FAST8_MAX INT32_MAX
-#define INT_FAST16_MAX INT32_MAX
-#define INT_FAST32_MAX INT32_MAX
-#define INT_FAST64_MAX INT64_MAX
-
-/* Maximum values of fastest minimum-width unsigned integer types. */
-#define UINT_FAST8_MAX UINT32_MAX
-#define UINT_FAST16_MAX UINT32_MAX
-#define UINT_FAST32_MAX UINT32_MAX
-#define UINT_FAST64_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.4 Limits of integer types capable of holding object pointers
- */
-#define INTPTR_MIN INT64_MIN
-#define INTPTR_MAX INT64_MAX
-#define UINTPTR_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.5 Limits of greatest-width integer types
- */
-#define INTMAX_MIN INT64_MIN
-#define INTMAX_MAX INT64_MAX
-#define UINTMAX_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.3 Limits of other integer types
- */
-/* Limits of ptrdiff_t. */
-#define PTRDIFF_MIN INT64_MIN
-#define PTRDIFF_MAX INT64_MAX
-
-/* Limits of sig_atomic_t. */
-#define SIG_ATOMIC_MIN INT32_MIN
-#define SIG_ATOMIC_MAX INT32_MAX
-
-/* Limit of size_t. */
-#define SIZE_MAX UINT64_MAX
-
-#ifndef WCHAR_MIN /* Also possibly defined in <wchar.h> */
-/* Limits of wchar_t. */
-#define WCHAR_MIN INT32_MIN
-#define WCHAR_MAX INT32_MAX
-#endif
-
-/* Limits of wint_t. */
-#define WINT_MIN INT32_MIN
-#define WINT_MAX INT32_MAX
-
-#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */
-
-#endif /* !_MACHINE__STDINT_H_ */
--- sys/ia64/include/pci_cfgreg.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*-
- * Copyright (c) 1997, Stefan Esser <se at freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice unmodified, this list of conditions, and the following
- * disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/pci_cfgreg.h,v 1.2 2005/01/06 22:18:23 imp Exp $
- *
- */
-
-extern int pci_cfgregopen(void);
-extern u_int32_t pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
-extern void pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
--- sys/ia64/include/_types.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*-
- * Copyright (c) 2002 Mike Barcroft <mike at FreeBSD.org>
- * Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * From: @(#)ansi.h 8.2 (Berkeley) 1/4/94
- * From: @(#)types.h 8.3 (Berkeley) 1/5/94
- * $FreeBSD: src/sys/ia64/include/_types.h,v 1.9 2005/03/02 21:33:27 joerg Exp $
- */
-
-#ifndef _MACHINE__TYPES_H_
-#define _MACHINE__TYPES_H_
-
-#ifndef _SYS_CDEFS_H_
-#error this file needs sys/cdefs.h as a prerequisite
-#endif
-
-/*
- * Basic types upon which most other types are built.
- */
-typedef __signed char __int8_t;
-typedef unsigned char __uint8_t;
-typedef short __int16_t;
-typedef unsigned short __uint16_t;
-typedef int __int32_t;
-typedef unsigned int __uint32_t;
-typedef long __int64_t;
-typedef unsigned long __uint64_t;
-
-/*
- * Standard type definitions.
- */
-typedef __int32_t __clock_t; /* clock()... */
-typedef unsigned int __cpumask_t;
-typedef __int64_t __critical_t;
-typedef double __double_t;
-typedef float __float_t;
-typedef __int64_t __intfptr_t;
-typedef __int64_t __intmax_t;
-typedef __int64_t __intptr_t;
-typedef __int32_t __int_fast8_t;
-typedef __int32_t __int_fast16_t;
-typedef __int32_t __int_fast32_t;
-typedef __int64_t __int_fast64_t;
-typedef __int8_t __int_least8_t;
-typedef __int16_t __int_least16_t;
-typedef __int32_t __int_least32_t;
-typedef __int64_t __int_least64_t;
-typedef __int64_t __ptrdiff_t; /* ptr1 - ptr2 */
-typedef __int64_t __register_t;
-typedef __int64_t __segsz_t; /* segment size (in pages) */
-typedef __uint64_t __size_t; /* sizeof() */
-typedef __int64_t __ssize_t; /* byte count or error */
-typedef __int64_t __time_t; /* time()... */
-typedef __uint64_t __uintfptr_t;
-typedef __uint64_t __uintmax_t;
-typedef __uint64_t __uintptr_t;
-typedef __uint32_t __uint_fast8_t;
-typedef __uint32_t __uint_fast16_t;
-typedef __uint32_t __uint_fast32_t;
-typedef __uint64_t __uint_fast64_t;
-typedef __uint8_t __uint_least8_t;
-typedef __uint16_t __uint_least16_t;
-typedef __uint32_t __uint_least32_t;
-typedef __uint64_t __uint_least64_t;
-typedef __uint64_t __u_register_t;
-typedef __uint64_t __vm_offset_t;
-typedef __int64_t __vm_ooffset_t;
-typedef __uint64_t __vm_paddr_t;
-typedef __uint64_t __vm_pindex_t;
-typedef __uint64_t __vm_size_t;
-
-/*
- * Unusual type definitions.
- */
-#ifdef __GNUCLIKE_BUILTIN_VARARGS
-typedef __builtin_va_list __va_list; /* internally known to gcc */
-#if defined(__GNUC_VA_LIST_COMPATIBILITY) && !defined(__GNUC_VA_LIST) \
- && !defined(__NO_GNUC_VA_LIST)
-#define __GNUC_VA_LIST
-typedef __va_list __gnuc_va_list; /* compat. with GNU headers */
-#endif
-#else
-#ifdef lint
-typedef char * __va_list; /* non-functional */
-#else
-#error Must add va_list support for this non-GCC compiler.
-#endif /* lint */
-#endif /* __GNUCLIKE_BUILTIN_VARARGS */
-
-#endif /* !_MACHINE__TYPES_H_ */
--- sys/ia64/include/runq.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*-
- * Copyright (c) 2001 Jake Burkholder <jake at FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/runq.h,v 1.5 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_RUNQ_H_
-#define _MACHINE_RUNQ_H_
-
-#define RQB_LEN (1UL) /* Number of priority status words. */
-#define RQB_L2BPW (6UL) /* Log2(sizeof(rqb_word_t) * NBBY)). */
-#define RQB_BPW (1UL<<RQB_L2BPW) /* Bits in an rqb_word_t. */
-
-#define RQB_BIT(pri) (1UL << ((pri) & (RQB_BPW - 1)))
-#define RQB_WORD(pri) ((pri) >> RQB_L2BPW)
-
-#define RQB_FFS(word) (__ffsl(word) - 1)
-
-/*
- * Type of run queue status word.
- */
-typedef u_int64_t rqb_word_t;
-
-static __inline u_int64_t
-__popcnt(u_int64_t bits)
-{
- u_int64_t result;
-
- __asm __volatile("popcnt %0=%1" : "=r" (result) : "r" (bits));
- return result;
-}
-
-
-static __inline int
-__ffsl(u_long mask)
-{
-
- if (__predict_false(mask == 0ul))
- return (0);
- return (__popcnt(mask ^ (mask - 1)));
-}
-
-#endif
--- sys/ia64/include/bootinfo.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/bootinfo.h,v 1.8 2005/01/06 22:18:23 imp Exp $ */
-/*-
- * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- *
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-struct bootinfo {
- uint64_t bi_magic; /* BOOTINFO_MAGIC */
-#define BOOTINFO_MAGIC 0xdeadbeeffeedface
- uint64_t bi_version; /* version 1 */
- uint64_t bi_spare[6]; /* was: name of booted kernel */
- uint64_t bi_hcdp; /* DIG64 HCDP table */
- uint64_t bi_fpswa; /* FPSWA interface */
- uint64_t bi_boothowto; /* value for boothowto */
- uint64_t bi_systab; /* pa of EFI system table */
- uint64_t bi_memmap; /* pa of EFI memory map */
- uint64_t bi_memmap_size; /* size of EFI memory map */
- uint64_t bi_memdesc_size; /* sizeof EFI memory desc */
- uint32_t bi_memdesc_version; /* EFI memory desc version */
- uint32_t bi_spare2;
- uint64_t bi_symtab; /* start of kernel sym table */
- uint64_t bi_esymtab; /* end of kernel sym table */
- uint64_t bi_kernend; /* end of kernel space */
- uint64_t bi_envp; /* environment */
- uint64_t bi_modulep; /* preloaded modules */
-};
-
-extern struct bootinfo bootinfo;
--- sys/ia64/include/sal.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/sal.h,v 1.6 2004/09/19 03:50:46 marcel Exp $
- */
-
-#ifndef _MACHINE_SAL_H_
-#define _MACHINE_SAL_H_
-
-struct sal_system_table {
- char sal_signature[4];
-#define SAL_SIGNATURE "SST_"
- u_int32_t sal_length;
- u_int8_t sal_rev[2];
- u_int16_t sal_entry_count;
- u_int8_t sal_checksum;
- u_int8_t sal_reserved1[7];
- u_int8_t sal_a_version[2];
- u_int8_t sal_b_version[2];
- char sal_oem_id[32];
- char sal_product_id[32];
- u_int8_t sal_reserved2[8];
-};
-
-struct sal_entrypoint_descriptor {
- u_int8_t sale_type; /* == 0 */
- u_int8_t sale_reserved1[7];
- u_int64_t sale_pal_proc;
- u_int64_t sale_sal_proc;
- u_int64_t sale_sal_gp;
- u_int8_t sale_reserved2[16];
-};
-
-struct sal_memory_descriptor {
- u_int8_t sale_type; /* == 1 */
- u_int8_t sale_need_virtual;
- u_int8_t sale_current_attribute;
- u_int8_t sale_access_rights;
- u_int8_t sale_supported_attributes;
- u_int8_t sale_reserved1;
- u_int8_t sale_memory_type[2];
- u_int64_t sale_physical_address;
- u_int32_t sale_length;
- u_int8_t sale_reserved2[12];
-};
-
-struct sal_platform_descriptor {
- u_int8_t sale_type; /* == 2 */
- u_int8_t sale_features;
- u_int8_t sale_reserved[14];
-};
-
-struct sal_tr_descriptor {
- u_int8_t sale_type; /* == 3 */
- u_int8_t sale_register_type;
- u_int8_t sale_register_number;
- u_int8_t sale_reserved1[5];
- u_int64_t sale_virtual_address;
- u_int64_t sale_page_size;
- u_int8_t sale_reserved2[8];
-};
-
-struct sal_ptc_cache_descriptor {
- u_int8_t sale_type; /* == 4 */
- u_int8_t sale_reserved[3];
- u_int32_t sale_domains;
- u_int64_t sale_address;
-};
-
-struct sal_ap_wakeup_descriptor {
- u_int8_t sale_type; /* == 5 */
- u_int8_t sale_mechanism;
- u_int8_t sale_reserved[6];
- u_int64_t sale_vector;
-};
-
-/*
- * SAL Procedure numbers.
- */
-
-#define SAL_SET_VECTORS 0x01000000
-#define SAL_GET_STATE_INFO 0x01000001
-#define SAL_GET_STATE_INFO_SIZE 0x01000002
-#define SAL_CLEAR_STATE_INFO 0x01000003
-#define SAL_MC_RENDEZ 0x01000004
-#define SAL_MC_SET_PARAMS 0x01000005
-#define SAL_REGISTER_PHYSICAL_ADDR 0x01000006
-#define SAL_CACHE_FLUSH 0x01000008
-#define SAL_CACHE_INIT 0x01000009
-#define SAL_PCI_CONFIG_READ 0x01000010
-#define SAL_PCI_CONFIG_WRITE 0x01000011
-#define SAL_FREQ_BASE 0x01000012
-#define SAL_UPDATE_PAL 0x01000020
-
-/* SAL_SET_VECTORS event handler types */
-#define SAL_OS_MCA 0
-#define SAL_OS_INIT 1
-#define SAL_OS_BOOT_RENDEZ 2
-
-/* SAL_GET_STATE_INFO, SAL_GET_STATE_INFO_SIZE types */
-#define SAL_INFO_MCA 0
-#define SAL_INFO_INIT 1
-#define SAL_INFO_CMC 2
-#define SAL_INFO_CPE 3
-#define SAL_INFO_TYPES 4 /* number of types we know about */
-
-struct ia64_sal_result {
- int64_t sal_status;
- u_int64_t sal_result[3];
-};
-
-typedef struct ia64_sal_result sal_entry_t
- (u_int64_t, u_int64_t, u_int64_t, u_int64_t,
- u_int64_t, u_int64_t, u_int64_t, u_int64_t);
-
-extern sal_entry_t *ia64_sal_entry;
-
-extern void ia64_sal_init(void);
-
-#endif /* _MACHINE_SAL_H_ */
--- sys/ia64/include/db_machdep.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/db_machdep.h,v 1.12 2005/07/02 23:52:36 marcel Exp $
- */
-
-#ifndef _MACHINE_DB_MACHDEP_H_
-#define _MACHINE_DB_MACHDEP_H_
-
-#include <machine/ia64_cpu.h>
-
-/* We define some of our own commands. */
-#define DB_MACHINE_COMMANDS
-
-/* We use Elf64 symbols in DDB. */
-#define DB_ELFSIZE 64
-
-/* Pretty arbitrary. */
-#define DB_SMALL_VALUE_MAX 0x7fffffff
-#define DB_SMALL_VALUE_MIN (-0x400001)
-
-typedef vm_offset_t db_addr_t; /* address - unsigned */
-typedef long db_expr_t; /* expression - signed */
-
-#define PC_REGS() ((kdb_thrctx->pcb_special.__spare == 0) ? \
- kdb_thrctx->pcb_special.rp : \
- kdb_thrctx->pcb_special.iip + ((kdb_thrctx->pcb_special.psr>>41) & 3))
-
-#define BKPT_WRITE(addr, storage) db_bkpt_write(addr, storage)
-#define BKPT_CLEAR(addr, storage) db_bkpt_clear(addr, storage)
-#define BKPT_SKIP db_bkpt_skip()
-#define BKPT_INST_TYPE uint64_t
-
-void db_bkpt_write(db_addr_t, BKPT_INST_TYPE *storage);
-void db_bkpt_clear(db_addr_t, uint64_t *storage);
-void db_bkpt_skip(void);
-
-#define db_clear_single_step kdb_cpu_clear_singlestep
-#define db_set_single_step kdb_cpu_set_singlestep
-
-#define IS_BREAKPOINT_TRAP(type, code) (type == IA64_VEC_BREAK)
-#define IS_WATCHPOINT_TRAP(type, code) 0
-
-#define inst_trap_return(ins) (ins & 0)
-#define inst_return(ins) (ins & 0)
-#define inst_call(ins) (ins & 0)
-#define inst_branch(ins) (ins & 0)
-#define inst_load(ins) (ins & 0)
-#define inst_store(ins) (ins & 0)
-#define inst_unconditional_flow_transfer(ins) (ins & 0)
-
-#define branch_taken(ins, pc, regs) pc
-
-/* Function call support. */
-#define DB_MAXARGS 8 /* Only support arguments in registers. */
-#define DB_CALL db_fncall_ia64
-
-#endif /* _MACHINE_DB_MACHDEP_H_ */
--- sys/ia64/include/efi.h
+++ /dev/null
@@ -1,163 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/efi.h,v 1.8 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_EFI_H_
-#define _MACHINE_EFI_H_
-
-#include <sys/uuid.h>
-
-#define EFI_PAGE_SHIFT 12
-#define EFI_PAGE_SIZE (1 << EFI_PAGE_SHIFT)
-#define EFI_PAGE_MASK (EFI_PAGE_SIZE - 1)
-
-#define EFI_TABLE_ACPI20 \
- {0x8868e871,0xe4f1,0x11d3,0xbc,0x22,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
-#define EFI_TABLE_SAL \
- {0xeb9d2d32,0x2d88,0x11d3,0x9a,0x16,{0x00,0x90,0x27,0x3f,0xc1,0x4d}}
-
-enum efi_reset {
- EFI_RESET_COLD,
- EFI_RESET_WARM
-};
-
-typedef uint16_t efi_char;
-typedef unsigned long efi_status;
-
-struct efi_cfgtbl {
- struct uuid ct_uuid;
- uint64_t ct_data;
-};
-
-struct efi_md {
- uint32_t md_type;
-#define EFI_MD_TYPE_NULL 0
-#define EFI_MD_TYPE_CODE 1 /* Loader text. */
-#define EFI_MD_TYPE_DATA 2 /* Loader data. */
-#define EFI_MD_TYPE_BS_CODE 3 /* Boot services text. */
-#define EFI_MD_TYPE_BS_DATA 4 /* Boot services data. */
-#define EFI_MD_TYPE_RT_CODE 5 /* Runtime services text. */
-#define EFI_MD_TYPE_RT_DATA 6 /* Runtime services data. */
-#define EFI_MD_TYPE_FREE 7 /* Unused/free memory. */
-#define EFI_MD_TYPE_BAD 8 /* Bad memory */
-#define EFI_MD_TYPE_RECLAIM 9 /* ACPI reclaimable memory. */
-#define EFI_MD_TYPE_FIRMWARE 10 /* ACPI NV memory */
-#define EFI_MD_TYPE_IOMEM 11 /* Memory-mapped I/O. */
-#define EFI_MD_TYPE_IOPORT 12 /* I/O port space. */
-#define EFI_MD_TYPE_PALCODE 13 /* PAL */
- uint32_t __pad;
- uint64_t md_phys;
- void *md_virt;
- uint64_t md_pages;
- uint64_t md_attr;
-#define EFI_MD_ATTR_UC 0x0000000000000001UL
-#define EFI_MD_ATTR_WC 0x0000000000000002UL
-#define EFI_MD_ATTR_WT 0x0000000000000004UL
-#define EFI_MD_ATTR_WB 0x0000000000000008UL
-#define EFI_MD_ATTR_UCE 0x0000000000000010UL
-#define EFI_MD_ATTR_WP 0x0000000000001000UL
-#define EFI_MD_ATTR_RP 0x0000000000002000UL
-#define EFI_MD_ATTR_XP 0x0000000000004000UL
-#define EFI_MD_ATTR_RT 0x8000000000000000UL
-};
-
-struct efi_tm {
- uint16_t tm_year; /* 1998 - 20XX */
- uint8_t tm_mon; /* 1 - 12 */
- uint8_t tm_mday; /* 1 - 31 */
- uint8_t tm_hour; /* 0 - 23 */
- uint8_t tm_min; /* 0 - 59 */
- uint8_t tm_sec; /* 0 - 59 */
- uint8_t __pad1;
- uint32_t tm_nsec; /* 0 - 999,999,999 */
- int16_t tm_tz; /* -1440 to 1440 or 2047 */
- uint8_t tm_dst;
- uint8_t __pad2;
-};
-
-struct efi_tmcap {
- uint32_t tc_res; /* 1e-6 parts per million */
- uint32_t tc_prec; /* hertz */
- uint8_t tc_stz; /* Set clears sub-second time */
-};
-
-struct efi_tblhdr {
- uint64_t th_sig;
- uint32_t th_rev;
- uint32_t th_hdrsz;
- uint32_t th_crc32;
- uint32_t __res;
-};
-
-struct efi_rt {
- struct efi_tblhdr rt_hdr;
- efi_status (*rt_gettime)(struct efi_tm *, struct efi_tmcap *);
- efi_status (*rt_settime)(struct efi_tm *);
- efi_status (*rt_getwaketime)(uint8_t *, uint8_t *,
- struct efi_tm *);
- efi_status (*rt_setwaketime)(uint8_t, struct efi_tm *);
- efi_status (*rt_setvirtual)(u_long, u_long, uint32_t,
- struct efi_md *);
- efi_status (*rt_cvtptr)(u_long, void **);
- efi_status (*rt_getvar)(efi_char *, struct uuid *, uint32_t *,
- u_long *, void *);
- efi_status (*rt_scanvar)(u_long *, efi_char *, struct uuid *);
- efi_status (*rt_setvar)(efi_char *, struct uuid *, uint32_t,
- u_long, void *);
- efi_status (*rt_gethicnt)(uint32_t *);
- efi_status (*rt_reset)(enum efi_reset, efi_status, u_long,
- efi_char *);
-};
-
-struct efi_systbl {
- struct efi_tblhdr st_hdr;
-#define EFI_SYSTBL_SIG 0x5453595320494249UL
- efi_char *st_fwvendor;
- uint32_t st_fwrev;
- uint32_t __pad;
- void *st_cin;
- void *st_cinif;
- void *st_cout;
- void *st_coutif;
- void *st_cerr;
- void *st_cerrif;
- uint64_t st_rt;
- void *st_bs;
- u_long st_entries;
- uint64_t st_cfgtbl;
-};
-
-void efi_boot_finish(void);
-int efi_boot_minimal(uint64_t);
-void *efi_get_table(struct uuid *);
-void efi_get_time(struct efi_tm *);
-struct efi_md *efi_md_first(void);
-struct efi_md *efi_md_next(struct efi_md *);
-void efi_reset_system(void);
-efi_status efi_set_time(struct efi_tm *);
-
-#endif /* _MACHINE_EFI_H_ */
--- sys/ia64/include/pcpu.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*-
- * Copyright (c) 1999 Luoqi Chen <luoqi at freebsd.org>
- * Copyright (c) Peter Wemm <peter at netplex.com.au>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/pcpu.h,v 1.17 2003/11/17 03:40:41 bde Exp $
- */
-
-#ifndef _MACHINE_PCPU_H_
-#define _MACHINE_PCPU_H_
-
-#ifdef _KERNEL
-
-#define PCPU_MD_FIELDS \
- struct pcb *pc_pcb; /* Used by IPI_STOP */ \
- struct pmap *pc_current_pmap; /* active pmap */ \
- uint64_t pc_lid; /* local CPU ID */ \
- uint32_t pc_awake:1; /* CPU is awake? */ \
- uint64_t pc_clock; /* Clock counter. */ \
- uint64_t pc_clockadj; /* Clock adjust. */ \
- uint32_t pc_acpi_id /* ACPI CPU id. */
-
-struct pcpu;
-
-register struct pcpu *pcpup __asm__("r13");
-
-#define PCPU_GET(member) (pcpup->pc_ ## member)
-#define PCPU_PTR(member) (&pcpup->pc_ ## member)
-#define PCPU_SET(member,value) (pcpup->pc_ ## member = (value))
-
-void pcpu_initclock(void);
-
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_PCPU_H_ */
--- sys/ia64/include/elf.h
+++ /dev/null
@@ -1,244 +0,0 @@
-/*-
- * Copyright (c) 1996-1997 John D. Polstra.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/elf.h,v 1.11.10.1 2006/01/28 18:40:55 marcel Exp $
- */
-
-#ifndef _MACHINE_ELF_H_
-#define _MACHINE_ELF_H_ 1
-
-/*
- * ELF definitions for the IA-64 architecture.
- */
-
-#ifndef __ELF_WORD_SIZE
-#define __ELF_WORD_SIZE 64
-#endif
-
-#include <sys/elf64.h> /* Definitions common to all 64 bit architectures. */
-#include <sys/elf32.h> /* Definitions common to all 32 bit architectures. */
-
-#include <sys/elf_generic.h>
-
-#define ELF_ARCH EM_IA_64
-
-#define ELF_MACHINE_OK(x) ((x) == EM_IA_64)
-
-/*
- * Auxiliary vector entries for passing information to the interpreter.
- *
- * The i386 supplement to the SVR4 ABI specification names this "auxv_t",
- * but POSIX lays claim to all symbols ending with "_t".
- */
-
-typedef struct { /* Auxiliary vector entry on initial stack */
- int a_type; /* Entry type. */
- union {
- int a_val; /* Integer value. */
- } a_un;
-} Elf32_Auxinfo;
-
-typedef struct { /* Auxiliary vector entry on initial stack */
- int a_type; /* Entry type. */
- union {
- long a_val; /* Integer value. */
- void *a_ptr; /* Address. */
- void (*a_fcn)(void); /* Function pointer (not used). */
- } a_un;
-} Elf64_Auxinfo;
-
-__ElfType(Auxinfo);
-
-/* Values for a_type. */
-#define AT_NULL 0 /* Terminates the vector. */
-#define AT_IGNORE 1 /* Ignored entry. */
-#define AT_EXECFD 2 /* File descriptor of program to load. */
-#define AT_PHDR 3 /* Program header of program already loaded. */
-#define AT_PHENT 4 /* Size of each program header entry. */
-#define AT_PHNUM 5 /* Number of program header entries. */
-#define AT_PAGESZ 6 /* Page size in bytes. */
-#define AT_BASE 7 /* Interpreter's base address. */
-#define AT_FLAGS 8 /* Flags (unused for i386). */
-#define AT_ENTRY 9 /* Where interpreter should transfer control. */
-
-/*
- * The following non-standard values are used for passing information
- * from John Polstra's testbed program to the dynamic linker. These
- * are expected to go away soon.
- *
- * Unfortunately, these overlap the Linux non-standard values, so they
- * must not be used in the same context.
- */
-#define AT_BRK 10 /* Starting point for sbrk and brk. */
-#define AT_DEBUG 11 /* Debugging level. */
-
-/*
- * The following non-standard values are used in Linux ELF binaries.
- */
-#define AT_NOTELF 10 /* Program is not ELF ?? */
-#define AT_UID 11 /* Real uid. */
-#define AT_EUID 12 /* Effective uid. */
-#define AT_GID 13 /* Real gid. */
-#define AT_EGID 14 /* Effective gid. */
-
-#define AT_COUNT 15 /* Count of defined aux entry types. */
-
-/*
- * Values for e_flags.
- */
-#define EF_IA_64_MASKOS 0x00ff000f
-#define EF_IA_64_ABI64 0x00000010
-#define EF_IA_64_REDUCEDFP 0x00000020
-#define EF_IA_64_CONS_GP 0x00000040
-#define EF_IA_64_NOFUNCDESC_CONS_GP 0x00000080
-#define EF_IA_64_ABSOLUTE 0x00000100
-#define EF_IA_64_ARCH 0xff000000
-
-/*
- * Segment types.
- */
-#define PT_IA_64_ARCHEXT 0x70000000
-#define PT_IA_64_UNWIND 0x70000001
-
-/*
- * Segment attributes.
- */
-#define PF_IA_64_NORECOV 0x80000000
-
-/*
- * Section types.
- */
-#define SHT_IA_64_EXT 0x70000000
-#define SHT_IA_64_UNWIND 0x70000001
-#define SHT_IA_64_LOPSREG 0x78000000
-#define SHT_IA_64_HIPSREG 0x7fffffff
-
-/*
- * Section attribute flags.
- */
-#define SHF_IA_64_SHORT 0x10000000
-#define SHF_IA_64_NORECOV 0x20000000
-
-/*
- * Relocation types.
- */
-
-/* Name Value Field Calculation */
-#define R_IA_64_NONE 0 /* None */
-#define R_IA_64_IMM14 0x21 /* immediate14 S + A */
-#define R_IA_64_IMM22 0x22 /* immediate22 S + A */
-#define R_IA_64_IMM64 0x23 /* immediate64 S + A */
-#define R_IA_64_DIR32MSB 0x24 /* word32 MSB S + A */
-#define R_IA_64_DIR32LSB 0x25 /* word32 LSB S + A */
-#define R_IA_64_DIR64MSB 0x26 /* word64 MSB S + A */
-#define R_IA_64_DIR64LSB 0x27 /* word64 LSB S + A */
-#define R_IA_64_GPREL22 0x2a /* immediate22 @gprel(S + A) */
-#define R_IA_64_GPREL64I 0x2b /* immediate64 @gprel(S + A) */
-#define R_IA_64_GPREL32MSB 0x2c /* word32 MSB @gprel(S + A) */
-#define R_IA_64_GPREL32LSB 0x2d /* word32 LSB @gprel(S + A) */
-#define R_IA_64_GPREL64MSB 0x2e /* word64 MSB @gprel(S + A) */
-#define R_IA_64_GPREL64LSB 0x2f /* word64 LSB @gprel(S + A) */
-#define R_IA_64_LTOFF22 0x32 /* immediate22 @ltoff(S + A) */
-#define R_IA_64_LTOFF64I 0x33 /* immediate64 @ltoff(S + A) */
-#define R_IA_64_PLTOFF22 0x3a /* immediate22 @pltoff(S + A) */
-#define R_IA_64_PLTOFF64I 0x3b /* immediate64 @pltoff(S + A) */
-#define R_IA_64_PLTOFF64MSB 0x3e /* word64 MSB @pltoff(S + A) */
-#define R_IA_64_PLTOFF64LSB 0x3f /* word64 LSB @pltoff(S + A) */
-#define R_IA_64_FPTR64I 0x43 /* immediate64 @fptr(S + A) */
-#define R_IA_64_FPTR32MSB 0x44 /* word32 MSB @fptr(S + A) */
-#define R_IA_64_FPTR32LSB 0x45 /* word32 LSB @fptr(S + A) */
-#define R_IA_64_FPTR64MSB 0x46 /* word64 MSB @fptr(S + A) */
-#define R_IA_64_FPTR64LSB 0x47 /* word64 LSB @fptr(S + A) */
-#define R_IA_64_PCREL60B 0x48 /* immediate60 form1 S + A - P */
-#define R_IA_64_PCREL21B 0x49 /* immediate21 form1 S + A - P */
-#define R_IA_64_PCREL21M 0x4a /* immediate21 form2 S + A - P */
-#define R_IA_64_PCREL21F 0x4b /* immediate21 form3 S + A - P */
-#define R_IA_64_PCREL32MSB 0x4c /* word32 MSB S + A - P */
-#define R_IA_64_PCREL32LSB 0x4d /* word32 LSB S + A - P */
-#define R_IA_64_PCREL64MSB 0x4e /* word64 MSB S + A - P */
-#define R_IA_64_PCREL64LSB 0x4f /* word64 LSB S + A - P */
-#define R_IA_64_LTOFF_FPTR22 0x52 /* immediate22 @ltoff(@fptr(S + A)) */
-#define R_IA_64_LTOFF_FPTR64I 0x53 /* immediate64 @ltoff(@fptr(S + A)) */
-#define R_IA_64_LTOFF_FPTR32MSB 0x54 /* word32 MSB @ltoff(@fptr(S + A)) */
-#define R_IA_64_LTOFF_FPTR32LSB 0x55 /* word32 LSB @ltoff(@fptr(S + A)) */
-#define R_IA_64_LTOFF_FPTR64MSB 0x56 /* word64 MSB @ltoff(@fptr(S + A)) */
-#define R_IA_64_LTOFF_FPTR64LSB 0x57 /* word64 LSB @ltoff(@fptr(S + A)) */
-#define R_IA_64_SEGREL32MSB 0x5c /* word32 MSB @segrel(S + A) */
-#define R_IA_64_SEGREL32LSB 0x5d /* word32 LSB @segrel(S + A) */
-#define R_IA_64_SEGREL64MSB 0x5e /* word64 MSB @segrel(S + A) */
-#define R_IA_64_SEGREL64LSB 0x5f /* word64 LSB @segrel(S + A) */
-#define R_IA_64_SECREL32MSB 0x64 /* word32 MSB @secrel(S + A) */
-#define R_IA_64_SECREL32LSB 0x65 /* word32 LSB @secrel(S + A) */
-#define R_IA_64_SECREL64MSB 0x66 /* word64 MSB @secrel(S + A) */
-#define R_IA_64_SECREL64LSB 0x67 /* word64 LSB @secrel(S + A) */
-#define R_IA_64_REL32MSB 0x6c /* word32 MSB BD + A */
-#define R_IA_64_REL32LSB 0x6d /* word32 LSB BD + A */
-#define R_IA_64_REL64MSB 0x6e /* word64 MSB BD + A */
-#define R_IA_64_REL64LSB 0x6f /* word64 LSB BD + A */
-#define R_IA_64_LTV32MSB 0x74 /* word32 MSB S + A */
-#define R_IA_64_LTV32LSB 0x75 /* word32 LSB S + A */
-#define R_IA_64_LTV64MSB 0x76 /* word64 MSB S + A */
-#define R_IA_64_LTV64LSB 0x77 /* word64 LSB S + A */
-#define R_IA_64_PCREL21BI 0x79 /* immediate21 form1 S + A - P */
-#define R_IA_64_PCREL22 0x7a /* immediate22 S + A - P */
-#define R_IA_64_PCREL64I 0x7b /* immediate64 S + A - P */
-#define R_IA_64_IPLTMSB 0x80 /* function descriptor MSB special */
-#define R_IA_64_IPLTLSB 0x81 /* function descriptor LSB speciaal */
-#define R_IA_64_SUB 0x85 /* immediate64 A - S */
-#define R_IA_64_LTOFF22X 0x86 /* immediate22 special */
-#define R_IA_64_LDXMOV 0x87 /* immediate22 special */
-#define R_IA_64_TPREL14 0x91 /* imm14 @tprel(S + A) */
-#define R_IA_64_TPREL22 0x92 /* imm22 @tprel(S + A) */
-#define R_IA_64_TPREL64I 0x93 /* imm64 @tprel(S + A) */
-#define R_IA_64_TPREL64MSB 0x96 /* word64 MSB @tprel(S + A) */
-#define R_IA_64_TPREL64LSB 0x97 /* word64 LSB @tprel(S + A) */
-#define R_IA_64_LTOFF_TPREL22 0x9a /* imm22 @ltoff(@tprel(S+A)) */
-#define R_IA_64_DTPMOD64MSB 0xa6 /* word64 MSB @dtpmod(S + A) */
-#define R_IA_64_DTPMOD64LSB 0xa7 /* word64 LSB @dtpmod(S + A) */
-#define R_IA_64_LTOFF_DTPMOD22 0xaa /* imm22 @ltoff(@dtpmod(S+A)) */
-#define R_IA_64_DTPREL14 0xb1 /* imm14 @dtprel(S + A) */
-#define R_IA_64_DTPREL22 0xb2 /* imm22 @dtprel(S + A) */
-#define R_IA_64_DTPREL64I 0xb3 /* imm64 @dtprel(S + A) */
-#define R_IA_64_DTPREL32MSB 0xb4 /* word32 MSB @dtprel(S + A) */
-#define R_IA_64_DTPREL32LSB 0xb5 /* word32 LSB @dtprel(S + A) */
-#define R_IA_64_DTPREL64MSB 0xb6 /* word64 MSB @dtprel(S + A) */
-#define R_IA_64_DTPREL64LSB 0xb7 /* word64 LSB @dtprel(S + A) */
-#define R_IA_64_LTOFF_DTPREL22 0xba /* imm22 @ltoff(@dtprel(S+A)) */
-
-/* Define "machine" characteristics */
-#if __ELF_WORD_SIZE == 32
-#define ELF_TARG_CLASS ELFCLASS32
-#else
-#define ELF_TARG_CLASS ELFCLASS64
-#endif
-#define ELF_TARG_DATA ELFDATA2LSB
-#define ELF_TARG_MACH EM_IA_64
-#define ELF_TARG_VER 1
-
-/* Processor specific dynmamic section tags. */
-
-#define DT_IA_64_PLT_RESERVE 0x70000000
-
-#endif /* !_MACHINE_ELF_H_ */
--- sys/ia64/include/vmparam.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/vmparam.h,v 1.10 2005/01/06 22:18:23 imp Exp $ */
-/* From: NetBSD: vmparam.h,v 1.6 1997/09/23 23:23:23 mjacob Exp */
-#ifndef _MACHINE_VMPARAM_H
-#define _MACHINE_VMPARAM_H
-/*-
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: Utah $Hdr: vmparam.h 1.16 91/01/18$
- *
- * @(#)vmparam.h 8.2 (Berkeley) 4/22/94
- */
-
-/*
- * Machine dependent constants for ia64.
- */
-/*
- * USRTEXT is the start of the user text/data space, while USRSTACK
- * is the top (end) of the user stack. Immediately above the user stack
- * resides the syscall gateway page.
- */
-#define USRTEXT CLBYTES
-#define USRSTACK VM_MAX_ADDRESS
-
-/*
- * Virtual memory related constants, all in bytes
- */
-#ifndef MAXTSIZ
-#define MAXTSIZ (1<<30) /* max text size (1G) */
-#endif
-#ifndef DFLDSIZ
-#define DFLDSIZ (1<<27) /* initial data size (128M) */
-#endif
-#ifndef MAXDSIZ
-#define MAXDSIZ (1<<30) /* max data size (1G) */
-#endif
-#ifndef DFLSSIZ
-#define DFLSSIZ (1<<21) /* initial stack size (2M) */
-#endif
-#ifndef MAXSSIZ
-#define MAXSSIZ (1<<28) /* max stack size (256M) */
-#endif
-#ifndef SGROWSIZ
-#define SGROWSIZ (128UL*1024) /* amount to grow stack */
-#endif
-
-/*
- * PTEs for mapping user space into the kernel for phyio operations.
- * 64 pte's are enough to cover 8 disks * MAXBSIZE.
- */
-#ifndef USRIOSIZE
-#define USRIOSIZE 64
-#endif
-
-/*
- * Boundary at which to place first MAPMEM segment if not explicitly
- * specified. Should be a power of two. This allows some slop for
- * the data segment to grow underneath the first mapped segment.
- */
-#define MMSEG 0x200000
-
-/*
- * The size of the clock loop.
- */
-#define LOOPPAGES (maxfree - firstfree)
-
-/*
- * The time for a process to be blocked before being very swappable.
- * This is a number of seconds which the system takes as being a non-trivial
- * amount of real time. You probably shouldn't change this;
- * it is used in subtle ways (fractions and multiples of it are, that is, like
- * half of a ``long time'', almost a long time, etc.)
- * It is related to human patience and other factors which don't really
- * change over time.
- */
-#define MAXSLP 20
-
-/*
- * A swapped in process is given a small amount of core without being bothered
- * by the page replacement algorithm. Basically this says that if you are
- * swapped in you deserve some resources. We protect the last SAFERSS
- * pages against paging and will just swap you out rather than paging you.
- * Note that each process has at least UPAGES+CLSIZE pages which are not
- * paged anyways, in addition to SAFERSS.
- */
-#define SAFERSS 10 /* nominal ``small'' resident set size
- protected against replacement */
-
-/*
- * We need region 7 virtual addresses for pagetables.
- */
-#define UMA_MD_SMALL_ALLOC
-
-/*
- * Manipulating region bits of an address.
- */
-#define IA64_RR_BASE(n) (((u_int64_t) (n)) << 61)
-#define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1))
-
-#define IA64_PHYS_TO_RR6(x) ((x) | IA64_RR_BASE(6))
-#define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7))
-
-/*
- * Page size of the identity mappings in region 7.
- */
-#ifndef LOG2_ID_PAGE_SIZE
-#define LOG2_ID_PAGE_SIZE 28 /* 256M */
-#endif
-
-#define IA64_ID_PAGE_SHIFT (LOG2_ID_PAGE_SIZE)
-#define IA64_ID_PAGE_SIZE (1<<(LOG2_ID_PAGE_SIZE))
-#define IA64_ID_PAGE_MASK (IA64_ID_PAGE_SIZE-1)
-
-#define IA64_BACKINGSTORE IA64_RR_BASE(4)
-
-/*
- * Mach derived constants
- */
-
-/* user/kernel map constants */
-#define VM_MIN_ADDRESS 0
-#define VM_MAX_ADDRESS IA64_RR_BASE(5)
-#define VM_GATEWAY_SIZE PAGE_SIZE
-#define VM_MAXUSER_ADDRESS (VM_MAX_ADDRESS + VM_GATEWAY_SIZE)
-#define VM_MIN_KERNEL_ADDRESS VM_MAXUSER_ADDRESS
-#define VM_MAX_KERNEL_ADDRESS (IA64_RR_BASE(6) - 1)
-
-#define KERNBASE VM_MAX_ADDRESS
-
-/* virtual sizes (bytes) for various kernel submaps */
-#ifndef VM_KMEM_SIZE
-#define VM_KMEM_SIZE (12 * 1024 * 1024)
-#endif
-
-/*
- * How many physical pages per KVA page allocated.
- * min(max(VM_KMEM_SIZE, Physical memory/VM_KMEM_SIZE_SCALE), VM_KMEM_SIZE_MAX)
- * is the total KVA space allocated for kmem_map.
- */
-#ifndef VM_KMEM_SIZE_SCALE
-#define VM_KMEM_SIZE_SCALE (4) /* XXX 8192 byte pages */
-#endif
-
-/* initial pagein size of beginning of executable file */
-#ifndef VM_INITIAL_PAGEIN
-#define VM_INITIAL_PAGEIN 16
-#endif
-
-#endif /* !_MACHINE_VMPARAM_H */
--- sys/ia64/include/sigframe.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*-
- * Copyright (c) 1999 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer
- * in this position and unchanged.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/sigframe.h,v 1.3 2002/10/25 19:10:57 peter Exp $
- */
-
-#ifndef _MACHINE_SIGFRAME_H_
-#define _MACHINE_SIGFRAME_H_ 1
-
-struct sigframe {
- ucontext_t sf_uc;
- siginfo_t sf_si;
-};
-
-#endif /* _MACHINE_SIGFRAME_H_ */
--- sys/ia64/include/clock.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*-
- * Kernel interface to machine-dependent clock driver.
- * Garrett Wollman, September 1994.
- * This file is in the public domain.
- *
- * $FreeBSD: src/sys/ia64/include/clock.h,v 1.10 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_CLOCK_H_
-#define _MACHINE_CLOCK_H_
-
-#ifdef _KERNEL
-
-#define CLOCK_VECTOR 254
-
-extern int adjkerntz;
-extern int disable_rtc_set;
-extern int wall_cmos_clock;
-
-extern uint64_t ia64_clock_reload;
-extern uint64_t itc_frequency;
-
-int sysbeep(int pitch, int period);
-
-#endif
-
-#endif /* !_MACHINE_CLOCK_H_ */
--- sys/ia64/include/ia64_cpu.h
+++ /dev/null
@@ -1,415 +0,0 @@
-/*-
- * Copyright (c) 2000 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/ia64_cpu.h,v 1.19.10.1 2005/09/13 21:07:14 marcel Exp $
- */
-
-#ifndef _MACHINE_IA64_CPU_H_
-#define _MACHINE_IA64_CPU_H_
-
-/*
- * Definition of PSR and IPSR bits.
- */
-#define IA64_PSR_BE 0x0000000000000002
-#define IA64_PSR_UP 0x0000000000000004
-#define IA64_PSR_AC 0x0000000000000008
-#define IA64_PSR_MFL 0x0000000000000010
-#define IA64_PSR_MFH 0x0000000000000020
-#define IA64_PSR_IC 0x0000000000002000
-#define IA64_PSR_I 0x0000000000004000
-#define IA64_PSR_PK 0x0000000000008000
-#define IA64_PSR_DT 0x0000000000020000
-#define IA64_PSR_DFL 0x0000000000040000
-#define IA64_PSR_DFH 0x0000000000080000
-#define IA64_PSR_SP 0x0000000000100000
-#define IA64_PSR_PP 0x0000000000200000
-#define IA64_PSR_DI 0x0000000000400000
-#define IA64_PSR_SI 0x0000000000800000
-#define IA64_PSR_DB 0x0000000001000000
-#define IA64_PSR_LP 0x0000000002000000
-#define IA64_PSR_TB 0x0000000004000000
-#define IA64_PSR_RT 0x0000000008000000
-#define IA64_PSR_CPL 0x0000000300000000
-#define IA64_PSR_CPL_KERN 0x0000000000000000
-#define IA64_PSR_CPL_1 0x0000000100000000
-#define IA64_PSR_CPL_2 0x0000000200000000
-#define IA64_PSR_CPL_USER 0x0000000300000000
-#define IA64_PSR_IS 0x0000000400000000
-#define IA64_PSR_MC 0x0000000800000000
-#define IA64_PSR_IT 0x0000001000000000
-#define IA64_PSR_ID 0x0000002000000000
-#define IA64_PSR_DA 0x0000004000000000
-#define IA64_PSR_DD 0x0000008000000000
-#define IA64_PSR_SS 0x0000010000000000
-#define IA64_PSR_RI 0x0000060000000000
-#define IA64_PSR_RI_0 0x0000000000000000
-#define IA64_PSR_RI_1 0x0000020000000000
-#define IA64_PSR_RI_2 0x0000040000000000
-#define IA64_PSR_ED 0x0000080000000000
-#define IA64_PSR_BN 0x0000100000000000
-#define IA64_PSR_IA 0x0000200000000000
-
-/*
- * Definition of ISR bits.
- */
-#define IA64_ISR_CODE 0x000000000000ffff
-#define IA64_ISR_VECTOR 0x0000000000ff0000
-#define IA64_ISR_X 0x0000000100000000
-#define IA64_ISR_W 0x0000000200000000
-#define IA64_ISR_R 0x0000000400000000
-#define IA64_ISR_NA 0x0000000800000000
-#define IA64_ISR_SP 0x0000001000000000
-#define IA64_ISR_RS 0x0000002000000000
-#define IA64_ISR_IR 0x0000004000000000
-#define IA64_ISR_NI 0x0000008000000000
-#define IA64_ISR_SO 0x0000010000000000
-#define IA64_ISR_EI 0x0000060000000000
-#define IA64_ISR_EI_0 0x0000000000000000
-#define IA64_ISR_EI_1 0x0000020000000000
-#define IA64_ISR_EI_2 0x0000040000000000
-#define IA64_ISR_ED 0x0000080000000000
-
-/*
- * Vector numbers for various ia64 interrupts.
- */
-#define IA64_VEC_VHPT 0
-#define IA64_VEC_ITLB 1
-#define IA64_VEC_DTLB 2
-#define IA64_VEC_ALT_ITLB 3
-#define IA64_VEC_ALT_DTLB 4
-#define IA64_VEC_NESTED_DTLB 5
-#define IA64_VEC_IKEY_MISS 6
-#define IA64_VEC_DKEY_MISS 7
-#define IA64_VEC_DIRTY_BIT 8
-#define IA64_VEC_INST_ACCESS 9
-#define IA64_VEC_DATA_ACCESS 10
-#define IA64_VEC_BREAK 11
-#define IA64_VEC_EXT_INTR 12
-#define IA64_VEC_PAGE_NOT_PRESENT 20
-#define IA64_VEC_KEY_PERMISSION 21
-#define IA64_VEC_INST_ACCESS_RIGHTS 22
-#define IA64_VEC_DATA_ACCESS_RIGHTS 23
-#define IA64_VEC_GENERAL_EXCEPTION 24
-#define IA64_VEC_DISABLED_FP 25
-#define IA64_VEC_NAT_CONSUMPTION 26
-#define IA64_VEC_SPECULATION 27
-#define IA64_VEC_DEBUG 29
-#define IA64_VEC_UNALIGNED_REFERENCE 30
-#define IA64_VEC_UNSUPP_DATA_REFERENCE 31
-#define IA64_VEC_FLOATING_POINT_FAULT 32
-#define IA64_VEC_FLOATING_POINT_TRAP 33
-#define IA64_VEC_LOWER_PRIVILEGE_TRANSFER 34
-#define IA64_VEC_TAKEN_BRANCH_TRAP 35
-#define IA64_VEC_SINGLE_STEP_TRAP 36
-#define IA64_VEC_IA32_EXCEPTION 45
-#define IA64_VEC_IA32_INTERCEPT 46
-#define IA64_VEC_IA32_INTERRUPT 47
-
-/*
- * IA-32 exceptions.
- */
-#define IA32_EXCEPTION_DIVIDE 0
-#define IA32_EXCEPTION_DEBUG 1
-#define IA32_EXCEPTION_BREAK 3
-#define IA32_EXCEPTION_OVERFLOW 4
-#define IA32_EXCEPTION_BOUND 5
-#define IA32_EXCEPTION_DNA 7
-#define IA32_EXCEPTION_NOT_PRESENT 11
-#define IA32_EXCEPTION_STACK_FAULT 12
-#define IA32_EXCEPTION_GPFAULT 13
-#define IA32_EXCEPTION_FPERROR 16
-#define IA32_EXCEPTION_ALIGNMENT_CHECK 17
-#define IA32_EXCEPTION_STREAMING_SIMD 19
-
-#define IA32_INTERCEPT_INSTRUCTION 0
-#define IA32_INTERCEPT_GATE 1
-#define IA32_INTERCEPT_SYSTEM_FLAG 2
-#define IA32_INTERCEPT_LOCK 4
-
-#ifndef LOCORE
-
-/*
- * Various special ia64 instructions.
- */
-
-/*
- * Memory Fence.
- */
-static __inline void
-ia64_mf(void)
-{
- __asm __volatile("mf");
-}
-
-static __inline void
-ia64_mf_a(void)
-{
- __asm __volatile("mf.a");
-}
-
-/*
- * Flush Cache.
- */
-static __inline void
-ia64_fc(u_int64_t va)
-{
- __asm __volatile("fc %0" :: "r"(va));
-}
-
-/*
- * Sync instruction stream.
- */
-static __inline void
-ia64_sync_i(void)
-{
- __asm __volatile("sync.i");
-}
-
-/*
- * Calculate address in VHPT for va.
- */
-static __inline u_int64_t
-ia64_thash(u_int64_t va)
-{
- u_int64_t result;
- __asm __volatile("thash %0=%1" : "=r" (result) : "r" (va));
- return result;
-}
-
-/*
- * Calculate VHPT tag for va.
- */
-static __inline u_int64_t
-ia64_ttag(u_int64_t va)
-{
- u_int64_t result;
- __asm __volatile("ttag %0=%1" : "=r" (result) : "r" (va));
- return result;
-}
-
-/*
- * Convert virtual address to physical.
- */
-static __inline u_int64_t
-ia64_tpa(u_int64_t va)
-{
- u_int64_t result;
- __asm __volatile("tpa %0=%1" : "=r" (result) : "r" (va));
- return result;
-}
-
-/*
- * Generate a ptc.e instruction.
- */
-static __inline void
-ia64_ptc_e(u_int64_t v)
-{
- __asm __volatile("ptc.e %0;; srlz.i;;" :: "r"(v));
-}
-
-/*
- * Generate a ptc.g instruction.
- */
-static __inline void
-ia64_ptc_g(u_int64_t va, u_int64_t log2size)
-{
- __asm __volatile("ptc.g %0,%1;; srlz.i;;" :: "r"(va), "r"(log2size));
-}
-
-/*
- * Generate a ptc.ga instruction.
- */
-static __inline void
-ia64_ptc_ga(u_int64_t va, u_int64_t log2size)
-{
- __asm __volatile("ptc.ga %0,%1;; srlz.i;;" :: "r"(va), "r"(log2size));
-}
-
-/*
- * Generate a ptc.l instruction.
- */
-static __inline void
-ia64_ptc_l(u_int64_t va, u_int64_t log2size)
-{
- __asm __volatile("ptc.l %0,%1;; srlz.i;;" :: "r"(va), "r"(log2size));
-}
-
-/*
- * Read the value of psr.
- */
-static __inline u_int64_t
-ia64_get_psr(void)
-{
- u_int64_t result;
- __asm __volatile("mov %0=psr;;" : "=r" (result));
- return result;
-}
-
-/*
- * Define accessors for application registers.
- */
-
-#define IA64_AR(name) \
- \
-static __inline u_int64_t \
-ia64_get_##name(void) \
-{ \
- u_int64_t result; \
- __asm __volatile("mov %0=ar." #name : "=r" (result)); \
- return result; \
-} \
- \
-static __inline void \
-ia64_set_##name(u_int64_t v) \
-{ \
- __asm __volatile("mov ar." #name "=%0;;" :: "r" (v)); \
-}
-
-IA64_AR(k0)
-IA64_AR(k1)
-IA64_AR(k2)
-IA64_AR(k3)
-IA64_AR(k4)
-IA64_AR(k5)
-IA64_AR(k6)
-IA64_AR(k7)
-
-IA64_AR(rsc)
-IA64_AR(bsp)
-IA64_AR(bspstore)
-IA64_AR(rnat)
-
-IA64_AR(fcr)
-
-IA64_AR(eflag)
-IA64_AR(csd)
-IA64_AR(ssd)
-IA64_AR(cflg)
-IA64_AR(fsr)
-IA64_AR(fir)
-IA64_AR(fdr)
-
-IA64_AR(ccv)
-
-IA64_AR(unat)
-
-IA64_AR(fpsr)
-
-IA64_AR(itc)
-
-IA64_AR(pfs)
-IA64_AR(lc)
-IA64_AR(ec)
-
-/*
- * Define accessors for control registers.
- */
-
-#define IA64_CR(name) \
- \
-static __inline u_int64_t \
-ia64_get_##name(void) \
-{ \
- u_int64_t result; \
- __asm __volatile("mov %0=cr." #name : "=r" (result)); \
- return result; \
-} \
- \
-static __inline void \
-ia64_set_##name(u_int64_t v) \
-{ \
- __asm __volatile("mov cr." #name "=%0;;" :: "r" (v)); \
-}
-
-IA64_CR(dcr)
-IA64_CR(itm)
-IA64_CR(iva)
-
-IA64_CR(pta)
-
-IA64_CR(ipsr)
-IA64_CR(isr)
-
-IA64_CR(iip)
-IA64_CR(ifa)
-IA64_CR(itir)
-IA64_CR(iipa)
-IA64_CR(ifs)
-IA64_CR(iim)
-IA64_CR(iha)
-
-IA64_CR(lid)
-IA64_CR(ivr)
-IA64_CR(tpr)
-IA64_CR(eoi)
-IA64_CR(irr0)
-IA64_CR(irr1)
-IA64_CR(irr2)
-IA64_CR(irr3)
-IA64_CR(itv)
-IA64_CR(pmv)
-IA64_CR(cmcv)
-
-IA64_CR(lrr0)
-IA64_CR(lrr1)
-
-/*
- * Write a region register.
- */
-static __inline void
-ia64_set_rr(u_int64_t rrbase, u_int64_t v)
-{
- __asm __volatile("mov rr[%0]=%1;; srlz.d;;"
- :: "r"(rrbase), "r"(v) : "memory");
-}
-
-/*
- * Read a CPUID register.
- */
-static __inline u_int64_t
-ia64_get_cpuid(int i)
-{
- u_int64_t result;
- __asm __volatile("mov %0=cpuid[%1]"
- : "=r" (result) : "r"(i));
- return result;
-}
-
-static __inline void
-ia64_disable_highfp(void)
-{
- __asm __volatile("ssm psr.dfh;; srlz.d");
-}
-
-static __inline void
-ia64_enable_highfp(void)
-{
- __asm __volatile("rsm psr.dfh;; srlz.d");
-}
-
-#endif /* !LOCORE */
-
-#endif /* _MACHINE_IA64_CPU_H_ */
-
--- sys/ia64/include/varargs.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*-
- * Copyright (c) 2002 David E. O'Brien. All rights reserved.
- * Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
- * (c) UNIX System Laboratories, Inc.
- * All or some portions of this file are derived from material licensed
- * to the University of California by American Telephone and Telegraph
- * Co. or Unix System Laboratories, Inc. and are reproduced herein with
- * the permission of UNIX System Laboratories, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)varargs.h 8.2 (Berkeley) 3/22/94
- * $FreeBSD: src/sys/ia64/include/varargs.h,v 1.5 2003/09/28 05:34:07 marcel Exp $
- */
-
-#ifndef _MACHINE_VARARGS_H_
-#define _MACHINE_VARARGS_H_
-
-#error "<varargs.h> is obsolete on ia64. Use <stdarg.h> instead."
-
-#endif /* !_MACHINE_VARARGS_H_ */
--- sys/ia64/include/atomic.h
+++ /dev/null
@@ -1,364 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/atomic.h,v 1.8.2.2 2005/10/06 18:12:05 jhb Exp $
- */
-
-#ifndef _MACHINE_ATOMIC_H_
-#define _MACHINE_ATOMIC_H_
-
-/*
- * Various simple arithmetic on memory which is atomic in the presence
- * of interrupts and SMP safe.
- */
-
-/*
- * Everything is built out of cmpxchg.
- */
-#define IA64_CMPXCHG(sz, sem, p, cmpval, newval, ret) \
- __asm __volatile ( \
- "mov ar.ccv=%2;;\n\t" \
- "cmpxchg" #sz "." #sem " %0=%4,%3,ar.ccv\n\t" \
- : "=r" (ret), "=m" (*p) \
- : "r" (cmpval), "r" (newval), "m" (*p) \
- : "memory")
-
-/*
- * Some common forms of cmpxch.
- */
-static __inline uint32_t
-ia64_cmpxchg_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
-{
- uint32_t ret;
- IA64_CMPXCHG(4, acq, p, cmpval, newval, ret);
- return (ret);
-}
-
-static __inline uint32_t
-ia64_cmpxchg_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
-{
- uint32_t ret;
- IA64_CMPXCHG(4, rel, p, cmpval, newval, ret);
- return (ret);
-}
-
-static __inline uint64_t
-ia64_cmpxchg_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
-{
- uint64_t ret;
- IA64_CMPXCHG(8, acq, p, cmpval, newval, ret);
- return (ret);
-}
-
-static __inline uint64_t
-ia64_cmpxchg_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
-{
- uint64_t ret;
- IA64_CMPXCHG(8, rel, p, cmpval, newval, ret);
- return (ret);
-}
-
-#define ATOMIC_STORE_LOAD(type, width, size) \
- static __inline uint##width##_t \
- ia64_ld_acq_##width(volatile uint##width##_t* p) \
- { \
- uint##width##_t v; \
- __asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
- : "m" (*p) : "memory"); \
- return (v); \
- } \
- \
- static __inline uint##width##_t \
- atomic_load_acq_##width(volatile uint##width##_t* p) \
- { \
- uint##width##_t v; \
- __asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
- : "m" (*p) : "memory"); \
- return (v); \
- } \
- \
- static __inline uint##width##_t \
- atomic_load_acq_##type(volatile uint##width##_t* p) \
- { \
- uint##width##_t v; \
- __asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
- : "m" (*p) : "memory"); \
- return (v); \
- } \
- \
- static __inline void \
- ia64_st_rel_##width(volatile uint##width##_t* p, uint##width##_t v) \
- { \
- __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
- : "r" (v) : "memory"); \
- } \
- \
- static __inline void \
- atomic_store_rel_##width(volatile uint##width##_t* p, \
- uint##width##_t v) \
- { \
- __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
- : "r" (v) : "memory"); \
- } \
- \
- static __inline void \
- atomic_store_rel_##type(volatile uint##width##_t* p, \
- uint##width##_t v) \
- { \
- __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
- : "r" (v) : "memory"); \
- }
-
-ATOMIC_STORE_LOAD(char, 8, "1")
-ATOMIC_STORE_LOAD(short, 16, "2")
-ATOMIC_STORE_LOAD(int, 32, "4")
-ATOMIC_STORE_LOAD(long, 64, "8")
-
-#undef ATOMIC_STORE_LOAD
-
-#define atomic_load_acq_ptr atomic_load_acq_64
-#define atomic_store_rel_ptr atomic_store_rel_64
-
-#define IA64_ATOMIC(sz, type, name, width, op) \
- static __inline type \
- atomic_##name##_acq_##width(volatile type *p, type v) \
- { \
- type old, ret; \
- do { \
- old = *p; \
- IA64_CMPXCHG(sz, acq, p, old, old op v, ret); \
- } while (ret != old); \
- return (old); \
- } \
- \
- static __inline type \
- atomic_##name##_rel_##width(volatile type *p, type v) \
- { \
- type old, ret; \
- do { \
- old = *p; \
- IA64_CMPXCHG(sz, rel, p, old, old op v, ret); \
- } while (ret != old); \
- return (old); \
- }
-
-IA64_ATOMIC(1, uint8_t, set, 8, |)
-IA64_ATOMIC(2, uint16_t, set, 16, |)
-IA64_ATOMIC(4, uint32_t, set, 32, |)
-IA64_ATOMIC(8, uint64_t, set, 64, |)
-
-IA64_ATOMIC(1, uint8_t, clear, 8, &~)
-IA64_ATOMIC(2, uint16_t, clear, 16, &~)
-IA64_ATOMIC(4, uint32_t, clear, 32, &~)
-IA64_ATOMIC(8, uint64_t, clear, 64, &~)
-
-IA64_ATOMIC(1, uint8_t, add, 8, +)
-IA64_ATOMIC(2, uint16_t, add, 16, +)
-IA64_ATOMIC(4, uint32_t, add, 32, +)
-IA64_ATOMIC(8, uint64_t, add, 64, +)
-
-IA64_ATOMIC(1, uint8_t, subtract, 8, -)
-IA64_ATOMIC(2, uint16_t, subtract, 16, -)
-IA64_ATOMIC(4, uint32_t, subtract, 32, -)
-IA64_ATOMIC(8, uint64_t, subtract, 64, -)
-
-#undef IA64_ATOMIC
-
-#define atomic_set_8 atomic_set_acq_8
-#define atomic_clear_8 atomic_clear_acq_8
-#define atomic_add_8 atomic_add_acq_8
-#define atomic_subtract_8 atomic_subtract_acq_8
-
-#define atomic_set_16 atomic_set_acq_16
-#define atomic_clear_16 atomic_clear_acq_16
-#define atomic_add_16 atomic_add_acq_16
-#define atomic_subtract_16 atomic_subtract_acq_16
-
-#define atomic_set_32 atomic_set_acq_32
-#define atomic_clear_32 atomic_clear_acq_32
-#define atomic_add_32 atomic_add_acq_32
-#define atomic_subtract_32 atomic_subtract_acq_32
-
-#define atomic_set_64 atomic_set_acq_64
-#define atomic_clear_64 atomic_clear_acq_64
-#define atomic_add_64 atomic_add_acq_64
-#define atomic_subtract_64 atomic_subtract_acq_64
-
-#define atomic_set_char atomic_set_8
-#define atomic_clear_char atomic_clear_8
-#define atomic_add_char atomic_add_8
-#define atomic_subtract_char atomic_subtract_8
-#define atomic_set_acq_char atomic_set_acq_8
-#define atomic_clear_acq_char atomic_clear_acq_8
-#define atomic_add_acq_char atomic_add_acq_8
-#define atomic_subtract_acq_char atomic_subtract_acq_8
-#define atomic_set_rel_char atomic_set_rel_8
-#define atomic_clear_rel_char atomic_clear_rel_8
-#define atomic_add_rel_char atomic_add_rel_8
-#define atomic_subtract_rel_char atomic_subtract_rel_8
-
-#define atomic_set_short atomic_set_16
-#define atomic_clear_short atomic_clear_16
-#define atomic_add_short atomic_add_16
-#define atomic_subtract_short atomic_subtract_16
-#define atomic_set_acq_short atomic_set_acq_16
-#define atomic_clear_acq_short atomic_clear_acq_16
-#define atomic_add_acq_short atomic_add_acq_16
-#define atomic_subtract_acq_short atomic_subtract_acq_16
-#define atomic_set_rel_short atomic_set_rel_16
-#define atomic_clear_rel_short atomic_clear_rel_16
-#define atomic_add_rel_short atomic_add_rel_16
-#define atomic_subtract_rel_short atomic_subtract_rel_16
-
-#define atomic_set_int atomic_set_32
-#define atomic_clear_int atomic_clear_32
-#define atomic_add_int atomic_add_32
-#define atomic_subtract_int atomic_subtract_32
-#define atomic_set_acq_int atomic_set_acq_32
-#define atomic_clear_acq_int atomic_clear_acq_32
-#define atomic_add_acq_int atomic_add_acq_32
-#define atomic_subtract_acq_int atomic_subtract_acq_32
-#define atomic_set_rel_int atomic_set_rel_32
-#define atomic_clear_rel_int atomic_clear_rel_32
-#define atomic_add_rel_int atomic_add_rel_32
-#define atomic_subtract_rel_int atomic_subtract_rel_32
-
-#define atomic_set_long atomic_set_64
-#define atomic_clear_long atomic_clear_64
-#define atomic_add_long atomic_add_64
-#define atomic_subtract_long atomic_subtract_64
-#define atomic_set_acq_long atomic_set_acq_64
-#define atomic_clear_acq_long atomic_clear_acq_64
-#define atomic_add_acq_long atomic_add_acq_64
-#define atomic_subtract_acq_long atomic_subtract_acq_64
-#define atomic_set_rel_long atomic_set_rel_64
-#define atomic_clear_rel_long atomic_clear_rel_64
-#define atomic_add_rel_long atomic_add_rel_64
-#define atomic_subtract_rel_long atomic_subtract_rel_64
-
-#define atomic_set_ptr atomic_set_64
-#define atomic_clear_ptr atomic_clear_64
-#define atomic_add_ptr atomic_add_64
-#define atomic_subtract_ptr atomic_subtract_64
-#define atomic_set_acq_ptr atomic_set_acq_64
-#define atomic_clear_acq_ptr atomic_clear_acq_64
-#define atomic_add_acq_ptr atomic_add_acq_64
-#define atomic_subtract_acq_ptr atomic_subtract_acq_64
-#define atomic_set_rel_ptr atomic_set_rel_64
-#define atomic_clear_rel_ptr atomic_clear_rel_64
-#define atomic_add_rel_ptr atomic_add_rel_64
-#define atomic_subtract_rel_ptr atomic_subtract_rel_64
-
-#undef IA64_CMPXCHG
-
-/*
- * Atomically compare the value stored at *p with cmpval and if the
- * two values are equal, update the value of *p with newval. Returns
- * zero if the compare failed, nonzero otherwise.
- */
-static __inline int
-atomic_cmpset_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
-{
- return (ia64_cmpxchg_acq_32(p, cmpval, newval) == cmpval);
-}
-
-static __inline int
-atomic_cmpset_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
-{
- return (ia64_cmpxchg_rel_32(p, cmpval, newval) == cmpval);
-}
-
-/*
- * Atomically compare the value stored at *p with cmpval and if the
- * two values are equal, update the value of *p with newval. Returns
- * zero if the compare failed, nonzero otherwise.
- */
-static __inline int
-atomic_cmpset_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
-{
- return (ia64_cmpxchg_acq_64(p, cmpval, newval) == cmpval);
-}
-
-static __inline int
-atomic_cmpset_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
-{
- return (ia64_cmpxchg_rel_64(p, cmpval, newval) == cmpval);
-}
-
-#define atomic_cmpset_32 atomic_cmpset_acq_32
-#define atomic_cmpset_64 atomic_cmpset_acq_64
-#define atomic_cmpset_int atomic_cmpset_32
-#define atomic_cmpset_long atomic_cmpset_64
-#define atomic_cmpset_ptr atomic_cmpset_64
-#define atomic_cmpset_acq_int atomic_cmpset_acq_32
-#define atomic_cmpset_rel_int atomic_cmpset_rel_32
-#define atomic_cmpset_acq_long atomic_cmpset_acq_64
-#define atomic_cmpset_rel_long atomic_cmpset_rel_64
-#define atomic_cmpset_acq_ptr atomic_cmpset_acq_64
-#define atomic_cmpset_rel_ptr atomic_cmpset_rel_64
-
-static __inline uint32_t
-atomic_readandclear_32(volatile uint32_t* p)
-{
- uint32_t val;
- do {
- val = *p;
- } while (!atomic_cmpset_32(p, val, 0));
- return (val);
-}
-
-static __inline uint64_t
-atomic_readandclear_64(volatile uint64_t* p)
-{
- uint64_t val;
- do {
- val = *p;
- } while (!atomic_cmpset_64(p, val, 0));
- return (val);
-}
-
-#define atomic_readandclear_int atomic_readandclear_32
-#define atomic_readandclear_long atomic_readandclear_64
-
-/*
- * Atomically add the value of v to the integer pointed to by p and return
- * the previous value of *p.
- *
- * XXX: Should we use the fetchadd instruction here?
- */
-static __inline uint32_t
-atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
-{
- uint32_t value;
-
- do {
- value = *p;
- } while (!atomic_cmpset_32(p, value, value + v));
- return (value);
-}
-
-#define atomic_fetchadd_int atomic_fetchadd_32
-
-#endif /* ! _MACHINE_ATOMIC_H_ */
--- sys/ia64/include/frame.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*-
- * Copyright (c) 2000 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/frame.h,v 1.5 2003/05/16 21:26:41 marcel Exp $
- */
-
-#ifndef _MACHINE_FRAME_H_
-#define _MACHINE_FRAME_H_
-
-#include <machine/_regset.h>
-
-/*
- * Software trap, exception, and syscall frame.
- */
-struct trapframe {
- uint64_t tf_length;
- uint64_t tf_flags;
-#define FRAME_SYSCALL 1 /* syscalls use a partial trapframe */
- struct _special tf_special;
- struct _caller_saved tf_scratch;
- struct _caller_saved_fp tf_scratch_fp;
-};
-
-#endif /* _MACHINE_FRAME_H_ */
--- sys/ia64/include/mutex.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*-
- * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Berkeley Software Design Inc's name may not be used to endorse or
- * promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from BSDI $Id: mutex.h,v 2.7.2.35 2000/04/27 03:10:26 cp Exp $
- * $FreeBSD: src/sys/ia64/include/mutex.h,v 1.16 2001/12/18 00:27:16 jhb Exp $
- */
-
-#ifndef _MACHINE_MUTEX_H_
-#define _MACHINE_MUTEX_H_
-
-#ifdef LOCORE
-
-/*
- * Simple assembly macros to get and release non-recursive spin locks
- */
-#define MTX_ENTER(lck, rPSR, rOLD, rNEW, rLCK) \
- mov rPSR=psr ; \
- mov rNEW=pcpup ; \
- addl rLCK=@ltoff(lck),gp ;; \
- ld8 rLCK=[rLCK] ;; \
- add rLCK=MTX_LOCK,rLCK ;; \
- rsm psr.i ; \
- mov ar.ccv=MTX_UNOWNED ; \
- add rNEW=PC_CURTHREAD,rNEW ;; \
- ld8 rNEW=[rNEW] ;; \
-1: cmpxchg8.acq rOLD=[rLCK],rNEW,ar.ccv ;; \
- cmp.eq p1,p0=MTX_UNOWNED,rOLD ;; \
-(p1) br.cond.spnt.few 1b ;; \
- addl rLCK=@ltoff(lck),gp ;; \
- ld8 rLCK=[rLCK] ;; \
- add rLCK=MTX_SAVEINTR,rLCK ;; \
- st4 [rLCK]=rPSR
-
-#define MTX_EXIT(lck, rTMP, rLCK) \
- mov rTMP=MTX_UNOWNED ; \
- addl rLCK=@ltoff(lck),gp;; \
- ld8 rLCK=[rLCK];; \
- add rLCK=MTX_LOCK,rLCK;; \
- st8.rel [rLCK]=rTMP,MTX_SAVEINTR-MTX_LOCK ;; \
- ld4 rTMP=[rLCK] ;; \
- mov psr.l=rTMP ;; \
- srlz.d
-
-#endif /* !LOCORE */
-
-#endif /* __MACHINE_MUTEX_H */
--- sys/ia64/include/mca.h
+++ /dev/null
@@ -1,246 +0,0 @@
-/*-
- * Copyright (c) 2002 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/mca.h,v 1.6 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_MCA_H_
-#define _MACHINE_MCA_H_
-
-struct mca_record_header {
- uint64_t rh_seqnr; /* Record id. */
- uint8_t rh_major; /* BCD (=02). */
- uint8_t rh_minor; /* BCD (=00). */
- uint8_t rh_error; /* Error severity. */
-#define MCA_RH_ERROR_RECOVERABLE 0
-#define MCA_RH_ERROR_FATAL 1
-#define MCA_RH_ERROR_CORRECTED 2
- uint8_t rh_flags;
-#define MCA_RH_FLAGS_PLATFORM_ID 0x01 /* Platform_id present. */
- uint32_t rh_length; /* Size including header. */
- uint8_t rh_time[8];
-#define MCA_RH_TIME_SEC 0
-#define MCA_RH_TIME_MIN 1
-#define MCA_RH_TIME_HOUR 2
-#define MCA_RH_TIME_MDAY 4
-#define MCA_RH_TIME_MON 5
-#define MCA_RH_TIME_YEAR 6
-#define MCA_RH_TIME_CENT 7
- struct uuid rh_platform;
-};
-
-struct mca_section_header {
- struct uuid sh_uuid;
- uint8_t sh_major; /* BCD (=02). */
- uint8_t sh_minor; /* BCD (=00). */
- uint8_t sh_flags;
-#define MCA_SH_FLAGS_CORRECTED 0x01 /* Error has been corrected. */
-#define MCA_SH_FLAGS_PROPAGATE 0x02 /* Possible propagation. */
-#define MCA_SH_FLAGS_RESET 0x04 /* Reset device before use. */
-#define MCA_SH_FLAGS_VALID 0x80 /* Flags are valid. */
- uint8_t __reserved;
- uint32_t sh_length; /* Size including header. */
-};
-
-struct mca_cpu_record {
- uint64_t cpu_flags;
-#define MCA_CPU_FLAGS_ERRMAP (1ULL << 0)
-#define MCA_CPU_FLAGS_STATE (1ULL << 1)
-#define MCA_CPU_FLAGS_CR_LID (1ULL << 2)
-#define MCA_CPU_FLAGS_PSI_STRUCT (1ULL << 3)
-#define MCA_CPU_FLAGS_CACHE(x) (((x) >> 4) & 15)
-#define MCA_CPU_FLAGS_TLB(x) (((x) >> 8) & 15)
-#define MCA_CPU_FLAGS_BUS(x) (((x) >> 12) & 15)
-#define MCA_CPU_FLAGS_REG(x) (((x) >> 16) & 15)
-#define MCA_CPU_FLAGS_MS(x) (((x) >> 20) & 15)
-#define MCA_CPU_FLAGS_CPUID (1ULL << 24)
- uint64_t cpu_errmap;
- uint64_t cpu_state;
- uint64_t cpu_cr_lid;
- /* Nx cpu_mod (cache). */
- /* Nx cpu_mod (TLB). */
- /* Nx cpu_mod (bus). */
- /* Nx cpu_mod (reg). */
- /* Nx cpu_mod (MS). */
- /* cpu_cpuid. */
- /* cpu_psi. */
-};
-
-struct mca_cpu_cpuid {
- uint64_t cpuid[6];
-};
-
-struct mca_cpu_mod {
- uint64_t cpu_mod_flags;
-#define MCA_CPU_MOD_FLAGS_INFO (1ULL << 0)
-#define MCA_CPU_MOD_FLAGS_REQID (1ULL << 1)
-#define MCA_CPU_MOD_FLAGS_RSPID (1ULL << 2)
-#define MCA_CPU_MOD_FLAGS_TGTID (1ULL << 3)
-#define MCA_CPU_MOD_FLAGS_IP (1ULL << 4)
- uint64_t cpu_mod_info;
- uint64_t cpu_mod_reqid;
- uint64_t cpu_mod_rspid;
- uint64_t cpu_mod_tgtid;
- uint64_t cpu_mod_ip;
-};
-
-struct mca_cpu_psi {
- uint64_t cpu_psi_flags;
-#define MCA_CPU_PSI_FLAGS_STATE (1ULL << 0)
-#define MCA_CPU_PSI_FLAGS_BR (1ULL << 1)
-#define MCA_CPU_PSI_FLAGS_CR (1ULL << 2)
-#define MCA_CPU_PSI_FLAGS_AR (1ULL << 3)
-#define MCA_CPU_PSI_FLAGS_RR (1ULL << 4)
-#define MCA_CPU_PSI_FLAGS_FR (1ULL << 5)
- uint8_t cpu_psi_state[1024]; /* XXX variable? */
- uint64_t cpu_psi_br[8];
- uint64_t cpu_psi_cr[128]; /* XXX variable? */
- uint64_t cpu_psi_ar[128]; /* XXX variable? */
- uint64_t cpu_psi_rr[8];
- uint64_t cpu_psi_fr[256]; /* 16 bytes per register! */
-};
-
-struct mca_mem_record {
- uint64_t mem_flags;
-#define MCA_MEM_FLAGS_STATUS (1ULL << 0)
-#define MCA_MEM_FLAGS_ADDR (1ULL << 1)
-#define MCA_MEM_FLAGS_ADDRMASK (1ULL << 2)
-#define MCA_MEM_FLAGS_NODE (1ULL << 3)
-#define MCA_MEM_FLAGS_CARD (1ULL << 4)
-#define MCA_MEM_FLAGS_MODULE (1ULL << 5)
-#define MCA_MEM_FLAGS_BANK (1ULL << 6)
-#define MCA_MEM_FLAGS_DEVICE (1ULL << 7)
-#define MCA_MEM_FLAGS_ROW (1ULL << 8)
-#define MCA_MEM_FLAGS_COLUMN (1ULL << 9)
-#define MCA_MEM_FLAGS_BITPOS (1ULL << 10)
-#define MCA_MEM_FLAGS_REQID (1ULL << 11)
-#define MCA_MEM_FLAGS_RSPID (1ULL << 12)
-#define MCA_MEM_FLAGS_TGTID (1ULL << 13)
-#define MCA_MEM_FLAGS_BUSDATA (1ULL << 14)
-#define MCA_MEM_FLAGS_OEM_ID (1ULL << 15)
-#define MCA_MEM_FLAGS_OEM_DATA (1ULL << 16)
- uint64_t mem_status;
- uint64_t mem_addr;
- uint64_t mem_addrmask;
- uint16_t mem_node;
- uint16_t mem_card;
- uint16_t mem_module;
- uint16_t mem_bank;
- uint16_t mem_device;
- uint16_t mem_row;
- uint16_t mem_column;
- uint16_t mem_bitpos;
- uint64_t mem_reqid;
- uint64_t mem_rspid;
- uint64_t mem_tgtid;
- uint64_t mem_busdata;
- struct uuid mem_oem_id;
- uint16_t mem_oem_length; /* Size of OEM data. */
- /* N bytes of OEM platform data. */
-};
-
-struct mca_pcibus_record {
- uint64_t pcibus_flags;
-#define MCA_PCIBUS_FLAGS_STATUS (1ULL << 0)
-#define MCA_PCIBUS_FLAGS_ERROR (1ULL << 1)
-#define MCA_PCIBUS_FLAGS_BUS (1ULL << 2)
-#define MCA_PCIBUS_FLAGS_ADDR (1ULL << 3)
-#define MCA_PCIBUS_FLAGS_DATA (1ULL << 4)
-#define MCA_PCIBUS_FLAGS_CMD (1ULL << 5)
-#define MCA_PCIBUS_FLAGS_REQID (1ULL << 6)
-#define MCA_PCIBUS_FLAGS_RSPID (1ULL << 7)
-#define MCA_PCIBUS_FLAGS_TGTID (1ULL << 8)
-#define MCA_PCIBUS_FLAGS_OEM_ID (1ULL << 9)
-#define MCA_PCIBUS_FLAGS_OEM_DATA (1ULL << 10)
- uint64_t pcibus_status;
- uint16_t pcibus_error;
- uint16_t pcibus_bus;
- uint32_t __reserved;
- uint64_t pcibus_addr;
- uint64_t pcibus_data;
- uint64_t pcibus_cmd;
- uint64_t pcibus_reqid;
- uint64_t pcibus_rspid;
- uint64_t pcibus_tgtid;
- struct uuid pcibus_oem_id;
- uint16_t pcibus_oem_length; /* Size of OEM data. */
- /* N bytes of OEM platform data. */
-};
-
-struct mca_pcidev_record {
- uint64_t pcidev_flags;
-#define MCA_PCIDEV_FLAGS_STATUS (1ULL << 0)
-#define MCA_PCIDEV_FLAGS_INFO (1ULL << 1)
-#define MCA_PCIDEV_FLAGS_REG_MEM (1ULL << 2)
-#define MCA_PCIDEV_FLAGS_REG_IO (1ULL << 3)
-#define MCA_PCIDEV_FLAGS_REG_DATA (1ULL << 4)
-#define MCA_PCIDEV_FLAGS_OEM_DATA (1ULL << 5)
- uint64_t pcidev_status;
- struct {
- uint16_t info_vendor;
- uint16_t info_device;
- uint32_t info_ccfn; /* Class code & funct. nr. */
-#define MCA_PCIDEV_INFO_CLASS(x) ((x) & 0xffffff)
-#define MCA_PCIDEV_INFO_FUNCTION(x) (((x) >> 24) & 0xff)
- uint8_t info_slot;
- uint8_t info_bus;
- uint8_t info_segment;
- uint8_t __res0;
- uint32_t __res1;
- } pcidev_info;
- uint32_t pcidev_reg_mem;
- uint32_t pcidev_reg_io;
- /* Nx pcidev_reg. */
- /* M bytes of OEM platform data. */
-};
-
-struct mca_pcidev_reg {
- uint64_t pcidev_reg_addr;
- uint64_t pcidev_reg_data;
-};
-
-#define MCA_UUID_CPU \
- {0xe429faf1,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
-#define MCA_UUID_MEMORY \
- {0xe429faf2,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
-#define MCA_UUID_SEL \
- {0xe429faf3,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
-#define MCA_UUID_PCI_BUS \
- {0xe429faf4,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
-#define MCA_UUID_SMBIOS \
- {0xe429faf5,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
-#define MCA_UUID_PCI_DEV \
- {0xe429faf6,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
-#define MCA_UUID_GENERIC \
- {0xe429faf7,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
-
-#ifdef _KERNEL
-
-void ia64_mca_init(void);
-void ia64_mca_save_state(int);
-
-#endif /* _KERNEL */
-
-#endif /* _MACHINE_MCA_H_ */
--- sys/ia64/include/cpu.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/cpu.h,v 1.46 2005/01/06 22:18:23 imp Exp $ */
-/* From: NetBSD: cpu.h,v 1.18 1997/09/23 23:17:49 mjacob Exp */
-
-/*-
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1982, 1990, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: Utah $Hdr: cpu.h 1.16 91/03/25$
- *
- * @(#)cpu.h 8.4 (Berkeley) 1/5/94
- */
-
-#ifndef _MACHINE_CPU_H_
-#define _MACHINE_CPU_H_
-
-#include <machine/frame.h>
-
-/*
- * Arguments to hardclock and gatherstats encapsulate the previous machine
- * state in an opaque clockframe.
- */
-struct clockframe {
- struct trapframe cf_tf;
-};
-#define CLKF_PC(cf) ((cf)->cf_tf.tf_special.iip)
-#define CLKF_CPL(cf) ((cf)->cf_tf.tf_special.psr & IA64_PSR_CPL)
-#define CLKF_USERMODE(cf) (CLKF_CPL(cf) != IA64_PSR_CPL_KERN)
-
-#define TRAPF_PC(tf) ((tf)->tf_special.iip)
-#define TRAPF_CPL(tf) ((tf)->tf_special.psr & IA64_PSR_CPL)
-#define TRAPF_USERMODE(tf) (TRAPF_CPL(tf) != IA64_PSR_CPL_KERN)
-
-/*
- * CTL_MACHDEP definitions.
- */
-#define CPU_CONSDEV 1 /* dev_t: console terminal device */
-#define CPU_ADJKERNTZ 2 /* int: timezone offset (seconds) */
-#define CPU_DISRTCSET 3 /* int: disable resettodr() call */
-#define CPU_WALLCLOCK 4 /* int: indicates wall CMOS clock */
-#define CPU_MAXID 5 /* valid machdep IDs */
-
-#define CTL_MACHDEP_NAMES { \
- { 0, 0 }, \
- { "console_device", CTLTYPE_STRUCT }, \
- { "adjkerntz", CTLTYPE_INT }, \
- { "disable_rtc_set", CTLTYPE_INT }, \
- { "wall_cmos_clock", CTLTYPE_INT }, \
-}
-
-#ifdef _KERNEL
-
-#ifdef GPROF
-extern char btext[];
-extern char etext[];
-#endif
-
-/*
- * Return contents of in-cpu fast counter as a sort of "bogo-time"
- * for non-critical timing.
- */
-#define get_cyclecount ia64_get_itc
-
-/* Used by signaling code. */
-#define cpu_getstack(td) ((td)->td_frame->tf_special.sp)
-#define cpu_spinwait() /* nothing */
-
-void cpu_halt(void);
-void cpu_reset(void);
-void fork_trampoline(void); /* MAGIC */
-void swi_vm(void *);
-
-#endif /* _KERNEL */
-
-#endif /* _MACHINE_CPU_H_ */
--- sys/ia64/include/proc.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*-
- * Copyright (c) 2003 The FreeBSD Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/proc.h,v 1.14.2.1 2005/09/13 21:07:14 marcel Exp $
- */
-
-#ifndef _MACHINE_PROC_H_
-#define _MACHINE_PROC_H_
-
-struct mdthread {
- struct mtx md_highfp_mtx;
- int md_spinlock_count; /* (k) */
- int md_saved_intr; /* (k) */
-};
-
-struct mdproc {
- int __dummy; /* Avoid having an empty struct. */
-};
-
-#endif /* !_MACHINE_PROC_H_ */
--- sys/ia64/include/sapicreg.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/sapicreg.h,v 1.1 2001/10/05 10:30:08 dfr Exp $
- */
-
-#ifndef _MACHINE_SAPICREG_H_
-#define _MACHINE_SAPICREG_H_
-
-/*
- * Offsets from the SAPIC base in memory. Most registers are accessed
- * by indexing using the SAPIC_IO_SELECT register.
- */
-#define SAPIC_IO_SELECT 0x00
-#define SAPIC_IO_WINDOW 0x10
-#define SAPIC_APIC_EOI 0x40
-
-/*
- * Indexed registers.
- */
-#define SAPIC_ID 0x00
-#define SAPIC_VERSION 0x01
-#define SAPIC_ARBITRATION_ID 0x02
-#define SAPIC_RTE_BASE 0x10
-
-#endif /* ! _MACHINE_SAPICREG_H_ */
--- sys/ia64/include/bus.h
+++ /dev/null
@@ -1,830 +0,0 @@
-/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
-
-/*-
- * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
- * NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
- * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Christopher G. Demetriou
- * for the NetBSD Project.
- * 4. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-/* $FreeBSD: src/sys/ia64/include/bus.h,v 1.22 2005/05/29 04:42:28 nyan Exp $ */
-
-#ifndef _MACHINE_BUS_H_
-#define _MACHINE_BUS_H_
-
-#include <machine/_bus.h>
-#include <machine/cpufunc.h>
-
-/*
- * Values for the ia64 bus space tag, not to be used directly by MI code.
- */
-#define IA64_BUS_SPACE_IO 0 /* space is i/o space */
-#define IA64_BUS_SPACE_MEM 1 /* space is mem space */
-
-#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
-#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
-#define BUS_SPACE_MAXSIZE 0xFFFFFFFFFFFFFFFF
-#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
-#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
-#define BUS_SPACE_MAXADDR 0xFFFFFFFF
-
-#define BUS_SPACE_UNRESTRICTED (~0)
-
-/*
- * Map a region of device bus space into CPU virtual address space.
- */
-
-static __inline int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
- bus_size_t size, int flags,
- bus_space_handle_t *bshp);
-
-static __inline int
-bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr,
- bus_size_t size __unused, int flags __unused,
- bus_space_handle_t *bshp)
-{
-
- *bshp = addr;
- return (0);
-}
-
-/*
- * Unmap a region of device bus space.
- */
-static __inline void
-bus_space_unmap(bus_space_tag_t bst __unused, bus_space_handle_t bsh __unused,
- bus_size_t size __unused)
-{
-}
-
-
-/*
- * Get a new handle for a subregion of an already-mapped area of bus space.
- */
-static __inline int
-bus_space_subregion(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, bus_size_t size, bus_space_handle_t *nbshp)
-{
- *nbshp = bsh + ofs;
- return (0);
-}
-
-
-/*
- * Allocate a region of memory that is accessible to devices in bus space.
- */
-int
-bus_space_alloc(bus_space_tag_t bst, bus_addr_t rstart, bus_addr_t rend,
- bus_size_t size, bus_size_t align, bus_size_t boundary, int flags,
- bus_addr_t *addrp, bus_space_handle_t *bshp);
-
-
-/*
- * Free a region of bus space accessible memory.
- */
-void
-bus_space_free(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t size);
-
-
-/*
- * Bus read/write barrier method.
- */
-#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
-#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
-
-static __inline void
-bus_space_barrier(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
- bus_size_t size, int flags)
-{
- ia64_mf_a();
- ia64_mf();
-}
-
-
-/*
- * Read 1 unit of data from bus space described by the tag, handle and ofs
- * tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
- * data is returned.
- */
-static __inline uint8_t
-bus_space_read_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
-{
- uint8_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- return (*bsp);
-}
-
-static __inline uint16_t
-bus_space_read_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
-{
- uint16_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- return (*bsp);
-}
-
-static __inline uint32_t
-bus_space_read_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
-{
- uint32_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- return (*bsp);
-}
-
-static __inline uint64_t
-bus_space_read_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
-{
- uint64_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- return (*bsp);
-}
-
-
-/*
- * Write 1 unit of data to bus space described by the tag, handle and ofs
- * tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
- * data is passed by value.
- */
-static __inline void
-bus_space_write_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
- uint8_t val)
-{
- uint8_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = val;
-}
-
-static __inline void
-bus_space_write_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
- uint16_t val)
-{
- uint16_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = val;
-}
-
-static __inline void
-bus_space_write_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
- uint32_t val)
-{
- uint32_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = val;
-}
-
-static __inline void
-bus_space_write_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
- uint64_t val)
-{
- uint64_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = val;
-}
-
-
-/*
- * Read count units of data from bus space described by the tag, handle and
- * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
- * data is returned in the buffer passed by reference.
- */
-static __inline void
-bus_space_read_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint8_t *bufp, size_t count)
-{
- uint8_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bufp++ = *bsp;
-}
-
-static __inline void
-bus_space_read_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint16_t *bufp, size_t count)
-{
- uint16_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bufp++ = *bsp;
-}
-
-static __inline void
-bus_space_read_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint32_t *bufp, size_t count)
-{
- uint32_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bufp++ = *bsp;
-}
-
-static __inline void
-bus_space_read_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint64_t *bufp, size_t count)
-{
- uint64_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bufp++ = *bsp;
-}
-
-
-/*
- * Write count units of data to bus space described by the tag, handle and
- * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
- * data is read from the buffer passed by reference.
- */
-static __inline void
-bus_space_write_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, const uint8_t *bufp, size_t count)
-{
- uint8_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bsp = *bufp++;
-}
-
-static __inline void
-bus_space_write_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, const uint16_t *bufp, size_t count)
-{
- uint16_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bsp = *bufp++;
-}
-
-static __inline void
-bus_space_write_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, const uint32_t *bufp, size_t count)
-{
- uint32_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bsp = *bufp++;
-}
-
-static __inline void
-bus_space_write_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, const uint64_t *bufp, size_t count)
-{
- uint64_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bsp = *bufp++;
-}
-
-
-/*
- * Read count units of data from bus space described by the tag, handle and
- * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
- * data is written to the buffer passed by reference and read from successive
- * bus space addresses. Access is unordered.
- */
-static __inline void
-bus_space_read_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint8_t *bufp, size_t count)
-{
- uint8_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bufp++ = *bsp;
- ofs += 1;
- }
-}
-
-static __inline void
-bus_space_read_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint16_t *bufp, size_t count)
-{
- uint16_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bufp++ = *bsp;
- ofs += 2;
- }
-}
-
-static __inline void
-bus_space_read_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint32_t *bufp, size_t count)
-{
- uint32_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bufp++ = *bsp;
- ofs += 4;
- }
-}
-
-static __inline void
-bus_space_read_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint64_t *bufp, size_t count)
-{
- uint64_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bufp++ = *bsp;
- ofs += 8;
- }
-}
-
-
-/*
- * Write count units of data from bus space described by the tag, handle and
- * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
- * data is read from the buffer passed by reference and written to successive
- * bus space addresses. Access is unordered.
- */
-static __inline void
-bus_space_write_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, const uint8_t *bufp, size_t count)
-{
- uint8_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = *bufp++;
- ofs += 1;
- }
-}
-
-static __inline void
-bus_space_write_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, const uint16_t *bufp, size_t count)
-{
- uint16_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = *bufp++;
- ofs += 2;
- }
-}
-
-static __inline void
-bus_space_write_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, const uint32_t *bufp, size_t count)
-{
- uint32_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = *bufp++;
- ofs += 4;
- }
-}
-
-static __inline void
-bus_space_write_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, const uint64_t *bufp, size_t count)
-{
- uint64_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = *bufp++;
- ofs += 8;
- }
-}
-
-
-/*
- * Write count units of data from bus space described by the tag, handle and
- * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
- * data is passed by value. Writes are unordered.
- */
-static __inline void
-bus_space_set_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint8_t val, size_t count)
-{
- uint8_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bsp = val;
-}
-
-static __inline void
-bus_space_set_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint16_t val, size_t count)
-{
- uint16_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bsp = val;
-}
-
-static __inline void
-bus_space_set_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint32_t val, size_t count)
-{
- uint32_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bsp = val;
-}
-
-static __inline void
-bus_space_set_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint64_t val, size_t count)
-{
- uint64_t __volatile *bsp;
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- while (count-- > 0)
- *bsp = val;
-}
-
-
-/*
- * Write count units of data from bus space described by the tag, handle and
- * ofs tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
- * data is passed by value and written to successive bus space addresses.
- * Writes are unordered.
- */
-static __inline void
-bus_space_set_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint8_t val, size_t count)
-{
- uint8_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = val;
- ofs += 1;
- }
-}
-
-static __inline void
-bus_space_set_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint16_t val, size_t count)
-{
- uint16_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = val;
- ofs += 2;
- }
-}
-
-static __inline void
-bus_space_set_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint32_t val, size_t count)
-{
- uint32_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = val;
- ofs += 4;
- }
-}
-
-static __inline void
-bus_space_set_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
- bus_size_t ofs, uint64_t val, size_t count)
-{
- uint64_t __volatile *bsp;
- while (count-- > 0) {
- bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
- __MEMIO_ADDR(bsh + ofs);
- *bsp = val;
- ofs += 8;
- }
-}
-
-
-/*
- * Copy count units of data from bus space described by the tag and the first
- * handle and ofs pair to bus space described by the tag and the second handle
- * and ofs pair. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes.
- * The data is read from successive bus space addresses and also written to
- * successive bus space addresses. Both reads and writes are unordered.
- */
-static __inline void
-bus_space_copy_region_1(bus_space_tag_t bst, bus_space_handle_t bsh1,
- bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
-{
- bus_addr_t dst, src;
- uint8_t __volatile *dstp, *srcp;
- src = bsh1 + ofs1;
- dst = bsh2 + ofs2;
- if (dst > src) {
- src += count - 1;
- dst += count - 1;
- while (count-- > 0) {
- if (bst == IA64_BUS_SPACE_IO) {
- srcp = __PIO_ADDR(src);
- dstp = __PIO_ADDR(dst);
- } else {
- srcp = __MEMIO_ADDR(src);
- dstp = __MEMIO_ADDR(dst);
- }
- *dstp = *srcp;
- src -= 1;
- dst -= 1;
- }
- } else {
- while (count-- > 0) {
- if (bst == IA64_BUS_SPACE_IO) {
- srcp = __PIO_ADDR(src);
- dstp = __PIO_ADDR(dst);
- } else {
- srcp = __MEMIO_ADDR(src);
- dstp = __MEMIO_ADDR(dst);
- }
- *dstp = *srcp;
- src += 1;
- dst += 1;
- }
- }
-}
-
-static __inline void
-bus_space_copy_region_2(bus_space_tag_t bst, bus_space_handle_t bsh1,
- bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
-{
- bus_addr_t dst, src;
- uint16_t __volatile *dstp, *srcp;
- src = bsh1 + ofs1;
- dst = bsh2 + ofs2;
- if (dst > src) {
- src += (count - 1) << 1;
- dst += (count - 1) << 1;
- while (count-- > 0) {
- if (bst == IA64_BUS_SPACE_IO) {
- srcp = __PIO_ADDR(src);
- dstp = __PIO_ADDR(dst);
- } else {
- srcp = __MEMIO_ADDR(src);
- dstp = __MEMIO_ADDR(dst);
- }
- *dstp = *srcp;
- src -= 2;
- dst -= 2;
- }
- } else {
- while (count-- > 0) {
- if (bst == IA64_BUS_SPACE_IO) {
- srcp = __PIO_ADDR(src);
- dstp = __PIO_ADDR(dst);
- } else {
- srcp = __MEMIO_ADDR(src);
- dstp = __MEMIO_ADDR(dst);
- }
- *dstp = *srcp;
- src += 2;
- dst += 2;
- }
- }
-}
-
-static __inline void
-bus_space_copy_region_4(bus_space_tag_t bst, bus_space_handle_t bsh1,
- bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
-{
- bus_addr_t dst, src;
- uint32_t __volatile *dstp, *srcp;
- src = bsh1 + ofs1;
- dst = bsh2 + ofs2;
- if (dst > src) {
- src += (count - 1) << 2;
- dst += (count - 1) << 2;
- while (count-- > 0) {
- if (bst == IA64_BUS_SPACE_IO) {
- srcp = __PIO_ADDR(src);
- dstp = __PIO_ADDR(dst);
- } else {
- srcp = __MEMIO_ADDR(src);
- dstp = __MEMIO_ADDR(dst);
- }
- *dstp = *srcp;
- src -= 4;
- dst -= 4;
- }
- } else {
- while (count-- > 0) {
- if (bst == IA64_BUS_SPACE_IO) {
- srcp = __PIO_ADDR(src);
- dstp = __PIO_ADDR(dst);
- } else {
- srcp = __MEMIO_ADDR(src);
- dstp = __MEMIO_ADDR(dst);
- }
- *dstp = *srcp;
- src += 4;
- dst += 4;
- }
- }
-}
-
-static __inline void
-bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t bsh1,
- bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
-{
- bus_addr_t dst, src;
- uint64_t __volatile *dstp, *srcp;
- src = bsh1 + ofs1;
- dst = bsh2 + ofs2;
- if (dst > src) {
- src += (count - 1) << 3;
- dst += (count - 1) << 3;
- while (count-- > 0) {
- if (bst == IA64_BUS_SPACE_IO) {
- srcp = __PIO_ADDR(src);
- dstp = __PIO_ADDR(dst);
- } else {
- srcp = __MEMIO_ADDR(src);
- dstp = __MEMIO_ADDR(dst);
- }
- *dstp = *srcp;
- src -= 8;
- dst -= 8;
- }
- } else {
- while (count-- > 0) {
- if (bst == IA64_BUS_SPACE_IO) {
- srcp = __PIO_ADDR(src);
- dstp = __PIO_ADDR(dst);
- } else {
- srcp = __MEMIO_ADDR(src);
- dstp = __MEMIO_ADDR(dst);
- }
- *dstp = *srcp;
- src += 8;
- dst += 8;
- }
- }
-}
-
-
-/*
- * Stream accesses are the same as normal accesses on ia64; there are no
- * supported bus systems with an endianess different from the host one.
- */
-#define bus_space_read_stream_1(t, h, o) \
- bus_space_read_1(t, h, o)
-#define bus_space_read_stream_2(t, h, o) \
- bus_space_read_2(t, h, o)
-#define bus_space_read_stream_4(t, h, o) \
- bus_space_read_4(t, h, o)
-#define bus_space_read_stream_8(t, h, o) \
- bus_space_read_8(t, h, o)
-
-#define bus_space_read_multi_stream_1(t, h, o, a, c) \
- bus_space_read_multi_1(t, h, o, a, c)
-#define bus_space_read_multi_stream_2(t, h, o, a, c) \
- bus_space_read_multi_2(t, h, o, a, c)
-#define bus_space_read_multi_stream_4(t, h, o, a, c) \
- bus_space_read_multi_4(t, h, o, a, c)
-#define bus_space_read_multi_stream_8(t, h, o, a, c) \
- bus_space_read_multi_8(t, h, o, a, c)
-
-#define bus_space_write_stream_1(t, h, o, v) \
- bus_space_write_1(t, h, o, v)
-#define bus_space_write_stream_2(t, h, o, v) \
- bus_space_write_2(t, h, o, v)
-#define bus_space_write_stream_4(t, h, o, v) \
- bus_space_write_4(t, h, o, v)
-#define bus_space_write_stream_8(t, h, o, v) \
- bus_space_write_8(t, h, o, v)
-
-#define bus_space_write_multi_stream_1(t, h, o, a, c) \
- bus_space_write_multi_1(t, h, o, a, c)
-#define bus_space_write_multi_stream_2(t, h, o, a, c) \
- bus_space_write_multi_2(t, h, o, a, c)
-#define bus_space_write_multi_stream_4(t, h, o, a, c) \
- bus_space_write_multi_4(t, h, o, a, c)
-#define bus_space_write_multi_stream_8(t, h, o, a, c) \
- bus_space_write_multi_8(t, h, o, a, c)
-
-#define bus_space_set_multi_stream_1(t, h, o, v, c) \
- bus_space_set_multi_1(t, h, o, v, c)
-#define bus_space_set_multi_stream_2(t, h, o, v, c) \
- bus_space_set_multi_2(t, h, o, v, c)
-#define bus_space_set_multi_stream_4(t, h, o, v, c) \
- bus_space_set_multi_4(t, h, o, v, c)
-#define bus_space_set_multi_stream_8(t, h, o, v, c) \
- bus_space_set_multi_8(t, h, o, v, c)
-
-#define bus_space_read_region_stream_1(t, h, o, a, c) \
- bus_space_read_region_1(t, h, o, a, c)
-#define bus_space_read_region_stream_2(t, h, o, a, c) \
- bus_space_read_region_2(t, h, o, a, c)
-#define bus_space_read_region_stream_4(t, h, o, a, c) \
- bus_space_read_region_4(t, h, o, a, c)
-#define bus_space_read_region_stream_8(t, h, o, a, c) \
- bus_space_read_region_8(t, h, o, a, c)
-
-#define bus_space_write_region_stream_1(t, h, o, a, c) \
- bus_space_write_region_1(t, h, o, a, c)
-#define bus_space_write_region_stream_2(t, h, o, a, c) \
- bus_space_write_region_2(t, h, o, a, c)
-#define bus_space_write_region_stream_4(t, h, o, a, c) \
- bus_space_write_region_4(t, h, o, a, c)
-#define bus_space_write_region_stream_8(t, h, o, a, c) \
- bus_space_write_region_8(t, h, o, a, c)
-
-#define bus_space_set_region_stream_1(t, h, o, v, c) \
- bus_space_set_region_1(t, h, o, v, c)
-#define bus_space_set_region_stream_2(t, h, o, v, c) \
- bus_space_set_region_2(t, h, o, v, c)
-#define bus_space_set_region_stream_4(t, h, o, v, c) \
- bus_space_set_region_4(t, h, o, v, c)
-#define bus_space_set_region_stream_8(t, h, o, v, c) \
- bus_space_set_region_8(t, h, o, v, c)
-
-#define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
- bus_space_copy_region_1(t, h1, o1, h2, o2, c)
-#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
- bus_space_copy_region_2(t, h1, o1, h2, o2, c)
-#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
- bus_space_copy_region_4(t, h1, o1, h2, o2, c)
-#define bus_space_copy_region_stream_8(t, h1, o1, h2, o2, c) \
- bus_space_copy_region_8(t, h1, o1, h2, o2, c)
-
-#include <machine/bus_dma.h>
-
-#endif /* _MACHINE_BUS_H_ */
--- sys/ia64/include/_limits.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/_limits.h,v 1.13 2005/01/06 22:18:23 imp Exp $ */
-/* From: NetBSD: limits.h,v 1.3 1997/04/06 08:47:31 cgd Exp */
-
-/*-
- * Copyright (c) 1988, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)limits.h 8.3 (Berkeley) 1/4/94
- */
-
-#ifndef _MACHINE__LIMITS_H_
-#define _MACHINE__LIMITS_H_
-
-/*
- * According to ANSI (section 2.2.4.2), the values below must be usable by
- * #if preprocessing directives. Additionally, the expression must have the
- * same type as would an expression that is an object of the corresponding
- * type converted according to the integral promotions. The subtraction for
- * INT_MIN, etc., is so the value is not unsigned; e.g., 0x80000000 is an
- * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2).
- * These numbers are for the default configuration of gcc. They work for
- * some other compilers as well, but this should not be depended on.
- */
-
-#define __CHAR_BIT 8 /* number of bits in a char */
-
-#define __SCHAR_MAX 0x7f /* max value for a signed char */
-#define __SCHAR_MIN (-0x7f-1) /* min value for a signed char */
-
-#define __UCHAR_MAX 0xffU /* max value for an unsigned char */
-
-#define __USHRT_MAX 0xffffU /* max value for an unsigned short */
-#define __SHRT_MAX 0x7fff /* max value for a short */
-#define __SHRT_MIN (-0x7fff-1) /* min value for a short */
-
-#define __UINT_MAX 0xffffffffU /* max value for an unsigned int */
-#define __INT_MAX 0x7fffffff /* max value for an int */
-#define __INT_MIN (-0x7fffffff-1) /* min value for an int */
-
-#define __ULONG_MAX 0xffffffffffffffffUL /* max for an unsigned long */
-#define __LONG_MAX 0x7fffffffffffffffL /* max for a long */
-#define __LONG_MIN (-0x7fffffffffffffffL-1) /* min for a long */
-
-/* Long longs and longs are the same size on the IA-64. */
- /* max for an unsigned long long */
-#define __ULLONG_MAX 0xffffffffffffffffULL
-#define __LLONG_MAX 0x7fffffffffffffffLL /* max for a long long */
-#define __LLONG_MIN (-0x7fffffffffffffffLL-1) /* min for a long long */
-
-#define __SSIZE_MAX __LONG_MAX /* max value for a ssize_t */
-
-#define __SIZE_T_MAX __ULONG_MAX /* max value for a size_t */
-
-#define __OFF_MAX __LONG_MAX /* max value for an off_t */
-#define __OFF_MIN __LONG_MIN /* min value for an off_t */
-
-/* Quads and longs are the same. Ensure they stay in sync. */
-#define __UQUAD_MAX (__ULONG_MAX) /* max value for a uquad_t */
-#define __QUAD_MAX (__LONG_MAX) /* max value for a quad_t */
-#define __QUAD_MIN (__LONG_MIN) /* min value for a quad_t */
-
-#define __LONG_BIT 64
-#define __WORD_BIT 32
-
-#endif /* !_MACHINE__LIMITS_H_ */
--- sys/ia64/include/acpica_machdep.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * Copyright (c) 2002 Mitsuru IWASAKI
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/acpica_machdep.h,v 1.4 2004/10/11 05:39:15 njl Exp $
- */
-
-/******************************************************************************
- *
- * Name: acpica_machdep.h - arch-specific defines, etc.
- * $Revision$
- *
- *****************************************************************************/
-
-#ifndef __ACPICA_MACHDEP_H__
-#define __ACPICA_MACHDEP_H__
-
-#ifdef _KERNEL
-#define _IA64
-
-/*
- * Calling conventions:
- *
- * ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
- * ACPI_EXTERNAL_XFACE - External ACPI interfaces
- * ACPI_INTERNAL_XFACE - Internal ACPI interfaces
- * ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
- */
-#define ACPI_SYSTEM_XFACE
-#define ACPI_EXTERNAL_XFACE
-#define ACPI_INTERNAL_XFACE
-#define ACPI_INTERNAL_VAR_XFACE
-
-/* Asm macros */
-
-#define ACPI_ASM_MACROS
-#define BREAKPOINT3
-#define ACPI_DISABLE_IRQS() disable_intr()
-#define ACPI_ENABLE_IRQS() enable_intr()
-
-#define ACPI_FLUSH_CPU_CACHE() /* XXX ia64_fc()? */
-
-/* Section 5.2.9.1: global lock acquire/release functions */
-extern int acpi_acquire_global_lock(uint32_t *lock);
-extern int acpi_release_global_lock(uint32_t *lock);
-#define ACPI_ACQUIRE_GLOBAL_LOCK(GLptr, Acq) \
- ((Acq) = acpi_acquire_global_lock(GLptr))
-#define ACPI_RELEASE_GLOBAL_LOCK(GLptr, Acq) \
- ((Acq) = acpi_release_global_lock(GLptr))
-
-#endif /* _KERNEL */
-
-#define ACPI_MACHINE_WIDTH 64
-#define COMPILER_DEPENDENT_INT64 long
-#define COMPILER_DEPENDENT_UINT64 unsigned long
-
-void acpi_cpu_c1(void);
-
-#endif /* __ACPICA_MACHDEP_H__ */
--- sys/ia64/include/stdarg.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*-
- * Copyright (c) 2002 David E. O'Brien. All rights reserved.
- * Copyright (c) 1991, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)stdarg.h 8.1 (Berkeley) 6/10/93
- * $FreeBSD: src/sys/ia64/include/stdarg.h,v 1.8 2005/03/02 21:33:27 joerg Exp $
- */
-
-#ifndef _MACHINE_STDARG_H_
-#define _MACHINE_STDARG_H_
-
-#include <sys/cdefs.h>
-#include <sys/_types.h>
-
-#ifndef _VA_LIST_DECLARED
-#define _VA_LIST_DECLARED
-typedef __va_list va_list;
-#endif
-
-#if defined(__GNUCLIKE_BUILTIN_STDARG)
-
-#define va_start(ap, last) \
- __builtin_stdarg_start((ap), (last))
-
-#define va_arg(ap, type) \
- __builtin_va_arg((ap), type)
-
-#if __ISO_C_VISIBLE >= 1999
-#define va_copy(dest, src) \
- __builtin_va_copy((dest), (src))
-#endif
-
-#define va_end(ap) \
- __builtin_va_end(ap)
-
-#endif
-
-#endif /* !_MACHINE_STDARG_H_ */
--- sys/ia64/include/float.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/float.h,v 1.8 2005/01/06 22:18:23 imp Exp $ */
-/* From: NetBSD: float.h,v 1.6 1997/07/17 21:36:03 thorpej Exp */
-
-/*-
- * Copyright (c) 1989, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_FLOAT_H_
-#define _MACHINE_FLOAT_H_
-
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-extern int __flt_rounds(void);
-__END_DECLS
-
-#define FLT_RADIX 2 /* b */
-#define FLT_ROUNDS __flt_rounds()
-#if __ISO_C_VISIBLE >= 1999
-#define FLT_EVAL_METHOD 0 /* no promotions */
-#define DECIMAL_DIG 35 /* max precision in decimal digits */
-#endif
-
-#define FLT_MANT_DIG 24 /* p */
-#define FLT_EPSILON 1.19209290E-07F /* b**(1-p) */
-#define FLT_DIG 6 /* floor((p-1)*log10(b))+(b == 10) */
-#define FLT_MIN_EXP -125 /* emin */
-#define FLT_MIN 1.17549435E-38F /* b**(emin-1) */
-#define FLT_MIN_10_EXP -37 /* ceil(log10(b**(emin-1))) */
-#define FLT_MAX_EXP 128 /* emax */
-#define FLT_MAX 3.40282347E+38F /* (1-b**(-p))*b**emax */
-#define FLT_MAX_10_EXP 38 /* floor(log10((1-b**(-p))*b**emax)) */
-
-#define DBL_MANT_DIG 53
-#define DBL_EPSILON 2.2204460492503131E-16
-#define DBL_DIG 15
-#define DBL_MIN_EXP -1021
-#define DBL_MIN 2.2250738585072014E-308
-#define DBL_MIN_10_EXP -307
-#define DBL_MAX_EXP 1024
-#define DBL_MAX 1.7976931348623157E+308
-#define DBL_MAX_10_EXP 308
-
-#define LDBL_MANT_DIG 64
-#define LDBL_EPSILON 1.0842021724855044340E-19L
-#define LDBL_DIG 18
-#define LDBL_MIN_EXP (-16381)
-#define LDBL_MIN 3.3621031431120935063E-4932L
-#define LDBL_MIN_10_EXP (-4931)
-#define LDBL_MAX_EXP 16384
-#define LDBL_MAX 1.1897314953572317650E+4932L
-#define LDBL_MAX_10_EXP 4932
-
-#endif /* _MACHINE_FLOAT_H_ */
--- sys/ia64/include/endian.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*-
- * Copyright (c) 1987, 1991, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)endian.h 8.1 (Berkeley) 6/10/93
- * $NetBSD: endian.h,v 1.5 1997/10/09 15:42:19 bouyer Exp $
- * $FreeBSD: src/sys/ia64/include/endian.h,v 1.14 2005/03/02 21:33:27 joerg Exp $
- */
-
-#ifndef _MACHINE_ENDIAN_H_
-#define _MACHINE_ENDIAN_H_
-
-#include <sys/cdefs.h>
-#include <sys/_types.h>
-
-/*
- * Define the order of 32-bit words in 64-bit words.
- */
-#define _QUAD_HIGHWORD 1
-#define _QUAD_LOWWORD 0
-
-/*
- * Definitions for byte order, according to byte significance from low
- * address to high.
- */
-#define _LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
-#define _BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */
-#define _PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-
-/*
- * Deprecated variants that don't have enough underscores to be useful in more
- * strict namespaces.
- */
-#if __BSD_VISIBLE
-#define LITTLE_ENDIAN _LITTLE_ENDIAN
-#define BIG_ENDIAN _BIG_ENDIAN
-#define PDP_ENDIAN _PDP_ENDIAN
-#define BYTE_ORDER _BYTE_ORDER
-#endif
-
-#if defined(__CC_SUPPORTS___INLINE) && defined(__GNUCLIKE_ASM)
-
-static __inline __uint64_t
-__bswap64(__uint64_t _x)
-{
- __uint64_t __r;
-
- __asm __volatile("mux1 %0=%1, at rev"
- : "=r" (__r) : "r"(_x));
- return __r;
-}
-
-static __inline __uint32_t
-__bswap32(__uint32_t _x)
-{
-
- return (__bswap64(_x) >> 32);
-}
-
-static __inline __uint16_t
-__bswap16(__uint16_t _x)
-{
-
- return (__bswap64(_x) >> 48);
-}
-
-#define __htonl(x) __bswap32(x)
-#define __htons(x) __bswap16(x)
-#define __ntohl(x) __bswap32(x)
-#define __ntohs(x) __bswap16(x)
-
-#else /* !(__CC_SUPPORTS___INLINE && __GNUCLIKE_ASM) */
-
-/*
- * No optimizations are available for this compiler. Fall back to
- * non-optimized functions by defining the constant usually used to prevent
- * redefinition.
- */
-#define _BYTEORDER_FUNC_DEFINED
-
-#endif /* __CC_SUPPORTS___INLINE && __GNUCLIKE_ASM */
-
-#endif /* !_MACHINE_ENDIAN_H_ */
--- sys/ia64/include/ieeefp.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/ieeefp.h,v 1.4 2003/08/11 21:25:19 marcel Exp $
- */
-
-#ifndef _MACHINE_IEEEFP_H_
-#define _MACHINE_IEEEFP_H_
-
-#include <machine/fpu.h>
-
-typedef int fp_except_t;
-#define FP_X_INV IA64_FPSR_TRAP_VD /* invalid operation exception */
-#define FP_X_DZ IA64_FPSR_TRAP_ZD /* divide-by-zero exception */
-#define FP_X_OFL IA64_FPSR_TRAP_OD /* overflow exception */
-#define FP_X_UFL IA64_FPSR_TRAP_UD /* underflow exception */
-#define FP_X_IMP IA64_FPSR_TRAP_ID /* imprecise(inexact) exception */
-
-typedef enum {
- FP_RZ=0, /* round to zero (truncate) */
- FP_RM=1, /* round toward negative infinity */
- FP_RN=2, /* round to nearest representable number */
- FP_RP=3 /* round toward positive infinity */
-} fp_rnd_t;
-
-#endif /* _MACHINE_IEEEFP_H_ */
--- sys/ia64/include/in_cksum.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from tahoe: in_cksum.c 1.2 86/01/05
- * from: @(#)in_cksum.c 1.3 (Berkeley) 1/19/91
- * from: Id: in_cksum.c,v 1.8 1995/12/03 18:35:19 bde Exp
- * $FreeBSD: src/sys/ia64/include/in_cksum.h,v 1.3 2005/03/02 21:33:27 joerg Exp $
- */
-
-#ifndef _MACHINE_IN_CKSUM_H_
-#define _MACHINE_IN_CKSUM_H_ 1
-
-#include <sys/cdefs.h>
-
-#define in_cksum(m, len) in_cksum_skip(m, len, 0)
-
-/*
- * It it useful to have an Internet checksum routine which is inlineable
- * and optimized specifically for the task of computing IP header checksums
- * in the normal case (where there are no options and the header length is
- * therefore always exactly five 32-bit words.
- */
-#ifdef __CC_SUPPORTS___INLINE
-
-static __inline void
-in_cksum_update(struct ip *ip)
-{
- int __tmpsum;
- __tmpsum = (int)ntohs(ip->ip_sum) + 256;
- ip->ip_sum = htons(__tmpsum + (__tmpsum >> 16));
-}
-
-#else
-
-#define in_cksum_update(ip) \
- do { \
- int __tmpsum; \
- __tmpsum = (int)ntohs(ip->ip_sum) + 256; \
- ip->ip_sum = htons(__tmpsum + (__tmpsum >> 16)); \
- } while(0)
-
-#endif
-
-#ifdef _KERNEL
-u_int in_cksum_hdr(const struct ip *ip);
-u_short in_addword(u_short sum, u_short b);
-u_short in_pseudo(u_int sum, u_int b, u_int c);
-u_short in_cksum_skip(struct mbuf *m, int len, int skip);
-#endif
-
-#endif /* _MACHINE_IN_CKSUM_H_ */
--- sys/ia64/include/_regset.h
+++ /dev/null
@@ -1,275 +0,0 @@
-/*-
- * Copyright (c) 2002, 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/_regset.h,v 1.5 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_REGSET_H_
-#define _MACHINE_REGSET_H_
-
-/*
- * Create register sets, based on the runtime specification. This allows
- * us to better reuse code and to copy sets around more efficiently.
- * Contexts are defined in terms of these sets. These include trapframe,
- * sigframe, pcb, mcontext, reg and fpreg. Other candidates are unwind
- * and coredump related contexts.
- *
- * Notes:
- * o Constant registers (r0, f0 and f1) are not accounted for,
- * o The stacked registers (r32-r127) are not accounted for,
- * o Predicates are not split across sets.
- */
-
-/* A single FP register. */
-union _ia64_fpreg {
- unsigned char fpr_bits[16];
- long double fpr_flt;
-};
-
-/*
- * Special registers.
- */
-struct _special {
- unsigned long sp;
- unsigned long unat; /* NaT before spilling */
- unsigned long rp;
- unsigned long pr;
- unsigned long pfs;
- unsigned long bspstore;
- unsigned long rnat;
- unsigned long __spare;
- /* Userland context and syscalls */
- unsigned long tp;
- unsigned long rsc;
- unsigned long fpsr;
- unsigned long psr;
- /* ASYNC: Interrupt specific */
- unsigned long gp;
- unsigned long ndirty;
- unsigned long cfm;
- unsigned long iip;
- unsigned long ifa;
- unsigned long isr;
-};
-
-struct _high_fp {
- union _ia64_fpreg fr32;
- union _ia64_fpreg fr33;
- union _ia64_fpreg fr34;
- union _ia64_fpreg fr35;
- union _ia64_fpreg fr36;
- union _ia64_fpreg fr37;
- union _ia64_fpreg fr38;
- union _ia64_fpreg fr39;
- union _ia64_fpreg fr40;
- union _ia64_fpreg fr41;
- union _ia64_fpreg fr42;
- union _ia64_fpreg fr43;
- union _ia64_fpreg fr44;
- union _ia64_fpreg fr45;
- union _ia64_fpreg fr46;
- union _ia64_fpreg fr47;
- union _ia64_fpreg fr48;
- union _ia64_fpreg fr49;
- union _ia64_fpreg fr50;
- union _ia64_fpreg fr51;
- union _ia64_fpreg fr52;
- union _ia64_fpreg fr53;
- union _ia64_fpreg fr54;
- union _ia64_fpreg fr55;
- union _ia64_fpreg fr56;
- union _ia64_fpreg fr57;
- union _ia64_fpreg fr58;
- union _ia64_fpreg fr59;
- union _ia64_fpreg fr60;
- union _ia64_fpreg fr61;
- union _ia64_fpreg fr62;
- union _ia64_fpreg fr63;
- union _ia64_fpreg fr64;
- union _ia64_fpreg fr65;
- union _ia64_fpreg fr66;
- union _ia64_fpreg fr67;
- union _ia64_fpreg fr68;
- union _ia64_fpreg fr69;
- union _ia64_fpreg fr70;
- union _ia64_fpreg fr71;
- union _ia64_fpreg fr72;
- union _ia64_fpreg fr73;
- union _ia64_fpreg fr74;
- union _ia64_fpreg fr75;
- union _ia64_fpreg fr76;
- union _ia64_fpreg fr77;
- union _ia64_fpreg fr78;
- union _ia64_fpreg fr79;
- union _ia64_fpreg fr80;
- union _ia64_fpreg fr81;
- union _ia64_fpreg fr82;
- union _ia64_fpreg fr83;
- union _ia64_fpreg fr84;
- union _ia64_fpreg fr85;
- union _ia64_fpreg fr86;
- union _ia64_fpreg fr87;
- union _ia64_fpreg fr88;
- union _ia64_fpreg fr89;
- union _ia64_fpreg fr90;
- union _ia64_fpreg fr91;
- union _ia64_fpreg fr92;
- union _ia64_fpreg fr93;
- union _ia64_fpreg fr94;
- union _ia64_fpreg fr95;
- union _ia64_fpreg fr96;
- union _ia64_fpreg fr97;
- union _ia64_fpreg fr98;
- union _ia64_fpreg fr99;
- union _ia64_fpreg fr100;
- union _ia64_fpreg fr101;
- union _ia64_fpreg fr102;
- union _ia64_fpreg fr103;
- union _ia64_fpreg fr104;
- union _ia64_fpreg fr105;
- union _ia64_fpreg fr106;
- union _ia64_fpreg fr107;
- union _ia64_fpreg fr108;
- union _ia64_fpreg fr109;
- union _ia64_fpreg fr110;
- union _ia64_fpreg fr111;
- union _ia64_fpreg fr112;
- union _ia64_fpreg fr113;
- union _ia64_fpreg fr114;
- union _ia64_fpreg fr115;
- union _ia64_fpreg fr116;
- union _ia64_fpreg fr117;
- union _ia64_fpreg fr118;
- union _ia64_fpreg fr119;
- union _ia64_fpreg fr120;
- union _ia64_fpreg fr121;
- union _ia64_fpreg fr122;
- union _ia64_fpreg fr123;
- union _ia64_fpreg fr124;
- union _ia64_fpreg fr125;
- union _ia64_fpreg fr126;
- union _ia64_fpreg fr127;
-};
-
-/*
- * Preserved registers.
- */
-struct _callee_saved {
- unsigned long unat; /* NaT after spilling. */
- unsigned long gr4;
- unsigned long gr5;
- unsigned long gr6;
- unsigned long gr7;
- unsigned long br1;
- unsigned long br2;
- unsigned long br3;
- unsigned long br4;
- unsigned long br5;
- unsigned long lc;
- unsigned long __spare;
-};
-
-struct _callee_saved_fp {
- union _ia64_fpreg fr2;
- union _ia64_fpreg fr3;
- union _ia64_fpreg fr4;
- union _ia64_fpreg fr5;
- union _ia64_fpreg fr16;
- union _ia64_fpreg fr17;
- union _ia64_fpreg fr18;
- union _ia64_fpreg fr19;
- union _ia64_fpreg fr20;
- union _ia64_fpreg fr21;
- union _ia64_fpreg fr22;
- union _ia64_fpreg fr23;
- union _ia64_fpreg fr24;
- union _ia64_fpreg fr25;
- union _ia64_fpreg fr26;
- union _ia64_fpreg fr27;
- union _ia64_fpreg fr28;
- union _ia64_fpreg fr29;
- union _ia64_fpreg fr30;
- union _ia64_fpreg fr31;
-};
-
-/*
- * Scratch registers.
- */
-struct _caller_saved {
- unsigned long unat; /* NaT after spilling. */
- unsigned long gr2;
- unsigned long gr3;
- unsigned long gr8;
- unsigned long gr9;
- unsigned long gr10;
- unsigned long gr11;
- unsigned long gr14;
- unsigned long gr15;
- unsigned long gr16;
- unsigned long gr17;
- unsigned long gr18;
- unsigned long gr19;
- unsigned long gr20;
- unsigned long gr21;
- unsigned long gr22;
- unsigned long gr23;
- unsigned long gr24;
- unsigned long gr25;
- unsigned long gr26;
- unsigned long gr27;
- unsigned long gr28;
- unsigned long gr29;
- unsigned long gr30;
- unsigned long gr31;
- unsigned long br6;
- unsigned long br7;
- unsigned long ccv;
- unsigned long csd;
- unsigned long ssd;
-};
-
-struct _caller_saved_fp {
- union _ia64_fpreg fr6;
- union _ia64_fpreg fr7;
- union _ia64_fpreg fr8;
- union _ia64_fpreg fr9;
- union _ia64_fpreg fr10;
- union _ia64_fpreg fr11;
- union _ia64_fpreg fr12;
- union _ia64_fpreg fr13;
- union _ia64_fpreg fr14;
- union _ia64_fpreg fr15;
-};
-
-#ifdef _KERNEL
-void restore_callee_saved(const struct _callee_saved *);
-void restore_callee_saved_fp(const struct _callee_saved_fp *);
-void restore_high_fp(const struct _high_fp *);
-void save_callee_saved(struct _callee_saved *);
-void save_callee_saved_fp(struct _callee_saved_fp *);
-void save_high_fp(struct _high_fp *);
-#endif
-
-#endif /* _MACHINE_REGSET_H_ */
--- sys/ia64/include/reg.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*-
- * Copyright (c) 2000 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/reg.h,v 1.13 2004/03/20 05:27:14 marcel Exp $
- */
-
-#ifndef _MACHINE_REG_H_
-#define _MACHINE_REG_H_
-
-#include <machine/_regset.h>
-
-struct reg {
- struct _special r_special;
- struct _callee_saved r_preserved;
- struct _caller_saved r_scratch;
-};
-
-struct fpreg {
- struct _callee_saved_fp fpr_preserved;
- struct _caller_saved_fp fpr_scratch;
- struct _high_fp fpr_high;
-};
-
-struct dbreg {
- unsigned long dbr_data[8];
- unsigned long dbr_inst[8];
-};
-
-#ifdef _KERNEL
-struct thread;
-
-/* XXX these interfaces are MI, so they should be declared in a MI place. */
-int fill_regs(struct thread *, struct reg *);
-int set_regs(struct thread *, struct reg *);
-int fill_fpregs(struct thread *, struct fpreg *);
-int set_fpregs(struct thread *, struct fpreg *);
-int fill_dbregs(struct thread *, struct dbreg *);
-int set_dbregs(struct thread *, struct dbreg *);
-#endif
-
-#endif /* _MACHINE_REG_H_ */
--- sys/ia64/include/md_var.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/md_var.h,v 1.22 2005/07/05 17:12:18 marcel Exp $
- */
-
-#ifndef _MACHINE_MD_VAR_H_
-#define _MACHINE_MD_VAR_H_
-
-/*
- * Miscellaneous machine-dependent declarations.
- */
-
-struct ia64_fdesc {
- uint64_t func;
- uint64_t gp;
-};
-
-#define FDESC_FUNC(fn) (((struct ia64_fdesc *) fn)->func)
-#define FDESC_GP(fn) (((struct ia64_fdesc *) fn)->gp)
-
-/* Convenience macros to decompose CFM & ar.pfs. */
-#define IA64_CFM_SOF(x) ((x) & 0x7f)
-#define IA64_CFM_SOL(x) (((x) >> 7) & 0x7f)
-#define IA64_CFM_SOR(x) (((x) >> 14) & 0x0f)
-#define IA64_CFM_RRB_GR(x) (((x) >> 18) & 0x7f)
-#define IA64_CFM_RRB_FR(x) (((x) >> 25) & 0x7f)
-#define IA64_CFM_RRB_PR(x) (((x) >> 32) & 0x3f)
-
-/* Concenience function (inline) to adjust backingstore pointers. */
-static __inline uint64_t
-ia64_bsp_adjust(uint64_t bsp, int nslots)
-{
- int bias = ((unsigned int)bsp & 0x1f8) >> 3;
- nslots += (nslots + bias + 63*8) / 63 - 8;
- return bsp + (nslots << 3);
-}
-
-#ifdef _KERNEL
-
-extern char sigcode[];
-extern char esigcode[];
-extern int szsigcode;
-extern long Maxmem;
-
-struct _special;
-struct fpreg;
-struct reg;
-struct thread;
-struct trapframe;
-
-void busdma_swi(void);
-int copyout_regstack(struct thread *, uint64_t *, uint64_t *);
-void cpu_mp_add(u_int, u_int, u_int);
-int do_ast(struct trapframe *);
-void ia32_trap(int, struct trapframe *);
-int ia64_count_cpus(void);
-int ia64_flush_dirty(struct thread *, struct _special *);
-uint64_t ia64_get_hcdp(void);
-int ia64_highfp_drop(struct thread *);
-int ia64_highfp_save(struct thread *);
-void ia64_init(void);
-void ia64_probe_sapics(void);
-int interrupt(uint64_t, struct trapframe *);
-void map_gateway_page(void);
-void map_pal_code(void);
-void os_boot_rendez(void);
-void os_mca(void);
-int syscall(struct trapframe *);
-void trap(int, struct trapframe *);
-void trap_panic(int, struct trapframe *);
-int unaligned_fixup(struct trapframe *, struct thread *);
-
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_MD_VAR_H_ */
--- sys/ia64/include/kdb.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/kdb.h,v 1.2 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_KDB_H_
-#define _MACHINE_KDB_H_
-
-#include <machine/cpufunc.h>
-#include <machine/frame.h>
-#include <machine/ia64_cpu.h>
-
-static __inline void
-kdb_cpu_clear_singlestep(void)
-{
- kdb_frame->tf_special.psr &= ~IA64_PSR_SS;
-}
-
-static __inline void
-kdb_cpu_set_singlestep(void)
-{
- kdb_frame->tf_special.psr |= IA64_PSR_SS;
-}
-
-static __inline void
-kdb_cpu_trap(int vector, int _)
-{
- __asm __volatile("flushrs;;");
-
- if (vector == IA64_VEC_BREAK &&
- kdb_frame->tf_special.ifa == IA64_FIXED_BREAK)
- kdb_frame->tf_special.psr += IA64_PSR_RI_1;
-}
-
-#endif /* _MACHINE_KDB_H_ */
--- sys/ia64/include/_inttypes.h
+++ /dev/null
@@ -1,220 +0,0 @@
-/*-
- * Copyright (c) 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Klaus Klein.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * From: $NetBSD: int_fmtio.h,v 1.2 2001/04/26 16:25:21 kleink Exp $
- * $FreeBSD: src/sys/ia64/include/_inttypes.h,v 1.2 2002/06/30 05:48:02 mike Exp $
- */
-
-#ifndef _MACHINE_INTTYPES_H_
-#define _MACHINE_INTTYPES_H_
-
-/*
- * Macros for format specifiers.
- */
-
-/* fprintf(3) macros for signed integers. */
-
-#define PRId8 "d" /* int8_t */
-#define PRId16 "d" /* int16_t */
-#define PRId32 "d" /* int32_t */
-#define PRId64 "ld" /* int64_t */
-#define PRIdLEAST8 "d" /* int_least8_t */
-#define PRIdLEAST16 "d" /* int_least16_t */
-#define PRIdLEAST32 "d" /* int_least32_t */
-#define PRIdLEAST64 "ld" /* int_least64_t */
-#define PRIdFAST8 "d" /* int_fast8_t */
-#define PRIdFAST16 "d" /* int_fast16_t */
-#define PRIdFAST32 "d" /* int_fast32_t */
-#define PRIdFAST64 "ld" /* int_fast64_t */
-#define PRIdMAX "jd" /* intmax_t */
-#define PRIdPTR "ld" /* intptr_t */
-
-#define PRIi8 "i" /* int8_t */
-#define PRIi16 "i" /* int16_t */
-#define PRIi32 "i" /* int32_t */
-#define PRIi64 "li" /* int64_t */
-#define PRIiLEAST8 "i" /* int_least8_t */
-#define PRIiLEAST16 "i" /* int_least16_t */
-#define PRIiLEAST32 "i" /* int_least32_t */
-#define PRIiLEAST64 "li" /* int_least64_t */
-#define PRIiFAST8 "i" /* int_fast8_t */
-#define PRIiFAST16 "i" /* int_fast16_t */
-#define PRIiFAST32 "i" /* int_fast32_t */
-#define PRIiFAST64 "li" /* int_fast64_t */
-#define PRIiMAX "ji" /* intmax_t */
-#define PRIiPTR "li" /* intptr_t */
-
-/* fprintf(3) macros for unsigned integers. */
-
-#define PRIo8 "o" /* uint8_t */
-#define PRIo16 "o" /* uint16_t */
-#define PRIo32 "o" /* uint32_t */
-#define PRIo64 "lo" /* uint64_t */
-#define PRIoLEAST8 "o" /* uint_least8_t */
-#define PRIoLEAST16 "o" /* uint_least16_t */
-#define PRIoLEAST32 "o" /* uint_least32_t */
-#define PRIoLEAST64 "lo" /* uint_least64_t */
-#define PRIoFAST8 "o" /* uint_fast8_t */
-#define PRIoFAST16 "o" /* uint_fast16_t */
-#define PRIoFAST32 "o" /* uint_fast32_t */
-#define PRIoFAST64 "lo" /* uint_fast64_t */
-#define PRIoMAX "jo" /* uintmax_t */
-#define PRIoPTR "lo" /* uintptr_t */
-
-#define PRIu8 "u" /* uint8_t */
-#define PRIu16 "u" /* uint16_t */
-#define PRIu32 "u" /* uint32_t */
-#define PRIu64 "lu" /* uint64_t */
-#define PRIuLEAST8 "u" /* uint_least8_t */
-#define PRIuLEAST16 "u" /* uint_least16_t */
-#define PRIuLEAST32 "u" /* uint_least32_t */
-#define PRIuLEAST64 "lu" /* uint_least64_t */
-#define PRIuFAST8 "u" /* uint_fast8_t */
-#define PRIuFAST16 "u" /* uint_fast16_t */
-#define PRIuFAST32 "u" /* uint_fast32_t */
-#define PRIuFAST64 "lu" /* uint_fast64_t */
-#define PRIuMAX "ju" /* uintmax_t */
-#define PRIuPTR "lu" /* uintptr_t */
-
-#define PRIx8 "x" /* uint8_t */
-#define PRIx16 "x" /* uint16_t */
-#define PRIx32 "x" /* uint32_t */
-#define PRIx64 "lx" /* uint64_t */
-#define PRIxLEAST8 "x" /* uint_least8_t */
-#define PRIxLEAST16 "x" /* uint_least16_t */
-#define PRIxLEAST32 "x" /* uint_least32_t */
-#define PRIxLEAST64 "lx" /* uint_least64_t */
-#define PRIxFAST8 "x" /* uint_fast8_t */
-#define PRIxFAST16 "x" /* uint_fast16_t */
-#define PRIxFAST32 "x" /* uint_fast32_t */
-#define PRIxFAST64 "lx" /* uint_fast64_t */
-#define PRIxMAX "jx" /* uintmax_t */
-#define PRIxPTR "lx" /* uintptr_t */
-
-#define PRIX8 "X" /* uint8_t */
-#define PRIX16 "X" /* uint16_t */
-#define PRIX32 "X" /* uint32_t */
-#define PRIX64 "lX" /* uint64_t */
-#define PRIXLEAST8 "X" /* uint_least8_t */
-#define PRIXLEAST16 "X" /* uint_least16_t */
-#define PRIXLEAST32 "X" /* uint_least32_t */
-#define PRIXLEAST64 "lX" /* uint_least64_t */
-#define PRIXFAST8 "X" /* uint_fast8_t */
-#define PRIXFAST16 "X" /* uint_fast16_t */
-#define PRIXFAST32 "X" /* uint_fast32_t */
-#define PRIXFAST64 "lX" /* uint_fast64_t */
-#define PRIXMAX "jX" /* uintmax_t */
-#define PRIXPTR "lX" /* uintptr_t */
-
-/* fscanf(3) macros for signed integers. */
-
-#define SCNd8 "hhd" /* int8_t */
-#define SCNd16 "hd" /* int16_t */
-#define SCNd32 "d" /* int32_t */
-#define SCNd64 "ld" /* int64_t */
-#define SCNdLEAST8 "hhd" /* int_least8_t */
-#define SCNdLEAST16 "hd" /* int_least16_t */
-#define SCNdLEAST32 "d" /* int_least32_t */
-#define SCNdLEAST64 "ld" /* int_least64_t */
-#define SCNdFAST8 "d" /* int_fast8_t */
-#define SCNdFAST16 "d" /* int_fast16_t */
-#define SCNdFAST32 "d" /* int_fast32_t */
-#define SCNdFAST64 "ld" /* int_fast64_t */
-#define SCNdMAX "jd" /* intmax_t */
-#define SCNdPTR "ld" /* intptr_t */
-
-#define SCNi8 "hhi" /* int8_t */
-#define SCNi16 "hi" /* int16_t */
-#define SCNi32 "i" /* int32_t */
-#define SCNi64 "li" /* int64_t */
-#define SCNiLEAST8 "hhi" /* int_least8_t */
-#define SCNiLEAST16 "hi" /* int_least16_t */
-#define SCNiLEAST32 "i" /* int_least32_t */
-#define SCNiLEAST64 "li" /* int_least64_t */
-#define SCNiFAST8 "i" /* int_fast8_t */
-#define SCNiFAST16 "i" /* int_fast16_t */
-#define SCNiFAST32 "i" /* int_fast32_t */
-#define SCNiFAST64 "li" /* int_fast64_t */
-#define SCNiMAX "ji" /* intmax_t */
-#define SCNiPTR "li" /* intptr_t */
-
-/* fscanf(3) macros for unsigned integers. */
-
-#define SCNo8 "hho" /* uint8_t */
-#define SCNo16 "ho" /* uint16_t */
-#define SCNo32 "o" /* uint32_t */
-#define SCNo64 "lo" /* uint64_t */
-#define SCNoLEAST8 "hho" /* uint_least8_t */
-#define SCNoLEAST16 "ho" /* uint_least16_t */
-#define SCNoLEAST32 "o" /* uint_least32_t */
-#define SCNoLEAST64 "lo" /* uint_least64_t */
-#define SCNoFAST8 "o" /* uint_fast8_t */
-#define SCNoFAST16 "o" /* uint_fast16_t */
-#define SCNoFAST32 "o" /* uint_fast32_t */
-#define SCNoFAST64 "lo" /* uint_fast64_t */
-#define SCNoMAX "jo" /* uintmax_t */
-#define SCNoPTR "lo" /* uintptr_t */
-
-#define SCNu8 "hhu" /* uint8_t */
-#define SCNu16 "hu" /* uint16_t */
-#define SCNu32 "u" /* uint32_t */
-#define SCNu64 "lu" /* uint64_t */
-#define SCNuLEAST8 "hhu" /* uint_least8_t */
-#define SCNuLEAST16 "hu" /* uint_least16_t */
-#define SCNuLEAST32 "u" /* uint_least32_t */
-#define SCNuLEAST64 "lu" /* uint_least64_t */
-#define SCNuFAST8 "u" /* uint_fast8_t */
-#define SCNuFAST16 "u" /* uint_fast16_t */
-#define SCNuFAST32 "u" /* uint_fast32_t */
-#define SCNuFAST64 "lu" /* uint_fast64_t */
-#define SCNuMAX "ju" /* uintmax_t */
-#define SCNuPTR "lu" /* uintptr_t */
-
-#define SCNx8 "hhx" /* uint8_t */
-#define SCNx16 "hx" /* uint16_t */
-#define SCNx32 "x" /* uint32_t */
-#define SCNx64 "lx" /* uint64_t */
-#define SCNxLEAST8 "hhx" /* uint_least8_t */
-#define SCNxLEAST16 "hx" /* uint_least16_t */
-#define SCNxLEAST32 "x" /* uint_least32_t */
-#define SCNxLEAST64 "lx" /* uint_least64_t */
-#define SCNxFAST8 "x" /* uint_fast8_t */
-#define SCNxFAST16 "x" /* uint_fast16_t */
-#define SCNxFAST32 "x" /* uint_fast32_t */
-#define SCNxFAST64 "lx" /* uint_fast64_t */
-#define SCNxMAX "jx" /* uintmax_t */
-#define SCNxPTR "lx" /* uintptr_t */
-
-#endif /* !_MACHINE_INTTYPES_H_ */
--- sys/ia64/include/ieee.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/ieee.h,v 1.3 2005/01/06 22:18:23 imp Exp $ */
-/* From: NetBSD: ieee.h,v 1.2 1997/04/06 08:47:27 cgd Exp */
-
-/*-
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This software was developed by the Computer Systems Engineering group
- * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
- * contributed to Berkeley.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)ieee.h 8.1 (Berkeley) 6/11/93
- *
- * from: Header: ieee.h,v 1.7 92/11/26 02:04:37 torek Exp
- */
-
-/*
- * ieee.h defines the machine-dependent layout of the machine's IEEE
- * floating point. It does *not* define (yet?) any of the rounding
- * mode bits, exceptions, and so forth.
- */
-
-/*
- * Define the number of bits in each fraction and exponent.
- *
- * k k+1
- * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented
- *
- * (-exp_bias+1)
- * as fractions that look like 0.fffff x 2 . This means that
- *
- * -126
- * the number 0.10000 x 2 , for instance, is the same as the normalized
- *
- * -127 -128
- * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero
- *
- * -129
- * in the fraction; to represent 2 , we need two, and so on. This
- *
- * (-exp_bias-fracbits+1)
- * implies that the smallest denormalized number is 2
- *
- * for whichever format we are talking about: for single precision, for
- *
- * -126 -149
- * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and
- *
- * -149 == -127 - 23 + 1.
- */
-#define SNG_EXPBITS 8
-#define SNG_FRACBITS 23
-
-#define DBL_EXPBITS 11
-#define DBL_FRACBITS 52
-
-struct ieee_single {
- u_int sng_frac:23;
- u_int sng_exp:8;
- u_int sng_sign:1;
-};
-
-struct ieee_double {
- u_int dbl_fracl;
- u_int dbl_frach:20;
- u_int dbl_exp:11;
- u_int dbl_sign:1;
-};
-
-/*
- * Floats whose exponent is in [1..INFNAN) (of whatever type) are
- * `normal'. Floats whose exponent is INFNAN are either Inf or NaN.
- * Floats whose exponent is zero are either zero (iff all fraction
- * bits are zero) or subnormal values.
- *
- * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
- * high fraction; if the bit is set, it is a `quiet NaN'.
- */
-#define SNG_EXP_INFNAN 255
-#define DBL_EXP_INFNAN 2047
-
-#if 0
-#define SNG_QUIETNAN (1 << 22)
-#define DBL_QUIETNAN (1 << 19)
-#endif
-
-/*
- * Exponent biases.
- */
-#define SNG_EXP_BIAS 127
-#define DBL_EXP_BIAS 1023
--- sys/ia64/include/pte.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/pte.h,v 1.5 2004/11/21 21:40:08 marcel Exp $
- */
-
-#ifndef _MACHINE_PTE_H_
-#define _MACHINE_PTE_H_
-
-#define PTE_PRESENT 0x0000000000000001
-#define PTE__RV1_ 0x0000000000000002
-#define PTE_MA_MASK 0x000000000000001C
-#define PTE_MA_WB 0x0000000000000000
-#define PTE_MA_UC 0x0000000000000010
-#define PTE_MA_UCE 0x0000000000000014
-#define PTE_MA_WC 0x0000000000000018
-#define PTE_MA_NATPAGE 0x000000000000001C
-#define PTE_ACCESSED 0x0000000000000020
-#define PTE_DIRTY 0x0000000000000040
-#define PTE_PL_MASK 0x0000000000000180
-#define PTE_PL_KERN 0x0000000000000000
-#define PTE_PL_USER 0x0000000000000180
-#define PTE_AR_MASK 0x0000000000000E00
-#define PTE_AR_R 0x0000000000000000
-#define PTE_AR_RX 0x0000000000000200
-#define PTE_AR_RW 0x0000000000000400
-#define PTE_AR_RWX 0x0000000000000600
-#define PTE_AR_R_RW 0x0000000000000800
-#define PTE_AR_RX_RWX 0x0000000000000A00
-#define PTE_AR_RWX_RW 0x0000000000000C00
-#define PTE_AR_X_RX 0x0000000000000E00
-#define PTE_PPN_MASK 0x0003FFFFFFFFF000
-#define PTE__RV2_ 0x000C000000000000
-#define PTE_ED 0x0010000000000000
-#define PTE_IG_MASK 0xFFE0000000000000
-#define PTE_WIRED 0x0020000000000000
-#define PTE_MANAGED 0x0040000000000000
-#define PTE_PROT_MASK 0x0700000000000000
-
-#define ITIR__RV1_ 0x0000000000000003
-#define ITIR_PS_MASK 0x00000000000000FC
-#define ITIR_KEY_MASK 0x00000000FFFFFF00
-#define ITIR__RV2_ 0xFFFFFFFF00000000
-
-#ifndef LOCORE
-
-typedef uint64_t pt_entry_t;
-
-static __inline pt_entry_t
-pte_atomic_clear(pt_entry_t *ptep, uint64_t val)
-{
- return (atomic_clear_64(ptep, val));
-}
-
-static __inline pt_entry_t
-pte_atomic_set(pt_entry_t *ptep, uint64_t val)
-{
- return (atomic_set_64(ptep, val));
-}
-
-/*
- * A long-format VHPT entry.
- */
-struct ia64_lpte {
- pt_entry_t pte;
- uint64_t itir;
- uint64_t tag; /* includes ti */
- uint64_t chain; /* pa of collision chain */
-};
-
-/*
- * Layout of rr[x].
- */
-struct ia64_rr {
- uint64_t rr_ve :1; /* bit 0 */
- uint64_t __rv1__ :1; /* bit 1 */
- uint64_t rr_ps :6; /* bits 2..7 */
- uint64_t rr_rid :24; /* bits 8..31 */
- uint64_t __rv2__ :32; /* bits 32..63 */
-};
-
-#endif /* !LOCORE */
-
-#endif /* !_MACHINE_PTE_H_ */
--- sys/ia64/include/reloc.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*-
- * Copyright (c) 1998 John Birrell <jb at cimlogic.com.au>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by John Birrell.
- * 4. Neither the name of the author nor the names of any co-contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/reloc.h,v 1.2 2005/01/06 22:18:23 imp Exp $
- */
--- sys/ia64/include/exec.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*-
- * Copyright (c) 1998 John Birrell <jb at cimlogic.com.au>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by John Birrell.
- * 4. Neither the name of the author nor the names of any co-contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/exec.h,v 1.3 2005/02/19 21:16:48 ru Exp $
- */
-
-#ifndef _MACHINE_EXEC_H_
-#define _MACHINE_EXEC_H_
-
-#define __LDPGSZ 4096
-
-#endif /* !_MACHINE_EXEC_H_ */
--- sys/ia64/include/pmc_mdep.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*-
- * This file is in the public domain.
- *
- * $FreeBSD: src/sys/ia64/include/pmc_mdep.h,v 1.2 2005/06/09 19:45:08 jkoshy Exp $
- */
-
-#ifndef _MACHINE_PMC_MDEP_H_
-#define _MACHINE_PMC_MDEP_H_
-
-union pmc_md_op_pmcallocate {
- uint64_t __pad[4];
-};
-
-/* Logging */
-#define PMCLOG_READADDR PMCLOG_READ64
-#define PMCLOG_EMITADDR PMCLOG_EMIT64
-
-#if _KERNEL
-union pmc_md_pmc {
-};
-
-#endif
-
-#endif /* !_MACHINE_PMC_MDEP_H_ */
--- sys/ia64/include/pmap.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/*-
- * Copyright (c) 1991 Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department and William Jolitz of UUNET Technologies Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * Derived from hp300 version by Mike Hibler, this version by William
- * Jolitz uses a recursive map [a pde points to the page directory] to
- * map the page tables using the pagetables themselves. This is done to
- * reduce the impact on kernel virtual memory for lots of sparse address
- * space, and to reduce the cost of memory to each process.
- *
- * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
- * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
- * from: i386 pmap.h,v 1.54 1997/11/20 19:30:35 bde Exp
- * $FreeBSD: src/sys/ia64/include/pmap.h,v 1.24.2.1 2005/09/13 21:07:14 marcel Exp $
- */
-
-#ifndef _MACHINE_PMAP_H_
-#define _MACHINE_PMAP_H_
-
-#include <sys/queue.h>
-#include <sys/_lock.h>
-#include <sys/_mutex.h>
-#include <machine/atomic.h>
-#include <machine/pte.h>
-
-#ifdef _KERNEL
-
-#ifndef NKPT
-#define NKPT 30 /* initial number of kernel page tables */
-#endif
-#define MAXKPT (PAGE_SIZE/sizeof(vm_offset_t))
-
-#define vtophys(va) pmap_kextract(((vm_offset_t) (va)))
-
-#endif /* _KERNEL */
-
-/*
- * Pmap stuff
- */
-struct pv_entry;
-
-struct md_page {
- int pv_list_count;
- TAILQ_HEAD(,pv_entry) pv_list;
-};
-
-struct pmap {
- struct mtx pm_mtx;
- TAILQ_HEAD(,pv_entry) pm_pvlist; /* list of mappings in pmap */
- u_int32_t pm_rid[5]; /* base RID for pmap */
- int pm_active; /* active flag */
- struct pmap_statistics pm_stats; /* pmap statistics */
-};
-
-typedef struct pmap *pmap_t;
-
-#ifdef _KERNEL
-extern struct pmap kernel_pmap_store;
-#define kernel_pmap (&kernel_pmap_store)
-
-#define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx)
-#define PMAP_LOCK_ASSERT(pmap, type) \
- mtx_assert(&(pmap)->pm_mtx, (type))
-#define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
-#define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \
- NULL, MTX_DEF)
-#define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx)
-#define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
-#define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
-#define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
-#endif
-
-/*
- * For each vm_page_t, there is a list of all currently valid virtual
- * mappings of that page. An entry is a pv_entry_t, the list is pv_table.
- */
-typedef struct pv_entry {
- pmap_t pv_pmap; /* pmap where mapping lies */
- vm_offset_t pv_va; /* virtual address for mapping */
- TAILQ_ENTRY(pv_entry) pv_list;
- TAILQ_ENTRY(pv_entry) pv_plist;
-} *pv_entry_t;
-
-#ifdef _KERNEL
-
-extern vm_offset_t phys_avail[];
-extern vm_offset_t virtual_avail;
-extern vm_offset_t virtual_end;
-
-extern uint64_t pmap_vhpt_base[];
-extern int pmap_vhpt_log2size;
-
-#define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list))
-
-vm_offset_t pmap_steal_memory(vm_size_t);
-void pmap_bootstrap(void);
-void pmap_kenter(vm_offset_t va, vm_offset_t pa);
-vm_paddr_t pmap_kextract(vm_offset_t va);
-void pmap_kremove(vm_offset_t);
-void pmap_setdevram(unsigned long long basea, vm_offset_t sizea);
-int pmap_uses_prom_console(void);
-void *pmap_mapdev(vm_offset_t, vm_size_t);
-void pmap_unmapdev(vm_offset_t, vm_size_t);
-unsigned *pmap_pte(pmap_t, vm_offset_t) __pure2;
-void pmap_set_opt (unsigned *);
-void pmap_set_opt_bsp (void);
-struct pmap *pmap_switch(struct pmap *pmap);
-
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_PMAP_H_ */
--- sys/ia64/include/intrcnt.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/intrcnt.h,v 1.6 2005/01/06 22:18:23 imp Exp $ */
-/* $NetBSD: intrcnt.h,v 1.17 1998/11/19 01:48:04 ross Exp $ */
-
-/*-
- * Copyright (c) 1995, 1996 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- *
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- *
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
- * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
- * Carnegie Mellon requests users of this software to return to
- *
- * Software Distribution Coordinator or Software.Distribution at CS.CMU.EDU
- * School of Computer Science
- * Carnegie Mellon University
- * Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-#define INTRCNT_CLOCK 0
-#define INTRCNT_ISA_IRQ (INTRCNT_CLOCK + 1)
-#define INTRCNT_ISA_IRQ_LEN 16
-#define INTRCNT_OTHER_BASE (INTRCNT_ISA_IRQ + INTRCNT_ISA_IRQ_LEN)
-#define INTRCNT_OTHER_LEN 240
-#define INTRCNT_COUNT (INTRCNT_OTHER_BASE + INTRCNT_OTHER_LEN)
-
-/*
- * Maximum name length in intrnames table (including terminating '\0'.
- * Since vmstat(8) assumes a maximum length of 13 (including '\0'), we're
- * pretty much limited to that (unless we don't care about the alignment
- * of the columns :-)
- */
-#define INTRNAME_LEN 13
--- sys/ia64/include/limits.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* $FreeBSD: src/sys/ia64/include/limits.h,v 1.13 2005/03/02 21:33:27 joerg Exp $ */
-/* From: NetBSD: limits.h,v 1.3 1997/04/06 08:47:31 cgd Exp */
-
-/*-
- * Copyright (c) 1988, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)limits.h 8.3 (Berkeley) 1/4/94
- */
-
-#ifndef _MACHINE_LIMITS_H_
-#define _MACHINE_LIMITS_H_
-
-#include <sys/cdefs.h>
-
-#ifdef __CC_SUPPORTS_WARNING
-#warning "machine/limits.h is deprecated. Include sys/limits.h instead."
-#endif
-
-#include <sys/limits.h>
-
-#endif /* !_MACHINE_LIMITS_H_ */
--- sys/ia64/include/unwind.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*-
- * Copyright (c) 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/unwind.h,v 1.7 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_UNWIND_H_
-#define _MACHINE_UNWIND_H_
-
-struct pcb;
-struct trapframe;
-struct uwx_env;
-
-struct unw_regstate {
- struct pcb *pcb;
- struct trapframe *frame;
- struct uwx_env *env;
- uint64_t keyval[8];
-};
-
-int unw_create_from_pcb(struct unw_regstate *s, struct pcb *pcb);
-int unw_create_from_frame(struct unw_regstate *s, struct trapframe *tf);
-void unw_delete(struct unw_regstate *s);
-int unw_step(struct unw_regstate *s);
-
-int unw_get_bsp(struct unw_regstate *s, uint64_t *r);
-int unw_get_cfm(struct unw_regstate *s, uint64_t *r);
-int unw_get_ip(struct unw_regstate *s, uint64_t *r);
-int unw_get_sp(struct unw_regstate *s, uint64_t *r);
-
-int unw_table_add(uint64_t, uint64_t, uint64_t);
-void unw_table_remove(uint64_t);
-
-#endif /* _MACHINE_UNWIND_H_ */
--- sys/ia64/include/memdev.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*-
- * Copyright (c) 2004 Mark R V Murray
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer
- * in this position and unchanged.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/memdev.h,v 1.2 2004/08/01 18:51:44 markm Exp $
- */
-
-#define CDEV_MAJOR 2
-#define CDEV_MINOR_MEM 0
-#define CDEV_MINOR_KMEM 1
-
-d_open_t memopen;
-d_read_t memrw;
-#define memioctl (d_ioctl_t *)NULL
-d_mmap_t memmmap;
-
-void dev_mem_md_init(void);
--- sys/ia64/include/cpufunc.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/cpufunc.h,v 1.22 2005/03/02 21:33:27 joerg Exp $
- */
-
-#ifndef _MACHINE_CPUFUNC_H_
-#define _MACHINE_CPUFUNC_H_
-
-#ifdef _KERNEL
-
-#include <sys/types.h>
-#include <machine/ia64_cpu.h>
-#include <machine/vmparam.h>
-
-#ifndef _SYS_CDEFS_H_
-#error this file needs sys/cdefs.h as a prerequisite
-#endif
-
-struct thread;
-
-#define IA64_FIXED_BREAK 0x84B5D
-
-#ifdef __GNUCLIKE_ASM
-
-static __inline void
-breakpoint(void)
-{
- __asm __volatile("break.m %0" :: "i"(IA64_FIXED_BREAK));
-}
-
-#define HAVE_INLINE_FFS
-#define ffs(x) __builtin_ffs(x)
-
-extern uint64_t ia64_port_base;
-#define __MEMIO_ADDR(x) (__volatile void*)(IA64_PHYS_TO_RR6(x))
-#define __PIO_ADDR(x) (__volatile void*)(ia64_port_base | \
- (((x) & 0xFFFC) << 10) | ((x) & 0xFFF))
-
-/*
- * I/O port reads with ia32 semantics.
- */
-static __inline uint8_t
-inb(unsigned int port)
-{
- __volatile uint8_t *p;
- uint8_t v;
- p = __PIO_ADDR(port);
- ia64_mf();
- v = *p;
- ia64_mf_a();
- ia64_mf();
- return (v);
-}
-
-static __inline uint16_t
-inw(unsigned int port)
-{
- __volatile uint16_t *p;
- uint16_t v;
- p = __PIO_ADDR(port);
- ia64_mf();
- v = *p;
- ia64_mf_a();
- ia64_mf();
- return (v);
-}
-
-static __inline uint32_t
-inl(unsigned int port)
-{
- volatile uint32_t *p;
- uint32_t v;
- p = __PIO_ADDR(port);
- ia64_mf();
- v = *p;
- ia64_mf_a();
- ia64_mf();
- return (v);
-}
-
-static __inline void
-insb(unsigned int port, void *addr, size_t count)
-{
- uint8_t *buf = addr;
- while (count--)
- *buf++ = inb(port);
-}
-
-static __inline void
-insw(unsigned int port, void *addr, size_t count)
-{
- uint16_t *buf = addr;
- while (count--)
- *buf++ = inw(port);
-}
-
-static __inline void
-insl(unsigned int port, void *addr, size_t count)
-{
- uint32_t *buf = addr;
- while (count--)
- *buf++ = inl(port);
-}
-
-static __inline void
-outb(unsigned int port, uint8_t data)
-{
- volatile uint8_t *p;
- p = __PIO_ADDR(port);
- ia64_mf();
- *p = data;
- ia64_mf_a();
- ia64_mf();
-}
-
-static __inline void
-outw(unsigned int port, uint16_t data)
-{
- volatile uint16_t *p;
- p = __PIO_ADDR(port);
- ia64_mf();
- *p = data;
- ia64_mf_a();
- ia64_mf();
-}
-
-static __inline void
-outl(unsigned int port, uint32_t data)
-{
- volatile uint32_t *p;
- p = __PIO_ADDR(port);
- ia64_mf();
- *p = data;
- ia64_mf_a();
- ia64_mf();
-}
-
-static __inline void
-outsb(unsigned int port, const void *addr, size_t count)
-{
- const uint8_t *buf = addr;
- while (count--)
- outb(port, *buf++);
-}
-
-static __inline void
-outsw(unsigned int port, const void *addr, size_t count)
-{
- const uint16_t *buf = addr;
- while (count--)
- outw(port, *buf++);
-}
-
-static __inline void
-outsl(unsigned int port, const void *addr, size_t count)
-{
- const uint32_t *buf = addr;
- while (count--)
- outl(port, *buf++);
-}
-
-static __inline void
-disable_intr(void)
-{
- __asm __volatile ("rsm psr.i");
-}
-
-static __inline void
-enable_intr(void)
-{
- __asm __volatile ("ssm psr.i;; srlz.d");
-}
-
-static __inline register_t
-intr_disable(void)
-{
- register_t psr;
- __asm __volatile ("mov %0=psr;;" : "=r"(psr));
- disable_intr();
- return ((psr & IA64_PSR_I) ? 1 : 0);
-}
-
-static __inline void
-intr_restore(register_t ie)
-{
- if (ie)
- enable_intr();
-}
-
-#endif /* __GNUCLIKE_ASM */
-
-#endif /* _KERNEL */
-
-#endif /* !_MACHINE_CPUFUNC_H_ */
--- sys/ia64/include/ucontext.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*-
- * Copyright (c) 1999, 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer
- * in this position and unchanged.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/ucontext.h,v 1.7 2003/12/07 20:47:33 marcel Exp $
- */
-
-#ifndef _MACHINE_UCONTEXT_H_
-#define _MACHINE_UCONTEXT_H_
-
-#include <machine/_regset.h>
-
-/*
- * The mc_flags field provides the necessary clues when dealing with the gory
- * details of ia64 specific contexts. A comprehensive explanation is added for
- * everybody's sanity, including the author's.
- *
- * The first and foremost variation in the context is synchronous contexts
- * (= synctx) versus asynchronous contexts (= asynctx). A synctx is created
- * synchronously WRT program execution and has the advantage that none of the
- * scratch registers have to be saved. They are assumed to be clobbered by the
- * call to the function that creates the context. An asynctx needs to have the
- * scratch registers preserved because it can describe any point in a thread's
- * (or process') execution.
- * The second variation is for synchronous contexts. When the kernel creates
- * a synchronous context if needs to preserve the scratch registers, because
- * the syscall argument and return values are stored there in the trapframe
- * and they need to be preserved in order to restart a syscall or return the
- * proper return values. Also, the IIP and CFM fields need to be preserved
- * as they point to the syscall stub, which the kernel saves as a favor to
- * userland (it keeps the stubs small and simple).
- *
- * Below a description of the flags and their meaning:
- *
- * _MC_FLAGS_ASYNC_CONTEXT
- * If set, indicates that mc_scratch and mc_scratch_fp are both
- * valid. IFF not set, _MC_FLAGS_SYSCALL_CONTEXT indicates if the
- * synchronous context is one corresponding to a syscall or not.
- * Only the kernel is expected to create such a context and it's
- * probably wise to let the kernel restore it.
- * _MC_FLAGS_HIGHFP_VALID
- * If set, indicates that the high FP registers (f32-f127) are
- * valid. This flag is very likely not going to be set for any
- * sensible synctx, but is not explicitly disallowed. Any synctx
- * that has this flag may or may not have the high FP registers
- * restored. In short: don't do it.
- * _MC_FLAGS_SYSCALL_CONTEXT
- * If set (hence _MC_FLAGS_ASYNC_CONTEXT is not set) indicates
- * that the scratch registers contain syscall arguments and
- * return values and that additionally IIP and CFM are valid.
- * Only the kernel is expected to create such a context. It's
- * probably wise to let the kernel restore it.
- */
-
-typedef struct __mcontext {
- unsigned long mc_flags;
-#define _MC_FLAGS_ASYNC_CONTEXT 0x0001
-#define _MC_FLAGS_HIGHFP_VALID 0x0002
-#define _MC_FLAGS_KSE_SET_MBOX 0x0004 /* Undocumented. Has to go. */
-#define _MC_FLAGS_SYSCALL_CONTEXT 0x0008
- unsigned long _reserved_;
- struct _special mc_special;
- struct _callee_saved mc_preserved;
- struct _callee_saved_fp mc_preserved_fp;
- struct _caller_saved mc_scratch;
- struct _caller_saved_fp mc_scratch_fp;
- struct _high_fp mc_high_fp;
-} mcontext_t;
-
-#endif /* !_MACHINE_UCONTEXT_H_ */
--- sys/ia64/include/dig64.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*-
- * Copyright (c) 2002 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/dig64.h,v 1.2 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_DIG64_H_
-#define _MACHINE_DIG64_H_
-
-struct dig64_gas {
- uint8_t addr_space;
- uint8_t bit_width;
- uint8_t bit_offset;
- uint8_t _reserved_;
- /*
- * XXX using a 64-bit type for the address would cause padding and
- * using __packed would cause unaligned accesses...
- */
- uint32_t addr_low;
- uint32_t addr_high;
-};
-
-struct dig64_hcdp_entry {
- uint8_t type;
-#define DIG64_HCDP_CONSOLE 0
-#define DIG64_HCDP_DBGPORT 1
- uint8_t databits;
- uint8_t parity;
- uint8_t stopbits;
- uint8_t pci_segment;
- uint8_t pci_bus;
- uint8_t pci_device:5;
- uint8_t _reserved1_:3;
- uint8_t pci_function:3;
- uint8_t _reserved2_:3;
- uint8_t interrupt:1;
- uint8_t pci_flag:1;
- /*
- * XXX using a 64-bit type for the baudrate would cause padding and
- * using __packed would cause unaligned accesses...
- */
- uint32_t baud_low;
- uint32_t baud_high;
- struct dig64_gas address;
- uint16_t pci_devid;
- uint16_t pci_vendor;
- uint32_t irq;
- uint32_t pclock;
- uint8_t pci_interface;
- uint8_t _reserved3_[7];
-};
-
-struct dig64_hcdp_table {
- char signature[4];
-#define HCDP_SIGNATURE "HCDP"
- uint32_t length;
- uint8_t revision;
- uint8_t checksum;
- char oem_id[6];
- char oem_tbl_id[8];
- uint32_t oem_rev;
- char creator_id[4];
- uint32_t creator_rev;
- uint32_t entries;
- struct dig64_hcdp_entry entry[1];
-};
-
-#endif
--- sys/ia64/include/pcb.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*-
- * Copyright (c) 2003,2004 Marcel Moolenaar
- * Copyright (c) 2000 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/pcb.h,v 1.16 2004/08/16 19:05:08 marcel Exp $
- */
-
-#ifndef _MACHINE_PCB_H_
-#define _MACHINE_PCB_H_
-
-#include <machine/_regset.h>
-
-/*
- * PCB: process control block
- */
-struct pmap;
-struct pcb {
- struct _special pcb_special;
- struct _callee_saved pcb_preserved;
- struct _callee_saved_fp pcb_preserved_fp;
- struct _high_fp pcb_high_fp;
- struct pcpu *pcb_fpcpu;
- struct pmap *pcb_current_pmap;
-
- uint64_t pcb_onfault; /* for copy faults */
-
- /* IA32 specific registers. */
- uint64_t pcb_ia32_cflg;
- uint64_t pcb_ia32_eflag;
- uint64_t pcb_ia32_fcr;
- uint64_t pcb_ia32_fdr;
- uint64_t pcb_ia32_fir;
- uint64_t pcb_ia32_fsr;
-};
-
-#ifdef _KERNEL
-
-#define savectx(p) swapctx(p, NULL)
-
-struct trapframe;
-
-void makectx(struct trapframe *, struct pcb *);
-void restorectx(struct pcb *) __dead2;
-int swapctx(struct pcb *old, struct pcb *new);
-
-void ia32_restorectx(struct pcb *);
-void ia32_savectx(struct pcb *);
-
-#endif
-
-#endif /* _MACHINE_PCB_H_ */
--- sys/ia64/include/sysarch.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*-
- * Copyright (c) 1993 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/sysarch.h,v 1.4 2004/01/09 16:52:08 nectar Exp $
- */
-
-#ifndef _MACHINE_SYSARCH_H_
-#define _MACHINE_SYSARCH_H_
-
-#define IA64_IORD 0
-#define IA64_IOWR 1
-
-struct ia64_iodesc {
- int port;
- int width;
- unsigned long val;
-};
-
-#ifndef _KERNEL
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-int sysarch(int, void *);
-__END_DECLS
-#endif
-
-#endif /* !_MACHINE_SYSARCH_H_ */
--- sys/ia64/include/profile.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*-
- * Copyright (c) 2004 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/profile.h,v 1.12 2005/01/06 22:18:23 imp Exp $
- */
-
-#ifndef _MACHINE_PROFILE_H_
-#define _MACHINE_PROFILE_H_
-
-#define _MCOUNT_DECL void __mcount
-#define MCOUNT
-
-#define FUNCTION_ALIGNMENT 32
-
-typedef unsigned long fptrdiff_t;
-
-#ifdef _KERNEL
-/*
- * The following two macros do splhigh and splx respectively.
- */
-#define MCOUNT_ENTER(s) s = intr_disable()
-#define MCOUNT_EXIT(s) intr_restore(s)
-#define MCOUNT_DECL(s) register_t s;
-
-void bintr(void);
-void btrap(void);
-void eintr(void);
-void user(void);
-
-#define MCOUNT_FROMPC_USER(pc) \
- ((pc < (uintfptr_t)VM_MAXUSER_ADDRESS) ? ~0UL : pc)
-
-#define MCOUNT_FROMPC_INTR(pc) (~0UL)
-
-_MCOUNT_DECL(uintfptr_t, uintfptr_t);
-
-#else /* !_KERNEL */
-
-typedef unsigned long uintfptr_t;
-
-#endif
-
-#endif /* _MACHINE_PROFILE_H_ */
--- sys/ia64/include/pal.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*-
- * Copyright (c) 2000 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/pal.h,v 1.5 2001/10/21 05:52:54 marcel Exp $
- */
-
-#ifndef _MACHINE_PAL_H_
-#define _MACHINE_PAL_H_
-
-/*
- * Architected static calling convention procedures.
- */
-#define PAL_CACHE_FLUSH 1
-#define PAL_CACHE_INFO 2
-#define PAL_CACHE_INIT 3
-#define PAL_CACHE_SUMMARY 4
-#define PAL_MEM_ATTRIB 5
-#define PAL_PTCE_INFO 6
-#define PAL_VM_INFO 7
-#define PAL_VM_SUMMARY 8
-#define PAL_BUS_GET_FEATURES 9
-#define PAL_BUS_SET_FEATURES 10
-#define PAL_DEBUG_INFO 11
-#define PAL_FIXED_ADDR 12
-#define PAL_FREQ_BASE 13
-#define PAL_FREQ_RATIOS 14
-#define PAL_PERF_MON_INFO 15
-#define PAL_PLATFORM_ADDR 16
-#define PAL_PROC_GET_FEATURE 17
-#define PAL_PROC_SET_FEATURE 18
-#define PAL_RSE_INFO 19
-#define PAL_VERSION 20
-#define PAL_MC_CLEAR_LOG 21
-#define PAL_MC_DRAIN 22
-#define PAL_MC_DYNAMIC_STATE 24
-#define PAL_MC_ERROR_INFO 25
-#define PAL_MC_EXPECTED 23
-#define PAL_MC_REGISTER_MEM 27
-#define PAL_MC_RESUME 26
-#define PAL_HALT 28
-#define PAL_HALT_LIGHT 29
-#define PAL_COPY_INFO 30
-#define PAL_CACHE_LINE_INIT 31
-#define PAL_PMI_ENTRYPOINT 32
-#define PAL_ENTER_IA_32_ENV 33
-#define PAL_VM_PAGE_SIZE 34
-#define PAL_MEM_FOR_TEST 37
-#define PAL_CACHE_PROT_INFO 38
-#define PAL_REGISTER_INFO 39
-#define PAL_SHUTDOWN 40
-#define PAL_PREFETCH_VISIBILITY 41
-
-/*
- * Architected stacked calling convention procedures.
- */
-#define PAL_COPY_PAL 256
-#define PAL_HALT_INFO 257
-#define PAL_TEST_PROC 258
-#define PAL_CACHE_READ 259
-#define PAL_CACHE_WRITE 260
-#define PAL_VM_TR_READ 261
-
-/*
- * Default physical address of the Processor Interrupt Block (PIB).
- * See also: IA-64 SDM, rev 1.1, volume 2, page 5-31.
- */
-#define PAL_PIB_DEFAULT_ADDR 0x00000000FEE00000L
-
-struct ia64_pal_result {
- int64_t pal_status;
- u_int64_t pal_result[3];
-};
-
-extern struct ia64_pal_result
- ia64_call_pal_static(u_int64_t proc, u_int64_t arg1,
- u_int64_t arg2, u_int64_t arg3);
-extern struct ia64_pal_result
- ia64_call_pal_static_physical(u_int64_t proc, u_int64_t arg1,
- u_int64_t arg2, u_int64_t arg3);
-extern struct ia64_pal_result
- ia64_call_pal_stacked(u_int64_t proc, u_int64_t arg1,
- u_int64_t arg2, u_int64_t arg3);
-extern struct ia64_pal_result
- ia64_call_pal_stacked_physical(u_int64_t proc, u_int64_t arg1,
- u_int64_t arg2, u_int64_t arg3);
-
-#endif /* _MACHINE_PAL_H_ */
--- sys/ia64/include/intr.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*-
- * Copyright (c) 1998 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/intr.h,v 1.3 2003/01/05 22:14:30 marcel Exp $
- */
-
-#ifndef _MACHINE_INTR_H_
-#define _MACHINE_INTR_H_
-
-/*
- * Layout of the Processor Interrupt Block.
- */
-struct ia64_interrupt_block
-{
- u_int64_t ib_ipi[0x20000]; /* 1Mb of IPI interrupts */
- u_int8_t ib_reserved1[0xe0000];
- u_int8_t ib_inta; /* Generate INTA cycle */
- u_int8_t ib_reserved2[7];
- u_int8_t ib_xtp; /* XTP cycle */
- u_int8_t ib_reserved3[7];
- u_int8_t ib_reserved4[0x1fff0];
-};
-
-extern u_int64_t ia64_lapic_address;
-
-#define IA64_INTERRUPT_BLOCK \
- (struct ia64_interrupt_block *)IA64_PHYS_TO_RR6(ia64_lapic_address)
-
-struct sapic;
-
-void ia64_add_sapic(struct sapic *sa);
-int ia64_setup_intr(const char *name, int irq, driver_intr_t handler,
- void *arg, enum intr_type flags, void **cookiep,
- volatile long *cntp);
-int ia64_teardown_intr(void *cookie);
-void ia64_dispatch_intr(void *frame, unsigned long vector);
-
-#endif /* !_MACHINE_INTR_H_ */
--- sys/ia64/include/_bus.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*-
- * Copyright (c) 2005 M. Warner Losh.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions, and the following disclaimer,
- * without modification, immediately at the beginning of the file.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/include/_bus.h,v 1.1 2005/04/18 21:45:33 imp Exp $
- */
-
-#ifndef IA64_INCLUDE__BUS_H
-#define IA64_INCLUDE__BUS_H
-
-/*
- * Bus address and size types
- */
-typedef u_long bus_addr_t;
-typedef u_long bus_size_t;
-
-/*
- * Access methods for bus resources and address space.
- */
-typedef int bus_space_tag_t;
-typedef u_long bus_space_handle_t;
-
-#endif /* IA64_INCLUDE__BUS_H */
--- sys/arm/xscale/i80321/i80321_mcu.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/* $NetBSD: i80321_mcu.c,v 1.2 2003/07/15 00:24:54 lukem Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Intel i80321 I/O Processor memory controller support.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/i80321_mcu.c,v 1.2 2005/01/05 21:58:49 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <machine/bus.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-
-/*
- * i80321_sdram_bounds:
- *
- * Retrieve the start and size of SDRAM.
- */
-void
-i80321_sdram_bounds(bus_space_tag_t st, bus_space_handle_t sh,
- vm_paddr_t *start, vm_size_t *size)
-{
- uint32_t sdbr, sbr0, sbr1;
- uint32_t bank0, bank1;
-
- sdbr = bus_space_read_4(st, sh, MCU_SDBR);
- sbr0 = bus_space_read_4(st, sh, MCU_SBR0);
- sbr1 = bus_space_read_4(st, sh, MCU_SBR1);
-
-#ifdef VERBOSE_INIT_ARM
- printf("i80321: SBDR = 0x%08x SBR0 = 0x%08x SBR1 = 0x%08x\n",
- sdbr, sbr0, sbr1);
-#endif
-
- *start = sdbr;
-
- sdbr = (sdbr >> 25) & 0x1f;
-
- sbr0 &= 0x3f;
- sbr1 &= 0x3f;
-
- bank0 = (sbr0 - sdbr) << 25;
- bank1 = (sbr1 - sbr0) << 25;
-
-#ifdef VERBOSE_INIT_ARM
- printf("i80321: BANK0 = 0x%08x BANK1 = 0x%08x\n", bank0, bank1);
-#endif
-
- *size = bank0 + bank1;
-}
--- sys/arm/xscale/i80321/files.i80321
+++ /dev/null
@@ -1,9 +0,0 @@
-#$FreeBSD: src/sys/arm/xscale/i80321/files.i80321,v 1.2 2005/01/15 16:56:22 cognet Exp $
-arm/arm/cpufunc_asm_xscale.S standard
-arm/arm/irq_dispatch.S standard
-arm/xscale/i80321/i80321.c standard
-arm/xscale/i80321/i80321_mcu.c standard
-arm/xscale/i80321/i80321_pci.c optional pci
-arm/xscale/i80321/i80321_space.c standard
-arm/xscale/i80321/i80321_timer.c standard
-arm/xscale/i80321/i80321_wdog.c optional iopwdog
--- sys/arm/xscale/i80321/i80321_intr.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/* $NetBSD: i80321_intr.h,v 1.5 2004/01/12 10:25:06 scw Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/xscale/i80321/i80321_intr.h,v 1.2 2005/01/05 21:58:49 imp Exp $
- *
- */
-
-#ifndef _I80321_INTR_H_
-#define _I80321_INTR_H_
-
-#define ARM_IRQ_HANDLER _C_LABEL(i80321_intr_dispatch)
-
-#ifndef _LOCORE
-
-#include <machine/armreg.h>
-#include <machine/cpufunc.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-
-void i80321_do_pending(void);
-
-extern __volatile uint32_t intr_enabled;
-extern uint32_t intr_steer;
-
-static __inline void __attribute__((__unused__))
-i80321_set_intrmask(void)
-{
-
- __asm __volatile("mcr p6, 0, %0, c0, c0, 0"
- :
- : "r" (intr_enabled & ICU_INT_HWMASK));
-}
-
-static __inline void
-i80321_set_intrsteer(void)
-{
-
- __asm __volatile("mcr p6, 0, %0, c4, c0, 0"
- :
- : "r" (intr_steer & ICU_INT_HWMASK));
-}
-
-#define INT_SWMASK \
- ((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) | \
- (1U << ICU_INT_bit5) | (1U << ICU_INT_bit4))
-
-#if 0
-static __inline void __attribute__((__unused__))
-i80321_splx(int new)
-{
- extern __volatile uint32_t intr_enabled;
- extern __volatile int current_spl_level;
- extern __volatile int i80321_ipending;
- extern void i80321_do_pending(void);
- int oldirqstate, hwpend;
-
- /* Don't let the compiler re-order this code with preceding code */
- __insn_barrier();
-
- current_spl_level = new;
-
- hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~new;
- if (hwpend != 0) {
- oldirqstate = disable_interrupts(I32_bit);
- intr_enabled |= hwpend;
- i80321_set_intrmask();
- restore_interrupts(oldirqstate);
- }
-
- if ((i80321_ipending & INT_SWMASK) & ~new)
- i80321_do_pending();
-}
-
-static __inline int __attribute__((__unused__))
-i80321_splraise(int ipl)
-{
- extern __volatile int current_spl_level;
- extern int i80321_imask[];
- int old;
-
- old = current_spl_level;
- current_spl_level |= i80321_imask[ipl];
-
- /* Don't let the compiler re-order this code with subsequent code */
- __insn_barrier();
-
- return (old);
-}
-
-static __inline int __attribute__((__unused__))
-i80321_spllower(int ipl)
-{
- extern __volatile int current_spl_level;
- extern int i80321_imask[];
- int old = current_spl_level;
-
- i80321_splx(i80321_imask[ipl]);
- return(old);
-}
-
-#endif
-#if !defined(EVBARM_SPL_NOINLINE)
-
-#define splx(new) i80321_splx(new)
-#define _spllower(ipl) i80321_spllower(ipl)
-#define _splraise(ipl) i80321_splraise(ipl)
-void _setsoftintr(int);
-
-#else
-
-int _splraise(int);
-int _spllower(int);
-void splx(int);
-void _setsoftintr(int);
-
-#endif /* ! EVBARM_SPL_NOINLINE */
-
-#endif /* _LOCORE */
-
-#endif /* _I80321_INTR_H_ */
--- sys/arm/xscale/i80321/obio.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/* $NetBSD: obio.c,v 1.11 2003/07/15 00:25:05 lukem Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * On-board device autoconfiguration support for Intel IQ80321
- * evaluation boards.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/obio.c,v 1.2 2005/01/05 21:58:49 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/rman.h>
-#include <sys/malloc.h>
-
-#include <machine/bus.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-
-#include <arm/xscale/i80321/iq80321reg.h>
-#include <arm/xscale/i80321/obiovar.h>
-
-int obio_probe(device_t);
-int obio_attach(device_t);
-
-int
-obio_probe(device_t dev)
-{
- return (0);
-}
-
-int
-obio_attach(device_t dev)
-{
- struct obio_softc *sc = device_get_softc(dev);
-
- sc->oba_st = &obio_bs_tag;
- sc->oba_addr = IQ80321_OBIO_BASE;
- sc->oba_size = IQ80321_OBIO_SIZE;
- sc->oba_rman.rm_type = RMAN_ARRAY;
- sc->oba_rman.rm_descr = "OBIO I/O";
- if (rman_init(&sc->oba_rman) != 0 ||
- rman_manage_region(&sc->oba_rman,
- sc->oba_addr, sc->oba_addr + sc->oba_size) != 0)
- panic("obio_attach: failed to set up I/O rman");
- device_add_child(dev, "uart", 0);
- bus_generic_probe(dev);
- bus_generic_attach(dev);
- return (0);
-}
-
-static struct resource *
-obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- struct resource *rv;
- struct rman *rm;
- bus_space_tag_t bt;
- bus_space_handle_t bh;
- struct obio_softc *sc = device_get_softc(bus);
-
- if (type == SYS_RES_IRQ) {
- rv = malloc(sizeof(*rv), M_DEVBUF, M_WAITOK);
- rv->r_start = 28;
- rv->r_end = 28;
- rv->r_rid = *rid;
- return (rv);
- }
- switch (type) {
- case SYS_RES_MEMORY:
- return (NULL);
- case SYS_RES_IOPORT:
- rm = &sc->oba_rman;
- bt = sc->oba_st;
- bh = sc->oba_addr;
- break;
- default:
- return (NULL);
- }
-
- start = bh;
-
- rv = rman_reserve_resource(rm, start, end, count, flags, child);
- if (rv == NULL)
- return (NULL);
- rman_set_bustag(rv, bt);
- rman_set_bushandle(rv, bh);
-
- if (0) {
- if (bus_activate_resource(child, type, *rid, rv)) {
- rman_release_resource(rv);
- return (NULL);
- }
- }
- return (rv);
-
-}
-
-static int
-obio_activate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- return (0);
-}
-static device_method_t obio_methods[] = {
- DEVMETHOD(device_probe, obio_probe),
- DEVMETHOD(device_attach, obio_attach),
-
- DEVMETHOD(bus_alloc_resource, obio_alloc_resource),
- DEVMETHOD(bus_activate_resource, obio_activate_resource),
- DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
- DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
-
- {0, 0},
-};
-
-static driver_t obio_driver = {
- "obio",
- obio_methods,
- sizeof(struct obio_softc),
-};
-static devclass_t obio_devclass;
-
-DRIVER_MODULE(obio, iq, obio_driver, obio_devclass, 0, 0);
--- sys/arm/xscale/i80321/i80321_wdog.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/* $NetBSD: i80321_wdog.c,v 1.6 2003/07/15 00:24:54 lukem Exp $ */
-
-/*-
- * Copyright (c) 2005 Olivier Houchard
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Watchdog timer support for the Intel i80321 I/O processor.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/i80321_wdog.c,v 1.2 2005/01/15 18:38:10 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/watchdog.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-#include <machine/cpufunc.h>
-#include <machine/machdep.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-
-
-struct iopwdog_softc {
- device_t dev;
- int armed;
- int wdog_period;
- struct callout_handle wdog_callout;
-};
-
-static __inline void
-wdtcr_write(uint32_t val)
-{
-
- __asm __volatile("mcr p6, 0, %0, c7, c1, 0"
- :
- : "r" (val));
-}
-
-static void
-iopwdog_tickle(void *arg)
-{
- struct iopwdog_softc *sc = arg;
-
- if (!sc->armed)
- return;
- wdtcr_write(WDTCR_ENABLE1);
- wdtcr_write(WDTCR_ENABLE2);
- sc->wdog_callout = timeout(iopwdog_tickle, sc,
- hz * (sc->wdog_period - 1));
-}
-
-static int
-iopwdog_probe(device_t dev)
-{
- struct iopwdog_softc *sc = device_get_softc(dev);
- char buf[128];
-
- /*
- * XXX Should compute the period based on processor speed.
- * For a 600MHz XScale core, the wdog must be tickled approx.
- * every 7 seconds.
- */
-
- sc->wdog_period = 7;
- sprintf(buf, "i80321 Watchdog, must be tickled every %d seconds",
- sc->wdog_period);
- device_set_desc_copy(dev, buf);
-
- return (0);
-}
-
-static void
-iopwdog_watchdog_fn(void *private, u_int cmd, int *error)
-{
- struct iopwdog_softc *sc = private;
-
- if (cmd == 0)
- return;
- if ((((uint64_t)1 << (cmd & WD_INTERVAL))) >
- (uint64_t)sc->wdog_period * 1000000000)
- return;
- sc->armed = 1;
- iopwdog_tickle(sc);
- *error = 0;
-}
-
-static int
-iopwdog_attach(device_t dev)
-{
- struct iopwdog_softc *sc = device_get_softc(dev);
-
- sc->dev = dev;
- sc->armed = 0;
- EVENTHANDLER_REGISTER(watchdog_list, iopwdog_watchdog_fn, sc, 0);
- return (0);
-}
-
-static device_method_t iopwdog_methods[] = {
- DEVMETHOD(device_probe, iopwdog_probe),
- DEVMETHOD(device_attach, iopwdog_attach),
- {0, 0},
-};
-
-static driver_t iopwdog_driver = {
- "iopwdog",
- iopwdog_methods,
- sizeof(struct iopwdog_softc),
-};
-static devclass_t iopwdog_devclass;
-
-DRIVER_MODULE(iopwdog, iq, iopwdog_driver, iopwdog_devclass, 0, 0);
--- sys/arm/xscale/i80321/i80321reg.h
+++ /dev/null
@@ -1,504 +0,0 @@
-/* $NetBSD: i80321reg.h,v 1.14 2003/12/19 10:08:11 gavan Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/xscale/i80321/i80321reg.h,v 1.2 2005/01/05 21:58:49 imp Exp $
- *
- */
-
-#ifndef _ARM_XSCALE_I80321REG_H_
-#define _ARM_XSCALE_I80321REG_H_
-
-/*
- * Register definitions for the Intel 80321 (``Verde'') I/O processor,
- * based on the XScale core.
- */
-
-/*
- * Base i80321 memory map:
- *
- * 0x0000.0000 - 0x7fff.ffff ATU Outbound Direct Addressing Window
- * 0x8000.0000 - 0x9001.ffff ATU Outbound Translation Windows
- * 0x9002.0000 - 0xffff.dfff External Memory
- * 0xffff.e000 - 0xffff.e8ff Peripheral Memory Mapped Registers
- * 0xffff.e900 - 0xffff.ffff Reserved
- */
-
-#define VERDE_OUT_DIRECT_WIN_BASE 0x00000000UL
-#define VERDE_OUT_DIRECT_WIN_SIZE 0x80000000UL
-
-#define VERDE_OUT_XLATE_MEM_WIN_SIZE 0x04000000UL
-#define VERDE_OUT_XLATE_IO_WIN_SIZE 0x00010000UL
-
-#define VERDE_OUT_XLATE_MEM_WIN0_BASE 0x80000000UL
-#define VERDE_OUT_XLATE_MEM_WIN1_BASE 0x84000000UL
-
-#define VERDE_OUT_XLATE_IO_WIN0_BASE 0x90000000UL
-
-#define VERDE_EXTMEM_BASE 0x90020000UL
-
-#define VERDE_PMMR_BASE 0xffffe000UL
-#define VERDE_PMMR_SIZE 0x00001700UL
-
-/*
- * Peripheral Memory Mapped Registers. Defined as offsets
- * from the VERDE_PMMR_BASE.
- */
-#define VERDE_ATU_BASE 0x0100
-#define VERDE_ATU_SIZE 0x0100
-
-#define VERDE_MU_BASE 0x0300
-#define VERDE_MU_SIZE 0x0100
-
-#define VERDE_DMA_BASE 0x0400
-#define VERDE_DMA_BASE0 (VERDE_DMA_BASE + 0x00)
-#define VERDE_DMA_BASE1 (VERDE_DMA_BASE + 0x40)
-#define VERDE_DMA_SIZE 0x0100
-#define VERDE_DMA_CHSIZE 0x0040
-
-#define VERDE_MCU_BASE 0x0500
-#define VERDE_MCU_SIZE 0x0100
-
-#define VERDE_SSP_BASE 0x0600
-#define VERDE_SSP_SIZE 0x0080
-
-#define VERDE_PBIU_BASE 0x0680
-#define VERDE_PBIU_SIZE 0x0080
-
-#define VERDE_AAU_BASE 0x0800
-#define VERDE_AAU_SIZE 0x0100
-
-#define VERDE_I2C_BASE 0x1680
-#define VERDE_I2C_BASE0 (VERDE_I2C_BASE + 0x00)
-#define VERDE_I2C_BASE1 (VERDE_I2C_BASE + 0x20)
-#define VERDE_I2C_SIZE 0x0080
-#define VERDE_I2C_CHSIZE 0x0020
-
-/*
- * Address Translation Unit
- */
- /* 0x00 - 0x38 -- PCI configuration space header */
-#define ATU_IALR0 0x40 /* Inbound ATU Limit 0 */
-#define ATU_IATVR0 0x44 /* Inbound ATU Xlate Value 0 */
-#define ATU_ERLR 0x48 /* Expansion ROM Limit */
-#define ATU_ERTVR 0x4c /* Expansion ROM Xlate Value */
-#define ATU_IALR1 0x50 /* Inbound ATU Limit 1 */
-#define ATU_IALR2 0x54 /* Inbound ATU Limit 2 */
-#define ATU_IATVR2 0x58 /* Inbound ATU Xlate Value 2 */
-#define ATU_OIOWTVR 0x5c /* Outbound I/O Window Xlate Value */
-#define ATU_OMWTVR0 0x60 /* Outbound Mem Window Xlate Value 0 */
-#define ATU_OUMWTVR0 0x64 /* Outbound Mem Window Xlate Value 0 Upper */
-#define ATU_OMWTVR1 0x68 /* Outbound Mem Window Xlate Value 1 */
-#define ATU_OUMWTVR1 0x6c /* Outbound Mem Window Xlate Value 1 Upper */
-#define ATU_OUDWTVR 0x78 /* Outbound Mem Direct Xlate Value Upper */
-#define ATU_ATUCR 0x80 /* ATU Configuration */
-#define ATU_PCSR 0x84 /* PCI Configuration and Status */
-#define ATU_ATUISR 0x88 /* ATU Interrupt Status */
-#define ATU_ATUIMR 0x8c /* ATU Interrupt Mask */
-#define ATU_IABAR3 0x90 /* Inbound ATU Base Address 3 */
-#define ATU_IAUBAR3 0x94 /* Inbound ATU Base Address 3 Upper */
-#define ATU_IALR3 0x98 /* Inbound ATU Limit 3 */
-#define ATU_IATVR3 0x9c /* Inbound ATU Xlate Value 3 */
-#define ATU_OCCAR 0xa4 /* Outbound Configuration Cycle Address */
-#define ATU_OCCDR 0xac /* Outbound Configuration Cycle Data */
-#define ATU_MSI_PORT 0xb4 /* MSI port */
-#define ATU_PDSCR 0xbc /* PCI Bus Drive Strength Control */
-#define ATU_PCI_X_CAP_ID 0xe0 /* (1) */
-#define ATU_PCI_X_NEXT 0xe1 /* (1) */
-#define ATU_PCIXCMD 0xe2 /* PCI-X Command Register (2) */
-#define ATU_PCIXSR 0xe4 /* PCI-X Status Register */
-
-#define ATUCR_DRC_ALIAS (1U << 19)
-#define ATUCR_DAU2GXEN (1U << 18)
-#define ATUCR_P_SERR_MA (1U << 16)
-#define ATUCR_DTS (1U << 15)
-#define ATUCR_P_SERR_DIE (1U << 9)
-#define ATUCR_DAE (1U << 8)
-#define ATUCR_BIST_IE (1U << 3)
-#define ATUCR_OUT_EN (1U << 1)
-
-#define PCSR_DAAAPE (1U << 18)
-#define PCSR_PCI_X_CAP (3U << 16)
-#define PCSR_PCI_X_CAP_BORING (0 << 16)
-#define PCSR_PCI_X_CAP_66 (1U << 16)
-#define PCSR_PCI_X_CAP_100 (2U << 16)
-#define PCSR_PCI_X_CAP_133 (3U << 16)
-#define PCSR_OTQB (1U << 15)
-#define PCSR_IRTQB (1U << 14)
-#define PCSR_DTV (1U << 12)
-#define PCSR_BUS66 (1U << 10)
-#define PCSR_BUS64 (1U << 8)
-#define PCSR_RIB (1U << 5)
-#define PCSR_RPB (1U << 4)
-#define PCSR_CCR (1U << 2)
-#define PCSR_CPR (1U << 1)
-
-#define ATUISR_IMW1BU (1U << 14)
-#define ATUISR_ISCEM (1U << 13)
-#define ATUISR_RSCEM (1U << 12)
-#define ATUISR_PST (1U << 11)
-#define ATUISR_P_SERR_ASRT (1U << 10)
-#define ATUISR_DPE (1U << 9)
-#define ATUISR_BIST (1U << 8)
-#define ATUISR_IBMA (1U << 7)
-#define ATUISR_P_SERR_DET (1U << 4)
-#define ATUISR_PMA (1U << 3)
-#define ATUISR_PTAM (1U << 2)
-#define ATUISR_PTAT (1U << 1)
-#define ATUISR_PMPE (1U << 0)
-
-#define ATUIMR_IMW1BU (1U << 11)
-#define ATUIMR_ISCEM (1U << 10)
-#define ATUIMR_RSCEM (1U << 9)
-#define ATUIMR_PST (1U << 8)
-#define ATUIMR_DPE (1U << 7)
-#define ATUIMR_P_SERR_ASRT (1U << 6)
-#define ATUIMR_PMA (1U << 5)
-#define ATUIMR_PTAM (1U << 4)
-#define ATUIMR_PTAT (1U << 3)
-#define ATUIMR_PMPE (1U << 2)
-#define ATUIMR_IE_SERR_EN (1U << 1)
-#define ATUIMR_ECC_TAE (1U << 0)
-
-#define PCIXCMD_MOST_1 (0 << 4)
-#define PCIXCMD_MOST_2 (1 << 4)
-#define PCIXCMD_MOST_3 (2 << 4)
-#define PCIXCMD_MOST_4 (3 << 4)
-#define PCIXCMD_MOST_8 (4 << 4)
-#define PCIXCMD_MOST_12 (5 << 4)
-#define PCIXCMD_MOST_16 (6 << 4)
-#define PCIXCMD_MOST_32 (7 << 4)
-#define PCIXCMD_MOST_MASK (7 << 4)
-#define PCIXCMD_MMRBC_512 (0 << 2)
-#define PCIXCMD_MMRBC_1024 (1 << 2)
-#define PCIXCMD_MMRBC_2048 (2 << 2)
-#define PCIXCMD_MMRBC_4096 (3 << 2)
-#define PCIXCMD_MMRBC_MASK (3 << 2)
-#define PCIXCMD_ERO (1U << 1)
-#define PCIXCMD_DPERE (1U << 0)
-
-#define PCIXSR_RSCEM (1U << 29)
-#define PCIXSR_DMCRS_MASK (7 << 26)
-#define PCIXSR_DMOST_MASK (7 << 23)
-#define PCIXSR_COMPLEX (1U << 20)
-#define PCIXSR_USC (1U << 19)
-#define PCIXSR_SCD (1U << 18)
-#define PCIXSR_133_CAP (1U << 17)
-#define PCIXSR_32PCI (1U << 16) /* 0 = 32, 1 = 64 */
-#define PCIXSR_BUSNO(x) (((x) & 0xff00) >> 8)
-#define PCIXSR_DEVNO(x) (((x) & 0xf8) >> 3)
-#define PCIXSR_FUNCNO(x) ((x) & 0x7)
-
-/*
- * Memory Controller Unit
- */
-#define MCU_SDIR 0x00 /* DDR SDRAM Init. Register */
-#define MCU_SDCR 0x04 /* DDR SDRAM Control Register */
-#define MCU_SDBR 0x08 /* SDRAM Base Register */
-#define MCU_SBR0 0x0c /* SDRAM Boundary 0 */
-#define MCU_SBR1 0x10 /* SDRAM Boundary 1 */
-#define MCU_ECCR 0x34 /* ECC Control Register */
-#define MCU_ELOG0 0x38 /* ECC Log 0 */
-#define MCU_ELOG1 0x3c /* ECC Log 1 */
-#define MCU_ECAR0 0x40 /* ECC address 0 */
-#define MCU_ECAR1 0x44 /* ECC address 1 */
-#define MCU_ECTST 0x48 /* ECC test register */
-#define MCU_MCISR 0x4c /* MCU Interrupt Status Register */
-#define MCU_RFR 0x50 /* Refresh Frequency Register */
-#define MCU_DBUDSR 0x54 /* Data Bus Pull-up Drive Strength */
-#define MCU_DBDDSR 0x58 /* Data Bus Pull-down Drive Strength */
-#define MCU_CUDSR 0x5c /* Clock Pull-up Drive Strength */
-#define MCU_CDDSR 0x60 /* Clock Pull-down Drive Strength */
-#define MCU_CEUDSR 0x64 /* Clock En Pull-up Drive Strength */
-#define MCU_CEDDSR 0x68 /* Clock En Pull-down Drive Strength */
-#define MCU_CSUDSR 0x6c /* Chip Sel Pull-up Drive Strength */
-#define MCU_CSDDSR 0x70 /* Chip Sel Pull-down Drive Strength */
-#define MCU_REUDSR 0x74 /* Rx En Pull-up Drive Strength */
-#define MCU_REDDSR 0x78 /* Rx En Pull-down Drive Strength */
-#define MCU_ABUDSR 0x7c /* Addr Bus Pull-up Drive Strength */
-#define MCU_ABDDSR 0x80 /* Addr Bus Pull-down Drive Strength */
-#define MCU_DSDR 0x84 /* Data Strobe Delay Register */
-#define MCU_REDR 0x88 /* Rx Enable Delay Register */
-
-#define SDCR_DIMMTYPE (1U << 1) /* 0 = unbuf, 1 = reg */
-#define SDCR_BUSWIDTH (1U << 2) /* 0 = 64, 1 = 32 */
-
-#define SBRx_TECH (1U << 31)
-#define SBRx_BOUND 0x0000003f
-
-#define ECCR_SBERE (1U << 0)
-#define ECCR_MBERE (1U << 1)
-#define ECCR_SBECE (1U << 2)
-#define ECCR_ECCEN (1U << 3)
-
-#define ELOGx_SYNDROME 0x000000ff
-#define ELOGx_ERRTYPE (1U << 8) /* 1 = multi-bit */
-#define ELOGx_RW (1U << 12) /* 1 = write error */
- /*
- * Dev ID Func Requester
- * 2 0 XScale core
- * 2 1 ATU
- * 13 0 DMA channel 0
- * 13 1 DMA channel 1
- * 26 0 ATU
- */
-#define ELOGx_REQ_DEV(x) (((x) >> 19) & 0x1f)
-#define ELOGx_REQ_FUNC(x) (((x) >> 16) & 0x3)
-
-#define MCISR_ECC_ERR0 (1U << 0)
-#define MCISR_ECC_ERR1 (1U << 1)
-#define MCISR_ECC_ERRN (1U << 2)
-
-/*
- * Timers
- *
- * The i80321 timer registers are available in both memory-mapped
- * and coprocessor spaces. Most of the registers are read-only
- * if memory-mapped, so we access them via coprocessor space.
- *
- * TMR0 cp6 c0,1 0xffffe7e0
- * TMR1 cp6 c1,1 0xffffe7e4
- * TCR0 cp6 c2,1 0xffffe7e8
- * TCR1 cp6 c3,1 0xffffe7ec
- * TRR0 cp6 c4,1 0xffffe7f0
- * TRR1 cp6 c5,1 0xffffe7f4
- * TISR cp6 c6,1 0xffffe7f8
- * WDTCR cp6 c7,1 0xffffe7fc
- */
-
-#define TMRx_TC (1U << 0)
-#define TMRx_ENABLE (1U << 1)
-#define TMRx_RELOAD (1U << 2)
-#define TMRx_CSEL_CORE (0 << 4)
-#define TMRx_CSEL_CORE_div4 (1 << 4)
-#define TMRx_CSEL_CORE_div8 (2 << 4)
-#define TMRx_CSEL_CORE_div16 (3 << 4)
-
-#define TISR_TMR0 (1U << 0)
-#define TISR_TMR1 (1U << 1)
-
-#define WDTCR_ENABLE1 0x1e1e1e1e
-#define WDTCR_ENABLE2 0xe1e1e1e1
-
-/*
- * Interrupt Controller Unit.
- *
- * INTCTL cp6 c0,0 0xffffe7d0
- * INTSTR cp6 c4,0 0xffffe7d4
- * IINTSRC cp6 c8,0 0xffffe7d8
- * FINTSRC cp6 c9,0 0xffffe7dc
- * PIRSR 0xffffe1ec
- */
-
-#define ICU_PIRSR 0x01ec
-#define ICU_GPOE 0x07c4
-#define ICU_GPID 0x07c8
-#define ICU_GPOD 0x07cc
-
-/*
- * NOTE: WE USE THE `bitXX' BITS TO INDICATE PENDING SOFTWARE
- * INTERRUPTS. See i80321_icu.c
- */
-#define ICU_INT_HPI 31 /* high priority interrupt */
-#define ICU_INT_XINT0 27 /* external interrupts */
-#define ICU_INT_XINT(x) ((x) + ICU_INT_XINT0)
-#define ICU_INT_bit26 26
-#define ICU_INT_SSP 25 /* SSP serial port */
-#define ICU_INT_MUE 24 /* msg unit error */
-#define ICU_INT_AAUE 23 /* AAU error */
-#define ICU_INT_bit22 22
-#define ICU_INT_DMA1E 21 /* DMA Ch 1 error */
-#define ICU_INT_DMA0E 20 /* DMA Ch 0 error */
-#define ICU_INT_MCUE 19 /* memory controller error */
-#define ICU_INT_ATUE 18 /* ATU error */
-#define ICU_INT_BIUE 17 /* bus interface unit error */
-#define ICU_INT_PMU 16 /* XScale PMU */
-#define ICU_INT_PPM 15 /* peripheral PMU */
-#define ICU_INT_BIST 14 /* ATU Start BIST */
-#define ICU_INT_MU 13 /* messaging unit */
-#define ICU_INT_I2C1 12 /* i2c unit 1 */
-#define ICU_INT_I2C0 11 /* i2c unit 0 */
-#define ICU_INT_TMR1 10 /* timer 1 */
-#define ICU_INT_TMR0 9 /* timer 0 */
-#define ICU_INT_CPPM 8 /* core processor PMU */
-#define ICU_INT_AAU_EOC 7 /* AAU end-of-chain */
-#define ICU_INT_AAU_EOT 6 /* AAU end-of-transfer */
-#define ICU_INT_bit5 5
-#define ICU_INT_bit4 4
-#define ICU_INT_DMA1_EOC 3 /* DMA1 end-of-chain */
-#define ICU_INT_DMA1_EOT 2 /* DMA1 end-of-transfer */
-#define ICU_INT_DMA0_EOC 1 /* DMA0 end-of-chain */
-#define ICU_INT_DMA0_EOT 0 /* DMA0 end-of-transfer */
-
-#define ICU_INT_HWMASK (0xffffffff & \
- ~((1 << ICU_INT_bit26) | \
- (1 << ICU_INT_bit22) | \
- (1 << ICU_INT_bit5) | \
- (1 << ICU_INT_bit4)))
-
-/*
- * SSP Serial Port
- */
-
-#define SSP_SSCR0 0x00 /* SSC control 0 */
-#define SSP_SSCR1 0x04 /* SSC control 1 */
-#define SSP_SSSR 0x08 /* SSP status */
-#define SSP_SSITR 0x0c /* SSP interrupt test */
-#define SSP_SSDR 0x10 /* SSP data */
-
-#define SSP_SSCR0_DSIZE(x) ((x) - 1)/* data size: 4..16 */
-#define SSP_SSCR0_FRF_SPI (0 << 4) /* Motorola Serial Periph Iface */
-#define SSP_SSCR0_FRF_SSP (1U << 4)/* TI Sync. Serial Protocol */
-#define SSP_SSCR0_FRF_UWIRE (2U << 4)/* NatSemi Microwire */
-#define SSP_SSCR0_FRF_rsvd (3U << 4)/* reserved */
-#define SSP_SSCR0_ECS (1U << 6)/* external clock select */
-#define SSP_SSCR0_SSE (1U << 7)/* sync. serial port enable */
-#define SSP_SSCR0_SCR(x) ((x) << 8)/* serial clock rate */
- /* bit rate = 3.6864 * 10e6 /
- (2 * (SCR + 1)) */
-
-#define SSP_SSCR1_RIE (1U << 0)/* Rx FIFO interrupt enable */
-#define SSP_SSCR1_TIE (1U << 1)/* Tx FIFO interrupt enable */
-#define SSP_SSCR1_LBM (1U << 2)/* loopback mode enable */
-#define SSP_SSCR1_SPO (1U << 3)/* Moto SPI SSCLK pol. (1 = high) */
-#define SSP_SSCR1_SPH (1U << 4)/* Moto SPI SSCLK phase:
- 0 = inactive full at start,
- 1/2 at end of frame
- 1 = inactive 1/2 at start,
- full at end of frame */
-#define SSP_SSCR1_MWDS (1U << 5)/* Microwire data size:
- 0 = 8 bit
- 1 = 16 bit */
-#define SSP_SSCR1_TFT (((x) - 1) << 6) /* Tx FIFO threshold */
-#define SSP_SSCR1_RFT (((x) - 1) << 10)/* Rx FIFO threshold */
-#define SSP_SSCR1_EFWR (1U << 14)/* enab. FIFO write/read */
-#define SSP_SSCR1_STRF (1U << 15)/* FIFO write/read FIFO select:
- 0 = Tx FIFO
- 1 = Rx FIFO */
-
-#define SSP_SSSR_TNF (1U << 2)/* Tx FIFO not full */
-#define SSP_SSSR_RNE (1U << 3)/* Rx FIFO not empty */
-#define SSP_SSSR_BSY (1U << 4)/* SSP is busy */
-#define SSP_SSSR_TFS (1U << 5)/* Tx FIFO service request */
-#define SSP_SSSR_RFS (1U << 6)/* Rx FIFO service request */
-#define SSP_SSSR_ROR (1U << 7)/* Rx FIFO overrun */
-#define SSP_SSSR_TFL(x) (((x) >> 8) & 0xf) /* Tx FIFO level */
-#define SSP_SSSR_RFL(x) (((x) >> 12) & 0xf)/* Rx FIFO level */
-
-#define SSP_SSITR_TTFS (1U << 5)/* Test Tx FIFO service */
-#define SSP_SSITR_TRFS (1U << 6)/* Test Rx FIFO service */
-#define SSP_SSITR_TROR (1U << 7)/* Test Rx overrun */
-
-/*
- * Peripheral Bus Interface Unit
- */
-
-#define PBIU_PBCR 0x00 /* PBIU Control Register */
-#define PBIU_PBBAR0 0x08 /* PBIU Base Address Register 0 */
-#define PBIU_PBLR0 0x0c /* PBIU Limit Register 0 */
-#define PBIU_PBBAR1 0x10 /* PBIU Base Address Register 1 */
-#define PBIU_PBLR1 0x14 /* PBIU Limit Register 1 */
-#define PBIU_PBBAR2 0x18 /* PBIU Base Address Register 2 */
-#define PBIU_PBLR2 0x1c /* PBIU Limit Register 2 */
-#define PBIU_PBBAR3 0x20 /* PBIU Base Address Register 3 */
-#define PBIU_PBLR3 0x24 /* PBIU Limit Register 3 */
-#define PBIU_PBBAR4 0x28 /* PBIU Base Address Register 4 */
-#define PBIU_PBLR4 0x2c /* PBIU Limit Register 4 */
-#define PBIU_PBBAR5 0x30 /* PBIU Base Address Register 5 */
-#define PBIU_PBLR5 0x34 /* PBIU Limit Register 5 */
-#define PBIU_DSCR 0x38 /* PBIU Drive Strength Control Reg. */
-#define PBIU_MBR0 0x40 /* PBIU Memory-less Boot Reg. 0 */
-#define PBIU_MBR1 0x60 /* PBIU Memory-less Boot Reg. 1 */
-#define PBIU_MBR2 0x64 /* PBIU Memory-less Boot Reg. 2 */
-
-#define PBIU_PBCR_PBIEN (1 << 0)
-#define PBIU_PBCR_PBI100 (1 << 1)
-#define PBIU_PBCR_PBI66 (2 << 1)
-#define PBIU_PBCR_PBI33 (3 << 1)
-#define PBIU_PBCR_PBBEN (1 << 3)
-
-#define PBIU_PBARx_WIDTH8 (0 << 0)
-#define PBIU_PBARx_WIDTH16 (1 << 0)
-#define PBIU_PBARx_WIDTH32 (2 << 0)
-#define PBIU_PBARx_ADWAIT4 (0 << 2)
-#define PBIU_PBARx_ADWAIT8 (1 << 2)
-#define PBIU_PBARx_ADWAIT12 (2 << 2)
-#define PBIU_PBARx_ADWAIT16 (3 << 2)
-#define PBIU_PBARx_ADWAIT20 (4 << 2)
-#define PBIU_PBARx_RCWAIT1 (0 << 6)
-#define PBIU_PBARx_RCWAIT4 (1 << 6)
-#define PBIU_PBARx_RCWAIT8 (2 << 6)
-#define PBIU_PBARx_RCWAIT12 (3 << 6)
-#define PBIU_PBARx_RCWAIT16 (4 << 6)
-#define PBIU_PBARx_RCWAIT20 (5 << 6)
-#define PBIU_PBARx_FWE (1 << 9)
-#define PBIU_BASE_MASK 0xfffff000U
-
-#define PBIU_PBLRx_SIZE(x) (~((x) - 1))
-
-/*
- * Messaging Unit
- */
-#define MU_IMR0 0x0010 /* MU Inbound Message Register 0 */
-#define MU_IMR1 0x0014 /* MU Inbound Message Register 1 */
-#define MU_OMR0 0x0018 /* MU Outbound Message Register 0 */
-#define MU_OMR1 0x001c /* MU Outbound Message Register 1 */
-#define MU_IDR 0x0020 /* MU Inbound Doorbell Register */
-#define MU_IISR 0x0024 /* MU Inbound Interrupt Status Reg */
-#define MU_IIMR 0x0028 /* MU Inbound Interrupt Mask Reg */
-#define MU_ODR 0x002c /* MU Outbound Doorbell Register */
-#define MU_OISR 0x0030 /* MU Outbound Interrupt Status Reg */
-#define MU_OIMR 0x0034 /* MU Outbound Interrupt Mask Reg */
-#define MU_MUCR 0x0050 /* MU Configuration Register */
-#define MU_QBAR 0x0054 /* MU Queue Base Address Register */
-#define MU_IFHPR 0x0060 /* MU Inbound Free Head Pointer Reg */
-#define MU_IFTPR 0x0064 /* MU Inbound Free Tail Pointer Reg */
-#define MU_IPHPR 0x0068 /* MU Inbound Post Head Pointer Reg */
-#define MU_IPTPR 0x006c /* MU Inbound Post Tail Pointer Reg */
-#define MU_OFHPR 0x0070 /* MU Outbound Free Head Pointer Reg */
-#define MU_OFTPR 0x0074 /* MU Outbound Free Tail Pointer Reg */
-#define MU_OPHPR 0x0078 /* MU Outbound Post Head Pointer Reg */
-#define MU_OPTPR 0x007c /* MU Outbound Post Tail Pointer Reg */
-#define MU_IAR 0x0080 /* MU Index Address Register */
-
-#define MU_IIMR_IRI (1 << 6) /* Index Register Interrupt */
-#define MU_IIMR_OFQFI (1 << 5) /* Outbound Free Queue Full Int. */
-#define MU_IIMR_IPQI (1 << 4) /* Inbound Post Queue Interrupt */
-#define MU_IIMR_EDI (1 << 3) /* Error Doorbell Interrupt */
-#define MU_IIMR_IDI (1 << 2) /* Inbound Doorbell Interrupt */
-#define MU_IIMR_IM1I (1 << 1) /* Inbound Message 1 Interrupt */
-#define MU_IIMR_IM0I (1 << 0) /* Inbound Message 0 Interrupt */
-
-#endif /* _ARM_XSCALE_I80321REG_H_ */
--- sys/arm/xscale/i80321/i80321var.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/* $NetBSD: i80321var.h,v 1.8 2003/10/06 16:06:06 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/xscale/i80321/i80321var.h,v 1.2 2005/01/05 21:58:49 imp Exp $
- *
- */
-
-#ifndef _ARM_XSCALE_I80321VAR_H_
-#define _ARM_XSCALE_I80321VAR_H_
-
-#include <sys/queue.h>
-#include <dev/pci/pcivar.h>
-
-/*
- * There are roughly 32 interrupt sources.
- */
-#define NIRQ 32
-
-extern struct bus_space i80321_bs_tag;
-
-struct i80321_softc {
- device_t dev;
- bus_space_tag_t sc_st;
- bus_space_handle_t sc_sh;
- /* Handles for the various subregions. */
- bus_space_handle_t sc_atu_sh;
- bus_space_handle_t sc_mcu_sh;
- int sc_is_host;
-
- /*
- * We expect the board-specific front-end to have already mapped
- * the PCI I/O space .. it is only 64K, and I/O mappings tend to
- * be smaller than a page size, so it's generally more efficient
- * to map them all into virtual space in one fell swoop.
- */
- vm_offset_t sc_iow_vaddr; /* I/O window vaddr */
-
- /*
- * Variables that define the Inbound windows. The base address of
- * 0-2 are configured by a host via BARs. The xlate variable
- * defines the start of the local address space that it maps to.
- * The size variable defines the byte size.
- *
- * The first 3 windows are for incoming PCI memory read/write
- * cycles from a host. The 4th window, not configured by the
- * host (as it outside the normal BAR range) is the inbound
- * window for PCI devices controlled by the i80321.
- */
- struct {
- uint32_t iwin_base_hi;
- uint32_t iwin_base_lo;
- uint32_t iwin_xlate;
- uint32_t iwin_size;
- } sc_iwin[4];
-
- /*
- * Variables that define the Outbound windows.
- */
- struct {
- uint32_t owin_xlate_lo;
- uint32_t owin_xlate_hi;
- } sc_owin[2];
-
- /*
- * This is the PCI address that the Outbound I/O
- * window maps to.
- */
- uint32_t sc_ioout_xlate;
-
- /* Bus space, DMA, and PCI tags for the PCI bus (private devices). */
- struct bus_space sc_pci_iot;
- struct bus_space sc_pci_memt;
-
- /* GPIO state */
- uint8_t sc_gpio_dir; /* GPIO pin direction (1 == output) */
- uint8_t sc_gpio_val; /* GPIO output pin value */
-
-};
-void i80321_sdram_bounds(bus_space_tag_t, bus_space_handle_t,
- vm_paddr_t *, vm_size_t *);
-
-void i80321_attach(struct i80321_softc *);
-void i80321_calibrate_delay(void);
-
-void i80321_bs_init(bus_space_tag_t, void *);
-void i80321_io_bs_init(bus_space_tag_t, void *);
-void i80321_mem_bs_init(bus_space_tag_t, void *);
-
-#endif /* _ARM_XSCALE_I80321VAR_H_ */
--- sys/arm/xscale/i80321/i80321_space.c
+++ /dev/null
@@ -1,308 +0,0 @@
-/* $NetBSD: i80321_space.c,v 1.6 2003/10/06 15:43:35 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * bus_space functions for i80321 I/O Processor.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/i80321_space.c,v 1.3 2005/02/13 18:20:39 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <machine/pcb.h>
-
-#include <vm/vm.h>
-#include <vm/vm_kern.h>
-#include <vm/pmap.h>
-#include <vm/vm_page.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-
-/* Prototypes for all the bus_space structure functions */
-bs_protos(i80321);
-bs_protos(i80321_io);
-bs_protos(i80321_mem);
-bs_protos(generic);
-bs_protos(generic_armv4);
-
-/*
- * Template bus_space -- copied, and the bits that are NULL are
- * filled in.
- */
-const struct bus_space i80321_bs_tag_template = {
- /* cookie */
- (void *) 0,
-
- /* mapping/unmapping */
- NULL,
- NULL,
- i80321_bs_subregion,
-
- /* allocation/deallocation */
- NULL,
- NULL,
-
- /* barrier */
- i80321_bs_barrier,
-
- /* read (single) */
- generic_bs_r_1,
- generic_armv4_bs_r_2,
- generic_bs_r_4,
- NULL,
-
- /* read multiple */
- generic_bs_rm_1,
- generic_armv4_bs_rm_2,
- generic_bs_rm_4,
- NULL,
-
- /* read region */
- NULL,
- generic_armv4_bs_rr_2,
- generic_bs_rr_4,
- NULL,
-
- /* write (single) */
- generic_bs_w_1,
- generic_armv4_bs_w_2,
- generic_bs_w_4,
- NULL,
-
- /* write multiple */
- generic_bs_wm_1,
- generic_armv4_bs_wm_2,
- generic_bs_wm_4,
- NULL,
-
- /* write region */
- NULL,
- generic_armv4_bs_wr_2,
- generic_bs_wr_4,
- NULL,
-
- /* set multiple */
- NULL,
- NULL,
- NULL,
- NULL,
-
- /* set region */
- NULL,
- generic_armv4_bs_sr_2,
- generic_bs_sr_4,
- NULL,
-
- /* copy */
- NULL,
- generic_armv4_bs_c_2,
- NULL,
- NULL,
-};
-
-void
-i80321_bs_init(bus_space_tag_t bs, void *cookie)
-{
-
- *bs = i80321_bs_tag_template;
- bs->bs_cookie = cookie;
-}
-
-void
-i80321_io_bs_init(bus_space_tag_t bs, void *cookie)
-{
-
- *bs = i80321_bs_tag_template;
- bs->bs_cookie = cookie;
-
- bs->bs_map = i80321_io_bs_map;
- bs->bs_unmap = i80321_io_bs_unmap;
- bs->bs_alloc = i80321_io_bs_alloc;
- bs->bs_free = i80321_io_bs_free;
-
-}
-
-void
-i80321_mem_bs_init(bus_space_tag_t bs, void *cookie)
-{
-
- *bs = i80321_bs_tag_template;
- bs->bs_cookie = cookie;
-
- bs->bs_map = i80321_mem_bs_map;
- bs->bs_unmap = i80321_mem_bs_unmap;
- bs->bs_alloc = i80321_mem_bs_alloc;
- bs->bs_free = i80321_mem_bs_free;
-
-}
-
-/* *** Routines shared by i80321, PCI IO, and PCI MEM. *** */
-
-int
-i80321_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
- bus_size_t size, bus_space_handle_t *nbshp)
-{
-
- *nbshp = bsh + offset;
- return (0);
-}
-
-void
-i80321_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
- bus_size_t len, int flags)
-{
-
- /* Nothing to do. */
-}
-
-/* *** Routines for PCI IO. *** */
-
-extern struct i80321_softc *i80321_softc;
-int
-i80321_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
- bus_space_handle_t *bshp)
-{
- struct i80321_softc *sc = i80321_softc;
- vm_offset_t winvaddr;
- uint32_t busbase;
-
- if (bpa >= sc->sc_ioout_xlate &&
- bpa < (sc->sc_ioout_xlate + VERDE_OUT_XLATE_IO_WIN_SIZE)) {
- busbase = sc->sc_ioout_xlate;
- winvaddr = sc->sc_iow_vaddr;
- } else
- return (EINVAL);
-
- if ((bpa + size) >= (busbase + VERDE_OUT_XLATE_IO_WIN_SIZE))
- return (EINVAL);
-
- /*
- * Found the window -- PCI I/O space is mapped at a fixed
- * virtual address by board-specific code. Translate the
- * bus address to the virtual address.
- */
- *bshp = winvaddr + (bpa - busbase);
-
- return (0);
-}
-
-void
-i80321_io_bs_unmap(void *t, bus_size_t size)
-{
-
- /* Nothing to do. */
-}
-
-int
-i80321_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
- bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
- bus_addr_t *bpap, bus_space_handle_t *bshp)
-{
-
- panic("i80321_io_bs_alloc(): not implemented");
-}
-
-void
-i80321_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
-{
-
- panic("i80321_io_bs_free(): not implemented");
-}
-
-
-/* *** Routines for PCI MEM. *** */
-extern int badaddr_read(void *, int, void *);
-int
-i80321_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
- bus_space_handle_t *bshp)
-{
-
- vm_offset_t va;
- uint32_t busbase;
- vm_paddr_t pa, endpa, physbase;
-
- /*
- * Found the window -- PCI MEM space is not mapped by allocating
- * some kernel VA space and mapping the pages with pmap_enter().
- * pmap_enter() will map unmanaged pages as non-cacheable.
- */
- pa = trunc_page((bpa - busbase) + physbase);
- endpa = round_page(((bpa - busbase) + physbase) + size);
- pa = trunc_page(bpa);
- endpa = round_page(bpa + size);
-
- *bshp = va + (bpa & PAGE_MASK);
- *bshp = pa;
- *bshp = (vm_offset_t)pmap_mapdev(pa, endpa - pa);
-
- return (0);
-}
-
-void
-i80321_mem_bs_unmap(void *t, bus_size_t size)
-{
- vm_offset_t va, endva;
-
- va = trunc_page((vm_offset_t)t);
- endva = va + round_page(size);
-
- /* Free the kernel virtual mapping. */
- kmem_free(kernel_map, va, endva - va);
-}
-
-int
-i80321_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
- bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
- bus_addr_t *bpap, bus_space_handle_t *bshp)
-{
-
- panic("i80321_mem_bs_alloc(): not implemented");
-}
-
-void
-i80321_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
-{
-
- panic("i80321_mem_bs_free(): not implemented");
-}
--- sys/arm/xscale/i80321/i80321_pci.c
+++ /dev/null
@@ -1,475 +0,0 @@
-/* $NetBSD: i80321_pci.c,v 1.4 2003/07/15 00:24:54 lukem Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * PCI configuration support for i80321 I/O Processor chip.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/i80321_pci.c,v 1.4.2.1 2006/02/27 01:12:16 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/malloc.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/rman.h>
-
-#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/pcb.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-#include <machine/pmap.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-#include <arm/xscale/i80321/i80321_intr.h>
-
-#include <dev/pci/pcib_private.h>
-#include "pcib_if.h"
-
-#include <dev/pci/pcireg.h>
-extern struct i80321_softc *i80321_softc;
-
-struct i80321_pci_softc {
- device_t sc_dev;
- bus_space_tag_t sc_st;
- bus_space_handle_t sc_atu_sh;
- bus_space_tag_t sc_pciio;
- bus_space_tag_t sc_pcimem;
- int sc_busno;
- struct rman sc_mem_rman;
- struct rman sc_io_rman;
- struct rman sc_irq_rman;
- uint32_t sc_mem;
- uint32_t sc_io;
-};
-
-static int
-i80321_pci_probe(device_t dev)
-{
- device_set_desc(dev, "i80321 PCI bus");
- return (0);
-}
-
-static int
-i80321_pci_attach(device_t dev)
-{
-
- uint32_t busno;
- struct i80321_pci_softc *sc = device_get_softc(dev);
-
- sc->sc_st = i80321_softc->sc_st;
- sc->sc_atu_sh = i80321_softc->sc_atu_sh;
- busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
- busno = PCIXSR_BUSNO(busno);
- if (busno == 0xff)
- busno = 0;
- sc->sc_dev = dev;
- sc->sc_busno = busno;
- sc->sc_pciio = &i80321_softc->sc_pci_iot;
- sc->sc_pcimem = &i80321_softc->sc_pci_memt;
- sc->sc_mem = i80321_softc->sc_owin[0].owin_xlate_lo +
- VERDE_OUT_XLATE_MEM_WIN_SIZE;
-
- sc->sc_io = i80321_softc->sc_iow_vaddr;
- /* Initialize memory and i/o rmans. */
- sc->sc_io_rman.rm_type = RMAN_ARRAY;
- sc->sc_io_rman.rm_descr = "I80321 PCI I/O Ports";
- if (rman_init(&sc->sc_io_rman) != 0 ||
- rman_manage_region(&sc->sc_io_rman,
- sc->sc_io,
- sc->sc_io +
- VERDE_OUT_XLATE_IO_WIN_SIZE) != 0) {
- panic("i80321_pci_probe: failed to set up I/O rman");
- }
- sc->sc_mem_rman.rm_type = RMAN_ARRAY;
- sc->sc_mem_rman.rm_descr = "I80321 PCI Memory";
- if (rman_init(&sc->sc_mem_rman) != 0 ||
- rman_manage_region(&sc->sc_mem_rman,
- 0, VERDE_OUT_XLATE_MEM_WIN_SIZE) != 0) {
- panic("i80321_pci_probe: failed to set up memory rman");
- }
- sc->sc_irq_rman.rm_type = RMAN_ARRAY;
- sc->sc_irq_rman.rm_descr = "i80321 PCI IRQs";
- if (rman_init(&sc->sc_irq_rman) != 0 ||
- rman_manage_region(&sc->sc_irq_rman, 26, 32) != 0)
- panic("i80321_pci_probe: failed to set up IRQ rman");
- device_add_child(dev, "pci",busno);
- return (bus_generic_attach(dev));
-}
-
-static int
-i80321_pci_maxslots(device_t dev)
-{
- return (PCI_SLOTMAX);
-}
-
-
-
-static int
-i80321_pci_conf_setup(struct i80321_pci_softc *sc, int bus, int slot, int func,
- int reg, uint32_t *addr)
-{
- uint32_t busno;
-
- busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
- busno = PCIXSR_BUSNO(busno);
- if (busno == 0xff)
- busno = 0;
-
- /*
- * If the bus # is the same as our own, then use Type 0 cycles,
- * else use Type 1.
- *
- * XXX We should filter out all non-private devices here!
- * XXX How does private space interact with PCI-PCI bridges?
- */
- if (bus == busno) {
- if (slot > (31 - 16))
- return (1);
- /*
- * NOTE: PCI-X requires that that devices updated their
- * PCIXSR on every config write with the device number
- * specified in AD[15:11]. If we don't set this field,
- * each device could end of thinking it is at device 0,
- * which can cause a number of problems. Doing this
- * unconditionally should be OK when only PCI devices
- * are present.
- */
- bus &= 0xff;
- slot &= 0x1f;
- func &= 0x07;
-
- *addr = (1U << (slot + 16)) |
- (slot << 11) | (func << 8) | reg;
- } else {
- *addr = (bus << 16) | (slot << 11) | (func << 8) | reg | 1;
- }
-
- return (0);
-}
-
-static u_int32_t
-i80321_pci_read_config(device_t dev, int bus, int slot, int func, int reg,
- int bytes)
-{
- struct i80321_pci_softc *sc = device_get_softc(dev);
- uint32_t isr;
- uint32_t addr;
- u_int32_t ret = 0;
- vm_offset_t va;
- int err = 0;
- if (i80321_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr))
- return (-1);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_OCCAR,
- addr/* & ~3*/);
-
- va = sc->sc_atu_sh;
- switch (bytes) {
- case 1:
- err = badaddr_read((void*)(va + ATU_OCCDR + (reg & 3)), 1, &ret);
- break;
- case 2:
- err = badaddr_read((void*)(va + ATU_OCCDR + (reg & 3)), 2, &ret);
- break;
- case 4:
- err = badaddr_read((void *)(va + ATU_OCCDR), 4, &ret);
- break;
- default:
- printf("i803218_read_config: invalid size %d\n", bytes);
- ret = -1;
- }
- if (err) {
-
- isr = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_ATUISR);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_ATUISR,
- isr & (ATUISR_P_SERR_DET|ATUISR_PMA|ATUISR_PTAM|
- ATUISR_PTAT|ATUISR_PMPE));
- return (-1);
- }
- return (ret);
-}
-
-static void
-i80321_pci_write_config(device_t dev, int bus, int slot, int func, int reg,
- u_int32_t data, int bytes)
-{
- struct i80321_pci_softc *sc = device_get_softc(dev);
- uint32_t addr;
-
- if (i80321_pci_conf_setup(sc, bus, slot, func, reg & ~3, &addr))
- return;
-
-
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_OCCAR,
- addr);
- switch (bytes) {
- case 1:
- bus_space_write_1(sc->sc_st, sc->sc_atu_sh, ATU_OCCDR +
- (reg & 3), data);
- break;
- case 2:
- bus_space_write_2(sc->sc_st, sc->sc_atu_sh, ATU_OCCDR +
- (reg & 3), data);
- break;
- case 4:
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_OCCDR, data);
- break;
- default:
- printf("i80321_pci_write_config: Invalid size : %d\n", bytes);
- }
-
-}
-
-static int
-i80321_pci_route_interrupt(device_t pcib, device_t dev, int pin)
-{
- int bus;
- int device;
- int func;
- uint32_t busno;
- struct i80321_pci_softc *sc = device_get_softc(pcib);
- bus = pci_get_bus(dev);
- device = pci_get_slot(dev);
- func = pci_get_function(dev);
- busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
- busno = PCIXSR_BUSNO(busno);
- if (busno == 0xff)
- busno = 0;
- if (bus != busno)
- goto no_mapping;
- switch (device) {
- /* IQ31244 PCI */
- case 1: /* PCIX-PCIX bridge */
- /*
- * The S-ATA chips are behind the bridge, and all of
- * the S-ATA interrupts are wired together.
- */
- return (ICU_INT_XINT(2));
- case 2: /* PCI slot */
- /* All pins are wired together. */
- return (ICU_INT_XINT(3));
- case 3: /* i82546 dual Gig-E */
- if (pin == 1 || pin == 2)
- return (ICU_INT_XINT(0));
- goto no_mapping;
- /* IQ80321 PCI */
- case 4: /* i82544 Gig-E */
- case 8: /*
- * Apparently you can set the device for the ethernet adapter
- * to 8 with a jumper, so handle that as well
- */
- if (pin == 1)
- return (ICU_INT_XINT(0));
- goto no_mapping;
- case 6: /* S-PCI-X slot */
- if (pin == 1)
- return (ICU_INT_XINT(2));
- if (pin == 2)
- return (ICU_INT_XINT(3));
- goto no_mapping;
- default:
-no_mapping:
- printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
-
- }
- return (0);
-
-}
-
-static int
-i80321_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
-{
- struct i80321_pci_softc *sc = device_get_softc(dev);
- switch (which) {
- case PCIB_IVAR_BUS:
-
- *result = sc->sc_busno;
- return (0);
-
- }
- return (ENOENT);
-}
-
-static int
-i80321_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
-{
- struct i80321_pci_softc * sc = device_get_softc(dev);
-
- switch (which) {
- case PCIB_IVAR_BUS:
- sc->sc_busno = result;
- return (0);
- }
- return (ENOENT);
-}
-
-static struct resource *
-i80321_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- struct i80321_pci_softc *sc = device_get_softc(bus);
- struct resource *rv;
- struct rman *rm;
- bus_space_tag_t bt = NULL;
- bus_space_handle_t bh = 0;
-
- if (type == SYS_RES_IRQ) {
- rv = malloc(sizeof(*rv), M_DEVBUF, M_WAITOK);
- rv->r_start = start;
- rv->r_end = end;
- rv->r_rid = *rid;
- return (rv);
- }
- switch (type) {
- case SYS_RES_IRQ:
- rm = &sc->sc_mem_rman;
- break;
- case SYS_RES_MEMORY:
- rm = &sc->sc_mem_rman;
- bt = sc->sc_pcimem;
- bh = (start >= 0x80000000 && start < 0x84000000) ? 0x80000000 :
- sc->sc_mem;
- start &= (0x1000000 - 1);
- end &= (0x1000000 - 1);
- break;
- case SYS_RES_IOPORT:
- rm = &sc->sc_io_rman;
- bt = sc->sc_pciio;
- bh = sc->sc_io;
- if (start < sc->sc_io) {
- start = start - 0x90000000 + sc->sc_io;
- end = end - 0x90000000 + sc->sc_io;
- }
- break;
- default:
- return (NULL);
- }
-
- rv = rman_reserve_resource(rm, start, end, count, flags, child);
- if (rv == NULL)
- return (NULL);
- if (type != SYS_RES_IRQ) {
- bh += (rman_get_start(rv));
- rman_set_bustag(rv, bt);
- rman_set_bushandle(rv, bh);
- if (flags & RF_ACTIVE) {
- if (bus_activate_resource(child, type, *rid, rv)) {
- rman_release_resource(rv);
- return (NULL);
- }
- }
- }
- return (rv);
-}
-
-static int
-i80321_pci_activate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- u_long p;
- int error;
-
- if (type == SYS_RES_MEMORY) {
- error = bus_space_map(rman_get_bustag(r),
- rman_get_bushandle(r), rman_get_size(r), 0, &p);
- if (error)
- return (error);
- rman_set_bushandle(r, p);
-
- }
- return (rman_activate_resource(r));
-}
-
-static int
-i80321_pci_setup_intr(device_t dev, device_t child,
- struct resource *ires, int flags, driver_intr_t *intr, void *arg,
- void **cookiep)
-{
- return (BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
- intr, arg, cookiep));
-}
-
-static int
-i80321_pci_teardown_intr(device_t dev, device_t child, struct resource *res,
- void *cookie)
-{
- return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
-}
-
-static device_method_t i80321_pci_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, i80321_pci_probe),
- DEVMETHOD(device_attach, i80321_pci_attach),
- DEVMETHOD(device_shutdown, bus_generic_shutdown),
- DEVMETHOD(device_suspend, bus_generic_suspend),
- DEVMETHOD(device_resume, bus_generic_resume),
-
- /* Bus interface */
- DEVMETHOD(bus_print_child, bus_generic_print_child),
- DEVMETHOD(bus_read_ivar, i80321_read_ivar),
- DEVMETHOD(bus_write_ivar, i80321_write_ivar),
- DEVMETHOD(bus_alloc_resource, i80321_pci_alloc_resource),
- DEVMETHOD(bus_release_resource, bus_generic_release_resource),
- DEVMETHOD(bus_activate_resource, i80321_pci_activate_resource),
- DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
- DEVMETHOD(bus_setup_intr, i80321_pci_setup_intr),
- DEVMETHOD(bus_teardown_intr, i80321_pci_teardown_intr),
-
- /* pcib interface */
- DEVMETHOD(pcib_maxslots, i80321_pci_maxslots),
- DEVMETHOD(pcib_read_config, i80321_pci_read_config),
- DEVMETHOD(pcib_write_config, i80321_pci_write_config),
- DEVMETHOD(pcib_route_interrupt, i80321_pci_route_interrupt),
-
- {0, 0}
-};
-
-static driver_t i80321_pci_driver = {
- "pcib",
- i80321_pci_methods,
- sizeof(struct i80321_pci_softc),
-};
-
-static devclass_t i80321_pci_devclass;
-
-DRIVER_MODULE(ipci, iq, i80321_pci_driver, i80321_pci_devclass, 0, 0);
--- sys/arm/xscale/i80321/std.iq31244
+++ /dev/null
@@ -1,6 +0,0 @@
-#IQ31244 board configuration
-#$FreeBSD: src/sys/arm/xscale/i80321/std.iq31244,v 1.2 2004/11/18 00:05:09 cognet Exp $
-include "../xscale/i80321/std.i80321"
-files "../xscale/i80321/files.iq31244"
-makeoptions KERNPHYSADDR=0xa0200000
-makeoptions KERNVIRTADDR=0xc0200000
--- sys/arm/xscale/i80321/iq80321var.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* $NetBSD: iq80321var.h,v 1.1 2002/03/27 21:51:30 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/xscale/i80321/iq80321var.h,v 1.2 2005/01/05 21:58:49 imp Exp $
- *
- */
-
-#ifndef _IQ80321_IQ80321VAR_H_
-#define _IQ80321_IQ80321VAR_H_
-
-#include <dev/pci/pcivar.h>
-
-void iq80321_7seg(char, char);
-void iq80321_7seg_snake(void);
-
-#if 0
-void iq80321_pci_init(pci_chipset_tag_t, void *);
-#endif
-
-#endif /* _IQ80321_IQ80321VAR_H_ */
--- sys/arm/xscale/i80321/i80321_timer.c
+++ /dev/null
@@ -1,397 +0,0 @@
-/* $NetBSD: i80321_timer.c,v 1.7 2003/07/27 04:52:28 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Timer/clock support for the Intel i80321 I/O processor.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/i80321_timer.c,v 1.5 2005/02/13 18:05:36 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/time.h>
-#include <sys/bus.h>
-#include <sys/resource.h>
-#include <sys/rman.h>
-#include <sys/timetc.h>
-
-#include <machine/bus.h>
-#include <machine/cpufunc.h>
-#include <machine/resource.h>
-#include <machine/intr.h>
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-
-#include <arm/xscale/xscalevar.h>
-
-void (*i80321_hardclock_hook)(void) = NULL;
-struct i80321_timer_softc {
- device_t dev;
-} timer_softc;
-
-
-static unsigned i80321_timer_get_timecount(struct timecounter *tc);
-
-
-static uint32_t counts_per_hz;
-
-static uint32_t offset = 0;
-static int32_t last = -1;
-static int ticked = 0;
-
-#define COUNTS_PER_SEC 200000000 /* 200MHz */
-#define COUNTS_PER_USEC (COUNTS_PER_SEC / 1000000)
-
-static struct timecounter i80321_timer_timecounter = {
- i80321_timer_get_timecount, /* get_timecount */
- NULL, /* no poll_pps */
- ~0u, /* counter_mask */
- COUNTS_PER_SEC, /* frequency */
- "i80321 timer", /* name */
- 1000 /* quality */
-};
-
-static int
-i80321_timer_probe(device_t dev)
-{
-
- device_set_desc(dev, "i80321 timer");
- return (0);
-}
-
-static int
-i80321_timer_attach(device_t dev)
-{
- timer_softc.dev = dev;
-
- return (0);
-}
-
-static device_method_t i80321_timer_methods[] = {
- DEVMETHOD(device_probe, i80321_timer_probe),
- DEVMETHOD(device_attach, i80321_timer_attach),
- {0, 0},
-};
-
-static driver_t i80321_timer_driver = {
- "itimer",
- i80321_timer_methods,
- sizeof(struct i80321_timer_softc),
-};
-static devclass_t i80321_timer_devclass;
-
-DRIVER_MODULE(itimer, iq, i80321_timer_driver, i80321_timer_devclass, 0, 0);
-
-void counterhandler(void *);
-void clockhandler(void *);
-
-
-static __inline uint32_t
-tmr1_read(void)
-{
- uint32_t rv;
-
- __asm __volatile("mrc p6, 0, %0, c1, c1, 0"
- : "=r" (rv));
- return (rv);
-}
-
-static __inline void
-tmr1_write(uint32_t val)
-{
-
- __asm __volatile("mcr p6, 0, %0, c1, c1, 0"
- :
- : "r" (val));
-}
-
-static __inline uint32_t
-tcr1_read(void)
-{
- uint32_t rv;
-
- __asm __volatile("mrc p6, 0, %0, c3, c1, 0"
- : "=r" (rv));
- return (rv);
-}
-static __inline void
-tcr1_write(uint32_t val)
-{
-
- __asm __volatile("mcr p6, 0, %0, c3, c1, 0"
- :
- : "r" (val));
-}
-
-static __inline void
-trr1_write(uint32_t val)
-{
-
- __asm __volatile("mcr p6, 1, %0, c5, c1, 0"
- :
- : "r" (val));
-}
-
-static __inline uint32_t
-tmr0_read(void)
-{
- uint32_t rv;
-
- __asm __volatile("mrc p6, 0, %0, c0, c1, 0"
- : "=r" (rv));
- return (rv);
-}
-
-static __inline void
-tmr0_write(uint32_t val)
-{
-
- __asm __volatile("mcr p6, 0, %0, c0, c1, 0"
- :
- : "r" (val));
-}
-
-static __inline uint32_t
-tcr0_read(void)
-{
- uint32_t rv;
-
- __asm __volatile("mrc p6, 0, %0, c2, c1, 0"
- : "=r" (rv));
- return (rv);
-}
-static __inline void
-tcr0_write(uint32_t val)
-{
-
- __asm __volatile("mcr p6, 0, %0, c2, c1, 0"
- :
- : "r" (val));
-}
-
-static __inline void
-trr0_write(uint32_t val)
-{
-
- __asm __volatile("mcr p6, 0, %0, c4, c1, 0"
- :
- : "r" (val));
-}
-
-static __inline void
-tisr_write(uint32_t val)
-{
-
- __asm __volatile("mcr p6, 0, %0, c6, c1, 0"
- :
- : "r" (val));
-}
-
-static __inline uint32_t
-tisr_read(void)
-{
- int ret;
-
- __asm __volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (ret));
- return (ret);
-}
-
-static unsigned
-i80321_timer_get_timecount(struct timecounter *tc)
-{
- int32_t cur = tcr0_read();
-
- if (cur > last && last != -1) {
- offset += counts_per_hz;
- if (ticked > 0)
- ticked--;
- }
- if (ticked) {
- offset += ticked * counts_per_hz;
- ticked = 0;
- }
- last = cur;
- return (counts_per_hz - cur + offset);
-}
-/*
- * i80321_calibrate_delay:
- *
- * Calibrate the delay loop.
- */
-void
-i80321_calibrate_delay(void)
-{
-
- /*
- * Just use hz=100 for now -- we'll adjust it, if necessary,
- * in cpu_initclocks().
- */
- counts_per_hz = COUNTS_PER_SEC / 100;
-
- tmr0_write(0); /* stop timer */
- tisr_write(TISR_TMR0); /* clear interrupt */
- trr0_write(counts_per_hz); /* reload value */
- tcr0_write(counts_per_hz); /* current value */
-
- tmr0_write(TMRx_ENABLE|TMRx_RELOAD|TMRx_CSEL_CORE);
-}
-
-/*
- * cpu_initclocks:
- *
- * Initialize the clock and get them going.
- */
-void
-cpu_initclocks(void)
-{
- u_int oldirqstate;
- struct resource *irq;
- int rid = 0;
- void *ihl;
- device_t dev = timer_softc.dev;
-
- if (hz < 50 || COUNTS_PER_SEC % hz) {
- printf("Cannot get %d Hz clock; using 100 Hz\n", hz);
- hz = 100;
- }
- tick = 1000000 / hz; /* number of microseconds between interrupts */
-
- /*
- * We only have one timer available; stathz and profhz are
- * always left as 0 (the upper-layer clock code deals with
- * this situation).
- */
- if (stathz != 0)
- printf("Cannot get %d Hz statclock\n", stathz);
- stathz = 0;
-
- if (profhz != 0)
- printf("Cannot get %d Hz profclock\n", profhz);
- profhz = 0;
-
- /* Report the clock frequency. */
-
- oldirqstate = disable_interrupts(I32_bit);
-
- irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, ICU_INT_TMR0,
- ICU_INT_TMR0, 1, RF_ACTIVE);
- if (!irq)
- panic("Unable to setup the clock irq handler.\n");
- else
- bus_setup_intr(dev, irq, INTR_TYPE_CLK | INTR_FAST,
- clockhandler, NULL, &ihl);
- tmr0_write(0); /* stop timer */
- tisr_write(TISR_TMR0); /* clear interrupt */
-
- counts_per_hz = COUNTS_PER_SEC / hz;
-
- trr0_write(counts_per_hz); /* reload value */
- tcr0_write(counts_per_hz); /* current value */
- tmr0_write(TMRx_ENABLE|TMRx_RELOAD|TMRx_CSEL_CORE);
-
- tc_init(&i80321_timer_timecounter);
- restore_interrupts(oldirqstate);
-}
-
-
-/*
- * DELAY:
- *
- * Delay for at least N microseconds.
- */
-void
-DELAY(int n)
-{
- uint32_t cur, last, delta, usecs;
-
- /*
- * This works by polling the timer and counting the
- * number of microseconds that go by.
- */
- last = tcr0_read();
- delta = usecs = 0;
-
- while (n > usecs) {
- cur = tcr0_read();
-
- /* Check to see if the timer has wrapped around. */
- if (last < cur)
- delta += (last + (counts_per_hz - cur));
- else
- delta += (last - cur);
-
- last = cur;
-
- if (delta >= COUNTS_PER_USEC) {
- usecs += delta / COUNTS_PER_USEC;
- delta %= COUNTS_PER_USEC;
- }
- }
-}
-
-/*
- * clockhandler:
- *
- * Handle the hardclock interrupt.
- */
-void
-clockhandler(void *arg)
-{
- struct clockframe *frame = arg;
-
- ticked++;
- tisr_write(TISR_TMR0);
- hardclock(frame);
-
- if (i80321_hardclock_hook != NULL)
- (*i80321_hardclock_hook)();
- return;
-}
-
-void
-cpu_startprofclock(void)
-{
-}
-
-void
-cpu_stopprofclock(void)
-{
-
-}
--- sys/arm/xscale/i80321/i80321.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/* $NetBSD: i80321.c,v 1.15 2003/10/06 16:06:05 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Autoconfiguration support for the Intel i80321 I/O Processor.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/i80321.c,v 1.5 2005/06/09 12:26:20 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-
-#define _ARM32_BUS_DMA_PRIVATE
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-#include <arm/xscale/i80321/i80321_intr.h>
-
-#include <dev/pci/pcireg.h>
-
-volatile uint32_t intr_enabled;
-uint32_t intr_steer = 0;
-/*
- * Statically-allocated bus_space stucture used to access the
- * i80321's own registers.
- */
-struct bus_space i80321_bs_tag;
-
-/*
- * There can be only one i80321, so we keep a global pointer to
- * the softc, so board-specific code can use features of the
- * i80321 without having to have a handle on the softc itself.
- */
-struct i80321_softc *i80321_softc;
-
-/* Built-in devices. */
-static const struct iopxs_device {
- const char *id_name;
- bus_addr_t id_offset;
- bus_size_t id_size;
-} iopxs_devices[] = {
- { "iopaau", VERDE_AAU_BASE, VERDE_AAU_SIZE },
-/* { "iopdma", VERDE_DMA_BASE0, VERDE_DMA_CHSIZE }, */
-/* { "iopdma", VERDE_DMA_BASE1, VERDE_DMA_CHSIZE }, */
- { "iopiic", VERDE_I2C_BASE0, VERDE_I2C_CHSIZE },
- { "iopiic", VERDE_I2C_BASE1, VERDE_I2C_CHSIZE },
-/* { "iopssp", VERDE_SSP_BASE, VERDE_SSP_SIZE }, */
- { "iopmu", VERDE_MU_BASE, VERDE_MU_SIZE },
- { "iopwdog", 0, 0 },
- { NULL, 0, 0 }
-};
-
-#define PCI_MAPREG_MEM_ADDR(x) ((x) & 0xfffffff0)
-/*
- * i80321_attach:
- *
- * Board-independent attach routine for the i80321.
- */
-void
-i80321_attach(struct i80321_softc *sc)
-{
-
- i80321_softc = sc;
- uint32_t preg;
-
- /* We expect the Memory Controller to be already sliced off. */
-
- /*
- * Program the Inbound windows.
- */
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IALR0,
- (0xffffffff - (sc->sc_iwin[0].iwin_size - 1)) & 0xffffffc0);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IATVR0,
- sc->sc_iwin[0].iwin_xlate);
- if (sc->sc_is_host) {
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_BARS, sc->sc_iwin[0].iwin_base_lo);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_BARS + 0x04, sc->sc_iwin[0].iwin_base_hi);
- } else {
- sc->sc_iwin[0].iwin_base_lo = bus_space_read_4(sc->sc_st,
- sc->sc_atu_sh, PCIR_BARS);
- sc->sc_iwin[0].iwin_base_hi = bus_space_read_4(sc->sc_st,
- sc->sc_atu_sh, PCIR_BARS + 0x04);
- sc->sc_iwin[0].iwin_base_lo =
- PCI_MAPREG_MEM_ADDR(sc->sc_iwin[0].iwin_base_lo);
- }
-
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IALR1,
- (0xffffffff - (sc->sc_iwin[1].iwin_size - 1)) & 0xffffffc0);
-
- /* no xlate for window 1 */
- if (sc->sc_is_host) {
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_BARS + 0x08, sc->sc_iwin[1].iwin_base_lo);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_BARS + 0x0c, sc->sc_iwin[1].iwin_base_hi);
- } else {
- sc->sc_iwin[1].iwin_base_lo = bus_space_read_4(sc->sc_st,
- sc->sc_atu_sh, PCIR_BARS + 0x08);
- sc->sc_iwin[1].iwin_base_hi = bus_space_read_4(sc->sc_st,
- sc->sc_atu_sh, PCIR_BARS + 0x0c);
- sc->sc_iwin[1].iwin_base_lo =
- PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo);
- }
-
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IALR2,
- (0xffffffff - (sc->sc_iwin[2].iwin_size - 1)) & 0xffffffc0);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IATVR2,
- sc->sc_iwin[2].iwin_xlate);
-
- if (sc->sc_is_host) {
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_BARS + 0x10, sc->sc_iwin[2].iwin_base_lo);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_BARS + 0x14, sc->sc_iwin[2].iwin_base_hi);
- } else {
- sc->sc_iwin[2].iwin_base_lo = bus_space_read_4(sc->sc_st,
- sc->sc_atu_sh, PCIR_BARS + 0x10);
- sc->sc_iwin[2].iwin_base_hi = bus_space_read_4(sc->sc_st,
- sc->sc_atu_sh, PCIR_BARS + 0x14);
- sc->sc_iwin[2].iwin_base_lo =
- PCI_MAPREG_MEM_ADDR(sc->sc_iwin[2].iwin_base_lo);
- }
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IALR3,
- (0xffffffff - (sc->sc_iwin[3].iwin_size - 1)) & 0xffffffc0);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IATVR3,
- sc->sc_iwin[3].iwin_xlate);
-
- if (sc->sc_is_host) {
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- ATU_IABAR3, sc->sc_iwin[3].iwin_base_lo);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- ATU_IAUBAR3, sc->sc_iwin[3].iwin_base_hi);
- } else {
- sc->sc_iwin[3].iwin_base_lo = bus_space_read_4(sc->sc_st,
- sc->sc_atu_sh, ATU_IABAR3);
- sc->sc_iwin[3].iwin_base_hi = bus_space_read_4(sc->sc_st,
- sc->sc_atu_sh, ATU_IAUBAR3);
- sc->sc_iwin[3].iwin_base_lo =
- PCI_MAPREG_MEM_ADDR(sc->sc_iwin[3].iwin_base_lo);
- }
- /*
- * Mask (disable) the ATU interrupt sources.
- * XXX May want to revisit this if we encounter
- * XXX an application that wants it.
- */
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- ATU_ATUIMR,
- ATUIMR_IMW1BU|ATUIMR_ISCEM|ATUIMR_RSCEM|ATUIMR_PST|
- ATUIMR_DPE|ATUIMR_P_SERR_ASRT|ATUIMR_PMA|ATUIMR_PTAM|
- ATUIMR_PTAT|ATUIMR_PMPE);
-
- /*
- * Program the outbound windows.
- */
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- ATU_OIOWTVR, sc->sc_ioout_xlate);
-
- if (!sc->sc_is_host) {
- sc->sc_owin[0].owin_xlate_lo = sc->sc_iwin[1].iwin_base_lo;
- sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi;
- }
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- ATU_OMWTVR0, sc->sc_owin[0].owin_xlate_lo);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- ATU_OUMWTVR0, sc->sc_owin[0].owin_xlate_hi);
-
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- ATU_OMWTVR1, sc->sc_owin[1].owin_xlate_lo);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- ATU_OUMWTVR1, sc->sc_owin[1].owin_xlate_hi);
-
- /*
- * Set up the ATU configuration register. All we do
- * right now is enable Outbound Windows.
- */
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_ATUCR,
- ATUCR_OUT_EN);
-
- /*
- * Enable bus mastering, memory access, SERR, and parity
- * checking on the ATU.
- */
- if (sc->sc_is_host) {
- preg = bus_space_read_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_COMMAND);
- preg |= PCIM_CMD_MEMEN |
- PCIM_CMD_BUSMASTEREN | PCIM_CMD_PERRESPEN |
- PCIM_CMD_SERRESPEN;
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_COMMAND, preg);
- preg = bus_space_read_4(sc->sc_st, sc->sc_atu_sh,
- PCIR_COMMAND);
- }
- /* Initialize the bus space tags. */
- i80321_io_bs_init(&sc->sc_pci_iot, sc);
- i80321_mem_bs_init(&sc->sc_pci_memt, sc);
- intr_enabled = 0;
- i80321_set_intrmask();
- i80321_set_intrsteer();
-}
-
-
-static __inline uint32_t
-i80321_iintsrc_read(void)
-{
- uint32_t iintsrc;
-
- __asm __volatile("mrc p6, 0, %0, c8, c0, 0"
- : "=r" (iintsrc));
-
- /*
- * The IINTSRC register shows bits that are active even
- * if they are masked in INTCTL, so we have to mask them
- * off with the interrupts we consider enabled.
- */
- return (iintsrc & intr_enabled);
-}
-
-int
-arm_get_next_irq()
-{
- int irq;
-
- if ((irq = i80321_iintsrc_read()))
- return (ffs(irq) - 1);
- return (-1);
-}
--- sys/arm/xscale/i80321/iq80321.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/* $NetBSD: i80321_mainbus.c,v 1.13 2003/12/17 22:03:24 abs Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * IQ80321 front-end for the i80321 I/O Processor. We take care
- * of setting up the i80321 memory map, PCI interrupt routing, etc.,
- * which are all specific to the board the i80321 is wired up to.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/iq80321.c,v 1.8 2005/06/09 12:26:20 cognet Exp $");
-
-#define _ARM32_BUS_DMA_PRIVATE
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/malloc.h>
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/rman.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-#include <arm/xscale/i80321/iq80321reg.h>
-#include <arm/xscale/i80321/iq80321var.h>
-#include <arm/xscale/i80321/i80321_intr.h>
-
-#include <dev/pci/pcireg.h>
-
-
-int iq80321_probe(device_t);
-void iq80321_identify(driver_t *, device_t);
-int iq80321_attach(device_t);
-
-int
-iq80321_probe(device_t dev)
-{
- device_set_desc(dev, "Intel 80321");
- return (0);
-}
-
-void
-iq80321_identify(driver_t *driver, device_t parent)
-{
-
- BUS_ADD_CHILD(parent, 0, "iq", 0);
-}
-
-static struct arm32_dma_range i80321_dr;
-static int dma_range_init = 0;
-
-struct arm32_dma_range *
-bus_dma_get_range(void)
-{
- if (dma_range_init == 0)
- return (NULL);
- return (&i80321_dr);
-}
-
-int
-bus_dma_get_range_nb(void)
-{
- if (dma_range_init == 0)
- return (0);
- return (1);
-}
-
-#define PCI_MAPREG_MEM_PREFETCHABLE_MASK 0x00000008
-#define PCI_MAPREG_MEM_TYPE_64BIT 0x00000004
-
-int
-iq80321_attach(device_t dev)
-{
- struct i80321_softc *sc = device_get_softc(dev);
- int b0u, b0l, b1u, b1l;
- vm_paddr_t memstart = 0;
- vm_size_t memsize = 0;
- int busno;
-
- /*
- * Fill in the space tag for the i80321's own devices,
- * and hand-craft the space handle for it (the device
- * was mapped during early bootstrap).
- */
- i80321_bs_init(&i80321_bs_tag, sc);
- sc->sc_st = &i80321_bs_tag;
- sc->sc_sh = IQ80321_80321_VBASE;
- sc->dev = dev;
- sc->sc_is_host = 1;
-
- /*
- * Slice off a subregion for the Memory Controller -- we need it
- * here in order read the memory size.
- */
- if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_MCU_BASE,
- VERDE_MCU_SIZE, &sc->sc_mcu_sh))
- panic("%s: unable to subregion MCU registers",
- device_get_name(dev));
-
- if (bus_space_subregion(sc->sc_st, sc->sc_sh, VERDE_ATU_BASE,
- VERDE_ATU_SIZE, &sc->sc_atu_sh))
- panic("%s: unable to subregion ATU registers",
- device_get_name(dev));
-
- /*
- * We have mapped the the PCI I/O windows in the early
- * bootstrap phase.
- */
- sc->sc_iow_vaddr = IQ80321_IOW_VBASE;
-
- /*
- * Check the configuration of the ATU to see if another BIOS
- * has configured us. If a PC BIOS didn't configure us, then:
- * IQ80321: BAR0 00000000.0000000c BAR1 is 00000000.8000000c.
- * IQ31244: BAR0 00000000.00000004 BAR1 is 00000000.0000000c.
- * If a BIOS has configured us, at least one of those should be
- * different. This is pretty fragile, but it's not clear what
- * would work better.
- */
- b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCIR_BARS+0x0);
- b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCIR_BARS+0x4);
- b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCIR_BARS+0x8);
- b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCIR_BARS+0xc);
-#define PCI_MAPREG_MEM_ADDR_MASK 0xfffffff0
- b0l &= PCI_MAPREG_MEM_ADDR_MASK;
- b0u &= PCI_MAPREG_MEM_ADDR_MASK;
- b1l &= PCI_MAPREG_MEM_ADDR_MASK;
- b1u &= PCI_MAPREG_MEM_ADDR_MASK;
-
- if ((b0u != b1u) || (b0l != 0) || ((b1l & ~0x80000000U) != 0))
- sc->sc_is_host = 0;
- else
- sc->sc_is_host = 1;
- i80321_sdram_bounds(sc->sc_st, sc->sc_mcu_sh, &memstart, &memsize);
- /*
- * We set up the Inbound Windows as follows:
- *
- * 0 Access to i80321 PMMRs
- *
- * 1 Reserve space for private devices
- *
- * 2 RAM access
- *
- * 3 Unused.
- *
- * This chunk needs to be customized for each IOP321 application.
- */
-#if 0
- sc->sc_iwin[0].iwin_base_lo = VERDE_PMMR_BASE;
- sc->sc_iwin[0].iwin_base_hi = 0;
- sc->sc_iwin[0].iwin_xlate = VERDE_PMMR_BASE;
- sc->sc_iwin[0].iwin_size = VERDE_PMMR_SIZE;
-#endif
- if (sc->sc_is_host) {
-
- /* Map PCI:Local 1:1. */
- sc->sc_iwin[1].iwin_base_lo = VERDE_OUT_XLATE_MEM_WIN0_BASE |
- PCI_MAPREG_MEM_PREFETCHABLE_MASK |
- PCI_MAPREG_MEM_TYPE_64BIT;
- sc->sc_iwin[1].iwin_base_hi = 0;
- } else {
-
- sc->sc_iwin[1].iwin_base_lo = 0;
- sc->sc_iwin[1].iwin_base_hi = 0;
- }
- sc->sc_iwin[1].iwin_xlate = VERDE_OUT_XLATE_MEM_WIN0_BASE;
- sc->sc_iwin[1].iwin_size = VERDE_OUT_XLATE_MEM_WIN_SIZE;
-
- if (sc->sc_is_host) {
- sc->sc_iwin[2].iwin_base_lo = memstart |
- PCI_MAPREG_MEM_PREFETCHABLE_MASK |
- PCI_MAPREG_MEM_TYPE_64BIT;
- sc->sc_iwin[2].iwin_base_hi = 0;
- } else {
- sc->sc_iwin[2].iwin_base_lo = 0;
- sc->sc_iwin[2].iwin_base_hi = 0;
- }
- sc->sc_iwin[2].iwin_xlate = memstart;
- sc->sc_iwin[2].iwin_size = memsize;
-
- if (sc->sc_is_host) {
- sc->sc_iwin[3].iwin_base_lo = 0 |
- PCI_MAPREG_MEM_PREFETCHABLE_MASK |
- PCI_MAPREG_MEM_TYPE_64BIT;
- } else {
- sc->sc_iwin[3].iwin_base_lo = 0;
- }
- sc->sc_iwin[3].iwin_base_hi = 0;
- sc->sc_iwin[3].iwin_xlate = 0;
- sc->sc_iwin[3].iwin_size = 0;
-
- /*
- * We set up the Outbound Windows as follows:
- *
- * 0 Access to private PCI space.
- *
- * 1 Unused.
- */
-#define PCI_MAPREG_MEM_ADDR(x) ((x) & 0xfffffff0)
- sc->sc_owin[0].owin_xlate_lo =
- PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo);
- sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi;
- /*
- * Set the Secondary Outbound I/O window to map
- * to PCI address 0 for all 64K of the I/O space.
- */
- sc->sc_ioout_xlate = 0;
- i80321_attach(sc);
- i80321_dr.dr_sysbase = sc->sc_iwin[2].iwin_xlate;
- i80321_dr.dr_busbase = PCI_MAPREG_MEM_ADDR(sc->sc_iwin[2].iwin_base_lo);
- i80321_dr.dr_len = sc->sc_iwin[2].iwin_size;
- dma_range_init = 1;
- busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
- busno = PCIXSR_BUSNO(busno);
- if (busno == 0xff)
- busno = 0;
- device_add_child(dev, "obio", 0);
- device_add_child(dev, "itimer", 0);
- device_add_child(dev, "iopwdog", 0);
- device_add_child(dev, "iqseg", 0);
- device_add_child(dev, "pcib", busno);
- bus_generic_probe(dev);
- bus_generic_attach(dev);
-
- return (0);
-}
-
-void
-arm_mask_irq(uintptr_t nb)
-{
- intr_enabled &= ~(1 << nb);
- i80321_set_intrmask();
-}
-
-void
-arm_unmask_irq(uintptr_t nb)
-{
- intr_enabled |= (1 << nb);
- i80321_set_intrmask();
-}
-
-
-void
-cpu_reset()
-{
- (void) disable_interrupts(I32_bit|F32_bit);
- *(__volatile uint32_t *)(IQ80321_80321_VBASE + VERDE_ATU_BASE +
- ATU_PCSR) = PCSR_RIB | PCSR_RPB;
- printf("Reset failed :'(\n");
- for(;;);
-}
-
-static struct resource *
-iq80321_alloc_resource(device_t dev, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- if (type == SYS_RES_IRQ) {
- struct resource *res = malloc(sizeof(*res), M_DEVBUF, M_WAITOK);
- res->r_start = start;
- res->r_end = end;
- return (res);
- }
- return (NULL);
-}
-
-static int
-iq80321_setup_intr(device_t dev, device_t child,
- struct resource *ires, int flags, driver_intr_t *intr, void *arg,
- void **cookiep)
-{
- BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, intr, arg,
- cookiep);
- intr_enabled |= 1 << ires->r_start;
- i80321_set_intrmask();
-
- return (0);
-}
-
-static int
-iq80321_teardown_intr(device_t dev, device_t child, struct resource *res,
- void *cookie)
-{
- return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, res, cookie));
-}
-
-static device_method_t iq80321_methods[] = {
- DEVMETHOD(device_probe, iq80321_probe),
- DEVMETHOD(device_attach, iq80321_attach),
- DEVMETHOD(device_identify, iq80321_identify),
- DEVMETHOD(bus_alloc_resource, iq80321_alloc_resource),
- DEVMETHOD(bus_setup_intr, iq80321_setup_intr),
- DEVMETHOD(bus_teardown_intr, iq80321_teardown_intr),
- {0, 0},
-};
-
-static driver_t iq80321_driver = {
- "iq",
- iq80321_methods,
- sizeof(struct i80321_softc),
-};
-static devclass_t iq80321_devclass;
-
-DRIVER_MODULE(iq, nexus, iq80321_driver, iq80321_devclass, 0, 0);
--- sys/arm/xscale/i80321/iq80321reg.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/* $NetBSD: iq80321reg.h,v 1.4 2003/05/14 19:46:39 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2002 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/xscale/i80321/iq80321reg.h,v 1.2 2005/01/05 21:58:49 imp Exp $
- *
- */
-
-#ifndef _IQ80321REG_H_
-#define _IQ80321REG_H_
-
-/*
- * Memory map and register definitions for the Intel IQ80321
- * Evaluation Board.
- */
-
-/*
- * The memory map of the IQ80321 looks like so:
- *
- * ------------------------------
- * Intel 80321 IOP Reserved
- * FFFF E900 ------------------------------
- * Peripheral Memory Mapped
- * Registers
- * FFFF E000 ------------------------------
- * On-board devices
- * FE80 0000 ------------------------------
- * SDRAM
- * A000 0000 ------------------------------
- * Reserved
- * 9100 0000 ------------------------------
- * Flash
- * 9080 0000 ------------------------------
- * Reserved
- * 9002 0000 ------------------------------
- * ATU Outbound Transaction
- * Windows
- * 8000 0000 ------------------------------
- * ATU Outbound Direct
- * Addressing Windows
- * 0000 1000 ------------------------------
- * Initialization Boot Code
- * from Flash
- * 0000 0000 ------------------------------
- */
-
-/*
- * We allocate a page table for VA 0xfe400000 (4MB) and map the
- * PCI I/O space (64K) and i80321 memory-mapped registers (4K) there.
- */
-#define IQ80321_IOPXS_VBASE 0xfe400000UL
-#define IQ80321_IOW_VBASE IQ80321_IOPXS_VBASE
-#define IQ80321_80321_VBASE (IQ80321_IOW_VBASE + \
- VERDE_OUT_XLATE_IO_WIN_SIZE)
-
-/*
- * The IQ80321 on-board devices are mapped VA==PA during bootstrap.
- * Conveniently, the size of the on-board register space is 1 section
- * mapping.
- */
-#define IQ80321_OBIO_BASE 0xfe800000UL
-#define IQ80321_OBIO_SIZE 0x00100000UL /* 1MB */
-
-#define IQ80321_UART1 0xfe800000UL /* TI 16550 */
-
-#define IQ80321_7SEG_MSB 0xfe840000UL
-#define IQ80321_7SEG_LSB 0xfe850000UL
-
-#define IQ80321_ROT_SWITCH 0xfe8d0000UL
-
-#define IQ80321_BATTERY_STAT 0xfe8f0000UL
-#define BATTERY_STAT_PRES (1U << 0)
-#define BATTERY_STAT_CHRG (1U << 1)
-#define BATTERY_STAT_DISCHRG (1U << 2)
-
-#endif /* _IQ80321REG_H_ */
--- sys/arm/xscale/i80321/uart_cpu_i80321.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*-
- * Copyright (c) 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/uart_cpu_i80321.c,v 1.4 2005/01/20 22:23:26 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <arm/xscale/i80321/i80321var.h>
-#include <arm/xscale/i80321/obiovar.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
- return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
- di->ops = uart_ns8250_ops;
- di->bas.chan = 0;
- di->bas.bst = &obio_bs_tag;
- di->bas.regshft = 0;
- di->bas.rclk = 0;
- di->baudrate = 115200;
- di->databits = 8;
- di->stopbits = 1;
- di->parity = UART_PARITY_NONE;
- uart_bus_space_io = &obio_bs_tag;
- uart_bus_space_mem = NULL;
- di->bas.bsh = 0xfe800000;
- return (0);
-}
--- sys/arm/xscale/i80321/files.iq31244
+++ /dev/null
@@ -1,9 +0,0 @@
-#$FreeBSD: src/sys/arm/xscale/i80321/files.iq31244,v 1.2 2005/01/15 18:55:22 cognet Exp $
-arm/xscale/i80321/iq80321.c standard
-arm/xscale/i80321/iq31244_machdep.c standard
-arm/xscale/i80321/iq31244_7seg.c optional iq31244_7seg
-arm/xscale/i80321/obio.c standard
-arm/xscale/i80321/obio_space.c standard
-arm/xscale/i80321/uart_cpu_i80321.c optional uart
-arm/xscale/i80321/uart_bus_i80321.c optional uart
-dev/uart/uart_dev_ns8250.c optional uart
--- sys/arm/xscale/i80321/std.i80321
+++ /dev/null
@@ -1,5 +0,0 @@
-#XScale i80321 generic configuration
-#$FreeBSD: src/sys/arm/xscale/i80321/std.i80321,v 1.3 2005/02/26 18:59:01 cognet Exp $
-files "../xscale/i80321/files.i80321"
-include "../xscale/std.xscale"
-cpu CPU_XSCALE_80321
--- sys/arm/xscale/i80321/iq31244_7seg.c
+++ /dev/null
@@ -1,390 +0,0 @@
-/* $NetBSD: iq31244_7seg.c,v 1.2 2003/07/15 00:25:01 lukem Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Support for the 7-segment display on the Intel IQ31244.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/iq31244_7seg.c,v 1.3 2005/05/25 13:44:55 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-#include <sys/sysctl.h>
-
-#include <machine/bus.h>
-
-#include <arm/xscale/i80321/iq80321reg.h>
-#include <arm/xscale/i80321/iq80321var.h>
-
-#define WRITE(x, v) *((__volatile uint8_t *) (x)) = (v)
-
-static int snakestate;
-
-/*
- * The 7-segment display looks like so:
- *
- * A
- * +-----+
- * | |
- * F | | B
- * | G |
- * +-----+
- * | |
- * E | | C
- * | D |
- * +-----+ o DP
- *
- * Setting a bit clears the corresponding segment on the
- * display.
- */
-#define SEG_A (1 << 0)
-#define SEG_B (1 << 1)
-#define SEG_C (1 << 2)
-#define SEG_D (1 << 3)
-#define SEG_E (1 << 4)
-#define SEG_F (1 << 5)
-#define SEG_G (1 << 6)
-#define SEG_DP (1 << 7)
-
-static const uint8_t digitmap[] = {
-/* +#####+
- * # #
- * # #
- * # #
- * +-----+
- * # #
- * # #
- * # #
- * +#####+
- */
- SEG_G,
-
-/* +-----+
- * | #
- * | #
- * | #
- * +-----+
- * | #
- * | #
- * | #
- * +-----+
- */
- SEG_A|SEG_D|SEG_E|SEG_F|SEG_G,
-
-/* +#####+
- * | #
- * | #
- * | #
- * +#####+
- * # |
- * # |
- * # |
- * +#####+
- */
- SEG_C|SEG_F,
-
-/* +#####+
- * | #
- * | #
- * | #
- * +#####+
- * | #
- * | #
- * | #
- * +#####+
- */
- SEG_E|SEG_F,
-
-/* +-----+
- * # #
- * # #
- * # #
- * +#####+
- * | #
- * | #
- * | #
- * +-----+
- */
- SEG_A|SEG_D|SEG_E,
-
-/* +#####+
- * # |
- * # |
- * # |
- * +#####+
- * | #
- * | #
- * | #
- * +#####+
- */
- SEG_B|SEG_E,
-
-/* +#####+
- * # |
- * # |
- * # |
- * +#####+
- * # #
- * # #
- * # #
- * +#####+
- */
- SEG_B,
-
-/* +#####+
- * | #
- * | #
- * | #
- * +-----+
- * | #
- * | #
- * | #
- * +-----+
- */
- SEG_D|SEG_E|SEG_F,
-
-/* +#####+
- * # #
- * # #
- * # #
- * +#####+
- * # #
- * # #
- * # #
- * +#####+
- */
- 0,
-
-/* +#####+
- * # #
- * # #
- * # #
- * +#####+
- * | #
- * | #
- * | #
- * +-----+
- */
- SEG_D|SEG_E,
-};
-
-static uint8_t
-iq80321_7seg_xlate(char c)
-{
- uint8_t rv;
-
- if (c >= '0' && c <= '9')
- rv = digitmap[c - '0'];
- else if (c == '.')
- rv = (uint8_t) ~SEG_DP;
- else
- rv = 0xff;
-
- return (rv);
-}
-
-void
-iq80321_7seg(char a, char b)
-{
- uint8_t msb, lsb;
-
- msb = iq80321_7seg_xlate(a);
- lsb = iq80321_7seg_xlate(b);
-
- snakestate = 0;
-
- WRITE(IQ80321_7SEG_MSB, msb);
- WRITE(IQ80321_7SEG_LSB, lsb);
-}
-
-static const uint8_t snakemap[][2] = {
-
-/* +#####+ +#####+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- */
- { ~SEG_A, ~SEG_A },
-
-/* +-----+ +-----+
- * # | | #
- * # | | #
- * # | | #
- * +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- */
- { ~SEG_F, ~SEG_B },
-
-/* +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +#####+ +#####+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- */
- { ~SEG_G, ~SEG_G },
-
-/* +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- * | # # |
- * | # # |
- * | # # |
- * +-----+ +-----+
- */
- { ~SEG_C, ~SEG_E },
-
-/* +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +#####+ +#####+
- */
- { ~SEG_D, ~SEG_D },
-
-/* +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- * # | | #
- * # | | #
- * # | | #
- * +-----+ +-----+
- */
- { ~SEG_E, ~SEG_C },
-
-/* +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +#####+ +#####+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- */
- { ~SEG_G, ~SEG_G },
-
-/* +-----+ +-----+
- * | # # |
- * | # # |
- * | # # |
- * +-----+ +-----+
- * | | | |
- * | | | |
- * | | | |
- * +-----+ +-----+
- */
- { ~SEG_B, ~SEG_F },
-};
-
-SYSCTL_NODE(_hw, OID_AUTO, sevenseg, CTLFLAG_RD, 0, "7 seg");
-static int freq = 20;
-SYSCTL_INT(_hw_sevenseg, OID_AUTO, freq, CTLFLAG_RW, &freq, 0,
- "7 Seg update frequency");
-static void
-iq31244_7seg_snake(void)
-{
- static int snakefreq;
- int cur = snakestate;
-
- snakefreq++;
- if ((snakefreq % freq))
- return;
- WRITE(IQ80321_7SEG_MSB, snakemap[cur][0]);
- WRITE(IQ80321_7SEG_LSB, snakemap[cur][1]);
-
- snakestate = (cur + 1) & 7;
-}
-
-struct iq31244_7seg_softc {
- device_t dev;
-};
-
-static int
-iq31244_7seg_probe(device_t dev)
-{
-
- device_set_desc(dev, "IQ31244 7seg");
- return (0);
-}
-
-extern void (*i80321_hardclock_hook)(void);
-static int
-iq31244_7seg_attach(device_t dev)
-{
-
- i80321_hardclock_hook = iq31244_7seg_snake;
- return (0);
-}
-
-static device_method_t iq31244_7seg_methods[] = {
- DEVMETHOD(device_probe, iq31244_7seg_probe),
- DEVMETHOD(device_attach, iq31244_7seg_attach),
- {0, 0},
-};
-
-static driver_t iq31244_7seg_driver = {
- "iqseg",
- iq31244_7seg_methods,
- sizeof(struct iq31244_7seg_softc),
-};
-static devclass_t iq31244_7seg_devclass;
-
-DRIVER_MODULE(iqseg, iq, iq31244_7seg_driver, iq31244_7seg_devclass, 0, 0);
--- sys/arm/xscale/i80321/iq31244_machdep.c
+++ /dev/null
@@ -1,455 +0,0 @@
-/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
-
-/*-
- * Copyright (c) 1994-1998 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * machdep.c
- *
- * Machine dependant functions for kernel setup
- *
- * This file needs a lot of work.
- *
- * Created : 17/09/94
- */
-
-#include "opt_msgbuf.h"
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/iq31244_machdep.c,v 1.13 2005/06/23 11:40:45 cognet Exp $");
-
-#define _ARM32_BUS_DMA_PRIVATE
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sysproto.h>
-#include <sys/signalvar.h>
-#include <sys/imgact.h>
-#include <sys/kernel.h>
-#include <sys/ktr.h>
-#include <sys/linker.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/ptrace.h>
-#include <sys/cons.h>
-#include <sys/bio.h>
-#include <sys/bus.h>
-#include <sys/buf.h>
-#include <sys/exec.h>
-#include <sys/kdb.h>
-#include <sys/msgbuf.h>
-#include <machine/reg.h>
-#include <machine/cpu.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_pager.h>
-#include <vm/vm_map.h>
-#include <vm/vnode_pager.h>
-#include <machine/pmap.h>
-#include <machine/vmparam.h>
-#include <machine/pcb.h>
-#include <machine/undefined.h>
-#include <machine/machdep.h>
-#include <machine/metadata.h>
-#include <machine/armreg.h>
-#include <machine/bus.h>
-#include <sys/reboot.h>
-
-#include <arm/xscale/i80321/i80321reg.h>
-#include <arm/xscale/i80321/i80321var.h>
-#include <arm/xscale/i80321/iq80321reg.h>
-#include <arm/xscale/i80321/obiovar.h>
-
-#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
-#define KERNEL_PT_IOPXS 1
-#define KERNEL_PT_BEFOREKERN 2
-#define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
-#define KERNEL_PT_AFKERNEL_NUM 9
-
-/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
-#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
-
-/* Define various stack sizes in pages */
-#define IRQ_STACK_SIZE 1
-#define ABT_STACK_SIZE 1
-#ifdef IPKDB
-#define UND_STACK_SIZE 2
-#else
-#define UND_STACK_SIZE 1
-#endif
-
-extern u_int data_abort_handler_address;
-extern u_int prefetch_abort_handler_address;
-extern u_int undefined_handler_address;
-
-struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
-
-extern void *_end;
-
-extern vm_offset_t sa1_cache_clean_addr;
-
-extern int *end;
-
-struct pcpu __pcpu;
-struct pcpu *pcpup = &__pcpu;
-
-/* Physical and virtual addresses for some global pages */
-
-vm_paddr_t phys_avail[10];
-vm_paddr_t physical_start;
-vm_paddr_t physical_end;
-vm_offset_t physical_pages;
-vm_offset_t clean_sva, clean_eva;
-
-struct pv_addr systempage;
-struct pv_addr msgbufpv;
-struct pv_addr irqstack;
-struct pv_addr undstack;
-struct pv_addr abtstack;
-struct pv_addr kernelstack;
-struct pv_addr minidataclean;
-
-void enable_mmu(vm_offset_t);
-static struct trapframe proc0_tf;
-
-#define IQ80321_OBIO_BASE 0xfe800000UL
-#define IQ80321_OBIO_SIZE 0x00100000UL
-/* Static device mappings. */
-static const struct pmap_devmap iq80321_devmap[] = {
- /*
- * Map the on-board devices VA == PA so that we can access them
- * with the MMU on or off.
- */
- {
- IQ80321_OBIO_BASE,
- IQ80321_OBIO_BASE,
- IQ80321_OBIO_SIZE,
- VM_PROT_READ|VM_PROT_WRITE,
- PTE_NOCACHE,
- },
- {
- IQ80321_IOW_VBASE,
- VERDE_OUT_XLATE_IO_WIN0_BASE,
- VERDE_OUT_XLATE_IO_WIN_SIZE,
- VM_PROT_READ|VM_PROT_WRITE,
- PTE_NOCACHE,
- },
-
- {
- IQ80321_80321_VBASE,
- VERDE_PMMR_BASE,
- VERDE_PMMR_SIZE,
- VM_PROT_READ|VM_PROT_WRITE,
- PTE_NOCACHE,
- },
- {
- 0,
- 0,
- 0,
- 0,
- 0,
- }
-};
-
-#define SDRAM_START 0xa0000000
-
-extern vm_offset_t xscale_cache_clean_addr;
-
-void *
-initarm(void *arg, void *arg2)
-{
- struct pv_addr kernel_l1pt;
- int loop;
- u_int kerneldatasize, symbolsize;
- u_int l1pagetable;
- vm_offset_t freemempos;
- vm_offset_t freemem_pt;
- vm_offset_t afterkern;
- vm_offset_t freemem_after;
- int i = 0;
- uint32_t fake_preload[35];
- uint32_t memsize, memstart;
-
- i = 0;
-
- set_cpufuncs();
- fake_preload[i++] = MODINFO_NAME;
- fake_preload[i++] = strlen("elf kernel") + 1;
- strcpy((char*)&fake_preload[i++], "elf kernel");
- i += 2;
- fake_preload[i++] = MODINFO_TYPE;
- fake_preload[i++] = strlen("elf kernel") + 1;
- strcpy((char*)&fake_preload[i++], "elf kernel");
- i += 2;
- fake_preload[i++] = MODINFO_ADDR;
- fake_preload[i++] = sizeof(vm_offset_t);
- fake_preload[i++] = KERNBASE + 0x00200000;
- fake_preload[i++] = MODINFO_SIZE;
- fake_preload[i++] = sizeof(uint32_t);
- fake_preload[i++] = (uint32_t)&end - KERNBASE - 0x00200000;
- fake_preload[i++] = 0;
- fake_preload[i] = 0;
- preload_metadata = (void *)fake_preload;
-
-
- pcpu_init(pcpup, 0, sizeof(struct pcpu));
- PCPU_SET(curthread, &thread0);
-
- physical_start = (vm_offset_t) SDRAM_START;
- physical_end = (vm_offset_t) &end + SDRAM_START - 0xc0000000;
-#define KERNEL_TEXT_BASE (KERNBASE + 0x00200000)
- kerneldatasize = (u_int32_t)&end - (u_int32_t)KERNEL_TEXT_BASE;
- symbolsize = 0;
- freemempos = 0xa0200000;
- /* Define a macro to simplify memory allocation */
-#define valloc_pages(var, np) \
- alloc_pages((var).pv_pa, (np)); \
- (var).pv_va = (var).pv_pa + 0x20000000;
-
-#define alloc_pages(var, np) \
- freemempos -= (np * PAGE_SIZE); \
- (var) = freemempos; \
- memset((char *)(var), 0, ((np) * PAGE_SIZE));
-
- while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
- freemempos -= PAGE_SIZE;
- valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
- for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
- if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
- valloc_pages(kernel_pt_table[loop],
- L2_TABLE_SIZE / PAGE_SIZE);
- } else {
- kernel_pt_table[loop].pv_pa = freemempos -
- (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
- L2_TABLE_SIZE_REAL;
- kernel_pt_table[loop].pv_va =
- kernel_pt_table[loop].pv_pa + 0x20000000;
- }
- i++;
- }
- freemempos -= 2 * PAGE_SIZE;
-
- freemem_pt = freemempos;
- freemempos = 0xa0100000;
- /*
- * Allocate a page for the system page mapped to V0x00000000
- * This page will just contain the system vectors and can be
- * shared by all processes.
- */
- valloc_pages(systempage, 1);
-
- /* Allocate stacks for all modes */
- valloc_pages(irqstack, IRQ_STACK_SIZE);
- valloc_pages(abtstack, ABT_STACK_SIZE);
- valloc_pages(undstack, UND_STACK_SIZE);
- valloc_pages(kernelstack, KSTACK_PAGES);
- alloc_pages(minidataclean.pv_pa, 1);
- valloc_pages(msgbufpv, round_page(MSGBUF_SIZE) / PAGE_SIZE);
-#ifdef ARM_USE_SMALL_ALLOC
- freemempos -= PAGE_SIZE;
- freemem_pt = trunc_page(freemem_pt);
- freemem_after = freemempos - ((freemem_pt - 0xa0100000) /
- PAGE_SIZE) * sizeof(struct arm_small_page);
- arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
- , (void *)0xc0100000, freemem_pt - 0xa0100000, 1);
- freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) *
- sizeof(struct arm_small_page);
- arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
- , (void *)0xc0001000, trunc_page(freemem_after) - 0xa0001000, 0);
- freemempos = trunc_page(freemem_after);
- freemempos -= PAGE_SIZE;
-#endif
- /*
- * Allocate memory for the l1 and l2 page tables. The scheme to avoid
- * wasting memory by allocating the l1pt on the first 16k memory was
- * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
- * this to work (which is supposed to be the case).
- */
-
- /*
- * Now we start construction of the L1 page table
- * We start by mapping the L2 page tables into the L1.
- * This means that we can replace L1 mappings later on if necessary
- */
- l1pagetable = kernel_l1pt.pv_va;
-
- /* Map the L2 pages tables in the L1 page table */
- pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
- &kernel_pt_table[KERNEL_PT_SYS]);
- pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
- &kernel_pt_table[KERNEL_PT_IOPXS]);
- pmap_link_l2pt(l1pagetable, KERNBASE,
- &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
- pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
- 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
- pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
- (((uint32_t)(&end) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- freemem_after = ((int)&end + PAGE_SIZE) & ~(PAGE_SIZE - 1);
- afterkern = round_page(((vm_offset_t)&end + L1_S_SIZE) & ~(L1_S_SIZE
- - 1));
- for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
- pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
- &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
- }
- pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
-
-
-#ifdef ARM_USE_SMALL_ALLOC
- if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
- arm_add_smallalloc_pages((void *)(freemem_after),
- (void*)(freemem_after + PAGE_SIZE),
- afterkern - (freemem_after + PAGE_SIZE), 0);
-
- }
-#endif
-
- /* Map the Mini-Data cache clean area. */
- xscale_setup_minidata(l1pagetable, afterkern,
- minidataclean.pv_pa);
-
- /* Map the vector page. */
- pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_devmap_bootstrap(l1pagetable, iq80321_devmap);
- /*
- * Give the XScale global cache clean code an appropriately
- * sized chunk of unmapped VA space starting at 0xff000000
- * (our device mappings end before this address).
- */
- xscale_cache_clean_addr = 0xff000000U;
-
- cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
- setttb(kernel_l1pt.pv_pa);
- cpu_tlb_flushID();
- cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
- /*
- * Pages were allocated during the secondary bootstrap for the
- * stacks for different CPU modes.
- * We must now set the r13 registers in the different CPU modes to
- * point to these stacks.
- * Since the ARM stacks use STMFD etc. we must set r13 to the top end
- * of the stack memory.
- */
-
-
- set_stackptr(PSR_IRQ32_MODE,
- irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
- set_stackptr(PSR_ABT32_MODE,
- abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
- set_stackptr(PSR_UND32_MODE,
- undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
-
-
-
- /*
- * We must now clean the cache again....
- * Cleaning may be done by reading new data to displace any
- * dirty data in the cache. This will have happened in setttb()
- * but since we are boot strapping the addresses used for the read
- * may have just been remapped and thus the cache could be out
- * of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
- * this problem will not occur after initarm().
- */
- cpu_idcache_wbinv_all();
- /*
- * Fetch the SDRAM start/size from the i80321 SDRAM configration
- * registers.
- */
- i80321_calibrate_delay();
- i80321_sdram_bounds(&obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
- &memstart, &memsize);
- physmem = memsize / PAGE_SIZE;
- cninit();
-
- /* Set stack for exception handlers */
-
- data_abort_handler_address = (u_int)data_abort_handler;
- prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
- undefined_handler_address = (u_int)undefinedinstruction_bounce;
- undefined_init();
-
- proc_linkup(&proc0, &ksegrp0, &thread0);
- thread0.td_kstack = kernelstack.pv_va;
- thread0.td_pcb = (struct pcb *)
- (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
- thread0.td_pcb->pcb_flags = 0;
- thread0.td_frame = &proc0_tf;
- pcpup->pc_curpcb = thread0.td_pcb;
-
- /* Enable MMU, I-cache, D-cache, write buffer. */
-
- arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
-
-
-
- pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
- pmap_bootstrap(pmap_curmaxkvaddr,
- 0xd0000000, &kernel_l1pt);
- msgbufp = (void*)msgbufpv.pv_va;
- msgbufinit(msgbufp, MSGBUF_SIZE);
- mutex_init();
-
- i = 0;
-#ifdef ARM_USE_SMALL_ALLOC
- phys_avail[i++] = 0xa0000000;
- phys_avail[i++] = 0xa0001000; /*
- *XXX: Gross hack to get our
- * pages in the vm_page_array
- . */
-#endif
- phys_avail[i++] = round_page(virtual_avail - KERNBASE + SDRAM_START);
- phys_avail[i++] = trunc_page(0xa0000000 + memsize - 1);
- phys_avail[i++] = 0;
- phys_avail[i] = 0;
-
- /* Do basic tuning, hz etc */
- init_param1();
- init_param2(physmem);
- avail_end = 0xa0000000 + memsize - 1;
- kdb_init();
- return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
- sizeof(struct pcb)));
-}
--- sys/arm/xscale/i80321/obiovar.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/* $NetBSD: obiovar.h,v 1.4 2003/06/16 17:40:53 thorpej Exp $ */
-
-/*-
- * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/xscale/i80321/obiovar.h,v 1.2 2005/01/05 21:58:49 imp Exp $
- *
- */
-
-#ifndef _IQ80321_OBIOVAR_H_
-#define _IQ80321_OBIOVAR_H_
-
-#ifdef __RMAN_RESOURCE_VISIBLE
-struct obio_softc {
- bus_space_tag_t oba_st; /* bus space tag */
- bus_addr_t oba_addr; /* address of device */
- bus_size_t oba_size; /* size of device */
- int oba_width; /* bus width */
- int oba_irq; /* XINT interrupt bit # */
- struct rman oba_rman;
-
-};
-#endif /* __RMAN_RESOURCE_VISIBLE */
-extern struct bus_space obio_bs_tag;
-
-#endif /* _IQ80321_OBIOVAR_H_ */
--- sys/arm/xscale/i80321/uart_bus_i80321.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*-
- * Copyright (c) 2004 Olivier Houchard. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/uart_bus_i80321.c,v 1.3 2005/01/05 21:58:49 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-
-#include "uart_if.h"
-
-static int uart_i80321_probe(device_t dev);
-
-static device_method_t uart_i80321_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, uart_i80321_probe),
- DEVMETHOD(device_attach, uart_bus_attach),
- DEVMETHOD(device_detach, uart_bus_detach),
- { 0, 0 }
-};
-
-static driver_t uart_i80321_driver = {
- uart_driver_name,
- uart_i80321_methods,
- sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-static int
-uart_i80321_probe(device_t dev)
-{
- struct uart_softc *sc;
-
- sc = device_get_softc(dev);
- sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
- sc->sc_class = &uart_ns8250_class;
- bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
- return(uart_bus_probe(dev, 0, 0, 0, 0));
-}
-
-
-DRIVER_MODULE(uart, obio, uart_i80321_driver, uart_devclass, 0, 0);
--- sys/arm/xscale/i80321/obio_space.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/* $NetBSD: obio_space.c,v 1.6 2003/07/15 00:25:05 lukem Exp $ */
-
-/*-
- * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
- * All rights reserved.
- *
- * Written by Jason R. Thorpe for Wasabi Systems, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed for the NetBSD Project by
- * Wasabi Systems, Inc.
- * 4. The name of Wasabi Systems, Inc. may not be used to endorse
- * or promote products derived from this software without specific prior
- * written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * bus_space functions for IQ80321 on-board devices
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/xscale/i80321/obio_space.c,v 1.3 2005/04/07 22:03:34 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-
-#include <machine/pcb.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_kern.h>
-#include <vm/vm_extern.h>
-
-#include <machine/bus.h>
-
-/* Prototypes for all the bus_space structure functions */
-bs_protos(obio);
-bs_protos(generic);
-bs_protos(generic_armv4);
-
-/*
- * The obio bus space tag. This is constant for all instances, so
- * we never have to explicitly "create" it.
- */
-struct bus_space obio_bs_tag = {
- /* cookie */
- (void *) 0,
-
- /* mapping/unmapping */
- obio_bs_map,
- obio_bs_unmap,
- obio_bs_subregion,
-
- /* allocation/deallocation */
- obio_bs_alloc,
- obio_bs_free,
-
- /* barrier */
- obio_bs_barrier,
-
- /* read (single) */
- generic_bs_r_1,
- generic_armv4_bs_r_2,
- generic_bs_r_4,
- NULL,
-
- /* read multiple */
- generic_bs_rm_1,
- NULL,
- NULL,
- NULL,
-
- /* read region */
- generic_bs_rr_1,
- NULL,
- NULL,
- NULL,
-
- /* write (single) */
- generic_bs_w_1,
- generic_armv4_bs_w_2,
- generic_bs_w_4,
- NULL,
-
- /* write multiple */
- generic_bs_wm_1,
- NULL,
- NULL,
- NULL,
-
- /* write region */
- NULL,
- NULL,
- NULL,
- NULL,
-
- /* set multiple */
- NULL,
- NULL,
- NULL,
- NULL,
-
- /* set region */
- NULL,
- NULL,
- NULL,
- NULL,
-
- /* copy */
- NULL,
- NULL,
- NULL,
- NULL,
-};
-
-int
-obio_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
- bus_space_handle_t *bshp)
-{
- const struct pmap_devmap *pd;
- vm_paddr_t startpa, endpa, pa, offset;
- vm_offset_t va;
- pt_entry_t *pte;
-
- if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
- /* Device was statically mapped. */
- *bshp = pd->pd_va + (bpa - pd->pd_pa);
- return (0);
- }
-
- endpa = round_page(bpa + size);
- offset = bpa & PAGE_MASK;
- startpa = trunc_page(bpa);
-
- va = kmem_alloc(kernel_map, endpa - startpa);
- if (va == 0)
- return (ENOMEM);
-
- *bshp = va + offset;
-
- for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
- pmap_kenter(va, pa);
- pte = vtopte(va);
- *pte &= ~L2_S_CACHE_MASK;
- PTE_SYNC(pte);
- }
-
- return (0);
-}
-
-int
-obio_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
- bus_size_t alignment, bus_size_t boundary, int flags, bus_addr_t *bpap,
- bus_space_handle_t *bshp)
-{
-
- panic("obio_bs_alloc(): not implemented");
-}
-
-
-void
-obio_bs_unmap(void *t, bus_size_t size)
-{
- vm_offset_t va, endva;
-
- if (pmap_devmap_find_va((vm_offset_t)t, size) != NULL) {
- /* Device was statically mapped; nothing to do. */
- return;
- }
-
- endva = round_page((vm_offset_t)t + size);
- va = trunc_page((vm_offset_t)t);
-
- while (va < endva) {
- pmap_kremove(va);
- va += PAGE_SIZE;
- }
- kmem_free(kernel_map, va, endva - va);
-}
-
-void
-obio_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
-{
-
- panic("obio_bs_free(): not implemented");
-}
-
-int
-obio_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
- bus_size_t size, bus_space_handle_t *nbshp)
-{
-
- *nbshp = bsh + offset;
- return (0);
-}
-
-void
-obio_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
- bus_size_t len, int flags)
-{
-
- /* Nothing to do. */
-}
--- sys/ia64/include/pc/display.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * IBM PC display definitions
- *
- * $FreeBSD: src/sys/ia64/include/pc/display.h,v 1.1 2000/09/29 13:48:14 dfr Exp $
- * from: i386/include/pc display.h,v 1.4
- */
-
-/* Color attributes for foreground text */
-
-#define FG_BLACK 0
-#define FG_BLUE 1
-#define FG_GREEN 2
-#define FG_CYAN 3
-#define FG_RED 4
-#define FG_MAGENTA 5
-#define FG_BROWN 6
-#define FG_LIGHTGREY 7
-#define FG_DARKGREY 8
-#define FG_LIGHTBLUE 9
-#define FG_LIGHTGREEN 10
-#define FG_LIGHTCYAN 11
-#define FG_LIGHTRED 12
-#define FG_LIGHTMAGENTA 13
-#define FG_YELLOW 14
-#define FG_WHITE 15
-#define FG_BLINK 0x80
-
-/* Color attributes for text background */
-
-#define BG_BLACK 0x00
-#define BG_BLUE 0x10
-#define BG_GREEN 0x20
-#define BG_CYAN 0x30
-#define BG_RED 0x40
-#define BG_MAGENTA 0x50
-#define BG_BROWN 0x60
-#define BG_LIGHTGREY 0x70
-
-/* Monochrome attributes for foreground text */
-
-#define FG_UNDERLINE 0x01
-#define FG_INTENSE 0x08
-
-/* Monochrome attributes for text background */
-
-#define BG_INTENSE 0x10
--- sys/arm/sa11x0/sa11x0_dmacreg.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/* $NetBSD: sa11x0_dmacreg.h,v 1.1 2001/07/08 23:37:53 rjs Exp $ */
-
-/*-
- * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/sa11x0/sa11x0_dmacreg.h,v 1.1 2004/05/14 11:46:45 cognet Exp $
- *
- */
-
-/* SA11[01]0 integrated DMA controller */
-
-#define SADMAC_NPORTS 40
-
-#define SADMAC_DAR0 0x00 /* DMA device address register */
-#define SADMAC_DCR0_SET 0x04 /* DMA control/status (set) */
-#define SADMAC_DCR0_CLR 0x08 /* DMA control/status (clear) */
-#define SADMAC_DCR0 0x0C /* DMA control/status (read only) */
-#define SADMAC_DBSA0 0x10 /* DMA Buffer A start address */
-#define SADMAC_DBTA0 0x14 /* DMA Buffer A transfer count */
-#define SADMAC_DBSB0 0x18 /* DMA Buffer B start address */
-#define SADMAC_DBTB0 0x1C /* DMA Buffer B transfer count */
-
-#define SADMAC_DAR1 0x20
-#define SADMAC_DCR1_SET 0x24
-#define SADMAC_DCR1_CLR 0x28
-#define SADMAC_DCR1 0x2C
-#define SADMAC_DBSA1 0x30
-#define SADMAC_DBTA1 0x34
-#define SADMAC_DBSB1 0x38
-#define SADMAC_DBTB1 0x3C
-
-#define SADMAC_DAR2 0x40
-#define SADMAC_DCR2_SET 0x44
-#define SADMAC_DCR2_CLR 0x48
-#define SADMAC_DCR2 0x4C
-#define SADMAC_DBSA2 0x50
-#define SADMAC_DBTA2 0x54
-#define SADMAC_DBSB2 0x58
-#define SADMAC_DBTB2 0x5C
-
-#define SADMAC_DAR3 0x60
-#define SADMAC_DCR3_SET 0x64
-#define SADMAC_DCR3_CLR 0x68
-#define SADMAC_DCR3 0x6C
-#define SADMAC_DBSA3 0x70
-#define SADMAC_DBTA3 0x74
-#define SADMAC_DBSB3 0x78
-#define SADMAC_DBTB3 0x7C
-
-#define SADMAC_DAR4 0x80
-#define SADMAC_DCR4_SET 0x84
-#define SADMAC_DCR4_CLR 0x88
-#define SADMAC_DCR4 0x8C
-#define SADMAC_DBSA4 0x90
-#define SADMAC_DBTA4 0x94
-#define SADMAC_DBSB4 0x98
-#define SADMAC_DBTB4 0x9C
-
-#define SADMAC_DAR5 0xA0
-#define SADMAC_DCR5_SET 0xA4
-#define SADMAC_DCR5_CLR 0xA8
-#define SADMAC_DCR5 0xAC
-#define SADMAC_DBSA5 0xB0
-#define SADMAC_DBTA5 0xB4
-#define SADMAC_DBSB5 0xB8
-#define SADMAC_DBTB5 0xBC
--- sys/arm/sa11x0/sa11x0_irqhandler.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/* $NetBSD: sa11x0_irqhandler.c,v 1.5 2003/08/07 16:26:54 agc Exp $ */
-
-/*-
- * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to the NetBSD Foundation
- * by IWAMOTO Toshihiro.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace
- * Simulation Facility, NASA Ames Research Center.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*-
- * Copyright (c) 1991 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)isa.c 7.2 (Berkeley) 5/13/91
- */
-
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/sa11x0_irqhandler.c,v 1.4 2005/06/09 12:26:20 cognet Exp $");
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/syslog.h>
-#include <sys/malloc.h>
-#include <sys/types.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-
-#include <arm/sa11x0/sa11x0_reg.h>
-#include <arm/sa11x0/sa11x0_var.h>
-
-#include <machine/cpu.h>
-#include <machine/intr.h>
-
-#define NIRQS 0x20
-struct intrhand *irqhandlers[NIRQS];
-
-int current_intr_depth;
-extern struct sa11x0_softc *sa11x0_softc;
-
-
-static uint32_t sa11x0_irq_mask = 0xfffffff;
-
-extern vm_offset_t saipic_base;
-
-int
-arm_get_next_irq()
-{
- int irq;
-
- if ((irq = (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAIPIC_IP) &
- sa11x0_irq_mask)) != 0)
- return (ffs(irq) - 1);
- return (-1);
-}
-
-void
-arm_mask_irq(uintptr_t irq)
-{
-
- sa11x0_irq_mask &= ~(1 << irq);
- __asm __volatile("str %0, [%1, #0x04]" /* SAIPIC_MR */
- : : "r" (sa11x0_irq_mask), "r" (saipic_base));
-}
-
-void
-arm_unmask_irq(uintptr_t irq)
-{
-
- sa11x0_irq_mask |= (1 << irq);
- __asm __volatile("str %0, [%1, #0x04]" /* SAIPIC_MR */
- : : "r" (sa11x0_irq_mask), "r" (saipic_base));
-}
-
-void stray_irqhandler(void *);
-
-
-
-void
-stray_irqhandler(void *p)
-{
-
- printf("stray interrupt %p\n", p);
-}
-/* End of irqhandler.c */
--- sys/arm/sa11x0/sa11x0_var.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/* $NetBSD: sa11x0_var.h,v 1.4 2003/04/14 14:18:41 rjs Exp $ */
-
-/*-
- * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/sa11x0/sa11x0_var.h,v 1.1 2004/05/14 11:46:45 cognet Exp $
- *
- */
-
-#ifndef _SA11X0_VAR_H
-#define _SA11X0_VAR_H
-
-#include <sys/conf.h>
-
-#include <sys/bus.h>
-#include <machine/bus.h>
-
-struct sa11x0_softc {
- device_t sc_dev;
- bus_space_tag_t sc_iot;
- bus_space_handle_t sc_ioh;
- bus_space_handle_t sc_gpioh;
- bus_space_handle_t sc_ppch;
- bus_space_handle_t sc_dmach;
- bus_space_handle_t sc_reseth;
- u_int32_t sc_intrmask;
-};
-
-/* Attach args all devices */
-
-typedef void *sa11x0_chipset_tag_t;
-
-extern struct bus_space sa11x0_bs_tag;
-struct sa11x0_attach_args {
- sa11x0_chipset_tag_t sa_sc;
- bus_space_tag_t sa_iot; /* Bus tag */
- bus_addr_t sa_addr; /* i/o address */
- bus_size_t sa_size;
-
- int sa_intr;
- int sa_gpio;
-};
-
-void *sa11x0_intr_establish(sa11x0_chipset_tag_t, int, int, int,
- int (*)(void *), void *);
-void sa11x0_intr_disestablish(sa11x0_chipset_tag_t, void *);
-
-#endif /* _SA11X0_VAR_H */
--- sys/arm/sa11x0/sa11x0_irq.S
+++ /dev/null
@@ -1,145 +0,0 @@
-/* $NetBSD: sa11x0_irq.S,v 1.5 2003/03/31 19:52:35 chris Exp $ */
-
-/*-
- * Copyright (c) 1998 Mark Brinicombe.
- * Copyright (c) 1998 Causality Limited
- * All rights reserved.
- *
- * This code is derived from software contributed to the NetBSD Foundation
- * by IWAMOTO Toshihiro.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe
- * for the NetBSD Project.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include "assym.s"
-#include <machine/asm.h>
-#include <machine/armreg.h>
-#include <machine/asmacros.h>
-#include <arm/sa11x0/sa11x0_reg.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/sa11x0_irq.S,v 1.3 2005/01/05 21:58:48 imp Exp $");
-Lcurrent_intr_depth:
- .word _C_LABEL(current_intr_depth)
-
- .globl _C_LABEL(saipic_base)
-_C_LABEL(saipic_base):
- .word 0x00000000
-
-#ifdef INTR_DEBUG
-Ldbg_str:
- .asciz "irq_entry %x %x\n"
-#endif
-
-AST_LOCALS
-/*
- * Regsister usage
- *
- * r6 - Address of current handler
- * r7 - Pointer to handler pointer list
- * r8 - Current IRQ requests.
- * r9 - Used to count through possible IRQ bits.
- * r10 - Base address of SAIP
- */
-
-ASENTRY_NP(irq_entry)
- sub lr, lr, #0x00000004 /* Adjust the lr */
-
- PUSHFRAMEINSVC /* Push an interrupt frame */
-
- /* Load r8 with the SAIPIC interrupt requests */
-
- ldr r10, _C_LABEL(saipic_base)
- ldr r8, [r10, #(SAIPIC_IP)] /* Load IRQ pending register */
-
-#ifdef INTR_DEBUG
- ldr r2, [r10, #(SAIPIC_MR)]
- adr r0, Ldbg_str
- mov r1, r8
- bl _C_LABEL(printf)
-#endif
- /*
- * Note that we have entered the IRQ handler.
- * We are in SVC mode so we cannot use the processor mode
- * to determine if we are in an IRQ. Instead we will count the
- * each time the interrupt handler is nested.
- */
-
- ldr r0, Lcurrent_intr_depth
- ldr r1, [r0]
- add r1, r1, #1
- str r1, [r0]
-
- mov r0, sp
- mov r1, r8
- bl _C_LABEL(arm_handler_execute)
-
-#ifdef INTR_DEBUG
- adr r0, Ldbg_str
- mov r1, #3
- ldr r2, [r10, #(SAIPIC_MR)]
- bl _C_LABEL(printf)
-#endif
-
- /* Decrement the nest count */
- ldr r0, Lcurrent_intr_depth
- ldr r1, [r0]
- sub r1, r1, #1
- str r1, [r0]
-
- DO_AST
- PULLFRAMEFROMSVCANDEXIT
-
- /* NOT REACHED */
- b . - 8
-Lcnt:
- .word _C_LABEL(cnt)
-
-ENTRY(sa11x0_activateirqs)
- ldr r0, _C_LABEL(saipic_base)
- mov r1, #0xffffffff
- str r1, [r0, #(SAIPIC_MR)]
- mov pc, lr
-#ifdef IRQSTATS
-Lintrcnt:
- .word _C_LABEL(intrcnt)
-#endif
-
- .global _C_LABEL(intrnames), _C_LABEL(eintrnames)
- .global _C_LABEL(eintrcnt)
-_C_LABEL(intrnames):
-_C_LABEL(eintrnames):
-_C_LABEL(eintrcnt):
-
- .globl _C_LABEL(intrcnt), _C_LABEL(sintrcnt)
-
-_C_LABEL(intrcnt):
- .space ICU_LEN*4 /* XXX Should be linked to number of interrupts */
-
-_C_LABEL(sintrcnt):
- .space 32*4
--- sys/arm/sa11x0/sa11x0_io_asm.S
+++ /dev/null
@@ -1,290 +0,0 @@
-/* $NetBSD: sa11x0_io_asm.S,v 1.1 2001/07/08 23:37:53 rjs Exp $ */
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <machine/asm.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/sa11x0_io_asm.S,v 1.2 2005/01/05 21:58:48 imp Exp $");
-
-/*
- * bus_space I/O functions for sa11x0
- */
-
-/*
- * read single
- */
-
-ENTRY(sa11x0_bs_r_1)
- ldrb r0, [r1, r2]
- mov pc, lr
-
-ENTRY(sa11x0_bs_r_2)
- ldrh r0, [r1, r2]
- mov pc, lr
-
-ENTRY(sa11x0_bs_r_4)
- ldr r0, [r1, r2]
- mov pc, lr
-
-/*
- * write single
- */
-
-ENTRY(sa11x0_bs_w_1)
- strb r3, [r1, r2]
- mov pc, lr
-
-ENTRY(sa11x0_bs_w_2)
- strh r3, [r1, r2]
- mov pc, lr
-
-ENTRY(sa11x0_bs_w_4)
- str r3, [r1, r2]
- mov pc, lr
-
-
-/*
- * read multiple
- */
-
-ENTRY(sa11x0_bs_rm_1)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
-sa11x0_bs_rm_1_loop:
- ldrb r1, [r0]
- subs r2, r2, #0x00000001
- strb r1, [r3], #0x0001
- bgt sa11x0_bs_rm_1_loop
-
- mov pc, lr
-
-ENTRY(sa11x0_bs_rm_2)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
- tst r2, #0x00000007
- tsteq r3, #0x00000003
- beq sa11x0_bs_rm_2_fast
-
-sa11x0_bs_rm_2_loop:
- ldrh r1, [r0]
- subs r2, r2, #0x00000001
- strh r1, [r3], #0x0002
- bgt sa11x0_bs_rm_2_loop
-
- mov pc, lr
-
-sa11x0_bs_rm_2_fast:
- stmfd sp!, {r4, r5, lr}
-
-sa11x0_bs_rm_2_fastloop:
- ldrh r1, [r0]
- ldrh lr, [r0]
- orr r1, r1, lr, lsl #16
-
- ldrh r4, [r0]
- ldrh lr, [r0]
- orr r4, r4, lr, lsl #16
-
- ldrh r5, [r0]
- ldrh lr, [r0]
- orr r5, r5, lr, lsl #16
-
- ldrh ip, [r0]
- ldrh lr, [r0]
- orr ip, ip, lr, lsl #16
-
- stmia r3!, {r1, r4, r5, ip}
- subs r2, r2, #8
- bgt sa11x0_bs_rm_2_fastloop
-
- ldmfd sp!, {r4, r5, pc}
-
-
-ENTRY(sa11x0_bs_rm_4)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
-sa11x0_bs_rm_4_loop:
- ldr r1, [r0]
- subs r2, r2, #0x00000001
- str r1, [r3], #0x0004
- bgt sa11x0_bs_rm_4_loop
-
- mov pc, lr
-
-/*
- * write multiple
- */
-
-ENTRY(sa11x0_bs_wm_1)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
-sa11x0_wm_1_loop:
- ldrb r1, [r3], #0x0001
- subs r2, r2, #0x00000001
- strb r1, [r0]
- bgt sa11x0_wm_1_loop
-
- mov pc, lr
-
-ENTRY(sa11x0_bs_wm_2)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
-sa11x0_bs_wm_2_loop:
- ldrh r1, [r3], #0x0002
- subs r2, r2, #0x00000001
- strh r1, [r0]
- bgt sa11x0_bs_wm_2_loop
-
- mov pc, lr
-
-ENTRY(sa11x0_bs_wm_4)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
-sa11x0_bs_wm_4_loop:
- ldr r1, [r3], #0x0004
- subs r2, r2, #0x00000001
- str r1, [r0]
- bgt sa11x0_bs_wm_4_loop
-
- mov pc, lr
-
-/*
- * read region
- */
-
-ENTRY(sa11x0_bs_rr_2)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
-sa11x0_bs_rr_2_loop:
- ldrh r1, [r0], #0x0002
- strh r1, [r3], #0x0002
- subs r2, r2, #0x00000001
- bgt sa11x0_bs_rr_2_loop
-
- mov pc, lr
-
-/*
- * write region
- */
-
-ENTRY(sa11x0_bs_wr_2)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
-sa11x0_bs_wr_2_loop:
- ldrh r1, [r3], #0x0002
- strh r1, [r0], #0x0002
- subs r2, r2, #0x00000001
- bgt sa11x0_bs_wr_2_loop
-
- mov pc, lr
-
-/*
- * set regiuon
- */
-
-ENTRY(sa11x0_bs_sr_2)
- add r0, r1, r2
- ldr r2, [sp, #0]
- cmp r2, #0x00000000
- movle pc, lr
-
-sa11x0_bs_sr_2_loop:
- strh r3, [r0], #0x0002
- subs r2, r2, #0x00000001
- bgt sa11x0_bs_sr_2_loop
-
- mov pc, lr
-
-/*
- * copy region
- */
-
-ENTRY(sa11x0_bs_c_2)
- add r0, r1, r2
- ldr r2, [sp, #0]
- add r1, r2, r3
- ldr r2, [sp, #4]
- cmp r2, #0x00000000
- movle pc, lr
-
- cmp r0, r1
- blt sa11x0_bs_c_2_backwards
-
-sa11x0_bs_cf_2_loop:
- ldrh r3, [r0], #0x0002
- strh r3, [r1], #0x0002
- subs r2, r2, #0x00000001
- bgt sa11x0_bs_cf_2_loop
-
- mov pc, lr
-
-sa11x0_bs_c_2_backwards:
- add r0, r0, r2, lsl #1
- add r1, r1, r2, lsl #1
- sub r0, r0, #2
- sub r1, r1, #2
-
-sa11x0_bs_cb_2_loop:
- ldrh r3, [r0], #-2
- strh r3, [r1], #-2
- subs r2, r2, #1
- bne sa11x0_bs_cb_2_loop
-
- mov pc, lr
-
-/* end of sa11x0_io_asm.S */
--- sys/arm/sa11x0/uart_dev_sa1110.c
+++ /dev/null
@@ -1,307 +0,0 @@
-/*-
- * Copyright (c) 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/uart_dev_sa1110.c,v 1.2 2005/01/05 21:58:48 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/cons.h>
-#include <sys/tty.h>
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-#include <dev/uart/uart_bus.h>
-#include <arm/sa11x0/uart_dev_sa1110.h>
-
-#include "uart_if.h"
-
-#define DEFAULT_RCLK 3686400
-
-extern int got_mmu;
-
-/*
- * Low-level UART interface.
- */
-static int sa1110_probe(struct uart_bas *bas);
-static void sa1110_init(struct uart_bas *bas, int, int, int, int);
-static void sa1110_term(struct uart_bas *bas);
-static void sa1110_putc(struct uart_bas *bas, int);
-static int sa1110_poll(struct uart_bas *bas);
-static int sa1110_getc(struct uart_bas *bas);
-
-int did_mmu = 0;
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-
-struct uart_ops uart_sa1110_ops = {
- .probe = sa1110_probe,
- .init = sa1110_init,
- .term = sa1110_term,
- .putc = sa1110_putc,
- .poll = sa1110_poll,
- .getc = sa1110_getc,
-};
-
-static int
-sa1110_probe(struct uart_bas *bas)
-{
- return (0);
-}
-
-static void
-sa1110_addr_change(struct uart_bas *bas)
-{
-
- bas->bsh = 0xd000d000;
- did_mmu = 1;
-}
-
-static void
-sa1110_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
- int parity)
-{
- int brd;
-
- /* XXX: sigh. */
- if (!did_mmu && got_mmu)
- sa1110_addr_change(bas);
- if (bas->rclk == 0)
- bas->rclk = DEFAULT_RCLK;
- while (uart_getreg(bas, SACOM_SR1) & SR1_TBY);
- uart_setreg(bas, SACOM_CR3, 0);
- brd = SACOMSPEED(baudrate);
- uart_setreg(bas, SACOM_CR1, brd >> 8);
- uart_setreg(bas, SACOM_CR2, brd & 0xff);
- uart_setreg(bas, SACOM_CR3, CR3_RXE | CR3_TXE);
-}
-
-static void
-sa1110_term(struct uart_bas *bas)
-{
- /* XXX */
-}
-
-static void
-sa1110_putc(struct uart_bas *bas, int c)
-{
- /* XXX: sigh. */
- if (!did_mmu && got_mmu)
- sa1110_addr_change(bas);
-
- while (!uart_getreg(bas, SACOM_SR1) & SR1_TNF);
- uart_setreg(bas, SACOM_DR, c);
-}
-
-static int
-sa1110_poll(struct uart_bas *bas)
-{
- /* XXX: sigh. */
- if (!did_mmu && got_mmu)
- sa1110_addr_change(bas);
-
- if (!(uart_getreg(bas, SACOM_SR1) & SR1_RNE))
- return (-1);
- return (uart_getreg(bas, SACOM_DR) & 0xff);
-}
-
-static int
-sa1110_getc(struct uart_bas *bas)
-{
- int c;
- /* XXX: sigh. */
- if (!did_mmu && got_mmu)
- sa1110_addr_change(bas);
-
- while (!(uart_getreg(bas, SACOM_SR1) & SR1_RNE)) {
- u_int32_t sr0;
-
- sr0 = uart_getreg(bas, SACOM_SR0);
- if (ISSET(sr0, SR0_RBB))
- uart_setreg(bas, SACOM_SR0, SR0_RBB);
- if (ISSET(sr0, SR0_REB))
- uart_setreg(bas, SACOM_SR0, SR0_REB);
- }
- c = uart_getreg(bas, SACOM_DR);
- c &= 0xff;
- return (c);
-}
-
-static int sa1110_bus_probe(struct uart_softc *sc);
-static int sa1110_bus_attach(struct uart_softc *sc);
-static int sa1110_bus_flush(struct uart_softc *, int);
-static int sa1110_bus_getsig(struct uart_softc *);
-static int sa1110_bus_ioctl(struct uart_softc *, int, intptr_t);
-static int sa1110_bus_ipend(struct uart_softc *);
-static int sa1110_bus_param(struct uart_softc *, int, int, int, int);
-static int sa1110_bus_receive(struct uart_softc *);
-static int sa1110_bus_setsig(struct uart_softc *, int);
-static int sa1110_bus_transmit(struct uart_softc *);
-
-static kobj_method_t sa1110_methods[] = {
- KOBJMETHOD(uart_probe, sa1110_bus_probe),
- KOBJMETHOD(uart_attach, sa1110_bus_attach),
- KOBJMETHOD(uart_flush, sa1110_bus_flush),
- KOBJMETHOD(uart_getsig, sa1110_bus_getsig),
- KOBJMETHOD(uart_ioctl, sa1110_bus_ioctl),
- KOBJMETHOD(uart_ipend, sa1110_bus_ipend),
- KOBJMETHOD(uart_param, sa1110_bus_param),
- KOBJMETHOD(uart_receive, sa1110_bus_receive),
- KOBJMETHOD(uart_setsig, sa1110_bus_setsig),
- KOBJMETHOD(uart_transmit, sa1110_bus_transmit),
-
- {0, 0 }
-};
-
-int
-sa1110_bus_probe(struct uart_softc *sc)
-{
- return (0);
-}
-
-static int
-sa1110_bus_attach(struct uart_softc *sc)
-{
- bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-
- sc->sc_txfifosz = 3;
- sc->sc_rxfifosz = 1;
- sc->sc_hwiflow = 0;
- uart_setreg(&sc->sc_bas, SACOM_CR3, CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE);
- return (0);
-}
-static int
-sa1110_bus_transmit(struct uart_softc *sc)
-{
- int i;
-#if 0
- int sr = uart_getreg(&sc->sc_bas, SACOM_SR0);
-
- while (!(uart_getreg(&sc->sc_bas, SACOM_CR3) & CR3_TIE))
- uart_setreg(&sc->sc_bas, SACOM_CR3,
- uart_getreg(&sc->sc_bas, SACOM_CR3) | CR3_TIE);
-#endif
-
- sc->sc_txbusy = 1;
- uart_setreg(&sc->sc_bas, SACOM_CR3, uart_getreg(&sc->sc_bas, SACOM_CR3)
- | CR3_TIE);
- for (i = 0; i < sc->sc_txdatasz; i++) {
- while (!uart_getreg(&sc->sc_bas, SACOM_SR1) & SR1_TNF);
-
- uart_setreg(&sc->sc_bas, SACOM_DR, sc->sc_txbuf[i]);
- uart_barrier(&sc->sc_bas);
- }
-#if 0
- sr = uart_getreg(&sc->sc_bas, SACOM_SR0);
-#endif
-
- return (0);
-}
-static int
-sa1110_bus_setsig(struct uart_softc *sc, int sig)
-{
- return (0);
-}
-static int
-sa1110_bus_receive(struct uart_softc *sc)
-{
-
-#if 0
- while (!(uart_getreg(&sc->sc_bas, SACOM_SR1) & SR1_RNE)) {
- u_int32_t sr0;
-
- sr0 = uart_getreg(&sc->sc_bas, SACOM_SR0);
- if (ISSET(sr0, SR0_RBB))
- uart_setreg(&sc->sc_bas, SACOM_SR0, SR0_RBB);
- if (ISSET(sr0, SR0_REB))
- uart_setreg(&sc->sc_bas, SACOM_SR0, SR0_REB);
- }
-#endif
-
- uart_setreg(&sc->sc_bas, SACOM_CR3, uart_getreg(&sc->sc_bas, SACOM_CR3)
- | CR3_RIE);
- uart_rx_put(sc, uart_getreg(&sc->sc_bas, SACOM_DR));
- return (0);
-}
-static int
-sa1110_bus_param(struct uart_softc *sc, int baudrate, int databits,
- int stopbits, int parity)
-{
- int brd;
-
- if (baudrate > 0) {
- brd = SACOMSPEED(baudrate);
- uart_setreg(&sc->sc_bas, SACOM_CR1, brd >> 8);
- uart_setreg(&sc->sc_bas, SACOM_CR2, brd & 0xff);
- }
- return (0);
-}
-static int
-sa1110_bus_ipend(struct uart_softc *sc)
-{
- int sr = uart_getreg(&sc->sc_bas, SACOM_SR0);
- int ipend = 0;
- int mask = CR3_RIE | CR3_TIE;
- if (sr & 1) {
- if (uart_getreg(&sc->sc_bas, SACOM_CR3) & CR3_TIE)
- ipend |= UART_IPEND_TXIDLE;
- mask &= ~CR3_TIE;
- }
- if (sr & 4) {
- if (uart_getreg(&sc->sc_bas, SACOM_CR3) & CR3_RIE)
- ipend |= UART_IPEND_RXREADY;
- mask &= ~CR3_RIE;
- }
- uart_setreg(&sc->sc_bas, SACOM_CR3, CR3_RXE | mask);
- return (ipend);
-}
-static int
-sa1110_bus_flush(struct uart_softc *sc, int what)
-{
- return (0);
-}
-
-static int
-sa1110_bus_getsig(struct uart_softc *sc)
-{
- return (0);
-}
-
-static int
-sa1110_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
-{
- return (EINVAL);
-}
-struct uart_class uart_sa1110_class = {
- "sa1110 class",
- sa1110_methods,
- 1,
- .uc_range = 8,
- .uc_rclk = 3686400
-};
--- sys/arm/sa11x0/files.sa11x0
+++ /dev/null
@@ -1,11 +0,0 @@
-# $FreeBSD: src/sys/arm/sa11x0/files.sa11x0,v 1.2 2004/05/14 13:26:52 cognet Exp $
-arm/sa11x0/assabet_machdep.c optional assabet
-arm/sa11x0/sa11x0.c optional saip
-arm/sa11x0/sa11x0_ost.c optional saip
-arm/sa11x0/sa11x0_io.c optional saip
-arm/sa11x0/sa11x0_io_asm.S optional saip
-arm/sa11x0/sa11x0_irq.S optional saip
-arm/sa11x0/sa11x0_irqhandler.c optional saip
-arm/sa11x0/uart_cpu_sa1110.c optional uart saip
-arm/sa11x0/uart_dev_sa1110.c optional uart saip
-arm/sa11x0/uart_bus_sa1110.c optional uart saip
--- sys/arm/sa11x0/sa11x0.c
+++ /dev/null
@@ -1,255 +0,0 @@
-/* $NetBSD: sa11x0.c,v 1.14 2003/07/15 00:24:50 lukem Exp $ */
-
-/*-
- * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- */
-/*-
- * Copyright (c) 1999
- * Shin Takemura and PocketBSD Project. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the PocketBSD project
- * and its contributors.
- * 4. Neither the name of the project nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/sa11x0.c,v 1.4 2004/09/23 22:33:38 cognet Exp $");
-
-#define __RMAN_RESOURCE_VISIBLE
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/reboot.h>
-#include <sys/types.h>
-#include <sys/malloc.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/module.h>
-
-#include <vm/vm.h>
-#include <vm/vm_extern.h>
-
-#include <machine/cpu.h>
-#include <machine/bus.h>
-#include <machine/intr.h>
-#include <arm/sa11x0/sa11x0_reg.h>
-#include <arm/sa11x0/sa11x0_var.h>
-#include <arm/sa11x0/sa11x0_dmacreg.h>
-#include <arm/sa11x0/sa11x0_ppcreg.h>
-#include <arm/sa11x0/sa11x0_gpioreg.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-
-extern void sa11x0_activateirqs(void);
-
-static struct resource *sa1110_alloc_resource(device_t, device_t, int, int *,
- u_long, u_long, u_long, u_int);
-
-static int sa1110_activate_resource(device_t, device_t, int, int,
- struct resource *);
-static int sa1110_setup_intr(device_t, device_t, struct resource *, int,
- driver_intr_t *, void *, void **);
-
-struct sa11x0_softc *sa11x0_softc; /* There can be only one. */
-
-static int
-sa1110_setup_intr(device_t dev, device_t child,
- struct resource *ires, int flags, driver_intr_t *intr, void *arg,
- void **cookiep)
-{
- int saved_cpsr;
-
- if (flags & INTR_TYPE_TTY)
- ires->r_start = 15;
- else if (flags & INTR_TYPE_CLK) {
- if (ires->r_start == 0)
- ires->r_start = 26;
- else
- ires->r_start = 27;
- }
- saved_cpsr = SetCPSR(I32_bit, I32_bit);
-
- SetCPSR(I32_bit, saved_cpsr & I32_bit);
- BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags, intr, arg,
- cookiep);
- return (0);
-}
-
-static struct resource *
-sa1110_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
-{
- struct resource *res = malloc(sizeof(*res), M_DEVBUF, M_WAITOK);
-/* XXX */
- res->r_start = *rid;
- return (res);
-}
-static int
-sa1110_activate_resource(device_t bus, device_t child, int type, int rid,
- struct resource *r)
-{
- return (0);
-}
-/* prototypes */
-static int sa11x0_probe(device_t);
-static int sa11x0_attach(device_t);
-static void sa11x0_identify(driver_t *, device_t);
-
-extern vm_offset_t saipic_base;
-
-
-int
-sa11x0_probe(device_t dev)
-{
- return 0;
-}
-
-void
-sa11x0_identify(driver_t *driver, device_t parent)
-{
-
- BUS_ADD_CHILD(parent, 0, "saip", 0);
-}
-
-int
-sa11x0_attach(device_t dev)
-{
- struct sa11x0_softc *sc = device_get_softc(dev);
- int unit = device_get_unit(dev);
- sc->sc_iot = &sa11x0_bs_tag;
-
- sa11x0_softc = sc;
-
- /* Map the SAIP */
-
- if (bus_space_map(sc->sc_iot, SAIPIC_BASE, SAIPIC_NPORTS,
- 0, &sc->sc_ioh))
- panic("saip%d: Cannot map registers", unit);
- saipic_base = sc->sc_ioh;
-
- /* Map the GPIO registers */
- if (bus_space_map(sc->sc_iot, SAGPIO_BASE, SAGPIO_NPORTS,
- 0, &sc->sc_gpioh))
- panic("saip%d: unable to map GPIO registers", unit);
- bus_space_write_4(sc->sc_iot, sc->sc_gpioh, SAGPIO_EDR, 0xffffffff);
-
- /* Map the PPC registers */
- if (bus_space_map(sc->sc_iot, SAPPC_BASE, SAPPC_NPORTS,
- 0, &sc->sc_ppch))
- panic("saip%d: unable to map PPC registers", unit);
-
-#if 0
- /* Map the DMA controller registers */
- if (bus_space_map(sc->sc_iot, SADMAC_BASE, SADMAC_NPORTS,
- 0, &sc->sc_dmach))
- panic("saip%d: unable to map DMAC registers", unit);
-#endif
- /* Map the reset controller registers */
- if (bus_space_map(sc->sc_iot, SARCR_BASE, PAGE_SIZE,
- 0, &sc->sc_reseth))
- panic("saip%d: unable to map reset registers", unit);
- printf("\n");
-
-
- /*
- * Mask all interrupts.
- * They are later unmasked at each device's attach routine.
- */
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAIPIC_MR, 0);
-
- /* Route all bits to IRQ */
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAIPIC_LR, 0);
-
- /* Exit idle mode only when unmasked intr is received */
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, SAIPIC_CR, 1);
-#if 0
- /* disable all DMAC channels */
- bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR0_CLR, 1);
- bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR1_CLR, 1);
- bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR2_CLR, 1);
- bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR3_CLR, 1);
- bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR4_CLR, 1);
- bus_space_write_4(sc->sc_iot, sc->sc_dmach, SADMAC_DCR5_CLR, 1);
-#endif
- /*
- * XXX this is probably a bad place, but intr bit shouldn't be
- * XXX enabled before intr mask is set.
- * XXX Having sane imask[] suffice??
- */
-#if 0
- SetCPSR(I32_bit, 0);
-#endif
- /*
- * Attach each devices
- */
- device_add_child(dev, "uart", 0);
- device_add_child(dev, "saost", 0);
- bus_generic_probe(dev);
- bus_generic_attach(dev);
- sa11x0_activateirqs();
- return (0);
-}
-
-static device_method_t saip_methods[] = {
- DEVMETHOD(device_probe, sa11x0_probe),
- DEVMETHOD(device_attach, sa11x0_attach),
- DEVMETHOD(device_identify, sa11x0_identify),
- DEVMETHOD(bus_alloc_resource, sa1110_alloc_resource),
- DEVMETHOD(bus_activate_resource, sa1110_activate_resource),
- DEVMETHOD(bus_setup_intr, sa1110_setup_intr),
- {0, 0},
-};
-
-static driver_t saip_driver = {
- "saip",
- saip_methods,
- sizeof(struct sa11x0_softc),
-};
-static devclass_t saip_devclass;
-
-DRIVER_MODULE(saip, nexus, saip_driver, saip_devclass, 0, 0);
--- sys/arm/sa11x0/uart_bus_sa1110.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*-
- * Copyright (c) 2004 Olivier Houchard. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/uart_bus_sa1110.c,v 1.3 2005/01/05 21:58:48 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-
-#include <dev/pci/pcivar.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_bus.h>
-#include <dev/uart/uart_cpu.h>
-#include <arm/sa11x0/uart_dev_sa1110.h>
-
-#include "uart_if.h"
-
-static int uart_sa1110_probe(device_t dev);
-
-extern struct uart_class uart_sa1110_class;
-
-static device_method_t uart_sa1110_methods[] = {
- /* Device interface */
- DEVMETHOD(device_probe, uart_sa1110_probe),
- DEVMETHOD(device_attach, uart_bus_attach),
- DEVMETHOD(device_detach, uart_bus_detach),
- { 0, 0 }
-};
-
-static driver_t uart_sa1110_driver = {
- uart_driver_name,
- uart_sa1110_methods,
- sizeof(struct uart_softc),
-};
-
-extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
-static int
-uart_sa1110_probe(device_t dev)
-{
- struct uart_softc *sc;
-
- sc = device_get_softc(dev);
- sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
- sc->sc_class = &uart_sa1110_class;
- bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
- return(uart_bus_probe(dev, 0, 0, 0, 0));
- return (0);
-}
-
-
-DRIVER_MODULE(uart, saip, uart_sa1110_driver, uart_devclass, 0, 0);
--- sys/arm/sa11x0/sa11x0_io.c
+++ /dev/null
@@ -1,230 +0,0 @@
-/* $NetBSD: sa11x0_io.c,v 1.12 2003/07/15 00:24:51 lukem Exp $ */
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Ichiro FUKUHARA.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Mark Brinicombe.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * bus_space I/O functions for sa11x0
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/sa11x0_io.c,v 1.6 2005/04/13 16:02:03 cognet Exp $");
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/queue.h>
-#include <sys/types.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_kern.h>
-
-#include <machine/bus.h>
-#include <machine/pmap.h>
-
-/* Proto types for all the bus_space structure functions */
-
-bs_protos(sa11x0);
-
-/* Declare the sa11x0 bus space tag */
-
-struct bus_space sa11x0_bs_tag = {
- /* cookie */
- NULL,
-
- /* mapping/unmapping */
- sa11x0_bs_map,
- sa11x0_bs_unmap,
- sa11x0_bs_subregion,
-
- /* allocation/deallocation */
- sa11x0_bs_alloc,
- sa11x0_bs_free,
-
- /* barrier */
- sa11x0_bs_barrier,
-
- /* read (single) */
- sa11x0_bs_r_1,
- sa11x0_bs_r_2,
- sa11x0_bs_r_4,
- NULL,
-
- /* read multiple */
- sa11x0_bs_rm_1,
- sa11x0_bs_rm_2,
- sa11x0_bs_rm_4,
- NULL,
-
- /* read region */
- NULL,
- sa11x0_bs_rr_2,
- NULL,
- NULL,
- /* write (single) */
- sa11x0_bs_w_1,
- sa11x0_bs_w_2,
- sa11x0_bs_w_4,
- NULL,
-
- /* write multiple */
- sa11x0_bs_wm_1,
- sa11x0_bs_wm_2,
- sa11x0_bs_wm_4,
- NULL,
-
- /* write region */
- NULL,
- sa11x0_bs_wr_2,
- NULL,
- NULL,
-
- /* set multiple */
- NULL,
- NULL,
- NULL,
- NULL,
-
- /* set region */
- NULL,
- sa11x0_bs_sr_2,
- NULL,
- NULL,
-
- /* copy */
- NULL,
- sa11x0_bs_c_2,
- NULL,
- NULL,
-};
-
-/* bus space functions */
-
-int
-sa11x0_bs_map(t, bpa, size, cacheable, bshp)
- void *t;
- bus_addr_t bpa;
- bus_size_t size;
- int cacheable;
- bus_space_handle_t *bshp;
-{
- u_long startpa, endpa, pa;
- vm_offset_t va;
- pt_entry_t *pte;
-
- startpa = trunc_page(bpa);
- endpa = round_page(bpa + size);
-
- /* XXX use extent manager to check duplicate mapping */
-
- va = kmem_alloc(kernel_map, endpa - startpa);
- if (! va)
- return(ENOMEM);
-
- *bshp = (bus_space_handle_t)(va + (bpa - startpa));
-
- for(pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
- pmap_kenter(va, pa);
- pte = vtopte(va);
- if (cacheable == 0) {
- *pte &= ~L2_S_CACHE_MASK;
- PTE_SYNC(pte);
- }
- }
- return(0);
-}
-
-int
-sa11x0_bs_alloc(t, rstart, rend, size, alignment, boundary, cacheable,
- bpap, bshp)
- void *t;
- bus_addr_t rstart, rend;
- bus_size_t size, alignment, boundary;
- int cacheable;
- bus_addr_t *bpap;
- bus_space_handle_t *bshp;
-{
- panic("sa11x0_alloc(): Help!");
-}
-
-
-void
-sa11x0_bs_unmap(t, size)
- void *t;
- bus_size_t size;
-{
- /*
- * Temporary implementation
- */
-}
-
-void
-sa11x0_bs_free(t, bsh, size)
- void *t;
- bus_space_handle_t bsh;
- bus_size_t size;
-{
-
- panic("sa11x0_free(): Help!");
- /* sa11x0_unmap() does all that we need to do. */
-/* sa11x0_unmap(t, bsh, size);*/
-}
-
-int
-sa11x0_bs_subregion(t, bsh, offset, size, nbshp)
- void *t;
- bus_space_handle_t bsh;
- bus_size_t offset, size;
- bus_space_handle_t *nbshp;
-{
-
- *nbshp = bsh + offset;
- return (0);
-}
-
-void
-sa11x0_bs_barrier(t, bsh, offset, len, flags)
- void *t;
- bus_space_handle_t bsh;
- bus_size_t offset, len;
- int flags;
-{
-/* NULL */
-}
-
-/* End of sa11x0_io.c */
--- sys/arm/sa11x0/uart_dev_sa1110.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*-
- * Copyright (c) 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/sa11x0/uart_dev_sa1110.h,v 1.2 2005/01/05 21:58:48 imp Exp $
- */
-
-#ifndef _DEV_UART_DEV_SA1110_H_
-#define _DEV_UART_DEV_SA1110_H_
-
-#define SACOM_FREQ (3686400 / 16)
-#define SACOMSPEED(b) (SACOM_FREQ / (b) - 1)
-
-/* UART control register 0 */
-#define SACOM_CR0 0x00
-#define CR0_PE 0x01 /* Parity enable */
-#define CR0_OES 0x02 /* Odd/even parity select */
-#define CR0_SBS 0x04 /* Stop bit select */
-#define CR0_DSS 0x08 /* Data size select */
-#define CR0_SCE 0x10 /* Sample clock enable */
-#define CR0_RCE 0x20 /* Receive clock edge enable */
-#define CR0_TCE 0x40 /* Transmit clock edge enable */
-
-/* UART control register 1 and 2 - baud rate divisor */
-#define SACOM_CR1 0x04
-#define SACOM_CR2 0x08
-
-/* UART control register 3 */
-#define SACOM_CR3 0x0C
-#define CR3_RXE 0x01 /* Receiver enable */
-#define CR3_TXE 0x02 /* Transmitter enable */
-#define CR3_BRK 0x04 /* Break */
-#define CR3_RIE 0x08 /* Receive FIFO interrupt enable */
-#define CR3_TIE 0x10 /* Transmit FIFO interrupt enable */
-#define CR3_LBM 0x20 /* Loopback mode */
-
-/* UART data register */
-#define SACOM_DR 0x14
-#define DR_PRE 0x100 /* Parity error */
-#define DR_FRE 0x200 /* Framing error */
-#define DR_ROR 0x400 /* Receiver overrun */
-
-/* UART status register 0 */
-#define SACOM_SR0 0x1C
-#define SR0_TFS 0x01 /* Transmit FIFO service request */
-#define SR0_RFS 0x02 /* Receive FIFO service request */
-#define SR0_RID 0x04 /* Receiver idle */
-#define SR0_RBB 0x08 /* Receiver begin of break */
-#define SR0_REB 0x10 /* Receiver end of break */
-#define SR0_EIF 0x20 /* Error in FIFO */
-
-/* UART status register 1 */
-#define SACOM_SR1 0x20
-#define SR1_TBY 0x01 /* Transmitter busy */
-#define SR1_RNE 0x02 /* Receive FIFO not empty */
-#define SR1_TNF 0x04 /* Transmit FIFO not full */
-#define SR1_PRE 0x08 /* Parity error */
-#define SR1_FRE 0x10 /* Framing error */
-#define SR1_ROR 0x20 /* Receive FIFO overrun */
-
-#define ISSET(a, b) ((a) & (b))
-#endif
--- sys/arm/sa11x0/sa11x0_ostreg.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/* $NetBSD: sa11x0_ostreg.h,v 1.1 2001/07/08 23:37:53 rjs Exp $ */
-
-/*-
- * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Ichiro FUKUHARA.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/sa11x0/sa11x0_ostreg.h,v 1.1 2004/05/14 11:46:45 cognet Exp $
- *
- */
-
-/*
- * SA-11x0 OS Timer Register
- */
-
-/* OS Timer Match Register */
-#define SAOST_MR0 0x00
-#define SAOST_MR1 0x04
-#define SAOST_MR2 0x08
-#define SAOST_MR3 0x0C
-
-/* OS Timer Count Register */
-#define SAOST_CR 0x10
-
-/* OS Timer Status Register */
-#define SAOST_SR 0x14
-#define SR_CH0 (1<<0)
-#define SR_CH1 (1<<1)
-#define SR_CH2 (1<<2)
-#define SR_CH3 (1<<3)
-
-/* OS Timer Watchdog Match Enable Register */
-#define SAOST_WR 0x18
-
-/* OS Timer Interrupt Enable Register */
-#define SAOST_IR 0x1C
-
-/*
- * SA-1110 Real Time Clock
- */
-
-/* RTC Alarm Register */
-#define SARTC_AR 0x00
-
-/* RTC Counter Register */
-#define SARTC_CR 0x04
-
-/* RTC Trim Register */
-#define SARTC_TR 0x08
-
-/* RTC Status Register */
-#define SARTC_SR 0x0C
-
-/* end of sa11x0_ostreg.h */
--- sys/arm/sa11x0/sa11x0_ost.c
+++ /dev/null
@@ -1,356 +0,0 @@
-/* $NetBSD: sa11x0_ost.c,v 1.11 2003/07/15 00:24:51 lukem Exp $ */
-
-/*-
- * Copyright (c) 1997 Mark Brinicombe.
- * Copyright (c) 1997 Causality Limited.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/sa11x0_ost.c,v 1.3 2005/01/05 21:58:48 imp Exp $");
-
-#include <sys/types.h>
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/time.h>
-#include <sys/bus.h>
-#include <sys/clock.h>
-#include <sys/module.h>
-
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
-#include <machine/intr.h>
-
-#include <machine/cpufunc.h>
-
-#include <machine/katelib.h>
-
-#include <arm/sa11x0/sa11x0_reg.h>
-#include <arm/sa11x0/sa11x0_var.h>
-#include <arm/sa11x0/sa11x0_ostreg.h>
-
-static int saost_probe(device_t);
-static int saost_attach(device_t);
-
-int gettick(void);
-static void clockintr(void *);
-#if 0
-static void statintr(void *);
-#endif
-void rtcinit(void);
-
-#if 0
-static struct mtx clock_lock;
-#endif
-
-struct saost_softc {
- device_t sc_dev;
- bus_addr_t sc_baseaddr;
- bus_space_tag_t sc_iot;
- bus_space_handle_t sc_ioh;
-
- u_int32_t sc_clock_count;
- u_int32_t sc_statclock_count;
- u_int32_t sc_statclock_step;
-};
-
-static struct saost_softc *saost_sc = NULL;
-
-#define TIMER_FREQUENCY 3686400 /* 3.6864MHz */
-#define TICKS_PER_MICROSECOND (TIMER_FREQUENCY/1000000)
-
-#ifndef STATHZ
-#define STATHZ 64
-#endif
-
-static device_method_t saost_methods[] = {
- DEVMETHOD(device_probe, saost_probe),
- DEVMETHOD(device_attach, saost_attach),
- {0, 0},
-};
-
-static driver_t saost_driver = {
- "saost",
- saost_methods,
- sizeof(struct saost_softc),
-};
-static devclass_t saost_devclass;
-
-DRIVER_MODULE(saost, saip, saost_driver, saost_devclass, 0, 0);
-static int
-saost_probe(device_t dev)
-{
-
- return (0);
-}
-
-static int
-saost_attach(device_t dev)
-{
- struct saost_softc *sc = device_get_softc(dev);
- struct sa11x0_softc *sa = device_get_softc(device_get_parent(dev));
-
- sc->sc_dev = dev;
- sc->sc_iot = sa->sc_iot;
- sc->sc_baseaddr = 0x90000000;
-
- saost_sc = sc;
-
- if(bus_space_map(sa->sc_iot, sc->sc_baseaddr, 8, 0,
- &sc->sc_ioh))
- panic("%s: Cannot map registers", device_get_name(dev));
-
- /* disable all channel and clear interrupt status */
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_IR, 0);
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_SR, 0xf);
- return (0);
-
-}
-
-static void
-clockintr(arg)
- void *arg;
-{
- struct clockframe *frame = arg;
- u_int32_t oscr, nextmatch, oldmatch;
- int s;
-
-#if 0
- mtx_lock_spin(&clock_lock);
-#endif
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_SR, 1);
-
- /* schedule next clock intr */
- oldmatch = saost_sc->sc_clock_count;
- nextmatch = oldmatch + TIMER_FREQUENCY / hz;
-
- oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_CR);
-
- if ((nextmatch > oldmatch &&
- (oscr > nextmatch || oscr < oldmatch)) ||
- (nextmatch < oldmatch && oscr > nextmatch && oscr < oldmatch)) {
- /*
- * we couldn't set the matching register in time.
- * just set it to some value so that next interrupt happens.
- * XXX is it possible to compansate lost interrupts?
- */
-
- s = splhigh();
- oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_CR);
- nextmatch = oscr + 10;
- splx(s);
- }
- saost_sc->sc_clock_count = nextmatch;
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR0,
- nextmatch);
- hardclock(frame);
-#if 0
- mtx_unlock_spin(&clock_lock);
-#endif
-}
-
-#if 0
-static void
-statintr(arg)
- void *arg;
-{
- struct clockframe *frame = arg;
- u_int32_t oscr, nextmatch, oldmatch;
- int s;
-
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_SR, 2);
-
- /* schedule next clock intr */
- oldmatch = saost_sc->sc_statclock_count;
- nextmatch = oldmatch + saost_sc->sc_statclock_step;
-
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR1,
- nextmatch);
- oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_CR);
-
- if ((nextmatch > oldmatch &&
- (oscr > nextmatch || oscr < oldmatch)) ||
- (nextmatch < oldmatch && oscr > nextmatch && oscr < oldmatch)) {
- /*
- * we couldn't set the matching register in time.
- * just set it to some value so that next interrupt happens.
- * XXX is it possible to compansate lost interrupts?
- */
-
- s = splhigh();
- oscr = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_CR);
- nextmatch = oscr + 10;
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_MR1, nextmatch);
- splx(s);
- }
-
- saost_sc->sc_statclock_count = nextmatch;
- statclock(frame);
-
-}
-#endif
-
-#if 0
-void
-setstatclockrate(int hz)
-{
- u_int32_t count;
-
- saost_sc->sc_statclock_step = TIMER_FREQUENCY / hz;
- count = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_CR);
- count += saost_sc->sc_statclock_step;
- saost_sc->sc_statclock_count = count;
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_MR1, count);
-}
-#endif
-void
-cpu_initclocks()
-{
- device_t dev = saost_sc->sc_dev;
-
- stathz = STATHZ;
- profhz = stathz;
-#if 0
- mtx_init(&clock_lock, "SA1110 Clock locké", NULL, MTX_SPIN);
-#endif
- saost_sc->sc_statclock_step = TIMER_FREQUENCY / stathz;
- struct resource *irq1, *irq2;
- int rid = 0;
- void *ih1/*, *ih2 */;
-
- printf("clock: hz=%d stathz = %d\n", hz, stathz);
-
- /* Use the channels 0 and 1 for hardclock and statclock, respectively */
- saost_sc->sc_clock_count = TIMER_FREQUENCY / hz;
- saost_sc->sc_statclock_count = TIMER_FREQUENCY / stathz;
-
- irq1 = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0,
- ~0, 1, RF_ACTIVE);
- rid = 1;
- irq2 = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
- RF_ACTIVE);
- bus_setup_intr(dev, irq1, INTR_TYPE_CLK | INTR_FAST, clockintr, NULL,
- &ih1);
-#if 0
- bus_setup_intr(dev, irq2, INTR_TYPE_CLK | INTR_FAST, statintr, NULL
- ,&ih2);
-#endif
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_SR, 0xf);
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_IR, 3);
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR0,
- saost_sc->sc_clock_count);
-#if 0
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_MR1,
- 0);
-#endif
- /* Zero the counter value */
- bus_space_write_4(saost_sc->sc_iot, saost_sc->sc_ioh, SAOST_CR, 0);
-}
-
-int
-gettick()
-{
- int counter;
- u_int savedints;
- savedints = disable_interrupts(I32_bit);
-
- counter = bus_space_read_4(saost_sc->sc_iot, saost_sc->sc_ioh,
- SAOST_CR);
-
- restore_interrupts(savedints);
- return counter;
-}
-
-void
-DELAY(usecs)
- int usecs;
-{
- u_int32_t tick, otick, delta;
- int j, csec, usec;
-
- csec = usecs / 10000;
- usec = usecs % 10000;
-
- usecs = (TIMER_FREQUENCY / 100) * csec
- + (TIMER_FREQUENCY / 100) * usec / 10000;
-
- if (! saost_sc) {
- /* clock isn't initialized yet */
- for(; usecs > 0; usecs--)
- for(j = 100; j > 0; j--)
- ;
- return;
- }
-
-#if 0
- mtx_lock_spin(&clock_lock);
-#endif
- otick = gettick();
-
- while (1) {
- for(j = 100; j > 0; j--)
- ;
- tick = gettick();
- delta = tick - otick;
- if (delta > usecs) {
- break;
- }
- usecs -= delta;
- otick = tick;
- }
-#if 0
- mtx_unlock_spin(&clock_lock);
-#endif
-}
-
-void
-cpu_startprofclock(void)
-{
- printf("STARTPROFCLOCK\n");
-}
-
-void
-cpu_stopprofclock(void)
-{
-}
--- sys/arm/sa11x0/uart_cpu_sa1110.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*-
- * Copyright (c) 2003 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/uart_cpu_sa1110.c,v 1.3 2005/01/05 21:58:48 imp Exp $");
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/bus.h>
-#include <sys/cons.h>
-#include <machine/bus.h>
-
-#include <dev/uart/uart.h>
-#include <dev/uart/uart_cpu.h>
-
-#include <arm/sa11x0/sa11x0_var.h>
-
-bus_space_tag_t uart_bus_space_io;
-bus_space_tag_t uart_bus_space_mem;
-
-extern struct uart_ops uart_sa1110_ops;
-
-int
-uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
-{
- return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
-}
-
-extern int got_mmu;
-
-int
-uart_cpu_getdev(int devtype, struct uart_devinfo *di)
-{
- di->ops = uart_sa1110_ops;
- di->bas.chan = 0;
- di->bas.bst = &sa11x0_bs_tag;
- di->bas.bsh = 0x80010000;
- di->bas.regshft = 0;
- di->bas.rclk = 0;
- di->baudrate = 9600;
- di->databits = 8;
- di->stopbits = 1;
- di->parity = UART_PARITY_NONE;
- uart_bus_space_io = &sa11x0_bs_tag;
- uart_bus_space_mem = NULL;
-
- return (0);
-}
--- sys/arm/sa11x0/sa11x0_ppcreg.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* $NetBSD: sa11x0_ppcreg.h,v 1.2 2001/07/30 12:19:04 rjs Exp $ */
-
-/*-
- * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/sa11x0/sa11x0_ppcreg.h,v 1.1 2004/05/14 11:46:45 cognet Exp $
- *
- */
-
-/* SA11[01]0 PPC (peripheral pin controller) */
-
-/* size of I/O space */
-#define SAPPC_NPORTS 13
-
-#define SAPPC_PDR 0x00 /* pin direction register */
-
-#define SAPPC_PSR 0x04 /* pin state register */
-
-#define SAPPC_PAR 0x08 /* pin assignment register */
-#define PAR_UPR 0x01000 /* UART pin assignment */
-#define PAR_SPR 0x40000 /* SSP pin assignment */
-
-#define SAPPC_SDR 0x0C /* sleep mode direction register */
-
-#define SAPPC_PFR 0x10 /* pin flag register */
-#define PFR_LCD 0x00001 /* LCD controller flag */
-#define PFR_SP1TX 0x01000 /* serial port 1 Tx flag */
-#define PFR_SP1RX 0x02000 /* serial port 1 Rx flag */
-#define PFR_SP2TX 0x04000 /* serial port 2 Tx flag */
-#define PFR_SP2RX 0x08000 /* serial port 2 Rx flag */
-#define PFR_SP3TX 0x10000 /* serial port 3 Tx flag */
-#define PFR_SP3RX 0x20000 /* serial port 3 Rx flag */
-#define PFR_SP4 0x40000 /* serial port 4 flag */
-
-/* MCP control register 1 */
-#define SAMCP_CR1 0x30 /* MCP control register 1 */
--- sys/arm/sa11x0/assabet_machdep.c
+++ /dev/null
@@ -1,422 +0,0 @@
-/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
-
-/*-
- * Copyright (c) 1994-1998 Mark Brinicombe.
- * Copyright (c) 1994 Brini.
- * All rights reserved.
- *
- * This code is derived from software written for Brini by Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Brini.
- * 4. The name of the company nor the name of the author may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * RiscBSD kernel project
- *
- * machdep.c
- *
- * Machine dependant functions for kernel setup
- *
- * This file needs a lot of work.
- *
- * Created : 17/09/94
- */
-
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/arm/sa11x0/assabet_machdep.c,v 1.9 2005/01/05 21:58:48 imp Exp $");
-
-#include "opt_md.h"
-
-#define _ARM32_BUS_DMA_PRIVATE
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/sysproto.h>
-#include <sys/signalvar.h>
-#include <sys/imgact.h>
-#include <sys/kernel.h>
-#include <sys/ktr.h>
-#include <sys/linker.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
-#include <sys/mutex.h>
-#include <sys/pcpu.h>
-#include <sys/proc.h>
-#include <sys/ptrace.h>
-#include <sys/cons.h>
-#include <sys/bio.h>
-#include <sys/bus.h>
-#include <sys/buf.h>
-#include <sys/exec.h>
-#include <sys/kdb.h>
-#include <machine/reg.h>
-#include <machine/cpu.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_pager.h>
-#include <vm/vm_map.h>
-#include <vm/vnode_pager.h>
-#include <machine/pmap.h>
-#include <machine/vmparam.h>
-#include <machine/pcb.h>
-#include <machine/undefined.h>
-#include <machine/machdep.h>
-#include <machine/metadata.h>
-#include <machine/armreg.h>
-#include <machine/bus.h>
-#include <sys/reboot.h>
-
-#define MDROOT_ADDR 0xd0400000
-
-#define KERNEL_PT_VMEM 0 /* Page table for mapping video memory */
-#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
-#define KERNEL_PT_IO 3 /* Page table for mapping IO */
-#define KERNEL_PT_IRQ 2 /* Page table for mapping irq handler */
-#define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
-#define KERNEL_PT_L1 4 /* Page table for mapping l1pt */
-#define KERNEL_PT_VMDATA 5 /* Page tables for mapping kernel VM */
-#define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
-#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
-
-/* Define various stack sizes in pages */
-#define IRQ_STACK_SIZE 1
-#define ABT_STACK_SIZE 1
-#ifdef IPKDB
-#define UND_STACK_SIZE 2
-#else
-#define UND_STACK_SIZE 1
-#endif
-#define KERNEL_VM_BASE (KERNBASE + 0x00c00000)
-#define KERNEL_VM_SIZE 0x05000000
-
-extern u_int data_abort_handler_address;
-extern u_int prefetch_abort_handler_address;
-extern u_int undefined_handler_address;
-
-struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
-
-extern void *_end;
-
-int got_mmu = 0;
-
-extern vm_offset_t sa1_cache_clean_addr;
-
-extern int *end;
-
-struct pcpu __pcpu;
-struct pcpu *pcpup = &__pcpu;
-
-#ifndef MD_ROOT_SIZE
-#define MD_ROOT_SIZE 65535
-#endif
-/* Physical and virtual addresses for some global pages */
-
-vm_paddr_t phys_avail[10];
-vm_paddr_t physical_start;
-vm_paddr_t physical_end;
-vm_paddr_t physical_freestart;
-vm_offset_t physical_pages;
-vm_offset_t clean_sva, clean_eva;
-
-struct pv_addr systempage;
-struct pv_addr irqstack;
-struct pv_addr undstack;
-struct pv_addr abtstack;
-struct pv_addr kernelstack;
-void enable_mmu(vm_offset_t);
-static struct trapframe proc0_tf;
-
-struct arm32_dma_range *
-bus_dma_get_range(void)
-{
-
- return (NULL);
-}
-
-int
-bus_dma_get_range_nb(void)
-{
- return (0);
-}
-
-void
-cpu_reset()
-{
- cpu_halt();
- while (1);
-}
-
-#define CPU_SA110_CACHE_CLEAN_SIZE (0x4000 * 2)
-
-void *
-initarm(void *arg, void *arg2)
-{
- struct pcpu *pc;
- struct pv_addr kernel_l1pt;
- struct pv_addr md_addr;
- struct pv_addr md_bla;
- int loop;
- u_int kerneldatasize, symbolsize;
- u_int l1pagetable;
- vm_offset_t freemempos;
- vm_offset_t lastalloced;
- vm_size_t pt_size;
- int i = 0;
- uint32_t fake_preload[35];
-
- boothowto = RB_VERBOSE | RB_SINGLE;
- cninit();
- set_cpufuncs();
- fake_preload[i++] = MODINFO_NAME;
- fake_preload[i++] = strlen("elf kernel") + 1;
- strcpy((char*)&fake_preload[i++], "elf kernel");
- i += 2;
- fake_preload[i++] = MODINFO_TYPE;
- fake_preload[i++] = strlen("elf kernel") + 1;
- strcpy((char*)&fake_preload[i++], "elf kernel");
- i += 2;
- fake_preload[i++] = MODINFO_ADDR;
- fake_preload[i++] = sizeof(vm_offset_t);
- fake_preload[i++] = KERNBASE;
- fake_preload[i++] = MODINFO_SIZE;
- fake_preload[i++] = sizeof(uint32_t);
- fake_preload[i++] = (uint32_t)&end - KERNBASE;
- fake_preload[i++] = MODINFO_NAME;
- fake_preload[i++] = strlen("md root") + 1;
- strcpy((char*)&fake_preload[i++], "md root");
- i += 1;
- fake_preload[i++] = MODINFO_TYPE;
- fake_preload[i++] = strlen("md_image") + 1;
- strcpy((char*)&fake_preload[i++], "md_image");
- i += 2;
- fake_preload[i++] = MODINFO_ADDR;
- fake_preload[i++] = sizeof(uint32_t);
- fake_preload[i++] = MDROOT_ADDR;
- fake_preload[i++] = MODINFO_SIZE;
- fake_preload[i++] = sizeof(uint32_t);
- fake_preload[i++] = MD_ROOT_SIZE * 1024;
- fake_preload[i++] = 0;
- fake_preload[i] = 0;
- preload_metadata = (void *)fake_preload;
-
- physmem =( 16 * 1024 * 1024) / PAGE_SIZE;
- pc = &__pcpu;
- pcpu_init(pc, 0, sizeof(struct pcpu));
- PCPU_SET(curthread, &thread0);
-
- physical_start = (vm_offset_t) KERNBASE;
- physical_end = (vm_offset_t) &end;
- physical_freestart = (((vm_offset_t)physical_end) + PAGE_MASK) & ~PAGE_MASK;
- md_addr.pv_va = md_addr.pv_pa = MDROOT_ADDR;
-#define KERNEL_TEXT_BASE (KERNBASE + 0x00040000)
- kerneldatasize = (u_int32_t)&end - (u_int32_t)KERNEL_TEXT_BASE;
- symbolsize = 0;
- freemempos = (vm_offset_t)round_page(physical_freestart);
- memset((void *)freemempos, 0, 256*1024);
- /* Define a macro to simplify memory allocation */
-#define valloc_pages(var, np) \
- alloc_pages((var).pv_pa, (np)); \
- (var).pv_va = (var).pv_pa;
-
-#define alloc_pages(var, np) \
- (var) = freemempos; \
- freemempos += ((np) * PAGE_SIZE);\
- memset((char *)(var), 0, ((np) * PAGE_SIZE));
-
- while ((freemempos & (L1_TABLE_SIZE - 1)) != 0)
- freemempos += PAGE_SIZE;
- valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
- valloc_pages(md_bla, L2_TABLE_SIZE / PAGE_SIZE);
- alloc_pages(sa1_cache_clean_addr, CPU_SA110_CACHE_CLEAN_SIZE / PAGE_SIZE);
- for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
- valloc_pages(kernel_pt_table[loop],
- L2_TABLE_SIZE / PAGE_SIZE);
- }
-
- valloc_pages(systempage, 1);
-
- /*
- * Allocate a page for the system page mapped to V0x00000000
- * This page will just contain the system vectors and can be
- * shared by all processes.
- */
- pt_size = round_page(freemempos) - physical_freestart;
-
- /* Allocate stacks for all modes */
- valloc_pages(irqstack, IRQ_STACK_SIZE);
- valloc_pages(abtstack, ABT_STACK_SIZE);
- valloc_pages(undstack, UND_STACK_SIZE);
- valloc_pages(kernelstack, KSTACK_PAGES);
- lastalloced = kernelstack.pv_va;
-
- /*
- * Allocate memory for the l1 and l2 page tables. The scheme to avoid
- * wasting memory by allocating the l1pt on the first 16k memory was
- * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
- * this to work (which is supposed to be the case).
- */
-
- /*
- * Now we start construction of the L1 page table
- * We start by mapping the L2 page tables into the L1.
- * This means that we can replace L1 mappings later on if necessary
- */
- l1pagetable = kernel_l1pt.pv_pa;
-
-
- /* Map the L2 pages tables in the L1 page table */
- pmap_link_l2pt(l1pagetable, 0x00000000,
- &kernel_pt_table[KERNEL_PT_SYS]);
- pmap_link_l2pt(l1pagetable, KERNBASE,
- &kernel_pt_table[KERNEL_PT_KERNEL]);
- pmap_link_l2pt(l1pagetable, 0xd0000000,
- &kernel_pt_table[KERNEL_PT_IO]);
- pmap_link_l2pt(l1pagetable, lastalloced & ~((L1_S_SIZE * 4) - 1),
- &kernel_pt_table[KERNEL_PT_L1]);
- pmap_link_l2pt(l1pagetable, 0x90000000, &kernel_pt_table[KERNEL_PT_IRQ]);
- pmap_link_l2pt(l1pagetable, MDROOT_ADDR,
- &md_bla);
- for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
- pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
- &kernel_pt_table[KERNEL_PT_VMDATA + loop]);
- pmap_map_chunk(l1pagetable, KERNBASE, KERNBASE,
- (uint32_t)&end - KERNBASE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- /* Map the stack pages */
- pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
- IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_map_chunk(l1pagetable, md_addr.pv_va, md_addr.pv_pa,
- MD_ROOT_SIZE * 1024, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
- ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
- UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
- KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
-
- pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
- L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
-
- for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
- pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
- kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
- }
- pmap_map_chunk(l1pagetable, md_bla.pv_va, md_bla.pv_pa, L2_TABLE_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
- /* Map the vector page. */
- pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- /* Map SACOM3. */
- pmap_map_entry(l1pagetable, 0xd000d000, 0x80010000,
- VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
- pmap_map_entry(l1pagetable, 0x90050000, 0x90050000,
- VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
- pmap_map_chunk(l1pagetable, sa1_cache_clean_addr, 0xf0000000,
- CPU_SA110_CACHE_CLEAN_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
-
- data_abort_handler_address = (u_int)data_abort_handler;
- prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
- undefined_handler_address = (u_int)undefinedinstruction_bounce;
- undefined_init();
- cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
- setttb(kernel_l1pt.pv_pa);
- cpu_tlb_flushID();
- cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
-
- /*
- * Pages were allocated during the secondary bootstrap for the
- * stacks for different CPU modes.
- * We must now set the r13 registers in the different CPU modes to
- * point to these stacks.
- * Since the ARM stacks use STMFD etc. we must set r13 to the top end
- * of the stack memory.
- */
- set_stackptr(PSR_IRQ32_MODE,
- irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
- set_stackptr(PSR_ABT32_MODE,
- abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
- set_stackptr(PSR_UND32_MODE,
- undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
-
-
-
- /*
- * We must now clean the cache again....
- * Cleaning may be done by reading new data to displace any
- * dirty data in the cache. This will have happened in setttb()
- * but since we are boot strapping the addresses used for the read
- * may have just been remapped and thus the cache could be out
- * of sync. A re-clean after the switch will cure this.
- * After booting there are no gross reloations of the kernel thus
- * this problem will not occur after initarm().
- */
-/* cpu_idcache_wbinv_all();*/
-
-
- bootverbose = 1;
-
- /* Set stack for exception handlers */
-
- proc_linkup(&proc0, &ksegrp0, &thread0);
- thread0.td_kstack = kernelstack.pv_va;
- thread0.td_pcb = (struct pcb *)
- (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
- thread0.td_pcb->pcb_flags = 0;
- thread0.td_frame = &proc0_tf;
-
-
- /* Enable MMU, I-cache, D-cache, write buffer. */
-
- cpufunc_control(0x337f, 0x107d);
- got_mmu = 1;
- arm_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
-
- pmap_curmaxkvaddr = freemempos + KERNEL_PT_VMDATA_NUM * 0x400000;
-
- pmap_bootstrap(freemempos,
- 0xd0000000, &kernel_l1pt);
-
-
- mutex_init();
-
-
- phys_avail[0] = round_page(virtual_avail);
- phys_avail[1] = 0xc0000000 + 0x02000000 - 1;
- phys_avail[2] = 0;
- phys_avail[3] = 0;
-
- /* Do basic tuning, hz etc */
- init_param1();
- init_param2(physmem);
- kdb_init();
- avail_end = 0xc0000000 + 0x02000000 - 1;
- return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
- sizeof(struct pcb)));
-}
--- sys/arm/sa11x0/sa11x0_reg.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* $NetBSD: sa11x0_reg.h,v 1.4 2002/07/19 18:26:56 ichiro Exp $ */
-
-/*-
- * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by IWAMOTO Toshihiro.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/sa11x0/sa11x0_reg.h,v 1.1 2004/05/14 11:46:45 cognet Exp $
- *
- */
-
-#ifndef _ARM_SA11X0_REG_H_
-#define _ARM_SA11X0_REG_H_
-
-/* Physical register base addresses */
-#define SAOST_BASE 0x90000000 /* OS Timer */
-#define SARTC_BASE 0x90010000 /* Real-Time Clock */
-#define SAPMR_BASE 0x90020000 /* Power Manager */
-#define SARCR_BASE 0x90030000 /* Reset Controller */
-#define SAGPIO_BASE 0x90040000 /* GPIO */
-#define SAIPIC_BASE 0x90050000 /* Interrupt Controller */
-#define SAPPC_BASE 0x90060000 /* Peripheral Pin Controller */
-#define SAUDC_BASE 0x80000000 /* USB Device Controller*/
-#define SACOM1_BASE 0x80010000 /* GPCLK/UART 1 */
-#define SACOM3_HW_BASE 0x80050000 /* UART 3 */
-#define SAMCP_BASE 0x80060000 /* MCP Controller */
-#define SASSP_BASE 0x80070000 /* Synchronous serial port */
-
-#define SADMAC_BASE 0xB0000000 /* DMA Controller */
-#define SALCD_BASE 0xB0100000 /* LCD */
-
-/* Register base virtual addresses mapped by initarm() */
-#define SACOM3_BASE 0xd000d000
-
-/* Interrupt controller registers */
-#define SAIPIC_NPORTS 9
-#define SAIPIC_IP 0x00 /* IRQ pending register */
-#define SAIPIC_MR 0x04 /* Mask register */
-#define SAIPIC_LR 0x08 /* Level register */
-#define SAIPIC_FP 0x10 /* FIQ pending register */
-#define SAIPIC_PR 0x20 /* Pending register */
-#define SAIPIC_CR 0x0C /* Control register */
-
-/* width of interrupt controller */
-#define ICU_LEN 32
-
-/* Reset controller registers */
-#define SARCR_RSRR 0x0 /* Software reset register */
-#define SARCR_RCSR 0x4 /* Reset status register */
-#define SARCR_TUCR 0x8 /* Test Unit control reg */
-
-#endif /* _ARM_SA11X0_REG_H_ */
--- sys/arm/sa11x0/std.sa11x0
+++ /dev/null
@@ -1,7 +0,0 @@
-#StrongARM SA11x0 common options
-#$FreeBSD: src/sys/arm/sa11x0/std.sa11x0,v 1.2 2004/09/23 22:33:38 cognet Exp $
-files "../sa11x0/files.sa11x0"
-cpu CPU_SA1100
-cpu CPU_SA1110
-makeoptions KERNPHYSADDR=0xc0000000
-makeoptions KERNVIRTADDR=0xc0000000
--- sys/arm/sa11x0/sa11x0_gpioreg.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/* $NetBSD: sa11x0_gpioreg.h,v 1.2 2001/07/30 15:58:56 rjs Exp $ */
-
-/*-
- * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Ichiro FUKUHARA (ichiro at ichiro.org).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/arm/sa11x0/sa11x0_gpioreg.h,v 1.1 2004/05/14 11:46:45 cognet Exp $
- *
- */
-
-/*
- * SA-11x0 GPIO Register
- */
-
-#define SAGPIO_NPORTS 8
-
-/* GPIO pin-level register */
-#define SAGPIO_PLR 0x00
-
-/* GPIO pin direction register */
-#define SAGPIO_PDR 0x04
-
-/* GPIO pin output set register */
-#define SAGPIO_PSR 0x08
-
-/* GPIO pin output clear register */
-#define SAGPIO_PCR 0x0C
-
-/* GPIO rising-edge detect register */
-#define SAGPIO_RER 0x10
-
-/* GPIO falling-edge detect register */
-#define SAGPIO_FER 0x14
-
-/* GPIO edge-detect status register */
-#define SAGPIO_EDR 0x18
-
-/* GPIO alternate function register */
-#define SAGPIO_AFR 0x1C
-
-/* XXX */
-#define GPIO(x) (0x00000001 << (x))
-
-/*
- * SA-11x0 GPIOs parameter
- */
-/*
-port name desc
-0 Reserved
-1 Reserved
-2...9 LDD{8..15} LCD DATA(8-15)
-10 SSP_TXD SSP transmit
-11 SSP_RXD SSP receive
-12 SSP_SCLK SSP serial clock
-13 SSP_SFRM SSP frameclock
-14 UART_TXD UART transmit
-15 UART_RXD UART receive
-16 GPCLK_OUT General-purpose clock out
-17 Reserved
-18 UART_SCLK Sample clock input
-19 SSP_CLK Sample clock input
-20 UART_SCLK3 Sample clock input
-21 MCP_CLK MCP dock in
-22 TREQA Either TIC request A
-23 TREQB Either TIC request B
-24 Reserved
-25 RTC Real Time Clock
-26 RCLK_OUT internal clock /2
-27 32KHZ_OUT Raw 32.768kHz osc output
- */
--- sys/ia64/acpica/madt.c
+++ /dev/null
@@ -1,242 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/acpica/madt.c,v 1.18.8.1 2005/11/07 09:53:25 obrien Exp $
- */
-
-#include <contrib/dev/acpica/acpi.h>
-#include <contrib/dev/acpica/actables.h>
-
-#include <machine/md_var.h>
-
-extern u_int64_t ia64_lapic_address;
-
-struct sapic *sapic_create(int, int, u_int64_t);
-
-static void
-print_entry(APIC_HEADER *entry)
-{
-
- switch (entry->Type) {
- case APIC_XRUPT_OVERRIDE: {
- MADT_INTERRUPT_OVERRIDE *iso =
- (MADT_INTERRUPT_OVERRIDE *)entry;
- printf("\tInterrupt source override entry\n");
- printf("\t\tBus=%d, Source=%d, Irq=0x%x\n", iso->Bus,
- iso->Source, iso->Interrupt);
- break;
- }
-
- case APIC_IO:
- printf("\tI/O APIC entry\n");
- break;
-
- case APIC_IO_SAPIC: {
- MADT_IO_SAPIC *sapic = (MADT_IO_SAPIC *)entry;
- printf("\tI/O SAPIC entry\n");
- printf("\t\tId=0x%x, InterruptBase=0x%x, Address=0x%lx\n",
- sapic->IoSapicId, sapic->InterruptBase, sapic->Address);
- break;
- }
-
- case APIC_LOCAL_NMI:
- printf("\tLocal APIC NMI entry\n");
- break;
-
- case APIC_ADDRESS_OVERRIDE: {
- MADT_ADDRESS_OVERRIDE *lapic = (MADT_ADDRESS_OVERRIDE *)entry;
- printf("\tLocal APIC override entry\n");
- printf("\t\tLocal APIC address=0x%jx\n", lapic->Address);
- break;
- }
-
- case APIC_LOCAL_SAPIC: {
- MADT_LOCAL_SAPIC *sapic = (MADT_LOCAL_SAPIC *)entry;
- printf("\tLocal SAPIC entry\n");
- printf("\t\tProcessorId=0x%x, Id=0x%x, Eid=0x%x",
- sapic->ProcessorId, sapic->LocalSapicId,
- sapic->LocalSapicEid);
- if (!sapic->ProcessorEnabled)
- printf(" (disabled)");
- printf("\n");
- break;
- }
-
- case APIC_NMI:
- printf("\tNMI entry\n");
- break;
-
- case APIC_XRUPT_SOURCE: {
- MADT_INTERRUPT_SOURCE *pis = (MADT_INTERRUPT_SOURCE *)entry;
- printf("\tPlatform interrupt entry\n");
- printf("\t\tPolarity=%d, TriggerMode=%d, Id=0x%x, "
- "Eid=0x%x, Vector=0x%x, Irq=%d\n",
- pis->Polarity, pis->TriggerMode, pis->ProcessorId,
- pis->ProcessorEid, pis->IoSapicVector, pis->Interrupt);
- break;
- }
-
- case APIC_PROCESSOR:
- printf("\tLocal APIC entry\n");
- break;
-
- default:
- printf("\tUnknown type %d entry\n", entry->Type);
- break;
- }
-}
-
-void
-ia64_probe_sapics(void)
-{
- ACPI_POINTER rsdp_ptr;
- APIC_HEADER *entry;
- MULTIPLE_APIC_TABLE *table;
- RSDP_DESCRIPTOR *rsdp;
- XSDT_DESCRIPTOR *xsdt;
- char *end, *p;
- int t, tables;
-
- if (AcpiOsGetRootPointer(ACPI_LOGICAL_ADDRESSING, &rsdp_ptr) != AE_OK)
- return;
-
- rsdp = (RSDP_DESCRIPTOR *)IA64_PHYS_TO_RR7(rsdp_ptr.Pointer.Physical);
- xsdt = (XSDT_DESCRIPTOR *)IA64_PHYS_TO_RR7(rsdp->XsdtPhysicalAddress);
-
- tables = (UINT64 *)((char *)xsdt + xsdt->Length) -
- xsdt->TableOffsetEntry;
-
- for (t = 0; t < tables; t++) {
- table = (MULTIPLE_APIC_TABLE *)
- IA64_PHYS_TO_RR7(xsdt->TableOffsetEntry[t]);
-
- if (bootverbose)
- printf("Table '%c%c%c%c' at %p\n",
- table->Signature[0], table->Signature[1],
- table->Signature[2], table->Signature[3], table);
-
- if (strncmp(table->Signature, APIC_SIG, 4) != 0 ||
- ACPI_FAILURE(AcpiTbVerifyTableChecksum((void *)table)))
- continue;
-
- /* Save the address of the processor interrupt block. */
- if (bootverbose)
- printf("\tLocal APIC address=0x%x\n",
- table->LocalApicAddress);
- ia64_lapic_address = table->LocalApicAddress;
-
- end = (char *)table + table->Length;
- p = (char *)(table + 1);
- while (p < end) {
- entry = (APIC_HEADER *)p;
-
- if (bootverbose)
- print_entry(entry);
-
- switch (entry->Type) {
- case APIC_IO_SAPIC: {
- MADT_IO_SAPIC *sapic = (MADT_IO_SAPIC *)entry;
- sapic_create(sapic->IoSapicId,
- sapic->InterruptBase, sapic->Address);
- break;
- }
-
- case APIC_ADDRESS_OVERRIDE: {
- MADT_ADDRESS_OVERRIDE *lapic =
- (MADT_ADDRESS_OVERRIDE*)entry;
- ia64_lapic_address = lapic->Address;
- break;
- }
-
-#ifdef SMP
- case APIC_LOCAL_SAPIC: {
- MADT_LOCAL_SAPIC *sapic =
- (MADT_LOCAL_SAPIC *)entry;
- if (sapic->ProcessorEnabled)
- cpu_mp_add(sapic->ProcessorId,
- sapic->LocalSapicId,
- sapic->LocalSapicEid);
- break;
- }
-#endif
-
- default:
- break;
- }
-
- p += entry->Length;
- }
- }
-}
-
-/*
- * Count the number of local SAPIC entries in the APIC table. Every enabled
- * entry corresponds to a processor.
- */
-int
-ia64_count_cpus(void)
-{
- ACPI_POINTER rsdp_ptr;
- MULTIPLE_APIC_TABLE *table;
- MADT_LOCAL_SAPIC *entry;
- RSDP_DESCRIPTOR *rsdp;
- XSDT_DESCRIPTOR *xsdt;
- char *end, *p;
- int cpus, t, tables;
-
- if (AcpiOsGetRootPointer(ACPI_LOGICAL_ADDRESSING, &rsdp_ptr) != AE_OK)
- return (0);
-
- rsdp = (RSDP_DESCRIPTOR *)IA64_PHYS_TO_RR7(rsdp_ptr.Pointer.Physical);
- xsdt = (XSDT_DESCRIPTOR *)IA64_PHYS_TO_RR7(rsdp->XsdtPhysicalAddress);
-
- tables = (UINT64 *)((char *)xsdt + xsdt->Length) -
- xsdt->TableOffsetEntry;
-
- cpus = 0;
-
- for (t = 0; t < tables; t++) {
- table = (MULTIPLE_APIC_TABLE *)
- IA64_PHYS_TO_RR7(xsdt->TableOffsetEntry[t]);
-
- if (strncmp(table->Signature, APIC_SIG, 4) != 0 ||
- ACPI_FAILURE(AcpiTbVerifyTableChecksum((void *)table)))
- continue;
-
- end = (char *)table + table->Length;
- p = (char *)(table + 1);
- while (p < end) {
- entry = (MADT_LOCAL_SAPIC *)p;
-
- if (entry->Type == APIC_LOCAL_SAPIC &&
- entry->ProcessorEnabled)
- cpus++;
-
- p += entry->Length;
- }
- }
-
- return (cpus);
-}
--- sys/ia64/acpica/acpi_wakeup.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/acpica/acpi_wakeup.c,v 1.2.10.1 2005/11/07 09:53:25 obrien Exp $
- */
-
-#include <sys/param.h>
-#include <sys/bus.h>
-
-#include <contrib/dev/acpica/acpi.h>
-#include <dev/acpica/acpivar.h>
-
-int
-acpi_sleep_machdep(struct acpi_softc *sc, int state)
-{
- return (0);
-}
-
-void
-acpi_install_wakeup_handler(struct acpi_softc *sc)
-{
-}
--- sys/ia64/acpica/OsdEnvironment.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*-
- * Copyright (c) 2000,2001 Michael Smith
- * Copyright (c) 2000 BSDi
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: src/sys/ia64/acpica/OsdEnvironment.c,v 1.8.2.1 2005/11/07 09:53:25 obrien Exp $");
-
-#include <sys/types.h>
-#include <sys/linker_set.h>
-#include <sys/sysctl.h>
-#include <machine/efi.h>
-
-#include <contrib/dev/acpica/acpi.h>
-
-static struct uuid acpi_root_uuid = EFI_TABLE_ACPI20;
-
-static u_long acpi_root_phys;
-
-SYSCTL_ULONG(_machdep, OID_AUTO, acpi_root, CTLFLAG_RD, &acpi_root_phys, 0,
- "The physical address of the RSDP");
-
-ACPI_STATUS
-AcpiOsInitialize(void)
-{
-
- return(AE_OK);
-}
-
-ACPI_STATUS
-AcpiOsTerminate(void)
-{
-
- return(AE_OK);
-}
-
-ACPI_STATUS
-AcpiOsGetRootPointer(UINT32 Flags, ACPI_POINTER *RsdpAddress)
-{
- void *acpi_root;
-
- if (acpi_root_phys == 0) {
- acpi_root = efi_get_table(&acpi_root_uuid);
- if (acpi_root == NULL)
- return (AE_NOT_FOUND);
- acpi_root_phys = IA64_RR_MASK((u_long)acpi_root);
- }
-
- RsdpAddress->PointerType = ACPI_PHYSICAL_POINTER;
- RsdpAddress->Pointer.Physical = acpi_root_phys;
- return (AE_OK);
-}
--- sys/ia64/acpica/acpi_machdep.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/acpica/acpi_machdep.c,v 1.5.2.1 2005/11/07 09:53:25 obrien Exp $
- */
-
-#include <sys/param.h>
-#include <sys/bus.h>
-
-#include <contrib/dev/acpica/acpi.h>
-#include <dev/acpica/acpivar.h>
-#include <machine/pal.h>
-
-int
-acpi_machdep_init(device_t dev)
-{
- struct acpi_softc *sc;
-
- sc = device_get_softc(dev);
-
- acpi_install_wakeup_handler(sc);
-
- return (0);
-}
-
-int
-acpi_machdep_quirks(int *quirks)
-{
- return (0);
-}
-
-void
-acpi_cpu_c1()
-{
- ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
-}
--- sys/ia64/compile/.cvsignore
+++ /dev/null
@@ -1 +0,0 @@
-[A-Za-z0-9]*
--- sys/ia64/pci/pci_cfgreg.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*-
- * Copyright (c) 2001 Doug Rabson
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/ia64/pci/pci_cfgreg.c,v 1.2 2001/10/03 08:25:58 dfr Exp $
- */
-
-#include <sys/param.h>
-#include <machine/pci_cfgreg.h>
-#include <machine/sal.h>
-
-#define SAL_PCI_ADDRESS(bus, slot, func, reg) \
- (((bus) << 16) | ((slot) << 11) | ((func) << 8) | (reg))
-
-int
-pci_cfgregopen(void)
-{
- return 1;
-}
-
-u_int32_t
-pci_cfgregread(int bus, int slot, int func, int reg, int bytes)
-{
- struct ia64_sal_result res;
-
- res = ia64_sal_entry(SAL_PCI_CONFIG_READ,
- SAL_PCI_ADDRESS(bus, slot, func, reg),
- bytes, 0, 0, 0, 0, 0);
- if (res.sal_status < 0)
- return (~0);
- else
- return (res.sal_result[0]);
-}
-
-void
-pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes)
-{
- struct ia64_sal_result res;
-
- res = ia64_sal_entry(SAL_PCI_CONFIG_WRITE,
- SAL_PCI_ADDRESS(bus, slot, func, reg),
- bytes, data, 0, 0, 0, 0);
-}
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