[Midnightbsd-cvs] src [10047] trunk/sys/dev/usb/controller: add more usb controllers
laffer1 at midnightbsd.org
laffer1 at midnightbsd.org
Sun May 27 18:41:39 EDT 2018
Revision: 10047
http://svnweb.midnightbsd.org/src/?rev=10047
Author: laffer1
Date: 2018-05-27 18:41:38 -0400 (Sun, 27 May 2018)
Log Message:
-----------
add more usb controllers
Modified Paths:
--------------
trunk/sys/dev/usb/controller/at91dci.h
trunk/sys/dev/usb/controller/ehci.c
trunk/sys/dev/usb/controller/ehci.h
trunk/sys/dev/usb/controller/ehci_ixp4xx.c
trunk/sys/dev/usb/controller/ehci_mv.c
trunk/sys/dev/usb/controller/ehci_pci.c
trunk/sys/dev/usb/controller/ehcireg.h
trunk/sys/dev/usb/controller/musb_otg.c
trunk/sys/dev/usb/controller/musb_otg.h
trunk/sys/dev/usb/controller/musb_otg_atmelarm.c
trunk/sys/dev/usb/controller/ohci.c
trunk/sys/dev/usb/controller/ohci.h
trunk/sys/dev/usb/controller/ohci_atmelarm.c
trunk/sys/dev/usb/controller/ohci_pci.c
trunk/sys/dev/usb/controller/ohci_s3c24x0.c
trunk/sys/dev/usb/controller/ohcireg.h
trunk/sys/dev/usb/controller/uhci.c
trunk/sys/dev/usb/controller/uhci.h
trunk/sys/dev/usb/controller/uhci_pci.c
trunk/sys/dev/usb/controller/uhcireg.h
trunk/sys/dev/usb/controller/usb_controller.c
trunk/sys/dev/usb/controller/uss820dci.c
trunk/sys/dev/usb/controller/uss820dci.h
trunk/sys/dev/usb/controller/uss820dci_atmelarm.c
trunk/sys/dev/usb/controller/xhci.c
trunk/sys/dev/usb/controller/xhci.h
trunk/sys/dev/usb/controller/xhci_pci.c
trunk/sys/dev/usb/controller/xhcireg.h
Added Paths:
-----------
trunk/sys/dev/usb/controller/dwc_otg.h
trunk/sys/dev/usb/controller/dwc_otg_atmelarm.c
trunk/sys/dev/usb/controller/dwc_otg_fdt.c
trunk/sys/dev/usb/controller/dwc_otg_fdt.h
trunk/sys/dev/usb/controller/dwc_otgreg.h
trunk/sys/dev/usb/controller/ehci_fsl.c
trunk/sys/dev/usb/controller/ehci_imx.c
trunk/sys/dev/usb/controller/ohci_fdt.c
Modified: trunk/sys/dev/usb/controller/at91dci.h
===================================================================
--- trunk/sys/dev/usb/controller/at91dci.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/at91dci.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/at91dci.h 229096 2011-12-31 14:22:02Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/at91dci.h 269916 2014-08-13 06:59:40Z hselasky $ */
/*-
* Copyright (c) 2006 ATMEL
* Copyright (c) 2007 Hans Petter Selasky <hselasky at FreeBSD.org>
@@ -133,12 +134,11 @@
bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
struct at91dci_td;
+struct at91dci_softc;
-typedef uint8_t (at91dci_cmd_t)(struct at91dci_td *td);
+typedef uint8_t (at91dci_cmd_t)(struct at91dci_softc *sc, struct at91dci_td *td);
struct at91dci_td {
- bus_space_tag_t io_tag;
- bus_space_handle_t io_hdl;
struct at91dci_td *obj_next;
at91dci_cmd_t *func;
struct usb_page_cache *pc;
@@ -221,6 +221,8 @@
void (*sc_pull_down) (void *arg);
void *sc_pull_arg;
+ uint32_t sc_xfer_complete;
+
uint8_t sc_rt_addr; /* root HUB address */
uint8_t sc_dv_addr; /* device address */
uint8_t sc_conf; /* root HUB config */
@@ -235,7 +237,8 @@
usb_error_t at91dci_init(struct at91dci_softc *sc);
void at91dci_uninit(struct at91dci_softc *sc);
-void at91dci_interrupt(struct at91dci_softc *sc);
+driver_filter_t at91dci_filter_interrupt;
+driver_intr_t at91dci_interrupt;
void at91dci_vbus_interrupt(struct at91dci_softc *sc, uint8_t is_on);
#endif /* _AT9100_DCI_H_ */
Added: trunk/sys/dev/usb/controller/dwc_otg.h
===================================================================
--- trunk/sys/dev/usb/controller/dwc_otg.h (rev 0)
+++ trunk/sys/dev/usb/controller/dwc_otg.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -0,0 +1,219 @@
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/dwc_otg.h 291064 2015-11-19 09:57:41Z hselasky $ */
+/*-
+ * Copyright (c) 2012 Hans Petter Selasky. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _DWC_OTG_H_
+#define _DWC_OTG_H_
+
+#define DWC_OTG_MAX_DEVICES MIN(USB_MAX_DEVICES, 32)
+#define DWC_OTG_FRAME_MASK 0x7FF
+#define DWC_OTG_MAX_TXP 4
+#define DWC_OTG_MAX_TXN (0x200 * DWC_OTG_MAX_TXP)
+#define DWC_OTG_MAX_CHANNELS 16
+#define DWC_OTG_MAX_ENDPOINTS 16
+#define DWC_OTG_HOST_TIMER_RATE 10 /* ms */
+#define DWC_OTG_TT_SLOT_MAX 8
+#define DWC_OTG_SLOT_IDLE_MAX 3
+#define DWC_OTG_SLOT_IDLE_MIN 2
+#ifndef DWC_OTG_TX_MAX_FIFO_SIZE
+#define DWC_OTG_TX_MAX_FIFO_SIZE DWC_OTG_MAX_TXN
+#endif
+
+#define DWC_OTG_READ_4(sc, reg) \
+ bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
+
+#define DWC_OTG_WRITE_4(sc, reg, data) \
+ bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
+
+struct dwc_otg_td;
+struct dwc_otg_softc;
+
+typedef uint8_t (dwc_otg_cmd_t)(struct dwc_otg_softc *sc, struct dwc_otg_td *td);
+
+struct dwc_otg_td {
+ struct dwc_otg_td *obj_next;
+ dwc_otg_cmd_t *func;
+ struct usb_page_cache *pc;
+ uint32_t tx_bytes;
+ uint32_t offset;
+ uint32_t remainder;
+ uint32_t hcchar; /* HOST CFG */
+ uint32_t hcsplt; /* HOST CFG */
+ uint16_t max_packet_size; /* packet_size */
+ uint16_t npkt;
+ uint8_t max_packet_count; /* packet_count */
+ uint8_t errcnt;
+ uint8_t tmr_res;
+ uint8_t tmr_val;
+ uint8_t ep_no;
+ uint8_t ep_type;
+ uint8_t channel[3];
+ uint8_t tt_index; /* TT data */
+ uint8_t tt_start_slot; /* TT data */
+ uint8_t tt_complete_slot; /* TT data */
+ uint8_t tt_xactpos; /* TT data */
+ uint8_t state;
+#define DWC_CHAN_ST_START 0
+#define DWC_CHAN_ST_WAIT_ANE 1
+#define DWC_CHAN_ST_WAIT_S_ANE 2
+#define DWC_CHAN_ST_WAIT_C_ANE 3
+#define DWC_CHAN_ST_WAIT_C_PKT 4
+#define DWC_CHAN_ST_TX_WAIT_ISOC 5
+ uint8_t error_any:1;
+ uint8_t error_stall:1;
+ uint8_t alt_next:1;
+ uint8_t short_pkt:1;
+ uint8_t did_stall:1;
+ uint8_t toggle:1;
+ uint8_t set_toggle:1;
+ uint8_t got_short:1;
+ uint8_t tt_scheduled:1;
+ uint8_t did_nak:1;
+};
+
+struct dwc_otg_tt_info {
+ uint8_t slot_index;
+};
+
+struct dwc_otg_std_temp {
+ dwc_otg_cmd_t *func;
+ struct usb_page_cache *pc;
+ struct dwc_otg_td *td;
+ struct dwc_otg_td *td_next;
+ uint32_t len;
+ uint32_t offset;
+ uint16_t max_frame_size;
+ uint8_t short_pkt;
+
+ /*
+ * short_pkt = 0: transfer should be short terminated
+ * short_pkt = 1: transfer should not be short terminated
+ */
+ uint8_t setup_alt_next;
+ uint8_t did_stall;
+ uint8_t bulk_or_control;
+};
+
+struct dwc_otg_config_desc {
+ struct usb_config_descriptor confd;
+ struct usb_interface_descriptor ifcd;
+ struct usb_endpoint_descriptor endpd;
+} __packed;
+
+union dwc_otg_hub_temp {
+ uWord wValue;
+ struct usb_port_status ps;
+};
+
+struct dwc_otg_flags {
+ uint8_t change_connect:1;
+ uint8_t change_suspend:1;
+ uint8_t change_reset:1;
+ uint8_t change_enabled:1;
+ uint8_t change_over_current:1;
+ uint8_t status_suspend:1; /* set if suspended */
+ uint8_t status_vbus:1; /* set if present */
+ uint8_t status_bus_reset:1; /* set if reset complete */
+ uint8_t status_high_speed:1; /* set if High Speed is selected */
+ uint8_t status_low_speed:1; /* set if Low Speed is selected */
+ uint8_t status_device_mode:1; /* set if device mode */
+ uint8_t self_powered:1;
+ uint8_t clocks_off:1;
+ uint8_t port_powered:1;
+ uint8_t port_enabled:1;
+ uint8_t port_over_current:1;
+ uint8_t d_pulled_up:1;
+};
+
+struct dwc_otg_profile {
+ struct usb_hw_ep_profile usb;
+ uint16_t max_buffer;
+};
+
+struct dwc_otg_chan_state {
+ uint16_t allocated;
+ uint16_t wait_halted;
+ uint32_t hcint;
+};
+
+struct dwc_otg_softc {
+ struct usb_bus sc_bus;
+ union dwc_otg_hub_temp sc_hub_temp;
+ struct dwc_otg_profile sc_hw_ep_profile[DWC_OTG_MAX_ENDPOINTS];
+ struct dwc_otg_tt_info sc_tt_info[DWC_OTG_MAX_DEVICES];
+ struct usb_callout sc_timer;
+
+ struct usb_device *sc_devices[DWC_OTG_MAX_DEVICES];
+ struct resource *sc_io_res;
+ struct resource *sc_irq_res;
+ void *sc_intr_hdl;
+ bus_size_t sc_io_size;
+ bus_space_tag_t sc_io_tag;
+ bus_space_handle_t sc_io_hdl;
+
+ uint32_t sc_bounce_buffer[MAX(512 * DWC_OTG_MAX_TXP, 1024) / 4];
+
+ uint32_t sc_fifo_size;
+ uint32_t sc_irq_mask;
+ uint32_t sc_last_rx_status;
+ uint32_t sc_out_ctl[DWC_OTG_MAX_ENDPOINTS];
+ uint32_t sc_in_ctl[DWC_OTG_MAX_ENDPOINTS];
+ struct dwc_otg_chan_state sc_chan_state[DWC_OTG_MAX_CHANNELS];
+ uint32_t sc_tmr_val;
+ uint32_t sc_hprt_val;
+ uint32_t sc_xfer_complete;
+
+ uint16_t sc_current_rx_bytes;
+ uint16_t sc_current_rx_fifo;
+
+ uint16_t sc_active_rx_ep;
+ uint16_t sc_last_frame_num;
+
+ uint8_t sc_timer_active;
+ uint8_t sc_dev_ep_max;
+ uint8_t sc_dev_in_ep_max;
+ uint8_t sc_host_ch_max;
+ uint8_t sc_needsof;
+ uint8_t sc_rt_addr; /* root HUB address */
+ uint8_t sc_conf; /* root HUB config */
+ uint8_t sc_mode; /* mode of operation */
+#define DWC_MODE_OTG 0 /* both modes */
+#define DWC_MODE_DEVICE 1 /* device only */
+#define DWC_MODE_HOST 2 /* host only */
+
+ uint8_t sc_hub_idata[1];
+
+ struct dwc_otg_flags sc_flags;
+};
+
+/* prototypes */
+
+driver_filter_t dwc_otg_filter_interrupt;
+driver_intr_t dwc_otg_interrupt;
+int dwc_otg_init(struct dwc_otg_softc *);
+void dwc_otg_uninit(struct dwc_otg_softc *);
+
+#endif /* _DWC_OTG_H_ */
Property changes on: trunk/sys/dev/usb/controller/dwc_otg.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/usb/controller/dwc_otg_atmelarm.c
===================================================================
--- trunk/sys/dev/usb/controller/dwc_otg_atmelarm.c (rev 0)
+++ trunk/sys/dev/usb/controller/dwc_otg_atmelarm.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -0,0 +1,202 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2012 Hans Petter Selasky. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/dwc_otg_atmelarm.c 278278 2015-02-05 20:03:02Z hselasky $");
+
+#include <sys/stdint.h>
+#include <sys/stddef.h>
+#include <sys/param.h>
+#include <sys/queue.h>
+#include <sys/types.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/module.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/condvar.h>
+#include <sys/sysctl.h>
+#include <sys/sx.h>
+#include <sys/unistd.h>
+#include <sys/callout.h>
+#include <sys/malloc.h>
+#include <sys/priv.h>
+#include <sys/rman.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+
+#include <dev/usb/usb_core.h>
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+#include <dev/usb/usb_util.h>
+
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+
+#include <dev/usb/controller/dwc_otg.h>
+
+static device_probe_t dwc_otg_probe;
+static device_attach_t dwc_otg_attach;
+static device_detach_t dwc_otg_detach;
+
+struct dwc_otg_super_softc {
+ struct dwc_otg_softc sc_otg; /* must be first */
+};
+
+static int
+dwc_otg_probe(device_t dev)
+{
+ device_set_desc(dev, "DWC OTG 2.0 integrated USB controller");
+ return (0);
+}
+
+static int
+dwc_otg_attach(device_t dev)
+{
+ struct dwc_otg_super_softc *sc = device_get_softc(dev);
+ int err;
+ int rid;
+
+ /* initialise some bus fields */
+ sc->sc_otg.sc_bus.parent = dev;
+ sc->sc_otg.sc_bus.devices = sc->sc_otg.sc_devices;
+ sc->sc_otg.sc_bus.devices_max = DWC_OTG_MAX_DEVICES;
+ sc->sc_otg.sc_bus.dma_bits = 32;
+
+ /* get all DMA memory */
+ if (usb_bus_mem_alloc_all(&sc->sc_otg.sc_bus,
+ USB_GET_DMA_TAG(dev), NULL)) {
+ return (ENOMEM);
+ }
+ rid = 0;
+ sc->sc_otg.sc_io_res =
+ bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
+
+ if (!(sc->sc_otg.sc_io_res)) {
+ err = ENOMEM;
+ goto error;
+ }
+ sc->sc_otg.sc_io_tag = rman_get_bustag(sc->sc_otg.sc_io_res);
+ sc->sc_otg.sc_io_hdl = rman_get_bushandle(sc->sc_otg.sc_io_res);
+ sc->sc_otg.sc_io_size = rman_get_size(sc->sc_otg.sc_io_res);
+
+ rid = 0;
+ sc->sc_otg.sc_irq_res =
+ bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
+ if (sc->sc_otg.sc_irq_res == NULL)
+ goto error;
+
+ sc->sc_otg.sc_bus.bdev = device_add_child(dev, "usbus", -1);
+ if (sc->sc_otg.sc_bus.bdev == NULL)
+ goto error;
+
+ device_set_ivars(sc->sc_otg.sc_bus.bdev, &sc->sc_otg.sc_bus);
+
+ err = bus_setup_intr(dev, sc->sc_otg.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
+ &dwc_otg_filter_interrupt, &dwc_otg_interrupt, sc, &sc->sc_otg.sc_intr_hdl);
+ if (err) {
+ sc->sc_otg.sc_intr_hdl = NULL;
+ goto error;
+ }
+ err = dwc_otg_init(&sc->sc_otg);
+ if (err == 0) {
+ err = device_probe_and_attach(sc->sc_otg.sc_bus.bdev);
+ }
+ if (err)
+ goto error;
+ return (0);
+
+error:
+ dwc_otg_detach(dev);
+ return (ENXIO);
+}
+
+static int
+dwc_otg_detach(device_t dev)
+{
+ struct dwc_otg_super_softc *sc = device_get_softc(dev);
+ device_t bdev;
+ int err;
+
+ if (sc->sc_otg.sc_bus.bdev) {
+ bdev = sc->sc_otg.sc_bus.bdev;
+ device_detach(bdev);
+ device_delete_child(dev, bdev);
+ }
+ /* during module unload there are lots of children leftover */
+ device_delete_children(dev);
+
+ if (sc->sc_otg.sc_irq_res && sc->sc_otg.sc_intr_hdl) {
+ /*
+ * only call dwc_otg_uninit() after dwc_otg_init()
+ */
+ dwc_otg_uninit(&sc->sc_otg);
+
+ err = bus_teardown_intr(dev, sc->sc_otg.sc_irq_res,
+ sc->sc_otg.sc_intr_hdl);
+ sc->sc_otg.sc_intr_hdl = NULL;
+ }
+ /* free IRQ channel, if any */
+ if (sc->sc_otg.sc_irq_res) {
+ bus_release_resource(dev, SYS_RES_IRQ, 0,
+ sc->sc_otg.sc_irq_res);
+ sc->sc_otg.sc_irq_res = NULL;
+ }
+ /* free memory resource, if any */
+ if (sc->sc_otg.sc_io_res) {
+ bus_release_resource(dev, SYS_RES_MEMORY, 0,
+ sc->sc_otg.sc_io_res);
+ sc->sc_otg.sc_io_res = NULL;
+ }
+ usb_bus_mem_free_all(&sc->sc_otg.sc_bus, NULL);
+
+ return (0);
+}
+
+static device_method_t dwc_otg_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, dwc_otg_probe),
+ DEVMETHOD(device_attach, dwc_otg_attach),
+ DEVMETHOD(device_detach, dwc_otg_detach),
+ DEVMETHOD(device_suspend, bus_generic_suspend),
+ DEVMETHOD(device_resume, bus_generic_resume),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ DEVMETHOD_END
+};
+
+static driver_t dwc_otg_driver = {
+ .name = "dwc_otg",
+ .methods = dwc_otg_methods,
+ .size = sizeof(struct dwc_otg_super_softc),
+};
+
+static devclass_t dwc_otg_devclass;
+
+DRIVER_MODULE(dwcotg, atmelarm, dwc_otg_driver, dwc_otg_devclass, 0, 0);
+MODULE_DEPEND(dwcotg, usb, 1, 1, 1);
Property changes on: trunk/sys/dev/usb/controller/dwc_otg_atmelarm.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/usb/controller/dwc_otg_fdt.c
===================================================================
--- trunk/sys/dev/usb/controller/dwc_otg_fdt.c (rev 0)
+++ trunk/sys/dev/usb/controller/dwc_otg_fdt.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -0,0 +1,212 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2012 Hans Petter Selasky. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/dwc_otg_fdt.c 322724 2017-08-20 16:52:27Z marius $");
+
+#include <sys/stdint.h>
+#include <sys/stddef.h>
+#include <sys/param.h>
+#include <sys/queue.h>
+#include <sys/types.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/module.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/condvar.h>
+#include <sys/sysctl.h>
+#include <sys/sx.h>
+#include <sys/unistd.h>
+#include <sys/callout.h>
+#include <sys/malloc.h>
+#include <sys/priv.h>
+#include <sys/rman.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+
+#include <dev/usb/usb_core.h>
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+#include <dev/usb/usb_util.h>
+
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+
+#include <dev/usb/controller/dwc_otg.h>
+#include <dev/usb/controller/dwc_otg_fdt.h>
+
+static device_probe_t dwc_otg_probe;
+static device_detach_t dwc_otg_detach;
+
+static int
+dwc_otg_probe(device_t dev)
+{
+
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (!ofw_bus_is_compatible(dev, "synopsys,designware-hs-otg2"))
+ return (ENXIO);
+
+ device_set_desc(dev, "DWC OTG 2.0 integrated USB controller");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+int
+dwc_otg_attach(device_t dev)
+{
+ struct dwc_otg_fdt_softc *sc = device_get_softc(dev);
+ int err;
+ int rid;
+
+ /* initialise some bus fields */
+ sc->sc_otg.sc_bus.parent = dev;
+ sc->sc_otg.sc_bus.devices = sc->sc_otg.sc_devices;
+ sc->sc_otg.sc_bus.devices_max = DWC_OTG_MAX_DEVICES;
+ sc->sc_otg.sc_bus.dma_bits = 32;
+
+ /* get all DMA memory */
+ if (usb_bus_mem_alloc_all(&sc->sc_otg.sc_bus,
+ USB_GET_DMA_TAG(dev), NULL)) {
+ return (ENOMEM);
+ }
+ rid = 0;
+ sc->sc_otg.sc_io_res =
+ bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
+
+ if (!(sc->sc_otg.sc_io_res)) {
+ err = ENOMEM;
+ goto error;
+ }
+ sc->sc_otg.sc_io_tag = rman_get_bustag(sc->sc_otg.sc_io_res);
+ sc->sc_otg.sc_io_hdl = rman_get_bushandle(sc->sc_otg.sc_io_res);
+ sc->sc_otg.sc_io_size = rman_get_size(sc->sc_otg.sc_io_res);
+
+
+ /*
+ * brcm,bcm2708-usb FDT provides two interrupts,
+ * we need only second one (VC_USB)
+ */
+ rid = ofw_bus_is_compatible(dev, "brcm,bcm2708-usb") ? 1 : 0;
+ sc->sc_otg.sc_irq_res =
+ bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
+ if (sc->sc_otg.sc_irq_res == NULL)
+ goto error;
+
+ sc->sc_otg.sc_bus.bdev = device_add_child(dev, "usbus", -1);
+ if (sc->sc_otg.sc_bus.bdev == NULL)
+ goto error;
+
+ device_set_ivars(sc->sc_otg.sc_bus.bdev, &sc->sc_otg.sc_bus);
+
+ err = bus_setup_intr(dev, sc->sc_otg.sc_irq_res, INTR_TYPE_TTY | INTR_MPSAFE,
+ &dwc_otg_filter_interrupt, &dwc_otg_interrupt, sc, &sc->sc_otg.sc_intr_hdl);
+ if (err) {
+ sc->sc_otg.sc_intr_hdl = NULL;
+ goto error;
+ }
+ err = dwc_otg_init(&sc->sc_otg);
+ if (err == 0) {
+ err = device_probe_and_attach(sc->sc_otg.sc_bus.bdev);
+ }
+ if (err)
+ goto error;
+
+
+ return (0);
+
+error:
+ dwc_otg_detach(dev);
+ return (ENXIO);
+}
+
+static int
+dwc_otg_detach(device_t dev)
+{
+ struct dwc_otg_fdt_softc *sc = device_get_softc(dev);
+ int err;
+
+ /* during module unload there are lots of children leftover */
+ device_delete_children(dev);
+
+ if (sc->sc_otg.sc_irq_res && sc->sc_otg.sc_intr_hdl) {
+ /*
+ * only call dwc_otg_uninit() after dwc_otg_init()
+ */
+ dwc_otg_uninit(&sc->sc_otg);
+
+ err = bus_teardown_intr(dev, sc->sc_otg.sc_irq_res,
+ sc->sc_otg.sc_intr_hdl);
+ sc->sc_otg.sc_intr_hdl = NULL;
+ }
+ /* free IRQ channel, if any */
+ if (sc->sc_otg.sc_irq_res) {
+ bus_release_resource(dev, SYS_RES_IRQ, 0,
+ sc->sc_otg.sc_irq_res);
+ sc->sc_otg.sc_irq_res = NULL;
+ }
+ /* free memory resource, if any */
+ if (sc->sc_otg.sc_io_res) {
+ bus_release_resource(dev, SYS_RES_MEMORY, 0,
+ sc->sc_otg.sc_io_res);
+ sc->sc_otg.sc_io_res = NULL;
+ }
+ usb_bus_mem_free_all(&sc->sc_otg.sc_bus, NULL);
+
+ return (0);
+}
+
+static device_method_t dwc_otg_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, dwc_otg_probe),
+ DEVMETHOD(device_attach, dwc_otg_attach),
+ DEVMETHOD(device_detach, dwc_otg_detach),
+ DEVMETHOD(device_suspend, bus_generic_suspend),
+ DEVMETHOD(device_resume, bus_generic_resume),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ DEVMETHOD_END
+};
+
+driver_t dwc_otg_driver = {
+ .name = "dwcotg",
+ .methods = dwc_otg_methods,
+ .size = sizeof(struct dwc_otg_fdt_softc),
+};
+
+static devclass_t dwc_otg_devclass;
+
+DRIVER_MODULE(dwcotg, simplebus, dwc_otg_driver, dwc_otg_devclass, 0, 0);
+MODULE_DEPEND(dwcotg, usb, 1, 1, 1);
Property changes on: trunk/sys/dev/usb/controller/dwc_otg_fdt.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/usb/controller/dwc_otg_fdt.h
===================================================================
--- trunk/sys/dev/usb/controller/dwc_otg_fdt.h (rev 0)
+++ trunk/sys/dev/usb/controller/dwc_otg_fdt.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -0,0 +1,40 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2012 Hans Petter Selasky. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/usb/controller/dwc_otg_fdt.h 322724 2017-08-20 16:52:27Z marius $
+ */
+
+#ifndef _DWC_OTG_FDT_H_
+#define _DWC_OTG_FDT_H_
+
+struct dwc_otg_fdt_softc {
+ struct dwc_otg_softc sc_otg; /* must be first */
+};
+
+extern driver_t dwc_otg_driver;
+
+device_attach_t dwc_otg_attach;
+
+#endif
Property changes on: trunk/sys/dev/usb/controller/dwc_otg_fdt.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/usb/controller/dwc_otgreg.h
===================================================================
--- trunk/sys/dev/usb/controller/dwc_otgreg.h (rev 0)
+++ trunk/sys/dev/usb/controller/dwc_otgreg.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -0,0 +1,803 @@
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/dwc_otgreg.h 287271 2015-08-29 06:07:55Z hselasky $ */
+
+/*-
+ * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _DWC_OTGREG_H_
+#define _DWC_OTGREG_H_
+
+#define DOTG_GOTGCTL 0x0000
+#define DOTG_GOTGINT 0x0004
+#define DOTG_GAHBCFG 0x0008
+#define DOTG_GUSBCFG 0x000C
+#define DOTG_GRSTCTL 0x0010
+#define DOTG_GINTSTS 0x0014
+#define DOTG_GINTMSK 0x0018
+#define DOTG_GRXSTSRD 0x001C
+#define DOTG_GRXSTSRH 0x001C
+#define DOTG_GRXSTSPD 0x0020
+#define DOTG_GRXSTSPH 0x0020
+#define DOTG_GRXFSIZ 0x0024
+#define DOTG_GNPTXFSIZ 0x0028
+#define DOTG_GNPTXSTS 0x002C
+#define DOTG_GI2CCTL 0x0030
+#define DOTG_GPVNDCTL 0x0034
+#define DOTG_GGPIO 0x0038
+#define DOTG_GUID 0x003C
+#define DOTG_GSNPSID 0x0040
+#define DOTG_GSNPSID_REV_2_80a 0x4f54280a /* RPi model B/RPi2 */
+#define DOTG_GSNPSID_REV_3_10a 0x4f54310a /* ODROID-C1 */
+#define DOTG_GHWCFG1 0x0044
+#define DOTG_GHWCFG2 0x0048
+#define DOTG_GHWCFG3 0x004C
+#define DOTG_GHWCFG4 0x0050
+#define DOTG_GLPMCFG 0x0054
+#define DOTG_GPWRDN 0x0058
+#define DOTG_GDFIFOCFG 0x005C
+#define DOTG_GADPCTL 0x0060
+
+#define DOTG_HPTXFSIZ 0x0100
+/* start from 0x104, but fifo0 not exists */
+#define DOTG_DPTXFSIZ(fifo) (0x0100 + (4*(fifo)))
+#define DOTG_DIEPTXF(fifo) (0x0100 + (4*(fifo)))
+
+#define DOTG_HCFG 0x0400
+#define DOTG_HFIR 0x0404
+#define DOTG_HFNUM 0x0408
+#define DOTG_HPTXSTS 0x0410
+#define DOTG_HAINT 0x0414
+#define DOTG_HAINTMSK 0x0418
+#define DOTG_HPRT 0x0440
+
+#define DOTG_HCCHAR(ch) (0x0500 + (32*(ch)))
+#define DOTG_HCSPLT(ch) (0x0504 + (32*(ch)))
+#define DOTG_HCINT(ch) (0x0508 + (32*(ch)))
+#define DOTG_HCINTMSK(ch) (0x050C + (32*(ch)))
+#define DOTG_HCTSIZ(ch) (0x0510 + (32*(ch)))
+#define DOTG_HCDMA(ch) (0x0514 + (32*(ch)))
+#define DOTG_HCDMAI(ch) (0x0514 + (32*(ch)))
+#define DOTG_HCDMAO(ch) (0x0514 + (32*(ch)))
+#define DOTG_HCDMAB(ch) (0x051C + (32*(ch)))
+
+/* Device Mode */
+#define DOTG_DCFG 0x0800
+#define DOTG_DCTL 0x0804
+#define DOTG_DSTS 0x0808
+#define DOTG_DIEPMSK 0x0810
+#define DOTG_DOEPMSK 0x0814
+#define DOTG_DAINT 0x0818
+#define DOTG_DAINTMSK 0x081C
+#define DOTG_DTKNQR1 0x0820
+#define DOTG_DTKNQR2 0x0824
+#define DOTG_DVBUSDIS 0x0828
+#define DOTG_DVBUSPULSE 0x082C
+#define DOTG_DTHRCTL 0x0830
+#define DOTG_DTKNQR4 0x0834
+#define DOTG_DIEPEMPMSK 0x0834
+#define DOTG_DEACHINT 0x0838
+#define DOTG_DEACHINTMSK 0x083C
+#define DOTG_DIEPEACHINTMSK(ch) (0x0840 + (4*(ch)))
+#define DOTG_DOEPEACHINTMSK(ch) (0x0880 + (4*(ch)))
+
+#define DOTG_DIEPCTL(ep) (0x0900 + (32*(ep)))
+#define DOTG_DIEPINT(ep) (0x0908 + (32*(ep)))
+#define DOTG_DIEPTSIZ(ep) (0x0910 + (32*(ep)))
+#define DOTG_DIEPDMA(ep) (0x0914 + (32*(ep)))
+#define DOTG_DTXFSTS(ep) (0x0918 + (32*(ep)))
+#define DOTG_DIEPDMAB(ep) (0x091c + (32*(ep)))
+
+#define DOTG_DOEPCTL(ep) (0x0B00 + (32*(ep)))
+#define DOTG_DOEPFN(ep) (0x0B04 + (32*(ep)))
+#define DOTG_DOEPINT(ep) (0x0B08 + (32*(ep)))
+#define DOTG_DOEPTSIZ(ep) (0x0B10 + (32*(ep)))
+#define DOTG_DOEPDMA(ep) (0x0B14 + (32*(ep)))
+#define DOTG_DOEPDMAB(ep) (0x0B1c + (32*(ep)))
+/* End Device Mode */
+
+/* Host Mode
+#define DOTG_CTL_STATUS 0x0800
+#define DOTG_DMA0_INB_CHN0 0x0818
+#define DOTG_DMA0_INB_CHN1 0x0820
+#define DOTG_DMA0_INB_CHN2 0x0828
+#define DOTG_DVBUSDIS 0x0828
+#define DOTG_DVBUSPULSE 0x082c
+#define DOTG_DMA0_INB_CHN3 0x0830
+#define DOTG_DMA0_INB_CHN4 0x0838
+#define DOTG_DMA0_INB_CHN5 0x0840
+#define DOTG_DMA0_INB_CHN6 0x0848
+#define DOTG_DMA0_INB_CHN7 0x0850
+#define DOTG_DMA0_OUTB_CHN0 0x0858
+#define DOTG_DMA0_OUTB_CHN1 0x0860
+#define DOTG_DMA0_OUTB_CHN2 0x0868
+#define DOTG_DMA0_OUTB_CHN3 0x0870
+#define DOTG_DMA0_OUTB_CHN4 0x0878
+#define DOTG_DMA0_OUTB_CHN5 0x0880
+#define DOTG_DMA0_OUTB_CHN6 0x0888
+#define DOTG_DMA0_OUTB_CHN7 0x0890
+ End Host Mode */
+
+/* Power and clock gating CSR */
+
+#define DOTG_PCGCCTL 0x0E00
+
+/* FIFO access registers (PIO-mode) */
+
+#define DOTG_DFIFO(n) (0x1000 + (0x1000 * (n)))
+
+#define GOTGCTL_CHIRP_ON (1<<27)
+#define GOTGCTL_BSESVLD (1<<19)
+#define GOTGCTL_ASESVLD (1<<18)
+#define GOTGCTL_DBNCTIME (1<<17)
+#define GOTGCTL_CONIDSTS (1<<16)
+#define GOTGCTL_DEVHNPEN (1<<11)
+#define GOTGCTL_HSTSETHNPEN (1<<10)
+#define GOTGCTL_HNPREQ (1<<9)
+#define GOTGCTL_HSTNEGSCS (1<<8)
+#define GOTGCTL_SESREQ (1<<1)
+#define GOTGCTL_SESREQSCS (1<<0)
+
+#define GOTGCTL_DBNCEDONE (1<<19)
+#define GOTGCTL_ADEVTOUTCHG (1<<18)
+#define GOTGCTL_HSTNEGDET (1<<17)
+#define GOTGCTL_HSTNEGSUCSTSCHG (1<<9)
+#define GOTGCTL_SESREQSUCSTSCHG (1<<8)
+#define GOTGCTL_SESENDDET (1<<2)
+
+#define GAHBCFG_PTXFEMPLVL (1<<8)
+#define GAHBCFG_NPTXFEMPLVL (1<<7)
+#define GAHBCFG_DMAEN (1<<5)
+#define GAHBCFG_HBSTLEN_MASK 0x0000001e
+#define GAHBCFG_HBSTLEN_SHIFT 1
+#define GAHBCFG_GLBLINTRMSK (1<<0)
+
+#define GUSBCFG_CORRUPTTXPACKET (1<<31)
+#define GUSBCFG_FORCEDEVMODE (1<<30)
+#define GUSBCFG_FORCEHOSTMODE (1<<29)
+#define GUSBCFG_NO_PULLUP (1<<27)
+#define GUSBCFG_IC_USB_CAP (1<<26)
+#define GUSBCFG_TERMSELDLPULSE (1<<22)
+#define GUSBCFG_ULPIEXTVBUSINDICATOR (1<<21)
+#define GUSBCFG_ULPIEXTVBUSDRV (1<<20)
+#define GUSBCFG_ULPICLKSUSM (1<<19)
+#define GUSBCFG_ULPIAUTORES (1<<18)
+#define GUSBCFG_ULPIFSLS (1<<17)
+#define GUSBCFG_OTGI2CSEL (1<<16)
+#define GUSBCFG_PHYLPWRCLKSEL (1<<15)
+#define GUSBCFG_USBTRDTIM_MASK 0x00003c00
+#define GUSBCFG_USBTRDTIM_SHIFT 10
+#define GUSBCFG_TRD_TIM_SET(x) (((x) & 15) << 10)
+#define GUSBCFG_HNPCAP (1<<9)
+#define GUSBCFG_SRPCAP (1<<8)
+#define GUSBCFG_DDRSEL (1<<7)
+#define GUSBCFG_PHYSEL (1<<6)
+#define GUSBCFG_FSINTF (1<<5)
+#define GUSBCFG_ULPI_UTMI_SEL (1<<4)
+#define GUSBCFG_PHYIF (1<<3)
+#define GUSBCFG_TOUTCAL_MASK 0x00000007
+#define GUSBCFG_TOUTCAL_SHIFT 0
+
+/* STM32F4 */
+#define DOTG_GGPIO_NOVBUSSENS (1 << 21)
+#define DOTG_GGPIO_SOFOUTEN (1 << 20)
+#define DOTG_GGPIO_VBUSBSEN (1 << 19)
+#define DOTG_GGPIO_VBUSASEN (1 << 18)
+#define DOTG_GGPIO_I2CPADEN (1 << 17)
+#define DOTG_GGPIO_PWRDWN (1 << 16)
+
+#define GRSTCTL_AHBIDLE (1<<31)
+#define GRSTCTL_DMAREQ (1<<30)
+#define GRSTCTL_TXFNUM_MASK 0x000007c0
+#define GRSTCTL_TXFNUM_SHIFT 6
+#define GRSTCTL_TXFIFO(n) (((n) & 31) << 6)
+#define GRSTCTL_TXFFLSH (1<<5)
+#define GRSTCTL_RXFFLSH (1<<4)
+#define GRSTCTL_INTKNQFLSH (1<<3)
+#define GRSTCTL_FRMCNTRRST (1<<2)
+#define GRSTCTL_HSFTRST (1<<1)
+#define GRSTCTL_CSFTRST (1<<0)
+
+#define GINTSTS_WKUPINT (1<<31)
+#define GINTSTS_SESSREQINT (1<<30)
+#define GINTSTS_DISCONNINT (1<<29)
+#define GINTSTS_CONIDSTSCHNG (1<<28)
+#define GINTSTS_LPM (1<<27)
+#define GINTSTS_PTXFEMP (1<<26)
+#define GINTSTS_HCHINT (1<<25)
+#define GINTSTS_PRTINT (1<<24)
+#define GINTSTS_RESETDET (1<<23)
+#define GINTSTS_FETSUSP (1<<22)
+#define GINTSTS_INCOMPLP (1<<21)
+#define GINTSTS_INCOMPISOIN (1<<20)
+#define GINTSTS_OEPINT (1<<19)
+#define GINTSTS_IEPINT (1<<18)
+#define GINTSTS_EPMIS (1<<17)
+#define GINTSTS_RESTORE_DONE (1<<16)
+#define GINTSTS_EOPF (1<<15)
+#define GINTSTS_ISOOUTDROP (1<<14)
+#define GINTSTS_ENUMDONE (1<<13)
+#define GINTSTS_USBRST (1<<12)
+#define GINTSTS_USBSUSP (1<<11)
+#define GINTSTS_ERLYSUSP (1<<10)
+#define GINTSTS_I2CINT (1<<9)
+#define GINTSTS_ULPICKINT (1<<8)
+#define GINTSTS_GOUTNAKEFF (1<<7)
+#define GINTSTS_GINNAKEFF (1<<6)
+#define GINTSTS_NPTXFEMP (1<<5)
+#define GINTSTS_RXFLVL (1<<4)
+#define GINTSTS_SOF (1<<3)
+#define GINTSTS_OTGINT (1<<2)
+#define GINTSTS_MODEMIS (1<<1)
+#define GINTSTS_CURMOD (1<<0)
+
+#define GINTMSK_WKUPINTMSK (1<<31)
+#define GINTMSK_SESSREQINTMSK (1<<30)
+#define GINTMSK_DISCONNINTMSK (1<<29)
+#define GINTMSK_CONIDSTSCHNGMSK (1<<28)
+#define GINTMSK_PTXFEMPMSK (1<<26)
+#define GINTMSK_HCHINTMSK (1<<25)
+#define GINTMSK_PRTINTMSK (1<<24)
+#define GINTMSK_FETSUSPMSK (1<<22)
+#define GINTMSK_INCOMPLPMSK (1<<21)
+#define GINTMSK_INCOMPISOINMSK (1<<20)
+#define GINTMSK_OEPINTMSK (1<<19)
+#define GINTMSK_IEPINTMSK (1<<18)
+#define GINTMSK_EPMISMSK (1<<17)
+#define GINTMSK_EOPFMSK (1<<15)
+#define GINTMSK_ISOOUTDROPMSK (1<<14)
+#define GINTMSK_ENUMDONEMSK (1<<13)
+#define GINTMSK_USBRSTMSK (1<<12)
+#define GINTMSK_USBSUSPMSK (1<<11)
+#define GINTMSK_ERLYSUSPMSK (1<<10)
+#define GINTMSK_I2CINTMSK (1<<9)
+#define GINTMSK_ULPICKINTMSK (1<<8)
+#define GINTMSK_GOUTNAKEFFMSK (1<<7)
+#define GINTMSK_GINNAKEFFMSK (1<<6)
+#define GINTMSK_NPTXFEMPMSK (1<<5)
+#define GINTMSK_RXFLVLMSK (1<<4)
+#define GINTMSK_SOFMSK (1<<3)
+#define GINTMSK_OTGINTMSK (1<<2)
+#define GINTMSK_MODEMISMSK (1<<1)
+#define GINTMSK_CURMODMSK (1<<0)
+
+#define GRXSTSRH_PKTSTS_MASK 0x001e0000
+#define GRXSTSRH_PKTSTS_SHIFT 17
+#define GRXSTSRH_DPID_MASK 0x00018000
+#define GRXSTSRH_DPID_SHIFT 15
+#define GRXSTSRH_BCNT_MASK 0x00007ff0
+#define GRXSTSRH_BCNT_SHIFT 4
+#define GRXSTSRH_CHNUM_MASK 0x0000000f
+#define GRXSTSRH_CHNUM_SHIFT 0
+
+#define GRXSTSRD_FN_MASK 0x01e00000
+#define GRXSTSRD_FN_GET(x) (((x) >> 21) & 15)
+#define GRXSTSRD_FN_SHIFT 21
+#define GRXSTSRD_PKTSTS_MASK 0x001e0000
+#define GRXSTSRD_PKTSTS_SHIFT 17
+#define GRXSTSRH_IN_DATA (2<<17)
+#define GRXSTSRH_IN_COMPLETE (3<<17)
+#define GRXSTSRH_DT_ERROR (5<<17)
+#define GRXSTSRH_HALTED (7<<17)
+#define GRXSTSRD_GLOB_OUT_NAK (1<<17)
+#define GRXSTSRD_OUT_DATA (2<<17)
+#define GRXSTSRD_OUT_COMPLETE (3<<17)
+#define GRXSTSRD_STP_COMPLETE (4<<17)
+#define GRXSTSRD_STP_DATA (6<<17)
+#define GRXSTSRD_DPID_MASK 0x00018000
+#define GRXSTSRD_DPID_SHIFT 15
+#define GRXSTSRD_DPID_DATA0 (0<<15)
+#define GRXSTSRD_DPID_DATA1 (2<<15)
+#define GRXSTSRD_DPID_DATA2 (1<<15)
+#define GRXSTSRD_DPID_MDATA (3<<15)
+#define GRXSTSRD_BCNT_MASK 0x00007ff0
+#define GRXSTSRD_BCNT_GET(x) (((x) >> 4) & 0x7FF)
+#define GRXSTSRD_BCNT_SHIFT 4
+#define GRXSTSRD_CHNUM_MASK 0x0000000f
+#define GRXSTSRD_CHNUM_GET(x) ((x) & 15)
+#define GRXSTSRD_CHNUM_SHIFT 0
+
+#define GRXFSIZ_RXFDEP_MASK 0x0000ffff
+#define GRXFSIZ_RXFDEP_SHIFT 0
+
+#define GNPTXFSIZ_NPTXFDEP_MASK 0xffff0000
+#define GNPTXFSIZ_NPTXFDEP_SHIFT 0
+#define GNPTXFSIZ_NPTXFSTADDR_MASK 0x0000ffff
+#define GNPTXFSIZ_NPTXFSTADDR_SHIFT 16
+
+#define GNPTXSTS_NPTXQTOP_SHIFT 24
+#define GNPTXSTS_NPTXQTOP_MASK 0x7f000000
+#define GNPTXSTS_NPTXQSPCAVAIL_SHIFT 16
+#define GNPTXSTS_NPTXQSPCAVAIL_MASK 0x00ff0000
+#define GNPTXSTS_NPTXFSPCAVAIL_SHIFT 0
+#define GNPTXSTS_NPTXFSPCAVAIL_MASK 0x0000ffff
+
+#define GI2CCTL_BSYDNE_SC (1<<31)
+#define GI2CCTL_RW (1<<30)
+#define GI2CCTL_I2CDATSE0 (1<<28)
+#define GI2CCTL_I2CDEVADR_SHIFT 26
+#define GI2CCTL_I2CDEVADR_MASK 0x0c000000
+#define GI2CCTL_I2CSUSPCTL (1<<25)
+#define GI2CCTL_ACK (1<<24)
+#define GI2CCTL_I2CEN (1<<23)
+#define GI2CCTL_ADDR_SHIFT 16
+#define GI2CCTL_ADDR_MASK 0x007f0000
+#define GI2CCTL_REGADDR_SHIFT 8
+#define GI2CCTL_REGADDR_MASK 0x0000ff00
+#define GI2CCTL_RWDATA_SHIFT 0
+#define GI2CCTL_RWDATA_MASK 0x000000ff
+
+#define GPVNDCTL_DISULPIDRVR (1<<31)
+#define GPVNDCTL_VSTSDONE (1<<27)
+#define GPVNDCTL_VSTSBSY (1<<26)
+#define GPVNDCTL_NEWREGREQ (1<<25)
+#define GPVNDCTL_REGWR (1<<22)
+#define GPVNDCTL_REGADDR_SHIFT 16
+#define GPVNDCTL_REGADDR_MASK 0x003f0000
+#define GPVNDCTL_VCTRL_SHIFT 8
+#define GPVNDCTL_VCTRL_MASK 0x0000ff00
+#define GPVNDCTL_REGDATA_SHIFT 0
+#define GPVNDCTL_REGDATA_MASK 0x000000ff
+
+#define GGPIO_GPO_SHIFT 16
+#define GGPIO_GPO_MASK 0xffff0000
+#define GGPIO_GPI_SHIFT 0
+#define GGPIO_GPI_MASK 0x0000ffff
+
+#define GHWCFG1_GET_DIR(x, n) (((x) >> (2 * (n))) & 3)
+#define GHWCFG1_BIDIR 0
+#define GHWCFG1_IN 1
+#define GHWCFG1_OUT 2
+
+#define GHWCFG2_TKNQDEPTH_SHIFT 26
+#define GHWCFG2_TKNQDEPTH_MASK 0x7c000000
+#define GHWCFG2_PTXQDEPTH_SHIFT 24
+#define GHWCFG2_PTXQDEPTH_MASK 0x03000000
+#define GHWCFG2_NPTXQDEPTH_SHIFT 22
+#define GHWCFG2_NPTXQDEPTH_MASK 0x00c00000
+#define GHWCFG2_MPI (1<<20)
+#define GHWCFG2_DYNFIFOSIZING (1<<19)
+#define GHWCFG2_PERIOSUPPORT (1<<18)
+#define GHWCFG2_NUMHSTCHNL_SHIFT 14
+#define GHWCFG2_NUMHSTCHNL_MASK 0x0003c000
+#define GHWCFG2_NUMHSTCHNL_GET(x) ((((x) >> 14) & 15) + 1)
+#define GHWCFG2_NUMDEVEPS_SHIFT 10
+#define GHWCFG2_NUMDEVEPS_MASK 0x00003c00
+#define GHWCFG2_NUMDEVEPS_GET(x) ((((x) >> 10) & 15) + 1)
+#define GHWCFG2_FSPHYTYPE_SHIFT 8
+#define GHWCFG2_FSPHYTYPE_MASK 0x00000300
+#define GHWCFG2_HSPHYTYPE_SHIFT 6
+#define GHWCFG2_HSPHYTYPE_MASK 0x000000c0
+#define GHWCFG2_SINGPNT (1<<5)
+#define GHWCFG2_OTGARCH_SHIFT 3
+#define GHWCFG2_OTGARCH_MASK 0x00000018
+#define GHWCFG2_OTGMODE_SHIFT 0
+#define GHWCFG2_OTGMODE_MASK 0x00000007
+
+#define GHWCFG3_DFIFODEPTH_SHIFT 16
+#define GHWCFG3_DFIFODEPTH_MASK 0xffff0000
+#define GHWCFG3_DFIFODEPTH_GET(x) ((x) >> 16)
+#define GHWCFG3_RSTTYPE (1<<11)
+#define GHWCFG3_OPTFEATURE (1<<10)
+#define GHWCFG3_VNDCTLSUPT (1<<9)
+#define GHWCFG3_I2CINTSEL (1<<8)
+#define GHWCFG3_OTGEN (1<<7)
+#define GHWCFG3_PKTSIZEWIDTH_SHIFT 4
+#define GHWCFG3_PKTSIZEWIDTH_MASK 0x00000070
+#define GHWCFG3_PKTSIZE_GET(x) (0x10<<(((x) >> 4) & 7))
+#define GHWCFG3_XFERSIZEWIDTH_SHIFT 0
+#define GHWCFG3_XFERSIZEWIDTH_MASK 0x0000000f
+#define GHWCFG3_XFRRSIZE_GET(x) (0x400<<(((x) >> 0) & 15))
+
+#define GHWCFG4_NUM_IN_EP_GET(x) ((((x) >> 26) & 15) + 1)
+#define GHWCFG4_SESSENDFLTR (1<<24)
+#define GHWCFG4_BVALIDFLTR (1<<23)
+#define GHWCFG4_AVALIDFLTR (1<<22)
+#define GHWCFG4_VBUSVALIDFLTR (1<<21)
+#define GHWCFG4_IDDGFLTR (1<<20)
+#define GHWCFG4_NUMCTLEPS_SHIFT 16
+#define GHWCFG4_NUMCTLEPS_MASK 0x000f0000
+#define GHWCFG4_NUMCTLEPS_GET(x) (((x) >> 16) & 15)
+#define GHWCFG4_PHYDATAWIDTH_SHIFT 14
+#define GHWCFG4_PHYDATAWIDTH_MASK 0x0000c000
+#define GHWCFG4_AHBFREQ (1<<5)
+#define GHWCFG4_ENABLEPWROPT (1<<4)
+#define GHWCFG4_NUMDEVPERIOEPS_SHIFT 0
+#define GHWCFG4_NUMDEVPERIOEPS_MASK 0x0000000f
+#define GHWCFG4_NUMDEVPERIOEPS_GET(x) (((x) >> 0) & 15)
+
+#define GLPMCFG_HSIC_CONN (1<<30)
+
+#define GPWRDN_BVALID (1<<22)
+#define GPWRDN_IDDIG (1<<21)
+#define GPWRDN_CONNDET_INT (1<<14)
+#define GPWRDN_CONNDET (1<<13)
+#define GPWRDN_DISCONN_INT (1<<12)
+#define GPWRDN_DISCONN (1<<11)
+#define GPWRDN_RESETDET_INT (1<<10)
+#define GPWRDN_RESETDET (1<<9)
+#define GPWRDN_LINESTATE_INT (1<<8)
+#define GPWRDN_LINESTATE (1<<7)
+#define GPWRDN_DISABLE_VBUS (1<<6)
+#define GPWRDN_POWER_DOWN (1<<5)
+#define GPWRDN_POWER_DOWN_RST (1<<4)
+#define GPWRDN_POWER_DOWN_CLAMP (1<<3)
+#define GPWRDN_RESTORE (1<<2)
+#define GPWRDN_PMU_ACTIVE (1<<1)
+#define GPWRDN_PMU_IRQ_SEL (1<<0)
+
+#define HPTXFSIZ_PTXFSIZE_SHIFT 16
+#define HPTXFSIZ_PTXFSIZE_MASK 0xffff0000
+#define HPTXFSIZ_PTXFSTADDR_SHIFT 0
+#define HPTXFSIZ_PTXFSTADDR_MASK 0x0000ffff
+
+#define DPTXFSIZN_DPTXFSIZE_SHIFT 16
+#define DPTXFSIZN_DPTXFSIZE_MASK 0xffff0000
+#define DPTXFSIZN_PTXFSTADDR_SHIFT 0
+#define DPTXFSIZN_PTXFSTADDR_MASK 0x0000ffff
+
+#define DIEPTXFN_INEPNTXFDEP_SHIFT 16
+#define DIEPTXFN_INEPNTXFDEP_MASK 0xffff0000
+#define DIEPTXFN_INEPNTXFSTADDR_SHIFT 0
+#define DIEPTXFN_INEPNTXFSTADDR_MASK 0x0000ffff
+
+#define HCFG_MODECHANGERDY (1<<31)
+#define HCFG_PERSCHEDENABLE (1<<26)
+#define HCFG_FLENTRIES_SHIFT 24
+#define HCFG_FLENTRIES_MASK 0x03000000
+#define HCFG_FLENTRIES_8 (0)
+#define HCFG_FLENTRIES_16 (1)
+#define HCFG_FLENTRIES_32 (2)
+#define HCFG_FLENTRIES_64 (3)
+#define HCFG_MULTISEGDMA (1<<23)
+#define HCFG_32KHZSUSPEND (1<<7)
+#define HCFG_FSLSSUPP (1<<2)
+#define HCFG_FSLSPCLKSEL_SHIFT 0
+#define HCFG_FSLSPCLKSEL_MASK 0x00000003
+
+#define HFIR_RELOADCTRL (1<<16)
+#define HFIR_FRINT_SHIFT 0
+#define HFIR_FRINT_MASK 0x0000ffff
+
+#define HFNUM_FRREM_SHIFT 16
+#define HFNUM_FRREM_MASK 0xffff0000
+#define HFNUM_FRNUM_SHIFT 0
+#define HFNUM_FRNUM_MASK 0x0000ffff
+
+#define HPTXSTS_ODD (1<<31)
+#define HPTXSTS_CHAN_SHIFT 27
+#define HPTXSTS_CHAN_MASK 0x78000000
+#define HPTXSTS_TOKEN_SHIFT 25
+#define HPTXSTS_TOKEN_MASK 0x06000000
+#define HPTXSTS_TOKEN_ZL 0
+#define HPTXSTS_TOKEN_PING 1
+#define HPTXSTS_TOKEN_DISABLE 2
+#define HPTXSTS_TERMINATE (1<<24)
+#define HPTXSTS_PTXQSPCAVAIL_SHIFT 16
+#define HPTXSTS_PTXQSPCAVAIL_MASK 0x00ff0000
+#define HPTXSTS_PTXFSPCAVAIL_SHIFT 0
+#define HPTXSTS_PTXFSPCAVAIL_MASK 0x0000ffff
+
+#define HAINT_HAINT_SHIFT 0
+#define HAINT_HAINT_MASK 0x0000ffff
+#define HAINTMSK_HAINTMSK_SHIFT 0
+#define HAINTMSK_HAINTMSK_MASK 0x0000ffff
+
+#define HPRT_PRTSPD_SHIFT 17
+#define HPRT_PRTSPD_MASK 0x00060000
+#define HPRT_PRTSPD_HIGH 0
+#define HPRT_PRTSPD_FULL 1
+#define HPRT_PRTSPD_LOW 2
+#define HPRT_PRTSPD_MASK 0x00060000
+#define HPRT_PRTTSTCTL_SHIFT 13
+#define HPRT_PRTTSTCTL_MASK 0x0001e000
+#define HPRT_PRTPWR (1<<12)
+#define HPRT_PRTLNSTS_SHIFT 10
+#define HPRT_PRTLNSTS_MASK 0x00000c00
+#define HPRT_PRTRST (1<<8)
+#define HPRT_PRTSUSP (1<<7)
+#define HPRT_PRTRES (1<<6)
+#define HPRT_PRTOVRCURRCHNG (1<<5)
+#define HPRT_PRTOVRCURRACT (1<<4)
+#define HPRT_PRTENCHNG (1<<3)
+#define HPRT_PRTENA (1<<2)
+#define HPRT_PRTCONNDET (1<<1)
+#define HPRT_PRTCONNSTS (1<<0)
+
+#define HCCHAR_CHENA (1<<31)
+#define HCCHAR_CHDIS (1<<30)
+#define HCCHAR_ODDFRM (1<<29)
+#define HCCHAR_DEVADDR_SHIFT 22
+#define HCCHAR_DEVADDR_MASK 0x1fc00000
+#define HCCHAR_MC_SHIFT 20
+#define HCCHAR_MC_MASK 0x00300000
+#define HCCHAR_EPTYPE_SHIFT 18
+#define HCCHAR_EPTYPE_MASK 0x000c0000
+#define HCCHAR_LSPDDEV (1<<17)
+#define HCCHAR_EPDIR (1<<15)
+#define HCCHAR_EPDIR_IN (1<<15)
+#define HCCHAR_EPDIR_OUT 0
+#define HCCHAR_EPNUM_SHIFT 11
+#define HCCHAR_EPNUM_MASK 0x00007800
+#define HCCHAR_MPS_SHIFT 0
+#define HCCHAR_MPS_MASK 0x000007ff
+
+#define HCSPLT_SPLTENA (1<<31)
+#define HCSPLT_COMPSPLT (1<<16)
+#define HCSPLT_XACTPOS_SHIFT 14
+#define HCSPLT_XACTPOS_MASK 0x0000c000
+#define HCSPLT_XACTPOS_MIDDLE 0
+#define HCSPLT_XACTPOS_LAST 1
+#define HCSPLT_XACTPOS_BEGIN 2
+#define HCSPLT_XACTPOS_ALL 3
+#define HCSPLT_XACTLEN_BURST 1023 /* bytes */
+#define HCSPLT_HUBADDR_SHIFT 7
+#define HCSPLT_HUBADDR_MASK 0x00003f80
+#define HCSPLT_PRTADDR_SHIFT 0
+#define HCSPLT_PRTADDR_MASK 0x0000007f
+
+#define HCINT_ERRORS \
+ (HCINT_BBLERR | HCINT_XACTERR)
+#define HCINT_RETRY \
+ (HCINT_DATATGLERR | HCINT_FRMOVRUN | HCINT_NAK)
+#define HCINT_DEFAULT_MASK \
+ (HCINT_STALL | HCINT_BBLERR | \
+ HCINT_XACTERR | HCINT_NAK | HCINT_ACK | HCINT_NYET | \
+ HCINT_CHHLTD | HCINT_FRMOVRUN | \
+ HCINT_DATATGLERR)
+#define HCINT_HCH_DONE_MASK \
+ (HCINT_ACK | HCINT_RETRY | HCINT_NYET | \
+ HCINT_ERRORS | HCINT_STALL | HCINT_SOFTWARE_ONLY)
+
+#define HCINT_SOFTWARE_ONLY (1<<20) /* BSD only */
+#define HCINT_DATATGLERR (1<<10)
+#define HCINT_FRMOVRUN (1<<9)
+#define HCINT_BBLERR (1<<8)
+#define HCINT_XACTERR (1<<7)
+#define HCINT_NYET (1<<6)
+#define HCINT_ACK (1<<5)
+#define HCINT_NAK (1<<4)
+#define HCINT_STALL (1<<3)
+#define HCINT_AHBERR (1<<2)
+#define HCINT_CHHLTD (1<<1)
+#define HCINT_XFERCOMPL (1<<0)
+
+#define HCINTMSK_DATATGLERRMSK (1<<10)
+#define HCINTMSK_FRMOVRUNMSK (1<<9)
+#define HCINTMSK_BBLERRMSK (1<<8)
+#define HCINTMSK_XACTERRMSK (1<<7)
+#define HCINTMSK_NYETMSK (1<<6)
+#define HCINTMSK_ACKMSK (1<<5)
+#define HCINTMSK_NAKMSK (1<<4)
+#define HCINTMSK_STALLMSK (1<<3)
+#define HCINTMSK_AHBERRMSK (1<<2)
+#define HCINTMSK_CHHLTDMSK (1<<1)
+#define HCINTMSK_XFERCOMPLMSK (1<<0)
+
+#define HCTSIZ_DOPNG (1<<31)
+#define HCTSIZ_PID_SHIFT 29
+#define HCTSIZ_PID_MASK 0x60000000
+#define HCTSIZ_PID_DATA0 0
+#define HCTSIZ_PID_DATA2 1
+#define HCTSIZ_PID_DATA1 2
+#define HCTSIZ_PID_MDATA 3
+#define HCTSIZ_PID_SETUP 3
+#define HCTSIZ_PKTCNT_SHIFT 19
+#define HCTSIZ_PKTCNT_MASK 0x1ff80000
+#define HCTSIZ_XFERSIZE_SHIFT 0
+#define HCTSIZ_XFERSIZE_MASK 0x0007ffff
+
+#define DCFG_EPMISCNT_SHIFT 18
+#define DCFG_EPMISCNT_MASK 0x007c0000
+#define DCFG_PERFRINT_SHIFT 11
+#define DCFG_PERFRINT_MASK 0x00001800
+#define DCFG_DEVADDR_SHIFT 4
+#define DCFG_DEVADDR_MASK 0x000007f0
+#define DCFG_DEVADDR_SET(x) (((x) & 0x7F) << 4)
+#define DCFG_NZSTSOUTHSHK (1<<2)
+#define DCFG_DEVSPD_SHIFT 0
+#define DCFG_DEVSPD_MASK 0x00000003
+#define DCFG_DEVSPD_SET(x) ((x) & 0x3)
+#define DCFG_DEVSPD_HI 0
+#define DCFG_DEVSPD_FULL20 1
+#define DCFG_DEVSPD_FULL10 3
+
+#define DCTL_PWRONPRGDONE (1<<11)
+#define DCTL_CGOUTNAK (1<<10)
+#define DCTL_SGOUTNAK (1<<9)
+#define DCTL_CGNPINNAK (1<<8)
+#define DCTL_SGNPINNAK (1<<7)
+#define DCTL_TSTCTL_SHIFT 4
+#define DCTL_TSTCTL_MASK 0x00000070
+#define DCTL_GOUTNAKSTS (1<<3)
+#define DCTL_GNPINNAKSTS (1<<2)
+#define DCTL_SFTDISCON (1<<1)
+#define DCTL_RMTWKUPSIG (1<<0)
+
+#define DSTS_SOFFN_SHIFT 8
+#define DSTS_SOFFN_MASK 0x003fff00
+#define DSTS_SOFFN_GET(x) (((x) >> 8) & 0x3FFF)
+#define DSTS_ERRTICERR (1<<3)
+#define DSTS_ENUMSPD_SHIFT 1
+#define DSTS_ENUMSPD_MASK 0x00000006
+#define DSTS_ENUMSPD_GET(x) (((x) >> 1) & 3)
+#define DSTS_ENUMSPD_HI 0
+#define DSTS_ENUMSPD_FULL20 1
+#define DSTS_ENUMSPD_LOW10 2
+#define DSTS_ENUMSPD_FULL10 3
+#define DSTS_SUSPSTS (1<<0)
+
+#define DIEPMSK_TXFIFOUNDRNMSK (1<<8)
+#define DIEPMSK_INEPNAKEFFMSK (1<<6)
+#define DIEPMSK_INTKNEPMISMSK (1<<5)
+#define DIEPMSK_INTKNTXFEMPMSK (1<<4)
+#define DIEPMSK_FIFOEMPTY (1<<4)
+#define DIEPMSK_TIMEOUTMSK (1<<3)
+#define DIEPMSK_AHBERRMSK (1<<2)
+#define DIEPMSK_EPDISBLDMSK (1<<1)
+#define DIEPMSK_XFERCOMPLMSK (1<<0)
+
+#define DOEPMSK_OUTPKTERRMSK (1<<8)
+#define DOEPMSK_BACK2BACKSETUP (1<<6)
+#define DOEPMSK_OUTTKNEPDISMSK (1<<4)
+#define DOEPMSK_FIFOEMPTY (1<<4)
+#define DOEPMSK_SETUPMSK (1<<3)
+#define DOEPMSK_AHBERRMSK (1<<2)
+#define DOEPMSK_EPDISBLDMSK (1<<1)
+#define DOEPMSK_XFERCOMPLMSK (1<<0)
+
+#define DIEPINT_TXFIFOUNDRN (1<<8)
+#define DIEPINT_INEPNAKEFF (1<<6)
+#define DIEPINT_INTKNEPMIS (1<<5)
+#define DIEPINT_INTKNTXFEMP (1<<4)
+#define DIEPINT_TIMEOUT (1<<3)
+#define DIEPINT_AHBERR (1<<2)
+#define DIEPINT_EPDISBLD (1<<1)
+#define DIEPINT_XFERCOMPL (1<<0)
+
+#define DOEPINT_OUTPKTERR (1<<8)
+#define DOEPINT_BACK2BACKSETUP (1<<6)
+#define DOEPINT_OUTTKNEPDIS (1<<4)
+#define DOEPINT_SETUP (1<<3)
+#define DOEPINT_AHBERR (1<<2)
+#define DOEPINT_EPDISBLD (1<<1)
+#define DOEPINT_XFERCOMPL (1<<0)
+
+#define DAINT_INEPINT_MASK 0xffff0000
+#define DAINT_INEPINT_SHIFT 0
+#define DAINT_OUTEPINT_MASK 0x0000ffff
+#define DAINT_OUTEPINT_SHIFT 16
+
+#define DAINTMSK_INEPINT_MASK 0xffff0000
+#define DAINTMSK_INEPINT_SHIFT 0
+#define DAINTMSK_OUTEPINT_MASK 0x0000ffff
+#define DAINTMSK_OUTEPINT_SHIFT 16
+
+#define DTKNQR1_EPTKN_SHIFT 8
+#define DTKNQR1_EPTKN_MASK 0xffffff00
+#define DTKNQR1_WRAPBIT (1<<7)
+#define DTKNQR1_INTKNWPTR_SHIFT 0
+#define DTKNQR1_INTKNWPTR_MASK 0x0000001f
+
+#define DVBUSDIS_DVBUSDIS_SHIFT 0
+#define DVBUSDIS_DVBUSDIS_MASK 0x0000ffff
+
+#define DVBUSPULSE_DVBUSPULSE_SHIFT 0
+#define DVBUSPULSE_DVBUSPULSE_MASK 0x00000fff
+
+#define DTHRCTL_ARBPRKEN (1<<27)
+#define DTHRCTL_RXTHRLEN_SHIFT 17
+#define DTHRCTL_RXTHRLEN_MASK 0x03fe0000
+#define DTHRCTL_RXTHREN (1<<16)
+#define DTHRCTL_TXTHRLEN_SHIFT 2
+#define DTHRCTL_TXTHRLEN_MASK 0x000007fc
+#define DTHRCTL_ISOTHREN (1<<1)
+#define DTHRCTL_NONISOTHREN (1<<0)
+
+#define DIEPEMPMSK_INEPTXFEMPMSK_SHIFT 0
+#define DIEPEMPMSK_INEPTXFEMPMSK_MASK 0x0000ffff
+
+#define DIEPCTL_EPENA (1<<31)
+#define DIEPCTL_EPDIS (1<<30)
+#define DIEPCTL_SETD1PID (1<<29)
+#define DIEPCTL_SETD0PID (1<<28)
+#define DIEPCTL_SNAK (1<<27)
+#define DIEPCTL_CNAK (1<<26)
+#define DIEPCTL_TXFNUM_SHIFT 22
+#define DIEPCTL_TXFNUM_MASK 0x03c00000
+#define DIEPCTL_TXFNUM_SET(n) (((n) & 15) << 22)
+#define DIEPCTL_STALL (1<<21)
+#define DIEPCTL_EPTYPE_SHIFT 18
+#define DIEPCTL_EPTYPE_MASK 0x000c0000
+#define DIEPCTL_EPTYPE_SET(n) (((n) & 3) << 18)
+#define DIEPCTL_EPTYPE_CONTROL 0
+#define DIEPCTL_EPTYPE_ISOC 1
+#define DIEPCTL_EPTYPE_BULK 2
+#define DIEPCTL_EPTYPE_INTERRUPT 3
+#define DIEPCTL_NAKSTS (1<<17)
+#define DIEPCTL_USBACTEP (1<<15)
+#define DIEPCTL_NEXTEP_SHIFT 11
+#define DIEPCTL_NEXTEP_MASK 0x00007800
+#define DIEPCTL_MPS_SHIFT 0
+#define DIEPCTL_MPS_MASK 0x000007ff
+#define DIEPCTL_MPS_SET(n) ((n) & 0x7FF)
+#define DIEPCTL_MPS_64 (0<<0)
+#define DIEPCTL_MPS_32 (1<<0)
+#define DIEPCTL_MPS_16 (2<<0)
+#define DIEPCTL_MPS_8 (3<<0)
+
+#define DOEPCTL_EPENA (1<<31)
+#define DOEPCTL_EPDIS (1<<30)
+#define DOEPCTL_SETD1PID (1<<29)
+#define DOEPCTL_SETD0PID (1<<28)
+#define DOEPCTL_SNAK (1<<27)
+#define DOEPCTL_CNAK (1<<26)
+#define DOEPCTL_FNUM_SET(n) (((n) & 15) << 22)
+#define DOEPCTL_STALL (1<<21)
+#define DOEPCTL_EPTYPE_SHIFT 18
+#define DOEPCTL_EPTYPE_MASK 0x000c0000
+#define DOEPCTL_EPTYPE_SET(n) (((n) & 3) << 18)
+#define DOEPCTL_NAKSTS (1<<17)
+#define DOEPCTL_USBACTEP (1<<15)
+#define DOEPCTL_MPS_SHIFT 0
+#define DOEPCTL_MPS_MASK 0x000007ff
+#define DOEPCTL_MPS_SET(n) ((n) & 0x7FF)
+#define DOEPCTL_MPS_64 (0<<0)
+#define DOEPCTL_MPS_32 (1<<0)
+#define DOEPCTL_MPS_16 (2<<0)
+#define DOEPCTL_MPS_8 (3<<0)
+
+/* common bits */
+#define DXEPINT_TXFEMP (1<<7)
+#define DXEPINT_SETUP (1<<3)
+#define DXEPINT_XFER_COMPL (1<<0)
+
+#define DIEPTSIZ_XFERSIZE_MASK 0x0007ffff
+#define DIEPTSIZ_XFERSIZE_SHIFT 0
+#define DIEPTSIZ_PKTCNT_MASK 0x1ff80000
+#define DIEPTSIZ_PKTCNT_SHIFT 19
+#define DIEPTSIZ_MC_MASK 0x60000000
+#define DIEPTSIZ_MC_SHIFT 29
+
+#define DOEPTSIZ_XFERSIZE_MASK 0x0007ffff
+#define DOEPTSIZ_XFERSIZE_SHIFT 0
+#define DOEPTSIZ_PKTCNT_MASK 0x1ff80000
+#define DOEPTSIZ_PKTCNT_SHIFT 19
+#define DOEPTSIZ_MC_MASK 0x60000000
+#define DOEPTSIZ_MC_SHIFT 29
+
+/* common bits */
+#define DXEPTSIZ_SET_MULTI(n) (((n) & 3) << 29)
+#define DXEPTSIZ_SET_NPKT(n) (((n) & 0x3FF) << 19)
+#define DXEPTSIZ_GET_NPKT(n) (((n) >> 19) & 0x3FF)
+#define DXEPTSIZ_SET_NBYTES(n) (((n) & 0x7FFFFF) << 0)
+#define DXEPTSIZ_GET_NBYTES(n) (((n) >> 0) & 0x7FFFFF)
+
+/* generic endpoint mask */
+
+#define ENDPOINT_MASK(x,in) \
+ ((in) ? (1U << ((x) & 15U)) : \
+ (0x10000U << ((x) & 15U)))
+
+#endif /* _DWC_OTGREG_H_ */
Property changes on: trunk/sys/dev/usb/controller/dwc_otgreg.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/dev/usb/controller/ehci.c
===================================================================
--- trunk/sys/dev/usb/controller/ehci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ehci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,5 @@
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/ehci.c 273883 2014-10-31 07:38:49Z hselasky $ */
/*-
* Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
* Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
@@ -43,9 +45,9 @@
* 1) command failures are not recovered correctly
*/
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ehci.c 273887 2014-10-31 07:59:07Z hselasky $");
-
+#ifdef USB_GLOBAL_INCLUDE_FILE
+#include USB_GLOBAL_INCLUDE_FILE
+#else
#include <sys/stdint.h>
#include <sys/stddef.h>
#include <sys/param.h>
@@ -81,6 +83,8 @@
#include <dev/usb/usb_controller.h>
#include <dev/usb/usb_bus.h>
+#endif /* USB_GLOBAL_INCLUDE_FILE */
+
#include <dev/usb/controller/ehci.h>
#include <dev/usb/controller/ehcireg.h>
Modified: trunk/sys/dev/usb/controller/ehci.h
===================================================================
--- trunk/sys/dev/usb/controller/ehci.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ehci.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/ehci.h 242776 2012-11-08 16:17:52Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/ehci.h 261455 2014-02-04 03:36:42Z eadler $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -90,7 +91,7 @@
#define EHCI_ITD_GET_PG(x) (((x) >> 12) & 0x7)
#define EHCI_ITD_SET_OFFS(x) (x)
#define EHCI_ITD_GET_OFFS(x) (((x) >> 0) & 0xFFF)
-#define EHCI_ITD_ACTIVE (1 << 31)
+#define EHCI_ITD_ACTIVE (1U << 31)
#define EHCI_ITD_DATABUFERR (1 << 30)
#define EHCI_ITD_BABBLE (1 << 29)
#define EHCI_ITD_XACTERR (1 << 28)
@@ -126,7 +127,7 @@
volatile uint32_t sitd_next;
volatile uint32_t sitd_portaddr;
#define EHCI_SITD_SET_DIR_OUT (0 << 31)
-#define EHCI_SITD_SET_DIR_IN (1 << 31)
+#define EHCI_SITD_SET_DIR_IN (1U << 31)
#define EHCI_SITD_SET_ADDR(x) (x)
#define EHCI_SITD_GET_ADDR(x) ((x) & 0x7F)
#define EHCI_SITD_SET_ENDPT(x) ((x) << 8)
Added: trunk/sys/dev/usb/controller/ehci_fsl.c
===================================================================
--- trunk/sys/dev/usb/controller/ehci_fsl.c (rev 0)
+++ trunk/sys/dev/usb/controller/ehci_fsl.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -0,0 +1,428 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2010-2012 Semihalf
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ehci_fsl.c 278278 2015-02-05 20:03:02Z hselasky $");
+
+#include "opt_bus.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/queue.h>
+#include <sys/lock.h>
+#include <sys/lockmgr.h>
+#include <sys/condvar.h>
+#include <sys/rman.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usb_core.h>
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+#include <dev/usb/usb_util.h>
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+#include <dev/usb/controller/ehci.h>
+#include <dev/usb/controller/ehcireg.h>
+
+#include <machine/bus.h>
+#include <machine/clock.h>
+#include <machine/resource.h>
+
+#include <powerpc/include/tlb.h>
+
+#include "opt_platform.h"
+
+/*
+ * Register the driver
+ */
+/* Forward declarations */
+static int fsl_ehci_attach(device_t self);
+static int fsl_ehci_detach(device_t self);
+static int fsl_ehci_probe(device_t self);
+
+static device_method_t ehci_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, fsl_ehci_probe),
+ DEVMETHOD(device_attach, fsl_ehci_attach),
+ DEVMETHOD(device_detach, fsl_ehci_detach),
+ DEVMETHOD(device_suspend, bus_generic_suspend),
+ DEVMETHOD(device_resume, bus_generic_resume),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ /* Bus interface */
+ DEVMETHOD(bus_print_child, bus_generic_print_child),
+
+ { 0, 0 }
+};
+
+/* kobj_class definition */
+static driver_t ehci_driver = {
+ "ehci",
+ ehci_methods,
+ sizeof(struct ehci_softc)
+};
+
+static devclass_t ehci_devclass;
+
+DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
+MODULE_DEPEND(ehci, usb, 1, 1, 1);
+
+/*
+ * Private defines
+ */
+#define FSL_EHCI_REG_OFF 0x100
+#define FSL_EHCI_REG_SIZE 0x300
+
+/*
+ * Internal interface registers' offsets.
+ * Offsets from 0x000 ehci dev space, big-endian access.
+ */
+enum internal_reg {
+ SNOOP1 = 0x400,
+ SNOOP2 = 0x404,
+ AGE_CNT_THRESH = 0x408,
+ SI_CTRL = 0x410,
+ CONTROL = 0x500
+};
+
+/* CONTROL register bit flags */
+enum control_flags {
+ USB_EN = 0x00000004,
+ UTMI_PHY_EN = 0x00000200,
+ ULPI_INT_EN = 0x00000001
+};
+
+/* SI_CTRL register bit flags */
+enum si_ctrl_flags {
+ FETCH_32 = 1,
+ FETCH_64 = 0
+};
+
+#define SNOOP_RANGE_2GB 0x1E
+
+/*
+ * Operational registers' offsets.
+ * Offsets from USBCMD register, little-endian access.
+ */
+enum special_op_reg {
+ USBMODE = 0x0A8,
+ PORTSC = 0x084,
+ ULPI_VIEWPORT = 0x70
+};
+
+/* USBMODE register bit flags */
+enum usbmode_flags {
+ HOST_MODE = 0x3,
+ DEVICE_MODE = 0x2
+};
+
+#define PORT_POWER_MASK 0x00001000
+
+/*
+ * Private methods
+ */
+
+static void
+set_to_host_mode(ehci_softc_t *sc)
+{
+ int tmp;
+
+ tmp = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, USBMODE);
+ bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, USBMODE, tmp | HOST_MODE);
+}
+
+static void
+enable_usb(device_t dev, bus_space_tag_t iot, bus_space_handle_t ioh)
+{
+ int tmp;
+ phandle_t node;
+ char *phy_type;
+
+ phy_type = NULL;
+ tmp = bus_space_read_4(iot, ioh, CONTROL) | USB_EN;
+
+ node = ofw_bus_get_node(dev);
+ if ((node != 0) &&
+ (OF_getprop_alloc(node, "phy_type", 1, (void **)&phy_type) > 0)) {
+ if (strncasecmp(phy_type, "utmi", strlen("utmi")) == 0)
+ tmp |= UTMI_PHY_EN;
+ free(phy_type, M_OFWPROP);
+ }
+ bus_space_write_4(iot, ioh, CONTROL, tmp);
+}
+
+static void
+set_32b_prefetch(bus_space_tag_t iot, bus_space_handle_t ioh)
+{
+
+ bus_space_write_4(iot, ioh, SI_CTRL, FETCH_32);
+}
+
+static void
+set_snooping(bus_space_tag_t iot, bus_space_handle_t ioh)
+{
+
+ bus_space_write_4(iot, ioh, SNOOP1, SNOOP_RANGE_2GB);
+ bus_space_write_4(iot, ioh, SNOOP2, 0x80000000 | SNOOP_RANGE_2GB);
+}
+
+static void
+clear_port_power(ehci_softc_t *sc)
+{
+ int tmp;
+
+ tmp = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl, PORTSC);
+ bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, PORTSC, tmp & ~PORT_POWER_MASK);
+}
+
+/*
+ * Public methods
+ */
+static int
+fsl_ehci_probe(device_t dev)
+{
+
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (((ofw_bus_is_compatible(dev, "fsl-usb2-dr")) == 0) &&
+ ((ofw_bus_is_compatible(dev, "fsl-usb2-mph")) == 0))
+ return (ENXIO);
+
+ device_set_desc(dev, "Freescale integrated EHCI controller");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+fsl_ehci_attach(device_t self)
+{
+ ehci_softc_t *sc;
+ int rid;
+ int err;
+ bus_space_handle_t ioh;
+ bus_space_tag_t iot;
+
+ sc = device_get_softc(self);
+ rid = 0;
+
+ sc->sc_bus.parent = self;
+ sc->sc_bus.devices = sc->sc_devices;
+ sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
+ sc->sc_bus.dma_bits = 32;
+
+ if (usb_bus_mem_alloc_all(&sc->sc_bus,
+ USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc))
+ return (ENOMEM);
+
+ /* Allocate io resource for EHCI */
+ sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
+ RF_ACTIVE);
+ if (sc->sc_io_res == NULL) {
+ err = fsl_ehci_detach(self);
+ if (err) {
+ device_printf(self,
+ "Detach of the driver failed with error %d\n",
+ err);
+ }
+ return (ENXIO);
+ }
+ iot = rman_get_bustag(sc->sc_io_res);
+
+ /*
+ * Set handle to USB related registers subregion used by generic
+ * EHCI driver
+ */
+ ioh = rman_get_bushandle(sc->sc_io_res);
+
+ err = bus_space_subregion(iot, ioh, FSL_EHCI_REG_OFF, FSL_EHCI_REG_SIZE,
+ &sc->sc_io_hdl);
+ if (err != 0) {
+ err = fsl_ehci_detach(self);
+ if (err) {
+ device_printf(self,
+ "Detach of the driver failed with error %d\n",
+ err);
+ }
+ return (ENXIO);
+ }
+
+ /* Set little-endian tag for use by the generic EHCI driver */
+ sc->sc_io_tag = &bs_le_tag;
+
+ /* Allocate irq */
+ sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
+ RF_ACTIVE);
+ if (sc->sc_irq_res == NULL) {
+ err = fsl_ehci_detach(self);
+ if (err) {
+ device_printf(self,
+ "Detach of the driver failed with error %d\n",
+ err);
+ }
+ return (ENXIO);
+ }
+
+ /* Setup interrupt handler */
+ err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO,
+ NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
+ if (err) {
+ device_printf(self, "Could not setup irq, %d\n", err);
+ sc->sc_intr_hdl = NULL;
+ err = fsl_ehci_detach(self);
+ if (err) {
+ device_printf(self,
+ "Detach of the driver failed with error %d\n",
+ err);
+ }
+ return (ENXIO);
+ }
+
+ /* Add USB device */
+ sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
+ if (!sc->sc_bus.bdev) {
+ device_printf(self, "Could not add USB device\n");
+ err = fsl_ehci_detach(self);
+ if (err) {
+ device_printf(self,
+ "Detach of the driver failed with error %d\n",
+ err);
+ }
+ return (ENOMEM);
+ }
+ device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
+
+ sc->sc_id_vendor = 0x1234;
+ strlcpy(sc->sc_vendor, "Freescale", sizeof(sc->sc_vendor));
+
+ /* Enable USB */
+ err = ehci_reset(sc);
+ if (err) {
+ device_printf(self, "Could not reset the controller\n");
+ err = fsl_ehci_detach(self);
+ if (err) {
+ device_printf(self,
+ "Detach of the driver failed with error %d\n",
+ err);
+ }
+ return (ENXIO);
+ }
+
+ enable_usb(self, iot, ioh);
+ set_snooping(iot, ioh);
+ set_to_host_mode(sc);
+ set_32b_prefetch(iot, ioh);
+
+ /*
+ * If usb subsystem is enabled in U-Boot, port power has to be turned
+ * off to allow proper discovery of devices during boot up.
+ */
+ clear_port_power(sc);
+
+ /* Set flags */
+ sc->sc_flags |= EHCI_SCFLG_DONTRESET | EHCI_SCFLG_NORESTERM;
+
+ err = ehci_init(sc);
+ if (!err) {
+ sc->sc_flags |= EHCI_SCFLG_DONEINIT;
+ err = device_probe_and_attach(sc->sc_bus.bdev);
+ }
+
+ if (err) {
+ device_printf(self, "USB init failed err=%d\n", err);
+ err = fsl_ehci_detach(self);
+ if (err) {
+ device_printf(self,
+ "Detach of the driver failed with error %d\n",
+ err);
+ }
+ return (EIO);
+ }
+
+ return (0);
+}
+
+static int
+fsl_ehci_detach(device_t self)
+{
+
+ int err;
+ ehci_softc_t *sc;
+
+ sc = device_get_softc(self);
+ /*
+ * only call ehci_detach() after ehci_init()
+ */
+ if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
+ ehci_detach(sc);
+ sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
+ }
+
+ /* Disable interrupts that might have been switched on in ehci_init */
+ if (sc->sc_io_tag && sc->sc_io_hdl)
+ bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, EHCI_USBINTR, 0);
+
+ if (sc->sc_irq_res && sc->sc_intr_hdl) {
+ err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
+ if (err) {
+ device_printf(self, "Could not tear down irq, %d\n",
+ err);
+ return (err);
+ }
+ sc->sc_intr_hdl = NULL;
+ }
+
+ if (sc->sc_bus.bdev) {
+ device_delete_child(self, sc->sc_bus.bdev);
+ sc->sc_bus.bdev = NULL;
+ }
+
+ /* During module unload there are lots of children leftover */
+ device_delete_children(self);
+
+ if (sc->sc_irq_res) {
+ bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
+ sc->sc_irq_res = NULL;
+ }
+
+ if (sc->sc_io_res) {
+ bus_release_resource(self, SYS_RES_MEMORY, 0, sc->sc_io_res);
+ sc->sc_io_res = NULL;
+ sc->sc_io_tag = 0;
+ sc->sc_io_hdl = 0;
+ }
+
+ return (0);
+}
+
Property changes on: trunk/sys/dev/usb/controller/ehci_fsl.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/usb/controller/ehci_imx.c
===================================================================
--- trunk/sys/dev/usb/controller/ehci_imx.c (rev 0)
+++ trunk/sys/dev/usb/controller/ehci_imx.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -0,0 +1,338 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2010-2012 Semihalf
+ * Copyright (c) 2012 The FreeBSD Foundation
+ * Copyright (c) 2013 Ian Lepore <ian at freebsd.org>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by Oleksandr Rybalko
+ * under sponsorship from the FreeBSD Foundation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ehci_imx.c 278278 2015-02-05 20:03:02Z hselasky $");
+
+/*
+ * EHCI driver for Freescale i.MX SoCs which incorporate the USBOH3 controller.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/condvar.h>
+#include <sys/rman.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+#include <dev/usb/controller/ehci.h>
+#include <dev/usb/controller/ehcireg.h>
+#include "usbdevs.h"
+
+#include <machine/bus.h>
+#include <machine/resource.h>
+
+#include <arm/freescale/imx/imx_ccmvar.h>
+
+#include "opt_platform.h"
+
+/*
+ * Notes on the hardware and related FDT data seen in the wild.
+ *
+ * There are two sets of registers in the USBOH3 implementation; documentation
+ * refers to them as "core" and "non-core" registers. A set of core register
+ * exists for each OTG or EHCI device. There is a single set of non-core
+ * registers per USBOH3, and they control aspects of operation not directly
+ * related to the USB specs, such as whether interrupts from each of the core
+ * devices are able to generate a SoC wakeup event.
+ *
+ * In the FreeBSD universe we might be inclined to describe the core and
+ * non-core registers by using a pair of resource address/size values (two
+ * entries in the reg property for each core). However, we have to work with
+ * existing FDT data (which mostly comes from the linux universe), and the way
+ * they've chosen to represent this is with an entry for a "usbmisc" device
+ * whose reg property describes the non-core registers. The way we handle FDT
+ * data, this means that the resources (memory-mapped register range) for the
+ * non-core registers belongs to a device other than the echi devices.
+ *
+ * At the moment we have no need to access the non-core registers, so all of
+ * this amounts to documenting what's known. The following compat strings have
+ * been seen in existing FDT data:
+ * - "fsl,imx25-usbmisc"
+ * - "fsl,imx51-usbmisc";
+ * - "fsl,imx6q-usbmisc";
+ *
+ * In addition to the single usbmisc device, the existing FDT data defines a
+ * separate device for each of the OTG or EHCI cores within the USBOH3. Each of
+ * those devices has a set of core registers described by the reg property.
+ *
+ * The core registers for each of the four cores in the USBOH3 are divided into
+ * two parts: a set of imx-specific registers at an offset of 0 from the
+ * beginning of the register range, and the standard USB (EHCI or OTG) registers
+ * at an offset of 0x100 from the beginning of the register range. The FreeBSD
+ * way of dealing with this might be to map out two ranges in the reg property,
+ * but that's not what the alternate universe has done. To work with existing
+ * FDT data, we acquire the resource that maps all the core registers, then use
+ * bus_space_subregion() to create another resource that maps just the standard
+ * USB registers, which we provide to the standard USB code in the ehci_softc.
+ *
+ * The following compat strings have been seen for the OTG and EHCI cores. The
+ * FDT compat table in this driver contains all these strings, but as of this
+ * writing, not all of these SoCs have been tested with the driver. The fact
+ * that imx27 is common to all of them gives some hope that the driver will work
+ * on all these SoCs.
+ * - "fsl,imx23-usb", "fsl,imx27-usb";
+ * - "fsl,imx25-usb", "fsl,imx27-usb";
+ * - "fsl,imx28-usb", "fsl,imx27-usb";
+ * - "fsl,imx51-usb", "fsl,imx27-usb";
+ * - "fsl,imx53-usb", "fsl,imx27-usb";
+ * - "fsl,imx6q-usb", "fsl,imx27-usb";
+ *
+ * The FDT data for some SoCs contains the following properties, which we don't
+ * currently do anything with:
+ * - fsl,usbmisc = <&usbmisc 0>;
+ * - fsl,usbphy = <&usbphy0>;
+ *
+ * Some imx SoCs have FDT data related to USB PHY, some don't. We have separate
+ * usbphy drivers where needed; this data is mentioned here just to keep all the
+ * imx-FDT-usb-related info in one place. Here are the usbphy compat strings
+ * known to exist:
+ * - "nop-usbphy"
+ * - "usb-nop-xceiv";
+ * - "fsl,imx23-usbphy"
+ * - "fsl,imx28-usbphy", "fsl,imx23-usbphy";
+ * - "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
+ *
+ */
+
+static struct ofw_compat_data compat_data[] = {
+ {"fsl,imx6q-usb", 1},
+ {"fsl,imx53-usb", 1},
+ {"fsl,imx51-usb", 1},
+ {"fsl,imx28-usb", 1},
+ {"fsl,imx27-usb", 1},
+ {"fsl,imx25-usb", 1},
+ {"fsl,imx23-usb", 1},
+ {NULL, 0},
+};
+
+/*
+ * Each EHCI device in the SoC has some SoC-specific per-device registers at an
+ * offset of 0, then the standard EHCI registers begin at an offset of 0x100.
+ */
+#define IMX_EHCI_REG_OFF 0x100
+#define IMX_EHCI_REG_SIZE 0x100
+
+struct imx_ehci_softc {
+ ehci_softc_t ehci_softc;
+ struct resource *ehci_mem_res; /* EHCI core regs. */
+ struct resource *ehci_irq_res; /* EHCI core IRQ. */
+};
+
+static int
+imx_ehci_probe(device_t dev)
+{
+
+ if (!ofw_bus_status_okay(dev))
+ return (ENXIO);
+
+ if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
+ device_set_desc(dev, "Freescale i.MX integrated USB controller");
+ return (BUS_PROBE_DEFAULT);
+ }
+ return (ENXIO);
+}
+
+static int
+imx_ehci_detach(device_t dev)
+{
+ struct imx_ehci_softc *sc;
+ ehci_softc_t *esc;
+
+ sc = device_get_softc(dev);
+
+ esc = &sc->ehci_softc;
+
+ if (esc->sc_bus.bdev != NULL)
+ device_delete_child(dev, esc->sc_bus.bdev);
+ if (esc->sc_flags & EHCI_SCFLG_DONEINIT)
+ ehci_detach(esc);
+ if (esc->sc_intr_hdl != NULL)
+ bus_teardown_intr(dev, esc->sc_irq_res,
+ esc->sc_intr_hdl);
+ if (sc->ehci_irq_res != NULL)
+ bus_release_resource(dev, SYS_RES_IRQ, 0,
+ sc->ehci_irq_res);
+ if (sc->ehci_mem_res != NULL)
+ bus_release_resource(dev, SYS_RES_MEMORY, 0,
+ sc->ehci_mem_res);
+
+ usb_bus_mem_free_all(&esc->sc_bus, &ehci_iterate_hw_softc);
+
+ /* During module unload there are lots of children leftover */
+ device_delete_children(dev);
+
+ return (0);
+}
+
+static int
+imx_ehci_attach(device_t dev)
+{
+ struct imx_ehci_softc *sc;
+ ehci_softc_t *esc;
+ int err, rid;
+
+ sc = device_get_softc(dev);
+ esc = &sc->ehci_softc;
+ err = 0;
+
+ /* Allocate bus_space resources. */
+ rid = 0;
+ sc->ehci_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
+ RF_ACTIVE);
+ if (sc->ehci_mem_res == NULL) {
+ device_printf(dev, "Cannot allocate memory resources\n");
+ err = ENXIO;
+ goto out;
+ }
+
+ rid = 0;
+ sc->ehci_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
+ RF_ACTIVE);
+ if (sc->ehci_irq_res == NULL) {
+ device_printf(dev, "Cannot allocate IRQ resources\n");
+ err = ENXIO;
+ goto out;
+ }
+
+ esc->sc_io_tag = rman_get_bustag(sc->ehci_mem_res);
+ esc->sc_bus.parent = dev;
+ esc->sc_bus.devices = esc->sc_devices;
+ esc->sc_bus.devices_max = EHCI_MAX_DEVICES;
+ esc->sc_bus.dma_bits = 32;
+
+ /* allocate all DMA memory */
+ if (usb_bus_mem_alloc_all(&esc->sc_bus, USB_GET_DMA_TAG(dev),
+ &ehci_iterate_hw_softc) != 0) {
+ device_printf(dev, "usb_bus_mem_alloc_all() failed\n");
+ err = ENOMEM;
+ goto out;
+ }
+
+ /*
+ * Set handle to USB related registers subregion used by
+ * generic EHCI driver.
+ */
+ err = bus_space_subregion(esc->sc_io_tag,
+ rman_get_bushandle(sc->ehci_mem_res),
+ IMX_EHCI_REG_OFF, IMX_EHCI_REG_SIZE, &esc->sc_io_hdl);
+ if (err != 0) {
+ device_printf(dev, "bus_space_subregion() failed\n");
+ err = ENXIO;
+ goto out;
+ }
+
+ /* Setup interrupt handler. */
+ err = bus_setup_intr(dev, sc->ehci_irq_res, INTR_TYPE_BIO, NULL,
+ (driver_intr_t *)ehci_interrupt, esc, &esc->sc_intr_hdl);
+ if (err != 0) {
+ device_printf(dev, "Could not setup IRQ\n");
+ goto out;
+ }
+
+ /* Turn on clocks. */
+ imx_ccm_usb_enable(dev);
+
+ /* Add USB bus device. */
+ esc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
+ if (esc->sc_bus.bdev == NULL) {
+ device_printf(dev, "Could not add USB device\n");
+ goto out;
+ }
+ device_set_ivars(esc->sc_bus.bdev, &esc->sc_bus);
+
+ esc->sc_id_vendor = USB_VENDOR_FREESCALE;
+ strlcpy(esc->sc_vendor, "Freescale", sizeof(esc->sc_vendor));
+
+ /* Set flags that affect ehci_init() behavior. */
+ esc->sc_flags |= EHCI_SCFLG_DONTRESET | EHCI_SCFLG_NORESTERM;
+ err = ehci_init(esc);
+ if (err != 0) {
+ device_printf(dev, "USB init failed, usb_err_t=%d\n",
+ err);
+ goto out;
+ }
+ esc->sc_flags |= EHCI_SCFLG_DONEINIT;
+
+ /* Probe the bus. */
+ err = device_probe_and_attach(esc->sc_bus.bdev);
+ if (err != 0) {
+ device_printf(dev,
+ "device_probe_and_attach() failed\n");
+ goto out;
+ }
+
+ err = 0;
+
+out:
+
+ if (err != 0)
+ imx_ehci_detach(dev);
+
+ return (err);
+}
+
+static device_method_t ehci_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, imx_ehci_probe),
+ DEVMETHOD(device_attach, imx_ehci_attach),
+ DEVMETHOD(device_detach, imx_ehci_detach),
+ DEVMETHOD(device_suspend, bus_generic_suspend),
+ DEVMETHOD(device_resume, bus_generic_resume),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ /* Bus interface */
+ DEVMETHOD(bus_print_child, bus_generic_print_child),
+
+ DEVMETHOD_END
+};
+
+static driver_t ehci_driver = {
+ "ehci",
+ ehci_methods,
+ sizeof(struct imx_ehci_softc)
+};
+
+static devclass_t ehci_devclass;
+
+DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
+MODULE_DEPEND(ehci, usb, 1, 1, 1);
Property changes on: trunk/sys/dev/usb/controller/ehci_imx.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/dev/usb/controller/ehci_ixp4xx.c
===================================================================
--- trunk/sys/dev/usb/controller/ehci_ixp4xx.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ehci_ixp4xx.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2008 Sam Leffler. All rights reserved.
*
@@ -27,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ehci_ixp4xx.c 308403 2016-11-07 09:23:07Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ehci_ixp4xx.c 308402 2016-11-07 09:19:04Z hselasky $");
#include "opt_bus.h"
@@ -79,12 +80,12 @@
static device_attach_t ehci_ixp_attach;
static device_detach_t ehci_ixp_detach;
-static uint8_t ehci_bs_r_1(void *, bus_space_handle_t, bus_size_t);
-static void ehci_bs_w_1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
-static uint16_t ehci_bs_r_2(void *, bus_space_handle_t, bus_size_t);
-static void ehci_bs_w_2(void *, bus_space_handle_t, bus_size_t, uint16_t);
-static uint32_t ehci_bs_r_4(void *, bus_space_handle_t, bus_size_t);
-static void ehci_bs_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t);
+static uint8_t ehci_bs_r_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
+static void ehci_bs_w_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int8_t);
+static uint16_t ehci_bs_r_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
+static void ehci_bs_w_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, uint16_t);
+static uint32_t ehci_bs_r_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
+static void ehci_bs_w_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, uint32_t);
static int
ehci_ixp_probe(device_t self)
@@ -132,15 +133,15 @@
* done with bus_space_subregion.
*/
isc->iot = rman_get_bustag(sc->sc_io_res);
- isc->tag.bs_cookie = isc->iot;
+ isc->tag.bs_privdata = isc->iot;
/* read single */
- isc->tag.bs_r_1 = ehci_bs_r_1,
- isc->tag.bs_r_2 = ehci_bs_r_2,
- isc->tag.bs_r_4 = ehci_bs_r_4,
+ isc->tag.bs_r_1 = ehci_bs_r_1;
+ isc->tag.bs_r_2 = ehci_bs_r_2;
+ isc->tag.bs_r_4 = ehci_bs_r_4;
/* write (single) */
- isc->tag.bs_w_1 = ehci_bs_w_1,
- isc->tag.bs_w_2 = ehci_bs_w_2,
- isc->tag.bs_w_4 = ehci_bs_w_4,
+ isc->tag.bs_w_1 = ehci_bs_w_1;
+ isc->tag.bs_w_2 = ehci_bs_w_2;
+ isc->tag.bs_w_4 = ehci_bs_w_4;
sc->sc_io_tag = &isc->tag;
sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
@@ -246,41 +247,41 @@
*/
static uint8_t
-ehci_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
+ehci_bs_r_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
- return bus_space_read_1((bus_space_tag_t) t, h,
+ return bus_space_read_1((bus_space_tag_t)tag->bs_privdata, h,
0x100 + (o &~ 3) + (3 - (o & 3)));
}
static void
-ehci_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
+ehci_bs_w_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, u_int8_t v)
{
panic("%s", __func__);
}
static uint16_t
-ehci_bs_r_2(void *t, bus_space_handle_t h, bus_size_t o)
+ehci_bs_r_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
- return bus_space_read_2((bus_space_tag_t) t, h,
+ return bus_space_read_2((bus_space_tag_t)tag->bs_privdata, h,
0x100 + (o &~ 3) + (2 - (o & 3)));
}
static void
-ehci_bs_w_2(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
+ehci_bs_w_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint16_t v)
{
panic("%s", __func__);
}
static uint32_t
-ehci_bs_r_4(void *t, bus_space_handle_t h, bus_size_t o)
+ehci_bs_r_4(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
{
- return bus_space_read_4((bus_space_tag_t) t, h, 0x100 + o);
+ return bus_space_read_4((bus_space_tag_t) tag->bs_privdata, h, 0x100 + o);
}
static void
-ehci_bs_w_4(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v)
+ehci_bs_w_4(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint32_t v)
{
- bus_space_write_4((bus_space_tag_t) t, h, 0x100 + o, v);
+ bus_space_write_4((bus_space_tag_t) tag->bs_privdata, h, 0x100 + o, v);
}
static device_method_t ehci_methods[] = {
Modified: trunk/sys/dev/usb/controller/ehci_mv.c
===================================================================
--- trunk/sys/dev/usb/controller/ehci_mv.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ehci_mv.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
* All rights reserved.
@@ -34,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ehci_mv.c 308403 2016-11-07 09:23:07Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ehci_mv.c 308402 2016-11-07 09:19:04Z hselasky $");
#include "opt_bus.h"
@@ -103,6 +104,9 @@
mv_ehci_probe(device_t self)
{
+ if (!ofw_bus_status_okay(self))
+ return (ENXIO);
+
if (!ofw_bus_is_compatible(self, "mrvl,usb-ehci"))
return (ENXIO);
Modified: trunk/sys/dev/usb/controller/ehci_pci.c
===================================================================
--- trunk/sys/dev/usb/controller/ehci_pci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ehci_pci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -29,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ehci_pci.c 308403 2016-11-07 09:23:07Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ehci_pci.c 316651 2017-04-09 06:44:31Z mav $");
/*
* USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
@@ -112,6 +113,8 @@
case 0x20951022:
return ("AMD CS5536 (Geode) USB 2.0 controller");
+ case 0x78081022:
+ return ("AMD FCH USB 2.0 controller");
case 0x43451002:
return "ATI SB200 USB 2.0 controller";
@@ -120,6 +123,12 @@
case 0x43961002:
return ("AMD SB7x0/SB8x0/SB9x0 USB 2.0 controller");
+ case 0x0f348086:
+ return ("Intel BayTrail USB 2.0 controller");
+ case 0x1c268086:
+ return ("Intel Cougar Point USB 2.0 controller");
+ case 0x1c2d8086:
+ return ("Intel Cougar Point USB 2.0 controller");
case 0x1d268086:
return ("Intel Patsburg USB 2.0 controller");
case 0x1d2d8086:
@@ -166,9 +175,15 @@
return ("Intel Wildcat Point USB 2.0 controller USB-A");
case 0x8cad8086:
return ("Intel Wildcat Point USB 2.0 controller USB-B");
+ case 0x8d268086:
+ return ("Intel Wellsburg USB 2.0 controller");
+ case 0x8d2d8086:
+ return ("Intel Wellsburg USB 2.0 controller");
+ case 0x9c268086:
+ return ("Intel Lynx Point LP USB 2.0 controller USB");
case 0x00e01033:
- return ("NEC uPD 720100 USB 2.0 controller");
+ return ("NEC uPD 72010x USB 2.0 controller");
case 0x006810de:
return "NVIDIA nForce2 USB 2.0 controller";
@@ -216,7 +231,7 @@
if (desc) {
device_set_desc(self, desc);
- return (0);
+ return (BUS_PROBE_DEFAULT);
} else {
return (ENXIO);
}
Modified: trunk/sys/dev/usb/controller/ehcireg.h
===================================================================
--- trunk/sys/dev/usb/controller/ehcireg.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ehcireg.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/ehcireg.h 214349 2010-10-25 15:51:43Z nwhitehorn $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/ehcireg.h 214349 2010-10-25 15:51:43Z nwhitehorn $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
Modified: trunk/sys/dev/usb/controller/musb_otg.c
===================================================================
--- trunk/sys/dev/usb/controller/musb_otg.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/musb_otg.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/musb_otg.c 279280 2015-02-25 12:26:45Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/musb_otg.c 279279 2015-02-25 12:24:24Z hselasky $ */
/*-
* Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
*
@@ -36,6 +37,9 @@
* NOTE: The current implementation only supports Device Side Mode!
*/
+#ifdef USB_GLOBAL_INCLUDE_FILE
+#include USB_GLOBAL_INCLUDE_FILE
+#else
#include <sys/stdint.h>
#include <sys/stddef.h>
#include <sys/param.h>
@@ -71,6 +75,8 @@
#include <dev/usb/usb_controller.h>
#include <dev/usb/usb_bus.h>
+#endif /* USB_GLOBAL_INCLUDE_FILE */
+
#include <dev/usb/controller/musb_otg.h>
#define MUSBOTG_INTR_ENDPT 1
@@ -2824,7 +2830,13 @@
}
static void
-musbotg_set_stall(struct usb_device *udev, struct usb_xfer *xfer,
+musbotg_xfer_stall(struct usb_xfer *xfer)
+{
+ musbotg_device_done(xfer, USB_ERR_STALLED);
+}
+
+static void
+musbotg_set_stall(struct usb_device *udev,
struct usb_endpoint *ep, uint8_t *did_stall)
{
struct musbotg_softc *sc;
@@ -2834,10 +2846,6 @@
DPRINTFN(4, "endpoint=%p\n", ep);
- if (xfer) {
- /* cancel any ongoing transfers */
- musbotg_device_done(xfer, USB_ERR_STALLED);
- }
/* set FORCESTALL */
sc = MUSBOTG_BUS2SC(udev->bus);
@@ -3583,19 +3591,12 @@
.DeviceRemovable = {0}, /* port is removable */
};
-#define STRING_LANG \
- 0x09, 0x04, /* American English */
-
#define STRING_VENDOR \
- 'M', 0, 'e', 0, 'n', 0, 't', 0, 'o', 0, 'r', 0, ' ', 0, \
- 'G', 0, 'r', 0, 'a', 0, 'p', 0, 'h', 0, 'i', 0, 'c', 0, 's', 0
+ "M\0e\0n\0t\0o\0r\0 \0G\0r\0a\0p\0h\0i\0c\0s"
#define STRING_PRODUCT \
- 'O', 0, 'T', 0, 'G', 0, ' ', 0, 'R', 0, \
- 'o', 0, 'o', 0, 't', 0, ' ', 0, 'H', 0, \
- 'U', 0, 'B', 0,
+ "O\0T\0G\0 \0R\0o\0o\0t\0 \0H\0U\0B"
-USB_MAKE_STRING_DESC(STRING_LANG, musbotg_langtab);
USB_MAKE_STRING_DESC(STRING_VENDOR, musbotg_vendor);
USB_MAKE_STRING_DESC(STRING_PRODUCT, musbotg_product);
@@ -3805,8 +3806,8 @@
case UDESC_STRING:
switch (value & 0xff) {
case 0: /* Language table */
- len = sizeof(musbotg_langtab);
- ptr = (const void *)&musbotg_langtab;
+ len = sizeof(usb_string_lang_en);
+ ptr = (const void *)&usb_string_lang_en;
goto tr_valid;
case 1: /* Vendor */
@@ -4244,6 +4245,7 @@
.xfer_setup = &musbotg_xfer_setup,
.xfer_unsetup = &musbotg_xfer_unsetup,
.get_hw_ep_profile = &musbotg_get_hw_ep_profile,
+ .xfer_stall = &musbotg_xfer_stall,
.set_stall = &musbotg_set_stall,
.clear_stall = &musbotg_clear_stall,
.roothub_exec = &musbotg_roothub_exec,
Modified: trunk/sys/dev/usb/controller/musb_otg.h
===================================================================
--- trunk/sys/dev/usb/controller/musb_otg.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/musb_otg.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/musb_otg.h 257041 2013-10-24 06:22:43Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/musb_otg.h 257043 2013-10-24 07:38:32Z hselasky $ */
/*-
* Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
*
Modified: trunk/sys/dev/usb/controller/musb_otg_atmelarm.c
===================================================================
--- trunk/sys/dev/usb/controller/musb_otg_atmelarm.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/musb_otg_atmelarm.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
*
@@ -24,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/musb_otg_atmelarm.c 308403 2016-11-07 09:23:07Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/musb_otg_atmelarm.c 308402 2016-11-07 09:19:04Z hselasky $");
#include <sys/stdint.h>
#include <sys/stddef.h>
Modified: trunk/sys/dev/usb/controller/ohci.c
===================================================================
--- trunk/sys/dev/usb/controller/ohci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ohci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,5 @@
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/ohci.c 246122 2013-01-30 15:26:04Z hselasky $ */
/*-
* Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
* Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
@@ -25,9 +27,6 @@
* SUCH DAMAGE.
*/
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ohci.c 257040 2013-10-24 06:06:17Z hselasky $");
-
/*
* USB Open Host Controller driver.
*
@@ -35,6 +34,9 @@
* USB spec: http://www.usb.org/developers/docs/usbspec.zip
*/
+#ifdef USB_GLOBAL_INCLUDE_FILE
+#include USB_GLOBAL_INCLUDE_FILE
+#else
#include <sys/stdint.h>
#include <sys/stddef.h>
#include <sys/param.h>
@@ -70,6 +72,8 @@
#include <dev/usb/usb_controller.h>
#include <dev/usb/usb_bus.h>
+#endif /* USB_GLOBAL_INCLUDE_FILE */
+
#include <dev/usb/controller/ohci.h>
#include <dev/usb/controller/ohcireg.h>
Modified: trunk/sys/dev/usb/controller/ohci.h
===================================================================
--- trunk/sys/dev/usb/controller/ohci.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ohci.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/ohci.h 229096 2011-12-31 14:22:02Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/ohci.h 228483 2011-12-14 00:28:54Z hselasky $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
Modified: trunk/sys/dev/usb/controller/ohci_atmelarm.c
===================================================================
--- trunk/sys/dev/usb/controller/ohci_atmelarm.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ohci_atmelarm.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2006 M. Warner Losh. All rights reserved.
*
@@ -23,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ohci_atmelarm.c 278279 2015-02-05 20:15:42Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ohci_atmelarm.c 278278 2015-02-05 20:03:02Z hselasky $");
#include <sys/stdint.h>
#include <sys/stddef.h>
@@ -69,6 +70,7 @@
struct at91_ohci_softc {
struct ohci_softc sc_ohci; /* must be first */
+ struct at91_pmc_clock *mclk;
struct at91_pmc_clock *iclk;
struct at91_pmc_clock *fclk;
};
@@ -76,6 +78,7 @@
static int
ohci_atmelarm_probe(device_t dev)
{
+
device_set_desc(dev, "AT91 integrated OHCI controller");
return (BUS_PROBE_DEFAULT);
}
@@ -98,6 +101,7 @@
USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
return (ENOMEM);
}
+ sc->mclk = at91_pmc_clock_ref("mck");
sc->iclk = at91_pmc_clock_ref("ohci_clk");
sc->fclk = at91_pmc_clock_ref("uhpck");
@@ -129,13 +133,8 @@
strlcpy(sc->sc_ohci.sc_vendor, "Atmel", sizeof(sc->sc_ohci.sc_vendor));
-#if (__FreeBSD_version >= 700031)
err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl);
-#else
- err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
- (driver_intr_t *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl);
-#endif
if (err) {
sc->sc_ohci.sc_intr_hdl = NULL;
goto error;
@@ -143,6 +142,7 @@
/*
* turn on the clocks from the AT91's point of view. Keep the unit in reset.
*/
+ at91_pmc_clock_enable(sc->mclk);
at91_pmc_clock_enable(sc->iclk);
at91_pmc_clock_enable(sc->fclk);
bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
@@ -191,8 +191,10 @@
at91_pmc_clock_disable(sc->fclk);
at91_pmc_clock_disable(sc->iclk);
+ at91_pmc_clock_disable(sc->mclk);
at91_pmc_clock_deref(sc->fclk);
at91_pmc_clock_deref(sc->iclk);
+ at91_pmc_clock_deref(sc->mclk);
if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) {
/*
Added: trunk/sys/dev/usb/controller/ohci_fdt.c
===================================================================
--- trunk/sys/dev/usb/controller/ohci_fdt.c (rev 0)
+++ trunk/sys/dev/usb/controller/ohci_fdt.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -0,0 +1,252 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2006 M. Warner Losh. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ohci_fdt.c 278278 2015-02-05 20:03:02Z hselasky $");
+
+#include <sys/stdint.h>
+#include <sys/stddef.h>
+#include <sys/param.h>
+#include <sys/queue.h>
+#include <sys/types.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/bus.h>
+#include <sys/module.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/condvar.h>
+#include <sys/sysctl.h>
+#include <sys/sx.h>
+#include <sys/unistd.h>
+#include <sys/callout.h>
+#include <sys/malloc.h>
+#include <sys/priv.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+
+#include <dev/usb/usb_core.h>
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+#include <dev/usb/usb_util.h>
+
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+#include <dev/usb/controller/ohci.h>
+#include <dev/usb/controller/ohcireg.h>
+
+#include <sys/rman.h>
+
+#include <arm/at91/at91_pmcvar.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#define MEM_RID 0
+
+static device_probe_t ohci_at91_fdt_probe;
+static device_attach_t ohci_at91_fdt_attach;
+static device_detach_t ohci_at91_fdt_detach;
+
+struct at91_ohci_softc {
+ struct ohci_softc sc_ohci; /* must be first */
+ struct at91_pmc_clock *mclk;
+ struct at91_pmc_clock *iclk;
+ struct at91_pmc_clock *fclk;
+};
+
+static int
+ohci_at91_fdt_probe(device_t dev)
+{
+ if (!ofw_bus_is_compatible(dev, "atmel,at91rm9200-ohci"))
+ return (ENXIO);
+ device_set_desc(dev, "AT91 integrated OHCI controller");
+
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+ohci_at91_fdt_attach(device_t dev)
+{
+ struct at91_ohci_softc *sc = device_get_softc(dev);
+ int err;
+ int rid;
+
+ /* initialise some bus fields */
+ sc->sc_ohci.sc_bus.parent = dev;
+ sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices;
+ sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES;
+ sc->sc_ohci.sc_bus.dma_bits = 32;
+
+ /* get all DMA memory */
+ if (usb_bus_mem_alloc_all(&sc->sc_ohci.sc_bus,
+ USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
+ return (ENOMEM);
+ }
+ sc->mclk = at91_pmc_clock_ref("mck");
+ sc->iclk = at91_pmc_clock_ref("ohci_clk");
+ sc->fclk = at91_pmc_clock_ref("uhpck");
+
+ sc->sc_ohci.sc_dev = dev;
+
+ rid = MEM_RID;
+ sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
+ &rid, RF_ACTIVE);
+
+ if (!(sc->sc_ohci.sc_io_res)) {
+ err = ENOMEM;
+ goto error;
+ }
+ sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res);
+ sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res);
+ sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res);
+
+ rid = 0;
+ sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
+ RF_ACTIVE);
+ if (!(sc->sc_ohci.sc_irq_res)) {
+ goto error;
+ }
+ sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
+ if (!(sc->sc_ohci.sc_bus.bdev)) {
+ goto error;
+ }
+ device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus);
+
+ strlcpy(sc->sc_ohci.sc_vendor, "Atmel", sizeof(sc->sc_ohci.sc_vendor));
+
+ err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
+ NULL, (driver_intr_t *)ohci_interrupt, sc, &sc->sc_ohci.sc_intr_hdl);
+ if (err) {
+ sc->sc_ohci.sc_intr_hdl = NULL;
+ goto error;
+ }
+ /*
+ * turn on the clocks from the AT91's point of view. Keep the unit in reset.
+ */
+ at91_pmc_clock_enable(sc->mclk);
+ at91_pmc_clock_enable(sc->iclk);
+ at91_pmc_clock_enable(sc->fclk);
+ bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
+ OHCI_CONTROL, 0);
+
+ err = ohci_init(&sc->sc_ohci);
+ if (!err) {
+ err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev);
+ }
+ if (err) {
+ goto error;
+ }
+ return (0);
+
+error:
+ ohci_at91_fdt_detach(dev);
+ return (ENXIO);
+}
+
+static int
+ohci_at91_fdt_detach(device_t dev)
+{
+ struct at91_ohci_softc *sc = device_get_softc(dev);
+ device_t bdev;
+ int err;
+
+ if (sc->sc_ohci.sc_bus.bdev) {
+ bdev = sc->sc_ohci.sc_bus.bdev;
+ device_detach(bdev);
+ device_delete_child(dev, bdev);
+ }
+ /* during module unload there are lots of children leftover */
+ device_delete_children(dev);
+
+ if (sc->sc_ohci.sc_io_res != NULL) {
+ /*
+ * Put the controller into reset, then disable clocks and do
+ * the MI tear down. We have to disable the clocks/hardware
+ * after we do the rest of the teardown. We also disable the
+ * clocks in the opposite order we acquire them, but that
+ * doesn't seem to be absolutely necessary. We free up the
+ * clocks after we disable them, so the system could, in
+ * theory, reuse them.
+ */
+ bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
+ OHCI_CONTROL, 0);
+
+ at91_pmc_clock_disable(sc->fclk);
+ at91_pmc_clock_disable(sc->iclk);
+ at91_pmc_clock_disable(sc->mclk);
+ at91_pmc_clock_deref(sc->fclk);
+ at91_pmc_clock_deref(sc->iclk);
+ at91_pmc_clock_deref(sc->mclk);
+
+ if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) {
+ /*
+ * only call ohci_detach() after ohci_init()
+ */
+ ohci_detach(&sc->sc_ohci);
+
+ err = bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res,
+ sc->sc_ohci.sc_intr_hdl);
+ sc->sc_ohci.sc_intr_hdl = NULL;
+ }
+ if (sc->sc_ohci.sc_irq_res) {
+ bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res);
+ sc->sc_ohci.sc_irq_res = NULL;
+ }
+ if (sc->sc_ohci.sc_io_res) {
+ bus_release_resource(dev, SYS_RES_MEMORY, MEM_RID,
+ sc->sc_ohci.sc_io_res);
+ sc->sc_ohci.sc_io_res = NULL;
+ }
+ }
+ usb_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc);
+
+ return (0);
+}
+
+static device_method_t ohci_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, ohci_at91_fdt_probe),
+ DEVMETHOD(device_attach, ohci_at91_fdt_attach),
+ DEVMETHOD(device_detach, ohci_at91_fdt_detach),
+ DEVMETHOD(device_suspend, bus_generic_suspend),
+ DEVMETHOD(device_resume, bus_generic_resume),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ DEVMETHOD_END
+};
+
+static driver_t ohci_driver = {
+ .name = "ohci",
+ .methods = ohci_methods,
+ .size = sizeof(struct at91_ohci_softc),
+};
+
+static devclass_t ohci_devclass;
+
+DRIVER_MODULE(ohci, simplebus, ohci_driver, ohci_devclass, 0, 0);
+MODULE_DEPEND(ohci, usb, 1, 1, 1);
Property changes on: trunk/sys/dev/usb/controller/ohci_fdt.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/dev/usb/controller/ohci_pci.c
===================================================================
--- trunk/sys/dev/usb/controller/ohci_pci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ohci_pci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -29,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ohci_pci.c 308403 2016-11-07 09:23:07Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ohci_pci.c 308402 2016-11-07 09:19:04Z hselasky $");
/*
* USB Open Host Controller driver.
@@ -124,9 +125,10 @@
case 0x740c1022:
return ("AMD-756 USB Controller");
-
case 0x74141022:
return ("AMD-766 USB Controller");
+ case 0x78071022:
+ return ("AMD FCH USB Controller");
case 0x43741002:
return "ATI SB400 USB Controller";
Modified: trunk/sys/dev/usb/controller/ohci_s3c24x0.c
===================================================================
--- trunk/sys/dev/usb/controller/ohci_s3c24x0.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ohci_s3c24x0.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2006 M. Warner Losh. All rights reserved.
* Copyright (c) 2009 Andrew Turner. All rights reserved.
@@ -24,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/ohci_s3c24x0.c 308403 2016-11-07 09:23:07Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/ohci_s3c24x0.c 308402 2016-11-07 09:19:04Z hselasky $");
#include <sys/stdint.h>
#include <sys/stddef.h>
@@ -60,7 +61,7 @@
#include <sys/rman.h>
-#include <arm/s3c2xx0/s3c24x0reg.h>
+#include <arm/samsung/s3c2xx0/s3c24x0reg.h>
static device_probe_t ohci_s3c24x0_probe;
static device_attach_t ohci_s3c24x0_attach;
Modified: trunk/sys/dev/usb/controller/ohcireg.h
===================================================================
--- trunk/sys/dev/usb/controller/ohcireg.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/ohcireg.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/ohcireg.h 204632 2010-03-03 10:18:03Z joel $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/ohcireg.h 204632 2010-03-03 10:18:03Z joel $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
Modified: trunk/sys/dev/usb/controller/uhci.c
===================================================================
--- trunk/sys/dev/usb/controller/uhci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/uhci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,5 @@
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/uhci.c 261105 2014-01-24 07:48:52Z hselasky $ */
/*-
* Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
* Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
@@ -25,9 +27,6 @@
* SUCH DAMAGE.
*/
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/uhci.c 261106 2014-01-24 07:57:21Z hselasky $");
-
/*
* USB Universal Host Controller driver.
* Handles e.g. PIIX3 and PIIX4.
@@ -38,6 +37,9 @@
* ftp://download.intel.com/design/intarch/datashts/29056201.pdf
*/
+#ifdef USB_GLOBAL_INCLUDE_FILE
+#include USB_GLOBAL_INCLUDE_FILE
+#else
#include <sys/stdint.h>
#include <sys/stddef.h>
#include <sys/param.h>
@@ -73,6 +75,8 @@
#include <dev/usb/usb_controller.h>
#include <dev/usb/usb_bus.h>
+#endif /* USB_GLOBAL_INCLUDE_FILE */
+
#include <dev/usb/controller/uhci.h>
#include <dev/usb/controller/uhcireg.h>
Modified: trunk/sys/dev/usb/controller/uhci.h
===================================================================
--- trunk/sys/dev/usb/controller/uhci.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/uhci.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/uhci.h 293147 2016-01-04 07:29:19Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/uhci.h 293146 2016-01-04 07:27:58Z hselasky $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
Modified: trunk/sys/dev/usb/controller/uhci_pci.c
===================================================================
--- trunk/sys/dev/usb/controller/uhci_pci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/uhci_pci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -29,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/uhci_pci.c 308403 2016-11-07 09:23:07Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/uhci_pci.c 308402 2016-11-07 09:19:04Z hselasky $");
/* Universal Host Controller Interface
*
@@ -161,6 +162,12 @@
case 0x24de8086:
return ("Intel 82801EB (ICH5) USB controller USB-D");
+ case 0x25a98086:
+ return ("Intel 6300ESB USB controller USB-A");
+
+ case 0x25aa8086:
+ return ("Intel 6300ESB USB controller USB-B");
+
case 0x26588086:
return ("Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-A");
@@ -248,7 +255,7 @@
if (desc) {
device_set_desc(self, desc);
- return (0);
+ return (BUS_PROBE_DEFAULT);
} else {
return (ENXIO);
}
Modified: trunk/sys/dev/usb/controller/uhcireg.h
===================================================================
--- trunk/sys/dev/usb/controller/uhcireg.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/uhcireg.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/uhcireg.h 204632 2010-03-03 10:18:03Z joel $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/uhcireg.h 204632 2010-03-03 10:18:03Z joel $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
* All rights reserved.
Modified: trunk/sys/dev/usb/controller/usb_controller.c
===================================================================
--- trunk/sys/dev/usb/controller/usb_controller.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/usb_controller.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/usb_controller.c 278291 2015-02-05 21:37:59Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/usb_controller.c 287274 2015-08-29 06:23:40Z hselasky $ */
/*-
* Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
*
@@ -24,6 +25,9 @@
* SUCH DAMAGE.
*/
+#ifdef USB_GLOBAL_INCLUDE_FILE
+#include USB_GLOBAL_INCLUDE_FILE
+#else
#include "opt_ddb.h"
#include <sys/stdint.h>
@@ -63,6 +67,7 @@
#include <dev/usb/usb_bus.h>
#include <dev/usb/usb_pf.h>
#include "usb_if.h"
+#endif /* USB_GLOBAL_INCLUDE_FILE */
/* function prototypes */
@@ -85,10 +90,12 @@
"Debug level");
#endif
+#if USB_HAVE_ROOT_MOUNT_HOLD
static int usb_no_boot_wait = 0;
TUNABLE_INT("hw.usb.no_boot_wait", &usb_no_boot_wait);
SYSCTL_INT(_hw_usb, OID_AUTO, no_boot_wait, CTLFLAG_RD|CTLFLAG_TUN, &usb_no_boot_wait, 0,
"No USB device enumerate waiting at boot.");
+#endif
static int usb_no_suspend_wait = 0;
TUNABLE_INT("hw.usb.no_suspend_wait", &usb_no_suspend_wait);
@@ -109,7 +116,8 @@
DEVMETHOD(device_suspend, usb_suspend),
DEVMETHOD(device_resume, usb_resume),
DEVMETHOD(device_shutdown, usb_shutdown),
- {0, 0}
+
+ DEVMETHOD_END
};
static driver_t usb_driver = {
@@ -128,7 +136,11 @@
DRIVER_MODULE(usbus, at91_udp, usb_driver, usb_devclass, 0, 0);
DRIVER_MODULE(usbus, musbotg, usb_driver, usb_devclass, 0, 0);
DRIVER_MODULE(usbus, uss820dci, usb_driver, usb_devclass, 0, 0);
+DRIVER_MODULE(usbus, octusb, usb_driver, usb_devclass, 0, 0);
+/* Dual Mode Drivers */
+DRIVER_MODULE(usbus, dwcotg, usb_driver, usb_devclass, 0, 0);
+
/*------------------------------------------------------------------------*
* usb_probe
*
@@ -141,6 +153,7 @@
return (0);
}
+#if USB_HAVE_ROOT_MOUNT_HOLD
static void
usb_root_mount_rel(struct usb_bus *bus)
{
@@ -150,6 +163,7 @@
bus->bus_roothold = NULL;
}
}
+#endif
/*------------------------------------------------------------------------*
* usb_attach
@@ -166,11 +180,12 @@
return (ENXIO);
}
+#if USB_HAVE_ROOT_MOUNT_HOLD
if (usb_no_boot_wait == 0) {
/* delay vfs_mountroot until the bus is explored */
bus->bus_roothold = root_mount_hold(device_get_nameunit(dev));
}
-
+#endif
usb_attach_sub(dev, bus);
return (0); /* return success */
@@ -193,38 +208,43 @@
/* Stop power watchdog */
usb_callout_drain(&bus->power_wdog);
+#if USB_HAVE_ROOT_MOUNT_HOLD
/* Let the USB explore process detach all devices. */
usb_root_mount_rel(bus);
+#endif
USB_BUS_LOCK(bus);
/* Queue detach job */
- usb_proc_msignal(&bus->explore_proc,
+ usb_proc_msignal(USB_BUS_EXPLORE_PROC(bus),
&bus->detach_msg[0], &bus->detach_msg[1]);
/* Wait for detach to complete */
- usb_proc_mwait(&bus->explore_proc,
+ usb_proc_mwait(USB_BUS_EXPLORE_PROC(bus),
&bus->detach_msg[0], &bus->detach_msg[1]);
#if USB_HAVE_UGEN
/* Wait for cleanup to complete */
- usb_proc_mwait(&bus->explore_proc,
+ usb_proc_mwait(USB_BUS_EXPLORE_PROC(bus),
&bus->cleanup_msg[0], &bus->cleanup_msg[1]);
#endif
USB_BUS_UNLOCK(bus);
+#if USB_HAVE_PER_BUS_PROCESS
/* Get rid of USB callback processes */
- usb_proc_free(&bus->giant_callback_proc);
- usb_proc_free(&bus->non_giant_callback_proc);
+ usb_proc_free(USB_BUS_GIANT_PROC(bus));
+ usb_proc_free(USB_BUS_NON_GIANT_ISOC_PROC(bus));
+ usb_proc_free(USB_BUS_NON_GIANT_BULK_PROC(bus));
/* Get rid of USB explore process */
- usb_proc_free(&bus->explore_proc);
+ usb_proc_free(USB_BUS_EXPLORE_PROC(bus));
/* Get rid of control transfer process */
- usb_proc_free(&bus->control_xfer_proc);
+ usb_proc_free(USB_BUS_CONTROL_XFER_PROC(bus));
+#endif
#if USB_HAVE_PF
usbpf_detach(bus);
@@ -248,11 +268,11 @@
}
USB_BUS_LOCK(bus);
- usb_proc_msignal(&bus->explore_proc,
+ usb_proc_msignal(USB_BUS_EXPLORE_PROC(bus),
&bus->suspend_msg[0], &bus->suspend_msg[1]);
if (usb_no_suspend_wait == 0) {
/* wait for suspend callback to be executed */
- usb_proc_mwait(&bus->explore_proc,
+ usb_proc_mwait(USB_BUS_EXPLORE_PROC(bus),
&bus->suspend_msg[0], &bus->suspend_msg[1]);
}
USB_BUS_UNLOCK(bus);
@@ -276,7 +296,7 @@
}
USB_BUS_LOCK(bus);
- usb_proc_msignal(&bus->explore_proc,
+ usb_proc_msignal(USB_BUS_EXPLORE_PROC(bus),
&bus->resume_msg[0], &bus->resume_msg[1]);
USB_BUS_UNLOCK(bus);
@@ -301,7 +321,7 @@
device_printf(bus->parent, "Resetting controller\n");
- usb_proc_msignal(&bus->explore_proc,
+ usb_proc_msignal(USB_BUS_EXPLORE_PROC(bus),
&bus->reset_msg[0], &bus->reset_msg[1]);
}
@@ -323,11 +343,11 @@
DPRINTF("%s: Controller shutdown\n", device_get_nameunit(bus->bdev));
USB_BUS_LOCK(bus);
- usb_proc_msignal(&bus->explore_proc,
+ usb_proc_msignal(USB_BUS_EXPLORE_PROC(bus),
&bus->shutdown_msg[0], &bus->shutdown_msg[1]);
if (usb_no_shutdown_wait == 0) {
/* wait for shutdown callback to be executed */
- usb_proc_mwait(&bus->explore_proc,
+ usb_proc_mwait(USB_BUS_EXPLORE_PROC(bus),
&bus->shutdown_msg[0], &bus->shutdown_msg[1]);
}
USB_BUS_UNLOCK(bus);
@@ -377,9 +397,10 @@
* The following three lines of code are only here to
* recover from DDB:
*/
- usb_proc_rewakeup(&bus->control_xfer_proc);
- usb_proc_rewakeup(&bus->giant_callback_proc);
- usb_proc_rewakeup(&bus->non_giant_callback_proc);
+ usb_proc_rewakeup(USB_BUS_CONTROL_XFER_PROC(bus));
+ usb_proc_rewakeup(USB_BUS_GIANT_PROC(bus));
+ usb_proc_rewakeup(USB_BUS_NON_GIANT_ISOC_PROC(bus));
+ usb_proc_rewakeup(USB_BUS_NON_GIANT_BULK_PROC(bus));
#endif
USB_BUS_UNLOCK(bus);
@@ -394,7 +415,9 @@
(udev->hub->explore) (udev);
USB_BUS_LOCK(bus);
}
+#if USB_HAVE_ROOT_MOUNT_HOLD
usb_root_mount_rel(bus);
+#endif
}
/*------------------------------------------------------------------------*
@@ -660,7 +683,7 @@
* The following line of code is only here to recover from
* DDB:
*/
- usb_proc_rewakeup(&bus->explore_proc); /* recover from DDB */
+ usb_proc_rewakeup(USB_BUS_EXPLORE_PROC(bus)); /* recover from DDB */
#endif
#if USB_HAVE_POWERD
@@ -719,7 +742,9 @@
default:
device_printf(bus->bdev, "Unsupported USB revision\n");
+#if USB_HAVE_ROOT_MOUNT_HOLD
usb_root_mount_rel(bus);
+#endif
return;
}
@@ -761,7 +786,9 @@
if (err) {
device_printf(bus->bdev, "Root HUB problem, error=%s\n",
usbd_errstr(err));
+#if USB_HAVE_ROOT_MOUNT_HOLD
usb_root_mount_rel(bus);
+#endif
}
/* set softc - we are ready */
@@ -779,8 +806,6 @@
static void
usb_attach_sub(device_t dev, struct usb_bus *bus)
{
- const char *pname = device_get_nameunit(dev);
-
mtx_lock(&Giant);
if (usb_devclass_ptr == NULL)
usb_devclass_ptr = devclass_find("usbus");
@@ -833,28 +858,35 @@
bus->cleanup_msg[1].bus = bus;
#endif
+#if USB_HAVE_PER_BUS_PROCESS
/* Create USB explore and callback processes */
- if (usb_proc_create(&bus->giant_callback_proc,
- &bus->bus_mtx, pname, USB_PRI_MED)) {
+ if (usb_proc_create(USB_BUS_GIANT_PROC(bus),
+ &bus->bus_mtx, device_get_nameunit(dev), USB_PRI_MED)) {
device_printf(dev, "WARNING: Creation of USB Giant "
"callback process failed.\n");
- } else if (usb_proc_create(&bus->non_giant_callback_proc,
- &bus->bus_mtx, pname, USB_PRI_HIGH)) {
- device_printf(dev, "WARNING: Creation of USB non-Giant "
+ } else if (usb_proc_create(USB_BUS_NON_GIANT_ISOC_PROC(bus),
+ &bus->bus_mtx, device_get_nameunit(dev), USB_PRI_HIGHEST)) {
+ device_printf(dev, "WARNING: Creation of USB non-Giant ISOC "
"callback process failed.\n");
- } else if (usb_proc_create(&bus->explore_proc,
- &bus->bus_mtx, pname, USB_PRI_MED)) {
+ } else if (usb_proc_create(USB_BUS_NON_GIANT_BULK_PROC(bus),
+ &bus->bus_mtx, device_get_nameunit(dev), USB_PRI_HIGH)) {
+ device_printf(dev, "WARNING: Creation of USB non-Giant BULK "
+ "callback process failed.\n");
+ } else if (usb_proc_create(USB_BUS_EXPLORE_PROC(bus),
+ &bus->bus_mtx, device_get_nameunit(dev), USB_PRI_MED)) {
device_printf(dev, "WARNING: Creation of USB explore "
"process failed.\n");
- } else if (usb_proc_create(&bus->control_xfer_proc,
- &bus->bus_mtx, pname, USB_PRI_MED)) {
+ } else if (usb_proc_create(USB_BUS_CONTROL_XFER_PROC(bus),
+ &bus->bus_mtx, device_get_nameunit(dev), USB_PRI_MED)) {
device_printf(dev, "WARNING: Creation of USB control transfer "
"process failed.\n");
- } else {
+ } else
+#endif
+ {
/* Get final attach going */
USB_BUS_LOCK(bus);
- usb_proc_msignal(&bus->explore_proc,
+ usb_proc_msignal(USB_BUS_EXPLORE_PROC(bus),
&bus->attach_msg[0], &bus->attach_msg[1]);
USB_BUS_UNLOCK(bus);
@@ -862,7 +894,6 @@
usb_needs_explore(bus, 1);
}
}
-
SYSUNINIT(usb_bus_unload, SI_SUB_KLD, SI_ORDER_ANY, usb_bus_unload, NULL);
/*------------------------------------------------------------------------*
@@ -921,8 +952,11 @@
bus->alloc_failed = 0;
mtx_init(&bus->bus_mtx, device_get_nameunit(bus->parent),
- NULL, MTX_DEF | MTX_RECURSE);
+ "usb_def_mtx", MTX_DEF | MTX_RECURSE);
+ mtx_init(&bus->bus_spin_lock, device_get_nameunit(bus->parent),
+ "usb_spin_mtx", MTX_SPIN | MTX_RECURSE);
+
usb_callout_init_mtx(&bus->power_wdog,
&bus->bus_mtx, 0);
@@ -976,6 +1010,7 @@
#endif
mtx_destroy(&bus->bus_mtx);
+ mtx_destroy(&bus->bus_spin_lock);
}
/* convenience wrappers */
@@ -982,13 +1017,13 @@
void
usb_proc_explore_mwait(struct usb_device *udev, void *pm1, void *pm2)
{
- usb_proc_mwait(&udev->bus->explore_proc, pm1, pm2);
+ usb_proc_mwait(USB_BUS_EXPLORE_PROC(udev->bus), pm1, pm2);
}
void *
usb_proc_explore_msignal(struct usb_device *udev, void *pm1, void *pm2)
{
- return (usb_proc_msignal(&udev->bus->explore_proc, pm1, pm2));
+ return (usb_proc_msignal(USB_BUS_EXPLORE_PROC(udev->bus), pm1, pm2));
}
void
Modified: trunk/sys/dev/usb/controller/uss820dci.c
===================================================================
--- trunk/sys/dev/usb/controller/uss820dci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/uss820dci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/uss820dci.c 262457 2014-02-24 20:29:39Z dim $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/uss820dci.c 262457 2014-02-24 20:29:39Z dim $ */
/*-
* Copyright (c) 2008 Hans Petter Selasky <hselasky at FreeBSD.org>
* All rights reserved.
@@ -32,6 +33,9 @@
* NOTE: The datasheet does not document everything.
*/
+#ifdef USB_GLOBAL_INCLUDE_FILE
+#include USB_GLOBAL_INCLUDE_FILE
+#else
#include <sys/stdint.h>
#include <sys/stddef.h>
#include <sys/param.h>
@@ -67,6 +71,8 @@
#include <dev/usb/usb_controller.h>
#include <dev/usb/usb_bus.h>
+#endif /* USB_GLOBAL_INCLUDE_FILE */
+
#include <dev/usb/controller/uss820dci.h>
#define USS820_DCI_BUS2SC(bus) \
@@ -1210,7 +1216,13 @@
}
static void
-uss820dci_set_stall(struct usb_device *udev, struct usb_xfer *xfer,
+uss820dci_xfer_stall(struct usb_xfer *xfer)
+{
+ uss820dci_device_done(xfer, USB_ERR_STALLED);
+}
+
+static void
+uss820dci_set_stall(struct usb_device *udev,
struct usb_endpoint *ep, uint8_t *did_stall)
{
struct uss820dci_softc *sc;
@@ -1223,10 +1235,6 @@
DPRINTFN(5, "endpoint=%p\n", ep);
- if (xfer) {
- /* cancel any ongoing transfers */
- uss820dci_device_done(xfer, USB_ERR_STALLED);
- }
/* set FORCESTALL */
sc = USS820_DCI_BUS2SC(udev->bus);
ep_no = (ep->edesc->bEndpointAddress & UE_ADDR);
@@ -1801,18 +1809,12 @@
.DeviceRemovable = {0}, /* port is removable */
};
-#define STRING_LANG \
- 0x09, 0x04, /* American English */
-
#define STRING_VENDOR \
- 'A', 0, 'G', 0, 'E', 0, 'R', 0, 'E', 0
+ "A\0G\0E\0R\0E"
#define STRING_PRODUCT \
- 'D', 0, 'C', 0, 'I', 0, ' ', 0, 'R', 0, \
- 'o', 0, 'o', 0, 't', 0, ' ', 0, 'H', 0, \
- 'U', 0, 'B', 0,
+ "D\0C\0I\0 \0R\0o\0o\0t\0 \0H\0U\0B"
-USB_MAKE_STRING_DESC(STRING_LANG, uss820dci_langtab);
USB_MAKE_STRING_DESC(STRING_VENDOR, uss820dci_vendor);
USB_MAKE_STRING_DESC(STRING_PRODUCT, uss820dci_product);
@@ -2021,8 +2023,8 @@
case UDESC_STRING:
switch (value & 0xff) {
case 0: /* Language table */
- len = sizeof(uss820dci_langtab);
- ptr = (const void *)&uss820dci_langtab;
+ len = sizeof(usb_string_lang_en);
+ ptr = (const void *)&usb_string_lang_en;
goto tr_valid;
case 1: /* Vendor */
@@ -2388,6 +2390,7 @@
.xfer_setup = &uss820dci_xfer_setup,
.xfer_unsetup = &uss820dci_xfer_unsetup,
.get_hw_ep_profile = &uss820dci_get_hw_ep_profile,
+ .xfer_stall = &uss820dci_xfer_stall,
.set_stall = &uss820dci_set_stall,
.clear_stall = &uss820dci_clear_stall,
.roothub_exec = &uss820dci_roothub_exec,
Modified: trunk/sys/dev/usb/controller/uss820dci.h
===================================================================
--- trunk/sys/dev/usb/controller/uss820dci.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/uss820dci.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/uss820dci.h 229096 2011-12-31 14:22:02Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/uss820dci.h 228483 2011-12-14 00:28:54Z hselasky $ */
/*-
* Copyright (c) 2007 Hans Petter Selasky <hselasky at FreeBSD.org>
* All rights reserved.
Modified: trunk/sys/dev/usb/controller/uss820dci_atmelarm.c
===================================================================
--- trunk/sys/dev/usb/controller/uss820dci_atmelarm.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/uss820dci_atmelarm.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/uss820dci_atmelarm.c 308403 2016-11-07 09:23:07Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/uss820dci_atmelarm.c 308402 2016-11-07 09:19:04Z hselasky $");
/*-
* Copyright (c) 2008 Hans Petter Selasky <hselasky at FreeBSD.org>
Modified: trunk/sys/dev/usb/controller/xhci.c
===================================================================
--- trunk/sys/dev/usb/controller/xhci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/xhci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,5 @@
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/xhci.c 333203 2018-05-03 07:38:45Z hselasky $ */
/*-
* Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
*
@@ -35,12 +37,13 @@
/*
* A few words about the design implementation: This driver emulates
* the concept about TDs which is found in EHCI specification. This
- * way we avoid too much diveration among USB drivers.
+ * way we achieve that the USB controller drivers look similar to
+ * eachother which makes it easier to understand the code.
*/
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/xhci.c 315253 2017-03-14 15:30:46Z hselasky $");
-
+#ifdef USB_GLOBAL_INCLUDE_FILE
+#include USB_GLOBAL_INCLUDE_FILE
+#else
#include <sys/stdint.h>
#include <sys/stddef.h>
#include <sys/param.h>
@@ -76,6 +79,8 @@
#include <dev/usb/usb_controller.h>
#include <dev/usb/usb_bus.h>
+#endif /* USB_GLOBAL_INCLUDE_FILE */
+
#include <dev/usb/controller/xhci.h>
#include <dev/usb/controller/xhcireg.h>
@@ -83,13 +88,20 @@
((struct xhci_softc *)(((uint8_t *)(bus)) - \
((uint8_t *)&(((struct xhci_softc *)0)->sc_bus))))
+static SYSCTL_NODE(_hw_usb, OID_AUTO, xhci, CTLFLAG_RW, 0, "USB XHCI");
+
+static int xhcistreams;
+SYSCTL_INT(_hw_usb_xhci, OID_AUTO, streams, CTLFLAG_RW | CTLFLAG_TUN,
+ &xhcistreams, 0, "Set to enable streams mode support");
+TUNABLE_INT("hw.usb.xhci.streams", &xhcistreams);
+
#ifdef USB_DEBUG
static int xhcidebug;
static int xhciroute;
static int xhcipolling;
static int xhcidma32;
+static int xhcictlstep;
-static SYSCTL_NODE(_hw_usb, OID_AUTO, xhci, CTLFLAG_RW, 0, "USB XHCI");
SYSCTL_INT(_hw_usb_xhci, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN,
&xhcidebug, 0, "Debug level");
TUNABLE_INT("hw.usb.xhci.debug", &xhcidebug);
@@ -102,9 +114,13 @@
SYSCTL_INT(_hw_usb_xhci, OID_AUTO, dma32, CTLFLAG_RWTUN,
&xhcidma32, 0, "Set to only use 32-bit DMA for the XHCI controller");
TUNABLE_INT("hw.usb.xhci.dma32", &xhcidma32);
+SYSCTL_INT(_hw_usb_xhci, OID_AUTO, ctlstep, CTLFLAG_RWTUN,
+ &xhcictlstep, 0, "Set to enable control endpoint status stage stepping");
+TUNABLE_INT("hw.usb.xhci.ctlstep", &xhcictlstep);
#else
#define xhciroute 0
#define xhcidma32 0
+#define xhcictlstep 0
#endif
#define XHCI_INTR_ENDPT 1
@@ -140,8 +156,9 @@
static usb_proc_callback_t xhci_configure_msg;
static usb_error_t xhci_configure_device(struct usb_device *);
static usb_error_t xhci_configure_endpoint(struct usb_device *,
- struct usb_endpoint_descriptor *, struct xhci_endpoint_ext *,
- uint16_t, uint8_t, uint8_t, uint8_t, uint16_t, uint16_t);
+ struct usb_endpoint_descriptor *, struct xhci_endpoint_ext *,
+ uint16_t, uint8_t, uint8_t, uint8_t, uint16_t, uint16_t,
+ uint8_t);
static usb_error_t xhci_configure_mask(struct usb_device *,
uint32_t, uint8_t);
static usb_error_t xhci_cmd_evaluate_ctx(struct xhci_softc *,
@@ -648,11 +665,6 @@
cv_init(&sc->sc_cmd_cv, "CMDQ");
sx_init(&sc->sc_cmd_sx, "CMDQ lock");
- if (usb_proc_create(&sc->sc_config_proc,
- &sc->sc_bus.bus_mtx, device_get_nameunit(self), USB_PRI_MED)) {
- printf("WARNING: Creation of XHCI configure "
- "callback process failed.\n");
- }
sc->sc_config_msg[0].hdr.pm_callback = &xhci_configure_msg;
sc->sc_config_msg[0].bus = &sc->sc_bus;
sc->sc_config_msg[1].hdr.pm_callback = &xhci_configure_msg;
@@ -664,8 +676,12 @@
void
xhci_uninit(struct xhci_softc *sc)
{
- usb_proc_free(&sc->sc_config_proc);
-
+ /*
+ * NOTE: At this point the control transfer process is gone
+ * and "xhci_configure_msg" is no longer called. Consequently
+ * waiting for the configuration messages to complete is not
+ * needed.
+ */
usb_bus_mem_free_all(&sc->sc_bus, &xhci_iterate_hw_softc);
cv_destroy(&sc->sc_cmd_cv);
@@ -875,15 +891,17 @@
static void
xhci_check_transfer(struct xhci_softc *sc, struct xhci_trb *trb)
{
+ struct xhci_endpoint_ext *pepext;
int64_t offset;
uint64_t td_event;
uint32_t temp;
uint32_t remainder;
+ uint16_t stream_id;
+ uint16_t i;
uint8_t status;
uint8_t halted;
uint8_t epno;
uint8_t index;
- uint8_t i;
/* decode TRB */
td_event = le64toh(trb->qwTrb0);
@@ -891,6 +909,7 @@
remainder = XHCI_TRB_2_REM_GET(temp);
status = XHCI_TRB_2_ERROR_GET(temp);
+ stream_id = XHCI_TRB_2_STREAM_GET(temp);
temp = le32toh(trb->dwTrb3);
epno = XHCI_TRB_3_EP_GET(temp);
@@ -900,8 +919,8 @@
halted = (status != XHCI_TRB_ERROR_SHORT_PKT &&
status != XHCI_TRB_ERROR_SUCCESS);
- DPRINTF("slot=%u epno=%u remainder=%u status=%u\n",
- index, epno, remainder, status);
+ DPRINTF("slot=%u epno=%u stream=%u remainder=%u status=%u\n",
+ index, epno, stream_id, remainder, status);
if (index > sc->sc_noslot) {
DPRINTF("Invalid slot.\n");
@@ -913,15 +932,22 @@
return;
}
+ pepext = &sc->sc_hw.devs[index].endp[epno];
+
+ if (pepext->trb_ep_mode != USB_EP_MODE_STREAMS) {
+ stream_id = 0;
+ DPRINTF("stream_id=0\n");
+ } else if (stream_id >= XHCI_MAX_STREAMS) {
+ DPRINTF("Invalid stream ID.\n");
+ return;
+ }
+
/* try to find the USB transfer that generated the event */
for (i = 0; i != (XHCI_MAX_TRANSFERS - 1); i++) {
struct usb_xfer *xfer;
struct xhci_td *td;
- struct xhci_endpoint_ext *pepext;
- pepext = &sc->sc_hw.devs[index].endp[epno];
-
- xfer = pepext->xfer[i];
+ xfer = pepext->xfer[i + (XHCI_MAX_TRANSFERS * stream_id)];
if (xfer == NULL)
continue;
@@ -1423,7 +1449,7 @@
err = xhci_configure_endpoint(udev,
&udev->ctrl_ep_desc, pepext,
- 0, 1, 1, 0, mps, mps);
+ 0, 1, 1, 0, mps, mps, USB_EP_MODE_DEFAULT);
if (err != 0) {
DPRINTF("Could not configure default endpoint\n");
@@ -2033,7 +2059,8 @@
/* compute multiplier for ISOCHRONOUS transfers */
mult = xfer->endpoint->ecomp ?
- (xfer->endpoint->ecomp->bmAttributes & 3) : 0;
+ UE_GET_SS_ISO_MULT(xfer->endpoint->ecomp->bmAttributes)
+ : 0;
/* check for USB 2.0 multiplier */
if (mult == 0) {
mult = (xfer->endpoint->edesc->
@@ -2223,11 +2250,17 @@
* Send a DATA1 message and invert the current
* endpoint direction.
*/
-#ifdef XHCI_STEP_STATUS_STAGE
- temp.step_td = (xfer->nframes != 0);
-#else
- temp.step_td = 0;
-#endif
+ if (xhcictlstep || temp.sc->sc_ctlstep) {
+ /*
+ * Some XHCI controllers will not delay the
+ * status stage until the next SOF. Force this
+ * behaviour to avoid failed control
+ * transfers.
+ */
+ temp.step_td = (xfer->nframes != 0);
+ } else {
+ temp.step_td = 0;
+ }
temp.direction = UE_GET_DIR(xfer->endpointno) ^ UE_DIR_IN;
temp.len = 0;
temp.pc = NULL;
@@ -2325,7 +2358,7 @@
struct usb_endpoint_descriptor *edesc, struct xhci_endpoint_ext *pepext,
uint16_t interval, uint8_t max_packet_count,
uint8_t mult, uint8_t fps_shift, uint16_t max_packet_size,
- uint16_t max_frame_size)
+ uint16_t max_frame_size, uint8_t ep_mode)
{
struct usb_page_search buf_inp;
struct xhci_softc *sc = XHCI_BUS2SC(udev->bus);
@@ -2361,14 +2394,27 @@
if (mult == 0)
return (USB_ERR_BAD_BUFSIZE);
+ /* store endpoint mode */
+ pepext->trb_ep_mode = ep_mode;
/* store bMaxPacketSize for control endpoints */
pepext->trb_ep_maxp = edesc->wMaxPacketSize[0];
usb_pc_cpu_flush(pepext->page_cache);
- temp = XHCI_EPCTX_0_EPSTATE_SET(0) |
- XHCI_EPCTX_0_MAXP_STREAMS_SET(0) |
- XHCI_EPCTX_0_LSA_SET(0);
+ if (ep_mode == USB_EP_MODE_STREAMS) {
+ temp = XHCI_EPCTX_0_EPSTATE_SET(0) |
+ XHCI_EPCTX_0_MAXP_STREAMS_SET(XHCI_MAX_STREAMS_LOG - 1) |
+ XHCI_EPCTX_0_LSA_SET(1);
+ ring_addr += sizeof(struct xhci_trb) *
+ XHCI_MAX_TRANSFERS * XHCI_MAX_STREAMS;
+ } else {
+ temp = XHCI_EPCTX_0_EPSTATE_SET(0) |
+ XHCI_EPCTX_0_MAXP_STREAMS_SET(0) |
+ XHCI_EPCTX_0_LSA_SET(0);
+
+ ring_addr |= XHCI_EPCTX_2_DCS_SET(1);
+ }
+
switch (udev->speed) {
case USB_SPEED_FULL:
case USB_SPEED_LOW:
@@ -2439,9 +2485,6 @@
temp |= XHCI_EPCTX_1_EPTYPE_SET(4);
xhci_ctx_set_le32(sc, &pinp->ctx_ep[epno - 1].dwEpCtx1, temp);
-
- ring_addr |= XHCI_EPCTX_2_DCS_SET(1);
-
xhci_ctx_set_le64(sc, &pinp->ctx_ep[epno - 1].qwEpCtx2, ring_addr);
switch (edesc->bmAttributes & UE_XFERTYPE) {
@@ -2474,6 +2517,7 @@
{
struct xhci_endpoint_ext *pepext;
struct usb_endpoint_ss_comp_descriptor *ecomp;
+ usb_stream_t x;
pepext = xhci_get_endpoint_ext(xfer->xroot->udev,
xfer->endpoint->edesc);
@@ -2480,15 +2524,35 @@
ecomp = xfer->endpoint->ecomp;
- pepext->trb[0].dwTrb3 = 0; /* halt any transfers */
+ for (x = 0; x != XHCI_MAX_STREAMS; x++) {
+ uint64_t temp;
+
+ /* halt any transfers */
+ pepext->trb[x * XHCI_MAX_TRANSFERS].dwTrb3 = 0;
+
+ /* compute start of TRB ring for stream "x" */
+ temp = pepext->physaddr +
+ (x * XHCI_MAX_TRANSFERS * sizeof(struct xhci_trb)) +
+ XHCI_SCTX_0_SCT_SEC_TR_RING;
+
+ /* make tree structure */
+ pepext->trb[(XHCI_MAX_TRANSFERS *
+ XHCI_MAX_STREAMS) + x].qwTrb0 = htole64(temp);
+
+ /* reserved fields */
+ pepext->trb[(XHCI_MAX_TRANSFERS *
+ XHCI_MAX_STREAMS) + x].dwTrb2 = 0;
+ pepext->trb[(XHCI_MAX_TRANSFERS *
+ XHCI_MAX_STREAMS) + x].dwTrb3 = 0;
+ }
usb_pc_cpu_flush(pepext->page_cache);
return (xhci_configure_endpoint(xfer->xroot->udev,
xfer->endpoint->edesc, pepext,
xfer->interval, xfer->max_packet_count,
- (ecomp != NULL) ? (ecomp->bmAttributes & 3) + 1 : 1,
+ (ecomp != NULL) ? UE_GET_SS_ISO_MULT(ecomp->bmAttributes) + 1 : 1,
usbd_xfer_get_fps_shift(xfer), xfer->max_packet_size,
- xfer->max_frame_size));
+ xfer->max_frame_size, xfer->endpoint->ep_mode));
}
static usb_error_t
@@ -2701,24 +2765,23 @@
goto error;
}
- pc = &sc->sc_hw.devs[index].endpoint_pc;
- pg = &sc->sc_hw.devs[index].endpoint_pg;
+ /* initialize all endpoint LINK TRBs */
- /* need to initialize the page cache */
- pc->tag_parent = sc->sc_bus.dma_parent_tag;
+ for (i = 0; i != XHCI_MAX_ENDPOINTS; i++) {
- if (usb_pc_alloc_mem(pc, pg,
- sizeof(struct xhci_dev_endpoint_trbs), XHCI_PAGE_SIZE)) {
- goto error;
- }
+ pc = &sc->sc_hw.devs[index].endpoint_pc[i];
+ pg = &sc->sc_hw.devs[index].endpoint_pg[i];
- /* initialise all endpoint LINK TRBs */
+ /* need to initialize the page cache */
+ pc->tag_parent = sc->sc_bus.dma_parent_tag;
- for (i = 0; i != XHCI_MAX_ENDPOINTS; i++) {
+ if (usb_pc_alloc_mem(pc, pg,
+ sizeof(struct xhci_dev_endpoint_trbs), XHCI_TRB_ALIGN)) {
+ goto error;
+ }
/* lookup endpoint TRB ring */
- usbd_get_page(pc, (uintptr_t)&
- ((struct xhci_dev_endpoint_trbs *)0)->trb[i][0], &buf_ep);
+ usbd_get_page(pc, 0, &buf_ep);
/* get TRB pointer */
trb = buf_ep.buffer;
@@ -2732,10 +2795,10 @@
trb->dwTrb2 = htole32(XHCI_TRB_2_IRQ_SET(0));
trb->dwTrb3 = htole32(XHCI_TRB_3_CYCLE_BIT |
XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_LINK));
+
+ usb_pc_cpu_flush(pc);
}
- usb_pc_cpu_flush(pc);
-
xhci_set_slot_pointer(sc, index, buf_dev.physaddr);
return (0);
@@ -2751,6 +2814,7 @@
{
struct xhci_softc *sc = XHCI_BUS2SC(udev->bus);
uint8_t index;
+ uint8_t i;
index = udev->controller_slot_id;
xhci_set_slot_pointer(sc, index, 0);
@@ -2757,7 +2821,8 @@
usb_pc_free_mem(&sc->sc_hw.devs[index].device_pc);
usb_pc_free_mem(&sc->sc_hw.devs[index].input_pc);
- usb_pc_free_mem(&sc->sc_hw.devs[index].endpoint_pc);
+ for (i = 0; i != XHCI_MAX_ENDPOINTS; i++)
+ usb_pc_free_mem(&sc->sc_hw.devs[index].endpoint_pc[i]);
}
static struct xhci_endpoint_ext *
@@ -2778,9 +2843,9 @@
index = udev->controller_slot_id;
- pc = &sc->sc_hw.devs[index].endpoint_pc;
+ pc = &sc->sc_hw.devs[index].endpoint_pc[epno];
- usbd_get_page(pc, (uintptr_t)&((struct xhci_dev_endpoint_trbs *)0)->trb[epno][0], &buf_ep);
+ usbd_get_page(pc, 0, &buf_ep);
pepext = &sc->sc_hw.devs[index].endp[epno];
pepext->page_cache = pc;
@@ -2806,7 +2871,7 @@
if (xfer->xroot->udev->flags.self_suspended == 0) {
XWRITE4(sc, door, XHCI_DOORBELL(index),
- epno | XHCI_DB_SID_SET(/*xfer->stream_id*/ 0));
+ epno | XHCI_DB_SID_SET(xfer->stream_id));
}
}
@@ -2821,7 +2886,7 @@
pepext = xhci_get_endpoint_ext(xfer->xroot->udev,
xfer->endpoint->edesc);
- pepext->trb_used--;
+ pepext->trb_used[xfer->stream_id]--;
pepext->xfer[xfer->qh_pos] = NULL;
@@ -2840,6 +2905,7 @@
struct xhci_trb *trb_link;
struct xhci_endpoint_ext *pepext;
uint64_t addr;
+ usb_stream_t id;
uint8_t i;
uint8_t inext;
uint8_t trb_limit;
@@ -2846,6 +2912,8 @@
DPRINTFN(8, "\n");
+ id = xfer->stream_id;
+
/* check if already inserted */
if (xfer->flags_int.bandwidth_reclaimed) {
DPRINTFN(8, "Already in schedule\n");
@@ -2871,7 +2939,7 @@
break;
}
- if (pepext->trb_used >= trb_limit) {
+ if (pepext->trb_used[id] >= trb_limit) {
DPRINTFN(8, "Too many TDs queued.\n");
return (USB_ERR_NOMEM);
}
@@ -2894,15 +2962,15 @@
DPRINTFN(8, "Not running\n");
/* start configuration */
- (void)usb_proc_msignal(&sc->sc_config_proc,
+ (void)usb_proc_msignal(USB_BUS_CONTROL_XFER_PROC(&sc->sc_bus),
&sc->sc_config_msg[0], &sc->sc_config_msg[1]);
return (0);
}
- pepext->trb_used++;
+ pepext->trb_used[id]++;
/* get current TRB index */
- i = pepext->trb_index;
+ i = pepext->trb_index[id];
/* get next TRB index */
inext = (i + 1);
@@ -2911,8 +2979,15 @@
if (inext >= (XHCI_MAX_TRANSFERS - 1))
inext = 0;
+ /* store next TRB index, before stream ID offset is added */
+ pepext->trb_index[id] = inext;
+
+ /* offset for stream */
+ i += id * XHCI_MAX_TRANSFERS;
+ inext += id * XHCI_MAX_TRANSFERS;
+
/* compute terminating return address */
- addr += inext * sizeof(struct xhci_trb);
+ addr += (inext * sizeof(struct xhci_trb));
/* compute link TRB pointer */
trb_link = td_last->td_trb + td_last->ntrb;
@@ -2960,8 +3035,6 @@
xfer->flags_int.bandwidth_reclaimed = 1;
- pepext->trb_index = inext;
-
xhci_endpoint_doorbell(xfer);
return (0);
@@ -3048,12 +3121,12 @@
static void
xhci_device_generic_multi_enter(struct usb_endpoint *ep,
- struct usb_xfer *enter_xfer)
+ usb_stream_t stream_id, struct usb_xfer *enter_xfer)
{
struct usb_xfer *xfer;
/* check if there is a current transfer */
- xfer = ep->endpoint_q.curr;
+ xfer = ep->endpoint_q[stream_id].curr;
if (xfer == NULL)
return;
@@ -3065,7 +3138,7 @@
if (!xfer->flags_int.bandwidth_reclaimed)
return;
- xfer = TAILQ_FIRST(&ep->endpoint_q.head);
+ xfer = TAILQ_FIRST(&ep->endpoint_q[stream_id].head);
if (xfer == NULL) {
/*
* In case of enter we have to consider that the
@@ -3090,7 +3163,8 @@
/* set up TD's and QH */
xhci_setup_generic_chain(xfer);
- xhci_device_generic_multi_enter(xfer->endpoint, xfer);
+ xhci_device_generic_multi_enter(xfer->endpoint,
+ xfer->stream_id, xfer);
}
static void
@@ -3102,7 +3176,8 @@
xhci_transfer_insert(xfer);
/* try to multi buffer */
- xhci_device_generic_multi_enter(xfer->endpoint, NULL);
+ xhci_device_generic_multi_enter(xfer->endpoint,
+ xfer->stream_id, NULL);
/* add transfer last on interrupt queue */
usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
@@ -3763,6 +3838,7 @@
struct usb_endpoint_descriptor *edesc;
struct usb_page_cache *pcinp;
usb_error_t err;
+ usb_stream_t stream_id;
uint8_t index;
uint8_t epno;
@@ -3779,6 +3855,7 @@
edesc = xfer->endpoint->edesc;
epno = edesc->bEndpointAddress;
+ stream_id = xfer->stream_id;
if ((edesc->bmAttributes & UE_XFERTYPE) == UE_CONTROL)
epno |= UE_DIR_IN;
@@ -3814,8 +3891,10 @@
if (err != 0)
DPRINTF("Could not reset endpoint %u\n", epno);
- err = xhci_cmd_set_tr_dequeue_ptr(sc, pepext->physaddr |
- XHCI_EPCTX_2_DCS_SET(1), 0, epno, index);
+ err = xhci_cmd_set_tr_dequeue_ptr(sc,
+ (pepext->physaddr + (stream_id * sizeof(struct xhci_trb) *
+ XHCI_MAX_TRANSFERS)) | XHCI_EPCTX_2_DCS_SET(1),
+ stream_id, epno, index);
if (err != 0)
DPRINTF("Could not set dequeue ptr for endpoint %u\n", epno);
@@ -3854,7 +3933,7 @@
/* put transfer on interrupt queue (again) */
usbd_transfer_enqueue(&sc->sc_bus.intr_q, xfer);
- (void)usb_proc_msignal(&sc->sc_config_proc,
+ (void)usb_proc_msignal(USB_BUS_CONTROL_XFER_PROC(&sc->sc_bus),
&sc->sc_config_msg[0], &sc->sc_config_msg[1]);
}
@@ -3876,7 +3955,7 @@
if ((pepext->trb_halted != 0) ||
(pepext->trb_running == 0)) {
- uint8_t i;
+ uint16_t i;
/* clear halted and running */
pepext->trb_halted = 0;
@@ -3884,7 +3963,8 @@
/* nuke remaining buffered transfers */
- for (i = 0; i != (XHCI_MAX_TRANSFERS - 1); i++) {
+ for (i = 0; i != (XHCI_MAX_TRANSFERS *
+ XHCI_MAX_STREAMS); i++) {
/*
* NOTE: We need to use the timeout
* error code here else existing
@@ -3911,7 +3991,8 @@
/* check if halted is still cleared */
if (pepext->trb_halted == 0) {
pepext->trb_running = 1;
- pepext->trb_index = 0;
+ memset(pepext->trb_index, 0,
+ sizeof(pepext->trb_index));
}
goto restart;
}
@@ -3935,7 +4016,8 @@
xhci_transfer_insert(xfer);
/* try to multi buffer */
- xhci_device_generic_multi_enter(xfer->endpoint, NULL);
+ xhci_device_generic_multi_enter(xfer->endpoint,
+ xfer->stream_id, NULL);
}
}
@@ -4112,7 +4194,7 @@
USB_BUS_LOCK(udev->bus);
for (n = 1; n != XHCI_MAX_ENDPOINTS; n++) {
- for (p = 0; p != 1 /*XHCI_MAX_STREAMS*/; p++) {
+ for (p = 0; p != XHCI_MAX_STREAMS; p++) {
XWRITE4(sc, door, XHCI_DOORBELL(index),
n | XHCI_DB_SID_SET(p));
}
@@ -4255,6 +4337,24 @@
XHCI_CMD_UNLOCK(sc);
}
+static usb_error_t
+xhci_set_endpoint_mode(struct usb_device *udev, struct usb_endpoint *ep,
+ uint8_t ep_mode)
+{
+ switch (ep_mode) {
+ case USB_EP_MODE_DEFAULT:
+ return (0);
+ case USB_EP_MODE_STREAMS:
+ if (xhcistreams == 0 ||
+ (ep->edesc->bmAttributes & UE_XFERTYPE) != UE_BULK ||
+ udev->speed != USB_SPEED_SUPER)
+ return (USB_ERR_INVAL);
+ return (0);
+ default:
+ return (USB_ERR_INVAL);
+ }
+}
+
struct usb_bus_methods xhci_bus_methods = {
.endpoint_init = xhci_ep_init,
.endpoint_uninit = xhci_ep_uninit,
@@ -4273,4 +4373,5 @@
.clear_stall = xhci_ep_clear_stall,
.device_state_change = xhci_device_state_change,
.set_hw_power_sleep = xhci_set_hw_power_sleep,
+ .set_endpoint_mode = xhci_set_endpoint_mode,
};
Modified: trunk/sys/dev/usb/controller/xhci.h
===================================================================
--- trunk/sys/dev/usb/controller/xhci.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/xhci.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/xhci.h 315253 2017-03-14 15:30:46Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/xhci.h 333203 2018-05-03 07:38:45Z hselasky $ */
/*-
* Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
@@ -35,7 +36,15 @@
#define XHCI_MAX_COMMANDS (16 * 1)
#define XHCI_MAX_RSEG 1
#define XHCI_MAX_TRANSFERS 4
-
+#if USB_MAX_EP_STREAMS == 8
+#define XHCI_MAX_STREAMS 8
+#define XHCI_MAX_STREAMS_LOG 3
+#elif USB_MAX_EP_STREAMS == 1
+#define XHCI_MAX_STREAMS 1
+#define XHCI_MAX_STREAMS_LOG 0
+#else
+#error "The USB_MAX_EP_STREAMS value is not supported."
+#endif
#define XHCI_DEV_CTX_ADDR_ALIGN 64 /* bytes */
#define XHCI_DEV_CTX_ALIGN 64 /* bytes */
#define XHCI_INPUT_CTX_ALIGN 64 /* bytes */
@@ -308,7 +317,8 @@
} __aligned(4);
struct xhci_dev_endpoint_trbs {
- struct xhci_trb trb[XHCI_MAX_ENDPOINTS][XHCI_MAX_TRANSFERS];
+ struct xhci_trb trb[(XHCI_MAX_STREAMS *
+ XHCI_MAX_TRANSFERS) + XHCI_MAX_STREAMS];
};
#if (USB_PAGE_SIZE < 4096)
@@ -366,13 +376,14 @@
struct xhci_endpoint_ext {
struct xhci_trb *trb;
- struct usb_xfer *xfer[XHCI_MAX_TRANSFERS - 1];
+ struct usb_xfer *xfer[XHCI_MAX_TRANSFERS * XHCI_MAX_STREAMS];
struct usb_page_cache *page_cache;
uint64_t physaddr;
- uint8_t trb_used;
- uint8_t trb_index;
+ uint8_t trb_used[XHCI_MAX_STREAMS];
+ uint8_t trb_index[XHCI_MAX_STREAMS];
uint8_t trb_halted;
uint8_t trb_running;
+ uint8_t trb_ep_mode;
uint8_t trb_ep_maxp;
};
@@ -388,11 +399,11 @@
struct xhci_hw_dev {
struct usb_page_cache device_pc;
struct usb_page_cache input_pc;
- struct usb_page_cache endpoint_pc;
+ struct usb_page_cache endpoint_pc[XHCI_MAX_ENDPOINTS];
struct usb_page device_pg;
struct usb_page input_pg;
- struct usb_page endpoint_pg;
+ struct usb_page endpoint_pg[XHCI_MAX_ENDPOINTS];
struct xhci_endpoint_ext endp[XHCI_MAX_ENDPOINTS];
@@ -441,8 +452,7 @@
struct xhci_hw_softc sc_hw;
/* base device */
struct usb_bus sc_bus;
- /* configure process */
- struct usb_process sc_config_proc;
+ /* configure message */
struct usb_bus_msg sc_config_msg[2];
struct usb_callout sc_callout;
@@ -497,6 +507,8 @@
uint8_t sc_noport;
/* root HUB device configuration */
uint8_t sc_conf;
+ /* step status stage of all control transfers */
+ uint8_t sc_ctlstep;
/* root HUB port event bitmap, max 256 ports */
uint8_t sc_hub_idata[32];
Modified: trunk/sys/dev/usb/controller/xhci_pci.c
===================================================================
--- trunk/sys/dev/usb/controller/xhci_pci.c 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/xhci_pci.c 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
*
@@ -24,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/9/sys/dev/usb/controller/xhci_pci.c 315253 2017-03-14 15:30:46Z hselasky $");
+__FBSDID("$FreeBSD: stable/10/sys/dev/usb/controller/xhci_pci.c 333203 2018-05-03 07:38:45Z hselasky $");
#include <sys/stdint.h>
#include <sys/stddef.h>
@@ -95,8 +96,13 @@
uint32_t device_id = pci_get_devid(self);
switch (device_id) {
+ case 0x78141022:
+ return ("AMD FCH USB 3.0 controller");
+
case 0x01941033:
return ("NEC uPD720200 USB 3.0 controller");
+ case 0x00151912:
+ return ("NEC uPD720202 USB 3.0 controller");
case 0x10001b73:
return ("Fresco Logic FL1000G USB 3.0 controller");
@@ -111,12 +117,22 @@
case 0x9c318086:
case 0x1e318086:
return ("Intel Panther Point USB 3.0 controller");
+ case 0x22b58086:
+ return ("Intel Braswell USB 3.0 controller");
+ case 0x5aa88086:
+ return ("Intel Apollo Lake USB 3.0 controller");
case 0x8c318086:
return ("Intel Lynx Point USB 3.0 controller");
case 0x8cb18086:
return ("Intel Wildcat Point USB 3.0 controller");
+ case 0x8d318086:
+ return ("Intel Wellsburg USB 3.0 controller");
case 0x9cb18086:
return ("Broadwell Integrated PCH-LP chipset USB 3.0 controller");
+ case 0x9d2f8086:
+ return ("Intel Sunrise Point-LP USB 3.0 controller");
+ case 0xa12f8086:
+ return ("Intel Sunrise Point USB 3.0 controller");
case 0xa01b177d:
return ("Cavium ThunderX USB 3.0 controller");
@@ -140,7 +156,7 @@
if (desc) {
device_set_desc(self, desc);
- return (0);
+ return (BUS_PROBE_DEFAULT);
} else {
return (ENXIO);
}
@@ -225,6 +241,7 @@
*/
sc->sc_port_route = &xhci_pci_port_route;
sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
+ sc->sc_ctlstep = 1;
break;
}
Modified: trunk/sys/dev/usb/controller/xhcireg.h
===================================================================
--- trunk/sys/dev/usb/controller/xhcireg.h 2018-05-27 22:41:04 UTC (rev 10046)
+++ trunk/sys/dev/usb/controller/xhcireg.h 2018-05-27 22:41:38 UTC (rev 10047)
@@ -1,4 +1,5 @@
-/* $FreeBSD: stable/9/sys/dev/usb/controller/xhcireg.h 302267 2016-06-29 10:23:19Z hselasky $ */
+/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/usb/controller/xhcireg.h 302266 2016-06-29 10:21:45Z hselasky $ */
/*-
* Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
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