[Midnightbsd-cvs] src [10077] trunk/sys/dev/qlxgb: sync with freebsd
laffer1 at midnightbsd.org
laffer1 at midnightbsd.org
Sun May 27 19:19:22 EDT 2018
Revision: 10077
http://svnweb.midnightbsd.org/src/?rev=10077
Author: laffer1
Date: 2018-05-27 19:19:22 -0400 (Sun, 27 May 2018)
Log Message:
-----------
sync with freebsd
Modified Paths:
--------------
trunk/sys/dev/qlxgb/README.txt
trunk/sys/dev/qlxgb/qla_dbg.c
trunk/sys/dev/qlxgb/qla_dbg.h
trunk/sys/dev/qlxgb/qla_def.h
trunk/sys/dev/qlxgb/qla_glbl.h
trunk/sys/dev/qlxgb/qla_hw.c
trunk/sys/dev/qlxgb/qla_hw.h
trunk/sys/dev/qlxgb/qla_inline.h
trunk/sys/dev/qlxgb/qla_ioctl.c
trunk/sys/dev/qlxgb/qla_ioctl.h
trunk/sys/dev/qlxgb/qla_isr.c
trunk/sys/dev/qlxgb/qla_misc.c
trunk/sys/dev/qlxgb/qla_os.c
trunk/sys/dev/qlxgb/qla_os.h
trunk/sys/dev/qlxgb/qla_reg.h
trunk/sys/dev/qlxgb/qla_ver.h
Property Changed:
----------------
trunk/sys/dev/qlxgb/README.txt
Modified: trunk/sys/dev/qlxgb/README.txt
===================================================================
--- trunk/sys/dev/qlxgb/README.txt 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/README.txt 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,4 +1,5 @@
-# $MidnightBSD$
+$MidnightBSD$
+# $FreeBSD: stable/10/sys/dev/qlxgb/README.txt 250340 2013-05-07 22:58:42Z davidcs $
README File
QLogic 3200 and 8200 series Single/Dual Port
@@ -93,7 +94,7 @@
Technical Support can be reached by the following methods:
Web: http://support.qlogic.com
E-mail: support at qlogic.com
-(c) Copyright 2011. All rights reserved worldwide. QLogic, the QLogic
+(c) Copyright 2013. All rights reserved worldwide. QLogic, the QLogic
logo, and the Powered by QLogic logo are registered trademarks of
QLogic Corporation. All other brand and product names are trademarks
or registered trademarks of their respective owners.
Property changes on: trunk/sys/dev/qlxgb/README.txt
___________________________________________________________________
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Modified: trunk/sys/dev/qlxgb/qla_dbg.c
===================================================================
--- trunk/sys/dev/qlxgb/qla_dbg.c 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_dbg.c 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -30,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/qlxgb/qla_dbg.c 250340 2013-05-07 22:58:42Z davidcs $");
#include "qla_os.h"
#include "qla_reg.h"
Modified: trunk/sys/dev/qlxgb/qla_dbg.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_dbg.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_dbg.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_dbg.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
Modified: trunk/sys/dev/qlxgb/qla_def.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_def.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_def.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_def.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
@@ -194,6 +195,8 @@
/* debug stuff */
volatile const char *qla_lock;
volatile const char *qla_unlock;
+
+ uint8_t fw_ver_str[32];
};
typedef struct qla_host qla_host_t;
Modified: trunk/sys/dev/qlxgb/qla_glbl.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_glbl.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_glbl.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_glbl.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
* File: qla_glbl.h
@@ -56,15 +57,7 @@
extern int qla_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp,
uint32_t jumbo);
-
/*
- * from qla_flash.c
- */
-extern int qla_flash_rd32_words(qla_host_t *ha, uint32_t addr,
- uint32_t *val, uint32_t num);
-extern int qla_flash_rd32(qla_host_t *ha, uint32_t addr, uint32_t *val);
-
-/*
* from qla_hw.c
*/
extern int qla_get_msix_count(qla_host_t *ha);
@@ -97,6 +90,14 @@
extern int qla_rdwr_indreg32(qla_host_t *ha, uint32_t addr, uint32_t *val,
uint32_t rd);
extern int qla_rd_flash32(qla_host_t *ha, uint32_t addr, uint32_t *data);
+extern int qla_flash_rd32_words(qla_host_t *ha, uint32_t addr,
+ uint32_t *val, uint32_t num);
+extern int qla_flash_rd32(qla_host_t *ha, uint32_t addr, uint32_t *val);
+extern int qla_fw_update(qla_host_t *ha, void *fdata, uint32_t off,
+ uint32_t size);
+extern int qla_erase_flash(qla_host_t *ha, uint32_t off, uint32_t size);
+extern int qla_wr_flash_buffer(qla_host_t *ha, uint32_t off, uint32_t size,
+ void *buf, uint32_t pattern);
/*
* from qla_ioctl.c
Modified: trunk/sys/dev/qlxgb/qla_hw.c
===================================================================
--- trunk/sys/dev/qlxgb/qla_hw.c 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_hw.c 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2012 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -32,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/qlxgb/qla_hw.c 297056 2016-03-20 03:09:01Z pfg $");
#include "qla_os.h"
#include "qla_reg.h"
@@ -711,20 +712,18 @@
* Ring Structure are plugged in.
*/
static int
-qla_tx_tso(qla_host_t *ha, struct mbuf *mp, q80_tx_cmd_t *tx_cmd)
+qla_tx_tso(qla_host_t *ha, struct mbuf *mp, q80_tx_cmd_t *tx_cmd, uint8_t *hdr)
{
struct ether_vlan_header *eh;
struct ip *ip = NULL;
struct tcphdr *th = NULL;
- uint32_t ehdrlen, hdrlen, ip_hlen, tcp_hlen;
+ uint32_t ehdrlen, hdrlen = 0, ip_hlen, tcp_hlen, tcp_opt_off;
uint16_t etype, opcode, offload = 1;
+ uint8_t *tcp_opt;
device_t dev;
dev = ha->pci_dev;
- if (mp->m_pkthdr.len <= ha->max_frame_size)
- return (-1);
-
eh = mtod(mp, struct ether_vlan_header *);
if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
@@ -737,14 +736,26 @@
switch (etype) {
case ETHERTYPE_IP:
- ip = (struct ip *)(mp->m_data + ehdrlen);
+
+ tcp_opt_off = ehdrlen + sizeof(struct ip) +
+ sizeof(struct tcphdr);
+
+ if (mp->m_len < tcp_opt_off) {
+ m_copydata(mp, 0, tcp_opt_off, hdr);
+ ip = (struct ip *)hdr;
+ } else {
+ ip = (struct ip *)(mp->m_data + ehdrlen);
+ }
+
ip_hlen = ip->ip_hl << 2;
opcode = Q8_TX_CMD_OP_XMT_TCP_LSO;
- if (ip->ip_p != IPPROTO_TCP) {
+ if ((ip->ip_p != IPPROTO_TCP) ||
+ (ip_hlen != sizeof (struct ip))) {
offload = 0;
- } else
+ } else {
th = (struct tcphdr *)((caddr_t)ip + ip_hlen);
+ }
break;
default:
@@ -758,13 +769,46 @@
tcp_hlen = th->th_off << 2;
+
hdrlen = ehdrlen + ip_hlen + tcp_hlen;
if (mp->m_len < hdrlen) {
- device_printf(dev, "%s: (mp->m_len < hdrlen)\n", __func__);
- return (-1);
+ if (mp->m_len < tcp_opt_off) {
+ if (tcp_hlen > sizeof(struct tcphdr)) {
+ m_copydata(mp, tcp_opt_off,
+ (tcp_hlen - sizeof(struct tcphdr)),
+ &hdr[tcp_opt_off]);
+ }
+ } else {
+ m_copydata(mp, 0, hdrlen, hdr);
+ }
}
+ if ((mp->m_pkthdr.csum_flags & CSUM_TSO) == 0) {
+
+ /* If TCP options are preset only time stamp option is supported */
+ if ((tcp_hlen - sizeof(struct tcphdr)) != 10)
+ return -1;
+ else {
+
+ if (mp->m_len < hdrlen) {
+ tcp_opt = &hdr[tcp_opt_off];
+ } else {
+ tcp_opt = (uint8_t *)(mp->m_data + tcp_opt_off);
+ }
+
+ if ((*tcp_opt != 0x01) || (*(tcp_opt + 1) != 0x01) ||
+ (*(tcp_opt + 2) != 0x08) ||
+ (*(tcp_opt + 3) != 10)) {
+ return -1;
+ }
+ }
+
+ tx_cmd->mss = ha->max_frame_size - ETHER_CRC_LEN - hdrlen;
+ } else {
+ tx_cmd->mss = mp->m_pkthdr.tso_segsz;
+ }
+
tx_cmd->flags_opcode = opcode ;
tx_cmd->tcp_hdr_off = ip_hlen + ehdrlen;
tx_cmd->ip_hdr_off = ehdrlen;
@@ -776,6 +820,10 @@
tx_cmd->flags_opcode = Q8_TX_CMD_FLAGS_MULTICAST;
}
+ if (mp->m_len < hdrlen) {
+ return (1);
+ }
+
return (0);
}
@@ -815,7 +863,7 @@
case ETHERTYPE_IP:
ip = (struct ip *)(mp->m_data + ehdrlen);
- ip_hlen = ip->ip_hl << 2;
+ ip_hlen = sizeof (struct ip);
if (mp->m_len < (ehdrlen + ip_hlen)) {
device_printf(dev, "%s: ipv4 mlen\n", __func__);
@@ -886,7 +934,8 @@
uint32_t num_tx_cmds, hdr_len = 0;
uint32_t total_length = 0, bytes, tx_cmd_count = 0;
device_t dev;
- int i;
+ int i, ret;
+ uint8_t *src = NULL, *dst = NULL;
dev = ha->pci_dev;
@@ -902,26 +951,36 @@
__func__, total_length);
return (-1);
}
+ eh = mtod(mp, struct ether_vlan_header *);
- bzero((void *)&tso_cmd, sizeof(q80_tx_cmd_t));
+ if ((mp->m_pkthdr.len > ha->max_frame_size)||(nsegs > Q8_TX_MAX_SEGMENTS)) {
- if (qla_tx_tso(ha, mp, &tso_cmd) == 0) {
- /* find the additional tx_cmd descriptors required */
+ bzero((void *)&tso_cmd, sizeof(q80_tx_cmd_t));
- hdr_len = tso_cmd.total_hdr_len;
+ src = ha->hw.frame_hdr;
+ ret = qla_tx_tso(ha, mp, &tso_cmd, src);
- bytes = sizeof(q80_tx_cmd_t) - Q8_TX_CMD_TSO_ALIGN;
- bytes = QL_MIN(bytes, hdr_len);
+ if (!(ret & ~1)) {
+ /* find the additional tx_cmd descriptors required */
- num_tx_cmds++;
- hdr_len -= bytes;
+ hdr_len = tso_cmd.total_hdr_len;
- while (hdr_len) {
- bytes = QL_MIN((sizeof(q80_tx_cmd_t)), hdr_len);
+ bytes = sizeof(q80_tx_cmd_t) - Q8_TX_CMD_TSO_ALIGN;
+ bytes = QL_MIN(bytes, hdr_len);
+
+ num_tx_cmds++;
hdr_len -= bytes;
- num_tx_cmds++;
+
+ while (hdr_len) {
+ bytes = QL_MIN((sizeof(q80_tx_cmd_t)), hdr_len);
+ hdr_len -= bytes;
+ num_tx_cmds++;
+ }
+ hdr_len = tso_cmd.total_hdr_len;
+
+ if (ret == 0)
+ src = (uint8_t *)eh;
}
- hdr_len = tso_cmd.total_hdr_len;
}
if (hw->txr_free <= (num_tx_cmds + QLA_TX_MIN_FREE)) {
@@ -941,11 +1000,10 @@
if (hdr_len == 0) {
if ((nsegs > Q8_TX_MAX_SEGMENTS) ||
(mp->m_pkthdr.len > ha->max_frame_size)){
- /* TBD: copy into private buffer and send it */
device_printf(dev,
- "%s: (nsegs[%d, %d, 0x%x] > Q8_TX_MAX_SEGMENTS)\n",
+ "%s: (nsegs[%d, %d, 0x%b] > Q8_TX_MAX_SEGMENTS)\n",
__func__, nsegs, mp->m_pkthdr.len,
- mp->m_pkthdr.csum_flags);
+ (int)mp->m_pkthdr.csum_flags, CSUM_BITS);
qla_dump_buf8(ha, "qla_hw_send: wrong pkt",
mtod(mp, char *), mp->m_len);
return (EINVAL);
@@ -957,7 +1015,6 @@
bcopy(&tso_cmd, tx_cmd, sizeof(q80_tx_cmd_t));
}
- eh = mtod(mp, struct ether_vlan_header *);
if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN))
tx_cmd->flags_opcode |= Q8_TX_CMD_FLAGS_VLAN_TAGGED;
else if (mp->m_flags & M_VLANTAG) {
@@ -1015,10 +1072,7 @@
if (hdr_len) {
/* TSO : Copy the header in the following tx cmd descriptors */
- uint8_t *src, *dst;
- src = (uint8_t *)eh;
-
tx_cmd = &hw->tx_ring_base[hw->txr_next];
bzero((void *)tx_cmd, sizeof(q80_tx_cmd_t));
@@ -1704,6 +1758,7 @@
qla_update_link_state(qla_host_t *ha)
{
uint32_t link_state;
+ uint32_t prev_link_state;
if (!(ha->ifp->if_drv_flags & IFF_DRV_RUNNING)) {
ha->hw.flags.link_up = 0;
@@ -1711,10 +1766,20 @@
}
link_state = READ_REG32(ha, Q8_LINK_STATE);
- if (ha->pci_func == 0)
+ prev_link_state = ha->hw.flags.link_up;
+
+ if (ha->pci_func == 0)
ha->hw.flags.link_up = (((link_state & 0xF) == 1)? 1 : 0);
else
ha->hw.flags.link_up = ((((link_state >> 4)& 0xF) == 1)? 1 : 0);
+
+ if (prev_link_state != ha->hw.flags.link_up) {
+ if (ha->hw.flags.link_up) {
+ if_link_state_change(ha->ifp, LINK_STATE_UP);
+ } else {
+ if_link_state_change(ha->ifp, LINK_STATE_DOWN);
+ }
+ }
}
int
Modified: trunk/sys/dev/qlxgb/qla_hw.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_hw.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_hw.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_hw.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
* File: qla_hw.h
@@ -724,6 +725,8 @@
volatile uint32_t rcv_active;
} qla_sds_t;
+#define QL_FRAME_HDR_SIZE (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +\
+ sizeof (struct ip) + sizeof (struct tcphdr) + 16)
/*
* struct for storing hardware specific information for a given interface
*/
@@ -791,6 +794,8 @@
bus_addr_t rx_cntxt_rsp_paddr;
qla_sds_t sds[MAX_SDS_RINGS];
+
+ uint8_t frame_hdr[QL_FRAME_HDR_SIZE];
} qla_hw_t;
#define QL_UPDATE_RDS_PRODUCER_INDEX(ha, i, val) \
Modified: trunk/sys/dev/qlxgb/qla_inline.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_inline.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_inline.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_inline.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
* File: qla_inline.h
Modified: trunk/sys/dev/qlxgb/qla_ioctl.c
===================================================================
--- trunk/sys/dev/qlxgb/qla_ioctl.c 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_ioctl.c 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -30,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/qlxgb/qla_ioctl.c 250340 2013-05-07 22:58:42Z davidcs $");
#include "qla_os.h"
#include "qla_reg.h"
@@ -82,10 +83,15 @@
int rval = 0;
qla_reg_val_t *rv;
qla_rd_flash_t *rdf;
+ qla_wr_flash_t *wrf;
+ qla_rd_pci_ids_t *pci_ids;
+ device_t pci_dev;
if ((ha = (qla_host_t *)dev->si_drv1) == NULL)
return ENXIO;
+ pci_dev= ha->pci_dev;
+
switch(cmd) {
case QLA_RDWR_REG:
@@ -110,6 +116,30 @@
if ((rval = qla_rd_flash32(ha, rdf->off, &rdf->data)))
rval = ENXIO;
break;
+
+ case QLA_WR_FLASH:
+ wrf = (qla_wr_flash_t *)data;
+ if ((rval = qla_wr_flash_buffer(ha, wrf->off, wrf->size,
+ wrf->buffer, wrf->pattern)))
+ rval = ENXIO;
+ break;
+
+
+ case QLA_ERASE_FLASH:
+ if (qla_erase_flash(ha, ((qla_erase_flash_t *)data)->off,
+ ((qla_erase_flash_t *)data)->size))
+ rval = ENXIO;
+ break;
+
+ case QLA_RD_PCI_IDS:
+ pci_ids = (qla_rd_pci_ids_t *)data;
+ pci_ids->ven_id = pci_get_vendor(pci_dev);
+ pci_ids->dev_id = pci_get_device(pci_dev);
+ pci_ids->subsys_ven_id = pci_get_subvendor(pci_dev);
+ pci_ids->subsys_dev_id = pci_get_subdevice(pci_dev);
+ pci_ids->rev_id = pci_read_config(pci_dev, PCIR_REVID, 1);
+ break;
+
default:
break;
}
Modified: trunk/sys/dev/qlxgb/qla_ioctl.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_ioctl.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_ioctl.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_ioctl.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
* File: qla_ioctl.h
@@ -50,7 +51,29 @@
};
typedef struct qla_rd_flash qla_rd_flash_t;
+struct qla_wr_flash {
+ uint32_t off;
+ uint32_t size;
+ void *buffer;
+ uint32_t pattern;
+};
+typedef struct qla_wr_flash qla_wr_flash_t;
+struct qla_erase_flash {
+ uint32_t off;
+ uint32_t size;
+};
+typedef struct qla_erase_flash qla_erase_flash_t;
+
+struct qla_rd_pci_ids {
+ uint16_t ven_id;
+ uint16_t dev_id;
+ uint16_t subsys_ven_id;
+ uint16_t subsys_dev_id;
+ uint8_t rev_id;
+};
+typedef struct qla_rd_pci_ids qla_rd_pci_ids_t;
+
/*
* Read/Write Register
*/
@@ -61,4 +84,19 @@
*/
#define QLA_RD_FLASH _IOWR('q', 2, qla_rd_flash_t)
+/*
+ * Write Flash
+ */
+#define QLA_WR_FLASH _IOWR('q', 3, qla_wr_flash_t)
+
+/*
+ * Erase Flash
+ */
+#define QLA_ERASE_FLASH _IOWR('q', 5, qla_erase_flash_t)
+
+/*
+ * Read PCI IDs
+ */
+#define QLA_RD_PCI_IDS _IOWR('q', 6, qla_rd_pci_ids_t)
+
#endif /* #ifndef _QLA_IOCTL_H_ */
Modified: trunk/sys/dev/qlxgb/qla_isr.c
===================================================================
--- trunk/sys/dev/qlxgb/qla_isr.c 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_isr.c 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -31,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/qlxgb/qla_isr.c 250340 2013-05-07 22:58:42Z davidcs $");
#include "qla_os.h"
#include "qla_reg.h"
Modified: trunk/sys/dev/qlxgb/qla_misc.c
===================================================================
--- trunk/sys/dev/qlxgb/qla_misc.c 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_misc.c 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -30,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/qlxgb/qla_misc.c 250340 2013-05-07 22:58:42Z davidcs $");
#include "qla_os.h"
#include "qla_reg.h"
@@ -344,6 +345,17 @@
return 0;
}
+static int
+qla_p3p_sem_lock2(qla_host_t *ha)
+{
+ if (qla_sem_lock(ha, Q8_SEM2_LOCK, 0, 0)) {
+ device_printf(ha->pci_dev, "%s: SEM2_LOCK failed\n", __func__);
+ return (-1);
+ }
+ WRITE_OFFSET32(ha, Q8_ROM_LOCKID, 0xa5a5a5a5);
+ return (0);
+}
+
/*
* Name: qla_int_to_pci_addr_map
* Function: Convert's Internal(CRB) Address to Indirect Address
@@ -402,7 +414,7 @@
static int
qla_crb_init(qla_host_t *ha)
{
- uint32_t val, sig;
+ uint32_t val = 0, sig = 0;
uint32_t offset, count, i;
addr_val_t *addr_val_map, *avmap;
@@ -611,6 +623,21 @@
if (val != CMDPEG_PHAN_INIT_COMPLETE) {
ret = qla_init_from_flash(ha);
qla_mdelay(__func__, 100);
+ } else {
+ ha->fw_ver_major = READ_OFFSET32(ha, Q8_FW_VER_MAJOR);
+ ha->fw_ver_minor = READ_OFFSET32(ha, Q8_FW_VER_MINOR);
+ ha->fw_ver_sub = READ_OFFSET32(ha, Q8_FW_VER_SUB);
+
+ if (qla_rd_flash32(ha, 0x100004, &val) == 0) {
+
+ if (((val & 0xFF) != ha->fw_ver_major) ||
+ (((val >> 8) & 0xFF) != ha->fw_ver_minor) ||
+ (((val >> 16) & 0xFF) != ha->fw_ver_sub)) {
+
+ ret = qla_init_from_flash(ha);
+ qla_mdelay(__func__, 100);
+ }
+ }
}
qla_init_exit:
@@ -622,3 +649,403 @@
return (ret);
}
+static int
+qla_wait_for_flash_busy(qla_host_t *ha)
+{
+ uint32_t count = 100;
+ uint32_t val;
+
+ QLA_USEC_DELAY(100);
+
+ while (count--) {
+ val = READ_OFFSET32(ha, Q8_ROM_STATUS);
+
+ if (val & BIT_1)
+ return 0;
+ qla_mdelay(__func__, 1);
+ }
+ return -1;
+}
+
+static int
+qla_flash_write_enable(qla_host_t *ha)
+{
+ uint32_t val, rval;
+
+ val = 0;
+ qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
+
+ val = ROM_OPCODE_WR_ENABLE;
+ qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
+
+ rval = qla_wait_for_flash_busy(ha);
+
+ if (rval)
+ device_printf(ha->pci_dev, "%s: failed \n", __func__);
+
+ return (rval);
+}
+
+static int
+qla_flash_unprotect(qla_host_t *ha)
+{
+ uint32_t val, rval;
+
+ if (qla_flash_write_enable(ha) != 0)
+ return(-1);
+
+ val = 0;
+ qla_rdwr_indreg32(ha, Q8_ROM_WR_DATA, &val, 0);
+
+ val = ROM_OPCODE_WR_STATUS_REG;
+ qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
+
+ rval = qla_wait_for_flash_busy(ha);
+
+ if (rval) {
+ device_printf(ha->pci_dev, "%s: failed \n", __func__);
+ return rval;
+ }
+
+ if (qla_flash_write_enable(ha) != 0)
+ return(-1);
+
+ val = 0;
+ qla_rdwr_indreg32(ha, Q8_ROM_WR_DATA, &val, 0);
+
+ val = ROM_OPCODE_WR_STATUS_REG;
+ qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
+
+ rval = qla_wait_for_flash_busy(ha);
+
+ if (rval)
+ device_printf(ha->pci_dev, "%s: failed \n", __func__);
+
+ return rval;
+}
+
+static int
+qla_flash_protect(qla_host_t *ha)
+{
+ uint32_t val, rval;
+
+ if (qla_flash_write_enable(ha) != 0)
+ return(-1);
+
+ val = 0x9C;
+ qla_rdwr_indreg32(ha, Q8_ROM_WR_DATA, &val, 0);
+
+ val = ROM_OPCODE_WR_STATUS_REG;
+ qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
+
+ rval = qla_wait_for_flash_busy(ha);
+
+ if (rval)
+ device_printf(ha->pci_dev, "%s: failed \n", __func__);
+
+ return rval;
+}
+
+static uint32_t
+qla_flash_get_status(qla_host_t *ha)
+{
+ uint32_t count = 1000;
+ uint32_t val, rval;
+
+ while (count--) {
+ val = 0;
+ qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
+
+ val = ROM_OPCODE_RD_STATUS_REG;
+ qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
+
+ rval = qla_wait_for_flash_busy(ha);
+
+ if (rval == 0) {
+ qla_rdwr_indreg32(ha, Q8_ROM_RD_DATA, &val, 1);
+
+ if ((val & BIT_0) == 0)
+ return (val);
+ }
+ qla_mdelay(__func__, 1);
+ }
+ return -1;
+}
+
+static int
+qla_wait_for_flash_unprotect(qla_host_t *ha)
+{
+ uint32_t delay = 1000;
+
+ while (delay--) {
+
+ if (qla_flash_get_status(ha) == 0)
+ return 0;
+
+ qla_mdelay(__func__, 1);
+ }
+
+ return -1;
+}
+
+static int
+qla_wait_for_flash_protect(qla_host_t *ha)
+{
+ uint32_t delay = 1000;
+
+ while (delay--) {
+
+ if (qla_flash_get_status(ha) == 0x9C)
+ return 0;
+
+ qla_mdelay(__func__, 1);
+ }
+
+ return -1;
+}
+
+static int
+qla_erase_flash_sector(qla_host_t *ha, uint32_t start)
+{
+ uint32_t val;
+ int rval;
+
+ if (qla_flash_write_enable(ha) != 0)
+ return(-1);
+
+ val = start;
+ qla_rdwr_indreg32(ha, Q8_ROM_ADDRESS, &val, 0);
+
+ val = 3;
+ qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
+
+ val = ROM_OPCODE_SECTOR_ERASE;
+ qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
+
+ rval = qla_wait_for_flash_busy(ha);
+
+ if (rval)
+ device_printf(ha->pci_dev, "%s: failed \n", __func__);
+ return rval;
+}
+
+#define Q8_FLASH_SECTOR_SIZE 0x10000
+int
+qla_erase_flash(qla_host_t *ha, uint32_t off, uint32_t size)
+{
+ int rval = 0;
+ uint32_t start;
+
+ if (off & (Q8_FLASH_SECTOR_SIZE -1))
+ return -1;
+
+ if ((rval = qla_p3p_sem_lock2(ha)))
+ goto qla_erase_flash_exit;
+
+ if ((rval = qla_flash_unprotect(ha)))
+ goto qla_erase_flash_unlock_exit;
+
+ if ((rval = qla_wait_for_flash_unprotect(ha)))
+ goto qla_erase_flash_unlock_exit;
+
+ for (start = off; start < (off + size); start = start + 0x10000) {
+ if (qla_erase_flash_sector(ha, start)) {
+ rval = -1;
+ break;
+ }
+ }
+
+ rval = qla_flash_protect(ha);
+
+qla_erase_flash_unlock_exit:
+ qla_sem_unlock(ha, Q8_SEM2_UNLOCK);
+
+qla_erase_flash_exit:
+ return (rval);
+}
+
+static int
+qla_flash_write32(qla_host_t *ha, uint32_t off, uint32_t data)
+{
+ uint32_t val;
+ int rval = 0;
+
+ val = data;
+ qla_rdwr_indreg32(ha, Q8_ROM_WR_DATA, &val, 0);
+
+ val = off;
+ qla_rdwr_indreg32(ha, Q8_ROM_ADDRESS, &val, 0);
+
+ val = 3;
+ qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
+
+ val = ROM_OPCODE_PROG_PAGE;
+ qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
+
+ rval = qla_wait_for_flash_busy(ha);
+
+ if (rval)
+ device_printf(ha->pci_dev, "%s: failed \n", __func__);
+
+ return rval;
+}
+
+static int
+qla_flash_wait_for_write_complete(qla_host_t *ha)
+{
+ uint32_t val, count = 1000;
+ int rval = 0;
+
+ while (count--) {
+
+ val = 0;
+ qla_rdwr_indreg32(ha, Q8_ROM_ADDR_BYTE_COUNT, &val, 0);
+
+ val = ROM_OPCODE_RD_STATUS_REG;
+ qla_rdwr_indreg32(ha, Q8_ROM_INSTR_OPCODE, &val, 0);
+
+
+ rval = qla_wait_for_flash_busy(ha);
+
+ if (rval == 0) {
+ qla_rdwr_indreg32(ha, Q8_ROM_RD_DATA, &val, 1);
+
+ if ((val & BIT_0) == 0)
+ return (0);
+ }
+ qla_mdelay(__func__, 1);
+ }
+ return -1;
+}
+
+static int
+qla_flash_write(qla_host_t *ha, uint32_t off, uint32_t data)
+{
+ if (qla_flash_write_enable(ha) != 0)
+ return(-1);
+
+ if (qla_flash_write32(ha, off, data) != 0)
+ return -1;
+
+ if (qla_flash_wait_for_write_complete(ha))
+ return -1;
+
+ return 0;
+}
+
+
+static int
+qla_flash_write_pattern(qla_host_t *ha, uint32_t off, uint32_t size,
+ uint32_t pattern)
+{
+ int rval = 0;
+ uint32_t start;
+
+
+ if ((rval = qla_p3p_sem_lock2(ha)))
+ goto qla_wr_pattern_exit;
+
+ if ((rval = qla_flash_unprotect(ha)))
+ goto qla_wr_pattern_unlock_exit;
+
+ if ((rval = qla_wait_for_flash_unprotect(ha)))
+ goto qla_wr_pattern_unlock_exit;
+
+ for (start = off; start < (off + size); start = start + 4) {
+ if (qla_flash_write(ha, start, pattern)) {
+ rval = -1;
+ break;
+ }
+ }
+
+ rval = qla_flash_protect(ha);
+
+ if (rval == 0)
+ rval = qla_wait_for_flash_protect(ha);
+
+qla_wr_pattern_unlock_exit:
+ qla_sem_unlock(ha, Q8_SEM2_UNLOCK);
+
+qla_wr_pattern_exit:
+ return (rval);
+}
+
+static int
+qla_flash_write_data(qla_host_t *ha, uint32_t off, uint32_t size,
+ void *data)
+{
+ int rval = 0;
+ uint32_t start;
+ uint32_t *data32 = data;
+
+
+ if ((rval = qla_p3p_sem_lock2(ha)))
+ goto qla_wr_pattern_exit;
+
+ if ((rval = qla_flash_unprotect(ha)))
+ goto qla_wr_pattern_unlock_exit;
+
+ if ((rval = qla_wait_for_flash_unprotect(ha)))
+ goto qla_wr_pattern_unlock_exit;
+
+ for (start = off; start < (off + size); start = start + 4) {
+
+ if (*data32 != 0xFFFFFFFF) {
+ if (qla_flash_write(ha, start, *data32)) {
+ rval = -1;
+ break;
+ }
+ }
+ data32++;
+ }
+
+ rval = qla_flash_protect(ha);
+
+ if (rval == 0)
+ rval = qla_wait_for_flash_protect(ha);
+
+qla_wr_pattern_unlock_exit:
+ qla_sem_unlock(ha, Q8_SEM2_UNLOCK);
+
+qla_wr_pattern_exit:
+ return (rval);
+}
+
+int
+qla_wr_flash_buffer(qla_host_t *ha, uint32_t off, uint32_t size, void *buf,
+ uint32_t pattern)
+{
+ int rval = 0;
+ void *data;
+
+
+ if (size == 0)
+ return 0;
+
+ size = size << 2;
+
+ if (buf == NULL) {
+ rval = qla_flash_write_pattern(ha, off, size, pattern);
+ return (rval);
+ }
+
+ if ((data = malloc(size, M_QLA8XXXBUF, M_NOWAIT)) == NULL) {
+ device_printf(ha->pci_dev, "%s: malloc failed \n", __func__);
+ rval = -1;
+ goto qla_wr_flash_buffer_exit;
+ }
+
+ if ((rval = copyin(buf, data, size))) {
+ device_printf(ha->pci_dev, "%s copyin failed\n", __func__);
+ goto qla_wr_flash_buffer_free_exit;
+ }
+
+ rval = qla_flash_write_data(ha, off, size, data);
+
+qla_wr_flash_buffer_free_exit:
+ free(data, M_QLA8XXXBUF);
+
+qla_wr_flash_buffer_exit:
+ return (rval);
+}
+
Modified: trunk/sys/dev/qlxgb/qla_os.c
===================================================================
--- trunk/sys/dev/qlxgb/qla_os.c 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_os.c 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -31,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/qlxgb/qla_os.c 273736 2014-10-27 14:38:00Z hselasky $");
#include "qla_os.h"
#include "qla_reg.h"
@@ -154,6 +155,11 @@
(void *)ha, 0,
qla_sysctl_get_stats, "I", "Statistics");
+ SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
+ SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
+ OID_AUTO, "fw_version", CTLFLAG_RD,
+ ha->fw_ver_str, 0, "firmware version");
+
dbg_level = 0;
SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
@@ -347,6 +353,10 @@
ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub,
ha->fw_ver_build);
+ snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d",
+ ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub,
+ ha->fw_ver_build);
+
//qla_get_hw_caps(ha);
qla_read_mac_addr(ha);
@@ -660,8 +670,7 @@
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
- ifp->if_mtu = ETHERMTU;
- ifp->if_baudrate = (1 * 1000 * 1000 *1000);
+ if_initbaudrate(ifp, IF_Gbps(10));
ifp->if_init = qla_init;
ifp->if_softc = ha;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
@@ -681,6 +690,7 @@
IFCAP_JUMBO_MTU;
ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
+ ifp->if_capabilities |= IFCAP_LINKSTATE;
#if defined(__FreeBSD_version) && (__FreeBSD_version < 900002)
ifp->if_timer = 0;
@@ -1054,10 +1064,7 @@
ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs,
BUS_DMA_NOWAIT);
- if ((ret == EFBIG) ||
- ((nsegs > Q8_TX_MAX_SEGMENTS) &&
- (((m_head->m_pkthdr.csum_flags & CSUM_TSO) == 0) ||
- (m_head->m_pkthdr.len <= ha->max_frame_size)))) {
+ if (ret == EFBIG) {
struct mbuf *m;
Modified: trunk/sys/dev/qlxgb/qla_os.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_os.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_os.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_os.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
* File: qla_os.h
Modified: trunk/sys/dev/qlxgb/qla_reg.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_reg.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_reg.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_reg.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
* File: qla_reg.h
@@ -201,7 +202,11 @@
*/
#define Q8_ROM_RD_DATA 0x03310018
+#define Q8_ROM_WR_DATA 0x0331000C
+#define Q8_ROM_DIRECT_WINDOW 0x03310030
+#define Q8_ROM_DIRECT_DATA_OFFSET 0x03310000
+
#define Q8_NX_CDRP_CMD_RSP 0x1B2218
#define Q8_NX_CDRP_ARG1 0x1B221C
#define Q8_NX_CDRP_ARG2 0x1B2220
Modified: trunk/sys/dev/qlxgb/qla_ver.h
===================================================================
--- trunk/sys/dev/qlxgb/qla_ver.h 2018-05-27 23:18:20 UTC (rev 10076)
+++ trunk/sys/dev/qlxgb/qla_ver.h 2018-05-27 23:19:22 UTC (rev 10077)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*
- * Copyright (c) 2010-2011 Qlogic Corporation
+ * Copyright (c) 2011-2013 Qlogic Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -24,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/qlxgb/qla_ver.h 250340 2013-05-07 22:58:42Z davidcs $
*/
/*
* File: qla_ver.h
@@ -36,6 +37,6 @@
#define QLA_VERSION_MAJOR 1
#define QLA_VERSION_MINOR 1
-#define QLA_VERSION_BUILD 30
+#define QLA_VERSION_BUILD 36
#endif /* #ifndef _QLA_VER_H_ */
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