[Midnightbsd-cvs] src [10085] trunk/sys/dev/oce: sync oce
laffer1 at midnightbsd.org
laffer1 at midnightbsd.org
Sun May 27 19:27:34 EDT 2018
Revision: 10085
http://svnweb.midnightbsd.org/src/?rev=10085
Author: laffer1
Date: 2018-05-27 19:27:34 -0400 (Sun, 27 May 2018)
Log Message:
-----------
sync oce
Modified Paths:
--------------
trunk/sys/dev/oce/oce_hw.c
trunk/sys/dev/oce/oce_hw.h
trunk/sys/dev/oce/oce_if.c
trunk/sys/dev/oce/oce_if.h
trunk/sys/dev/oce/oce_mbox.c
trunk/sys/dev/oce/oce_queue.c
trunk/sys/dev/oce/oce_sysctl.c
trunk/sys/dev/oce/oce_util.c
Modified: trunk/sys/dev/oce/oce_hw.c
===================================================================
--- trunk/sys/dev/oce/oce_hw.c 2018-05-27 23:27:20 UTC (rev 10084)
+++ trunk/sys/dev/oce/oce_hw.c 2018-05-27 23:27:34 UTC (rev 10085)
@@ -37,8 +37,9 @@
* Costa Mesa, CA 92626
*/
-/* $FreeBSD: release/9.2.0/sys/dev/oce/oce_hw.c 252905 2013-07-06 23:56:58Z delphij $ */
+/* $FreeBSD: stable/10/sys/dev/oce/oce_hw.c 268046 2014-06-30 16:23:31Z delphij $ */
+
#include "oce_if.h"
static int oce_POST(POCE_SOFTC sc);
@@ -204,12 +205,16 @@
{
uint32_t val;
- if (pci_find_cap(sc->dev, PCIY_PCIX, &val) == 0) {
+#if __FreeBSD_version >= 1000000
+ #define pci_find_extcap pci_find_cap
+#endif
+
+ if (pci_find_extcap(sc->dev, PCIY_PCIX, &val) == 0) {
if (val != 0)
sc->flags |= OCE_FLAGS_PCIX;
}
- if (pci_find_cap(sc->dev, PCIY_EXPRESS, &val) == 0) {
+ if (pci_find_extcap(sc->dev, PCIY_EXPRESS, &val) == 0) {
if (val != 0) {
uint16_t link_status =
pci_read_config(sc->dev, val + 0x12, 2);
@@ -220,12 +225,12 @@
}
}
- if (pci_find_cap(sc->dev, PCIY_MSI, &val) == 0) {
+ if (pci_find_extcap(sc->dev, PCIY_MSI, &val) == 0) {
if (val != 0)
sc->flags |= OCE_FLAGS_MSI_CAPABLE;
}
- if (pci_find_cap(sc->dev, PCIY_MSIX, &val) == 0) {
+ if (pci_find_extcap(sc->dev, PCIY_MSIX, &val) == 0) {
if (val != 0) {
val = pci_msix_count(sc->dev);
sc->flags |= OCE_FLAGS_MSIX_CAPABLE;
@@ -387,6 +392,9 @@
capab_flags &= ~MBX_RX_IFACE_FLAGS_PASS_L3L4_ERR;
}
+ if (IS_SH(sc) || IS_XE201(sc))
+ capab_flags |= MBX_RX_IFACE_FLAGS_MULTICAST;
+
/* enable capabilities controlled via driver startup parameters */
if (is_rss_enabled(sc))
capab_en_flags |= MBX_RX_IFACE_FLAGS_RSS;
@@ -480,11 +488,7 @@
if_link_state_change(sc->ifp, LINK_STATE_DOWN);
}
- if (link.mac_speed > 0 && link.mac_speed < 5)
- sc->link_speed = link.mac_speed;
- else
- sc->link_speed = 0;
-
+ sc->link_speed = link.phys_port_speed;
sc->qos_link_speed = (uint32_t )link.qos_link_speed * 10;
rc = oce_start_mq(sc->mq);
Modified: trunk/sys/dev/oce/oce_hw.h
===================================================================
--- trunk/sys/dev/oce/oce_hw.h 2018-05-27 23:27:20 UTC (rev 10084)
+++ trunk/sys/dev/oce/oce_hw.h 2018-05-27 23:27:34 UTC (rev 10085)
@@ -37,7 +37,7 @@
* Costa Mesa, CA 92626
*/
-/* $FreeBSD: release/9.2.0/sys/dev/oce/oce_hw.h 252905 2013-07-06 23:56:58Z delphij $ */
+/* $FreeBSD: stable/10/sys/dev/oce/oce_hw.h 268046 2014-06-30 16:23:31Z delphij $ */
#include <sys/types.h>
@@ -60,6 +60,30 @@
#define INTR_EN 0x20000000
#define IMAGE_TRANSFER_SIZE (32 * 1024) /* 32K at a time */
+
+/********* UE Status and Mask Registers ***/
+#define PCICFG_UE_STATUS_LOW 0xA0
+#define PCICFG_UE_STATUS_HIGH 0xA4
+#define PCICFG_UE_STATUS_LOW_MASK 0xA8
+
+/* Lancer SLIPORT registers */
+#define SLIPORT_STATUS_OFFSET 0x404
+#define SLIPORT_CONTROL_OFFSET 0x408
+#define SLIPORT_ERROR1_OFFSET 0x40C
+#define SLIPORT_ERROR2_OFFSET 0x410
+#define PHYSDEV_CONTROL_OFFSET 0x414
+
+#define SLIPORT_STATUS_ERR_MASK 0x80000000
+#define SLIPORT_STATUS_DIP_MASK 0x02000000
+#define SLIPORT_STATUS_RN_MASK 0x01000000
+#define SLIPORT_STATUS_RDY_MASK 0x00800000
+#define SLI_PORT_CONTROL_IP_MASK 0x08000000
+#define PHYSDEV_CONTROL_FW_RESET_MASK 0x00000002
+#define PHYSDEV_CONTROL_DD_MASK 0x00000004
+#define PHYSDEV_CONTROL_INP_MASK 0x40000000
+
+#define SLIPORT_ERROR_NO_RESOURCE1 0x2
+#define SLIPORT_ERROR_NO_RESOURCE2 0x9
/* CSR register offsets */
#define MPU_EP_CONTROL 0
#define MPU_EP_SEMAPHORE_BE3 0xac
@@ -1000,7 +1024,7 @@
#define OCE_MBX_ADDL_STATUS(_MHDR) ((_MHDR)->u0.rsp.additional_status)
#define OCE_MBX_STATUS(_MHDR) ((_MHDR)->u0.rsp.status)
-/* [05] OPCODE_COMMON_QUERY_LINK_CONFIG */
+/* [05] OPCODE_COMMON_QUERY_LINK_CONFIG_V1 */
struct mbx_query_common_link_config {
struct mbx_hdr hdr;
union {
@@ -1009,16 +1033,37 @@
} req;
struct {
- /* dw 0 */
- uint8_t physical_port;
- uint8_t mac_duplex;
- uint8_t mac_speed;
- uint8_t mac_fault;
- /* dw 1 */
- uint8_t mgmt_mac_duplex;
- uint8_t mgmt_mac_speed;
+ #ifdef _BIG_ENDIAN
+ uint32_t physical_port_fault:8;
+ uint32_t physical_port_speed:8;
+ uint32_t link_duplex:8;
+ uint32_t pt:2;
+ uint32_t port_number:6;
+
uint16_t qos_link_speed;
- uint32_t logical_link_status;
+ uint16_t rsvd0;
+
+ uint32_t rsvd1:21;
+ uint32_t phys_fcv:1;
+ uint32_t phys_rxf:1;
+ uint32_t phys_txf:1;
+ uint32_t logical_link_status:8;
+ #else
+ uint32_t port_number:6;
+ uint32_t pt:2;
+ uint32_t link_duplex:8;
+ uint32_t physical_port_speed:8;
+ uint32_t physical_port_fault:8;
+
+ uint16_t rsvd0;
+ uint16_t qos_link_speed;
+
+ uint32_t logical_link_status:8;
+ uint32_t phys_txf:1;
+ uint32_t phys_rxf:1;
+ uint32_t phys_fcv:1;
+ uint32_t rsvd1:21;
+ #endif
} rsp;
} params;
};
@@ -2080,7 +2125,8 @@
uint32_t antidote;
uint32_t num_imgs;
uint8_t build[24];
- uint8_t rsvd[32];
+ uint8_t asic_type_rev;
+ uint8_t rsvd[31];
};
struct image_hdr {
@@ -3682,4 +3728,3 @@
QUEUE_RX_BUFFER_ERRORS = 8,
QUEUE_RX_N_WORDS = 10
};
-
Modified: trunk/sys/dev/oce/oce_if.c
===================================================================
--- trunk/sys/dev/oce/oce_if.c 2018-05-27 23:27:20 UTC (rev 10084)
+++ trunk/sys/dev/oce/oce_if.c 2018-05-27 23:27:34 UTC (rev 10085)
@@ -37,15 +37,86 @@
* Costa Mesa, CA 92626
*/
+/* $FreeBSD: stable/10/sys/dev/oce/oce_if.c 314667 2017-03-04 13:03:31Z avg $ */
-/* $FreeBSD: release/9.2.0/sys/dev/oce/oce_if.c 252905 2013-07-06 23:56:58Z delphij $ */
-
#include "opt_inet6.h"
#include "opt_inet.h"
#include "oce_if.h"
+/* UE Status Low CSR */
+static char *ue_status_low_desc[] = {
+ "CEV",
+ "CTX",
+ "DBUF",
+ "ERX",
+ "Host",
+ "MPU",
+ "NDMA",
+ "PTC ",
+ "RDMA ",
+ "RXF ",
+ "RXIPS ",
+ "RXULP0 ",
+ "RXULP1 ",
+ "RXULP2 ",
+ "TIM ",
+ "TPOST ",
+ "TPRE ",
+ "TXIPS ",
+ "TXULP0 ",
+ "TXULP1 ",
+ "UC ",
+ "WDMA ",
+ "TXULP2 ",
+ "HOST1 ",
+ "P0_OB_LINK ",
+ "P1_OB_LINK ",
+ "HOST_GPIO ",
+ "MBOX ",
+ "AXGMAC0",
+ "AXGMAC1",
+ "JTAG",
+ "MPU_INTPEND"
+};
+/* UE Status High CSR */
+static char *ue_status_hi_desc[] = {
+ "LPCMEMHOST",
+ "MGMT_MAC",
+ "PCS0ONLINE",
+ "MPU_IRAM",
+ "PCS1ONLINE",
+ "PCTL0",
+ "PCTL1",
+ "PMEM",
+ "RR",
+ "TXPB",
+ "RXPP",
+ "XAUI",
+ "TXP",
+ "ARM",
+ "IPC",
+ "HOST2",
+ "HOST3",
+ "HOST4",
+ "HOST5",
+ "HOST6",
+ "HOST7",
+ "HOST8",
+ "HOST9",
+ "NETC",
+ "Unknown",
+ "Unknown",
+ "Unknown",
+ "Unknown",
+ "Unknown",
+ "Unknown",
+ "Unknown",
+ "Unknown"
+};
+
+
/* Driver entry points prototypes */
static int oce_probe(device_t dev);
static int oce_attach(device_t dev);
@@ -112,7 +183,8 @@
DEVMETHOD(device_attach, oce_attach),
DEVMETHOD(device_detach, oce_detach),
DEVMETHOD(device_shutdown, oce_shutdown),
- {0, 0}
+
+ DEVMETHOD_END
};
static driver_t oce_driver = {
@@ -270,7 +342,7 @@
oce_add_sysctls(sc);
- callout_init(&sc->timer, CALLOUT_MPSAFE);
+ callout_init(&sc->timer, 1);
rc = callout_reset(&sc->timer, 2 * hz, oce_local_timer, sc);
if (rc)
goto stats_free;
@@ -388,11 +460,11 @@
}
if ((ifp->if_flags & IFF_PROMISC) && !sc->promisc) {
- sc->promisc = TRUE;
- oce_rxf_set_promiscuous(sc, sc->promisc);
+ if (!oce_rxf_set_promiscuous(sc, (1 | (1 << 1))))
+ sc->promisc = TRUE;
} else if (!(ifp->if_flags & IFF_PROMISC) && sc->promisc) {
- sc->promisc = FALSE;
- oce_rxf_set_promiscuous(sc, sc->promisc);
+ if (!oce_rxf_set_promiscuous(sc, 0))
+ sc->promisc = FALSE;
}
break;
@@ -492,10 +564,7 @@
int queue_index = 0;
int status = 0;
- if (!sc->link_status)
- return ENXIO;
-
- if ((m->m_flags & M_FLOWID) != 0)
+ if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE)
queue_index = m->m_pkthdr.flowid % sc->nwqs;
wq = sc->wq[queue_index];
@@ -758,6 +827,21 @@
req->ifm_active |= IFM_10G_SR | IFM_FDX;
sc->speed = 10000;
break;
+ case 5: /* 20 Gbps */
+ req->ifm_active |= IFM_10G_SR | IFM_FDX;
+ sc->speed = 20000;
+ break;
+ case 6: /* 25 Gbps */
+ req->ifm_active |= IFM_10G_SR | IFM_FDX;
+ sc->speed = 25000;
+ break;
+ case 7: /* 40 Gbps */
+ req->ifm_active |= IFM_40G_SR4 | IFM_FDX;
+ sc->speed = 40000;
+ break;
+ default:
+ sc->speed = 0;
+ break;
}
return;
@@ -862,10 +946,12 @@
(m->m_pkthdr.csum_flags & CSUM_TCP) ? 1 : 0;
nichdr->u0.s.num_wqe = num_wqes;
nichdr->u0.s.total_length = m->m_pkthdr.len;
+
if (m->m_flags & M_VLANTAG) {
nichdr->u0.s.vlan = 1; /*Vlan present*/
nichdr->u0.s.vlan_tag = m->m_pkthdr.ether_vtag;
}
+
if (m->m_pkthdr.csum_flags & CSUM_TSO) {
if (m->m_pkthdr.tso_segsz) {
nichdr->u0.s.lso = 1;
@@ -1174,32 +1260,29 @@
return status;
}
- if (m == NULL)
- next = drbr_dequeue(ifp, br);
- else if (drbr_needs_enqueue(ifp, br)) {
+ if (m != NULL) {
if ((status = drbr_enqueue(ifp, br, m)) != 0)
return status;
- next = drbr_dequeue(ifp, br);
- } else
- next = m;
-
- while (next != NULL) {
+ }
+ while ((next = drbr_peek(ifp, br)) != NULL) {
if (oce_tx(sc, &next, queue_index)) {
- if (next != NULL) {
+ if (next == NULL) {
+ drbr_advance(ifp, br);
+ } else {
+ drbr_putback(ifp, br, next);
wq->tx_stats.tx_stops ++;
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
- status = drbr_enqueue(ifp, br, next);
}
break;
}
+ drbr_advance(ifp, br);
ifp->if_obytes += next->m_pkthdr.len;
if (next->m_flags & M_MCAST)
ifp->if_omcasts++;
ETHER_BPF_MTAP(ifp, next);
- next = drbr_dequeue(ifp, br);
}
- return status;
+ return 0;
}
@@ -1292,7 +1375,7 @@
m->m_pkthdr.flowid = (rq->queue_index - 1);
else
m->m_pkthdr.flowid = rq->queue_index;
- m->m_flags |= M_FLOWID;
+ M_HASHTYPE_SET(m, M_HASHTYPE_OPAQUE);
#endif
/* This deternies if vlan tag is Valid */
if (oce_cqe_vtp_valid(sc, cqe)) {
@@ -1646,8 +1729,14 @@
#endif
sc->ifp->if_capenable = sc->ifp->if_capabilities;
- sc->ifp->if_baudrate = IF_Gbps(10UL);
+ if_initbaudrate(sc->ifp, IF_Gbps(10));
+#if __FreeBSD_version >= 1000000
+ sc->ifp->if_hw_tsomax = 65536 - (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN);
+ sc->ifp->if_hw_tsomaxsegcount = OCE_MAX_TX_ELEMENTS;
+ sc->ifp->if_hw_tsomaxsegsize = 4096;
+#endif
+
ether_ifattach(sc->ifp, sc->macaddr.mac_addr);
return 0;
@@ -1666,7 +1755,8 @@
sc->vlan_tag[vtag] = 1;
sc->vlans_added++;
- oce_vid_config(sc);
+ if (sc->vlans_added <= (sc->max_vlans + 1))
+ oce_vid_config(sc);
}
@@ -1865,9 +1955,71 @@
/* Is there atleast one eq that needs to be modified? */
if(num)
oce_mbox_eqd_modify_periodic(sc, set_eqd, num);
+}
+static void oce_detect_hw_error(POCE_SOFTC sc)
+{
+
+ uint32_t ue_low = 0, ue_high = 0, ue_low_mask = 0, ue_high_mask = 0;
+ uint32_t sliport_status = 0, sliport_err1 = 0, sliport_err2 = 0;
+ uint32_t i;
+
+ if (sc->hw_error)
+ return;
+
+ if (IS_XE201(sc)) {
+ sliport_status = OCE_READ_REG32(sc, db, SLIPORT_STATUS_OFFSET);
+ if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
+ sliport_err1 = OCE_READ_REG32(sc, db, SLIPORT_ERROR1_OFFSET);
+ sliport_err2 = OCE_READ_REG32(sc, db, SLIPORT_ERROR2_OFFSET);
+ }
+ } else {
+ ue_low = OCE_READ_REG32(sc, devcfg, PCICFG_UE_STATUS_LOW);
+ ue_high = OCE_READ_REG32(sc, devcfg, PCICFG_UE_STATUS_HIGH);
+ ue_low_mask = OCE_READ_REG32(sc, devcfg, PCICFG_UE_STATUS_LOW_MASK);
+ ue_high_mask = OCE_READ_REG32(sc, devcfg, PCICFG_UE_STATUS_HI_MASK);
+
+ ue_low = (ue_low & ~ue_low_mask);
+ ue_high = (ue_high & ~ue_high_mask);
+ }
+
+ /* On certain platforms BE hardware can indicate spurious UEs.
+ * Allow the h/w to stop working completely in case of a real UE.
+ * Hence not setting the hw_error for UE detection.
+ */
+ if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
+ sc->hw_error = TRUE;
+ device_printf(sc->dev, "Error detected in the card\n");
+ }
+
+ if (sliport_status & SLIPORT_STATUS_ERR_MASK) {
+ device_printf(sc->dev,
+ "ERR: sliport status 0x%x\n", sliport_status);
+ device_printf(sc->dev,
+ "ERR: sliport error1 0x%x\n", sliport_err1);
+ device_printf(sc->dev,
+ "ERR: sliport error2 0x%x\n", sliport_err2);
+ }
+
+ if (ue_low) {
+ for (i = 0; ue_low; ue_low >>= 1, i++) {
+ if (ue_low & 1)
+ device_printf(sc->dev, "UE: %s bit set\n",
+ ue_status_low_desc[i]);
+ }
+ }
+
+ if (ue_high) {
+ for (i = 0; ue_high; ue_high >>= 1, i++) {
+ if (ue_high & 1)
+ device_printf(sc->dev, "UE: %s bit set\n",
+ ue_status_hi_desc[i]);
+ }
+ }
+
}
+
static void
oce_local_timer(void *arg)
{
@@ -1874,6 +2026,7 @@
POCE_SOFTC sc = arg;
int i = 0;
+ oce_detect_hw_error(sc);
oce_refresh_nic_stats(sc);
oce_refresh_queue_stats(sc);
oce_mac_addr_set(sc);
@@ -1892,7 +2045,7 @@
/* NOTE : This should only be called holding
* DEVICE_LOCK.
-*/
+ */
static void
oce_if_deactivate(POCE_SOFTC sc)
{
@@ -2001,11 +2154,6 @@
sc->link_status = ASYNC_EVENT_LINK_DOWN;
if_link_state_change(sc->ifp, LINK_STATE_DOWN);
}
-
- /* Update speed */
- sc->link_speed = acqe->u0.s.speed;
- sc->qos_link_speed = (uint32_t) acqe->u0.s.qos_link_speed * 10;
-
}
@@ -2079,10 +2227,16 @@
(sc->function_mode & FNM_UMC_MODE) ||
(sc->function_mode & FNM_VNIC_MODE) ||
(!is_rss_enabled(sc)) ||
- (sc->flags & OCE_FLAGS_BE2)) {
+ IS_BE2(sc)) {
sc->nrqs = 1;
sc->nwqs = 1;
+ } else {
+ sc->nrqs = MIN(OCE_NCPUS, sc->nrssqs) + 1;
+ sc->nwqs = MIN(OCE_NCPUS, sc->nrssqs);
}
+
+ if (IS_BE2(sc) && is_rss_enabled(sc))
+ sc->nrqs = MIN(OCE_NCPUS, sc->nrssqs) + 1;
}
@@ -2096,6 +2250,9 @@
sc->nrqs = 1;
sc->nwqs = 1;
}
+
+ if (IS_BE2(sc))
+ sc->nwqs = 1;
}
static int
@@ -2187,7 +2344,7 @@
max_rss = OCE_MAX_RSS;
if (!IS_BE(sc)) {
- rc = oce_get_func_config(sc);
+ rc = oce_get_profile_config(sc, max_rss);
if (rc) {
sc->nwqs = OCE_MAX_WQ;
sc->nrssqs = max_rss;
@@ -2194,11 +2351,10 @@
sc->nrqs = sc->nrssqs + 1;
}
}
- else {
- rc = oce_get_profile_config(sc);
+ else { /* For BE3 don't rely on fw for determining the resources */
sc->nrssqs = max_rss;
sc->nrqs = sc->nrssqs + 1;
- if (rc)
- sc->nwqs = OCE_MAX_WQ;
+ sc->nwqs = OCE_MAX_WQ;
+ sc->max_vlans = MAX_VLANFILTER_SIZE;
}
}
Modified: trunk/sys/dev/oce/oce_if.h
===================================================================
--- trunk/sys/dev/oce/oce_if.h 2018-05-27 23:27:20 UTC (rev 10084)
+++ trunk/sys/dev/oce/oce_if.h 2018-05-27 23:27:34 UTC (rev 10085)
@@ -37,9 +37,8 @@
* Costa Mesa, CA 92626
*/
+/* $FreeBSD: stable/10/sys/dev/oce/oce_if.h 274043 2014-11-03 12:38:29Z hselasky $ */
-/* $FreeBSD: release/9.2.0/sys/dev/oce/oce_if.h 252905 2013-07-06 23:56:58Z delphij $ */
-
#include <sys/param.h>
#include <sys/endian.h>
#include <sys/module.h>
@@ -89,7 +88,8 @@
#include "oce_hw.h"
-#define COMPONENT_REVISION "4.6.95.0"
+/* OCE device driver module component revision informaiton */
+#define COMPONENT_REVISION "10.0.664.0"
/* OCE devices supported by this driver */
#define PCI_VENDOR_EMULEX 0x10df /* Emulex */
@@ -174,6 +174,7 @@
#define OCE_CAPAB_FLAGS (MBX_RX_IFACE_FLAGS_BROADCAST | \
MBX_RX_IFACE_FLAGS_UNTAGGED | \
MBX_RX_IFACE_FLAGS_PROMISCUOUS | \
+ MBX_RX_IFACE_FLAGS_VLAN_PROMISCUOUS | \
MBX_RX_IFACE_FLAGS_MCAST_PROMISCUOUS | \
MBX_RX_IFACE_FLAGS_RSS | \
MBX_RX_IFACE_FLAGS_PASS_L3L4_ERR)
@@ -758,14 +759,9 @@
};
struct link_status {
- uint8_t physical_port;
- uint8_t mac_duplex;
- uint8_t mac_speed;
- uint8_t mac_fault;
- uint8_t mgmt_mac_duplex;
- uint8_t mgmt_mac_speed;
+ uint8_t phys_port_speed;
+ uint8_t logical_link_status;
uint16_t qos_link_speed;
- uint32_t logical_link_status;
};
@@ -864,7 +860,7 @@
uint32_t if_cap_flags;
uint32_t flow_control;
- uint32_t promisc;
+ uint8_t promisc;
struct oce_aic_obj aic_obj[OCE_MAX_EQ];
@@ -878,9 +874,11 @@
struct oce_drv_stats oce_stats_info;
struct callout timer;
int8_t be3_native;
+ uint8_t hw_error;
uint16_t qnq_debug_event;
uint16_t qnqid;
- uint16_t pvid;
+ uint32_t pvid;
+ uint32_t max_vlans;
} OCE_SOFTC, *POCE_SOFTC;
@@ -1011,7 +1009,7 @@
uint32_t untagged, uint32_t enable_promisc);
int oce_set_flow_control(POCE_SOFTC sc, uint32_t flow_control);
int oce_config_nic_rss(POCE_SOFTC sc, uint32_t if_id, uint16_t enable_rss);
-int oce_rxf_set_promiscuous(POCE_SOFTC sc, uint32_t enable);
+int oce_rxf_set_promiscuous(POCE_SOFTC sc, uint8_t enable);
int oce_set_common_iface_rx_filter(POCE_SOFTC sc, POCE_DMA_MEM sgl);
int oce_get_link_status(POCE_SOFTC sc, struct link_status *link);
int oce_mbox_get_nic_stats_v0(POCE_SOFTC sc, POCE_DMA_MEM pstats_dma_mem);
@@ -1052,7 +1050,7 @@
int oce_mbox_read_transrecv_data(POCE_SOFTC sc, uint32_t page_num);
void oce_mbox_eqd_modify_periodic(POCE_SOFTC sc, struct oce_set_eqd *set_eqd,
int num);
-int oce_get_profile_config(POCE_SOFTC sc);
+int oce_get_profile_config(POCE_SOFTC sc, uint32_t max_rss);
int oce_get_func_config(POCE_SOFTC sc);
void mbx_common_req_hdr_init(struct mbx_hdr *hdr,
uint8_t dom,
@@ -1096,6 +1094,9 @@
#define OCE_ONE_PORT_EXT_LOOPBACK 0x2
#define OCE_NO_LOOPBACK 0xff
+#undef IFM_40G_SR4
+#define IFM_40G_SR4 28
+
#define atomic_inc_32(x) atomic_add_32(x, 1)
#define atomic_dec_32(x) atomic_subtract_32(x, 1)
Modified: trunk/sys/dev/oce/oce_mbox.c
===================================================================
--- trunk/sys/dev/oce/oce_mbox.c 2018-05-27 23:27:20 UTC (rev 10084)
+++ trunk/sys/dev/oce/oce_mbox.c 2018-05-27 23:27:34 UTC (rev 10085)
@@ -37,11 +37,8 @@
* Costa Mesa, CA 92626
*/
+/* $FreeBSD: stable/10/sys/dev/oce/oce_mbox.c 268046 2014-06-30 16:23:31Z delphij $ */
-
-/* $FreeBSD: release/9.2.0/sys/dev/oce/oce_mbox.c 252905 2013-07-06 23:56:58Z delphij $ */
-
-
#include "oce_if.h"
extern uint32_t sfp_vpd_dump_buffer[TRANSCEIVER_DATA_NUM_ELE];
@@ -282,8 +279,10 @@
if (!ret)
ret = fwcmd->hdr.u0.rsp.status;
if (ret) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, ret);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, ret,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
@@ -439,8 +438,10 @@
if (!ret)
ret = fwcmd->hdr.u0.rsp.status;
if (ret) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, ret);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, ret,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
@@ -482,25 +483,27 @@
if (!ret)
ret = fwcmd->hdr.u0.rsp.status;
if (ret) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, ret);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, ret,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
DW_SWAP(u32ptr(fwcmd), sizeof(struct mbx_common_query_fw_config));
- sc->config_number = fwcmd->params.rsp.config_number;
- sc->asic_revision = fwcmd->params.rsp.asic_revision;
- sc->port_id = fwcmd->params.rsp.port_id;
- sc->function_mode = fwcmd->params.rsp.function_mode;
- sc->function_caps = fwcmd->params.rsp.function_caps;
+ sc->config_number = HOST_32(fwcmd->params.rsp.config_number);
+ sc->asic_revision = HOST_32(fwcmd->params.rsp.asic_revision);
+ sc->port_id = HOST_32(fwcmd->params.rsp.port_id);
+ sc->function_mode = HOST_32(fwcmd->params.rsp.function_mode);
+ sc->function_caps = HOST_32(fwcmd->params.rsp.function_caps);
if (fwcmd->params.rsp.ulp[0].ulp_mode & ULP_NIC_MODE) {
- sc->max_tx_rings = fwcmd->params.rsp.ulp[0].nic_wq_tot;
- sc->max_rx_rings = fwcmd->params.rsp.ulp[0].lro_rqid_tot;
+ sc->max_tx_rings = HOST_32(fwcmd->params.rsp.ulp[0].nic_wq_tot);
+ sc->max_rx_rings = HOST_32(fwcmd->params.rsp.ulp[0].lro_rqid_tot);
} else {
- sc->max_tx_rings = fwcmd->params.rsp.ulp[1].nic_wq_tot;
- sc->max_rx_rings = fwcmd->params.rsp.ulp[1].lro_rqid_tot;
+ sc->max_tx_rings = HOST_32(fwcmd->params.rsp.ulp[1].nic_wq_tot);
+ sc->max_rx_rings = HOST_32(fwcmd->params.rsp.ulp[1].lro_rqid_tot);
}
error:
@@ -562,15 +565,17 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
- *if_id = LE_32(fwcmd->params.rsp.if_id);
+ *if_id = HOST_32(fwcmd->params.rsp.if_id);
if (mac_addr != NULL)
- sc->pmac_id = LE_32(fwcmd->params.rsp.pmac_id);
+ sc->pmac_id = HOST_32(fwcmd->params.rsp.pmac_id);
error:
return rc;
}
@@ -608,8 +613,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
}
@@ -631,8 +638,11 @@
{
struct oce_mbx mbx;
struct mbx_common_config_vlan *fwcmd;
- int rc;
+ int rc = 0;
+ if (sc->vlans_added > sc->max_vlans)
+ goto vlan_promisc;
+
bzero(&mbx, sizeof(struct oce_mbx));
fwcmd = (struct mbx_common_config_vlan *)&mbx.payload;
@@ -660,10 +670,20 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
- return 0;
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
+ goto done;
+
+vlan_promisc:
+ /* Enable Vlan Promis */
+ oce_rxf_set_promiscuous(sc, (1 << 1));
+ device_printf(sc->dev,"Enabling Vlan Promisc Mode\n");
+done:
+ return rc;
+
}
/**
@@ -703,8 +723,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
}
@@ -803,8 +825,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
}
return rc;
}
@@ -819,7 +843,7 @@
* This function uses the COMMON_SET_IFACE_RX_FILTER command instead.
*/
int
-oce_rxf_set_promiscuous(POCE_SOFTC sc, uint32_t enable)
+oce_rxf_set_promiscuous(POCE_SOFTC sc, uint8_t enable)
{
struct mbx_set_common_iface_rx_filter *fwcmd;
int sz = sizeof(struct mbx_set_common_iface_rx_filter);
@@ -837,10 +861,13 @@
req = &fwcmd->params.req;
req->iface_flags_mask = MBX_RX_IFACE_FLAGS_PROMISCUOUS |
MBX_RX_IFACE_FLAGS_VLAN_PROMISCUOUS;
- if (enable) {
- req->iface_flags = MBX_RX_IFACE_FLAGS_PROMISCUOUS |
- MBX_RX_IFACE_FLAGS_VLAN_PROMISCUOUS;
- }
+ /* Bit 0 Mac promisc, Bit 1 Vlan promisc */
+ if (enable & 0x01)
+ req->iface_flags = MBX_RX_IFACE_FLAGS_PROMISCUOUS;
+
+ if (enable & 0x02)
+ req->iface_flags = MBX_RX_IFACE_FLAGS_VLAN_PROMISCUOUS;
+
req->if_id = sc->if_id;
rc = oce_set_common_iface_rx_filter(sc, &sgl);
@@ -887,9 +914,11 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
- return 0;
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
+ return rc;
}
/**
@@ -907,7 +936,7 @@
bzero(&mbx, sizeof(struct oce_mbx));
- IS_XE201(sc) ? (version = OCE_MBX_VER_V1) : (version = OCE_MBX_VER_V0);
+ IS_BE2(sc) ? (version = OCE_MBX_VER_V0) : (version = OCE_MBX_VER_V1);
fwcmd = (struct mbx_query_common_link_config *)&mbx.payload;
mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
@@ -926,14 +955,16 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
/* interpret response */
- bcopy(&fwcmd->params.rsp, link, sizeof(struct link_status));
- link->logical_link_status = LE_32(link->logical_link_status);
- link->qos_link_speed = LE_16(link->qos_link_speed);
+ link->qos_link_speed = HOST_16(fwcmd->params.rsp.qos_link_speed);
+ link->phys_port_speed = fwcmd->params.rsp.physical_port_speed;
+ link->logical_link_status = fwcmd->params.rsp.logical_link_status;
error:
return rc;
}
@@ -979,8 +1010,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
}
@@ -1029,8 +1062,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
}
@@ -1081,8 +1116,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
}
@@ -1134,8 +1171,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
}
@@ -1179,8 +1218,10 @@
if (!rc)
rc = req->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ req->hdr.u0.rsp.additional_status);
return rc;
}
@@ -1244,8 +1285,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
*pmac_id = fwcmd->params.rsp.pmac_id;
@@ -1282,8 +1325,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
}
@@ -1319,11 +1364,13 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
- sc->be3_native = fwcmd->params.rsp.capability_flags
+ sc->be3_native = HOST_32(fwcmd->params.rsp.capability_flags)
& CAP_BE3_NATIVE_ERX_API;
error:
@@ -1364,8 +1411,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
@@ -1407,8 +1456,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
}
@@ -1434,9 +1485,9 @@
payload_len,
OCE_MBX_VER_V0);
- fwcmd->flash_op_type = optype;
- fwcmd->flash_op_code = opcode;
- fwcmd->data_buffer_size = num_bytes;
+ fwcmd->flash_op_type = LE_32(optype);
+ fwcmd->flash_op_code = LE_32(opcode);
+ fwcmd->data_buffer_size = LE_32(num_bytes);
mbx.u0.s.embedded = 0; /*Non embeded*/
mbx.payload_length = payload_len;
@@ -1452,8 +1503,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
return rc;
@@ -1498,8 +1551,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
bcopy(fwcmd->data_buffer, flash_crc, 4);
@@ -1533,18 +1588,20 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
- phy_info->phy_type = fwcmd->params.rsp.phy_info.phy_type;
+ phy_info->phy_type = HOST_16(fwcmd->params.rsp.phy_info.phy_type);
phy_info->interface_type =
- fwcmd->params.rsp.phy_info.interface_type;
+ HOST_16(fwcmd->params.rsp.phy_info.interface_type);
phy_info->auto_speeds_supported =
- fwcmd->params.rsp.phy_info.auto_speeds_supported;
+ HOST_16(fwcmd->params.rsp.phy_info.auto_speeds_supported);
phy_info->fixed_speeds_supported =
- fwcmd->params.rsp.phy_info.fixed_speeds_supported;
- phy_info->misc_params =fwcmd->params.rsp.phy_info.misc_params;
+ HOST_16(fwcmd->params.rsp.phy_info.fixed_speeds_supported);
+ phy_info->misc_params = HOST_32(fwcmd->params.rsp.phy_info.misc_params);
error:
return rc;
@@ -1594,11 +1651,13 @@
if (!rc)
rc = fwcmd->params.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->params.rsp.additional_status);
goto error;
}
- *written_data = fwcmd->params.rsp.actual_write_length;
+ *written_data = HOST_32(fwcmd->params.rsp.actual_write_length);
*additional_status = fwcmd->params.rsp.additional_status;
error:
return rc;
@@ -1650,11 +1709,13 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
- rq->rq_id = fwcmd->params.rsp.rq_id;
+ rq->rq_id = HOST_16(fwcmd->params.rsp.rq_id);
rq->rss_cpuid = fwcmd->params.rsp.rss_cpuid;
error:
return rc;
@@ -1674,15 +1735,17 @@
bzero(&mbx, sizeof(struct oce_mbx));
fwcmd = (struct mbx_create_nic_wq *)&mbx.payload;
- if (IS_XE201(sc)) {
+ if (IS_XE201(sc))
version = OCE_MBX_VER_V1;
- fwcmd->params.req.if_id = sc->if_id;
- } else if(IS_BE(sc))
+ else if(IS_BE(sc))
IS_PROFILE_SUPER_NIC(sc) ? (version = OCE_MBX_VER_V2)
: (version = OCE_MBX_VER_V0);
else
version = OCE_MBX_VER_V2;
+ if (version > OCE_MBX_VER_V0)
+ fwcmd->params.req.if_id = sc->if_id;
+
mbx_common_req_hdr_init(&fwcmd->hdr, 0, 0,
MBX_SUBSYSTEM_NIC,
NIC_CREATE_WQ, MBX_TIMEOUT_SEC,
@@ -1704,13 +1767,15 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
- wq->wq_id = LE_16(fwcmd->params.rsp.wq_id);
+ wq->wq_id = HOST_16(fwcmd->params.rsp.wq_id);
if (version == OCE_MBX_VER_V2)
- wq->db_offset = LE_32(fwcmd->params.rsp.db_offset);
+ wq->db_offset = HOST_32(fwcmd->params.rsp.db_offset);
else
wq->db_offset = PD_TXULP_DB;
error:
@@ -1755,11 +1820,13 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
- eq->eq_id = LE_16(fwcmd->params.rsp.eq_id);
+ eq->eq_id = HOST_16(fwcmd->params.rsp.eq_id);
error:
return rc;
}
@@ -1833,11 +1900,13 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
- cq->cq_id = LE_16(fwcmd->params.rsp.cq_id);
+ cq->cq_id = HOST_16(fwcmd->params.rsp.cq_id);
error:
return rc;
@@ -1886,8 +1955,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
if(fwcmd->params.rsp.page_num == PAGE_NUM_A0)
@@ -1948,12 +2019,14 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc)
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
}
int
-oce_get_profile_config(POCE_SOFTC sc)
+oce_get_profile_config(POCE_SOFTC sc, uint32_t max_rss)
{
struct oce_mbx mbx;
struct mbx_common_get_profile_config *fwcmd;
@@ -1978,7 +2051,7 @@
fwcmd = OCE_DMAPTR(&dma, struct mbx_common_get_profile_config);
bzero(fwcmd, sizeof(struct mbx_common_get_profile_config));
- if (IS_BE3(sc))
+ if (!IS_XE201(sc))
version = OCE_MBX_VER_V1;
else
version = OCE_MBX_VER_V0;
@@ -2007,8 +2080,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
@@ -2028,12 +2103,20 @@
goto error;
}
else {
- sc->nwqs = HOST_32(nic_desc->txq_count);
+ sc->max_vlans = HOST_16(nic_desc->vlan_count);
+ sc->nwqs = HOST_16(nic_desc->txq_count);
if (sc->nwqs)
sc->nwqs = MIN(sc->nwqs, OCE_MAX_WQ);
else
sc->nwqs = OCE_MAX_WQ;
+ sc->nrssqs = HOST_16(nic_desc->rssq_count);
+ if (sc->nrssqs)
+ sc->nrssqs = MIN(sc->nrssqs, max_rss);
+ else
+ sc->nrssqs = max_rss;
+ sc->nrqs = sc->nrssqs + 1; /* 1 for def RX */;
+
}
error:
oce_dma_free(sc, &dma);
@@ -2097,8 +2180,10 @@
if (!rc)
rc = fwcmd->hdr.u0.rsp.status;
if (rc) {
- device_printf(sc->dev,"%s failed - cmd status: %d\n",
- __FUNCTION__, rc);
+ device_printf(sc->dev,
+ "%s failed - cmd status: %d addi status: %d\n",
+ __FUNCTION__, rc,
+ fwcmd->hdr.u0.rsp.additional_status);
goto error;
}
@@ -2118,6 +2203,7 @@
goto error;
}
else {
+ sc->max_vlans = nic_desc->vlan_count;
sc->nwqs = HOST_32(nic_desc->txq_count);
if (sc->nwqs)
sc->nwqs = MIN(sc->nwqs, OCE_MAX_WQ);
Modified: trunk/sys/dev/oce/oce_queue.c
===================================================================
--- trunk/sys/dev/oce/oce_queue.c 2018-05-27 23:27:20 UTC (rev 10084)
+++ trunk/sys/dev/oce/oce_queue.c 2018-05-27 23:27:34 UTC (rev 10085)
@@ -37,11 +37,8 @@
* Costa Mesa, CA 92626
*/
+/* $FreeBSD: stable/10/sys/dev/oce/oce_queue.c 257187 2013-10-26 19:02:39Z delphij $ */
-
-/* $FreeBSD: release/9.2.0/sys/dev/oce/oce_queue.c 252905 2013-07-06 23:56:58Z delphij $ */
-
-
#include "oce_if.h"
/*****************************************************
Modified: trunk/sys/dev/oce/oce_sysctl.c
===================================================================
--- trunk/sys/dev/oce/oce_sysctl.c 2018-05-27 23:27:20 UTC (rev 10084)
+++ trunk/sys/dev/oce/oce_sysctl.c 2018-05-27 23:27:34 UTC (rev 10085)
@@ -37,9 +37,8 @@
* Costa Mesa, CA 92626
*/
-/* $FreeBSD: release/9.2.0/sys/dev/oce/oce_sysctl.c 252905 2013-07-06 23:56:58Z delphij $ */
+/* $FreeBSD: stable/10/sys/dev/oce/oce_sysctl.c 273736 2014-10-27 14:38:00Z hselasky $ */
-
#include "oce_if.h"
static void copy_stats_to_sc_xe201(POCE_SOFTC sc);
@@ -46,10 +45,10 @@
static void copy_stats_to_sc_be3(POCE_SOFTC sc);
static void copy_stats_to_sc_be2(POCE_SOFTC sc);
static int oce_sysctl_loopback(SYSCTL_HANDLER_ARGS);
+static int oce_sys_aic_enable(SYSCTL_HANDLER_ARGS);
static int oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
+static int oce_skyhawk_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
static int oce_sys_fwupgrade(SYSCTL_HANDLER_ARGS);
-static int oce_be3_flashdata(POCE_SOFTC sc, const struct firmware
- *fw, int num_imgs);
static int oce_lancer_fwupgrade(POCE_SOFTC sc, const struct firmware *fw);
static int oce_sysctl_sfp_vpd_dump(SYSCTL_HANDLER_ARGS);
static boolean_t oce_phy_flashing_required(POCE_SOFTC sc);
@@ -63,9 +62,18 @@
struct sysctl_ctx_list *ctx,
struct sysctl_oid *stats_node);
+
extern char component_revision[32];
uint32_t sfp_vpd_dump_buffer[TRANSCEIVER_DATA_NUM_ELE];
+struct flash_img_attri {
+ int img_offset;
+ int img_size;
+ int img_type;
+ bool skip_image;
+ int optype;
+};
+
void
oce_add_sysctls(POCE_SOFTC sc)
{
@@ -77,21 +85,21 @@
SYSCTL_ADD_STRING(ctx, child,
OID_AUTO, "component_revision",
- CTLTYPE_INT | CTLFLAG_RD,
- &component_revision,
+ CTLFLAG_RD,
+ component_revision,
sizeof(component_revision),
"EMULEX One-Connect device driver revision");
SYSCTL_ADD_STRING(ctx, child,
OID_AUTO, "firmware_version",
- CTLTYPE_INT | CTLFLAG_RD,
- &sc->fw_version,
+ CTLFLAG_RD,
+ sc->fw_version,
sizeof(sc->fw_version),
"EMULEX One-Connect Firmware Version");
SYSCTL_ADD_INT(ctx, child,
OID_AUTO, "max_rsp_handled",
- CTLTYPE_INT | CTLFLAG_RW,
+ CTLFLAG_RW,
&oce_max_rsp_handled,
sizeof(oce_max_rsp_handled),
"Maximum receive frames handled per interupt");
@@ -125,6 +133,10 @@
CTLTYPE_STRING | CTLFLAG_RW, (void *)sc, 0,
oce_sys_fwupgrade, "A", "Firmware ufi file");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "aic_enable",
+ CTLTYPE_INT | CTLFLAG_RW, (void *)sc, 1,
+ oce_sys_aic_enable, "I", "aic flags");
+
/*
* Dumps Transceiver data
* "sysctl dev.oce.0.sfp_vpd_dump=0"
@@ -155,15 +167,44 @@
{
uint32_t status = 0;
- oce_mbox_cmd_set_loopback(sc, sc->if_id, loopback_type, 1);
- status = oce_mbox_cmd_test_loopback(sc, sc->if_id, loopback_type,
+ oce_mbox_cmd_set_loopback(sc, sc->port_id, loopback_type, 1);
+ status = oce_mbox_cmd_test_loopback(sc, sc->port_id, loopback_type,
1500, 2, 0xabc);
- oce_mbox_cmd_set_loopback(sc, sc->if_id, OCE_NO_LOOPBACK, 1);
+ oce_mbox_cmd_set_loopback(sc, sc->port_id, OCE_NO_LOOPBACK, 1);
return status;
}
static int
+oce_sys_aic_enable(SYSCTL_HANDLER_ARGS)
+{
+ int value = 0;
+ uint32_t status, vector;
+ POCE_SOFTC sc = (struct oce_softc *)arg1;
+ struct oce_aic_obj *aic;
+
+ status = sysctl_handle_int(oidp, &value, 0, req);
+ if (status || !req->newptr)
+ return status;
+
+ for (vector = 0; vector < sc->intr_count; vector++) {
+ aic = &sc->aic_obj[vector];
+
+ if (value == 0){
+ aic->max_eqd = aic->min_eqd = aic->et_eqd = 0;
+ aic->enable = 0;
+ }
+ else {
+ aic->max_eqd = OCE_MAX_EQD;
+ aic->min_eqd = OCE_MIN_EQD;
+ aic->et_eqd = OCE_MIN_EQD;
+ aic->enable = TRUE;
+ }
+ }
+ return 0;
+}
+
+static int
oce_sysctl_loopback(SYSCTL_HANDLER_ARGS)
{
int value = 0;
@@ -224,7 +265,7 @@
return ENOENT;
}
- if (IS_BE(sc) || IS_SH(sc)) {
+ if (IS_BE(sc)) {
if ((sc->flags & OCE_FLAGS_BE2)) {
device_printf(sc->dev,
"Flashing not supported for BE2 yet.\n");
@@ -232,6 +273,8 @@
goto done;
}
status = oce_be3_fwupgrade(sc, fw);
+ } else if (IS_SH(sc)) {
+ status = oce_skyhawk_fwupgrade(sc,fw);
} else
status = oce_lancer_fwupgrade(sc, fw);
done:
@@ -247,53 +290,117 @@
return status;
}
-
-static int
-oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
+static void oce_fill_flash_img_data(POCE_SOFTC sc, const struct flash_sec_info * fsec,
+ struct flash_img_attri *pimg, int i,
+ const struct firmware *fw, int bin_offset)
{
- int rc = 0, num_imgs = 0, i = 0;
- const struct flash_file_hdr *fhdr;
- const struct image_hdr *img_ptr;
-
- fhdr = (const struct flash_file_hdr *)fw->data;
- if (fhdr->build[0] != '3') {
- device_printf(sc->dev, "Invalid BE3 firmware image\n");
- return EINVAL;
+ if (IS_SH(sc)) {
+ pimg->img_offset = HOST_32(fsec->fsec_entry[i].offset);
+ pimg->img_size = HOST_32(fsec->fsec_entry[i].pad_size);
}
- /* Display flash version */
- device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
- num_imgs = fhdr->num_imgs;
- for (i = 0; i < num_imgs; i++) {
- img_ptr = (const struct image_hdr *)((const char *)fw->data +
- sizeof(struct flash_file_hdr) +
- (i * sizeof(struct image_hdr)));
- if (img_ptr->imageid == 1) {
- rc = oce_be3_flashdata(sc, fw, num_imgs);
+ pimg->img_type = HOST_32(fsec->fsec_entry[i].type);
+ pimg->skip_image = FALSE;
+ switch (pimg->img_type) {
+ case IMG_ISCSI:
+ pimg->optype = 0;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 2097152;
+ pimg->img_size = 2097152;
+ }
break;
- }
+ case IMG_REDBOOT:
+ pimg->optype = 1;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 262144;
+ pimg->img_size = 1048576;
+ }
+ if (!oce_img_flashing_required(sc, fw->data,
+ pimg->optype,
+ pimg->img_offset,
+ pimg->img_size,
+ bin_offset))
+ pimg->skip_image = TRUE;
+ break;
+ case IMG_BIOS:
+ pimg->optype = 2;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 12582912;
+ pimg->img_size = 524288;
+ }
+ break;
+ case IMG_PXEBIOS:
+ pimg->optype = 3;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 13107200;;
+ pimg->img_size = 524288;
+ }
+ break;
+ case IMG_FCOEBIOS:
+ pimg->optype = 8;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 13631488;
+ pimg->img_size = 524288;
+ }
+ break;
+ case IMG_ISCSI_BAK:
+ pimg->optype = 9;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 4194304;
+ pimg->img_size = 2097152;
+ }
+ break;
+ case IMG_FCOE:
+ pimg->optype = 10;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 6291456;
+ pimg->img_size = 2097152;
+ }
+ break;
+ case IMG_FCOE_BAK:
+ pimg->optype = 11;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 8388608;
+ pimg->img_size = 2097152;
+ }
+ break;
+ case IMG_NCSI:
+ pimg->optype = 13;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 15990784;
+ pimg->img_size = 262144;
+ }
+ break;
+ case IMG_PHY:
+ pimg->optype = 99;
+ if (IS_BE3(sc)) {
+ pimg->img_offset = 1310720;
+ pimg->img_size = 262144;
+ }
+ if (!oce_phy_flashing_required(sc))
+ pimg->skip_image = TRUE;
+ break;
+ default:
+ pimg->skip_image = TRUE;
+ break;
}
- return rc;
}
-
static int
-oce_be3_flashdata(POCE_SOFTC sc, const struct firmware *fw, int num_imgs)
+oce_sh_be3_flashdata(POCE_SOFTC sc, const struct firmware *fw, int32_t num_imgs)
{
char cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};
const char *p = (const char *)fw->data;
const struct flash_sec_info *fsec = NULL;
struct mbx_common_read_write_flashrom *req;
- int rc = 0, i, img_type, bin_offset = 0;
- boolean_t skip_image;
- uint32_t optype = 0, size = 0, start = 0, num_bytes = 0;
- uint32_t opcode = 0;
+ int rc = 0, i, bin_offset = 0, opcode, num_bytes;
OCE_DMA_MEM dma_mem;
+ struct flash_img_attri imgatt;
/* Validate Cookie */
bin_offset = (sizeof(struct flash_file_hdr) +
- (num_imgs * sizeof(struct image_hdr)));
+ (num_imgs * sizeof(struct image_hdr)));
p += bin_offset;
while (p < ((const char *)fw->data + fw->datasize)) {
fsec = (const struct flash_sec_info *)p;
@@ -305,7 +412,7 @@
if (!fsec) {
device_printf(sc->dev,
- "Invalid Cookie. Firmware image corrupted ?\n");
+ "Invalid Cookie. Firmware image corrupted ?\n");
return EINVAL;
}
@@ -313,94 +420,42 @@
+ 32*1024, &dma_mem, 0);
if (rc) {
device_printf(sc->dev,
- "Memory allocation failure while flashing\n");
+ "Memory allocation failure while flashing\n");
return ENOMEM;
}
req = OCE_DMAPTR(&dma_mem, struct mbx_common_read_write_flashrom);
- for (i = 0; i < MAX_FLASH_COMP; i++) {
+ if (IS_SH(sc))
+ num_imgs = HOST_32(fsec->fsec_hdr.num_images);
+ else if (IS_BE3(sc))
+ num_imgs = MAX_FLASH_COMP;
- img_type = fsec->fsec_entry[i].type;
- skip_image = FALSE;
- switch (img_type) {
- case IMG_ISCSI:
- optype = 0;
- size = 2097152;
- start = 2097152;
- break;
- case IMG_REDBOOT:
- optype = 1;
- size = 1048576;
- start = 262144;
- if (!oce_img_flashing_required(sc, fw->data,
- optype, start, size, bin_offset))
- skip_image = TRUE;
- break;
- case IMG_BIOS:
- optype = 2;
- size = 524288;
- start = 12582912;
- break;
- case IMG_PXEBIOS:
- optype = 3;
- size = 524288;
- start = 13107200;
- break;
- case IMG_FCOEBIOS:
- optype = 8;
- size = 524288;
- start = 13631488;
- break;
- case IMG_ISCSI_BAK:
- optype = 9;
- size = 2097152;
- start = 4194304;
- break;
- case IMG_FCOE:
- optype = 10;
- size = 2097152;
- start = 6291456;
- break;
- case IMG_FCOE_BAK:
- optype = 11;
- size = 2097152;
- start = 8388608;
- break;
- case IMG_NCSI:
- optype = 13;
- size = 262144;
- start = 15990784;
- break;
- case IMG_PHY:
- optype = 99;
- size = 262144;
- start = 1310720;
- if (!oce_phy_flashing_required(sc))
- skip_image = TRUE;
- break;
- default:
- skip_image = TRUE;
- break;
- }
- if (skip_image)
+ for (i = 0; i < num_imgs; i++) {
+
+ bzero(&imgatt, sizeof(struct flash_img_attri));
+
+ oce_fill_flash_img_data(sc, fsec, &imgatt, i, fw, bin_offset);
+
+ if (imgatt.skip_image)
continue;
p = fw->data;
- p = p + bin_offset + start;
- if ((p + size) > ((const char *)fw->data + fw->datasize)) {
+ p = p + bin_offset + imgatt.img_offset;
+
+ if ((p + imgatt.img_size) > ((const char *)fw->data + fw->datasize)) {
rc = 1;
goto ret;
}
- while (size) {
+ while (imgatt.img_size) {
- if (size > 32*1024)
+ if (imgatt.img_size > 32*1024)
num_bytes = 32*1024;
else
- num_bytes = size;
- size -= num_bytes;
+ num_bytes = imgatt.img_size;
+ imgatt.img_size -= num_bytes;
- if (!size)
+ if (!imgatt.img_size)
opcode = FLASHROM_OPER_FLASH;
else
opcode = FLASHROM_OPER_SAVE;
@@ -408,11 +463,11 @@
memcpy(req->data_buffer, p, num_bytes);
p += num_bytes;
- rc = oce_mbox_write_flashrom(sc, optype, opcode,
- &dma_mem, num_bytes);
+ rc = oce_mbox_write_flashrom(sc, imgatt.optype, opcode,
+ &dma_mem, num_bytes);
if (rc) {
device_printf(sc->dev,
- "cmd to write to flash rom failed.\n");
+ "cmd to write to flash rom failed.\n");
rc = EIO;
goto ret;
}
@@ -420,14 +475,124 @@
pause("yield", 10);
}
+
}
+
ret:
oce_dma_free(sc, &dma_mem);
return rc;
+}
+#define UFI_TYPE2 2
+#define UFI_TYPE3 3
+#define UFI_TYPE3R 10
+#define UFI_TYPE4 4
+#define UFI_TYPE4R 11
+static int oce_get_ufi_type(POCE_SOFTC sc,
+ const struct flash_file_hdr *fhdr)
+{
+ if (fhdr == NULL)
+ goto be_get_ufi_exit;
+
+ if (IS_SH(sc) && fhdr->build[0] == '4') {
+ if (fhdr->asic_type_rev >= 0x10)
+ return UFI_TYPE4R;
+ else
+ return UFI_TYPE4;
+ } else if (IS_BE3(sc) && fhdr->build[0] == '3') {
+ if (fhdr->asic_type_rev == 0x10)
+ return UFI_TYPE3R;
+ else
+ return UFI_TYPE3;
+ } else if (IS_BE2(sc) && fhdr->build[0] == '2')
+ return UFI_TYPE2;
+
+be_get_ufi_exit:
+ device_printf(sc->dev,
+ "UFI and Interface are not compatible for flashing\n");
+ return -1;
}
+static int
+oce_skyhawk_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
+{
+ int rc = 0, num_imgs = 0, i = 0, ufi_type;
+ const struct flash_file_hdr *fhdr;
+ const struct image_hdr *img_ptr;
+
+ fhdr = (const struct flash_file_hdr *)fw->data;
+
+ ufi_type = oce_get_ufi_type(sc, fhdr);
+
+ /* Display flash version */
+ device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
+
+ num_imgs = fhdr->num_imgs;
+ for (i = 0; i < num_imgs; i++) {
+ img_ptr = (const struct image_hdr *)((const char *)fw->data +
+ sizeof(struct flash_file_hdr) +
+ (i * sizeof(struct image_hdr)));
+
+ if (img_ptr->imageid != 1)
+ continue;
+
+ switch (ufi_type) {
+ case UFI_TYPE4R:
+ rc = oce_sh_be3_flashdata(sc, fw,
+ num_imgs);
+ break;
+ case UFI_TYPE4:
+ if (sc->asic_revision < 0x10)
+ rc = oce_sh_be3_flashdata(sc, fw,
+ num_imgs);
+ else {
+ rc = -1;
+ device_printf(sc->dev,
+ "Cant load SH A0 UFI on B0\n");
+ }
+ break;
+ default:
+ rc = -1;
+ break;
+
+ }
+ }
+
+ return rc;
+}
+
+static int
+oce_be3_fwupgrade(POCE_SOFTC sc, const struct firmware *fw)
+{
+ int rc = 0, num_imgs = 0, i = 0;
+ const struct flash_file_hdr *fhdr;
+ const struct image_hdr *img_ptr;
+
+ fhdr = (const struct flash_file_hdr *)fw->data;
+ if (fhdr->build[0] != '3') {
+ device_printf(sc->dev, "Invalid BE3 firmware image\n");
+ return EINVAL;
+ }
+ /* Display flash version */
+ device_printf(sc->dev, "Flashing Firmware %s\n", &fhdr->build[2]);
+
+ num_imgs = fhdr->num_imgs;
+ for (i = 0; i < num_imgs; i++) {
+ img_ptr = (const struct image_hdr *)((const char *)fw->data +
+ sizeof(struct flash_file_hdr) +
+ (i * sizeof(struct image_hdr)));
+ if (img_ptr->imageid == 1) {
+ rc = oce_sh_be3_flashdata(sc, fw, num_imgs);
+
+ break;
+ }
+ }
+
+ return rc;
+}
+
+
static boolean_t
oce_phy_flashing_required(POCE_SOFTC sc)
{
@@ -793,11 +958,11 @@
SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "total_rxcp_errs",
CTLFLAG_RD, &stats->rx.t_rxcp_errs, 0,
"Total Receive completion errors");
- SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "pause_frames",
- CTLFLAG_RD, &stats->u0.xe201.rx_pause_frames, 0,
+ SYSCTL_ADD_UQUAD(ctx, rx_stat_list, OID_AUTO, "pause_frames",
+ CTLFLAG_RD, &stats->u0.xe201.rx_pause_frames,
"Pause Frames");
- SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "control_frames",
- CTLFLAG_RD, &stats->u0.xe201.rx_control_frames, 0,
+ SYSCTL_ADD_UQUAD(ctx, rx_stat_list, OID_AUTO, "control_frames",
+ CTLFLAG_RD, &stats->u0.xe201.rx_control_frames,
"Control Frames");
for (i = 0; i < sc->nrqs; i++) {
@@ -837,11 +1002,11 @@
NULL, "Receive Error Stats");
rx_stat_list = SYSCTL_CHILDREN(rx_stats_node);
- SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "crc_errs",
- CTLFLAG_RD, &stats->u0.xe201.rx_crc_errors, 0,
+ SYSCTL_ADD_UQUAD(ctx, rx_stat_list, OID_AUTO, "crc_errs",
+ CTLFLAG_RD, &stats->u0.xe201.rx_crc_errors,
"CRC Errors");
- SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "alignment_errors",
- CTLFLAG_RD, &stats->u0.xe201.rx_alignment_errors, 0,
+ SYSCTL_ADD_UQUAD(ctx, rx_stat_list, OID_AUTO, "alignment_errors",
+ CTLFLAG_RD, &stats->u0.xe201.rx_alignment_errors,
"RX Alignmnet Errors");
SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "in_range_errors",
CTLFLAG_RD, &stats->u0.xe201.rx_in_range_errors, 0,
@@ -849,8 +1014,8 @@
SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "out_range_errors",
CTLFLAG_RD, &stats->u0.xe201.rx_out_of_range_errors, 0,
"Out Range Errors");
- SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "frame_too_long",
- CTLFLAG_RD, &stats->u0.xe201.rx_frames_too_long, 0,
+ SYSCTL_ADD_UQUAD(ctx, rx_stat_list, OID_AUTO, "frame_too_long",
+ CTLFLAG_RD, &stats->u0.xe201.rx_frames_too_long,
"Frame Too Long");
SYSCTL_ADD_UINT(ctx, rx_stat_list, OID_AUTO, "address_match_errors",
CTLFLAG_RD, &stats->u0.xe201.rx_address_match_errors, 0,
@@ -913,11 +1078,11 @@
"total_ipv6_ext_hdr_tx_drop",
CTLFLAG_RD, &stats->tx.t_ipv6_ext_hdr_tx_drop, 0,
"Total Transmit IPV6 Drops");
- SYSCTL_ADD_UINT(ctx, tx_stat_list, OID_AUTO, "pauseframes",
- CTLFLAG_RD, &stats->u0.xe201.tx_pause_frames, 0,
+ SYSCTL_ADD_UQUAD(ctx, tx_stat_list, OID_AUTO, "pauseframes",
+ CTLFLAG_RD, &stats->u0.xe201.tx_pause_frames,
"Pause Frames");
- SYSCTL_ADD_UINT(ctx, tx_stat_list, OID_AUTO, "controlframes",
- CTLFLAG_RD, &stats->u0.xe201.tx_control_frames, 0,
+ SYSCTL_ADD_UQUAD(ctx, tx_stat_list, OID_AUTO, "controlframes",
+ CTLFLAG_RD, &stats->u0.xe201.tx_control_frames,
"Tx Control Frames");
for (i = 0; i < sc->nwqs; i++) {
Modified: trunk/sys/dev/oce/oce_util.c
===================================================================
--- trunk/sys/dev/oce/oce_util.c 2018-05-27 23:27:20 UTC (rev 10084)
+++ trunk/sys/dev/oce/oce_util.c 2018-05-27 23:27:34 UTC (rev 10085)
@@ -37,10 +37,8 @@
* Costa Mesa, CA 92626
*/
+/* $FreeBSD: stable/10/sys/dev/oce/oce_util.c 257187 2013-10-26 19:02:39Z delphij $ */
-/* $FreeBSD: release/9.2.0/sys/dev/oce/oce_util.c 252905 2013-07-06 23:56:58Z delphij $ */
-
-
#include "oce_if.h"
static void oce_dma_map_ring(void *arg,
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