[Midnightbsd-cvs] src [10106] trunk/sys/dev: sync several more drivers with freebsd

laffer1 at midnightbsd.org laffer1 at midnightbsd.org
Sun May 27 19:50:14 EDT 2018


Revision: 10106
          http://svnweb.midnightbsd.org/src/?rev=10106
Author:   laffer1
Date:     2018-05-27 19:50:14 -0400 (Sun, 27 May 2018)
Log Message:
-----------
sync several more drivers with freebsd

Modified Paths:
--------------
    trunk/sys/dev/gem/if_gem.c
    trunk/sys/dev/gem/if_gem_pci.c
    trunk/sys/dev/gem/if_gem_sbus.c
    trunk/sys/dev/gem/if_gemreg.h
    trunk/sys/dev/gem/if_gemvar.h
    trunk/sys/dev/glxsb/glxsb.c
    trunk/sys/dev/glxsb/glxsb.h
    trunk/sys/dev/glxsb/glxsb_hash.c
    trunk/sys/dev/gpio/gpio_if.m
    trunk/sys/dev/gpio/gpiobus.c
    trunk/sys/dev/gpio/gpiobus_if.m
    trunk/sys/dev/gpio/gpiobusvar.h
    trunk/sys/dev/gpio/gpioc.c
    trunk/sys/dev/gpio/gpioiic.c
    trunk/sys/dev/gpio/gpioled.c
    trunk/sys/dev/hatm/if_hatm.c
    trunk/sys/dev/hatm/if_hatm_intr.c
    trunk/sys/dev/hatm/if_hatm_ioctl.c
    trunk/sys/dev/hatm/if_hatm_rx.c
    trunk/sys/dev/hatm/if_hatm_tx.c
    trunk/sys/dev/hatm/if_hatmconf.h
    trunk/sys/dev/hatm/if_hatmreg.h
    trunk/sys/dev/hatm/if_hatmvar.h
    trunk/sys/dev/hme/if_hme.c
    trunk/sys/dev/hme/if_hme_pci.c
    trunk/sys/dev/hme/if_hme_sbus.c
    trunk/sys/dev/hme/if_hmereg.h
    trunk/sys/dev/hme/if_hmevar.h

Added Paths:
-----------
    trunk/sys/dev/gpio/ofw_gpiobus.c
    trunk/sys/dev/hptnr/
    trunk/sys/dev/hptnr/README
    trunk/sys/dev/hptnr/amd64-elf.hptnr_lib.o.uu
    trunk/sys/dev/hptnr/array.h
    trunk/sys/dev/hptnr/him.h
    trunk/sys/dev/hptnr/himfuncs.h
    trunk/sys/dev/hptnr/hptintf.h
    trunk/sys/dev/hptnr/hptnr_config.c
    trunk/sys/dev/hptnr/hptnr_config.h
    trunk/sys/dev/hptnr/hptnr_os_bsd.c
    trunk/sys/dev/hptnr/hptnr_osm_bsd.c
    trunk/sys/dev/hptnr/i386-elf.hptnr_lib.o.uu
    trunk/sys/dev/hptnr/ldm.h
    trunk/sys/dev/hptnr/list.h
    trunk/sys/dev/hptnr/os_bsd.h
    trunk/sys/dev/hptnr/osm.h
    trunk/sys/dev/hptnr/wj.h

Property Changed:
----------------
    trunk/sys/dev/gpio/gpio_if.m
    trunk/sys/dev/gpio/gpiobus_if.m

Modified: trunk/sys/dev/gem/if_gem.c
===================================================================
--- trunk/sys/dev/gem/if_gem.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gem/if_gem.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (C) 2001 Eduardo Horvath.
  * Copyright (c) 2001-2003 Thomas Moestl
@@ -29,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/gem/if_gem.c 243857 2012-12-04 09:32:43Z glebius $");
 
 /*
  * Driver for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers

Modified: trunk/sys/dev/gem/if_gem_pci.c
===================================================================
--- trunk/sys/dev/gem/if_gem_pci.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gem/if_gem_pci.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (C) 2001 Eduardo Horvath.
  * Copyright (c) 2007 Marius Strobl <marius at FreeBSD.org>
@@ -29,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/gem/if_gem_pci.c 242625 2012-11-05 19:16:27Z dim $");
 
 /*
  * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers

Modified: trunk/sys/dev/gem/if_gem_sbus.c
===================================================================
--- trunk/sys/dev/gem/if_gem_sbus.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gem/if_gem_sbus.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (C) 2001 Eduardo Horvath.
  * Copyright (c) 2007 Marius Strobl <marius at FreeBSD.org>
@@ -29,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/gem/if_gem_sbus.c 227843 2011-11-22 21:28:20Z marius $");
 
 /*
  * SBus bindings for Sun GEM Ethernet controllers

Modified: trunk/sys/dev/gem/if_gemreg.h
===================================================================
--- trunk/sys/dev/gem/if_gemreg.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gem/if_gemreg.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (C) 2001 Eduardo Horvath.
  * All rights reserved.
@@ -26,7 +27,7 @@
  *
  *	from: NetBSD: gemreg.h,v 1.9 2006/11/24 13:01:07 martin Exp
  *
- * $FreeBSD$
+ * $FreeBSD: stable/10/sys/dev/gem/if_gemreg.h 223944 2011-07-12 08:20:15Z marius $
  */
 
 #ifndef	_IF_GEMREG_H

Modified: trunk/sys/dev/gem/if_gemvar.h
===================================================================
--- trunk/sys/dev/gem/if_gemvar.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gem/if_gemvar.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (C) 2001 Eduardo Horvath.
  * All rights reserved.
@@ -25,7 +26,7 @@
  *
  *	from: NetBSD: gemvar.h,v 1.8 2002/05/15 02:36:12 matt Exp
  *
- * $FreeBSD$
+ * $FreeBSD: stable/10/sys/dev/gem/if_gemvar.h 223648 2011-06-28 16:16:43Z marius $
  */
 
 #ifndef	_IF_GEMVAR_H

Modified: trunk/sys/dev/glxsb/glxsb.c
===================================================================
--- trunk/sys/dev/glxsb/glxsb.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/glxsb/glxsb.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /* $OpenBSD: glxsb.c,v 1.7 2007/02/12 14:31:45 tom Exp $ */
 
 /*
@@ -24,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/glxsb/glxsb.c 314667 2017-03-04 13:03:31Z avg $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -331,7 +332,7 @@
 		sc->sc_rnghz = hz / 100;
 	else
 		sc->sc_rnghz = 1;
-	callout_init(&sc->sc_rngco, CALLOUT_MPSAFE);
+	callout_init(&sc->sc_rngco, 1);
 	glxsb_rnd(sc);
 
 	return (0);
@@ -476,7 +477,7 @@
 	if (status & SB_RNS_TRNG_VALID) {
 		value = bus_read_4(sc->sc_sr, SB_RANDOM_NUM);
 		/* feed with one uint32 */
-		random_harvest(&value, 4, 32, 0, RANDOM_PURE);
+		random_harvest(&value, 4, 32/2, RANDOM_PURE_GLXSB);
 	}
 
 	callout_reset(&sc->sc_rngco, sc->sc_rnghz, glxsb_rnd, sc);

Modified: trunk/sys/dev/glxsb/glxsb.h
===================================================================
--- trunk/sys/dev/glxsb/glxsb.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/glxsb/glxsb.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2005-2006 Pawel Jakub Dawidek <pjd at FreeBSD.org>
  * All rights reserved.
@@ -23,7 +24,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/glxsb/glxsb.h 181467 2008-08-09 14:52:31Z philip $
  */
 
 #ifndef _GLXSB_H_

Modified: trunk/sys/dev/glxsb/glxsb_hash.c
===================================================================
--- trunk/sys/dev/glxsb/glxsb_hash.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/glxsb/glxsb_hash.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2006 Pawel Jakub Dawidek <pjd at FreeBSD.org>
  * All rights reserved.
@@ -25,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/glxsb/glxsb_hash.c 181593 2008-08-11 08:41:08Z pjd $");
 
 #include <sys/param.h>
 #include <sys/systm.h>

Modified: trunk/sys/dev/gpio/gpio_if.m
===================================================================
--- trunk/sys/dev/gpio/gpio_if.m	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gpio/gpio_if.m	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 #-
 # Copyright (c) 2009 Oleksandr Tymoshenko <gonzo at freebsd.org>
 # All rights reserved.
@@ -23,7 +24,7 @@
 # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 # SUCH DAMAGE.
 #
-# $MidnightBSD$
+# $FreeBSD: stable/10/sys/dev/gpio/gpio_if.m 278786 2015-02-14 21:16:19Z loos $
 #
 
 #include <sys/bus.h>
@@ -31,12 +32,36 @@
 
 INTERFACE gpio;
 
+CODE {
+	static int
+	gpio_default_map_gpios(device_t bus, phandle_t dev,
+	    phandle_t gparent, int gcells, pcell_t *gpios, uint32_t *pin,
+	    uint32_t *flags)
+	{
+		/* Propagate up the bus hierarchy until someone handles it. */  
+		if (device_get_parent(bus) != NULL)
+			return (GPIO_MAP_GPIOS(device_get_parent(bus), dev,
+			    gparent, gcells, gpios, pin, flags));
+
+		/* If that fails, then assume the FreeBSD defaults. */
+		*pin = gpios[0];
+		if (gcells == 2 || gcells == 3)
+			*flags = gpios[gcells - 1];
+
+		return (0);
+	}
+};
+
+HEADER {
+	#include <dev/ofw/openfirm.h>
+};
+
 #
-# Get total number of pins
+# Get maximum pin number
 #
 METHOD int pin_max {
 	device_t dev;
-	int *npins;
+	int *maxpin;
 };
 
 #
@@ -100,3 +125,16 @@
 	uint32_t pin_num;
 	uint32_t flags;
 };
+
+#
+# Allow the GPIO controller to map the gpio-specifier on its own.
+#
+METHOD int map_gpios {
+        device_t bus;
+        phandle_t dev;
+        phandle_t gparent;
+        int gcells;
+        pcell_t *gpios;
+        uint32_t *pin;
+        uint32_t *flags;
+} DEFAULT gpio_default_map_gpios;


Property changes on: trunk/sys/dev/gpio/gpio_if.m
___________________________________________________________________
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Modified: trunk/sys/dev/gpio/gpiobus.c
===================================================================
--- trunk/sys/dev/gpio/gpiobus.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gpio/gpiobus.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2009 Oleksandr Tymoshenko <gonzo at freebsd.org>
  * All rights reserved.
@@ -25,28 +26,28 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/gpio/gpiobus.c 278786 2015-02-14 21:16:19Z loos $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/gpio.h>
+#include <sys/kernel.h>
 #include <sys/malloc.h>
 #include <sys/module.h>
-#include <sys/kernel.h>
-#include <sys/queue.h>
-#include <sys/sysctl.h>
-#include <sys/types.h>
 
-#include <sys/bus.h>
-#include <machine/bus.h>
-#include <sys/rman.h>
-#include <machine/resource.h>
+#include <dev/gpio/gpiobusvar.h>
 
-#include <sys/gpio.h>
-#include <dev/gpio/gpiobusvar.h>
-#include "gpio_if.h"
 #include "gpiobus_if.h"
 
-static void gpiobus_print_pins(struct gpiobus_ivar *);
+#undef GPIOBUS_DEBUG
+#ifdef GPIOBUS_DEBUG
+#define	dprintf printf
+#else
+#define	dprintf(x, arg...)
+#endif
+
+static void gpiobus_print_pins(struct gpiobus_ivar *, char *, size_t);
 static int gpiobus_parse_pins(struct gpiobus_softc *, device_t, int);
 static int gpiobus_probe(device_t);
 static int gpiobus_attach(device_t);
@@ -62,9 +63,7 @@
 /*
  * GPIOBUS interface
  */
-static void gpiobus_lock_bus(device_t);
-static void gpiobus_unlock_bus(device_t);
-static void gpiobus_acquire_bus(device_t, device_t);
+static int gpiobus_acquire_bus(device_t, device_t, int);
 static void gpiobus_release_bus(device_t, device_t);
 static int gpiobus_pin_setflags(device_t, device_t, uint32_t, uint32_t);
 static int gpiobus_pin_getflags(device_t, device_t, uint32_t, uint32_t*);
@@ -73,21 +72,28 @@
 static int gpiobus_pin_get(device_t, device_t, uint32_t, unsigned int*);
 static int gpiobus_pin_toggle(device_t, device_t, uint32_t);
 
-#define	GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
-#define	GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
-#define	GPIOBUS_LOCK_INIT(_sc) \
-	mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \
-	    "gpiobus", MTX_DEF)
-#define	GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
-#define	GPIOBUS_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
-#define	GPIOBUS_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
+int
+gpio_check_flags(uint32_t caps, uint32_t flags)
+{
 
+	/* Check for unwanted flags. */
+	if ((flags & caps) == 0 || (flags & caps) != flags)
+		return (EINVAL);
+	/* Cannot mix input/output together. */
+	if (flags & GPIO_PIN_INPUT && flags & GPIO_PIN_OUTPUT)
+		return (EINVAL);
+	/* Cannot mix pull-up/pull-down together. */
+	if (flags & GPIO_PIN_PULLUP && flags & GPIO_PIN_PULLDOWN)
+		return (EINVAL);
 
+	return (0);
+}
+
 static void
-gpiobus_print_pins(struct gpiobus_ivar *devi)
+gpiobus_print_pins(struct gpiobus_ivar *devi, char *buf, size_t buflen)
 {
-	int range_start, range_stop, need_coma;
-	int i;
+	char tmp[128];
+	int i, range_start, range_stop, need_coma;
 
 	if (devi->npins == 0)
 		return;
@@ -97,11 +103,15 @@
 	for (i = 1; i < devi->npins; i++) {
 		if (devi->pins[i] != (range_stop + 1)) {
 			if (need_coma)
-				printf(",");
+				strlcat(buf, ",", buflen);
+			memset(tmp, 0, sizeof(tmp));
 			if (range_start != range_stop)
-				printf("%d-%d", range_start, range_stop);
+				snprintf(tmp, sizeof(tmp) - 1, "%d-%d",
+				    range_start, range_stop);
 			else
-				printf("%d", range_start);
+				snprintf(tmp, sizeof(tmp) - 1, "%d",
+				    range_start);
+			strlcat(buf, tmp, buflen);
 
 			range_start = range_stop = devi->pins[i];
 			need_coma = 1;
@@ -111,13 +121,50 @@
 	}
 
 	if (need_coma)
-		printf(",");
+		strlcat(buf, ",", buflen);
+	memset(tmp, 0, sizeof(tmp));
 	if (range_start != range_stop)
-		printf("%d-%d", range_start, range_stop);
+		snprintf(tmp, sizeof(tmp) - 1, "%d-%d",
+		    range_start, range_stop);
 	else
-		printf("%d", range_start);
+		snprintf(tmp, sizeof(tmp) - 1, "%d",
+		    range_start);
+	strlcat(buf, tmp, buflen);
 }
 
+int
+gpiobus_init_softc(device_t dev)
+{
+	struct gpiobus_softc *sc;
+
+	sc = GPIOBUS_SOFTC(dev);
+	sc->sc_busdev = dev;
+	sc->sc_dev = device_get_parent(dev);
+	sc->sc_intr_rman.rm_type = RMAN_ARRAY;
+	sc->sc_intr_rman.rm_descr = "GPIO Interrupts";
+	if (rman_init(&sc->sc_intr_rman) != 0 ||
+	    rman_manage_region(&sc->sc_intr_rman, 0, ~0) != 0)
+		panic("%s: failed to set up rman.", __func__);
+
+	if (GPIO_PIN_MAX(sc->sc_dev, &sc->sc_npins) != 0)
+		return (ENXIO);
+
+	KASSERT(sc->sc_npins != 0, ("GPIO device with no pins"));
+
+	/* Pins = GPIO_PIN_MAX() + 1 */
+	sc->sc_npins++;
+
+	sc->sc_pins_mapped = malloc(sizeof(int) * sc->sc_npins, M_DEVBUF, 
+	    M_NOWAIT | M_ZERO);
+	if (sc->sc_pins_mapped == NULL)
+		return (ENOMEM);
+
+	/* Initialize the bus lock. */
+	GPIOBUS_LOCK_INIT(sc);
+
+	return (0);
+}
+
 static int
 gpiobus_parse_pins(struct gpiobus_softc *sc, device_t child, int mask)
 {
@@ -131,7 +178,7 @@
 	}
 
 	if (npins == 0) {
-		device_printf(child, "empty pin mask");
+		device_printf(child, "empty pin mask\n");
 		return (EINVAL);
 	}
 
@@ -151,6 +198,7 @@
 		if (i >= sc->sc_npins) {
 			device_printf(child, 
 			    "invalid pin %d, max: %d\n", i, sc->sc_npins - 1);
+			free(devi->pins, M_DEVBUF);
 			return (EINVAL);
 		}
 
@@ -161,6 +209,7 @@
 		if (sc->sc_pins_mapped[i]) {
 			device_printf(child, 
 			    "warning: pin %d is already mapped\n", i);
+			free(devi->pins, M_DEVBUF);
 			return (EINVAL);
 		}
 		sc->sc_pins_mapped[i] = 1;
@@ -173,41 +222,25 @@
 gpiobus_probe(device_t dev)
 {
 	device_set_desc(dev, "GPIO bus");
-	return (0);
+
+	return (BUS_PROBE_GENERIC);
 }
 
 static int
 gpiobus_attach(device_t dev)
 {
-	struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev);
-	int res;
+	int err;
 
-	sc->sc_busdev = dev;
-	sc->sc_dev = device_get_parent(dev);
-	res = GPIO_PIN_MAX(sc->sc_dev, &sc->sc_npins);
-	if (res)
-		return (ENXIO);
+	err = gpiobus_init_softc(dev);
+	if (err != 0)
+		return (err);
 
 	/*
-	 * Increase to get number of pins
-	 */
-	sc->sc_npins++;
-
-	KASSERT(sc->sc_npins != 0, ("GPIO device with no pins"));
-
-	sc->sc_pins_mapped = malloc(sizeof(int) * sc->sc_npins, M_DEVBUF, 
-	    M_NOWAIT | M_ZERO);
-
-	if (!sc->sc_pins_mapped)
-		return (ENOMEM);
-
-	/* init bus lock */
-	GPIOBUS_LOCK_INIT(sc);
-
-	/*
 	 * Get parent's pins and mark them as unmapped
 	 */
+	bus_generic_probe(dev);
 	bus_enumerate_hinted_children(dev);
+
 	return (bus_generic_attach(dev));
 }
 
@@ -218,9 +251,12 @@
 static int
 gpiobus_detach(device_t dev)
 {
-	struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev);
-	int err;
+	struct gpiobus_softc *sc;
+	struct gpiobus_ivar *devi;
+	device_t *devlist;
+	int i, err, ndevs;
 
+	sc = GPIOBUS_SOFTC(dev);
 	KASSERT(mtx_initialized(&sc->sc_mtx),
 	    ("gpiobus mutex not initialized"));
 	GPIOBUS_LOCK_DESTROY(sc);
@@ -228,8 +264,17 @@
 	if ((err = bus_generic_detach(dev)) != 0)
 		return (err);
 
-	/* detach and delete all children */
-	device_delete_children(dev);
+	if ((err = device_get_children(dev, &devlist, &ndevs)) != 0)
+		return (err);
+	for (i = 0; i < ndevs; i++) {
+		device_delete_child(dev, devlist[i]);
+		devi = GPIOBUS_IVAR(devlist[i]);
+		if (devi->pins) {
+			free(devi->pins, M_DEVBUF);
+			devi->pins = NULL;
+		}
+	}
+	free(devlist, M_TEMP);
 
 	if (sc->sc_pins_mapped) {
 		free(sc->sc_pins_mapped, M_DEVBUF);
@@ -256,12 +301,17 @@
 static int
 gpiobus_print_child(device_t dev, device_t child)
 {
-	struct gpiobus_ivar *devi = GPIOBUS_IVAR(child);
+	char pins[128];
 	int retval = 0;
+	struct gpiobus_ivar *devi;
 
+	devi = GPIOBUS_IVAR(child);
+	memset(pins, 0, sizeof(pins));
 	retval += bus_print_child_header(dev, child);
 	retval += printf(" at pin(s) ");
-	gpiobus_print_pins(devi);
+	gpiobus_print_pins(devi, pins, sizeof(pins));
+	retval += printf("%s", pins);
+	resource_list_print_type(&devi->rl, "irq", SYS_RES_IRQ, "%ld");
 	retval += bus_print_child_footer(dev, child);
 
 	return (retval);
@@ -271,9 +321,12 @@
 gpiobus_child_location_str(device_t bus, device_t child, char *buf,
     size_t buflen)
 {
-	// struct gpiobus_ivar *devi = GPIOBUS_IVAR(child);
+	struct gpiobus_ivar *devi;
 
-	snprintf(buf, buflen, "pins=?");
+	devi = GPIOBUS_IVAR(child);
+	strlcpy(buf, "pin(s)=", buflen);
+	gpiobus_print_pins(devi, buf, buflen);
+
 	return (0);
 }
 
@@ -300,7 +353,9 @@
 		device_delete_child(dev, child);
 		return (0);
 	}
+	resource_list_init(&devi->rl);
 	device_set_ivars(child, devi);
+
 	return (child);
 }
 
@@ -310,47 +365,125 @@
 	struct gpiobus_softc *sc = GPIOBUS_SOFTC(bus);
 	struct gpiobus_ivar *devi;
 	device_t child;
-	int pins;
+	int irq, pins;
 
-
 	child = BUS_ADD_CHILD(bus, 0, dname, dunit);
 	devi = GPIOBUS_IVAR(child);
 	resource_int_value(dname, dunit, "pins", &pins);
 	if (gpiobus_parse_pins(sc, child, pins))
 		device_delete_child(bus, child);
+	if (resource_int_value(dname, dunit, "irq", &irq) == 0) {
+		if (bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1) != 0)
+			device_printf(bus,
+			    "warning: bus_set_resource() failed\n");
+	}
 }
 
-static void
-gpiobus_lock_bus(device_t busdev)
+static int
+gpiobus_set_resource(device_t dev, device_t child, int type, int rid,
+    u_long start, u_long count)
 {
-	struct gpiobus_softc *sc;
+	struct gpiobus_ivar *devi;
+	struct resource_list_entry *rle;
 
-	sc = device_get_softc(busdev);
-	GPIOBUS_ASSERT_UNLOCKED(sc);
-	GPIOBUS_LOCK(sc);
+	dprintf("%s: entry (%p, %p, %d, %d, %p, %ld)\n",
+	    __func__, dev, child, type, rid, (void *)(intptr_t)start, count);
+	devi = GPIOBUS_IVAR(child);
+	rle = resource_list_add(&devi->rl, type, rid, start,
+	    start + count - 1, count);
+	if (rle == NULL)
+		return (ENXIO);
+
+	return (0);
 }
 
-static void
-gpiobus_unlock_bus(device_t busdev)
+static struct resource *
+gpiobus_alloc_resource(device_t bus, device_t child, int type, int *rid,
+    u_long start, u_long end, u_long count, u_int flags)
 {
 	struct gpiobus_softc *sc;
+	struct resource *rv;
+	struct resource_list *rl;
+	struct resource_list_entry *rle;
+	int isdefault;
 
-	sc = device_get_softc(busdev);
-	GPIOBUS_ASSERT_LOCKED(sc);
-	GPIOBUS_UNLOCK(sc);
+	if (type != SYS_RES_IRQ)
+		return (NULL);
+	isdefault = (start == 0UL && end == ~0UL && count == 1);
+	rle = NULL;
+	if (isdefault) {
+		rl = BUS_GET_RESOURCE_LIST(bus, child);
+		if (rl == NULL)
+			return (NULL);
+		rle = resource_list_find(rl, type, *rid);
+		if (rle == NULL)
+			return (NULL);
+		if (rle->res != NULL)
+			panic("%s: resource entry is busy", __func__);
+		start = rle->start;
+		count = rle->count;
+		end = rle->end;
+	}
+	sc = device_get_softc(bus);
+	rv = rman_reserve_resource(&sc->sc_intr_rman, start, end, count, flags,
+	    child);
+	if (rv == NULL)
+		return (NULL);
+	rman_set_rid(rv, *rid);
+	if ((flags & RF_ACTIVE) != 0 &&
+	    bus_activate_resource(child, type, *rid, rv) != 0) {
+		rman_release_resource(rv);
+		return (NULL);
+	}
+
+	return (rv);
 }
 
-static void
-gpiobus_acquire_bus(device_t busdev, device_t child)
+static int
+gpiobus_release_resource(device_t bus __unused, device_t child, int type,
+    int rid, struct resource *r)
 {
+	int error;
+
+	if (rman_get_flags(r) & RF_ACTIVE) {
+		error = bus_deactivate_resource(child, type, rid, r);
+		if (error)
+			return (error);
+	}
+
+	return (rman_release_resource(r));
+}
+
+static struct resource_list *
+gpiobus_get_resource_list(device_t bus __unused, device_t child)
+{
+	struct gpiobus_ivar *ivar;
+
+	ivar = GPIOBUS_IVAR(child);
+
+	return (&ivar->rl);
+}
+
+static int
+gpiobus_acquire_bus(device_t busdev, device_t child, int how)
+{
 	struct gpiobus_softc *sc;
 
 	sc = device_get_softc(busdev);
-	GPIOBUS_ASSERT_LOCKED(sc);
+	GPIOBUS_ASSERT_UNLOCKED(sc);
+	GPIOBUS_LOCK(sc);
+	if (sc->sc_owner != NULL) {
+		if (how == GPIOBUS_DONTWAIT) {
+			GPIOBUS_UNLOCK(sc);
+			return (EWOULDBLOCK);
+		}
+		while (sc->sc_owner != NULL)
+			mtx_sleep(sc, &sc->sc_mtx, 0, "gpiobuswait", 0);
+	}
+	sc->sc_owner = child;
+	GPIOBUS_UNLOCK(sc);
 
-	if (sc->sc_owner)
-		panic("rb_cpldbus: cannot serialize the access to device.");
-	sc->sc_owner = child;
+	return (0);
 }
 
 static void
@@ -359,14 +492,15 @@
 	struct gpiobus_softc *sc;
 
 	sc = device_get_softc(busdev);
-	GPIOBUS_ASSERT_LOCKED(sc);
-
-	if (!sc->sc_owner)
-		panic("rb_cpldbus: releasing unowned bus.");
+	GPIOBUS_ASSERT_UNLOCKED(sc);
+	GPIOBUS_LOCK(sc);
+	if (sc->sc_owner == NULL)
+		panic("gpiobus: releasing unowned bus.");
 	if (sc->sc_owner != child)
-		panic("rb_cpldbus: you don't own the bus. game over.");
-
+		panic("gpiobus: you don't own the bus. game over.");
 	sc->sc_owner = NULL;
+	wakeup(sc);
+	GPIOBUS_UNLOCK(sc);
 }
 
 static int
@@ -375,11 +509,16 @@
 {
 	struct gpiobus_softc *sc = GPIOBUS_SOFTC(dev);
 	struct gpiobus_ivar *devi = GPIOBUS_IVAR(child);
+	uint32_t caps;
 
 	if (pin >= devi->npins)
 		return (EINVAL);
+	if (GPIO_PIN_GETCAPS(sc->sc_dev, devi->pins[pin], &caps) != 0)
+		return (EINVAL);
+	if (gpio_check_flags(caps, flags) != 0)
+		return (EINVAL);
 
-	return GPIO_PIN_SETFLAGS(sc->sc_dev, devi->pins[pin], flags);
+	return (GPIO_PIN_SETFLAGS(sc->sc_dev, devi->pins[pin], flags));
 }
 
 static int
@@ -456,6 +595,15 @@
 	DEVMETHOD(device_resume,	gpiobus_resume),
 
 	/* Bus interface */
+	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
+	DEVMETHOD(bus_config_intr,	bus_generic_config_intr),
+	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
+	DEVMETHOD(bus_set_resource,	gpiobus_set_resource),
+	DEVMETHOD(bus_alloc_resource,	gpiobus_alloc_resource),
+	DEVMETHOD(bus_release_resource,	gpiobus_release_resource),
+	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
+	DEVMETHOD(bus_deactivate_resource,	bus_generic_deactivate_resource),
+	DEVMETHOD(bus_get_resource_list,	gpiobus_get_resource_list),
 	DEVMETHOD(bus_add_child,	gpiobus_add_child),
 	DEVMETHOD(bus_print_child,	gpiobus_print_child),
 	DEVMETHOD(bus_child_pnpinfo_str, gpiobus_child_pnpinfo_str),
@@ -463,8 +611,6 @@
 	DEVMETHOD(bus_hinted_child,	gpiobus_hinted_child),
 
 	/* GPIO protocol */
-	DEVMETHOD(gpiobus_lock_bus,	gpiobus_lock_bus),
-	DEVMETHOD(gpiobus_unlock_bus,	gpiobus_unlock_bus),
 	DEVMETHOD(gpiobus_acquire_bus,	gpiobus_acquire_bus),
 	DEVMETHOD(gpiobus_release_bus,	gpiobus_release_bus),
 	DEVMETHOD(gpiobus_pin_getflags,	gpiobus_pin_getflags),

Modified: trunk/sys/dev/gpio/gpiobus_if.m
===================================================================
--- trunk/sys/dev/gpio/gpiobus_if.m	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gpio/gpiobus_if.m	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 #-
 # Copyright (c) 2009 Oleksandr Tymoshenko <gonzo at freebsd.org>
 # All rights reserved.
@@ -23,7 +24,7 @@
 # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 # SUCH DAMAGE.
 #
-# $MidnightBSD$
+# $FreeBSD: stable/10/sys/dev/gpio/gpiobus_if.m 278783 2015-02-14 20:50:38Z loos $
 #
 
 #include <sys/bus.h>
@@ -32,25 +33,12 @@
 INTERFACE gpiobus;
 
 #
-# Lock the gpio bus
-#
-METHOD void lock_bus {
-	device_t busdev;
-};
-
-#
-# Unlock the gpio bus
-#
-METHOD void unlock_bus {
-	device_t busdev;
-};
-
-#
 # Dedicate the gpio bus control for a child
 #
-METHOD void acquire_bus {
+METHOD int acquire_bus {
 	device_t busdev;
 	device_t dev;
+	int how;
 };
 
 #


Property changes on: trunk/sys/dev/gpio/gpiobus_if.m
___________________________________________________________________
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Modified: trunk/sys/dev/gpio/gpiobusvar.h
===================================================================
--- trunk/sys/dev/gpio/gpiobusvar.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gpio/gpiobusvar.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2009 Oleksandr Tymoshenko <gonzo at freebsd.org>
  * All rights reserved.
@@ -23,7 +24,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/gpio/gpiobusvar.h 278786 2015-02-14 21:16:19Z loos $
  *
  */
 
@@ -30,16 +31,40 @@
 #ifndef	__GPIOBUS_H__
 #define	__GPIOBUS_H__
 
-#include <sys/param.h>
+#include "opt_platform.h"
+
 #include <sys/lock.h>
 #include <sys/mutex.h>
+#include <sys/rman.h>
 
-#define GPIOBUS_IVAR(d) (struct gpiobus_ivar *) device_get_ivars(d)
-#define GPIOBUS_SOFTC(d) (struct gpiobus_softc *) device_get_softc(d)
+#ifdef FDT
+#include <dev/ofw/ofw_bus_subr.h>
+#endif
 
+#include "gpio_if.h"
+
+#ifdef FDT
+#define	GPIOBUS_IVAR(d) (struct gpiobus_ivar *)				\
+	&((struct ofw_gpiobus_devinfo *)device_get_ivars(d))->opd_dinfo
+#else
+#define	GPIOBUS_IVAR(d) (struct gpiobus_ivar *) device_get_ivars(d)
+#endif
+#define	GPIOBUS_SOFTC(d) (struct gpiobus_softc *) device_get_softc(d)
+#define	GPIOBUS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
+#define	GPIOBUS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
+#define	GPIOBUS_LOCK_INIT(_sc) mtx_init(&_sc->sc_mtx,			\
+	    device_get_nameunit(_sc->sc_dev), "gpiobus", MTX_DEF)
+#define	GPIOBUS_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx)
+#define	GPIOBUS_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
+#define	GPIOBUS_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED)
+
+#define	GPIOBUS_WAIT		1
+#define	GPIOBUS_DONTWAIT	2
+
 struct gpiobus_softc
 {
 	struct mtx	sc_mtx;		/* bus mutex */
+	struct rman	sc_intr_rman;	/* isr resources */
 	device_t	sc_busdev;	/* bus device */
 	device_t	sc_owner;	/* bus owner */
 	device_t	sc_dev;		/* driver device */
@@ -47,11 +72,32 @@
 	int		*sc_pins_mapped; /* mark mapped pins */
 };
 
-
 struct gpiobus_ivar
 {
+	struct resource_list	rl;	/* isr resource list */
 	uint32_t	npins;	/* pins total */
+	uint32_t	*flags;	/* pins flags */
 	uint32_t	*pins;	/* pins map */
 };
 
+#ifdef FDT
+struct ofw_gpiobus_devinfo {
+	struct gpiobus_ivar	opd_dinfo;
+	struct ofw_bus_devinfo	opd_obdinfo;
+};
+
+static __inline int
+gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
+    pcell_t *gpios, uint32_t *pin, uint32_t *flags)
+{
+	return (GPIO_MAP_GPIOS(bus, dev, gparent, gcells, gpios, pin, flags));
+}
+
+device_t ofw_gpiobus_add_fdt_child(device_t, phandle_t);
+#endif
+int gpio_check_flags(uint32_t, uint32_t);
+int gpiobus_init_softc(device_t);
+
+extern driver_t gpiobus_driver;
+
 #endif	/* __GPIOBUS_H__ */

Modified: trunk/sys/dev/gpio/gpioc.c
===================================================================
--- trunk/sys/dev/gpio/gpioc.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gpio/gpioc.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2009 Oleksandr Tymoshenko <gonzo at freebsd.org>
  * All rights reserved.
@@ -25,23 +26,20 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/gpio/gpioc.c 278786 2015-02-14 21:16:19Z loos $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
-#include <sys/types.h>
-
 #include <sys/bus.h>
 #include <sys/conf.h>
+#include <sys/gpio.h>
 #include <sys/ioccom.h>
 #include <sys/kernel.h>
 #include <sys/malloc.h>
 #include <sys/module.h>
-#include <sys/queue.h>
-#include <machine/bus.h>
-#include <machine/resource.h>
 
-#include <sys/gpio.h>
+#include <dev/gpio/gpiobusvar.h>
+
 #include "gpio_if.h"
 
 #undef GPIOC_DEBUG
@@ -61,9 +59,6 @@
 	.d_version	= D_VERSION,
 	.d_ioctl	= gpioc_ioctl,
 	.d_name		= "gpioc",
-#if __FreeBSD_version >= 800039
-	.d_flags	= D_PSEUDO | D_NEEDMINOR
-#endif
 };
 
 struct gpioc_softc {
@@ -105,7 +100,7 @@
 	struct gpioc_softc *sc = device_get_softc(dev);
 	int err;
 
-	if (sc->sc_ctl_dev);
+	if (sc->sc_ctl_dev)
 		destroy_dev(sc->sc_ctl_dev);
 
 	if ((err = bus_generic_detach(dev)) != 0)
@@ -122,6 +117,7 @@
 	struct gpioc_softc *sc = cdev->si_drv1;
 	struct gpio_pin pin;
 	struct gpio_req req;
+	uint32_t caps;
 
 	switch (cmd) {
 		case GPIOMAXPIN:
@@ -144,8 +140,12 @@
 		case GPIOSETCONFIG:
 			bcopy(arg, &pin, sizeof(pin));
 			dprintf("set config pin %d\n", pin.gp_pin);
-			res = GPIO_PIN_SETFLAGS(sc->sc_pdev, pin.gp_pin,
-			    pin.gp_flags);
+			res = GPIO_PIN_GETCAPS(sc->sc_pdev, pin.gp_pin, &caps);
+			if (res == 0)
+				res = gpio_check_flags(caps, pin.gp_flags);
+			if (res == 0)
+				res = GPIO_PIN_SETFLAGS(sc->sc_pdev, pin.gp_pin,
+				    pin.gp_flags);
 			break;
 		case GPIOGET:
 			bcopy(arg, &req, sizeof(req));

Modified: trunk/sys/dev/gpio/gpioiic.c
===================================================================
--- trunk/sys/dev/gpio/gpioiic.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gpio/gpioiic.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2009 Oleksandr Tymoshenko <gonzo at freebsd.org>
  * Copyright (c) 2010 Luiz Otavio O Souza
@@ -26,37 +27,42 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/gpio/gpioiic.c 278783 2015-02-14 20:50:38Z loos $");
 
+#include "opt_platform.h"
+
 #include <sys/param.h>
 #include <sys/systm.h>
-#include <sys/bio.h>
 #include <sys/bus.h>
 #include <sys/conf.h>
 #include <sys/kernel.h>
-#include <sys/kthread.h>
-#include <sys/lock.h>
-#include <sys/malloc.h>
 #include <sys/module.h>
-#include <sys/mutex.h>
 
 #include <sys/gpio.h>
 #include "gpiobus_if.h"
 
+#ifdef FDT
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+#include <dev/fdt/fdt_common.h>
+#endif
+
+#include <dev/gpio/gpiobusvar.h>
+
 #include <dev/iicbus/iiconf.h>
 #include <dev/iicbus/iicbus.h>
 
 #include "iicbb_if.h"
 
-#define	SCL_PIN		0	/* gpiobus mapped pin 6 */
-#define	SDA_PIN		1	/* gpiobus mapped pin 7 */
+#define	SCL_PIN_DEFAULT	0	/* default index of SCL pin on gpiobus */
+#define	SDA_PIN_DEFAULT	1
 
 struct gpioiic_softc 
 {
 	device_t	sc_dev;
 	device_t	sc_busdev;
-	struct mtx	sc_mtx;
-	struct cdev	*sc_leddev;
+	int		scl_pin;
+	int		sda_pin;
 };
 
 static int gpioiic_probe(device_t);
@@ -71,12 +77,16 @@
 static int gpioiic_getscl(device_t);
 static int gpioiic_reset(device_t, u_char, u_char, u_char *);
 
-
 static int
 gpioiic_probe(device_t dev)
 {
 
+#ifdef FDT
+	if (!ofw_bus_is_compatible(dev, "gpioiic"))
+		return (ENXIO);
+#endif
 	device_set_desc(dev, "GPIO I2C bit-banging driver");
+
 	return (0);
 }
 
@@ -83,12 +93,42 @@
 static int
 gpioiic_attach(device_t dev)
 {
-	struct gpioiic_softc	*sc = device_get_softc(dev);
 	device_t		bitbang;
+#ifdef FDT
+	phandle_t		node;
+	pcell_t			pin;
+#endif
+	struct gpiobus_ivar	*devi;
+	struct gpioiic_softc	*sc;
 
+	sc = device_get_softc(dev);
 	sc->sc_dev = dev;
 	sc->sc_busdev = device_get_parent(dev);
+	if (resource_int_value(device_get_name(dev),
+		device_get_unit(dev), "scl", &sc->scl_pin))
+		sc->scl_pin = SCL_PIN_DEFAULT;
+	if (resource_int_value(device_get_name(dev),
+		device_get_unit(dev), "sda", &sc->sda_pin))
+		sc->sda_pin = SDA_PIN_DEFAULT;
 
+#ifdef FDT
+	if ((node = ofw_bus_get_node(dev)) == -1)
+		return (ENXIO);
+	if (OF_getencprop(node, "scl", &pin, sizeof(pin)) > 0)
+		sc->scl_pin = (int)pin;
+	if (OF_getencprop(node, "sda", &pin, sizeof(pin)) > 0)
+		sc->sda_pin = (int)pin;
+#endif
+
+	if (sc->scl_pin < 0 || sc->scl_pin > 1)
+		sc->scl_pin = SCL_PIN_DEFAULT;
+	if (sc->sda_pin < 0 || sc->sda_pin > 1)
+		sc->sda_pin = SDA_PIN_DEFAULT;
+
+	devi = GPIOBUS_IVAR(dev);
+	device_printf(dev, "SCL pin: %d, SDA pin: %d\n",
+	    devi->pins[sc->scl_pin], devi->pins[sc->sda_pin]);
+
 	/* add generic bit-banging code */
 	bitbang = device_add_child(dev, "iicbb", -1);
 	device_probe_and_attach(bitbang);
@@ -105,9 +145,9 @@
 {
 	struct gpioiic_softc		*sc = device_get_softc(dev);
 
-	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, SDA_PIN,
+	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->sda_pin,
 	    GPIO_PIN_INPUT);
-	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, SCL_PIN,
+	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->scl_pin,
 	    GPIO_PIN_INPUT);
 }
 
@@ -115,24 +155,24 @@
 gpioiic_callback(device_t dev, int index, caddr_t data)
 {
 	struct gpioiic_softc	*sc = device_get_softc(dev);
-	int			error = 0;
+	int error, how;
 
+	how = GPIOBUS_DONTWAIT;
+	if (data != NULL && (int)*data == IIC_WAIT)
+		how = GPIOBUS_WAIT;
+	error = 0;
 	switch (index) {
 	case IIC_REQUEST_BUS:
-		GPIOBUS_LOCK_BUS(sc->sc_busdev);
-		GPIOBUS_ACQUIRE_BUS(sc->sc_busdev, sc->sc_dev);
-		GPIOBUS_UNLOCK_BUS(sc->sc_busdev);
+		error = GPIOBUS_ACQUIRE_BUS(sc->sc_busdev, sc->sc_dev, how);
 		break;
 	case IIC_RELEASE_BUS:
-		GPIOBUS_LOCK_BUS(sc->sc_busdev);
 		GPIOBUS_RELEASE_BUS(sc->sc_busdev, sc->sc_dev);
-		GPIOBUS_UNLOCK_BUS(sc->sc_busdev);
 		break;
 	default:
 		error = EINVAL;
 	}
 
-	return(error);
+	return (error);
 }
 
 static void
@@ -140,16 +180,14 @@
 {
 	struct gpioiic_softc		*sc = device_get_softc(dev);
 
-	GPIOBUS_LOCK_BUS(sc->sc_busdev);
 	if (val == 0) {
-		GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, SDA_PIN, 0);
-		GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, SDA_PIN,
+		GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, sc->sda_pin, 0);
+		GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->sda_pin,
 		    GPIO_PIN_OUTPUT);
 	} else {
-		GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, SDA_PIN,
+		GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->sda_pin,
 		    GPIO_PIN_INPUT);
 	}
-	GPIOBUS_UNLOCK_BUS(sc->sc_busdev);
 }
 
 static void
@@ -157,16 +195,14 @@
 {
 	struct gpioiic_softc		*sc = device_get_softc(dev);
 
-	GPIOBUS_LOCK_BUS(sc->sc_busdev);
 	if (val == 0) {
-		GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, SCL_PIN, 0);
-		GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, SCL_PIN,
+		GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, sc->scl_pin, 0);
+		GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->scl_pin,
 		    GPIO_PIN_OUTPUT);
 	} else {
-		GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, SCL_PIN,
+		GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->scl_pin,
 		    GPIO_PIN_INPUT);
 	}
-	GPIOBUS_UNLOCK_BUS(sc->sc_busdev);
 }
 
 static int
@@ -175,11 +211,9 @@
 	struct gpioiic_softc		*sc = device_get_softc(dev);
 	unsigned int			val;
 
-	GPIOBUS_LOCK_BUS(sc->sc_busdev);
-	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, SCL_PIN,
+	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->scl_pin,
 	    GPIO_PIN_INPUT);
-	GPIOBUS_PIN_GET(sc->sc_busdev, sc->sc_dev, SCL_PIN, &val);
-	GPIOBUS_UNLOCK_BUS(sc->sc_busdev);
+	GPIOBUS_PIN_GET(sc->sc_busdev, sc->sc_dev, sc->scl_pin, &val);
 
 	return ((int)val);
 }
@@ -190,11 +224,9 @@
 	struct gpioiic_softc		*sc = device_get_softc(dev);
 	unsigned int			val;
 
-	GPIOBUS_LOCK_BUS(sc->sc_busdev);
-	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, SDA_PIN,
+	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, sc->sda_pin,
 	    GPIO_PIN_INPUT);
-	GPIOBUS_PIN_GET(sc->sc_busdev, sc->sc_dev, SDA_PIN, &val);
-	GPIOBUS_UNLOCK_BUS(sc->sc_busdev);
+	GPIOBUS_PIN_GET(sc->sc_busdev, sc->sc_dev, sc->sda_pin, &val);
 
 	return ((int)val);
 }
@@ -202,19 +234,24 @@
 static int
 gpioiic_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
 {
-	struct gpioiic_softc		*sc = device_get_softc(dev);
+	struct gpioiic_softc		*sc;
 
-	GPIOBUS_LOCK_BUS(sc->sc_busdev);
-	GPIOBUS_ACQUIRE_BUS(sc->sc_busdev, sc->sc_dev);
-
+	sc = device_get_softc(dev);
 	gpioiic_reset_bus(sc->sc_dev);
 
-	GPIOBUS_RELEASE_BUS(sc->sc_busdev, sc->sc_dev);
-	GPIOBUS_UNLOCK_BUS(sc->sc_busdev);
-
 	return (IIC_ENOADDR);
 }
 
+#ifdef FDT
+static phandle_t
+gpioiic_get_node(device_t bus, device_t dev)
+{
+
+	/* We only have one child, the iicbb, which needs our own node. */
+	return (ofw_bus_get_node(bus));
+}
+#endif
+
 static devclass_t gpioiic_devclass;
 
 static device_method_t gpioiic_methods[] = {
@@ -231,6 +268,11 @@
 	DEVMETHOD(iicbb_getscl,		gpioiic_getscl),
 	DEVMETHOD(iicbb_reset,		gpioiic_reset),
 
+#ifdef FDT
+	/* OFW bus interface */
+	DEVMETHOD(ofw_bus_get_node,	gpioiic_get_node),
+#endif
+
 	{ 0, 0 }
 };
 

Modified: trunk/sys/dev/gpio/gpioled.c
===================================================================
--- trunk/sys/dev/gpio/gpioled.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/gpio/gpioled.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2009 Oleksandr Tymoshenko <gonzo at freebsd.org>
  * All rights reserved.
@@ -25,22 +26,28 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/gpio/gpioled.c 278783 2015-02-14 20:50:38Z loos $");
 
+#include "opt_platform.h"
+
 #include <sys/param.h>
 #include <sys/systm.h>
-#include <sys/bio.h>
 #include <sys/bus.h>
-#include <sys/conf.h>
+#include <sys/gpio.h>
 #include <sys/kernel.h>
-#include <sys/kthread.h>
 #include <sys/lock.h>
 #include <sys/malloc.h>
 #include <sys/module.h>
 #include <sys/mutex.h>
 
+#ifdef FDT
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/ofw_bus.h>
+#endif
+
+#include <dev/gpio/gpiobusvar.h>
 #include <dev/led/led.h>
-#include <sys/gpio.h>
+
 #include "gpiobus_if.h"
 
 /*
@@ -71,21 +78,85 @@
 static void 
 gpioled_control(void *priv, int onoff)
 {
-	struct gpioled_softc *sc = priv;
+	int error;
+	struct gpioled_softc *sc;
+
+	sc = (struct gpioled_softc *)priv;
 	GPIOLED_LOCK(sc);
-	GPIOBUS_LOCK_BUS(sc->sc_busdev);
-	GPIOBUS_ACQUIRE_BUS(sc->sc_busdev, sc->sc_dev);
-	GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, GPIOLED_PIN, 
-	    onoff ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
+	error = GPIOBUS_ACQUIRE_BUS(sc->sc_busdev, sc->sc_dev,
+	    GPIOBUS_DONTWAIT);
+	if (error != 0) {
+		GPIOLED_UNLOCK(sc);
+		return;
+	}
+	error = GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev,
+	    GPIOLED_PIN, GPIO_PIN_OUTPUT);
+	if (error == 0)
+		GPIOBUS_PIN_SET(sc->sc_busdev, sc->sc_dev, GPIOLED_PIN,
+		    onoff ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
 	GPIOBUS_RELEASE_BUS(sc->sc_busdev, sc->sc_dev);
-	GPIOBUS_UNLOCK_BUS(sc->sc_busdev);
 	GPIOLED_UNLOCK(sc);
 }
 
+#ifdef FDT
+static void
+gpioled_identify(driver_t *driver, device_t bus)
+{
+	phandle_t child, leds, root;
+
+	root = OF_finddevice("/");
+	if (root == 0)
+		return;
+	leds = fdt_find_compatible(root, "gpio-leds", 1);
+	if (leds == 0)
+		return;
+
+	/* Traverse the 'gpio-leds' node and add its children. */
+	for (child = OF_child(leds); child != 0; child = OF_peer(child))
+		if (ofw_gpiobus_add_fdt_child(bus, child) == NULL)
+			continue;
+}
+#endif
+
 static int
 gpioled_probe(device_t dev)
 {
+#ifdef FDT
+	int match;
+	phandle_t node;
+	char *compat;
+
+	/*
+	 * We can match against our own node compatible string and also against
+	 * our parent node compatible string.  The first is normally used to
+	 * describe leds on a gpiobus and the later when there is a common node
+	 * compatible with 'gpio-leds' which is used to concentrate all the
+	 * leds nodes on the dts.
+	 */
+	match = 0;
+	if (ofw_bus_is_compatible(dev, "gpioled"))
+		match = 1;
+
+	if (match == 0) {
+		if ((node = ofw_bus_get_node(dev)) == -1)
+			return (ENXIO);
+		if ((node = OF_parent(node)) == -1)
+			return (ENXIO);
+		if (OF_getprop_alloc(node, "compatible", 1,
+		    (void **)&compat) == -1)
+			return (ENXIO);
+
+		if (strcasecmp(compat, "gpio-leds") == 0)
+			match = 1;
+
+		free(compat, M_OFWPROP);
+	}
+
+	if (match == 0)
+		return (ENXIO);
+#endif
 	device_set_desc(dev, "GPIO led");
+
 	return (0);
 }
 
@@ -93,21 +164,35 @@
 gpioled_attach(device_t dev)
 {
 	struct gpioled_softc *sc;
+#ifdef FDT
+	phandle_t node;
+	char *name;
+#else
 	const char *name;
+#endif
 
 	sc = device_get_softc(dev);
 	sc->sc_dev = dev;
 	sc->sc_busdev = device_get_parent(dev);
 	GPIOLED_LOCK_INIT(sc);
+#ifdef FDT
+	name = NULL;
+	if ((node = ofw_bus_get_node(dev)) == -1)
+		return (ENXIO);
+	if (OF_getprop_alloc(node, "label", 1, (void **)&name) == -1)
+		OF_getprop_alloc(node, "name", 1, (void **)&name);
+#else
 	if (resource_string_value(device_get_name(dev), 
 	    device_get_unit(dev), "name", &name))
 		name = NULL;
+#endif
 
-	GPIOBUS_PIN_SETFLAGS(sc->sc_busdev, sc->sc_dev, GPIOLED_PIN,
-	    GPIO_PIN_OUTPUT);
-
 	sc->sc_leddev = led_create(gpioled_control, sc, name ? name :
 	    device_get_nameunit(dev));
+#ifdef FDT
+	if (name != NULL)
+		free(name, M_OFWPROP);
+#endif
 
 	return (0);
 }
@@ -130,6 +215,9 @@
 
 static device_method_t gpioled_methods[] = {
 	/* Device interface */
+#ifdef FDT
+	DEVMETHOD(device_identify,	gpioled_identify),
+#endif
 	DEVMETHOD(device_probe,		gpioled_probe),
 	DEVMETHOD(device_attach,	gpioled_attach),
 	DEVMETHOD(device_detach,	gpioled_detach),

Added: trunk/sys/dev/gpio/ofw_gpiobus.c
===================================================================
--- trunk/sys/dev/gpio/ofw_gpiobus.c	                        (rev 0)
+++ trunk/sys/dev/gpio/ofw_gpiobus.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,364 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2009, Nathan Whitehorn <nwhitehorn at FreeBSD.org>
+ * Copyright (c) 2013, Luiz Otavio O Souza <loos at FreeBSD.org>
+ * Copyright (c) 2013 The FreeBSD Foundation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice unmodified, this list of conditions, and the following
+ *    disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/10/sys/dev/gpio/ofw_gpiobus.c 278785 2015-02-14 21:02:33Z loos $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+
+#include <dev/gpio/gpiobusvar.h>
+#include <dev/ofw/ofw_bus.h>
+
+static int ofw_gpiobus_parse_gpios(struct gpiobus_softc *,
+    struct gpiobus_ivar *, phandle_t);
+static struct ofw_gpiobus_devinfo *ofw_gpiobus_setup_devinfo(device_t,
+    phandle_t);
+static void ofw_gpiobus_destroy_devinfo(struct ofw_gpiobus_devinfo *);
+
+device_t
+ofw_gpiobus_add_fdt_child(device_t bus, phandle_t child)
+{
+	struct ofw_gpiobus_devinfo *dinfo;
+	device_t childdev;
+
+	/*
+	 * Set up the GPIO child and OFW bus layer devinfo and add it to bus.
+	 */
+	dinfo = ofw_gpiobus_setup_devinfo(bus, child);
+	if (dinfo == NULL)
+		return (NULL);
+	childdev = device_add_child(bus, NULL, -1);
+	if (childdev == NULL) {
+		device_printf(bus, "could not add child: %s\n",
+		    dinfo->opd_obdinfo.obd_name);
+		ofw_gpiobus_destroy_devinfo(dinfo);
+		return (NULL);
+	}
+	device_set_ivars(childdev, dinfo);
+
+	return (childdev);
+}
+
+static int
+ofw_gpiobus_alloc_ivars(struct gpiobus_ivar *dinfo)
+{
+
+	/* Allocate pins and flags memory. */
+	dinfo->pins = malloc(sizeof(uint32_t) * dinfo->npins, M_DEVBUF,
+	    M_NOWAIT | M_ZERO);
+	if (dinfo->pins == NULL)
+		return (ENOMEM);
+	dinfo->flags = malloc(sizeof(uint32_t) * dinfo->npins, M_DEVBUF,
+	    M_NOWAIT | M_ZERO);
+	if (dinfo->flags == NULL) {
+		free(dinfo->pins, M_DEVBUF);
+		return (ENOMEM);
+	}
+
+	return (0);
+}
+
+static void
+ofw_gpiobus_free_ivars(struct gpiobus_ivar *dinfo)
+{
+
+	free(dinfo->flags, M_DEVBUF);
+	free(dinfo->pins, M_DEVBUF);
+}
+
+static int
+ofw_gpiobus_parse_gpios(struct gpiobus_softc *sc, struct gpiobus_ivar *dinfo,
+	phandle_t child)
+{
+	int cells, i, j, len;
+	pcell_t *gpios;
+	phandle_t gpio;
+
+	/* Retrieve the gpios property. */
+	if ((len = OF_getproplen(child, "gpios")) < 0)
+		return (EINVAL);
+	gpios = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
+	if (gpios == NULL)
+		return (ENOMEM);
+	if (OF_getencprop(child, "gpios", gpios, len) < 0) {
+		free(gpios, M_DEVBUF);
+		return (EINVAL);
+	}
+
+	/*
+	 * The gpio-specifier is controller independent, but the first pcell
+	 * has the reference to the GPIO controller phandler.
+	 * One the first pass we count the number of encoded gpio-specifiers.
+	 */
+	i = 0;
+	len /= sizeof(pcell_t);
+	while (i < len) {
+		/* Allow NULL specifiers. */
+		if (gpios[i] == 0) {
+			dinfo->npins++;
+			i++;
+			continue;
+		}
+		gpio = OF_node_from_xref(gpios[i]);
+		/* Verify if we're attaching to the correct GPIO controller. */
+		if (!OF_hasprop(gpio, "gpio-controller") ||
+		    gpio != ofw_bus_get_node(sc->sc_dev)) {
+			free(gpios, M_DEVBUF);
+			return (EINVAL);
+		}
+		/* Read gpio-cells property for this GPIO controller. */
+		if (OF_getencprop(gpio, "#gpio-cells", &cells,
+		    sizeof(cells)) < 0) {
+			free(gpios, M_DEVBUF);
+			return (EINVAL);
+		}
+		dinfo->npins++;
+		i += cells + 1;
+	}
+
+	if (dinfo->npins == 0) {
+		free(gpios, M_DEVBUF);
+		return (EINVAL);
+	}
+
+	/* Allocate the child resources. */
+	if (ofw_gpiobus_alloc_ivars(dinfo) != 0) {
+		free(gpios, M_DEVBUF);
+		return (ENOMEM);
+	}
+
+	/* Decode the gpio specifier on the second pass. */
+	i = 0;
+	j = 0;
+	while (i < len) {
+		/* Allow NULL specifiers. */
+		if (gpios[i] == 0) {
+			i++;
+			j++;
+			continue;
+		}
+
+		gpio = OF_node_from_xref(gpios[i]);
+		/* Read gpio-cells property for this GPIO controller. */
+		if (OF_getencprop(gpio, "#gpio-cells", &cells,
+		    sizeof(cells)) < 0) {
+			ofw_gpiobus_free_ivars(dinfo);
+			free(gpios, M_DEVBUF);
+			return (EINVAL);
+		}
+
+		/* Get the GPIO pin number and flags. */
+		if (gpio_map_gpios(sc->sc_dev, child, gpio, cells,
+		    &gpios[i + 1], &dinfo->pins[j], &dinfo->flags[j]) != 0) {
+			ofw_gpiobus_free_ivars(dinfo);
+			free(gpios, M_DEVBUF);
+			return (EINVAL);
+		}
+
+		/* Consistency check. */
+		if (dinfo->pins[j] > sc->sc_npins) {
+			device_printf(sc->sc_busdev,
+			    "invalid pin %d, max: %d\n",
+			    dinfo->pins[j], sc->sc_npins - 1);
+			ofw_gpiobus_free_ivars(dinfo);
+			free(gpios, M_DEVBUF);
+			return (EINVAL);
+		}
+
+		/*
+		 * Mark pin as mapped and give warning if it's already mapped.
+		 */
+		if (sc->sc_pins_mapped[dinfo->pins[j]]) {
+			device_printf(sc->sc_busdev,
+			    "warning: pin %d is already mapped\n",
+			    dinfo->pins[j]);
+			ofw_gpiobus_free_ivars(dinfo);
+			free(gpios, M_DEVBUF);
+			return (EINVAL);
+		}
+		sc->sc_pins_mapped[dinfo->pins[j]] = 1;
+
+		i += cells + 1;
+		j++;
+	}
+
+	free(gpios, M_DEVBUF);
+
+	return (0);
+}
+
+static struct ofw_gpiobus_devinfo *
+ofw_gpiobus_setup_devinfo(device_t dev, phandle_t node)
+{
+	struct gpiobus_softc *sc;
+	struct ofw_gpiobus_devinfo *dinfo;
+
+	sc = device_get_softc(dev);
+	dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
+	if (dinfo == NULL)
+		return (NULL);
+	if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, node) != 0) {
+		free(dinfo, M_DEVBUF);
+		return (NULL);
+	}
+
+	/* Parse the gpios property for the child. */
+	if (ofw_gpiobus_parse_gpios(sc, &dinfo->opd_dinfo, node) != 0) {
+		ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
+		free(dinfo, M_DEVBUF);
+		return (NULL);
+	}
+	/* And now the interrupt resources. */
+	resource_list_init(&dinfo->opd_dinfo.rl);
+	if (ofw_bus_intr_to_rl(dev, node, &dinfo->opd_dinfo.rl) != 0) {
+		ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
+		free(dinfo, M_DEVBUF);
+		return (NULL);
+	}
+
+	return (dinfo);
+}
+
+static void
+ofw_gpiobus_destroy_devinfo(struct ofw_gpiobus_devinfo *dinfo)
+{
+
+	resource_list_free(&dinfo->opd_dinfo.rl);
+	ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
+	free(dinfo, M_DEVBUF);
+}
+
+static int
+ofw_gpiobus_probe(device_t dev)
+{
+
+	if (ofw_bus_get_node(dev) == -1)
+		return (ENXIO);
+	device_set_desc(dev, "OFW GPIO bus");
+
+	return (0);
+}
+
+static int
+ofw_gpiobus_attach(device_t dev)
+{
+	int err;
+	phandle_t child;
+
+	err = gpiobus_init_softc(dev);
+	if (err != 0)
+		return (err);
+ 
+	bus_generic_probe(dev);
+	bus_enumerate_hinted_children(dev);
+
+	/*
+	 * Attach the children represented in the device tree.
+	 */
+	for (child = OF_child(ofw_bus_get_node(dev)); child != 0;
+	    child = OF_peer(child))
+		if (ofw_gpiobus_add_fdt_child(dev, child) == NULL)
+			continue;
+
+	return (bus_generic_attach(dev));
+}
+
+static device_t
+ofw_gpiobus_add_child(device_t dev, u_int order, const char *name, int unit)
+{
+	device_t child;
+	struct ofw_gpiobus_devinfo *devi;
+
+	child = device_add_child_ordered(dev, order, name, unit);
+	if (child == NULL)
+		return (child);
+	devi = malloc(sizeof(struct ofw_gpiobus_devinfo), M_DEVBUF,
+	    M_NOWAIT | M_ZERO);
+	if (devi == NULL) {
+		device_delete_child(dev, child);
+		return (0);
+	}
+
+	/*
+	 * NULL all the OFW-related parts of the ivars for non-OFW
+	 * children.
+	 */
+	devi->opd_obdinfo.obd_node = -1;
+	devi->opd_obdinfo.obd_name = NULL;
+	devi->opd_obdinfo.obd_compat = NULL;
+	devi->opd_obdinfo.obd_type = NULL;
+	devi->opd_obdinfo.obd_model = NULL;
+
+	device_set_ivars(child, devi);
+
+	return (child);
+}
+
+static const struct ofw_bus_devinfo *
+ofw_gpiobus_get_devinfo(device_t bus, device_t dev)
+{
+	struct ofw_gpiobus_devinfo *dinfo;
+
+	dinfo = device_get_ivars(dev);
+
+	return (&dinfo->opd_obdinfo);
+}
+
+static device_method_t ofw_gpiobus_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		ofw_gpiobus_probe),
+	DEVMETHOD(device_attach,	ofw_gpiobus_attach),
+
+	/* Bus interface */
+	DEVMETHOD(bus_child_pnpinfo_str,	ofw_bus_gen_child_pnpinfo_str),
+	DEVMETHOD(bus_add_child,	ofw_gpiobus_add_child),
+
+	/* ofw_bus interface */
+	DEVMETHOD(ofw_bus_get_devinfo,	ofw_gpiobus_get_devinfo),
+	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
+	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
+	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
+	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
+	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
+
+	DEVMETHOD_END
+};
+
+static devclass_t ofwgpiobus_devclass;
+
+DEFINE_CLASS_1(gpiobus, ofw_gpiobus_driver, ofw_gpiobus_methods,
+    sizeof(struct gpiobus_softc), gpiobus_driver);
+DRIVER_MODULE(ofw_gpiobus, gpio, ofw_gpiobus_driver, ofwgpiobus_devclass, 0, 0);
+MODULE_VERSION(ofw_gpiobus, 1);
+MODULE_DEPEND(ofw_gpiobus, gpiobus, 1, 1, 1);


Property changes on: trunk/sys/dev/gpio/ofw_gpiobus.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/dev/hatm/if_hatm.c
===================================================================
--- trunk/sys/dev/hatm/if_hatm.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hatm/if_hatm.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2001-2003
  *	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -33,7 +34,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/hatm/if_hatm.c 273736 2014-10-27 14:38:00Z hselasky $");
 
 #include "opt_inet.h"
 #include "opt_natm.h"
@@ -1311,9 +1312,17 @@
 
 	*ptr = def;
 
-	if (SYSCTL_ADD_UINT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
-	    OID_AUTO, var, rw ? CTLFLAG_RW : CTLFLAG_RD, ptr, 0, "") == NULL)
-		return (ENOMEM);
+	if (rw != 0) {
+		if (SYSCTL_ADD_UINT(&sc->sysctl_ctx,
+		    SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, var,
+		    CTLFLAG_RW, ptr, 0, "") == NULL)
+			return (ENOMEM);
+	} else {
+		if (SYSCTL_ADD_UINT(&sc->sysctl_ctx,
+		    SYSCTL_CHILDREN(sc->sysctl_tree), OID_AUTO, var,
+		    CTLFLAG_RD, ptr, 0, "") == NULL)
+			return (ENOMEM);
+	}
 
 	snprintf(full, sizeof(full), "hw.%s.%s",
 	    device_get_nameunit(sc->dev), var);
@@ -1686,7 +1695,7 @@
 	 * 4.2 BIOS Configuration
 	 */
 	v = pci_read_config(dev, PCIR_COMMAND, 2);
-	v |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
+	v |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
 	pci_write_config(dev, PCIR_COMMAND, v, 2);
 
 	/*
@@ -1702,12 +1711,6 @@
 	/*
 	 * Map memory
 	 */
-	v = pci_read_config(dev, PCIR_COMMAND, 2);
-	if (!(v & PCIM_CMD_MEMEN)) {
-		device_printf(dev, "failed to enable memory\n");
-		error = ENXIO;
-		goto failed;
-	}
 	sc->memid = PCIR_BAR(0);
 	sc->memres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->memid,
 	    RF_ACTIVE);

Modified: trunk/sys/dev/hatm/if_hatm_intr.c
===================================================================
--- trunk/sys/dev/hatm/if_hatm_intr.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hatm/if_hatm_intr.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2001-2003
  *	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -27,7 +28,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/hatm/if_hatm_intr.c 254842 2013-08-25 10:57:09Z andre $");
 
 /*
  * ForeHE driver.
@@ -260,8 +261,8 @@
 /*
  * Free an mbuf and put it onto the free list.
  */
-static void
-hatm_mbuf0_free(void *buf, void *args)
+static int
+hatm_mbuf0_free(struct mbuf *m, void *buf, void *args)
 {
 	struct hatm_softc *sc = args;
 	struct mbuf0_chunk *c = buf;
@@ -270,9 +271,10 @@
 	    ("freeing unused mbuf %x", c->hdr.flags));
 	c->hdr.flags &= ~MBUF_USED;
 	hatm_ext_free(&sc->mbuf_list[0], (struct mbufx_free *)c);
+	return (EXT_FREE_OK);
 }
-static void
-hatm_mbuf1_free(void *buf, void *args)
+static int
+hatm_mbuf1_free(struct mbuf *m, void *buf, void *args)
 {
 	struct hatm_softc *sc = args;
 	struct mbuf1_chunk *c = buf;
@@ -281,6 +283,7 @@
 	    ("freeing unused mbuf %x", c->hdr.flags));
 	c->hdr.flags &= ~MBUF_USED;
 	hatm_ext_free(&sc->mbuf_list[1], (struct mbufx_free *)c);
+	return (EXT_FREE_OK);
 }
 
 static void
@@ -461,7 +464,7 @@
 			    hatm_mbuf0_free, c0, sc, M_PKTHDR, EXT_EXTREF);
 			m->m_data += MBUF0_OFFSET;
 		} else
-			hatm_mbuf0_free(c0, sc);
+			(void)hatm_mbuf0_free(NULL, c0, sc);
 
 	} else {
 		struct mbuf1_chunk *c1;
@@ -485,7 +488,7 @@
 			    hatm_mbuf1_free, c1, sc, M_PKTHDR, EXT_EXTREF);
 			m->m_data += MBUF1_OFFSET;
 		} else
-			hatm_mbuf1_free(c1, sc);
+			(void)hatm_mbuf1_free(NULL, c1, sc);
 	}
 
 	return (m);

Modified: trunk/sys/dev/hatm/if_hatm_ioctl.c
===================================================================
--- trunk/sys/dev/hatm/if_hatm_ioctl.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hatm/if_hatm_ioctl.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2001-2003
  *	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -32,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/hatm/if_hatm_ioctl.c 148887 2005-08-09 10:20:02Z rwatson $");
 
 #include "opt_inet.h"
 #include "opt_natm.h"

Modified: trunk/sys/dev/hatm/if_hatm_rx.c
===================================================================
--- trunk/sys/dev/hatm/if_hatm_rx.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hatm/if_hatm_rx.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2001-2003
  *	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -32,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/hatm/if_hatm_rx.c 148887 2005-08-09 10:20:02Z rwatson $");
 
 #include "opt_inet.h"
 #include "opt_natm.h"

Modified: trunk/sys/dev/hatm/if_hatm_tx.c
===================================================================
--- trunk/sys/dev/hatm/if_hatm_tx.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hatm/if_hatm_tx.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2001-2003
  *	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -32,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/hatm/if_hatm_tx.c 243857 2012-12-04 09:32:43Z glebius $");
 
 #include "opt_inet.h"
 #include "opt_natm.h"

Modified: trunk/sys/dev/hatm/if_hatmconf.h
===================================================================
--- trunk/sys/dev/hatm/if_hatmconf.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hatm/if_hatmconf.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2001-2003
  *	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -26,7 +27,7 @@
  *
  * Author: Hartmut Brandt <harti at freebsd.org>
  *
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/hatm/if_hatmconf.h 139749 2005-01-06 01:43:34Z imp $
  *
  * Default configuration
  */

Modified: trunk/sys/dev/hatm/if_hatmreg.h
===================================================================
--- trunk/sys/dev/hatm/if_hatmreg.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hatm/if_hatmreg.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2001-2003
  *	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -26,7 +27,7 @@
  *
  * Author: Hartmut Brandt <harti at freebsd.org>
  *
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/hatm/if_hatmreg.h 261455 2014-02-04 03:36:42Z eadler $
  *
  * Fore HE driver for NATM
  */
@@ -294,7 +295,7 @@
 
 #define HE_REGO_CON_DAT		0x807F8
 #define HE_REGO_CON_CTL		0x807FC
-#define HE_REGM_CON_MBOX	(2 << 30)
+#define HE_REGM_CON_MBOX	(2U << 30)
 #define HE_REGM_CON_TCM		(1 << 30)
 #define HE_REGM_CON_RCM		(0 << 30)
 #define HE_REGM_CON_WE		(1 << 29)
@@ -444,7 +445,7 @@
 #define HE_REGM_TSR3_CRM		(0xff << 0)
 #define HE_REGS_TSR3_CRM		0
 
-#define HE_REGM_TSR4_FLUSH		(1 << 31)
+#define HE_REGM_TSR4_FLUSH		(1U << 31)
 #define HE_REGM_TSR4_SESS_END		(1 << 30)
 #define HE_REGM_TSR4_OAM_CRC10		(1 << 28)
 #define HE_REGM_TSR4_NULL_CRC10		(1 << 27)
@@ -475,7 +476,7 @@
 #define HE_REGM_TSR13_CRM		0xffff
 #define HE_REGS_TSR13_CRM		0
 
-#define HE_REGM_TSR14_CBR_DELETE	(1 << 31)
+#define HE_REGM_TSR14_CBR_DELETE	(1U << 31)
 #define HE_REGM_TSR14_ABR_CLOSE		(1 << 16)
 
 /*

Modified: trunk/sys/dev/hatm/if_hatmvar.h
===================================================================
--- trunk/sys/dev/hatm/if_hatmvar.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hatm/if_hatmvar.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2001-2003
  *	Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -26,7 +27,7 @@
  *
  * Author: Hartmut Brandt <harti at freebsd.org>
  *
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/hatm/if_hatmvar.h 147524 2005-06-22 06:42:03Z harti $
  *
  * Fore HE driver for NATM
  */

Modified: trunk/sys/dev/hme/if_hme.c
===================================================================
--- trunk/sys/dev/hme/if_hme.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hme/if_hme.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 1999 The NetBSD Foundation, Inc.
  * Copyright (c) 2001-2003 Thomas Moestl <tmm at FreeBSD.org>.
@@ -38,7 +39,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/hme/if_hme.c 253134 2013-07-10 06:46:46Z yongari $");
 
 /*
  * HME Ethernet module driver.

Modified: trunk/sys/dev/hme/if_hme_pci.c
===================================================================
--- trunk/sys/dev/hme/if_hme_pci.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hme/if_hme_pci.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 2000 Matthew R. Green
  * Copyright (c) 2007 Marius Strobl <marius at FreeBSD.org>
@@ -30,7 +31,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/hme/if_hme_pci.c 227843 2011-11-22 21:28:20Z marius $");
 
 /*
  * PCI front-end device driver for the HME ethernet device.

Modified: trunk/sys/dev/hme/if_hme_sbus.c
===================================================================
--- trunk/sys/dev/hme/if_hme_sbus.c	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hme/if_hme_sbus.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 1999 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -30,7 +31,7 @@
  */
 
 #include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/hme/if_hme_sbus.c 227843 2011-11-22 21:28:20Z marius $");
 
 /*
  * SBus front-end device driver for the HME ethernet device.

Modified: trunk/sys/dev/hme/if_hmereg.h
===================================================================
--- trunk/sys/dev/hme/if_hmereg.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hme/if_hmereg.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 1999 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -28,7 +29,7 @@
  *
  *	from: NetBSD: hmereg.h,v 1.16 2003/11/02 11:07:45 wiz Exp
  *
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/hme/if_hmereg.h 220940 2011-04-22 09:39:05Z marius $
  */
 
 /*

Modified: trunk/sys/dev/hme/if_hmevar.h
===================================================================
--- trunk/sys/dev/hme/if_hmevar.h	2018-05-27 23:49:06 UTC (rev 10105)
+++ trunk/sys/dev/hme/if_hmevar.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
 /*-
  * Copyright (c) 1999 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -28,7 +29,7 @@
  *
  *	from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp
  *
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/hme/if_hmevar.h 204646 2010-03-03 17:55:51Z joel $
  */
 
 #include <sys/callout.h>

Added: trunk/sys/dev/hptnr/README
===================================================================
--- trunk/sys/dev/hptnr/README	                        (rev 0)
+++ trunk/sys/dev/hptnr/README	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,223 @@
+Rocket Controller Driver for FreeBSD
+Copyright (C) 2015 HighPoint Technologies, Inc. All rights reserved.
+
+#############################################################################
+Revision History:
+
+   v1.1.4 2015-06-09
+     * Fix a bug that FailLED was not initialized properly.
+
+   v1.1.3 2015-05-19
+     * Support Report Luns command.
+
+   v1.1.2 2015-05-05
+     * Fix a bug that report wrong physical sector size for 512e HDD.
+
+   v1.1.1 2015-03-26
+     * Support 4Kn drive.
+     * Change the SCSI target ID of the disk to be the index of physical connetion to the HBA.
+     * Support staggered drive spin up.
+     * Fix a bug that command would be timeout because of improper interrupt service routine.
+     * Error handling to avoid scsi command lost which caused system hang up.
+     * Fix a bug that fail to get the devcie's serial number via FreeNAS WebGUI.
+
+   v1.0.1 2014-8-19
+     * Do not retry the command and reset the disk when failed to enable or 
+       disable spin up feature.
+     * Fix up a bug that disk failed to probe if driver failed to access the
+       10th LBA.
+     * Fix a bug that request timeout but it has been completed in certain 
+       cases.
+     * Support smartmontool for R750.
+
+   v1.0 2013-7-3
+        First source code release
+
+#############################################################################
+
+1. Overview
+---------------------
+  This package contains FreeBSD driver source code for HighPoint Rocket 
+  controller, include:
+  SATA Controller: R750, DC7280.
+
+  NO WARRANTY
+
+  THE DRIVER SOURCE CODE HIGHPOINT PROVIDED IS FREE OF CHARGE, AND THERE IS
+  NO WARRANTY FOR THE PROGRAM. THERE ARE NO RESTRICTIONS ON THE USE OF THIS
+  FREE SOURCE CODE. HIGHPOINT DOES NOT PROVIDE ANY TECHNICAL SUPPORT IF THE
+  CODE HAS BEEN CHANGED FROM ORIGINAL SOURCE CODE.
+
+  LIMITATION OF LIABILITY
+
+  IN NO EVENT WILL HIGHPOINT BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
+  INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF OR
+  INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, HIGHPOINT SHALL NOT HAVE
+  LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED USED WITH THE
+  PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, OR RECOVERING
+  SUCH HARDWARE, OR DATA.
+
+
+2. Rebuild the kernel with HighPoint Rocket support
+-----------------------------------------------
+
+  1) Install kernel source package and building tools. 
+  
+  2) Extract the driver files under the kernel source tree:
+
+     # cd /usr/src/sys/
+     # tar xvzf /your/path/to/HPTNR_FreeBSD_Src_1.x.x_xx_xx_xx.tgz
+
+  3) Update the kernel configuration file to include the HighPoint source.
+     Assume the configure file is GENERIC, and new kernel configure file is 
+     MYKERNEL:
+
+     # cd i386/conf          (or amd64/conf for AMD64)
+     # cp GENERIC MYKERNEL
+
+  4) Edit MYKERNEL, and add the following line under "RAID controllers 
+     interfaced to the SCSI subsystem":
+
+          device  "hptnr"   #HighPoint Rocket
+
+  5) For i386 system, edit /usr/src/sys/conf/files.i386 and append the lines
+     shown below:
+
+          hptnr_lib.o optional    hptnr  \
+              dependency  "$S/dev/hptnr/i386-elf.hptnr_lib.o.uu" \
+              compile-with    "uudecode < $S/dev/hptnr/i386-elf.hptnr_lib.o.uu" \
+              no-implicit-rule
+
+          dev/hptnr/hptnr_os_bsd.c      optional        hptnr
+          dev/hptnr/hptnr_osm_bsd.c     optional        hptnr
+          dev/hptnr/hptnr_config.c      optional        hptnr
+
+     For amd64 system, edit /usr/src/sys/conf/files.amd64 and append the lines
+     shown below:
+
+          hptnr_lib.o optional    hptnr  \
+              dependency  "$S/dev/hptnr/amd64-elf.hptnr_lib.o.uu" \
+              compile-with    "uudecode < $S/dev/hptnr/amd64-elf.hptnr_lib.o.uu" \
+              no-implicit-rule
+
+          dev/hptnr/hptnr_os_bsd.c      optional        hptnr
+          dev/hptnr/hptnr_osm_bsd.c     optional        hptnr
+          dev/hptnr/hptnr_config.c      optional        hptnr
+
+  6) Rebuild and install the kernel:
+
+     a) for FreeBSD 5.x-i386/6.x-i386/7.x-i386/8.x-i386/9.x-i386/10.x-i386:
+     
+        # cd /usr/src/sys/i386/conf/
+        # /usr/sbin/config MYKERNEL
+        # cd ../compile/MYKERNEL/
+        # make depend
+        # make 
+        # make install
+
+     b) for FreeBSD 5.x-amd64/6.x-amd64/7.x-amd64/8.x-amd64/9.x-amd64/10.x-amd64:
+
+        # cd /usr/src/sys/amd64/conf/
+        # /usr/sbin/config MYKERNEL
+        # cd ../compile/MYKERNEL/
+        # make depend
+        # make 
+        # make install
+
+     c) for FreeBSD 4.x:
+     
+        # cd /usr/src/sys/i386/conf/
+        # /usr/sbin/config MYKERNEL
+        # cd ../../compile/MYKERNEL/
+        # make depend
+        # make 
+        # make install
+
+    If the driver was previously configured as an auto-loaded module by
+    /boot/defaults/loader.conf, please remove the entry hptnr_load="YES"
+    from loader.conf to prevent the driver from being loaded twice.
+    
+  7) Reboot from the new kernel.
+
+
+3. Build/Load the driver as a kernel module
+------------------------------------------------
+
+  1) Install kernel source package and building tools. 
+  
+  2) Extract the driver files under the kernel source tree:
+    
+     # cd /usr/src/sys/
+     # tar xvzf /your/path/to/HPTNR_FreeBSD_Src_1.x.x_xx_xx_xx.tgz
+
+
+  4) Build the driver module:
+    
+     # cd modules/hptnr
+     # make
+
+  5) Copy the driver module to the kernel module directory
+
+     For FreeBSD 4.x:
+     
+     # cp hptnr.ko /modules/
+
+     For FreeBSD 5.x/6.x/7.x/8.x/9.x/10.x:
+    
+     # cp hptnr.ko /boot/kernel/
+
+  6) Reboot and load the driver under loader prompt. e.g:
+
+        BTX loader 1.00  BTX version is 1.01
+        Console: internal video/keyboard
+        BIOS driver A: is disk0
+        BIOS driver C: is disk2
+        BIOS 636kB/74512kB available memory
+        
+        FreeBSD/i386 bootstrap loader, Revision 0.8
+        (mailto:jkh at narf.osd.bsdi.com, Sat Apr 21 08:46:19 GMT 2001)
+        Loading /boot/defaults/loader.conf
+        /kernel text=0x24f1db data=0x3007ec+0x2062c -
+        
+        Hit [Enter] to boot immediagely, or any other key for command prompt.
+        Booting [kernel] in 9 seconds
+        
+         <-- press SPACE key here 
+        Type '?' for a list of commands, 'help' for more detailed help.
+        ok load hptnr
+        /modules/hptnr.ko text=0xf571 data=0x2c8+0x254
+        ok boot
+        
+     For FreeBSD 5.x/6.x/7.x/8.x/9.x/10.x, you can select 6 on the boot menu to get a loader
+     prompt.
+  
+  7) You can add a below line into /boot/defaults/loader.conf to load the
+     driver automatically:
+    
+           hptnr_load="YES"
+    
+     Please refer to the installation guide in HighPoint FreeBSD driver release 
+     package for more information.
+     
+
+#############################################################################
+Technical support and service
+
+  If you have questions about installing or using your HighPoint product,
+  check the user's guide or readme file first, and you will find answers to
+  most of your questions here. If you need further assistance, please
+  contact us. We offer the following support and information services:
+
+  1)  The HighPoint Web Site provides information on software upgrades,
+      answers to common questions, and other topics. The Web Site is
+      available from Internet 24 hours a day, 7 days a week, at
+      http://www.highpoint-tech.com.
+
+  2)  For technical support, send e-mail to support at highpoint-tech.com
+
+  NOTE: Before you send an e-mail, please visit our Web Site
+        (http://www.highpoint-tech.com) to check if there is a new or 
+        updated device driver for your system.
+
+$FreeBSD: stable/10/sys/dev/hptnr/README 284935 2015-06-29 18:34:30Z delphij $


Property changes on: trunk/sys/dev/hptnr/README
___________________________________________________________________
Added: mnbsd:nokeywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: trunk/sys/dev/hptnr/amd64-elf.hptnr_lib.o.uu
===================================================================
--- trunk/sys/dev/hptnr/amd64-elf.hptnr_lib.o.uu	                        (rev 0)
+++ trunk/sys/dev/hptnr/amd64-elf.hptnr_lib.o.uu	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,11000 @@
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+`
+end


Property changes on: trunk/sys/dev/hptnr/amd64-elf.hptnr_lib.o.uu
___________________________________________________________________
Added: mnbsd:nokeywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: trunk/sys/dev/hptnr/array.h
===================================================================
--- trunk/sys/dev/hptnr/array.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/array.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,187 @@
+/* $MidnightBSD$ */
+/* $Id: array.h,v 1.46 2010/02/05 06:57:43 mah Exp $ */
+/*-
+ * Copyright (C) 2004-2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ * 
+ * $FreeBSD: stable/10/sys/dev/hptnr/array.h 252867 2013-07-06 07:49:41Z delphij $
+ */
+#include <dev/hptnr/hptnr_config.h>
+#ifndef _HPT_ARRAY_H_
+#define _HPT_ARRAY_H_
+
+#define VERMAGIC_ARRAY 46
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define MAX_ARRAY_NAME 16
+
+#ifndef MAX_MEMBERS
+#define MAX_MEMBERS    16
+#endif
+
+#if MAX_MEMBERS<=16
+typedef HPT_U16 HPT_MMASK;
+#elif MAX_MEMBERS<=32
+typedef HPT_U32 HPT_MMASK;
+#elif MAX_MEMBERS<=64
+typedef HPT_U64 HPT_MMASK;
+#else 
+#error "MAX_MEMBERS too large"
+#endif
+
+#define HPT_MMASK_VALUE(x) (HPT_MMASK)((HPT_MMASK)1<<(x))
+
+#if MAX_MEMBERS<32
+#define HPT_MMASK_VALUE_SAFE(x) HPT_MMASK_VALUE(x)
+#else 
+#define HPT_MMASK_VALUE_SAFE(x) ((x)>=MAX_MEMBERS? (HPT_MMASK)0 : HPT_MMASK_VALUE(x))
+#endif
+
+#define MAX_REBUILD_SECTORS 128
+
+typedef struct _RAID_FLAGS {
+	HPT_UINT rf_need_initialize : 1;    
+	HPT_UINT rf_need_rebuild: 1;        
+	HPT_UINT rf_need_sync: 1;           
+	/* ioctl flags */
+	HPT_UINT rf_auto_rebuild: 1;
+	HPT_UINT rf_rebuilding: 1;          
+	HPT_UINT rf_verifying: 1;
+	HPT_UINT rf_initializing: 1;        
+	HPT_UINT rf_abort_verifying: 1;
+	HPT_UINT rf_raid15: 1;
+	HPT_UINT rf_v3_format : 1;
+	HPT_UINT rf_need_transform : 1;
+	HPT_UINT rf_transforming : 1;
+	HPT_UINT rf_abort_transform : 1;
+	HPT_UINT rf_log_write: 1;           
+} RAID_FLAGS;
+
+typedef struct transform_cmd_ext
+{
+	HPT_LBA lba;
+	HPT_U16 total_sectors;
+	HPT_U16 finished_sectors;
+} TRANSFORM_CMD_EXT , *PTRANSFORM_CMD_EXT;
+
+
+#define TO_MOVE_DATA        0
+#define TO_INITIALIZE       1
+#define TO_INITIALIZE_ONLY  2
+#define TO_MOVE_DATA_ONLY   3
+typedef struct hpt_transform
+{
+	HPT_U32 stamp;
+	PVDEV source;
+	PVDEV target;
+	struct list_head link;
+	HPT_U8 transform_from_tail;
+	struct tq_item task;
+	
+	struct lock_request lock;
+	TRANSFORM_CMD_EXT cmdext;
+
+	HPT_U64 transform_point;
+	HPT_U16 transform_sectors_per_step;
+	HPT_U8  operation;
+	HPT_U8  disabled; 
+} HPT_TRANSFORM, *PHPT_TRANSFORM;
+
+typedef struct hpt_array
+{
+	HPT_U32 array_stamp;
+	HPT_U32 data_stamp;  
+	HPT_U32 array_sn; 
+
+	HPT_U8  ndisk;
+	HPT_U8  block_size_shift;
+	HPT_U16 strip_width;
+	HPT_U8  sector_size_shift; /*sector size = 512B<<sector_size_shift*/
+	HPT_U8  jid; 
+	HPT_U8  reserved[2];
+
+	
+	HPT_MMASK outdated_members;
+	HPT_MMASK offline_members;
+
+	PVDEV member[MAX_MEMBERS];
+
+	RAID_FLAGS flags;
+
+	HPT_U64 rebuilt_sectors;
+
+	
+	HPT_U8 name[MAX_ARRAY_NAME];
+	PHPT_TRANSFORM transform;
+
+	TIME_RECORD create_time;        
+	HPT_U8  description[64];        
+	HPT_U8  create_manager[16];     
+
+#ifdef OS_SUPPORT_TASK
+	int floating_priority;
+	OSM_TASK ioctl_task;
+	IOCTL_ARG ioctl_arg;
+	
+	char ioctl_inbuf[sizeof(PVDEV)+sizeof(HPT_U64)+sizeof(HPT_U16)];
+	char ioctl_outbuf[sizeof(HPT_UINT)];
+#endif
+
+} HPT_ARRAY, *PHPT_ARRAY;
+
+#ifdef OS_SUPPORT_TASK
+void ldm_start_rebuild(struct _VDEV *pArray);
+#else 
+#define ldm_start_rebuild(pArray)
+#endif
+
+typedef struct _raw_partition{
+	struct _raw_partition * next;
+	__HPT_RAW_LBA start;
+	__HPT_RAW_LBA capacity;
+	PVDEV   vd_part;
+} RAW_PARTITION, *PRAW_PARTITION;
+
+typedef struct hpt_partiton
+{
+	PVDEV raw_disk;
+	__HPT_RAW_LBA des_location;
+	PRAW_PARTITION raw_part;
+	HPT_U8  del_mbr;
+	HPT_U8  reserved[3];
+} HPT_PARTITION, *PHPT_PARTITION;
+
+void ldm_check_array_online(PVDEV pArray);
+void ldm_generic_member_failed(PVDEV member);
+void ldm_sync_array_info(PVDEV pArray);
+void ldm_sync_array_stamp(PVDEV pArray);
+void ldm_add_spare_to_array(PVDEV pArray, PVDEV spare_partition);
+
+#if defined(__cplusplus)
+}
+#endif
+#endif


Property changes on: trunk/sys/dev/hptnr/array.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/him.h
===================================================================
--- trunk/sys/dev/hptnr/him.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/him.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,503 @@
+/* $MidnightBSD$ */
+/* $Id: him.h,v 1.57 2011/02/21 06:03:21 zsf Exp $ */
+/*-
+ * Copyright (C) 2004-2005 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/him.h 284935 2015-06-29 18:34:30Z delphij $
+ */
+#include <dev/hptnr/hptnr_config.h>
+#ifndef _HPT_HIM_H_
+#define _HPT_HIM_H_
+
+#define VERMAGIC_HIM 55
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#include <dev/hptnr/list.h>
+
+#define SECTOR_TO_BYTE_SHIFT 9
+#define SECTOR_TO_BYTE(x)       ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT)
+#define BYTE_TO_SECTOR(x)       ((x)>>SECTOR_TO_BYTE_SHIFT)
+
+typedef struct _PCI_ID
+{
+	HPT_U16 vid;
+	HPT_U16 did;
+	HPT_U32 subsys;
+	HPT_U8  rev;
+	HPT_U8  nbase;
+	HPT_U16 reserve;
+}
+PCI_ID;
+
+typedef struct _PCI_ADDRESS
+{
+	HPT_U8 tree;
+	HPT_U8 bus;
+	HPT_U8 device;
+	HPT_U8 function;
+}
+PCI_ADDRESS;
+
+typedef struct _HIM_ADAPTER_CONFIG
+{
+	PCI_ADDRESS pci_addr;
+	PCI_ID  pci_id;
+
+	HPT_U8  max_devices;
+	
+	HPT_U8  bProbeInInitializing:1;
+	
+	HPT_U8  bSpinupOneDevEachTime:1;	
+	
+	HPT_U8  bGlobalNcq:1;
+	HPT_U8  bSGPIOPartSupport:1;
+	 
+	HPT_U8  bNeedSASIdleTimer:1;
+	HPT_U8  reserved:3;
+
+	HPT_U8  bDevsPerBus;
+	HPT_U8  first_on_slot;
+
+	HPT_U8  bChipType;
+	HPT_U8  bChipIntrNum;
+	HPT_U8  bChipFlags;
+	HPT_U8  bNumBuses;
+
+	HPT_U8  szVendorID[36];
+	HPT_U8  szProductID[36];
+	HPT_U32 nvramSize;
+	HPT_U64 nvramAddress;
+	HPT_U8  slot_index;
+	HPT_U8  maxWidth;
+	HPT_U8  currentWidth;
+	HPT_U8  maxSpeed;
+	HPT_U8  currentSpeed;	
+	HPT_U8  reserved2[7];
+}
+HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG;
+
+typedef struct _HIM_CHANNEL_CONFIG
+{
+	HPT_U32 io_port;
+	HPT_U32 ctl_port;
+} HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG;
+
+typedef struct _HIM_DEVICE_FLAGS
+{
+	HPT_UINT df_atapi               :1;   
+	HPT_UINT df_removable_drive     :1;
+	HPT_UINT df_on_line             :1;   
+	HPT_UINT df_reduce_mode         :1;   
+	HPT_UINT df_sata                :1;   
+	HPT_UINT df_on_pm_port          :1;   
+	HPT_UINT df_support_read_ahead  :1;
+	HPT_UINT df_read_ahead_enabled  :1;
+	HPT_UINT df_support_write_cache :1;
+	HPT_UINT df_write_cache_enabled :1;
+	HPT_UINT df_cdrom_device        :1;
+	HPT_UINT df_tape_device         :1;
+	HPT_UINT df_support_tcq         :1;
+	HPT_UINT df_tcq_enabled         :1;
+	HPT_UINT df_support_ncq         :1;
+	HPT_UINT df_ncq_enabled         :1;
+	HPT_UINT df_sas                 :1;
+	HPT_UINT df_in_enclosure        :1;
+	HPT_UINT df_ssd                 :1;
+} DEVICE_FLAGS, *PDEVICE_FLAGS;
+
+#pragma pack(1)
+typedef struct _IDENTIFY_DATA {
+	HPT_U16 GeneralConfiguration;
+	HPT_U16 NumberOfCylinders;
+	HPT_U16 Reserved1;
+	HPT_U16 NumberOfHeads;
+	HPT_U16 UnformattedBytesPerTrack;
+	HPT_U16 UnformattedBytesPerSector;
+	HPT_U8  SasAddress[8];
+	HPT_U16 SerialNumber[10];
+	HPT_U16 BufferType;
+	HPT_U16 BufferSectorSize;
+	HPT_U16 NumberOfEccBytes;
+	HPT_U16 FirmwareRevision[4];
+	HPT_U16 ModelNumber[20];
+	HPT_U8  MaximumBlockTransfer;
+	HPT_U8  VendorUnique2;
+	HPT_U16 DoubleWordIo;
+	HPT_U16 Capabilities;
+	HPT_U16 Reserved2;
+	HPT_U8  VendorUnique3;
+	HPT_U8  PioCycleTimingMode;
+	HPT_U8  VendorUnique4;
+	HPT_U8  DmaCycleTimingMode;
+	HPT_U16 TranslationFieldsValid;
+	HPT_U16 NumberOfCurrentCylinders;
+	HPT_U16 NumberOfCurrentHeads;
+	HPT_U16 CurrentSectorsPerTrack;
+	HPT_U32 CurrentSectorCapacity;
+	HPT_U16 CurrentMultiSectorSetting;
+	HPT_U32 UserAddressableSectors;
+	HPT_U8  SingleWordDMASupport;
+	HPT_U8  SingleWordDMAActive;
+	HPT_U8  MultiWordDMASupport;
+	HPT_U8  MultiWordDMAActive;
+	HPT_U8  AdvancedPIOModes;
+	HPT_U8  Reserved4;
+	HPT_U16 MinimumMWXferCycleTime;
+	HPT_U16 RecommendedMWXferCycleTime;
+	HPT_U16 MinimumPIOCycleTime;
+	HPT_U16 MinimumPIOCycleTimeIORDY;
+	HPT_U16 Reserved5[2];
+	HPT_U16 ReleaseTimeOverlapped;
+	HPT_U16 ReleaseTimeServiceCommand;
+	HPT_U16 MajorRevision;
+	HPT_U16 MinorRevision;
+	HPT_U16 MaxQueueDepth;
+	HPT_U16 SataCapability;
+	HPT_U16 Reserved6[9];
+	HPT_U16 CommandSupport;
+	HPT_U16 CommandEnable;
+	HPT_U16 UtralDmaMode;
+	HPT_U16 Reserved7[11];
+	HPT_U32 Lba48BitLow;
+	HPT_U32 Lba48BitHigh;
+	HPT_U16 Reserved8[23];
+	HPT_U16 SpecialFunctionsEnabled;
+	HPT_U16 Reserved9[128];
+}
+#ifdef __GNUC__
+__attribute__((packed))
+#endif
+IDENTIFY_DATA, *PIDENTIFY_DATA;
+#pragma pack()
+
+typedef struct _HIM_DEVICE_CONFIG
+{
+	HPT_U64 capacity;
+	HPT_U32 logical_sector_size;
+	HPT_U8 logicalsectors_per_physicalsector;
+	HPT_U16 lowest_aligned;
+
+	DEVICE_FLAGS flags;
+
+	HPT_U8  path_id;
+	HPT_U8  target_id;
+	HPT_U8  max_queue_depth;
+	HPT_U8  spin_up_mode;
+
+	HPT_U8  reserved;
+	HPT_U8  transfer_mode;        
+	HPT_U8  bMaxShowMode;         
+	HPT_U8  bDeUsable_Mode;       
+
+	HPT_U16 max_sectors_per_cmd;
+
+	PIDENTIFY_DATA pIdentifyData;
+
+
+	HPT_U8  fixed_path_id; /*equals to phy id */
+}
+HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG;
+
+
+#define _DIT_MODE               0
+#define _DIT_601                1
+#define _DIT_READ_AHEAD         2
+#define _DIT_WRITE_CACHE        3
+#define _DIT_TCQ                4
+#define _DIT_NCQ                5
+#define _DIT_BEEP_OFF           6
+#define _DIT_SPIN_UP_MODE       7
+#define _DIT_IDLE_STANDBY       8
+#define _DIT_IDENTIFY           9
+
+#define SPIN_UP_MODE_NOSUPPORT 0
+#define SPIN_UP_MODE_FULL      1
+#define SPIN_UP_MODE_STANDBY   2
+
+struct tcq_control {
+	HPT_U8 enable;
+	HPT_U8 depth;
+};
+
+struct ncq_control {
+	HPT_U8 enable;
+	HPT_U8 depth;
+};
+
+typedef struct _HIM_ALTERABLE_DEV_INFO{
+	HPT_U8 type;
+	union {
+		HPT_U8 mode;
+		HPT_U8 enable_read_ahead;
+		HPT_U8 enable_read_cache;
+		HPT_U8 enable_write_cache;
+		struct tcq_control tcq;
+		struct ncq_control ncq;
+		void * adapter;
+		HPT_U8 spin_up_mode;
+		HPT_U8 idle_standby_timeout;
+		HPT_U8 identify_indicator;
+	}u;
+} HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO;
+
+struct _COMMAND;
+struct _IOCTL_ARG;
+
+typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index);
+
+typedef struct _HIM {
+	char *name;
+	struct _HIM *next;
+	HPT_UINT max_sg_descriptors;
+	#define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args;
+	#include <dev/hptnr/himfuncs.h>
+}
+HIM, *PHIM;
+
+
+#pragma pack(1)
+#ifdef SG_FLAG_EOT
+#error "don't use SG_FLAG_EOT with _SG.eot. clean the code!"
+#endif
+
+typedef struct _SG {
+	HPT_U32 size;
+	HPT_UINT eot; 
+	union {
+		HPT_U8 FAR * _logical; 
+		BUS_ADDRESS bus;
+	}
+	addr;
+}
+SG, *PSG;
+#pragma pack()
+
+typedef struct _AtaCommand
+{
+    HPT_U64     Lba;          
+    HPT_U16     nSectors;     
+    HPT_U16     pad;
+} AtaComm, *PAtaComm;
+
+#define ATA_CMD_NOP          0x0
+
+#define ATA_CMD_SET_FEATURES    0xef
+#define ATA_CMD_FLUSH           0xE7
+#define ATA_CMD_VERIFY          0x40
+#define ATA_CMD_STANDBY         0xe2
+#define ATA_CMD_READ_MULTI      0xC4
+#define ATA_CMD_READ_MULTI_EXT  0x29
+#define ATA_CMD_WRITE_MULTI     0xC5
+#define ATA_CMD_WRITE_MULTI_EXT 0x39
+#define ATA_CMD_WRITE_MULTI_FUA_EXT     0xCE
+
+#define ATA_CMD_READ_DMA        0xc8  /* IDE DMA read command           */
+#define ATA_CMD_WRITE_DMA       0xca  /* IDE DMA write command          */
+#define ATA_CMD_READ_DMA_EXT        0x25
+#define ATA_CMD_READ_QUEUE_EXT      0x26
+#define ATA_CMD_READ_MAX_ADDR       0x27
+#define ATA_CMD_READ_EXT            0x24
+#define ATA_CMD_VERIFY_EXT          0x42
+#define ATA_CMD_WRITE_DMA_EXT       0x35
+#define ATA_CMD_WRITE_QUEUE_EXT     0x36
+#define ATA_CMD_WRITE_EXT           0x34
+
+#define ATA_SET_FEATURES_XFER 0x3
+#define ATA_SECTOR_SIZE 512
+
+typedef struct _PassthroughCmd {
+	HPT_U16    bFeaturesReg;     
+	HPT_U16    bSectorCountReg;  
+	HPT_U16    bLbaLowReg;       
+	HPT_U16    bLbaMidReg;       
+	HPT_U16    bLbaHighReg;      
+	HPT_U8     bDriveHeadReg;    
+	HPT_U8     bCommandReg;      
+	HPT_U16    nSectors;         
+	HPT_U8    *pDataBuffer;      
+}
+PassthroughCmd;
+
+typedef struct _ScsiComm {
+	HPT_U8  cdbLength;
+	HPT_U8  senseLength; 
+	HPT_U8  scsiStatus; 
+	HPT_U8  reserve1;
+	HPT_U32 dataLength; 
+	HPT_U8 cdb[16];
+	HPT_U8 *senseBuffer;
+}
+ScsiComm;
+
+
+#define CTRL_CMD_REBUILD 1
+#define CTRL_CMD_VERIFY  2
+#define CTRL_CMD_INIT    3
+
+
+typedef struct _R5ControlCmd {
+	HPT_U64  StripeLine;  
+	HPT_U16 Offset;       
+	HPT_U8  Command;      
+	HPT_U8  CmdTarget;    
+}
+R5ControlCmd, *PR5ControlCmd;
+
+typedef struct _HPT_ADDRESS
+{
+	HPT_U8 * logical;
+	BUS_ADDRESS bus;
+}
+HPT_ADDRESS;
+
+
+typedef struct ctl_pages {
+	HPT_ADDRESS *pages;
+	HPT_UINT        page_size; 
+	HPT_UINT        npages;
+	HPT_UINT min_sg_descriptors; 
+} CONTROL_PAGES, *PCONTROL_PAGES;
+
+typedef struct _R1ControlCmd {
+	HPT_U64  Lba;
+	HPT_U16 nSectors;
+	HPT_U8  Command;      
+	HPT_U8  CmdTarget;    
+	PCONTROL_PAGES ctl_pages;  
+}
+R1ControlCmd, *PR1ControlCmd;
+
+typedef void (*TQ_PROC)(void *arg);
+
+struct tq_item {
+	TQ_PROC proc;
+	void *arg;
+	struct tq_item *next;
+};
+
+#define INIT_TQ_ITEM(t, p, a) \
+	do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0)
+
+typedef struct _COMMAND
+{
+	
+	struct _VBUS * vbus;
+
+	struct freelist *grplist; 
+	HPT_UINT grpcnt; 
+
+	
+	struct list_head q_link;
+	struct tq_item done_dpc;
+
+	HPT_UINT extsize;   
+	void *ext;
+
+	
+
+	void *target;      
+	void *priv;        
+	HPT_UPTR priv2;    
+
+	int priority;
+	struct lock_request *owned_lock; 
+	struct lock_request *lock_req;   
+	void (*dtor)(struct _COMMAND *, void *);
+	void *dtor_arg;
+
+	union{
+		AtaComm Ide;
+		PassthroughCmd Passthrough;
+		ScsiComm Scsi;
+		R5ControlCmd R5Control;
+		R1ControlCmd R1Control;
+	} uCmd;
+
+	HPT_U8 type; /* CMD_TYPE_* */
+
+	struct {
+		HPT_U8  physical_sg: 1;
+		HPT_U8  data_in: 1;
+		HPT_U8  data_out: 1;
+		HPT_U8  transform : 1;
+		HPT_U8  hard_flush: 2; 
+		HPT_U8  from_cc: 1;
+		HPT_U8  force_cc: 1;
+	} flags;
+
+	/* return status */
+	HPT_U8  Result;
+	/* retry count */
+	HPT_U8  RetryCount;
+
+	
+	PSG psg;
+
+	
+	int  (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical);
+	void (*done)(struct _COMMAND *cmd);
+}
+COMMAND, *PCOMMAND;
+
+/* command types */
+#define   CMD_TYPE_IO           0
+#define   CMD_TYPE_CONTROL      1
+#define   CMD_TYPE_ATAPI        2
+#define   CMD_TYPE_SCSI         CMD_TYPE_ATAPI
+#define   CMD_TYPE_PASSTHROUGH  3
+#define   CMD_TYPE_FLUSH        4
+#define   CMD_TYPE_IO_INDIRECT  0x80 
+
+/* flush command flags */
+#define   CF_HARD_FLUSH_CACHE   1
+#define   CF_HARD_FLUSH_STANDBY 2
+
+/* command return values */
+#define   RETURN_PENDING             0
+#define   RETURN_SUCCESS             1
+#define   RETURN_BAD_DEVICE          2
+#define   RETURN_BAD_PARAMETER       3
+#define   RETURN_WRITE_NO_DRQ        4
+#define   RETURN_DEVICE_BUSY         5
+#define   RETURN_INVALID_REQUEST     6
+#define   RETURN_SELECTION_TIMEOUT   7
+#define   RETURN_IDE_ERROR           8
+#define   RETURN_NEED_LOGICAL_SG     9
+#define   RETURN_NEED_PHYSICAL_SG    10
+#define   RETURN_RETRY               11
+#define   RETURN_DATA_ERROR          12
+#define   RETURN_BUS_RESET           13
+#define   RETURN_BAD_TRANSFER_LENGTH 14
+#define   RETURN_INSUFFICIENT_MEMORY 15 
+#define   RETURN_SECTOR_ERROR        16
+#define   RETURN_NEED_SPINUP         17
+
+#if defined(__cplusplus)
+}
+#endif
+#endif


Property changes on: trunk/sys/dev/hptnr/him.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/himfuncs.h
===================================================================
--- trunk/sys/dev/hptnr/himfuncs.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/himfuncs.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,109 @@
+/* $MidnightBSD$ */
+/* $Id: himfuncs.h,v 1.17 2010/05/10 10:10:02 lcn Exp $ */
+/*-
+ * Copyright (C) 2005-2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/himfuncs.h 252867 2013-07-06 07:49:41Z delphij $
+ */
+/*
+ * define _HIM_INTERFACE before include this file, and
+ * undef it after include this file.
+ */
+
+#include <dev/hptnr/hptnr_config.h>
+
+#ifndef _HIM_INTERFACE
+#error "you must define _HIM_INTERFACE before this file"
+#endif
+
+_HIM_INTERFACE(HPT_BOOL, get_supported_device_id, (int index, PCI_ID *id))
+
+_HIM_INTERFACE(HPT_U8, get_controller_count, (PCI_ID *id, HPT_U8 *reached, PCI_ADDRESS *addr))
+
+
+_HIM_INTERFACE(HPT_UINT, get_adapter_size, (const PCI_ID *id))
+
+
+_HIM_INTERFACE(HPT_BOOL, create_adapter, (const PCI_ID *id, PCI_ADDRESS pciAddress, void *adapter, void *osext))
+
+_HIM_INTERFACE(void, get_adapter_config, (void *adapter, HIM_ADAPTER_CONFIG *config))
+
+_HIM_INTERFACE(HPT_BOOL, get_meminfo, (void *adapter))
+
+
+_HIM_INTERFACE(HPT_BOOL, adapter_on_same_vbus, (void *adapter1, void *adapter2))
+_HIM_INTERFACE(void, route_irq, (void *adapter, HPT_BOOL enable))
+
+
+_HIM_INTERFACE(HPT_BOOL, initialize, (void *adapter))
+
+
+_HIM_INTERFACE(HPT_UINT, get_device_size, (void *adapter))
+
+
+_HIM_INTERFACE(HPT_BOOL, probe_device, (void *adapter, int index, void *devhandle, PROBE_CALLBACK done, void *arg))
+_HIM_INTERFACE(void *, get_device, (void *adapter, int index))
+_HIM_INTERFACE(void, get_device_config, (void *dev, HIM_DEVICE_CONFIG *config))
+_HIM_INTERFACE(void, remove_device, (void *dev))
+
+_HIM_INTERFACE(void, reset_device, (void * dev, void (*done)(void *arg), void *arg))
+
+
+_HIM_INTERFACE(HPT_U32, get_cmdext_size, (void))
+
+_HIM_INTERFACE(void, queue_cmd, (void *dev, struct _COMMAND *cmd))
+
+
+_HIM_INTERFACE(int, read_write, (void *dev,HPT_LBA lba, HPT_U16 nsector, HPT_U8 *buffer, HPT_BOOL read))
+
+_HIM_INTERFACE(HPT_BOOL, intr_handler, (void *adapter))
+_HIM_INTERFACE(HPT_BOOL, intr_control, (void * adapter, HPT_BOOL enable))
+
+
+_HIM_INTERFACE(int, get_channel_config, (void * adapter, int index, PHIM_CHANNEL_CONFIG pInfo))
+_HIM_INTERFACE(int, set_device_info, (void * dev, PHIM_ALTERABLE_DEV_INFO pInfo))
+_HIM_INTERFACE(void, unplug_device, (void * dev))
+
+
+_HIM_INTERFACE(void, shutdown, (void *adapter))
+_HIM_INTERFACE(void, suspend, (void *adapter))
+_HIM_INTERFACE(void, resume, (void *adapter))
+_HIM_INTERFACE(void, release_adapter, (void *adapter))
+
+/*called after ldm_register_adapter*/
+_HIM_INTERFACE(HPT_BOOL, verify_adapter, (void *adapter))
+
+/* (optional) */
+_HIM_INTERFACE(void, ioctl, (void * adapter, struct _IOCTL_ARG *arg))
+_HIM_INTERFACE(int, compare_slot_seq, (void *adapter1, void *adapter2))
+_HIM_INTERFACE(int, get_enclosure_count, (void *adapter))
+_HIM_INTERFACE(int, get_enclosure_info, (void *adapter, int id, void *pinfo))
+_HIM_INTERFACE(int, get_enclosure_info_v2, (void *adapter, int id, void *pinfo))
+_HIM_INTERFACE(int, get_enclosure_info_v3, (void *adapter, int id, void *pinfo))
+_HIM_INTERFACE(int, get_enclosure_info_v4, (void *adapter, int enc_id, int ele_id, void *pinfo, void *pstatus))
+
+_HIM_INTERFACE(HPT_BOOL, flash_access, (void *adapter, HPT_U32 offset, void *value, int size, HPT_BOOL reading))
+
+#undef _HIM_INTERFACE


Property changes on: trunk/sys/dev/hptnr/himfuncs.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
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## -0,0 +1 ##
+text/plain
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Added: trunk/sys/dev/hptnr/hptintf.h
===================================================================
--- trunk/sys/dev/hptnr/hptintf.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/hptintf.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,2233 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/hptintf.h 281957 2015-04-25 00:32:47Z delphij $
+ */
+
+#include <dev/hptnr/hptnr_config.h>
+
+#ifndef HPT_INTF_H
+#define HPT_INTF_H
+
+#if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD)
+#define __BIG_ENDIAN_BITFIELD
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __GNUC__
+#define __attribute__(x)
+#endif
+
+#pragma pack(1)
+
+/*
+ * Version of this interface.
+ * The user mode application must first issue a hpt_get_version() call to
+ * check HPT_INTERFACE_VERSION. When an utility using newer version interface
+ * is used with old version drivers, it must call only the functions that
+ * driver supported.
+ * A new version interface should only add ioctl functions; it should implement
+ * all old version functions without change their definition.
+ */
+#define __this_HPT_INTERFACE_VERSION 0x02010000
+
+#ifndef HPT_INTERFACE_VERSION
+#error "You must define HPT_INTERFACE_VERSION you implemented"
+#endif
+
+#if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION
+#error "HPT_INTERFACE_VERSION is invalid"
+#endif
+
+/*
+ * DEFINITION
+ *   Logical device  --- a device that can be accessed by OS.
+ *   Physical device --- device attached to the controller.
+ *  A logical device can be simply a physical device.
+ *
+ * Each logical and physical device has a 32bit ID. GUI will use this ID
+ * to identify devices.
+ *   1. The ID must be unique.
+ *   2. The ID must be immutable. Once an ID is assigned to a device, it
+ * must not change when system is running and the device exists.
+ *   3. The ID of logical device must be NOT reusable. If a device is
+ * removed, other newly created logical device must not use the same ID.
+ *   4. The ID must not be zero or 0xFFFFFFFF.
+ */
+typedef HPT_U32 DEVICEID;
+
+/*
+ * logical device type.
+ * Identify array (logical device) and physical device.
+ */
+#define LDT_ARRAY   1
+#define LDT_DEVICE  2
+
+/*
+ * Array types
+ * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0.
+ * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0.
+ * Their members may be another array of type RAID0 or RAID1.
+ */
+#define AT_UNKNOWN  0
+#define AT_RAID0    1
+#define AT_RAID1    2
+#define AT_RAID5    3
+#define AT_RAID6    4
+#define AT_RAID3    5
+#define AT_RAID4    6
+#define AT_JBOD     7
+#define AT_RAID1E   8
+
+/*
+ * physical device type
+ */
+#define PDT_UNKNOWN     0
+#define PDT_HARDDISK    1
+#define PDT_CDROM       2
+#define PDT_TAPE        3
+
+/*
+ * Some constants.
+ */
+#define MAX_NAME_LENGTH     36
+#define MAX_ARRAYNAME_LEN   16
+
+#define MAX_ARRAY_MEMBERS_V1 8
+
+#ifndef MAX_ARRAY_MEMBERS_V2
+#define MAX_ARRAY_MEMBERS_V2 16
+#endif
+
+#ifndef MAX_ARRAY_MEMBERS_V3
+#define MAX_ARRAY_MEMBERS_V3 64
+#endif
+
+/* keep definition for source code compatiblity */
+#define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1
+
+/*
+ * io commands
+ * GUI use these commands to do IO on logical/physical devices.
+ */
+#define IO_COMMAND_READ     1
+#define IO_COMMAND_WRITE    2
+
+
+
+/*
+ * array flags
+ */
+#define ARRAY_FLAG_DISABLED         0x00000001 /* The array is disabled */
+#define ARRAY_FLAG_NEEDBUILDING     0x00000002 /* array data need to be rebuilt */
+#define ARRAY_FLAG_REBUILDING       0x00000004 /* array is in rebuilding process */
+#define ARRAY_FLAG_BROKEN           0x00000008 /* broken but may still working */
+#define ARRAY_FLAG_BOOTDISK         0x00000010 /* array has a active partition */
+
+#define ARRAY_FLAG_BOOTMARK         0x00000040 /* array has boot mark set */
+#define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */
+#define ARRAY_FLAG_VERIFYING        0x00000100 /* is being verified */
+#define ARRAY_FLAG_INITIALIZING     0x00000200 /* is being initialized */
+#define ARRAY_FLAG_TRANSFORMING     0x00000400 /* tranform in progress */
+#define ARRAY_FLAG_NEEDTRANSFORM    0x00000800 /* array need tranform */
+#define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/
+#define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */
+#define ARRAY_FLAG_RAID15PLUS       0x80000000 /* display this RAID 1 as RAID 1.5 */
+
+#define ARRAY_FLAG_ZERO_STARTING    0x40000000 /* start lba of all members of this array is 0 */
+
+/*
+ * device flags
+ */
+#define DEVICE_FLAG_DISABLED        0x00000001 /* device is disabled */
+#define DEVICE_FLAG_BOOTDISK        0x00000002 /* disk has a active partition */
+#define DEVICE_FLAG_BOOTMARK        0x00000004 /* disk has boot mark set */
+#define DEVICE_FLAG_WITH_601        0x00000008 /* has HPT601 connected */
+#define DEVICE_FLAG_SATA            0x00000010 /* SATA or SAS device */
+#define DEVICE_FLAG_ON_PM_PORT      0x00000020 /* PM port */
+#define DEVICE_FLAG_SAS             0x00000040 /* SAS device */
+#define DEVICE_FLAG_IN_ENCLOSURE    0x00000080 /* PathId is enclosure# */
+#define DEVICE_FLAG_UNINITIALIZED   0x00010000 /* device is not initialized, can't be used to create array */
+#define DEVICE_FLAG_LEGACY          0x00020000 /* single disk & mbr contains at least one partition */
+#define DEVICE_FLAG_BAD_SECTOR_FOUND	0x00040000 /* found bad sector on target disk, set and clear by GUI */
+
+#define DEVICE_FLAG_IS_SPARE        0x80000000 /* is a spare disk */
+
+
+#define DEVICE_FLAG_SSD             0x00000100 /* SSD device */
+#define DEVICE_FLAG_3G              0x10000000
+#define DEVICE_FLAG_6G              0x20000000
+
+
+/*
+ * array states used by hpt_set_array_state()
+ */
+/* old defines */
+#define MIRROR_REBUILD_START    1
+#define MIRROR_REBUILD_ABORT    2
+#define MIRROR_REBUILD_COMPLETE 3
+/* new defines */
+#define AS_REBUILD_START 1
+#define AS_REBUILD_ABORT 2
+#define AS_REBUILD_PAUSE AS_REBUILD_ABORT
+#define AS_REBUILD_COMPLETE 3
+#define AS_VERIFY_START 4
+#define AS_VERIFY_ABORT 5
+#define AS_VERIFY_COMPLETE 6
+#define AS_INITIALIZE_START 7
+#define AS_INITIALIZE_ABORT 8
+#define AS_INITIALIZE_COMPLETE 9
+#define AS_VERIFY_FAILED 10
+#define AS_REBUILD_STOP 11
+#define AS_SAVE_STATE   12
+#define AS_TRANSFORM_START 13
+#define AS_TRANSFORM_ABORT 14
+
+/************************************************************************
+ * ioctl code
+ * It would be better if ioctl code are the same on different platforms,
+ * but we must not conflict with system defined ioctl code.
+ ************************************************************************/
+#if defined(LINUX) || defined(__FreeBSD_version) || defined(linux)
+#define HPT_CTL_CODE(x) (x+0xFF00)
+#define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00)
+#elif defined(_MS_WIN32_) || defined(WIN32)
+
+#ifndef CTL_CODE
+#define CTL_CODE( DeviceType, Function, Method, Access ) \
+			(((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method))
+#endif
+#define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0)
+#define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900)
+
+#else 
+#define HPT_CTL_CODE(x) (x)
+#endif
+
+#define HPT_IOCTL_GET_VERSION               HPT_CTL_CODE(0)
+#define HPT_IOCTL_GET_CONTROLLER_COUNT      HPT_CTL_CODE(1)
+#define HPT_IOCTL_GET_CONTROLLER_INFO       HPT_CTL_CODE(2)
+#define HPT_IOCTL_GET_CHANNEL_INFO          HPT_CTL_CODE(3)
+#define HPT_IOCTL_GET_LOGICAL_DEVICES       HPT_CTL_CODE(4)
+#define HPT_IOCTL_GET_DEVICE_INFO           HPT_CTL_CODE(5)
+#define HPT_IOCTL_CREATE_ARRAY              HPT_CTL_CODE(6)
+#define HPT_IOCTL_DELETE_ARRAY              HPT_CTL_CODE(7)
+#define HPT_IOCTL_ARRAY_IO                  HPT_CTL_CODE(8)
+#define HPT_IOCTL_DEVICE_IO                 HPT_CTL_CODE(9)
+#define HPT_IOCTL_GET_EVENT                 HPT_CTL_CODE(10)
+#define HPT_IOCTL_REBUILD_MIRROR            HPT_CTL_CODE(11)
+/* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */
+#define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR
+#define HPT_IOCTL_ADD_SPARE_DISK            HPT_CTL_CODE(12)
+#define HPT_IOCTL_REMOVE_SPARE_DISK         HPT_CTL_CODE(13)
+#define HPT_IOCTL_ADD_DISK_TO_ARRAY         HPT_CTL_CODE(14)
+#define HPT_IOCTL_SET_ARRAY_STATE           HPT_CTL_CODE(15)
+#define HPT_IOCTL_SET_ARRAY_INFO            HPT_CTL_CODE(16)
+#define HPT_IOCTL_SET_DEVICE_INFO           HPT_CTL_CODE(17)
+#define HPT_IOCTL_RESCAN_DEVICES            HPT_CTL_CODE(18)
+#define HPT_IOCTL_GET_DRIVER_CAPABILITIES   HPT_CTL_CODE(19)
+#define HPT_IOCTL_GET_601_INFO              HPT_CTL_CODE(20)
+#define HPT_IOCTL_SET_601_INFO              HPT_CTL_CODE(21)
+#define HPT_IOCTL_LOCK_DEVICE               HPT_CTL_CODE(22)
+#define HPT_IOCTL_UNLOCK_DEVICE             HPT_CTL_CODE(23)
+#define HPT_IOCTL_IDE_PASS_THROUGH          HPT_CTL_CODE(24)
+#define HPT_IOCTL_VERIFY_DATA_BLOCK         HPT_CTL_CODE(25)
+#define HPT_IOCTL_INITIALIZE_DATA_BLOCK     HPT_CTL_CODE(26)
+#define HPT_IOCTL_ADD_DEDICATED_SPARE       HPT_CTL_CODE(27)
+#define HPT_IOCTL_DEVICE_IO_EX              HPT_CTL_CODE(28)
+#define HPT_IOCTL_SET_BOOT_MARK             HPT_CTL_CODE(29)
+#define HPT_IOCTL_QUERY_REMOVE              HPT_CTL_CODE(30)
+#define HPT_IOCTL_REMOVE_DEVICES            HPT_CTL_CODE(31)
+#define HPT_IOCTL_CREATE_ARRAY_V2           HPT_CTL_CODE(32)
+#define HPT_IOCTL_GET_DEVICE_INFO_V2        HPT_CTL_CODE(33)
+#define HPT_IOCTL_SET_DEVICE_INFO_V2        HPT_CTL_CODE(34)
+#define HPT_IOCTL_REBUILD_DATA_BLOCK_V2     HPT_CTL_CODE(35)
+#define HPT_IOCTL_VERIFY_DATA_BLOCK_V2      HPT_CTL_CODE(36)
+#define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2  HPT_CTL_CODE(37)
+#define HPT_IOCTL_LOCK_DEVICE_V2            HPT_CTL_CODE(38)
+#define HPT_IOCTL_DEVICE_IO_V2              HPT_CTL_CODE(39)
+#define HPT_IOCTL_DEVICE_IO_EX_V2           HPT_CTL_CODE(40)
+#define HPT_IOCTL_CREATE_TRANSFORM          HPT_CTL_CODE(41)
+#define HPT_IOCTL_STEP_TRANSFORM            HPT_CTL_CODE(42)
+#define HPT_IOCTL_SET_VDEV_INFO             HPT_CTL_CODE(43)
+#define HPT_IOCTL_CALC_MAX_CAPACITY         HPT_CTL_CODE(44)
+#define HPT_IOCTL_INIT_DISKS                HPT_CTL_CODE(45)
+#define HPT_IOCTL_GET_DEVICE_INFO_V3        HPT_CTL_CODE(46)
+#define HPT_IOCTL_GET_CONTROLLER_INFO_V2    HPT_CTL_CODE(47)
+#define HPT_IOCTL_I2C_TRANSACTION           HPT_CTL_CODE(48)
+#define HPT_IOCTL_GET_PARAMETER_LIST        HPT_CTL_CODE(49)
+#define HPT_IOCTL_GET_PARAMETER             HPT_CTL_CODE(50)
+#define HPT_IOCTL_SET_PARAMETER             HPT_CTL_CODE(51)
+#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52)
+#define HPT_IOCTL_GET_CHANNEL_INFO_V2       HPT_CTL_CODE(53)
+#define HPT_IOCTL_GET_CONTROLLER_INFO_V3    HPT_CTL_CODE(54)
+#define HPT_IOCTL_GET_DEVICE_INFO_V4        HPT_CTL_CODE(55)
+#define HPT_IOCTL_CREATE_ARRAY_V3           HPT_CTL_CODE(56)
+#define HPT_IOCTL_CREATE_TRANSFORM_V2       HPT_CTL_CODE(57)
+#define HPT_IOCTL_CALC_MAX_CAPACITY_V2      HPT_CTL_CODE(58)
+#define HPT_IOCTL_SCSI_PASSTHROUGH          HPT_CTL_CODE(59)
+#define HPT_IOCTL_GET_PHYSICAL_DEVICES      HPT_CTL_CODE(60)
+#define HPT_IOCTL_GET_ENCLOSURE_COUNT       HPT_CTL_CODE(61)
+#define HPT_IOCTL_GET_ENCLOSURE_INFO        HPT_CTL_CODE(62)
+#define HPT_IOCTL_GET_PERFMON_STATUS        HPT_CTL_CODE(63)
+#define HPT_IOCTL_SET_PERFMON_STATUS        HPT_CTL_CODE(64)
+#define HPT_IOCTL_GET_PERFMON_DATA          HPT_CTL_CODE(65)
+#define HPT_IOCTL_IDE_PASS_THROUGH_V2       HPT_CTL_CODE(66)
+#define HPT_IOCTL_GET_ENCLOSURE_INFO_V2     HPT_CTL_CODE(67)
+#define HPT_IOCTL_GET_ENCLOSURE_INFO_V3     HPT_CTL_CODE(68)
+#define HPT_IOCTL_ACCESS_CONFIG_REG         HPT_CTL_CODE(69)
+
+#define HPT_IOCTL_GET_ENCLOSURE_INFO_V4    HPT_CTL_CODE(70)
+#define HPT_IOCTL_GET_ENCLOSURE_ELEMENT_INFO    HPT_CTL_CODE(71)
+#define HPT_IOCTL_DUMP_METADATA             HPT_CTL_CODE(72)
+#define HPT_IOCTL_GET_CONTROLLER_INFO_V2_EXT    HPT_CTL_CODE(73)
+
+
+#define HPT_IOCTL_GET_CONTROLLER_IDS        HPT_CTL_CODE(100)
+#define HPT_IOCTL_GET_DCB                   HPT_CTL_CODE(101)
+
+#define HPT_IOCTL_EPROM_IO                  HPT_CTL_CODE(102)
+#define HPT_IOCTL_GET_CONTROLLER_VENID      HPT_CTL_CODE(103)
+
+
+#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_CC   HPT_CTL_CODE(200)
+#define HPT_IOCTL_GET_CCS_INFO                 HPT_CTL_CODE(201)
+#define HPT_IOCTL_CREATE_CC                    HPT_CTL_CODE(202)
+#define HPT_IOCTL_DELETE_CC                    HPT_CTL_CODE(203)
+#define HPT_IOCTL_REENABLE_ARRAY               HPT_CTL_CODE(204)
+
+/************************************************************************
+ * shared data structures
+ ************************************************************************/
+
+/*
+ * Chip Type
+ */
+#define CHIP_TYPE_HPT366      1
+#define CHIP_TYPE_HPT368      2
+#define CHIP_TYPE_HPT370      3
+#define CHIP_TYPE_HPT370A     4
+#define CHIP_TYPE_HPT370B     5
+#define CHIP_TYPE_HPT374      6
+#define CHIP_TYPE_HPT372      7
+#define CHIP_TYPE_HPT372A     8
+#define CHIP_TYPE_HPT302      9
+#define CHIP_TYPE_HPT371      10
+#define CHIP_TYPE_HPT372N     11
+#define CHIP_TYPE_HPT302N     12
+#define CHIP_TYPE_HPT371N     13
+#define CHIP_TYPE_SI3112A     14
+#define CHIP_TYPE_ICH5        15
+#define CHIP_TYPE_ICH5R       16
+#define CHIP_TYPE_MV50XX      20
+#define CHIP_TYPE_MV60X1      21
+#define CHIP_TYPE_MV60X2      22
+#define CHIP_TYPE_MV70X2      23
+#define CHIP_TYPE_MV5182      24
+#define CHIP_TYPE_IOP331      31
+#define CHIP_TYPE_IOP333      32
+#define CHIP_TYPE_IOP341      33
+#define CHIP_TYPE_IOP348      34
+
+/*
+ * Chip Flags
+ */
+#define CHIP_SUPPORT_ULTRA_66   0x20
+#define CHIP_SUPPORT_ULTRA_100  0x40
+#define CHIP_HPT3XX_DPLL_MODE   0x80
+#define CHIP_SUPPORT_ULTRA_133  0x01
+#define CHIP_SUPPORT_ULTRA_150  0x02
+#define CHIP_MASTER             0x04
+#define CHIP_SUPPORT_SATA_300   0x08
+
+#define HPT_SPIN_UP_MODE_NOSUPPORT 0
+#define HPT_SPIN_UP_MODE_FULL      1
+#define HPT_SPIN_UP_MODE_STANDBY   2
+
+#define HPT_CAP_DUMP_METADATA   0x1
+#define HPT_CAP_DISK_CHECKING   0x2
+#define HPT_CAP_REPORT_SECTOR_SIZE  0x10
+
+typedef struct _DRIVER_CAPABILITIES {
+	HPT_U32 dwSize;
+
+	HPT_U8 MaximumControllers;           /* maximum controllers the driver can support */
+	HPT_U8 SupportCrossControllerRAID;   /* 1-support, 0-not support */
+	HPT_U8 MinimumBlockSizeShift;        /* minimum block size shift */
+	HPT_U8 MaximumBlockSizeShift;        /* maximum block size shift */
+
+	HPT_U8 SupportDiskModeSetting;
+	HPT_U8 SupportSparePool;
+	HPT_U8 MaximumArrayNameLength;
+	/* only one HPT_U8 left here! */
+#ifdef __BIG_ENDIAN_BITFIELD
+	HPT_U8 reserved: 2;
+	HPT_U8 SupportPerformanceMonitor: 1;
+	HPT_U8 SupportVariableSectorSize: 1;
+	HPT_U8 SupportHotSwap: 1;
+	HPT_U8 HighPerformanceRAID1: 1;
+	HPT_U8 RebuildProcessInDriver: 1;
+	HPT_U8 SupportDedicatedSpare: 1;
+#else 
+	HPT_U8 SupportDedicatedSpare: 1;     /* call hpt_add_dedicated_spare() for dedicated spare. */
+	HPT_U8 RebuildProcessInDriver: 1;    /* Windows only. used by mid layer for rebuild control. */
+	HPT_U8 HighPerformanceRAID1: 1;      
+	HPT_U8 SupportHotSwap: 1;
+	HPT_U8 SupportVariableSectorSize: 1;
+	HPT_U8 SupportPerformanceMonitor: 1;
+	HPT_U8 reserved: 2;
+#endif
+
+	
+	HPT_U8 SupportedRAIDTypes[16];
+	/* maximum members in an array corresponding to SupportedRAIDTypes */
+	HPT_U8 MaximumArrayMembers[16];
+}
+DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES;
+
+typedef struct _DRIVER_CAPABILITIES_V2 {
+	DRIVER_CAPABILITIES v1;
+	HPT_U8 SupportedCachePolicies[16];
+	HPT_U32 ConfigRegSize; /* max sectors */
+	HPT_U32 SupportDiskCachePolicy; /* disable/enable disk cache policy */
+	HPT_U32 Flags;
+	HPT_U32 reserved[14];
+}
+DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2;
+
+/*
+ * Controller information.
+ */
+typedef struct _CONTROLLER_INFO {
+	HPT_U8 ChipType;                    /* chip type */
+	HPT_U8 InterruptLevel;              /* IRQ level */
+	HPT_U8 NumBuses;                    /* bus count */
+	HPT_U8 ChipFlags;
+
+	HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
+	HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
+
+} CONTROLLER_INFO, *PCONTROLLER_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+typedef struct _CONTROLLER_INFO_V2 {
+	HPT_U8 ChipType;                    /* chip type */
+	HPT_U8 InterruptLevel;              /* IRQ level */
+	HPT_U8 NumBuses;                    /* bus count */
+	HPT_U8 ChipFlags;
+
+	HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
+	HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
+
+	HPT_U32 GroupId;                    /* low 32bit of vbus pointer the controller belongs
+										 * the master controller has CHIP_MASTER flag set*/
+	HPT_U8  pci_tree;
+	HPT_U8  pci_bus;
+	HPT_U8  pci_device;
+	HPT_U8  pci_function;
+
+	HPT_U32 ExFlags;
+} CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2;
+
+typedef struct _CONTROLLER_INFO_V2_EXT {
+	HPT_U8 MaxWidth;
+	HPT_U8 CurrentWidth;
+	HPT_U8 MaxSpeed;
+	HPT_U8 CurrentSpeed;
+	HPT_U8 reserve[64];
+} CONTROLLER_INFO_V2_EXT, *PCONTROLLER_INFO_V2_EXT;
+
+
+#define CEXF_IOPModel            1
+#define CEXF_SDRAMSize           2
+#define CEXF_BatteryInstalled    4
+#define CEXF_BatteryStatus       8
+#define CEXF_BatteryVoltage      0x10
+#define CEXF_BatteryBackupTime   0x20
+#define CEXF_FirmwareVersion     0x40
+#define CEXF_SerialNumber        0x80
+#define CEXF_BatteryTemperature  0x100
+#define CEXF_Power12v            0x200
+#define CEXF_Power5v             0x400
+#define CEXF_Power3p3v           0x800
+#define CEXF_Power2p5v           0x1000
+#define CEXF_Power1p8v           0x2000
+#define CEXF_Core1p8v            0x4000
+#define CEXF_Core1p2v            0x8000
+#define CEXF_DDR1p8v             0x10000
+#define CEXF_DDR1p8vRef          0x20000
+#define CEXF_CPUTemperature      0x40000
+#define CEXF_BoardTemperature    0x80000
+#define CEXF_FanSpeed            0x100000
+#define CEXF_Core1p0v            0x200000
+#define CEXF_Fan2Speed           0x400000
+#define CEXF_Power1p0v           0x800000
+#define CEXF_Power1p5v           0x1000000
+#define CEXF_SASAddress           0x2000000
+
+typedef struct _CONTROLLER_INFO_V3 {
+	HPT_U8 ChipType;
+	HPT_U8 InterruptLevel;
+	HPT_U8 NumBuses;
+	HPT_U8 ChipFlags;
+	HPT_U8 szProductID[MAX_NAME_LENGTH];
+	HPT_U8 szVendorID[MAX_NAME_LENGTH];
+	HPT_U32 GroupId;
+	HPT_U8  pci_tree;
+	HPT_U8  pci_bus;
+	HPT_U8  pci_device;
+	HPT_U8  pci_function;
+	HPT_U32 ExFlags;
+	HPT_U8  IOPModel[32];
+	HPT_U32 SDRAMSize;
+	HPT_U8  BatteryInstalled; 
+	HPT_U8  BatteryStatus; 
+	HPT_U16 BatteryVoltage; 
+	HPT_U32 BatteryBackupTime; 
+	HPT_U32 FirmwareVersion;
+	HPT_U8  SerialNumber[32];
+	HPT_U8  BatteryMBInstalled; 
+	HPT_U8  BatteryTemperature; 
+	signed char CPUTemperature;
+	signed char BoardTemperature;
+	HPT_U16 FanSpeed;
+	HPT_U16 Power12v;
+	HPT_U16 Power5v;
+	HPT_U16 Power3p3v;
+	HPT_U16 Power2p5v;
+	HPT_U16 Power1p8v;
+	HPT_U16 Core1p8v;
+	HPT_U16 Core1p2v;
+	HPT_U16 DDR1p8v;
+	HPT_U16 DDR1p8vRef;
+	HPT_U16 Core1p0v;
+	HPT_U16 Fan2Speed;
+	HPT_U16 Power1p0v;
+	HPT_U16 Power1p5v;	
+	HPT_U8  SASAddress[8];
+	HPT_U8  reserve[48];
+}
+CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3;
+typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1];
+#endif
+/*
+ * Channel information.
+ */
+typedef struct _CHANNEL_INFO {
+	HPT_U32         IoPort;         /* IDE Base Port Address */
+	HPT_U32         ControlPort;    /* IDE Control Port Address */
+
+	DEVICEID    Devices[2];         /* device connected to this channel */
+
+} CHANNEL_INFO, *PCHANNEL_INFO;
+
+typedef struct _CHANNEL_INFO_V2 {
+	HPT_U32         IoPort;         /* IDE Base Port Address */
+	HPT_U32         ControlPort;    /* IDE Control Port Address */
+
+	DEVICEID        Devices[2+13];    /* device connected to this channel, PMPort max=15 */
+} CHANNEL_INFO_V2, *PCHANNEL_INFO_V2;
+
+typedef struct _ENCLOSURE_INFO {
+	HPT_U8  EnclosureType;
+	HPT_U8  NumberOfPhys;
+	HPT_U8  AttachedTo; 
+	HPT_U8  Status;
+	HPT_U8  VendorId[8];
+	HPT_U8  ProductId[16];
+	HPT_U8  ProductRevisionLevel[4];
+	HPT_U32 PortPhyMap;
+	HPT_U32 reserve[55];
+} ENCLOSURE_INFO, *PENCLOSURE_INFO;
+
+
+typedef struct _SES_ELEMENT_STATUS {
+	HPT_U8   ElementType;
+	HPT_U8   ElementOverallIndex;
+	HPT_U8   ElementStatus;
+	HPT_U8   Reserved;
+	HPT_U32 ElementValue;
+	HPT_U8   ElementDescriptor[32];
+}SES_ELEMENT_STATUS,*PSES_ELEMENT_STATUS;
+
+#define MAX_ELEMENT_COUNT  80
+/* Element Type */
+#define SES_TYPE_UNSPECIFIED         0x00
+#define SES_TYPE_DEVICE              0x01
+#define SES_TYPE_POWER_SUPPLY        0x02
+#define SES_TYPE_FAN                 0x03
+#define SES_TYPE_TEMPERATURE_SENSOR  0x04
+#define SES_TYPE_DOOR_LOCK           0x05
+#define SES_TYPE_SPEAKER             0x06
+#define SES_TYPE_ES_CONTROLLER       0x07
+#define SES_TYPE_SCC_CONTROLLER      0x08
+#define SES_TYPE_NONVOLATILE_CACHE   0x09
+#define SES_TYPE_UPS                 0x0B
+#define SES_TYPE_DISPLAY             0x0C
+#define SES_TYPE_KEYPAD              0x0D
+#define SES_TYPE_ENCLOSURE           0x0E
+#define SES_TYPE_SCSI_TRANSCEIVER    0x0F
+#define SES_TYPE_LANGUAGE            0x10
+#define SES_TYPE_COMM_PORT           0x11
+#define SES_TYPE_VOLTAGE_SENSOR      0x12
+#define SES_TYPE_CURRENT_SENSOR      0x13
+#define SES_TYPE_SCSI_TARGET_PORT    0x14
+#define SES_TYPE_SCSI_INITIATOR_PORT 0x15
+#define SES_TYPE_SIMPLE_SUBENCLOSURE 0x16
+#define SES_TYPE_ARRAY_DEVICE        0x17
+#define SES_TYPE_VENDOR_SPECIFIC     0x80
+
+/* Element Status */
+
+#define	SES_STATUS_UNSUPPORTED   		0x00
+#define	SES_STATUS_OK					0x01
+#define	SES_STATUS_CRITICAL			0x02
+#define	SES_STATUS_NONCRITICAL 		0x03
+#define	SES_STATUS_UNRECOVERABLE	0x04
+#define	SES_STATUS_NOTINSTALLED		0x05
+#define	SES_STATUS_UNKNOWN			0x06
+#define	SES_STATUS_NOTAVAILABLE		0x07
+#define	SES_STATUS_RESERVED			0x08
+
+
+typedef struct _ENCLOSURE_INFO_V2 {
+	HPT_U8  EnclosureType;
+	HPT_U8  NumberOfPhys;
+	HPT_U8  AttachedTo; 
+	HPT_U8  Status;
+	HPT_U8  VendorId[8];
+	HPT_U8  ProductId[16];
+	HPT_U8  ProductRevisionLevel[4];
+	HPT_U32 PortPhyMap;
+	SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
+} ENCLOSURE_INFO_V2, *PENCLOSURE_INFO_V2;
+
+typedef struct _ENCLOSURE_INFO_V3 {
+	HPT_U8  EnclosureType;
+	HPT_U8  NumberOfPhys;
+	HPT_U8  AttachedTo; 
+	HPT_U8  Status;
+	HPT_U8  VendorId[8];
+	HPT_U8  ProductId[16];
+	HPT_U8  ProductRevisionLevel[4];
+	HPT_U32 PortPhyMap;
+	HPT_U32	UnitId;	/*272x card has two Cores, unitId is used to distinguish them */
+	HPT_U32 reserved[32];
+	SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
+} ENCLOSURE_INFO_V3, *PENCLOSURE_INFO_V3;
+
+typedef struct _ENCLOSURE_INFO_V4 {
+	HPT_U8  EnclosureType;
+	HPT_U8  NumberOfPhys;
+	HPT_U8  AttachedTo; 
+	HPT_U8  Status;
+	HPT_U8  VendorId[8];
+	HPT_U8  ProductId[16];
+	HPT_U8  ProductRevisionLevel[4];
+	HPT_U32 PortPhyMap;
+	HPT_U32	UnitId;	/*272x card has two Cores, unitId is used to distinguish them */
+	HPT_U32 ElementCount;
+	HPT_U32 reserved[32];
+} ENCLOSURE_INFO_V4, *PENCLOSURE_INFO_V4;
+
+#define ENCLOSURE_STATUS_OFFLINE 1
+
+#define ENCLOSURE_TYPE_INTERNAL 0
+#define ENCLOSURE_TYPE_SMP      1
+#define ENCLOSURE_TYPE_PM       2
+
+#ifndef __KERNEL__
+/*
+ * time represented in HPT_U32 format
+ */
+typedef struct _TIME_RECORD {
+   HPT_U32        seconds:6;      /* 0 - 59 */
+   HPT_U32        minutes:6;      /* 0 - 59 */
+   HPT_U32        month:4;        /* 1 - 12 */
+   HPT_U32        hours:6;        /* 0 - 59 */
+   HPT_U32        day:5;          /* 1 - 31 */
+   HPT_U32        year:5;         /* 0=2000, 31=2031 */
+} TIME_RECORD;
+#endif
+
+/*
+ * Array information.
+ */
+typedef struct _HPT_ARRAY_INFO {
+	HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
+	HPT_U8      Description[64];        /* array description */
+	HPT_U8      CreateManager[16];      /* who created it */
+	TIME_RECORD CreateTime;             /* when created it */
+
+	HPT_U8      ArrayType;              /* array type */
+	HPT_U8      BlockSizeShift;         /* stripe size */
+	HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
+	HPT_U8      SubArrayType;
+
+	HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
+	HPT_U32     Members[MAX_ARRAY_MEMBERS_V1];  /* member array/disks */
+
+	/*
+	 * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0);
+	 * only valid if rebuilding is done by driver code.
+	 * Member Flags will have ARRAY_FLAG_REBUILDING set at this case.
+	 * Verify operation use same fields below, the only difference is
+	 * ARRAY_FLAG_VERIFYING is set.
+	 */
+	HPT_U32     RebuildingProgress;
+	HPT_U32     RebuiltSectors; /* rebuilding point (LBA) for single member */
+
+} HPT_ARRAY_INFO, *PHPT_ARRAY_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01010000
+typedef struct _HPT_ARRAY_INFO_V2 {
+	HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
+	HPT_U8      Description[64];        /* array description */
+	HPT_U8      CreateManager[16];      /* who created it */
+	TIME_RECORD CreateTime;             /* when created it */
+
+	HPT_U8      ArrayType;              /* array type */
+	HPT_U8      BlockSizeShift;         /* stripe size */
+	HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
+	HPT_U8      SubArrayType;
+
+	HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
+	HPT_U32     Members[MAX_ARRAY_MEMBERS_V2];  /* member array/disks */
+
+	HPT_U32     RebuildingProgress;
+	HPT_U64     RebuiltSectors; /* rebuilding point (LBA) for single member */
+
+	HPT_U32     reserve4[4];
+} HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+typedef struct _HPT_ARRAY_INFO_V3 {
+	HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
+	HPT_U8      Description[64];        /* array description */
+	HPT_U8      CreateManager[16];      /* who created it */
+	TIME_RECORD CreateTime;             /* when created it */
+
+	HPT_U8      ArrayType;              /* array type */
+	HPT_U8      BlockSizeShift;         /* stripe size */
+	HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
+	HPT_U8      SubArrayType;
+
+	HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
+	HPT_U32     Members[MAX_ARRAY_MEMBERS_V2];  /* member array/disks */
+
+	HPT_U32     RebuildingProgress;
+	HPT_U64     RebuiltSectors;         /* rebuilding point (LBA) for single member */
+
+	DEVICEID    TransformSource;
+	DEVICEID    TransformTarget;        /* destination device ID */
+	HPT_U32     TransformingProgress;
+	HPT_U32     Signature;              /* persistent identification*/
+#if MAX_ARRAY_MEMBERS_V2==16
+	HPT_U16     Critical_Members;       /* bit mask of critical members */
+	HPT_U16     reserve2;
+	HPT_U32     reserve;
+#else 
+	HPT_U32     Critical_Members;
+	HPT_U32     reserve;
+#endif
+} HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x02000001
+typedef struct _HPT_ARRAY_INFO_V4 {
+	HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
+	HPT_U8      Description[64];        /* array description */
+	HPT_U8      CreateManager[16];      /* who created it */
+	TIME_RECORD CreateTime;             /* when created it */
+
+	HPT_U8      ArrayType;              /* array type */
+	HPT_U8      BlockSizeShift;         /* stripe size */
+	HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
+	HPT_U8      SubArrayType;
+
+	HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
+
+	HPT_U32     RebuildingProgress;
+	HPT_U64     RebuiltSectors; /* rebuilding point (LBA) for single member */
+
+	DEVICEID    TransformSource;
+	DEVICEID    TransformTarget;   /* destination device ID */
+	HPT_U32     TransformingProgress;
+	HPT_U32     Signature;          /* persistent identification*/
+	HPT_U8       SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
+	HPT_U8       reserved2[7];
+	HPT_U64     Critical_Members;
+	HPT_U32     Members[MAX_ARRAY_MEMBERS_V3];  /* member array/disks */
+} HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4;
+#endif
+
+
+/*
+ * ATA/ATAPI Device identify data without the Reserved4.
+ */
+typedef struct _IDENTIFY_DATA2 {
+	HPT_U16 GeneralConfiguration;
+	HPT_U16 NumberOfCylinders;
+	HPT_U16 Reserved1;
+	HPT_U16 NumberOfHeads;
+	HPT_U16 UnformattedBytesPerTrack;
+	HPT_U16 UnformattedBytesPerSector;
+	HPT_U8  SasAddress[8];
+	HPT_U16 SerialNumber[10];
+	HPT_U16 BufferType;
+	HPT_U16 BufferSectorSize;
+	HPT_U16 NumberOfEccBytes;
+	HPT_U16 FirmwareRevision[4];
+	HPT_U16 ModelNumber[20];
+	HPT_U8  MaximumBlockTransfer;
+	HPT_U8  VendorUnique2;
+	HPT_U16 DoubleWordIo;
+	HPT_U16 Capabilities;
+	HPT_U16 Reserved2;
+	HPT_U8  VendorUnique3;
+	HPT_U8  PioCycleTimingMode;
+	HPT_U8  VendorUnique4;
+	HPT_U8  DmaCycleTimingMode;
+	HPT_U16 TranslationFieldsValid;
+	HPT_U16 NumberOfCurrentCylinders;
+	HPT_U16 NumberOfCurrentHeads;
+	HPT_U16 CurrentSectorsPerTrack;
+	HPT_U32 CurrentSectorCapacity;
+	HPT_U16 CurrentMultiSectorSetting;
+	HPT_U32 UserAddressableSectors;
+	HPT_U8  SingleWordDMASupport;
+	HPT_U8  SingleWordDMAActive;
+	HPT_U8  MultiWordDMASupport;
+	HPT_U8  MultiWordDMAActive;
+	HPT_U8  AdvancedPIOModes;
+	HPT_U8  Reserved4;
+	HPT_U16 MinimumMWXferCycleTime;
+	HPT_U16 RecommendedMWXferCycleTime;
+	HPT_U16 MinimumPIOCycleTime;
+	HPT_U16 MinimumPIOCycleTimeIORDY;
+	HPT_U16 Reserved5[2];
+	HPT_U16 ReleaseTimeOverlapped;
+	HPT_U16 ReleaseTimeServiceCommand;
+	HPT_U16 MajorRevision;
+	HPT_U16 MinorRevision;
+} __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2;
+
+/*
+ * physical device information.
+ * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
+ */
+typedef struct _DEVICE_INFO {
+	HPT_U8   ControllerId;          /* controller id */
+	HPT_U8   PathId;                /* bus */
+	HPT_U8   TargetId;              /* id */
+	HPT_U8   DeviceModeSetting;     /* Current Data Transfer mode: 0-4 PIO 0-4 */
+									/* 5-7 MW DMA0-2, 8-13 UDMA0-5             */
+	HPT_U8   DeviceType;            /* device type */
+	HPT_U8   UsableMode;            /* highest usable mode */
+
+#ifdef __BIG_ENDIAN_BITFIELD
+	HPT_U8   NCQEnabled: 1;
+	HPT_U8   NCQSupported: 1;
+	HPT_U8   TCQEnabled: 1;
+	HPT_U8   TCQSupported: 1;
+	HPT_U8   WriteCacheEnabled: 1;
+	HPT_U8   WriteCacheSupported: 1;
+	HPT_U8   ReadAheadEnabled: 1;
+	HPT_U8   ReadAheadSupported: 1;
+	HPT_U8   reserved6: 6;
+	HPT_U8   SpinUpMode: 2;
+#else 
+	HPT_U8   ReadAheadSupported: 1;
+	HPT_U8   ReadAheadEnabled: 1;
+	HPT_U8   WriteCacheSupported: 1;
+	HPT_U8   WriteCacheEnabled: 1;
+	HPT_U8   TCQSupported: 1;
+	HPT_U8   TCQEnabled: 1;
+	HPT_U8   NCQSupported: 1;
+	HPT_U8   NCQEnabled: 1;
+	HPT_U8   SpinUpMode: 2;
+	HPT_U8   reserved6: 6;
+#endif
+
+	HPT_U32     Flags;              /* working flags, see DEVICE_FLAG_XXX */
+
+	IDENTIFY_DATA2 IdentifyData;    /* Identify Data of this device */
+
+}
+__attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+#define MAX_PARENTS_PER_DISK    8
+/*
+ * physical device information.
+ * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
+ */
+typedef struct _DEVICE_INFO_V2 {
+	HPT_U8   ControllerId;          /* controller id */
+	HPT_U8   PathId;                /* bus */
+	HPT_U8   TargetId;              /* id */
+	HPT_U8   DeviceModeSetting;     /* Current Data Transfer mode: 0-4 PIO 0-4 */
+									/* 5-7 MW DMA0-2, 8-13 UDMA0-5             */
+	HPT_U8   DeviceType;            /* device type */
+	HPT_U8   UsableMode;            /* highest usable mode */
+
+#ifdef __BIG_ENDIAN_BITFIELD
+	HPT_U8   NCQEnabled: 1;
+	HPT_U8   NCQSupported: 1;
+	HPT_U8   TCQEnabled: 1;
+	HPT_U8   TCQSupported: 1;
+	HPT_U8   WriteCacheEnabled: 1;
+	HPT_U8   WriteCacheSupported: 1;
+	HPT_U8   ReadAheadEnabled: 1;
+	HPT_U8   ReadAheadSupported: 1;
+	HPT_U8   reserved6: 6;
+	HPT_U8   SpinUpMode: 2;
+#else 
+	HPT_U8   ReadAheadSupported: 1;
+	HPT_U8   ReadAheadEnabled: 1;
+	HPT_U8   WriteCacheSupported: 1;
+	HPT_U8   WriteCacheEnabled: 1;
+	HPT_U8   TCQSupported: 1;
+	HPT_U8   TCQEnabled: 1;
+	HPT_U8   NCQSupported: 1;
+	HPT_U8   NCQEnabled: 1;
+	HPT_U8   SpinUpMode: 2;
+	HPT_U8   reserved6: 6;
+#endif
+
+	HPT_U32     Flags;              /* working flags, see DEVICE_FLAG_XXX */
+
+	IDENTIFY_DATA2 IdentifyData;    /* Identify Data of this device */
+
+	HPT_U64 TotalFree;
+	HPT_U64 MaxFree;
+	HPT_U64 BadSectors;
+	DEVICEID ParentArrays[MAX_PARENTS_PER_DISK];
+
+}
+__attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3;
+
+/*
+ * HPT601 information
+ */
+#endif
+/*
+ * HPT601 information
+ */
+#define HPT601_INFO_DEVICEID      1
+#define HPT601_INFO_TEMPERATURE   2
+#define HPT601_INFO_FANSTATUS     4
+#define HPT601_INFO_BEEPERCONTROL 8
+#define HPT601_INFO_LED1CONTROL   0x10
+#define HPT601_INFO_LED2CONTROL   0x20
+#define HPT601_INFO_POWERSTATUS   0x40
+
+typedef struct _HPT601_INFO_ {
+	HPT_U16 ValidFields;        /* mark valid fields below */
+	HPT_U16 DeviceId;           /* 0x5A3E */
+	HPT_U16 Temperature;        /* Read: temperature sensor value. Write: temperature limit */
+	HPT_U16 FanStatus;          /* Fan status */
+	HPT_U16 BeeperControl;      /* bit4: beeper control bit. bit0-3: frequency bits */
+	HPT_U16 LED1Control;        /* bit4: twinkling control bit. bit0-3: frequency bits */
+	HPT_U16 LED2Control;        /* bit4: twinkling control bit. bit0-3: frequency bits */
+	HPT_U16 PowerStatus;        /* 1: has power 2: no power */
+} HPT601_INFO, *PHPT601_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01010000
+#ifndef __KERNEL__
+/* cache policy for each vdev, copied from ldm.h */
+#define CACHE_POLICY_NONE 0
+#define CACHE_POLICY_WRITE_THROUGH 1
+#define CACHE_POLICY_WRITE_BACK 2
+
+#endif
+#endif
+/*
+ * Logical device information.
+ * Union of ArrayInfo and DeviceInfo.
+ * Common properties will be put in logical device information.
+ */
+typedef struct _LOGICAL_DEVICE_INFO {
+	HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
+	HPT_U8      reserved[3];
+
+	HPT_U32     Capacity;               /* array capacity */
+	DEVICEID    ParentArray;
+
+	union {
+		HPT_ARRAY_INFO array;
+		DEVICE_INFO device;
+	} __attribute__((packed)) u;
+
+} __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01010000
+typedef struct _LOGICAL_DEVICE_INFO_V2 {
+	HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
+	HPT_U8      reserved[3];
+
+	HPT_U64     Capacity;               /* array capacity */
+	DEVICEID    ParentArray;            /* for physical device, Please don't use this field.
+										 * use ParentArrays field in DEVICE_INFO_V2
+										 */
+
+	union {
+		HPT_ARRAY_INFO_V2 array;
+		DEVICE_INFO device;
+	} __attribute__((packed)) u;
+
+} __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+#define INVALID_TARGET_ID   0xFF
+#define INVALID_BUS_ID      0xFF
+typedef struct _LOGICAL_DEVICE_INFO_V3 {
+	HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
+	HPT_U8      CachePolicy;            /* refer to CACHE_POLICY_xxx */
+	HPT_U8      VBusId;                 /* vbus sequence in vbus_list */
+	HPT_U8      TargetId;               /* OS target id. Value 0xFF is invalid */
+										/* OS disk name: HPT DISK $VBusId_$TargetId */
+	HPT_U64     Capacity;               /* array capacity */
+	DEVICEID    ParentArray;            /* for physical device, don't use this field.
+										 * use ParentArrays field in DEVICE_INFO_V2 instead.
+										 */
+	HPT_U32     TotalIOs;
+	HPT_U32     TobalMBs;
+	HPT_U32     IOPerSec;
+	HPT_U32     MBPerSec;
+
+	union {
+		HPT_ARRAY_INFO_V3 array;
+		DEVICE_INFO_V2 device;
+	} __attribute__((packed)) u;
+
+}
+__attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x02000001
+typedef struct _LOGICAL_DEVICE_INFO_V4 {
+	HPT_U32    dwSize;
+	HPT_U8      revision;
+	HPT_U8      reserved[7];
+
+	HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
+	HPT_U8      CachePolicy;            /* refer to CACHE_POLICY_xxx */
+	HPT_U8      VBusId;                 /* vbus sequence in vbus_list */
+	HPT_U8      TargetId;               /* OS target id. Value 0xFF is invalid */
+										/* OS disk name: HPT DISK $VBusId_$TargetId */
+	HPT_U64     Capacity;               /* array capacity */
+	DEVICEID    ParentArray;            /* for physical device, don't use this field.
+										 * use ParentArrays field in DEVICE_INFO_V2 instead.
+										 */
+	HPT_U32     TotalIOs;
+	HPT_U32     TobalMBs;
+	HPT_U32     IOPerSec;
+	HPT_U32     MBPerSec;
+
+	union {
+		HPT_ARRAY_INFO_V4 array;
+		DEVICE_INFO_V3 device;
+	} __attribute__((packed)) u;
+}
+__attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4;
+
+/*LOGICAL_DEVICE_INFO_V4 max revision number*/
+#define LOGICAL_DEVICE_INFO_V4_REVISION 0
+/*If new revision was defined please check evey revision size*/
+#define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4))
+#endif
+
+/*
+ * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info()
+ * and set_device_info().
+ * When set_xxx_info() is called, the ValidFields member indicates which
+ * fields in the structure are valid.
+ */
+/* field masks */
+#define AAIF_NAME           1
+#define AAIF_DESCRIPTION    2
+
+#define ADIF_MODE           1
+#define ADIF_TCQ            2
+#define ADIF_NCQ            4
+#define ADIF_WRITE_CACHE    8
+#define ADIF_READ_AHEAD     0x10
+#define ADIF_SPIN_UP_MODE   0x20
+#define ADIF_SET_BAD        0x40
+
+typedef struct _ALTERABLE_ARRAY_INFO {
+	HPT_U32   ValidFields;              /* mark valid fields below */
+	HPT_U8  Name[MAX_ARRAYNAME_LEN];    /* array name */
+	HPT_U8  Description[64];            /* array description */
+}__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO;
+
+typedef struct _ALTERABLE_DEVICE_INFO {
+	HPT_U32   ValidFields;              /* mark valid fields below */
+	HPT_U8   DeviceModeSetting;         /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
+}__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO;
+
+typedef struct _ALTERABLE_DEVICE_INFO_V2 {
+	HPT_U32   ValidFields;              /* mark valid fields below */
+	HPT_U8   DeviceModeSetting;         /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
+	HPT_U8   TCQEnabled;
+	HPT_U8   NCQEnabled;
+	HPT_U8   WriteCacheEnabled;
+	HPT_U8   ReadAheadEnabled;
+	HPT_U8   SpinUpMode;
+	HPT_U8   SetBadSector;
+	HPT_U8   reserve[1];
+	HPT_U32  reserve2[13]; /* pad to 64 bytes */
+}__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2;
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+
+#define TARGET_TYPE_DEVICE  0
+#define TARGET_TYPE_ARRAY   1
+
+
+#define AIT_NAME            0
+#define AIT_DESCRIPTION     1
+#define AIT_CACHE_POLICY    2
+
+
+#define DIT_MODE        0
+#define DIT_READ_AHEAD  1
+#define DIT_WRITE_CACHE 2
+#define DIT_TCQ         3
+#define DIT_NCQ         4
+#define DIT_IDENTIFY    5
+
+#define DISK_CACHE_POLICY_UNCHANGE 0
+#define DISK_CACHE_POLICY_ENABLE 1
+#define DISK_CACHE_POLICY_DISABLE 2
+
+/* param type is determined by target_type and info_type*/
+typedef struct _SET_DEV_INFO
+{
+	HPT_U8 target_type;
+	HPT_U8 infor_type;
+	HPT_U16 param_length;
+	#define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO))
+	/* HPT_U8 param[0]; */
+} SET_VDEV_INFO, * PSET_VDEV_INFO;
+
+typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ;
+typedef HPT_U8 PARAM_ARRAY_DES[64];
+typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY;
+
+#endif
+
+/*
+ * CREATE_ARRAY_PARAMS
+ *  Param structure used to create an array.
+ */
+typedef struct _CREATE_ARRAY_PARAMS {
+	HPT_U8 ArrayType;                   /* 1-level array type */
+	HPT_U8 nDisk;                       /* number of elements in Members[] array */
+	HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
+	HPT_U8 CreateFlags;                 /* See CAF_xxx */
+
+	HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
+	HPT_U8      Description[64];        /* array description */
+	HPT_U8      CreateManager[16];      /* who created it */
+	TIME_RECORD CreateTime;             /* when created it */
+
+	HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */
+
+} CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS;
+
+#if HPT_INTERFACE_VERSION>=0x01010000
+typedef struct _CREATE_ARRAY_PARAMS_V2 {
+	HPT_U8 ArrayType;                   /* 1-level array type */
+	HPT_U8 nDisk;                       /* number of elements in Members[] array */
+	HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
+	HPT_U8 CreateFlags;                 /* See CAF_xxx */
+
+	HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
+	HPT_U8 Description[64];             /* array description */
+	HPT_U8 CreateManager[16];           /* who created it */
+	TIME_RECORD CreateTime;             /* when created it */
+	HPT_U64 Capacity;
+
+	HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */
+
+} CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x02000001
+typedef struct _CREATE_ARRAY_PARAMS_V3 {
+	HPT_U32  dwSize;
+	HPT_U8 revision;			/*CREATE_ARRAY_PARAMS_V3_REVISION*/
+	HPT_U8 diskCachePolicy;  /*unchange:0 enable:1 disable:2*/
+	HPT_U8 reserved[4];
+	HPT_U8 subDisks;            /* RAIDn0 sub array */
+	HPT_U8 SectorSizeShift;     /*sector size = 512B<<SectorSizeShift*/
+	HPT_U8 ArrayType;                   /* 1-level array type */
+	HPT_U8 nDisk;                       /* number of elements in Members[] array */
+	HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
+	HPT_U8 CreateFlags;                 /* See CAF_xxx */
+
+	HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
+	HPT_U8 Description[64];     /* array description */
+	HPT_U8 CreateManager[16];       /* who created it */
+	TIME_RECORD CreateTime;             /* when created it */
+	HPT_U64 Capacity;
+
+	HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */
+} CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3;
+
+/*CREATE_ARRAY_PARAMS_V3 current max revision*/
+#define CREATE_ARRAY_PARAMS_V3_REVISION 0
+/*If new revision defined please check evey revision size*/
+#define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3))
+#endif
+
+#if HPT_INTERFACE_VERSION < 0x01020000
+/*
+ * Flags used for creating an RAID 1 array
+ *
+ * CAF_CREATE_AND_DUPLICATE
+ *    Copy source disk contents to target for RAID 1. If user choose "create and duplicate"
+ *    to create an array, GUI will call CreateArray() with this flag set. Then GUI should
+ *    call hpt_get_device_info() with the returned array ID and check returned flags to
+ *    see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding
+ *    and GUI must do duplication itself.
+ * CAF_DUPLICATE_MUST_DONE
+ *    If the duplication is aborted or fails, do not create the array.
+ */
+#define CAF_CREATE_AND_DUPLICATE 1
+#define CAF_DUPLICATE_MUST_DONE  2
+#define CAF_CREATE_AS_RAID15     4
+/*
+ * Flags used for creating an RAID 5 array
+ */
+#define CAF_CREATE_R5_NO_BUILD     1
+#define CAF_CREATE_R5_ZERO_INIT    2
+#define CAF_CREATE_R5_BUILD_PARITY 4
+
+#else 
+/*
+ * Flags used for creating
+ */
+#define CAF_FOREGROUND_INITIALIZE   1
+#define CAF_BACKGROUND_INITIALIZE   2
+#define CAF_CREATE_R5_WRITE_BACK    (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT)
+
+
+#define CAF_CACHE_POLICY_MASK       0x1C
+#define CAF_CACHE_POLICY_SHIFT      2
+
+#endif
+
+#define CAF_KEEP_DATA_ALWAYS     0x80
+
+/* Flags used for deleting an array
+ *
+ * DAF_KEEP_DATA_IF_POSSIBLE
+ *    If this flag is set, deleting a RAID 1 array will not destroy the data on both disks.
+ *    Deleting a JBOD should keep partitions on first disk ( not implement now ).
+ *    Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ).
+ */
+#define DAF_KEEP_DATA_IF_POSSIBLE 1
+#define DAF_KEEP_DATA_ALWAYS      2
+
+/*
+ * event types
+ */
+#define ET_DEVICE_REMOVED   1   /* device removed */
+#define ET_DEVICE_PLUGGED   2   /* device plugged */
+#define ET_DEVICE_ERROR     3   /* device I/O error */
+#define ET_REBUILD_STARTED  4
+#define ET_REBUILD_ABORTED  5
+#define ET_REBUILD_FINISHED 6
+#define ET_SPARE_TOOK_OVER  7
+#define ET_REBUILD_FAILED   8
+#define ET_VERIFY_STARTED   9
+#define ET_VERIFY_ABORTED   10
+#define ET_VERIFY_FAILED    11
+#define ET_VERIFY_FINISHED  12
+#define ET_INITIALIZE_STARTED   13
+#define ET_INITIALIZE_ABORTED   14
+#define ET_INITIALIZE_FAILED    15
+#define ET_INITIALIZE_FINISHED  16
+#define ET_VERIFY_DATA_ERROR    17
+#define ET_TRANSFORM_STARTED    18
+#define ET_TRANSFORM_ABORTED    19
+#define ET_TRANSFORM_FAILED     20
+#define ET_TRANSFORM_FINISHED   21
+#define ET_SMART_FAILED         22
+#define ET_SMART_PASSED         23
+#define ET_SECTOR_REPAIR_FAIL     24
+#define ET_SECTOR_REPAIR_SUCCESS  25
+#define ET_ERASE_FAIL		26
+#define ET_ERASE_SUCCESS	27
+#define ET_CONTINUE_REBUILD_ON_ERROR 28
+
+
+/*
+ * event structure
+ */
+typedef struct _HPT_EVENT {
+	TIME_RECORD Time;
+	DEVICEID    DeviceID;
+	HPT_U8       EventType;
+	HPT_U8      reserved[3];
+
+	HPT_U8      Data[32]; /* various data depend on EventType */
+} HPT_EVENT, *PHPT_EVENT;
+
+/*
+ * IDE pass-through command. Use it at your own risk!
+ */
+typedef struct _IDE_PASS_THROUGH_HEADER {
+	DEVICEID idDisk;             /* disk ID */
+	HPT_U8     bFeaturesReg;     /* feature register */
+	HPT_U8     bSectorCountReg;  /* IDE sector count register. */
+	HPT_U8     bLbaLowReg;       /* IDE LBA low value. */
+	HPT_U8     bLbaMidReg;       /* IDE LBA mid register. */
+	HPT_U8     bLbaHighReg;      /* IDE LBA high value. */
+	HPT_U8     bDriveHeadReg;    /* IDE drive/head register. */
+	HPT_U8     bCommandReg;      /* Actual IDE command. Checked for validity by driver. */
+	HPT_U8     nSectors;         /* data size in sectors, if the command has data transfer */
+	HPT_U8     protocol;         /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
+	HPT_U8     reserve[3];
+	#define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER))
+	/* HPT_U8     DataBuffer[0]; */
+}
+IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER;
+
+typedef struct _IDE_PASS_THROUGH_HEADER_V2 {
+	DEVICEID idDisk;             /* disk ID */
+	HPT_U16    bFeaturesReg;     /* feature register */
+	HPT_U16    bSectorCountReg;  /* IDE sector count register. */
+	HPT_U16    bLbaLowReg;       /* IDE LBA low value. */
+	HPT_U16    bLbaMidReg;       /* IDE LBA mid register. */
+	HPT_U16    bLbaHighReg;      /* IDE LBA high value. */
+	HPT_U8     bDriveHeadReg;    /* IDE drive/head register. */
+	HPT_U8     bCommandReg;      /* Actual IDE command. Checked for validity by driver. */
+	HPT_U16    nSectors;         /* data size in sectors, if the command has data transfer */
+	HPT_U8     protocol;         /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
+	HPT_U8     reserve;
+	#define IDE_PASS_THROUGH_V2_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER_V2))
+	/* HPT_U8     DataBuffer[0]; */
+}
+IDE_PASS_THROUGH_HEADER_V2, *PIDE_PASS_THROUGH_HEADER_V2;
+
+typedef struct _HPT_SCSI_PASSTHROUGH_IN {
+	DEVICEID idDisk;
+	HPT_U8   protocol;
+	HPT_U8   reserve1;
+	HPT_U8   reserve2;
+	HPT_U8   cdbLength;
+	HPT_U8   cdb[16];
+	HPT_U32  dataLength;
+	/* data follows, if any */
+}
+HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN;
+
+typedef struct _HPT_SCSI_PASSTHROUGH_OUT {
+	HPT_U8   scsiStatus;
+	HPT_U8   reserve1;
+	HPT_U8   reserve2;
+	HPT_U8   reserve3;
+	HPT_U32  dataLength;
+	/* data/sense follows if any */
+}
+HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT;
+
+/*
+ * device io packet format
+ */
+typedef struct _DEVICE_IO_EX_PARAMS {
+	DEVICEID idDisk;
+	HPT_U32    Lba;
+	HPT_U16   nSectors;
+	HPT_U8    Command;    /* IO_COMMAD_xxx */
+	HPT_U8    BufferType; /* BUFFER_TYPE_xxx, see below */
+	HPT_U32    BufferPtr;
+}
+DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS;
+
+#define BUFFER_TYPE_LOGICAL              1 /* logical pointer to buffer */
+#define BUFFER_TYPE_PHYSICAL             2 /* physical address of buffer */
+#define BUFFER_TYPE_LOGICAL_LOGICAL_SG   3 /* logical pointer to logical S/G table */
+#define BUFFER_TYPE_LOGICAL_PHYSICAL_SG  4 /* logical pointer to physical S/G table */
+#define BUFFER_TYPE_PHYSICAL_LOGICAL_SG  5 /* physical address to logical S/G table */
+#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */
+#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */
+
+typedef struct _HPT_DRIVER_PARAMETER {
+	char    name[32];
+	HPT_U8  value[32];
+	HPT_U8  type;        /* HPT_DRIVER_PARAMETER_TYPE_* */
+	HPT_U8  persistent;
+	HPT_U8  reserve2[2];
+	HPT_U8  location;    /* 0 - system */
+	HPT_U8  controller;
+	HPT_U8  bus;
+	HPT_U8  reserve1;
+	char    desc[128];
+}
+HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER;
+
+#define HPT_DRIVER_PARAMETER_TYPE_INT 1
+#define HPT_DRIVER_PARAMETER_TYPE_BOOL 2
+
+typedef struct _HPT_PM_CMDSTAT {
+	HPT_U64 timeStamp;
+	HPT_U64 lba;
+	HPT_U16 sectors;
+	HPT_U16 reserved;
+	HPT_U32 rspTime;
+}
+HPT_PM_CMDSTAT, *PHPT_PM_CMDSTAT;
+
+#define HIGHEST_RSPTIME_CMD_SAVE 10
+#define RSPTIME_HISTOGRAM_SEGMENT_COUNT 38
+
+typedef struct _HPT_PM_IOSTAT {
+	HPT_PM_CMDSTAT highestRspCmdStatData[HIGHEST_RSPTIME_CMD_SAVE];
+	HPT_U32 rspTimeHistogram[RSPTIME_HISTOGRAM_SEGMENT_COUNT];
+	HPT_U16 pendingIo;
+	HPT_U16 activeIo;
+	HPT_U32 instantKBPs;
+	HPT_U32 averageKBPs;
+	HPT_U32 instantIOPs;
+	HPT_U32 averageIOPs;
+}
+HPT_PM_IOSTAT, *PHPT_PM_IOSTAT;
+
+/*
+ * disk config region
+ */
+typedef struct _ACCESS_CONFIG_REG {
+	DEVICEID  id;
+	HPT_U16   start;
+	HPT_U8    sectors;
+	HPT_U8    read;
+	HPT_U32   Reserved;
+	#define ACCESS_CONFIG_REG_buffer(p) ((HPT_U8 *)(p) + sizeof(ACCESS_CONFIG_REG_PARAMS))
+} __attribute__((packed))ACCESS_CONFIG_REG_PARAMS, *PACCESS_CONFIG_REG_PARAMS;
+
+/*
+ * dump meta data
+ */
+typedef struct _DUMP_METADATA {
+	DEVICEID  id;
+	HPT_U8    sectors;
+	HPT_U8    backsectors;
+	HPT_U8    offset;
+	HPT_U8    backoffset;
+} __attribute__((packed))DUMP_METADATA_PARAMS, *PDUMP_METADATA_PARAMS;
+
+
+
+/*
+ * ioctl structure
+ */
+#define HPT_IOCTL_MAGIC32 0x1A2B3C4D
+#define HPT_IOCTL_MAGIC   0xA1B2C3D4
+
+typedef struct _HPT_IOCTL_PARAM {
+	HPT_U32   Magic;                 /* used to check if it's a valid ioctl packet */
+	HPT_U32   dwIoControlCode;       /* operation control code */
+	HPT_PTR   lpInBuffer;            /* input data buffer */
+	HPT_U32   nInBufferSize;         /* size of input data buffer */
+	HPT_PTR   lpOutBuffer;           /* output data buffer */
+	HPT_U32   nOutBufferSize;        /* size of output data buffer */
+	HPT_PTR   lpBytesReturned;       /* count of HPT_U8s returned */
+}
+HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM;
+
+/* for 32-bit app running on 64-bit system */
+typedef struct _HPT_IOCTL_PARAM32 {
+	HPT_U32   Magic;
+	HPT_U32   dwIoControlCode;
+	HPT_U32   lpInBuffer;
+	HPT_U32   nInBufferSize;
+	HPT_U32   lpOutBuffer;
+	HPT_U32   nOutBufferSize;
+	HPT_U32   lpBytesReturned;
+}
+HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32;
+
+#if !defined(__KERNEL__) || defined(SIMULATE)
+/*
+ * User-mode ioctl parameter passing conventions:
+ *   The ioctl function implementation is platform specific, so we don't
+ * have forced rules for it. However, it's suggested to use a parameter
+ * passing method as below
+ *   1) Put all input data continuously in an input buffer.
+ *   2) Prepare an output buffer with enough size if needed.
+ *   3) Fill a HPT_IOCTL_PARAM structure.
+ *   4) Pass the structure to driver through a platform-specific method.
+ * This is implemented in the mid-layer user-mode library. The UI
+ * programmer needn't care about it.
+ */
+
+/************************************************************************
+ * User mode functions
+ ************************************************************************/
+/*
+ * hpt_get_version
+ * Version compatibility: all versions
+ * Parameters:
+ *  None
+ * Returns:
+ *  interface version. 0 when fail.
+ */
+HPT_U32 hpt_get_version(void);
+
+/*
+ * hpt_get_driver_capabilities
+ * Version compatibility: v1.0.0.2 or later
+ * Parameters:
+ *  Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set
+ *  dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this
+ *  member to see if it's correct.
+ * Returns:
+ *  0 - Success
+ */
+int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap);
+int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap);
+
+/*
+ * hpt_get_controller_count
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  None
+ * Returns:
+ *  number of controllers
+ */
+int hpt_get_controller_count(void);
+
+/* hpt_get_controller_info
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      Controller id
+ *  pInfo   pointer to CONTROLLER_INFO buffer
+ * Returns:
+ *  0       Success, controller info is put into (*pInfo ).
+ */
+int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo);
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+/* hpt_get_controller_info_v2
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  id      Controller id
+ *  pInfo   pointer to CONTROLLER_INFO_V2 buffer
+ * Returns:
+ *  0       Success, controller info is put into (*pInfo ).
+ */
+int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo);
+
+/* hpt_get_controller_info_v2_ext
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  id      Controller id
+ *  pInfo   pointer to CONTROLLER_INFO_V2_EXT buffer
+ * Returns:
+ *  0       Success, controller info is put into (*pInfo ).
+ */
+int hpt_get_controller_info_v2_ext(int id, PCONTROLLER_INFO_V2_EXT pInfo);
+
+/* hpt_get_controller_info_v3
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  id      Controller id
+ *  pInfo   pointer to CONTROLLER_INFO_V3 buffer
+ * Returns:
+ *  0       Success, controller info is put into (*pInfo ).
+ */
+int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo);
+#endif
+
+/* hpt_get_channel_info
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      Controller id
+ *  bus     bus number
+ *  pInfo   pointer to CHANNEL_INFO buffer
+ * Returns:
+ *  0       Success, channel info is put into (*pInfo ).
+ */
+int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo);
+
+/* hpt_get_channel_info_v2
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      Controller id
+ *  bus     bus number
+ *  pInfo   pointer to CHANNEL_INFO buffer
+ * Returns:
+ *  0       Success, channel info is put into (*pInfo ).
+ */
+int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo);
+
+/* hpt_get_logical_devices
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  pIds        pointer to a DEVICEID array
+ *  nMaxCount   array size
+ * Returns:
+ *  Number of ID returned. All logical device IDs are put into pIds array.
+ *  Note: A spare disk is not a logical device.
+ */
+int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount);
+
+/* hpt_get_physical_devices
+ * Version compatibility: v2.1.0.0 or later
+ * Parameters:
+ *  pIds        pointer to a DEVICEID array
+ *  nMaxCount   array size
+ * Returns:
+ *  Number of ID returned. All physical device IDs are put into pIds array.
+ */
+int hpt_get_physical_devices(DEVICEID * pIds, int nMaxCount);
+
+/* hpt_get_device_info
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      logical device id
+ *  pInfo   pointer to LOGICAL_DEVICE_INFO structure
+ * Returns:
+ *  0 - Success
+ */
+int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo);
+
+/* hpt_create_array
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  pParam      pointer to CREATE_ARRAY_PARAMS structure
+ * Returns:
+ *  0   failed
+ *  else return array id
+ */
+DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam);
+
+/* hpt_delete_array
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      array id
+ * Returns:
+ *  0   Success
+ */
+int hpt_delete_array(DEVICEID id, HPT_U32 options);
+
+/* hpt_device_io
+ *  Read/write data on array and physcal device.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      device id. If it's an array ID, IO will be performed on the array.
+ *          If it's a physical device ID, IO will be performed on the device.
+ *  cmd     IO_COMMAND_READ or IO_COMMAND_WRITE
+ *  buffer  data buffer
+ *  length  data size
+ * Returns:
+ *  0   Success
+ */
+int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer);
+
+/* hpt_add_disk_to_array
+ *   Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array.
+ *   Auto-rebuild will start.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  idArray     array id
+ *  idDisk      disk id
+ * Returns:
+ *  0   Success
+ */
+int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk);
+
+/* hpt_add_spare_disk
+ * Version compatibility: v1.0.0.1 or later
+ *   Add a disk to spare pool.
+ * Parameters:
+ *  idDisk      disk id
+ * Returns:
+ *  0   Success
+ */
+int hpt_add_spare_disk(DEVICEID idDisk);
+
+/* hpt_add_dedicated_spare
+ * Version compatibility: v1.0.0.3 or later
+ *   Add a spare disk to an array
+ * Parameters:
+ *  idDisk      disk id
+ *  idArray     array id
+ * Returns:
+ *  0   Success
+ */
+int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray);
+
+/* hpt_remove_spare_disk
+ *   remove a disk from spare pool.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  idDisk      disk id
+ * Returns:
+ *  0   Success
+ */
+int hpt_remove_spare_disk(DEVICEID idDisk);
+
+/* hpt_get_event
+ *   Used to poll events from driver.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   pEvent    pointer to HPT_EVENT structure
+ * Returns:
+ *  0   Success, event info is filled in *pEvent
+ */
+int hpt_get_event(PHPT_EVENT pEvent);
+
+/* hpt_rebuild_data_block
+ *   Used to copy data from source disk and mirror disk.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   idArray        Array ID (RAID1, 0/1 or RAID5)
+ *   Lba            Start LBA for each array member
+ *   nSector        Number of sectors for each array member (RAID 5 will ignore this parameter)
+ *
+ * Returns:
+ *  0   Success, event info is filled in *pEvent
+ */
+int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector);
+#define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3)
+
+/* hpt_set_array_state
+ *   set array state.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   idArray        Array ID
+ *   state          See above 'array states' constants, possible values are:
+ *     MIRROR_REBUILD_START
+ *        Indicate that GUI wants to rebuild a mirror array
+ *     MIRROR_REBUILD_ABORT
+ *        GUI wants to abort rebuilding an array
+ *     MIRROR_REBUILD_COMPLETE
+ *        GUI finished to rebuild an array. If rebuild is done by driver this
+ *        state has no use
+ *
+ * Returns:
+ *  0   Success
+ */
+int hpt_set_array_state(DEVICEID idArray, HPT_U32 state);
+
+/* hpt_set_array_info
+ *   set array info.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   idArray        Array ID
+ *   pInfo          pointer to new info
+ *
+ * Returns:
+ *  0   Success
+ */
+int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo);
+
+/* hpt_set_device_info
+ *   set device info.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   idDisk         device ID
+ *   pInfo          pointer to new info
+ *
+ * Returns:
+ *  0   Success
+ * Additional notes:
+ *  If idDisk==0, call to this function will stop buzzer on the adapter
+ *  (if supported by driver).
+ */
+int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo);
+
+#if HPT_INTERFACE_VERSION >= 0x01000004
+int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo);
+#endif
+
+/* hpt_rescan_devices
+ *   rescan devices
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   None
+ * Returns:
+ *   0  Success
+ */
+int hpt_rescan_devices(void);
+
+/* hpt_get_601_info
+ *   Get HPT601 status
+ * Version compatibiilty: v1.0.0.3 or later
+ * Parameters:
+ *   idDisk - Disk handle
+ *   PHPT601_INFO - pointer to HPT601 info buffer
+ * Returns:
+ *   0  Success
+ */
+int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
+
+/* hpt_set_601_info
+ *   HPT601 function control
+ * Version compatibiilty: v1.0.0.3 or later
+ * Parameters:
+ *   idDisk - Disk handle
+ *   PHPT601_INFO - pointer to HPT601 info buffer
+ * Returns:
+ *   0  Success
+ */
+int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
+
+/* hpt_lock_device
+ *   Lock a block on a device (prevent OS accessing it)
+ * Version compatibiilty: v1.0.0.3 or later
+ * Parameters:
+ *   idDisk - Disk handle
+ *   Lba - Start LBA
+ *   nSectors - number of sectors
+ * Returns:
+ *   0  Success
+ */
+int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors);
+
+/* hpt_lock_device
+ *   Unlock a device
+ * Version compatibiilty: v1.0.0.3 or later
+ * Parameters:
+ *   idDisk - Disk handle
+ * Returns:
+ *   0  Success
+ */
+int hpt_unlock_device(DEVICEID idDisk);
+
+/* hpt_ide_pass_through
+ *  send a ATA passthrough command to a device.
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   p - IDE_PASS_THROUGH header pointer
+ * Returns:
+ *   0  Success
+ */
+int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p);
+int hpt_ide_pass_through_v2(PIDE_PASS_THROUGH_HEADER_V2 p);
+
+/* hpt_scsi_passthrough
+ *  send a SCSI passthrough command to a device.
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *   in  - HPT_SCSI_PASSTHROUGH_IN header pointer
+ *   out - PHPT_SCSI_PASSTHROUGH_OUT header pointer
+ *   insize, outsize - in/out buffer size
+ * Returns:
+ *   0  Success
+ */
+int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize,
+				PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize);
+
+/* hpt_verify_data_block
+ *   verify data block on RAID1 or RAID5.
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
+ * Returns:
+ *   0  Success
+ *   1  Data compare error
+ *   2  I/O error
+ */
+int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
+
+/* hpt_initialize_data_block
+ *   initialize data block (fill with zero) on RAID5
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
+ * Returns:
+ *   0  Success
+ */
+int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
+
+/* hpt_device_io_ex
+ *   extended device I/O function
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member
+ *   buffer - I/O buffer or s/g address
+ * Returns:
+ *   0  Success
+ */
+int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param);
+
+/* hpt_set_boot_mark
+ *   select boot device
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   id - logical device ID. If id is 0 the boot mark will be removed.
+ * Returns:
+ *   0  Success
+ */
+int hpt_set_boot_mark(DEVICEID id);
+
+/* hpt_query_remove
+ *  check if device can be removed safely
+ * Version compatibility: v1.0.0.4 or later
+ * Parameters:
+ *  ndev - number of devices
+ *  pIds - device ID list
+ * Returns:
+ *  0  - Success
+ *  -1 - unknown error
+ *  n  - the n-th device that can't be removed
+ */
+int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds);
+
+/* hpt_remove_devices
+ *  remove a list of devices
+ * Version compatibility: v1.0.0.4 or later
+ * Parameters:
+ *  ndev - number of devices
+ *  pIds - device ID list
+ * Returns:
+ *  0  - Success
+ *  -1 - unknown error
+ *  n  - the n-th device that can't be removed
+ */
+int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds);
+
+/* hpt_create_array_v2
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *  pParam      pointer to CREATE_ARRAY_PARAMS_V2 structure
+ * Returns:
+ *  0   failed
+ *  else return array id
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam);
+#endif
+
+/* hpt_create_array_v3
+ * Version compatibility: v2.0.0.1 or later
+ * Parameters:
+ *  pParam      pointer to CREATE_ARRAY_PARAMS_V3 structure
+ * Returns:
+ *  0   failed
+ *  else return array id
+ */
+#if HPT_INTERFACE_VERSION>=0x02000001
+DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam);
+#endif
+
+/* hpt_get_device_info_v2
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *  id      logical device id
+ *  pInfo   pointer to LOGICAL_DEVICE_INFO_V2 structure
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo);
+#endif
+
+/* hpt_get_device_info_v3
+ * Version compatibility: v1.2.0.0 or later
+ * Parameters:
+ *  id      logical device id
+ *  pInfo   pointer to LOGICAL_DEVICE_INFO_V3 structure
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01020000
+int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo);
+#endif
+
+/* hpt_get_device_info_v4
+ * Version compatibility: v2.0.0.1 or later
+ * Parameters:
+ *  id      logical device id
+ *  pInfo   pointer to LOGICAL_DEVICE_INFO_V4 structure
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x02000001
+int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo);
+#endif
+
+/* hpt_create_transform
+ *  create a transform instance.
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  idArray - source array
+ *  destInfo - destination array info
+ * Returns:
+ *  destination array id
+ */
+#if HPT_INTERFACE_VERSION>=0x02000000
+DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo);
+#endif
+
+/* hpt_create_transform_v2
+ *  create a transform instance.
+ * Version compatibility: v2.0.0.1 or later
+ * Parameters:
+ *  idArray - source array
+ *  destInfo - destination array info
+ * Returns:
+ *  destination array id
+ */
+#if HPT_INTERFACE_VERSION>=0x02000001
+DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo);
+#endif
+
+/* hpt_step_transform
+ *  move a block in a tranform progress.
+ *  This function is called by mid-layer, not GUI (which uses set_array_state instead).
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  idArray - destination array ID
+ *            the source ID will be invalid when transform complete.
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x02000000
+int hpt_step_transform(DEVICEID idArray);
+#endif
+
+/* hpt_set_vdev_info
+ *  set information for disk or array
+ * Version compatibility: v1.2.0.0 or later
+ * Parameters:
+ *  dev - destination device
+ *
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01020000
+int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo);
+#endif
+
+/* hpt_init_disks
+ *  initialize disks for use
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  ndev - number of disks to initialize
+ *  pIds - array of DEVICEID
+ *
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x02000000
+int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds);
+#endif
+
+/* hpt_calc_max_array_capacity
+ *  cap max capacity of the array user want to create or transform
+ * Version compatibility: v1.2.0.0 or later
+ * Parameters:
+ *  source - if transform, this is the source array, otherwise, it should be zero
+ *  destInfo - target array params
+ * Returns:
+ *  0 - Success
+ *  cap - max capacity of the target array
+ */
+#if HPT_INTERFACE_VERSION>=0x01020000
+int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap);
+#endif
+
+/* hpt_calc_max_array_capacity_v2
+ *  cap max capacity of the array user want to create or transform
+ * Version compatibility: v2.0.0.1 or later
+ * Parameters:
+ *  source - if transform, this is the source array, otherwise, it should be zero
+ *  destInfo - target array params
+ * Returns:
+ *  0 - Success
+ *  cap - max capacity of the target array
+ */
+#if HPT_INTERFACE_VERSION>=0x02000001
+int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap);
+#endif
+
+/* hpt_rebuild_data_block2
+ *   Used to copy data from source disk and mirror disk.
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *   idArray        Array ID (RAID1, 0/1 or RAID5)
+ *   Lba            Start LBA for each array member
+ *   nSector        Number of sectors for each array member (RAID 5 will ignore this parameter)
+ *
+ * Returns:
+ *  0   Success, event info is filled in *pEvent
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector);
+#endif
+
+/* hpt_verify_data_block2
+ *   verify data block on RAID1 or RAID5.
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
+ * Returns:
+ *   0  Success
+ *   1  Data compare error
+ *   2  I/O error
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
+#endif
+
+/* hpt_initialize_data_block2
+ *   initialize data block (fill with zero) on RAID5
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
+ * Returns:
+ *   0  Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
+#endif
+
+/* hpt_i2c_transaction
+ *   perform an transaction on i2c bus
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *   indata[0] - controller ID
+ * Returns:
+ *   0  Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01020000
+int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen);
+#endif
+
+/* hpt_get_parameter_list
+ *   get a list of driver parameters.
+ * Version compatibility: v1.0.0.0 or later
+ * Parameters:
+ *   location - parameter location
+ *   outBuffer - a buffer to hold the output
+ *   outBufferSize - size of outBuffer
+ * Returns:
+ *   0  Success
+ *      put in outBuffer a list of zero terminated parameter names. the whole list
+ *      is terminated with an additional zero byte.
+ */
+int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize);
+
+/* hpt_{get,set}_parameter
+ *   get/set a parameter value.
+ * Version compatibility: v1.0.0.0 or later
+ * Parameters:
+ *   pParam - a pointer to HPT_DRIVER_PARAMETER.
+ * Returns:
+ *   0  Success
+ */
+int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam);
+int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam);
+int hpt_reenumerate_device(DEVICEID id);
+
+/*
+ * hpt_get_enclosure_count
+ * Version compatibility: v2.1.0.0 or later
+ * Parameters:
+ *  controller_id
+ * Returns:
+ *  number of enclosurers
+ */
+int hpt_get_enclosure_count(int ctlr_id);
+
+/* hpt_get_enclosure_info
+ * Version compatibility: v2.1.0.0 or later
+ * Parameters:
+ *  id      enclosure id
+ *  pInfo   pointer to ENCLOSURE_INFO buffer
+ * Returns:
+ *  0       Success, enclosure info is put into (*pInfo ).
+ */
+int hpt_get_enclosure_info(int ctlr_id, int enc_id, PENCLOSURE_INFO pInfo);
+
+int hpt_get_enclosure_info_v2(int ctlr_id, int enc_id, PENCLOSURE_INFO_V2 pInfo);
+
+int hpt_get_enclosure_info_v3(int ctlr_id, int enc_id, PENCLOSURE_INFO_V3 pInfo);
+
+int hpt_get_enclosure_info_v4(int ctlr_id, int enc_id, PENCLOSURE_INFO_V4 pInfo);
+int hpt_get_enclosure_element_info(int ctlr_id, int enc_id, int ele_id, PSES_ELEMENT_STATUS pInfo);
+
+/* performance monitor interface
+ * Version compatibility: v2.1.0.0 or later
+ */
+int hpt_get_perfmon_status(int ctlr_id, int *p_status);
+int hpt_set_perfmon_status(int ctlr_id, int enable);
+int hpt_get_perfmon_data(DEVICEID id, PHPT_PM_IOSTAT iostat);
+
+/* hpt_get_controller_venid
+ * Version compatibility: v1.0.0.0 or later
+ */
+int hpt_get_controller_venid(int ctlr_id, HPT_U32 *venid);
+
+/* hpt_access_config_reg
+ *  access the reserved config space on disk
+ * Parameters:
+ *   p - ACCESS_CONFIG_REG_PARAMS header pointer
+ * Returns:
+ *   0  Success
+ */
+int hpt_access_config_reg(PACCESS_CONFIG_REG_PARAMS p);
+
+/* hpt_dump_metadata
+ *  dump internal metadata
+ * Parameters:
+ *   p - PDUMP_METADATA_PARAMS header pointer
+ * Returns:
+ *   0  Success
+ */
+int hpt_dump_metadata(PDUMP_METADATA_PARAMS p);
+
+#endif
+
+#pragma pack()
+
+#ifdef __cplusplus
+}
+#endif
+#endif


Property changes on: trunk/sys/dev/hptnr/hptintf.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
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Added: trunk/sys/dev/hptnr/hptnr_config.c
===================================================================
--- trunk/sys/dev/hptnr/hptnr_config.c	                        (rev 0)
+++ trunk/sys/dev/hptnr/hptnr_config.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,54 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/hptnr_config.c 326006 2017-11-20 06:49:05Z delphij $
+ */
+
+#include <dev/hptnr/hptnr_config.h>
+/****************************************************************************
+ * config.c - auto-generated file
+ ****************************************************************************/
+#include <dev/hptnr/os_bsd.h>
+
+extern int init_module_him_r750(void);
+extern int init_module_him_dc7280(void);
+extern int init_module_vdev_raw(void);
+
+int init_config(void)
+{
+	init_module_him_r750();	
+	init_module_him_dc7280();	
+	init_module_vdev_raw();
+	return 0;
+}
+
+const char driver_name[] = "hptnr";
+const char driver_name_long[] = "R750/DC7280 controller driver";
+const char driver_ver[] = "v1.1.5";
+int  osm_max_targets = 0xff;
+
+
+int os_max_cache_size = 0x1000000;


Property changes on: trunk/sys/dev/hptnr/hptnr_config.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/hptnr_config.h
===================================================================
--- trunk/sys/dev/hptnr/hptnr_config.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/hptnr_config.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,151 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/hptnr_config.h 281957 2015-04-25 00:32:47Z delphij $
+ */
+
+#ifndef hptnr_CONFIG_H
+#define hptnr_CONFIG_H
+#define SUPPORT_ARRAY
+#define __KERNEL__ 1
+#define DRIVER_MINOR 16
+#define TARGETNAME hptnr
+#define __dummy_reg hptnr___dummy_reg
+#define __ldm_alloc_cmd hptnr___ldm_alloc_cmd
+#define debug_flag hptnr_debug_flag
+#define delay_between_spinup hptnr_delay_between_spinup
+#define dmapool_active hptnr_dmapool_active
+#define dmapool_get_page hptnr_dmapool_get_page
+#define dmapool_get_page_at hptnr_dmapool_get_page_at
+#define dmapool_init hptnr_dmapool_init
+#define dmapool_make_order hptnr_dmapool_make_order
+#define dmapool_max_class_pages hptnr_dmapool_max_class_pages
+#define dmapool_put_page hptnr_dmapool_put_page
+#define dmapool_register_client hptnr_dmapool_register_client
+#define driver_name hptnr_driver_name
+#define driver_name_long hptnr_driver_name_long
+#define driver_ver hptnr_driver_ver
+#define freelist_get hptnr_freelist_get
+#define freelist_get_dma hptnr_freelist_get_dma
+#define freelist_put hptnr_freelist_put
+#define freelist_put_dma hptnr_freelist_put_dma
+#define freelist_reserve hptnr_freelist_reserve
+#define freelist_reserve_dma hptnr_freelist_reserve_dma
+#define gGlobalNcqFlag hptnr_gGlobalNcqFlag
+#define gProbeInInitializing hptnr_gProbeInInitializing
+#define gSGPIOPartSupport hptnr_gSGPIOPartSupport
+#define gSpinupOneDevEachTime hptnr_gSpinupOneDevEachTime
+#define g_legacy_mode hptnr_g_legacy_mode
+#define gautorebuild hptnr_gautorebuild
+#define grebuildpriority hptnr_grebuildpriority
+#define him_handle_to_vbus hptnr_him_handle_to_vbus
+#define him_list hptnr_him_list
+#define init_config hptnr_init_config
+#define init_module_him_dc7280 hptnr_init_module_him_dc7280
+#define init_module_him_r750 hptnr_init_module_him_r750
+#define init_module_vdev_raw hptnr_init_module_vdev_raw
+#define ldm_acquire_lock hptnr_ldm_acquire_lock
+#define ldm_add_spare_to_array hptnr_ldm_add_spare_to_array
+#define ldm_alloc_cmds_R_6_55_75_46_64 hptnr_ldm_alloc_cmds_R_6_55_75_46_64
+#define ldm_alloc_cmds_from_list hptnr_ldm_alloc_cmds_from_list
+#define ldm_check_array_online hptnr_ldm_check_array_online
+#define ldm_create_vbus hptnr_ldm_create_vbus
+#define ldm_create_vdev hptnr_ldm_create_vdev
+#define ldm_event_notify hptnr_ldm_event_notify
+#define ldm_find_stamp hptnr_ldm_find_stamp
+#define ldm_find_target hptnr_ldm_find_target
+#define ldm_finish_cmd hptnr_ldm_finish_cmd
+#define ldm_free_cmds hptnr_ldm_free_cmds
+#define ldm_free_cmds_to_list hptnr_ldm_free_cmds_to_list
+#define ldm_generic_member_failed hptnr_ldm_generic_member_failed
+#define ldm_get_cmd_size hptnr_ldm_get_cmd_size
+#define ldm_get_device_id hptnr_ldm_get_device_id
+#define ldm_get_mem_info hptnr_ldm_get_mem_info
+#define ldm_get_next_vbus hptnr_ldm_get_next_vbus
+#define ldm_get_vbus_ext hptnr_ldm_get_vbus_ext
+#define ldm_get_vbus_size hptnr_ldm_get_vbus_size
+#define ldm_ide_fixstring hptnr_ldm_ide_fixstring
+#define ldm_idle hptnr_ldm_idle
+#define ldm_initialize_vbus_async hptnr_ldm_initialize_vbus_async
+#define ldm_intr hptnr_ldm_intr
+#define ldm_ioctl hptnr_ldm_ioctl
+#define ldm_on_timer hptnr_ldm_on_timer
+#define ldm_queue_cmd hptnr_ldm_queue_cmd
+#define ldm_queue_task hptnr_ldm_queue_task
+#define ldm_queue_vbus_dpc hptnr_ldm_queue_vbus_dpc
+#define ldm_register_adapter hptnr_ldm_register_adapter
+#define ldm_register_device hptnr_ldm_register_device
+#define ldm_register_him_R_6_55_75_46_64 hptnr_ldm_register_him_R_6_55_75_46_64
+#define ldm_register_vdev_class_R_6_55_75_46_64 hptnr_ldm_register_vdev_class_R_6_55_75_46_64
+#define ldm_release_lock hptnr_ldm_release_lock
+#define ldm_release_vbus hptnr_ldm_release_vbus
+#define ldm_release_vdev hptnr_ldm_release_vdev
+#define ldm_remove_timer hptnr_ldm_remove_timer
+#define ldm_request_timer hptnr_ldm_request_timer
+#define ldm_reset_vbus hptnr_ldm_reset_vbus
+#define ldm_resume hptnr_ldm_resume
+#define ldm_run hptnr_ldm_run
+#define ldm_set_autorebuild hptnr_ldm_set_autorebuild
+#define ldm_shutdown hptnr_ldm_shutdown
+#define ldm_suspend hptnr_ldm_suspend
+#define ldm_sync_array_info hptnr_ldm_sync_array_info
+#define ldm_sync_array_stamp hptnr_ldm_sync_array_stamp
+#define ldm_timer_probe_device hptnr_ldm_timer_probe_device
+#define ldm_unregister_device hptnr_ldm_unregister_device
+#define log_sector_repair hptnr_log_sector_repair
+#define msi hptnr_msi
+#define num_drives_per_spinup hptnr_num_drives_per_spinup
+#define os_get_stamp hptnr_os_get_stamp
+#define os_get_vbus_seq hptnr_os_get_vbus_seq
+#define os_inb hptnr_os_inb
+#define os_inl hptnr_os_inl
+#define os_insw hptnr_os_insw
+#define os_inw hptnr_os_inw
+#define os_map_pci_bar hptnr_os_map_pci_bar
+#define os_max_cache_size hptnr_os_max_cache_size
+#define os_outb hptnr_os_outb
+#define os_outl hptnr_os_outl
+#define os_outsw hptnr_os_outsw
+#define os_outw hptnr_os_outw
+#define os_pci_readb hptnr_os_pci_readb
+#define os_pci_readl hptnr_os_pci_readl
+#define os_pci_readw hptnr_os_pci_readw
+#define os_pci_writeb hptnr_os_pci_writeb
+#define os_pci_writel hptnr_os_pci_writel
+#define os_pci_writew hptnr_os_pci_writew
+#define os_printk hptnr_os_printk
+#define os_query_remove_device hptnr_os_query_remove_device
+#define os_query_time hptnr_os_query_time
+#define os_request_timer hptnr_os_request_timer
+#define os_revalidate_device hptnr_os_revalidate_device
+#define os_schedule_task hptnr_os_schedule_task
+#define os_stallexec hptnr_os_stallexec
+#define os_unmap_pci_bar hptnr_os_unmap_pci_bar
+#define osm_max_targets hptnr_osm_max_targets
+#define pcicfg_read_dword hptnr_pcicfg_read_dword
+#define vbus_list hptnr_vbus_list
+#define vdev_queue_cmd hptnr_vdev_queue_cmd
+#endif


Property changes on: trunk/sys/dev/hptnr/hptnr_config.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/hptnr_os_bsd.c
===================================================================
--- trunk/sys/dev/hptnr/hptnr_os_bsd.c	                        (rev 0)
+++ trunk/sys/dev/hptnr/hptnr_os_bsd.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,303 @@
+/* $MidnightBSD$ */
+/* $Id: os_bsd.c,v 1.13 2010/05/11 03:12:11 lcn Exp $ */
+/*-
+ * HighPoint RAID Driver for FreeBSD
+ * Copyright (C) 2005-2011 HighPoint Technologies, Inc. All Rights Reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/hptnr_os_bsd.c 312398 2017-01-18 23:23:46Z marius $
+ */
+
+#include <dev/hptnr/hptnr_config.h>
+#include <dev/hptnr/os_bsd.h>
+
+BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr);
+
+/* hardware access */
+HPT_U8   os_inb  (void *port) { return inb((unsigned)(HPT_UPTR)port); }
+HPT_U16  os_inw  (void *port) { return inw((unsigned)(HPT_UPTR)port); }
+HPT_U32  os_inl  (void *port) { return inl((unsigned)(HPT_UPTR)port); }
+
+void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); }
+void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); }
+void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); }
+
+void os_insw (void *port, HPT_U16 *buffer, HPT_U32 count)
+{ insw((unsigned)(HPT_UPTR)port, (void *)buffer, count); }
+
+void os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count)
+{ outsw((unsigned)(HPT_UPTR)port, (void *)buffer, count); }
+
+HPT_U32 __dummy_reg = 0;
+
+/* PCI configuration space */
+HPT_U8  os_pci_readb (void *osext, HPT_U8 offset)
+{
+    return  pci_read_config(((PHBA)osext)->pcidev, offset, 1);
+}
+
+HPT_U16 os_pci_readw (void *osext, HPT_U8 offset)
+{
+    return  pci_read_config(((PHBA)osext)->pcidev, offset, 2);
+}
+
+HPT_U32 os_pci_readl (void *osext, HPT_U8 offset)
+{
+    return  pci_read_config(((PHBA)osext)->pcidev, offset, 4);
+}
+
+void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value)
+{
+    pci_write_config(((PHBA)osext)->pcidev, offset, value, 1);
+}
+
+void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value)
+{
+    pci_write_config(((PHBA)osext)->pcidev, offset, value, 2);
+}
+
+void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value)
+{
+    pci_write_config(((PHBA)osext)->pcidev, offset, value, 4);
+}
+
+BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr)
+{
+	return (BUS_ADDRESS)vtophys(dmapool_virt_addr);
+}
+
+HPT_U32 pcicfg_read_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg)
+{
+	return (HPT_U32)pci_cfgregread(bus, dev, func, reg, 4);;
+}/* PCI space access */
+
+void *os_map_pci_bar(
+    void *osext, 
+    int index,   
+    HPT_U32 offset,
+    HPT_U32 length
+)
+{
+	PHBA hba = (PHBA)osext;
+	HPT_U32 base;
+
+	hba->pcibar[index].rid = 0x10 + index * 4;
+	base = pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4);
+
+	if (base & 1) {
+		hba->pcibar[index].type = SYS_RES_IOPORT;
+		hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev,
+			hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE);
+		hba->pcibar[index].base = (void *)(unsigned long)(base & ~0x1);
+	} else {
+		hba->pcibar[index].type = SYS_RES_MEMORY;
+		hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev,
+			hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE);
+		hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset;
+	}
+
+	return hba->pcibar[index].base;
+}
+
+void os_unmap_pci_bar(void *osext, void *base)
+{
+	PHBA hba = (PHBA)osext;
+	int index;
+	
+	for (index=0; index<6; index++) {
+		if (hba->pcibar[index].base==base) {
+			bus_release_resource(hba->pcidev, hba->pcibar[index].type,
+				hba->pcibar[index].rid, hba->pcibar[index].res);
+			hba->pcibar[index].base = 0;
+			return;
+		}
+	}
+}
+
+void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count)
+{
+    PVBUS_EXT vbus_ext = osext;
+
+    if (vbus_ext->ext_type!=EXT_TYPE_VBUS)
+        vbus_ext = ((PHBA)osext)->vbus_ext;
+
+    list->next = vbus_ext->freelist_head;
+    vbus_ext->freelist_head = list;
+    list->dma = 0;
+    list->size = size;
+    list->head = 0;
+#if DBG
+    list->reserved_count =
+#endif
+    list->count = count;
+}
+
+void *freelist_get(struct freelist *list)
+{
+    void * result;
+    if (list->count) {
+        HPT_ASSERT(list->head);
+        result = list->head;
+        list->head = *(void **)result;
+        list->count--;
+        return result;
+    }
+    return 0;
+}
+
+void freelist_put(struct freelist * list, void *p)
+{
+    HPT_ASSERT(list->dma==0);
+    list->count++;
+    *(void **)p = list->head;
+    list->head = p;
+}
+
+void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count)
+{
+    PVBUS_EXT vbus_ext = osext;
+
+    if (vbus_ext->ext_type!=EXT_TYPE_VBUS)
+        vbus_ext = ((PHBA)osext)->vbus_ext;
+
+    list->next = vbus_ext->freelist_dma_head;
+    vbus_ext->freelist_dma_head = list;
+    list->dma = 1;
+    list->alignment = alignment;
+    list->size = size;
+    list->head = 0;
+#if DBG
+    list->reserved_count =
+#endif
+    list->count = count;
+}
+
+void *freelist_get_dma(struct freelist *list, BUS_ADDRESS *busaddr)
+{
+    void *result;
+    HPT_ASSERT(list->dma);
+    result = freelist_get(list);
+    if (result)
+        *busaddr = *(BUS_ADDRESS *)((void **)result+1);
+    return result;
+}
+
+void freelist_put_dma(struct freelist *list, void *p, BUS_ADDRESS busaddr)
+{
+    HPT_ASSERT(list->dma);
+    list->count++;
+    *(void **)p = list->head;
+    *(BUS_ADDRESS *)((void **)p+1) = busaddr;
+    list->head = p;
+}
+
+HPT_U32 os_get_stamp(void)
+{
+    HPT_U32 stamp;
+    do { stamp = random(); } while (stamp==0);
+    return stamp;
+}
+
+void os_stallexec(HPT_U32 microseconds)
+{
+    DELAY(microseconds);
+}
+
+static void os_timer_for_ldm(void *arg)
+{
+	PVBUS_EXT vbus_ext = (PVBUS_EXT)arg;
+	ldm_on_timer((PVBUS)vbus_ext->vbus);
+}
+
+void  os_request_timer(void * osext, HPT_U32 interval)
+{
+	PVBUS_EXT vbus_ext = osext;
+
+	HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS);
+
+	callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0,
+	    os_timer_for_ldm, vbus_ext, 0);
+}
+
+HPT_TIME os_query_time(void)
+{
+	return ticks * (1000000 / hz);
+}
+
+void os_schedule_task(void *osext, OSM_TASK *task)
+{
+	PVBUS_EXT vbus_ext = osext;
+	
+	HPT_ASSERT(task->next==0);
+	
+	if (vbus_ext->tasks==0)
+		vbus_ext->tasks = task;
+	else {
+		OSM_TASK *t = vbus_ext->tasks;
+		while (t->next) t = t->next;
+		t->next = task;
+	}
+
+	if (vbus_ext->worker.ta_context)
+		TASK_ENQUEUE(&vbus_ext->worker);
+}
+
+int os_revalidate_device(void *osext, int id)
+{
+
+    return 0;
+}
+
+int os_query_remove_device(void *osext, int id)
+{
+    return 0;
+}
+
+HPT_U8 os_get_vbus_seq(void *osext)
+{
+    return ((PVBUS_EXT)osext)->sim->path_id;
+}
+
+int  os_printk(char *fmt, ...)
+{
+    va_list args;
+    static char buf[512];
+
+    va_start(args, fmt);
+    vsnprintf(buf, sizeof(buf), fmt, args);
+    va_end(args);
+    return printf("%s: %s\n", driver_name, buf);
+}
+
+#if DBG
+void os_check_stack(const char *location, int size){}
+
+void __os_dbgbreak(const char *file, int line)
+{
+    printf("*** break at %s:%d ***", file, line);
+    while (1);
+}
+
+int hpt_dbg_level = 1;
+#endif


Property changes on: trunk/sys/dev/hptnr/hptnr_os_bsd.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/hptnr_osm_bsd.c
===================================================================
--- trunk/sys/dev/hptnr/hptnr_osm_bsd.c	                        (rev 0)
+++ trunk/sys/dev/hptnr/hptnr_osm_bsd.c	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,1679 @@
+/* $MidnightBSD$ */
+/* $Id: osm_bsd.c,v 1.36 2010/05/11 03:12:11 lcn Exp $ */
+/*-
+ * HighPoint RAID Driver for FreeBSD
+ * Copyright (C) 2005-2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/hptnr_osm_bsd.c 328268 2018-01-23 02:29:39Z emaste $
+ */
+#include <dev/hptnr/hptnr_config.h>
+#include <dev/hptnr/os_bsd.h>
+#include <dev/hptnr/hptintf.h>
+int msi = 0;
+int debug_flag = 0;
+static HIM *hpt_match(device_t dev, int scan)
+{
+	PCI_ID pci_id;
+	HIM *him;
+	int i;
+
+	for (him = him_list; him; him = him->next) {
+		for (i=0; him->get_supported_device_id(i, &pci_id); i++) {
+			if (scan && him->get_controller_count)
+				him->get_controller_count(&pci_id,0,0);
+			if ((pci_get_vendor(dev) == pci_id.vid) &&
+				(pci_get_device(dev) == pci_id.did)){
+				return (him);
+			}
+		}
+	}
+
+	return (NULL);
+}
+
+static int hpt_probe(device_t dev)
+{
+	HIM *him;
+
+	him = hpt_match(dev, 0);
+	if (him != NULL) {
+		KdPrint(("hpt_probe: adapter at PCI %d:%d:%d, IRQ %d",
+			pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev), pci_get_irq(dev)
+			));
+		device_set_desc(dev, him->name);
+		return (BUS_PROBE_DEFAULT);
+	}
+
+	return (ENXIO);
+}
+
+static int hpt_attach(device_t dev)
+{
+	PHBA hba = (PHBA)device_get_softc(dev);
+	HIM *him;
+	PCI_ID pci_id;
+	HPT_UINT size;
+	PVBUS vbus;
+	PVBUS_EXT vbus_ext;
+	
+	KdPrint(("hpt_attach(%d/%d/%d)", pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)));
+
+	him = hpt_match(dev, 1);
+	hba->ext_type = EXT_TYPE_HBA;
+	hba->ldm_adapter.him = him;
+
+	pci_enable_busmaster(dev);
+
+	pci_id.vid = pci_get_vendor(dev);
+	pci_id.did = pci_get_device(dev);
+	pci_id.rev = pci_get_revid(dev);
+	pci_id.subsys = (HPT_U32)(pci_get_subdevice(dev)) << 16 | pci_get_subvendor(dev);
+
+	size = him->get_adapter_size(&pci_id);
+	hba->ldm_adapter.him_handle = malloc(size, M_DEVBUF, M_WAITOK);
+
+	hba->pcidev = dev;
+	hba->pciaddr.tree = 0;
+	hba->pciaddr.bus = pci_get_bus(dev);
+	hba->pciaddr.device = pci_get_slot(dev);
+	hba->pciaddr.function = pci_get_function(dev);
+
+	if (!him->create_adapter(&pci_id, hba->pciaddr, hba->ldm_adapter.him_handle, hba)) {
+		free(hba->ldm_adapter.him_handle, M_DEVBUF);
+		return ENXIO;
+	}
+
+	os_printk("adapter at PCI %d:%d:%d, IRQ %d",
+		hba->pciaddr.bus, hba->pciaddr.device, hba->pciaddr.function, pci_get_irq(dev));
+
+	if (!ldm_register_adapter(&hba->ldm_adapter)) {
+		size = ldm_get_vbus_size();
+		vbus_ext = malloc(sizeof(VBUS_EXT) + size, M_DEVBUF, M_WAITOK |
+			M_ZERO);
+		vbus_ext->ext_type = EXT_TYPE_VBUS;
+		ldm_create_vbus((PVBUS)vbus_ext->vbus, vbus_ext);
+		ldm_register_adapter(&hba->ldm_adapter);
+	}
+
+	ldm_for_each_vbus(vbus, vbus_ext) {
+		if (hba->ldm_adapter.vbus==vbus) {
+			hba->vbus_ext = vbus_ext;
+			hba->next = vbus_ext->hba_list;
+			vbus_ext->hba_list = hba;
+			break;
+		}
+	}	
+	return 0;
+}
+
+/*
+ * Maybe we'd better to use the bus_dmamem_alloc to alloc DMA memory,
+ * but there are some problems currently (alignment, etc).
+ */
+static __inline void *__get_free_pages(int order)
+{
+	/* don't use low memory - other devices may get starved */
+	return contigmalloc(PAGE_SIZE<<order, 
+			M_DEVBUF, M_WAITOK, BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR, PAGE_SIZE, 0);
+}
+
+static __inline void free_pages(void *p, int order)
+{
+	contigfree(p, PAGE_SIZE<<order, M_DEVBUF);
+}
+
+static int hpt_alloc_mem(PVBUS_EXT vbus_ext)
+{
+	PHBA hba;
+	struct freelist *f;
+	HPT_UINT i;
+	void **p;
+
+	for (hba = vbus_ext->hba_list; hba; hba = hba->next)
+		hba->ldm_adapter.him->get_meminfo(hba->ldm_adapter.him_handle);
+
+	ldm_get_mem_info((PVBUS)vbus_ext->vbus, 0);
+
+	for (f=vbus_ext->freelist_head; f; f=f->next) {
+		KdPrint(("%s: %d*%d=%d bytes",
+			f->tag, f->count, f->size, f->count*f->size));
+		for (i=0; i<f->count; i++) {
+			p = (void **)malloc(f->size, M_DEVBUF, M_WAITOK);
+			if (!p)	return (ENXIO);
+			*p = f->head;
+			f->head = p;
+		}
+	}
+
+	for (f=vbus_ext->freelist_dma_head; f; f=f->next) {
+		int order, size, j;
+
+		HPT_ASSERT((f->size & (f->alignment-1))==0);
+
+		for (order=0, size=PAGE_SIZE; size<f->size; order++, size<<=1)
+			;
+
+		KdPrint(("%s: %d*%d=%d bytes, order %d",
+			f->tag, f->count, f->size, f->count*f->size, order));
+		HPT_ASSERT(f->alignment<=PAGE_SIZE);
+
+		for (i=0; i<f->count;) {
+			p = (void **)__get_free_pages(order);
+			if (!p) return -1;
+			for (j = size/f->size; j && i<f->count; i++,j--) {
+				*p = f->head;
+				*(BUS_ADDRESS *)(p+1) = (BUS_ADDRESS)vtophys(p);
+				f->head = p;
+				p = (void **)((unsigned long)p + f->size);
+			}
+		}
+	}
+	
+	HPT_ASSERT(PAGE_SIZE==DMAPOOL_PAGE_SIZE);
+
+	for (i=0; i<os_max_cache_pages; i++) {
+		p = (void **)__get_free_pages(0);
+		if (!p) return -1;
+		HPT_ASSERT(((HPT_UPTR)p & (DMAPOOL_PAGE_SIZE-1))==0);
+		dmapool_put_page((PVBUS)vbus_ext->vbus, p, (BUS_ADDRESS)vtophys(p));
+	}
+
+	return 0;
+}
+
+static void hpt_free_mem(PVBUS_EXT vbus_ext)
+{
+	struct freelist *f;
+	void *p;
+	int i;
+	BUS_ADDRESS bus;
+
+	for (f=vbus_ext->freelist_head; f; f=f->next) {
+#if DBG
+		if (f->count!=f->reserved_count) {
+			KdPrint(("memory leak for freelist %s (%d/%d)", f->tag, f->count, f->reserved_count));
+		}
+#endif
+		while ((p=freelist_get(f)))
+			free(p, M_DEVBUF);
+	}
+
+	for (i=0; i<os_max_cache_pages; i++) {
+		p = dmapool_get_page((PVBUS)vbus_ext->vbus, &bus);
+		HPT_ASSERT(p);
+		free_pages(p, 0);
+	}
+
+	for (f=vbus_ext->freelist_dma_head; f; f=f->next) {
+		int order, size;
+#if DBG
+		if (f->count!=f->reserved_count) {
+			KdPrint(("memory leak for dma freelist %s (%d/%d)", f->tag, f->count, f->reserved_count));
+		}
+#endif
+		for (order=0, size=PAGE_SIZE; size<f->size; order++, size<<=1) ;
+
+		while ((p=freelist_get_dma(f, &bus))) {
+			if (order)
+				free_pages(p, order);
+			else {
+			/* can't free immediately since other blocks in this page may still be in the list */
+				if (((HPT_UPTR)p & (PAGE_SIZE-1))==0)
+					dmapool_put_page((PVBUS)vbus_ext->vbus, p, bus);
+			}
+		}
+	}
+	
+	while ((p = dmapool_get_page((PVBUS)vbus_ext->vbus, &bus)))
+		free_pages(p, 0);
+}
+
+static int hpt_init_vbus(PVBUS_EXT vbus_ext)
+{
+	PHBA hba;
+
+	for (hba = vbus_ext->hba_list; hba; hba = hba->next)
+		if (!hba->ldm_adapter.him->initialize(hba->ldm_adapter.him_handle)) {
+			KdPrint(("fail to initialize %p", hba));
+			return -1;
+		}
+
+	ldm_initialize_vbus((PVBUS)vbus_ext->vbus, &vbus_ext->hba_list->ldm_adapter);
+	return 0;
+}
+
+static void hpt_flush_done(PCOMMAND pCmd)
+{
+	PVDEV vd = pCmd->target;
+
+	if (mIsArray(vd->type) && vd->u.array.transform && vd!=vd->u.array.transform->target) {
+		vd = vd->u.array.transform->target;
+		HPT_ASSERT(vd);
+		pCmd->target = vd;
+		pCmd->Result = RETURN_PENDING;
+		vdev_queue_cmd(pCmd);
+		return;
+	}
+
+	*(int *)pCmd->priv = 1;
+	wakeup(pCmd);
+}
+
+/*
+ * flush a vdev (without retry).
+ */
+static int hpt_flush_vdev(PVBUS_EXT vbus_ext, PVDEV vd)
+{
+	PCOMMAND pCmd;
+	int result = 0, done;
+	HPT_UINT count;
+
+	KdPrint(("flusing dev %p", vd));
+
+	hpt_assert_vbus_locked(vbus_ext);
+
+	if (mIsArray(vd->type) && vd->u.array.transform)
+		count = max(vd->u.array.transform->source->cmds_per_request,
+					vd->u.array.transform->target->cmds_per_request);
+	else
+		count = vd->cmds_per_request;
+
+	pCmd = ldm_alloc_cmds(vd->vbus, count);
+
+	if (!pCmd) {
+		return -1;
+	}
+
+	pCmd->type = CMD_TYPE_FLUSH;
+	pCmd->flags.hard_flush = 1;
+	pCmd->target = vd;
+	pCmd->done = hpt_flush_done;
+	done = 0;
+	pCmd->priv = &done;
+
+	ldm_queue_cmd(pCmd);
+	
+	if (!done) {
+		while (hpt_sleep(vbus_ext, pCmd, PPAUSE, "hptfls", HPT_OSM_TIMEOUT)) {
+			ldm_reset_vbus(vd->vbus);
+		}
+	}
+
+	KdPrint(("flush result %d", pCmd->Result));
+
+	if (pCmd->Result!=RETURN_SUCCESS)
+		result = -1;
+
+	ldm_free_cmds(pCmd);
+
+	return result;
+}
+
+static void hpt_stop_tasks(PVBUS_EXT vbus_ext);
+static void hpt_shutdown_vbus(PVBUS_EXT vbus_ext, int howto)
+{
+	PVBUS     vbus = (PVBUS)vbus_ext->vbus;
+	PHBA hba;
+	int i;
+	
+	KdPrint(("hpt_shutdown_vbus"));
+
+	/* stop all ctl tasks and disable the worker taskqueue */
+	hpt_stop_tasks(vbus_ext);
+	hpt_lock_vbus(vbus_ext);
+	vbus_ext->worker.ta_context = 0;
+
+	/* flush devices */
+	for (i=0; i<osm_max_targets; i++) {
+		PVDEV vd = ldm_find_target(vbus, i);
+		if (vd) {
+			/* retry once */
+			if (hpt_flush_vdev(vbus_ext, vd))
+				hpt_flush_vdev(vbus_ext, vd);
+		}
+	}
+
+	ldm_shutdown(vbus);
+	hpt_unlock_vbus(vbus_ext);
+
+	ldm_release_vbus(vbus);
+
+	for (hba=vbus_ext->hba_list; hba; hba=hba->next)
+		bus_teardown_intr(hba->pcidev, hba->irq_res, hba->irq_handle);
+
+	hpt_free_mem(vbus_ext);
+
+	while ((hba=vbus_ext->hba_list)) {
+		vbus_ext->hba_list = hba->next;
+		free(hba->ldm_adapter.him_handle, M_DEVBUF);
+	}
+
+	callout_drain(&vbus_ext->timer);
+	mtx_destroy(&vbus_ext->lock);
+	free(vbus_ext, M_DEVBUF);
+	KdPrint(("hpt_shutdown_vbus done"));
+}
+
+static void __hpt_do_tasks(PVBUS_EXT vbus_ext)
+{
+	OSM_TASK *tasks;
+
+	tasks = vbus_ext->tasks;
+	vbus_ext->tasks = 0;
+
+	while (tasks) {
+		OSM_TASK *t = tasks;
+		tasks = t->next;
+		t->next = 0;
+		t->func(vbus_ext->vbus, t->data);
+	}
+}
+
+static void hpt_do_tasks(PVBUS_EXT vbus_ext, int pending)
+{
+	if(vbus_ext){
+		hpt_lock_vbus(vbus_ext);
+		__hpt_do_tasks(vbus_ext);
+		hpt_unlock_vbus(vbus_ext);
+	}
+}
+
+static void hpt_action(struct cam_sim *sim, union ccb *ccb);
+static void hpt_poll(struct cam_sim *sim);
+static void hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path, void * arg);
+static void hpt_pci_intr(void *arg);
+
+static __inline POS_CMDEXT cmdext_get(PVBUS_EXT vbus_ext)
+{
+	POS_CMDEXT p = vbus_ext->cmdext_list;
+	if (p)
+		vbus_ext->cmdext_list = p->next;
+	return p;
+}
+
+static __inline void cmdext_put(POS_CMDEXT p)
+{
+	p->next = p->vbus_ext->cmdext_list;
+	p->vbus_ext->cmdext_list = p;
+}
+
+static void hpt_timeout(void *arg)
+{
+	PCOMMAND pCmd = (PCOMMAND)arg;
+	POS_CMDEXT ext = (POS_CMDEXT)pCmd->priv;
+	
+	KdPrint(("pCmd %p timeout", pCmd));
+	
+	ldm_reset_vbus((PVBUS)ext->vbus_ext->vbus);
+}
+
+static void os_cmddone(PCOMMAND pCmd)
+{
+	POS_CMDEXT ext = (POS_CMDEXT)pCmd->priv;
+	union ccb *ccb = ext->ccb;
+	HPT_U8 *cdb;
+		
+	if (ccb->ccb_h.flags & CAM_CDB_POINTER)
+		cdb = ccb->csio.cdb_io.cdb_ptr;
+	else
+		cdb = ccb->csio.cdb_io.cdb_bytes;
+
+	KdPrint(("os_cmddone(%p, %d)", pCmd, pCmd->Result));
+
+	callout_stop(&ext->timeout);
+	switch(cdb[0]) {
+		case 0x85: /*ATA_16*/
+		case 0xA1: /*ATA_12*/
+		{
+			PassthroughCmd *passthru = &pCmd->uCmd.Passthrough;
+			HPT_U8 *sense_buffer = (HPT_U8 *)&ccb->csio.sense_data;
+			memset(&ccb->csio.sense_data, 0,sizeof(ccb->csio.sense_data));
+
+			sense_buffer[0] = 0x72; /* Response Code */
+			sense_buffer[7] = 14; /* Additional Sense Length */
+	
+			sense_buffer[8] = 0x9; /* ATA Return Descriptor */
+			sense_buffer[9] = 0xc; /* Additional Descriptor Length */
+			sense_buffer[11] = (HPT_U8)passthru->bFeaturesReg; /* Error */
+			sense_buffer[13] = (HPT_U8)passthru->bSectorCountReg;  /* Sector Count (7:0) */
+			sense_buffer[15] = (HPT_U8)passthru->bLbaLowReg; /* LBA Low (7:0) */
+			sense_buffer[17] = (HPT_U8)passthru->bLbaMidReg; /* LBA Mid (7:0) */
+			sense_buffer[19] = (HPT_U8)passthru->bLbaHighReg; /* LBA High (7:0) */
+	
+			if ((cdb[0] == 0x85) && (cdb[1] & 0x1))
+			{
+				sense_buffer[10] = 1;
+				sense_buffer[12] = (HPT_U8)(passthru->bSectorCountReg >> 8); /* Sector Count (15:8) */
+				sense_buffer[14] = (HPT_U8)(passthru->bLbaLowReg >> 8);	/* LBA Low (15:8) */
+				sense_buffer[16] = (HPT_U8)(passthru->bLbaMidReg >> 8); /* LBA Mid (15:8) */
+				sense_buffer[18] = (HPT_U8)(passthru->bLbaHighReg >> 8); /* LBA High (15:8) */
+			}
+	
+			sense_buffer[20] = (HPT_U8)passthru->bDriveHeadReg; /* Device */
+			sense_buffer[21] = (HPT_U8)passthru->bCommandReg; /* Status */
+			KdPrint(("sts 0x%x err 0x%x low 0x%x mid 0x%x hig 0x%x dh 0x%x sc 0x%x",
+					 passthru->bCommandReg,
+					 passthru->bFeaturesReg,
+					 passthru->bLbaLowReg,
+					 passthru->bLbaMidReg,
+					 passthru->bLbaHighReg,
+					 passthru->bDriveHeadReg,
+					 passthru->bSectorCountReg));
+			KdPrint(("result:0x%x,bFeaturesReg:0x%04x,bSectorCountReg:0x%04x,LBA:0x%04x%04x%04x ",
+				pCmd->Result,passthru->bFeaturesReg,passthru->bSectorCountReg,
+				passthru->bLbaHighReg,passthru->bLbaMidReg,passthru->bLbaLowReg));
+		}
+		default:
+			break;
+	}
+
+	switch(pCmd->Result) {
+	case RETURN_SUCCESS:
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		break;
+	case RETURN_BAD_DEVICE:
+		ccb->ccb_h.status = CAM_DEV_NOT_THERE;
+		break;
+	case RETURN_DEVICE_BUSY:
+		ccb->ccb_h.status = CAM_BUSY;
+		break;
+	case RETURN_INVALID_REQUEST:
+		ccb->ccb_h.status = CAM_REQ_INVALID;
+		break;
+	case RETURN_SELECTION_TIMEOUT:
+		ccb->ccb_h.status = CAM_SEL_TIMEOUT;
+		break;
+	case RETURN_RETRY:
+		ccb->ccb_h.status = CAM_BUSY;
+		break;
+	default:
+		ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
+		break;
+	}
+
+	if (pCmd->flags.data_in) {
+		bus_dmamap_sync(ext->vbus_ext->io_dmat, ext->dma_map, BUS_DMASYNC_POSTREAD);
+	}
+	else if (pCmd->flags.data_out) {
+		bus_dmamap_sync(ext->vbus_ext->io_dmat, ext->dma_map, BUS_DMASYNC_POSTWRITE);
+	}
+	
+	bus_dmamap_unload(ext->vbus_ext->io_dmat, ext->dma_map);
+
+	cmdext_put(ext);
+	ldm_free_cmds(pCmd);
+	xpt_done(ccb);
+}
+
+static int os_buildsgl(PCOMMAND pCmd, PSG pSg, int logical)
+{
+	/* since we have provided physical sg, nobody will ask us to build physical sg */
+	HPT_ASSERT(0);
+	return FALSE;
+}
+
+static void hpt_io_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
+{
+	PCOMMAND pCmd = (PCOMMAND)arg;
+	POS_CMDEXT ext = (POS_CMDEXT)pCmd->priv;
+	PSG psg = pCmd->psg;
+	int idx;
+	
+	HPT_ASSERT(pCmd->flags.physical_sg);
+	
+	if (error)
+		panic("busdma error");
+		
+	HPT_ASSERT(nsegs<=os_max_sg_descriptors);
+
+	if (nsegs != 0) {
+		for (idx = 0; idx < nsegs; idx++, psg++) {
+			psg->addr.bus = segs[idx].ds_addr;
+			psg->size = segs[idx].ds_len;
+			psg->eot = 0;
+		}
+		psg[-1].eot = 1;
+	
+		if (pCmd->flags.data_in) {
+			bus_dmamap_sync(ext->vbus_ext->io_dmat, ext->dma_map,
+			    BUS_DMASYNC_PREREAD);
+		}
+		else if (pCmd->flags.data_out) {
+			bus_dmamap_sync(ext->vbus_ext->io_dmat, ext->dma_map,
+			    BUS_DMASYNC_PREWRITE);
+		}
+	}
+
+	callout_reset(&ext->timeout, HPT_OSM_TIMEOUT, hpt_timeout, pCmd);
+	ldm_queue_cmd(pCmd);
+}
+
+static void hpt_scsi_io(PVBUS_EXT vbus_ext, union ccb *ccb)
+{
+	PVBUS vbus = (PVBUS)vbus_ext->vbus;
+	PVDEV vd;
+	PCOMMAND pCmd;
+	POS_CMDEXT ext;
+	HPT_U8 *cdb;
+
+	if (ccb->ccb_h.flags & CAM_CDB_POINTER)
+		cdb = ccb->csio.cdb_io.cdb_ptr;
+	else
+		cdb = ccb->csio.cdb_io.cdb_bytes;
+	
+	KdPrint(("hpt_scsi_io: ccb %x id %d lun %d cdb %x-%x-%x",
+		ccb,
+		ccb->ccb_h.target_id, ccb->ccb_h.target_lun,
+		*(HPT_U32 *)&cdb[0], *(HPT_U32 *)&cdb[4], *(HPT_U32 *)&cdb[8]
+	));
+
+	/* ccb->ccb_h.path_id is not our bus id - don't check it */
+	if (ccb->ccb_h.target_lun != 0 ||
+		ccb->ccb_h.target_id >= osm_max_targets ||
+		(ccb->ccb_h.flags & CAM_CDB_PHYS))
+	{
+		ccb->ccb_h.status = CAM_TID_INVALID;
+		xpt_done(ccb);
+		return;
+	}
+
+	vd = ldm_find_target(vbus, ccb->ccb_h.target_id);
+
+	if (!vd) {
+		ccb->ccb_h.status = CAM_SEL_TIMEOUT;
+		xpt_done(ccb);
+		return;
+	}
+   
+	switch (cdb[0]) {
+	case TEST_UNIT_READY:
+	case START_STOP_UNIT:
+	case SYNCHRONIZE_CACHE:
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		break;
+
+	case 0x85: /*ATA_16*/
+	case 0xA1: /*ATA_12*/
+	{
+		int error;
+		HPT_U8 prot;
+		PassthroughCmd *passthru;	
+		
+		if (mIsArray(vd->type)) {
+			ccb->ccb_h.status = CAM_REQ_INVALID;
+			break;
+		}
+		
+		HPT_ASSERT(vd->type == VD_RAW && vd->u.raw.legacy_disk);
+		
+		prot = (cdb[1] & 0x1e) >> 1;
+		
+		
+		if (prot < 3 || prot > 5) 
+		{
+			ccb->ccb_h.status = CAM_REQ_INVALID;
+			break;
+		}
+		
+		pCmd = ldm_alloc_cmds(vbus, vd->cmds_per_request);
+		if (!pCmd) {
+			HPT_ASSERT(0);
+			ccb->ccb_h.status = CAM_BUSY;
+			break;
+		}
+		
+		passthru = &pCmd->uCmd.Passthrough;
+		if (cdb[0] == 0x85/*ATA_16*/) {
+			if (cdb[1] & 0x1) {
+				passthru->bFeaturesReg =
+					((HPT_U16)cdb[3] << 8)
+						| cdb[4];
+				passthru->bSectorCountReg =
+					((HPT_U16)cdb[5] << 8) |
+						cdb[6];
+				passthru->bLbaLowReg =
+					((HPT_U16)cdb[7] << 8) |
+						cdb[8];
+				passthru->bLbaMidReg =
+					((HPT_U16)cdb[9] << 8) |
+						cdb[10];
+				passthru->bLbaHighReg =
+					((HPT_U16)cdb[11] << 8) |
+						cdb[12];
+			} else {
+				passthru->bFeaturesReg = cdb[4];
+				passthru->bSectorCountReg = cdb[6];
+				passthru->bLbaLowReg = cdb[8];
+				passthru->bLbaMidReg = cdb[10];
+				passthru->bLbaHighReg = cdb[12];
+			}
+			passthru->bDriveHeadReg = cdb[13];
+			passthru->bCommandReg = cdb[14];
+		
+		} else { /*ATA_12*/
+		
+			passthru->bFeaturesReg = cdb[3];
+			passthru->bSectorCountReg = cdb[4];
+			passthru->bLbaLowReg = cdb[5];
+			passthru->bLbaMidReg = cdb[6];
+			passthru->bLbaHighReg = cdb[7];
+			passthru->bDriveHeadReg = cdb[8];
+			passthru->bCommandReg = cdb[9];
+		}
+		
+		if (cdb[1] & 0xe0) {
+			
+		
+			if (!(passthru->bCommandReg == ATA_CMD_READ_MULTI ||
+				passthru->bCommandReg == ATA_CMD_READ_MULTI_EXT ||
+				passthru->bCommandReg == ATA_CMD_WRITE_MULTI ||
+				passthru->bCommandReg == ATA_CMD_WRITE_MULTI_EXT ||
+				passthru->bCommandReg == ATA_CMD_WRITE_MULTI_FUA_EXT)
+				) {
+				goto error;
+			}
+		}
+		
+		
+		if (passthru->bFeaturesReg == ATA_SET_FEATURES_XFER &&
+			passthru->bCommandReg == ATA_CMD_SET_FEATURES) {
+			goto error;
+		}
+
+		
+		passthru->nSectors = ccb->csio.dxfer_len/ATA_SECTOR_SIZE;
+		switch (prot) {
+			default: /*None data*/
+				break;
+			case 4: /*PIO data in, T_DIR=1 match check*/
+				if ((cdb[2] & 3) && 
+					(cdb[2] & 0x8) == 0)
+				{
+					OsPrint(("PIO data in, T_DIR=1 match check"));
+					goto error;
+				}
+				pCmd->flags.data_in = 1;
+						break;
+			case 5: /*PIO data out, T_DIR=0 match check*/
+				if ((cdb[2] & 3) && 
+					(cdb[2] & 0x8))
+				{
+					OsPrint(("PIO data out, T_DIR=0 match check"));
+					goto error;
+				}
+
+				pCmd->flags.data_out = 1;
+				break;
+		}
+		pCmd->type = CMD_TYPE_PASSTHROUGH;
+		pCmd->priv = ext = cmdext_get(vbus_ext);
+		HPT_ASSERT(ext);
+		ext->ccb = ccb;
+		pCmd->target = vd;
+		pCmd->done = os_cmddone;
+		pCmd->buildsgl = os_buildsgl;
+		pCmd->psg = ext->psg;
+
+		if(!ccb->csio.dxfer_len)
+		{
+			ldm_queue_cmd(pCmd);
+			return;
+		}
+		pCmd->flags.physical_sg = 1;
+		error = bus_dmamap_load_ccb(vbus_ext->io_dmat, 
+					ext->dma_map, ccb, 
+					hpt_io_dmamap_callback, pCmd,
+				    	BUS_DMA_WAITOK
+					);
+		KdPrint(("bus_dmamap_load return %d", error));
+		if (error && error!=EINPROGRESS) {
+			os_printk("bus_dmamap_load error %d", error);
+			cmdext_put(ext);
+			ldm_free_cmds(pCmd);
+			ccb->ccb_h.status = CAM_REQ_CMP_ERR;
+			xpt_done(ccb);
+		}
+		return;
+error:
+		ldm_free_cmds(pCmd);
+		ccb->ccb_h.status = CAM_REQ_INVALID;
+		break;
+	}
+
+	case INQUIRY:
+	{
+		PINQUIRYDATA inquiryData;
+		HIM_DEVICE_CONFIG devconf;
+		HPT_U8 *rbuf;
+
+		memset(ccb->csio.data_ptr, 0, ccb->csio.dxfer_len);
+		inquiryData = (PINQUIRYDATA)ccb->csio.data_ptr;
+
+		if (cdb[1] & 1) {
+			rbuf = (HPT_U8 *)inquiryData;
+			switch(cdb[2]) {
+			case 0:
+				rbuf[0] = 0;
+				rbuf[1] = 0;
+				rbuf[2] = 0;
+				rbuf[3] = 3;
+				rbuf[4] = 0;
+				rbuf[5] = 0x80;
+				rbuf[6] = 0x83;
+				ccb->ccb_h.status = CAM_REQ_CMP;
+				break;
+			case 0x80: {
+				rbuf[0] = 0;
+				rbuf[1] = 0x80;
+				rbuf[2] = 0;
+				if (vd->type == VD_RAW) {
+					rbuf[3] = 20;
+					vd->u.raw.him->get_device_config(vd->u.raw.phy_dev,&devconf);
+					memcpy(&rbuf[4], devconf.pIdentifyData->SerialNumber, 20);
+					ldm_ide_fixstring(&rbuf[4], 20);
+				} else {
+					rbuf[3] = 1;
+					rbuf[4] = 0x20;
+				}
+				ccb->ccb_h.status = CAM_REQ_CMP;				
+				break;
+			}
+			case 0x83:
+				rbuf[0] = 0;
+				rbuf[1] = 0x83;
+				rbuf[2] = 0;
+				rbuf[3] = 12; 
+				rbuf[4] = 1;
+				rbuf[5] = 2; 
+				rbuf[6] = 0;
+				rbuf[7] = 8; 
+				rbuf[8] = 0; 
+				rbuf[9] = 0x19;
+				rbuf[10] = 0x3C;
+				rbuf[11] = 0;
+				rbuf[12] = 0;
+				rbuf[13] = 0;
+				rbuf[14] = 0;
+				rbuf[15] = 0;
+				ccb->ccb_h.status = CAM_REQ_CMP;			
+				break;
+			default:
+				ccb->ccb_h.status = CAM_REQ_INVALID;
+				break;
+			}
+
+			break;
+		} 
+		else if (cdb[2]) {	
+			ccb->ccb_h.status = CAM_REQ_INVALID;
+			break;
+		}
+
+		inquiryData->DeviceType = 0; /*DIRECT_ACCESS_DEVICE*/
+		inquiryData->Versions = 5; /*SPC-3*/
+		inquiryData->ResponseDataFormat = 2;
+		inquiryData->AdditionalLength = 0x5b;
+		inquiryData->CommandQueue = 1;
+
+		if (ccb->csio.dxfer_len > 63) {
+			rbuf = (HPT_U8 *)inquiryData;			
+			rbuf[58] = 0x60;
+			rbuf[59] = 0x3;
+			
+			rbuf[64] = 0x3; 
+			rbuf[66] = 0x3; 
+			rbuf[67] = 0x20;
+			
+		}
+		
+		if (vd->type == VD_RAW) {
+			vd->u.raw.him->get_device_config(vd->u.raw.phy_dev,&devconf);
+
+			if ((devconf.pIdentifyData->GeneralConfiguration & 0x80))
+				inquiryData->RemovableMedia = 1;
+
+			
+			memcpy(&inquiryData->VendorId, "ATA     ", 8);
+			memcpy(&inquiryData->ProductId, devconf.pIdentifyData->ModelNumber, 16);
+			ldm_ide_fixstring((HPT_U8 *)&inquiryData->ProductId, 16);
+			memcpy(&inquiryData->ProductRevisionLevel, devconf.pIdentifyData->FirmwareRevision, 4);
+			ldm_ide_fixstring((HPT_U8 *)&inquiryData->ProductRevisionLevel, 4);
+			if (inquiryData->ProductRevisionLevel[0] == 0 || inquiryData->ProductRevisionLevel[0] == ' ')
+				memcpy(&inquiryData->ProductRevisionLevel, "n/a ", 4);
+		} else {
+			memcpy(&inquiryData->VendorId, "HPT     ", 8);
+			snprintf((char *)&inquiryData->ProductId, 16, "DISK_%d_%d        ",
+				os_get_vbus_seq(vbus_ext), vd->target_id);
+			inquiryData->ProductId[15] = ' ';
+			memcpy(&inquiryData->ProductRevisionLevel, "4.00", 4);
+		}
+
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		break;
+	}
+	case READ_CAPACITY:
+	{
+		HPT_U8 *rbuf = ccb->csio.data_ptr;
+		HPT_U32 cap;
+		HPT_U8 sector_size_shift = 0;
+		HPT_U64 new_cap;
+		HPT_U32 sector_size = 0;
+
+		if (mIsArray(vd->type))
+			sector_size_shift = vd->u.array.sector_size_shift;
+		else{
+			if(vd->type == VD_RAW){
+				sector_size = vd->u.raw.logical_sector_size;
+			}
+		
+			switch (sector_size) {
+				case 0x1000:
+					KdPrint(("set 4k setctor size in READ_CAPACITY"));
+					sector_size_shift = 3;
+					break;
+				default:
+					break;
+			}			
+		}
+		new_cap = vd->capacity >> sector_size_shift;
+		
+		if (new_cap > 0xfffffffful)
+			cap = 0xffffffff;
+		else
+			cap = new_cap - 1;
+			
+		rbuf[0] = (HPT_U8)(cap>>24);
+		rbuf[1] = (HPT_U8)(cap>>16);
+		rbuf[2] = (HPT_U8)(cap>>8);
+		rbuf[3] = (HPT_U8)cap;
+		rbuf[4] = 0;
+		rbuf[5] = 0;
+		rbuf[6] = 2 << sector_size_shift;
+		rbuf[7] = 0;
+
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		break;
+	}
+	
+	case REPORT_LUNS:
+	{
+		HPT_U8 *rbuf = ccb->csio.data_ptr;
+		memset(rbuf, 0, 16);
+		rbuf[3] = 8;
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		break;				
+	}
+	case SERVICE_ACTION_IN: 
+	{
+		HPT_U8 *rbuf = ccb->csio.data_ptr;
+		HPT_U64	cap = 0;
+		HPT_U8 sector_size_shift = 0;
+		HPT_U32 sector_size = 0;
+
+		if(mIsArray(vd->type))
+			sector_size_shift = vd->u.array.sector_size_shift;
+		else{
+			if(vd->type == VD_RAW){
+				sector_size = vd->u.raw.logical_sector_size;
+			}
+		
+			switch (sector_size) {
+				case 0x1000:
+					KdPrint(("set 4k setctor size in SERVICE_ACTION_IN"));
+					sector_size_shift = 3;
+					break;
+				default:
+					break;
+			}			
+		}
+		cap = (vd->capacity >> sector_size_shift) - 1;
+					
+		rbuf[0] = (HPT_U8)(cap>>56);
+		rbuf[1] = (HPT_U8)(cap>>48);
+		rbuf[2] = (HPT_U8)(cap>>40);
+		rbuf[3] = (HPT_U8)(cap>>32);
+		rbuf[4] = (HPT_U8)(cap>>24);
+		rbuf[5] = (HPT_U8)(cap>>16);
+		rbuf[6] = (HPT_U8)(cap>>8);
+		rbuf[7] = (HPT_U8)cap;
+		rbuf[8] = 0;
+		rbuf[9] = 0;
+		rbuf[10] = 2 << sector_size_shift;
+		rbuf[11] = 0;
+		
+		if(!mIsArray(vd->type)){
+			rbuf[13] = vd->u.raw.logicalsectors_per_physicalsector;
+			rbuf[14] = (HPT_U8)((vd->u.raw.lowest_aligned >> 8) & 0x3f);
+			rbuf[15] = (HPT_U8)(vd->u.raw.lowest_aligned);
+		}
+		
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		break;	
+	}
+	
+	case READ_6:
+	case READ_10:
+	case READ_16:
+	case WRITE_6:
+	case WRITE_10:
+	case WRITE_16:
+	case 0x13:
+	case 0x2f:
+	case 0x8f: /* VERIFY_16 */
+	{
+		int error;
+		HPT_U8 sector_size_shift = 0;
+		HPT_U32 sector_size = 0;
+		pCmd = ldm_alloc_cmds(vbus, vd->cmds_per_request);
+		if(!pCmd){
+			KdPrint(("Failed to allocate command!"));
+			ccb->ccb_h.status = CAM_BUSY;
+			break;
+		}
+
+		switch (cdb[0])	{
+		case READ_6:
+		case WRITE_6:
+		case 0x13:
+			pCmd->uCmd.Ide.Lba =  ((HPT_U32)cdb[1] << 16) | ((HPT_U32)cdb[2] << 8) | (HPT_U32)cdb[3];
+			pCmd->uCmd.Ide.nSectors = (HPT_U16) cdb[4];
+			break;
+		case READ_16:
+		case WRITE_16:
+		case 0x8f: /* VERIFY_16 */
+		{
+			HPT_U64 block =
+				((HPT_U64)cdb[2]<<56) |
+				((HPT_U64)cdb[3]<<48) |
+				((HPT_U64)cdb[4]<<40) |
+				((HPT_U64)cdb[5]<<32) |
+				((HPT_U64)cdb[6]<<24) |
+				((HPT_U64)cdb[7]<<16) |
+				((HPT_U64)cdb[8]<<8) |
+				((HPT_U64)cdb[9]);
+			pCmd->uCmd.Ide.Lba = block;
+			pCmd->uCmd.Ide.nSectors = (HPT_U16)cdb[13] | ((HPT_U16)cdb[12]<<8);
+			break;
+		}
+		
+		default:
+			pCmd->uCmd.Ide.Lba = (HPT_U32)cdb[5] | ((HPT_U32)cdb[4] << 8) | ((HPT_U32)cdb[3] << 16) | ((HPT_U32)cdb[2] << 24);
+			pCmd->uCmd.Ide.nSectors = (HPT_U16) cdb[8] | ((HPT_U16)cdb[7]<<8);
+			break;
+		}
+
+		if(mIsArray(vd->type)) {
+			sector_size_shift = vd->u.array.sector_size_shift;
+		}
+		else{
+			if(vd->type == VD_RAW){
+				sector_size = vd->u.raw.logical_sector_size;
+			}
+	  		
+			switch (sector_size) {
+				case 0x1000:
+					KdPrint(("<8>resize sector size from 4k to 512"));
+					sector_size_shift = 3;
+					break;
+				default:
+					break;
+	 		}			
+		}
+		pCmd->uCmd.Ide.Lba <<= sector_size_shift;
+		pCmd->uCmd.Ide.nSectors <<= sector_size_shift;
+
+		
+		switch (cdb[0]) {
+		case READ_6:
+		case READ_10:
+		case READ_16:
+			pCmd->flags.data_in = 1;
+			break;
+		case WRITE_6:
+		case WRITE_10:
+		case WRITE_16:
+			pCmd->flags.data_out = 1;
+			break;
+		}
+		pCmd->priv = ext = cmdext_get(vbus_ext);
+		HPT_ASSERT(ext);
+		ext->ccb = ccb;
+		pCmd->target = vd;
+		pCmd->done = os_cmddone;
+		pCmd->buildsgl = os_buildsgl;
+		pCmd->psg = ext->psg;
+		pCmd->flags.physical_sg = 1;
+		error = bus_dmamap_load_ccb(vbus_ext->io_dmat, 
+					ext->dma_map, ccb, 
+					hpt_io_dmamap_callback, pCmd,
+				    	BUS_DMA_WAITOK
+					);
+		KdPrint(("bus_dmamap_load return %d", error));
+		if (error && error!=EINPROGRESS) {
+			os_printk("bus_dmamap_load error %d", error);
+			cmdext_put(ext);
+			ldm_free_cmds(pCmd);
+			ccb->ccb_h.status = CAM_REQ_CMP_ERR;
+			xpt_done(ccb);
+		}
+		return;
+	}
+
+	default:
+		ccb->ccb_h.status = CAM_REQ_INVALID;
+		break;
+	}
+
+	xpt_done(ccb);
+	return;
+}
+
+static void hpt_action(struct cam_sim *sim, union ccb *ccb)
+{
+	PVBUS_EXT vbus_ext = (PVBUS_EXT)cam_sim_softc(sim);
+
+	KdPrint(("hpt_action(fn=%d, id=%d)", ccb->ccb_h.func_code, ccb->ccb_h.target_id));
+
+	hpt_assert_vbus_locked(vbus_ext);
+	switch (ccb->ccb_h.func_code) {
+	
+	case XPT_SCSI_IO:
+		hpt_scsi_io(vbus_ext, ccb);
+		return;
+
+	case XPT_RESET_BUS:
+		ldm_reset_vbus((PVBUS)vbus_ext->vbus);
+		break;
+
+	case XPT_GET_TRAN_SETTINGS:
+	case XPT_SET_TRAN_SETTINGS:
+		ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
+		break;
+
+	case XPT_CALC_GEOMETRY:
+		ccb->ccg.heads = 255;
+		ccb->ccg.secs_per_track = 63;
+		ccb->ccg.cylinders = ccb->ccg.volume_size / (ccb->ccg.heads * ccb->ccg.secs_per_track);
+		ccb->ccb_h.status = CAM_REQ_CMP;
+		break;
+
+	case XPT_PATH_INQ:
+	{
+		struct ccb_pathinq *cpi = &ccb->cpi;
+
+		cpi->version_num = 1;
+		cpi->hba_inquiry = PI_SDTR_ABLE;
+		cpi->target_sprt = 0;
+		cpi->hba_misc = PIM_NOBUSRESET;
+		cpi->hba_eng_cnt = 0;
+		cpi->max_target = osm_max_targets;
+		cpi->max_lun = 0;
+		cpi->unit_number = cam_sim_unit(sim);
+		cpi->bus_id = cam_sim_bus(sim);
+		cpi->initiator_id = osm_max_targets;
+		cpi->base_transfer_speed = 3300;
+
+		strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
+		strlcpy(cpi->hba_vid, "HPT   ", HBA_IDLEN);
+		strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
+		cpi->transport = XPORT_SPI;
+		cpi->transport_version = 2;
+		cpi->protocol = PROTO_SCSI;
+		cpi->protocol_version = SCSI_REV_2;
+		cpi->ccb_h.status = CAM_REQ_CMP;
+		break;
+	}
+
+	default:
+		ccb->ccb_h.status = CAM_REQ_INVALID;
+		break;
+	}
+
+	xpt_done(ccb);
+	return;
+}
+
+static void hpt_pci_intr(void *arg)
+{	
+	PVBUS_EXT vbus_ext = (PVBUS_EXT)arg;
+	hpt_lock_vbus(vbus_ext);
+	ldm_intr((PVBUS)vbus_ext->vbus);
+	hpt_unlock_vbus(vbus_ext);
+}
+
+static void hpt_poll(struct cam_sim *sim)
+{
+	PVBUS_EXT vbus_ext = cam_sim_softc(sim);
+	hpt_assert_vbus_locked(vbus_ext);
+	ldm_intr((PVBUS)vbus_ext->vbus);
+}
+
+static void hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path, void * arg)
+{
+	KdPrint(("hpt_async"));
+}
+
+static int hpt_shutdown(device_t dev)
+{
+	KdPrint(("hpt_shutdown(dev=%p)", dev));
+	return 0;
+}
+
+static int hpt_detach(device_t dev)
+{
+	/* we don't allow the driver to be unloaded. */
+	return EBUSY;
+}
+
+static void hpt_ioctl_done(struct _IOCTL_ARG *arg)
+{
+	arg->ioctl_cmnd = 0;
+	wakeup(arg);
+}
+
+static void __hpt_do_ioctl(PVBUS_EXT vbus_ext, IOCTL_ARG *ioctl_args)
+{
+	ioctl_args->result = -1;
+	ioctl_args->done = hpt_ioctl_done;
+	ioctl_args->ioctl_cmnd = (void *)1;
+
+	hpt_lock_vbus(vbus_ext);
+	ldm_ioctl((PVBUS)vbus_ext->vbus, ioctl_args);
+
+	while (ioctl_args->ioctl_cmnd) {
+		if (hpt_sleep(vbus_ext, ioctl_args, PPAUSE, "hptctl", HPT_OSM_TIMEOUT)==0)
+			break;
+		ldm_reset_vbus((PVBUS)vbus_ext->vbus);
+		__hpt_do_tasks(vbus_ext);
+	}
+
+	/* KdPrint(("ioctl %x result %d", ioctl_args->dwIoControlCode, ioctl_args->result)); */
+
+	hpt_unlock_vbus(vbus_ext);
+}
+
+static void hpt_do_ioctl(IOCTL_ARG *ioctl_args)
+{
+	PVBUS vbus;
+	PVBUS_EXT vbus_ext;
+	
+	ldm_for_each_vbus(vbus, vbus_ext) {
+		__hpt_do_ioctl(vbus_ext, ioctl_args);
+		if (ioctl_args->result!=HPT_IOCTL_RESULT_WRONG_VBUS)
+			return;
+	}
+}
+
+#define HPT_DO_IOCTL(code, inbuf, insize, outbuf, outsize) ({\
+	IOCTL_ARG arg;\
+	arg.dwIoControlCode = code;\
+	arg.lpInBuffer = inbuf;\
+	arg.lpOutBuffer = outbuf;\
+	arg.nInBufferSize = insize;\
+	arg.nOutBufferSize = outsize;\
+	arg.lpBytesReturned = 0;\
+	hpt_do_ioctl(&arg);\
+	arg.result;\
+})
+
+#define DEVICEID_VALID(id) ((id) && ((HPT_U32)(id)!=0xffffffff))
+
+static int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount)
+{
+	int i;
+	HPT_U32 count = nMaxCount-1;
+	
+	if (HPT_DO_IOCTL(HPT_IOCTL_GET_LOGICAL_DEVICES,
+			&count, sizeof(HPT_U32), pIds, sizeof(DEVICEID)*nMaxCount))
+		return -1;
+
+	nMaxCount = (int)pIds[0];
+	for (i=0; i<nMaxCount; i++) pIds[i] = pIds[i+1];
+	return nMaxCount;
+}
+
+static int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo)
+{
+	return HPT_DO_IOCTL(HPT_IOCTL_GET_DEVICE_INFO_V3,
+				&id, sizeof(DEVICEID), pInfo, sizeof(LOGICAL_DEVICE_INFO_V3));
+}
+
+/* not belong to this file logically, but we want to use ioctl interface */
+static int __hpt_stop_tasks(PVBUS_EXT vbus_ext, DEVICEID id)
+{
+	LOGICAL_DEVICE_INFO_V3 devinfo;
+	int i, result;
+	DEVICEID param[2] = { id, 0 };
+	
+	if (hpt_get_device_info_v3(id, &devinfo))
+		return -1;
+		
+	if (devinfo.Type!=LDT_ARRAY)
+		return -1;
+		
+	if (devinfo.u.array.Flags & ARRAY_FLAG_REBUILDING)
+		param[1] = AS_REBUILD_ABORT;
+	else if (devinfo.u.array.Flags & ARRAY_FLAG_VERIFYING)
+		param[1] = AS_VERIFY_ABORT;
+	else if (devinfo.u.array.Flags & ARRAY_FLAG_INITIALIZING)
+		param[1] = AS_INITIALIZE_ABORT;
+	else if (devinfo.u.array.Flags & ARRAY_FLAG_TRANSFORMING)
+		param[1] = AS_TRANSFORM_ABORT;
+	else
+		return -1;
+
+	KdPrint(("SET_ARRAY_STATE(%x, %d)", param[0], param[1]));
+	result = HPT_DO_IOCTL(HPT_IOCTL_SET_ARRAY_STATE,
+				param, sizeof(param), 0, 0);
+				
+	for (i=0; i<devinfo.u.array.nDisk; i++)
+		if (DEVICEID_VALID(devinfo.u.array.Members[i]))
+			__hpt_stop_tasks(vbus_ext, devinfo.u.array.Members[i]);
+			
+	return result;
+}
+
+static void hpt_stop_tasks(PVBUS_EXT vbus_ext)
+{
+	DEVICEID ids[32];
+	int i, count;
+
+	count = hpt_get_logical_devices((DEVICEID *)&ids, sizeof(ids)/sizeof(ids[0]));
+	
+	for (i=0; i<count; i++)
+		__hpt_stop_tasks(vbus_ext, ids[i]);
+}
+
+static	d_open_t	hpt_open;
+static	d_close_t	hpt_close;
+static	d_ioctl_t	hpt_ioctl;
+static  int 		hpt_rescan_bus(void);
+
+static struct cdevsw hpt_cdevsw = {
+	.d_open =	hpt_open,
+	.d_close =	hpt_close,
+	.d_ioctl =	hpt_ioctl,
+	.d_name =	driver_name,
+	.d_version =	D_VERSION,
+};
+
+static struct intr_config_hook hpt_ich;
+
+/*
+ * hpt_final_init will be called after all hpt_attach.
+ */
+static void hpt_final_init(void *dummy)
+{
+	int       i,unit_number=0;
+	PVBUS_EXT vbus_ext;
+	PVBUS vbus;
+	PHBA hba;
+
+	/* Clear the config hook */
+	config_intrhook_disestablish(&hpt_ich);
+
+	/* allocate memory */
+	i = 0;
+	ldm_for_each_vbus(vbus, vbus_ext) {
+		if (hpt_alloc_mem(vbus_ext)) {
+			os_printk("out of memory");
+			return;
+		}
+		i++;
+	}
+
+	if (!i) {
+		if (bootverbose)
+			os_printk("no controller detected.");
+		return;
+	}
+
+	/* initializing hardware */
+	ldm_for_each_vbus(vbus, vbus_ext) {
+		/* make timer available here */
+		mtx_init(&vbus_ext->lock, "hptsleeplock", NULL, MTX_DEF);
+		callout_init_mtx(&vbus_ext->timer, &vbus_ext->lock, 0);
+		if (hpt_init_vbus(vbus_ext)) {
+			os_printk("fail to initialize hardware");
+			break; /* FIXME */
+		}
+	}
+
+	/* register CAM interface */
+	ldm_for_each_vbus(vbus, vbus_ext) {
+		struct cam_devq *devq;
+		struct ccb_setasync	ccb;
+		
+		if (bus_dma_tag_create(NULL,/* parent */
+				4,	/* alignment */
+				BUS_SPACE_MAXADDR_32BIT+1, /* boundary */
+				BUS_SPACE_MAXADDR,	/* lowaddr */
+				BUS_SPACE_MAXADDR, 	/* highaddr */
+				NULL, NULL, 		/* filter, filterarg */
+				PAGE_SIZE * (os_max_sg_descriptors-1),	/* maxsize */
+				os_max_sg_descriptors,	/* nsegments */
+				0x10000,	/* maxsegsize */
+				BUS_DMA_WAITOK,		/* flags */
+				busdma_lock_mutex,	/* lockfunc */
+				&vbus_ext->lock,		/* lockfuncarg */
+				&vbus_ext->io_dmat	/* tag */))
+		{
+			return ;
+		}
+
+		for (i=0; i<os_max_queue_comm; i++) {
+			POS_CMDEXT ext = (POS_CMDEXT)malloc(sizeof(OS_CMDEXT), M_DEVBUF, M_WAITOK);
+			if (!ext) {
+				os_printk("Can't alloc cmdext(%d)", i);
+				return ;
+			}
+			ext->vbus_ext = vbus_ext;
+			ext->next = vbus_ext->cmdext_list;
+			vbus_ext->cmdext_list = ext;
+	
+			if (bus_dmamap_create(vbus_ext->io_dmat, 0, &ext->dma_map)) {
+				os_printk("Can't create dma map(%d)", i);
+				return ;
+			}
+			callout_init_mtx(&ext->timeout, &vbus_ext->lock, 0);
+		}
+
+		if ((devq = cam_simq_alloc(os_max_queue_comm)) == NULL) {
+			os_printk("cam_simq_alloc failed");
+			return ;
+		}
+
+		hpt_lock_vbus(vbus_ext);
+		vbus_ext->sim = cam_sim_alloc(hpt_action, hpt_poll, driver_name,
+				vbus_ext, unit_number, &vbus_ext->lock,
+				os_max_queue_comm, /*tagged*/8,  devq);
+		unit_number++;
+		if (!vbus_ext->sim) {
+			os_printk("cam_sim_alloc failed");
+			cam_simq_free(devq);
+			hpt_unlock_vbus(vbus_ext);
+			return ;
+		}
+
+		if (xpt_bus_register(vbus_ext->sim, NULL, 0) != CAM_SUCCESS) {
+			os_printk("xpt_bus_register failed");
+			cam_sim_free(vbus_ext->sim, /*free devq*/ TRUE);
+			vbus_ext->sim = NULL;
+			return ;
+		}
+	
+		if (xpt_create_path(&vbus_ext->path, /*periph */ NULL,
+				cam_sim_path(vbus_ext->sim), CAM_TARGET_WILDCARD,
+				CAM_LUN_WILDCARD) != CAM_REQ_CMP)
+		{
+			os_printk("xpt_create_path failed");
+			xpt_bus_deregister(cam_sim_path(vbus_ext->sim));
+			cam_sim_free(vbus_ext->sim, /*free_devq*/TRUE);
+			hpt_unlock_vbus(vbus_ext);
+			vbus_ext->sim = NULL;
+			return ;
+		}
+		hpt_unlock_vbus(vbus_ext);
+
+		xpt_setup_ccb(&ccb.ccb_h, vbus_ext->path, /*priority*/5);
+		ccb.ccb_h.func_code = XPT_SASYNC_CB;
+		ccb.event_enable = AC_LOST_DEVICE;
+		ccb.callback = hpt_async;
+		ccb.callback_arg = vbus_ext;
+		xpt_action((union ccb *)&ccb);
+
+		for (hba = vbus_ext->hba_list; hba; hba = hba->next) {
+			int rid = 0;
+			if ((hba->irq_res = bus_alloc_resource(hba->pcidev,
+				SYS_RES_IRQ, &rid, 0, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL)
+			{
+				os_printk("can't allocate interrupt");
+				return ;
+			}
+			
+			if (bus_setup_intr(hba->pcidev, hba->irq_res, INTR_TYPE_CAM | INTR_MPSAFE,
+				NULL, hpt_pci_intr, vbus_ext, &hba->irq_handle)) 
+			{
+				os_printk("can't set up interrupt");
+				return ;
+			}
+			hba->ldm_adapter.him->intr_control(hba->ldm_adapter.him_handle, HPT_TRUE);
+
+		}
+
+		vbus_ext->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, 
+									hpt_shutdown_vbus, vbus_ext, SHUTDOWN_PRI_DEFAULT);
+		if (!vbus_ext->shutdown_eh)
+			os_printk("Shutdown event registration failed");
+	}
+	
+	ldm_for_each_vbus(vbus, vbus_ext) {
+		TASK_INIT(&vbus_ext->worker, 0, (task_fn_t *)hpt_do_tasks, vbus_ext);
+		if (vbus_ext->tasks)
+			TASK_ENQUEUE(&vbus_ext->worker);
+	}	
+
+	make_dev(&hpt_cdevsw, DRIVER_MINOR, UID_ROOT, GID_OPERATOR,
+	    S_IRUSR | S_IWUSR, "%s", driver_name);
+}
+
+#if defined(KLD_MODULE)
+
+typedef struct driverlink *driverlink_t;
+struct driverlink {
+	kobj_class_t	driver;
+	TAILQ_ENTRY(driverlink) link;	/* list of drivers in devclass */
+};
+
+typedef TAILQ_HEAD(driver_list, driverlink) driver_list_t;
+
+struct devclass {
+	TAILQ_ENTRY(devclass) link;
+	devclass_t	parent;		/* parent in devclass hierarchy */
+	driver_list_t	drivers;     /* bus devclasses store drivers for bus */
+	char		*name;
+	device_t	*devices;	/* array of devices indexed by unit */
+	int		maxunit;	/* size of devices array */
+};
+
+static void override_kernel_driver(void)
+{
+	driverlink_t dl, dlfirst;
+	driver_t *tmpdriver;
+	devclass_t dc = devclass_find("pci");
+	
+	if (dc){
+		dlfirst = TAILQ_FIRST(&dc->drivers);
+		for (dl = dlfirst; dl; dl = TAILQ_NEXT(dl, link)) {
+			if(strcmp(dl->driver->name, driver_name) == 0) {
+				tmpdriver=dl->driver;
+				dl->driver=dlfirst->driver;
+				dlfirst->driver=tmpdriver;
+				break;
+			}
+		}
+	}
+}
+
+#else 
+#define override_kernel_driver()
+#endif
+
+static void hpt_init(void *dummy)
+{
+	if (bootverbose)
+		os_printk("%s %s", driver_name_long, driver_ver);
+
+	override_kernel_driver();
+	init_config();
+
+	hpt_ich.ich_func = hpt_final_init;
+	hpt_ich.ich_arg = NULL;
+	if (config_intrhook_establish(&hpt_ich) != 0) {
+		printf("%s: cannot establish configuration hook\n",
+		    driver_name_long);
+	}
+
+}
+SYSINIT(hptinit, SI_SUB_CONFIGURE, SI_ORDER_FIRST, hpt_init, NULL);
+
+/*
+ * CAM driver interface
+ */
+static device_method_t driver_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		hpt_probe),
+	DEVMETHOD(device_attach,	hpt_attach),
+	DEVMETHOD(device_detach,	hpt_detach),
+	DEVMETHOD(device_shutdown,	hpt_shutdown),
+	{ 0, 0 }
+};
+
+static driver_t hpt_pci_driver = {
+	driver_name,
+	driver_methods,
+	sizeof(HBA)
+};
+
+static devclass_t	hpt_devclass;
+
+#ifndef TARGETNAME
+#error "no TARGETNAME found"
+#endif
+
+/* use this to make TARGETNAME be expanded */
+#define __DRIVER_MODULE(p1, p2, p3, p4, p5, p6) DRIVER_MODULE(p1, p2, p3, p4, p5, p6)
+#define __MODULE_VERSION(p1, p2) MODULE_VERSION(p1, p2)
+#define __MODULE_DEPEND(p1, p2, p3, p4, p5) MODULE_DEPEND(p1, p2, p3, p4, p5)
+__DRIVER_MODULE(TARGETNAME, pci, hpt_pci_driver, hpt_devclass, 0, 0);
+__MODULE_VERSION(TARGETNAME, 1);
+__MODULE_DEPEND(TARGETNAME, cam, 1, 1, 1);
+
+static int hpt_open(struct cdev *dev, int flags, int devtype, struct thread *td)
+{
+	return 0;
+}
+
+static int hpt_close(struct cdev *dev, int flags, int devtype, struct thread *td)
+{
+	return 0;
+}
+
+static int hpt_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, struct thread *td)
+{
+	PHPT_IOCTL_PARAM piop=(PHPT_IOCTL_PARAM)data;
+	IOCTL_ARG ioctl_args;
+	HPT_U32 bytesReturned = 0;
+
+	switch (cmd){
+	case HPT_DO_IOCONTROL:
+	{	
+		if (piop->Magic == HPT_IOCTL_MAGIC || piop->Magic == HPT_IOCTL_MAGIC32) {
+			KdPrint(("ioctl=%x in=%p len=%d out=%p len=%d\n",
+				piop->dwIoControlCode,
+				piop->lpInBuffer,
+				piop->nInBufferSize,
+				piop->lpOutBuffer,
+				piop->nOutBufferSize));
+			
+		memset(&ioctl_args, 0, sizeof(ioctl_args));
+		
+		ioctl_args.dwIoControlCode = piop->dwIoControlCode;
+		ioctl_args.nInBufferSize = piop->nInBufferSize;
+		ioctl_args.nOutBufferSize = piop->nOutBufferSize;
+		ioctl_args.lpBytesReturned = &bytesReturned;
+
+		if (ioctl_args.nInBufferSize) {
+			ioctl_args.lpInBuffer = malloc(ioctl_args.nInBufferSize, M_DEVBUF, M_WAITOK);
+			if (!ioctl_args.lpInBuffer)
+				goto invalid;
+			if (copyin((void*)piop->lpInBuffer,
+					ioctl_args.lpInBuffer, piop->nInBufferSize))
+				goto invalid;
+		}
+	
+		if (ioctl_args.nOutBufferSize) {
+			ioctl_args.lpOutBuffer = malloc(ioctl_args.nOutBufferSize, M_DEVBUF, M_WAITOK | M_ZERO);
+			if (!ioctl_args.lpOutBuffer)
+				goto invalid;
+		}
+		
+		hpt_do_ioctl(&ioctl_args);
+	
+		if (ioctl_args.result==HPT_IOCTL_RESULT_OK) {
+			if (piop->nOutBufferSize) {
+				if (copyout(ioctl_args.lpOutBuffer,
+					(void*)piop->lpOutBuffer, piop->nOutBufferSize))
+					goto invalid;
+			}
+			if (piop->lpBytesReturned) {
+				if (copyout(&bytesReturned,
+					(void*)piop->lpBytesReturned, sizeof(HPT_U32)))
+					goto invalid;
+			}
+			if (ioctl_args.lpInBuffer) free(ioctl_args.lpInBuffer, M_DEVBUF);
+			if (ioctl_args.lpOutBuffer) free(ioctl_args.lpOutBuffer, M_DEVBUF);
+			return 0;
+		}
+invalid:
+		if (ioctl_args.lpInBuffer) free(ioctl_args.lpInBuffer, M_DEVBUF);
+		if (ioctl_args.lpOutBuffer) free(ioctl_args.lpOutBuffer, M_DEVBUF);
+		return EFAULT;
+	}
+	return EFAULT;
+	}
+
+	case HPT_SCAN_BUS:
+	{
+		return hpt_rescan_bus();
+	}
+	default:
+		KdPrint(("invalid command!"));
+		return EFAULT;
+	}	
+
+}
+
+static int	hpt_rescan_bus(void)
+{
+	union ccb			*ccb;
+	PVBUS 				vbus;
+	PVBUS_EXT			vbus_ext;	
+		
+	ldm_for_each_vbus(vbus, vbus_ext) {
+		if ((ccb = xpt_alloc_ccb()) == NULL)
+		{
+			return(ENOMEM);
+		}
+		if (xpt_create_path(&ccb->ccb_h.path, NULL, cam_sim_path(vbus_ext->sim),
+			CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP)	
+		{
+			xpt_free_ccb(ccb);
+			return(EIO);
+		}
+		xpt_rescan(ccb);
+	}
+	return(0);	
+}


Property changes on: trunk/sys/dev/hptnr/hptnr_osm_bsd.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/i386-elf.hptnr_lib.o.uu
===================================================================
--- trunk/sys/dev/hptnr/i386-elf.hptnr_lib.o.uu	                        (rev 0)
+++ trunk/sys/dev/hptnr/i386-elf.hptnr_lib.o.uu	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,7900 @@
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+M3`X```$!``!0#@```0$``%0.```!`0``6`X```$!``!<#@```0$``&`.```!
+M`0``9`X```$!``!H#@```0$``&P.```!`0``<`X```$!``!T#@```0$``'@.
+M```!`0``?`X```$!``"`#@```0$``(0.```!`0``B`X```$!``",#@```0$`
+M`)`.```!`0``E`X```$!``"8#@```0$``)P.```!`0``H`X```$!``"D#@``
+M`0$``*@.```!`0``K`X```$!``"P#@```0$``+0.```!`0``N`X```$!``"\
+M#@```0$``,`.```!`0``Q`X```$!``#(#@```0$``,P.```!`0``T`X```$!
+M``#4#@```0$``- at .```!`0``@`````$&``",`````0$``)`````!`0``E```
+M``$!``"8`````0$``)P````!`0``H`````$!``"D`````0$``*@````!`0``
+MK`````$!``"P`````0$``+0````!`0``N`````$!``"\`````0$``,`````!
+MM```Q`````$!``#(`````0$``,P````!`0``T`````$!``#4`````0$``-@`
+M```!`0``W`````$!``#@`````0$``.0````!`0``Z`````$!``#L`````0$`
+M`/`````!`0``]`````$!``#X`````0$``/P````!-```!`$```$!```(`0``
+M`0$```P!```!`0``$`$```$!```4`0```0$``!@!```!A0``@`$```$&``",
+M`0```0$``)`!```!`0``E`$```$!``"8`0```0$``)P!```!`0``H`$```$!
+M``"D`0```0$``*@!```!`0``K`$```$!``"P`0```0$``+0!```!`0``N`$`
+M``$!``"\`0```0$``,`!```!QP``Q`$```$!``#(`0```0$``,P!```!`0``
+MT`$```$!``#4`0```0$``-@!```!`0``W`$```$!``#@`0```0$``.0!```!
+M`0``Z`$```$!``#L`0```0$``/`!```!`0``]`$```$!``#X`0```0$``/P!
+M```!D@$`!`(```$!```(`@```0$```P"```!`0``$`(```$!```4`@```0$`
+M`!@"```!S0``?`(```$!``"``@```0$``(0"```!`0``D`(```$!``"4`@``
+M`0$``)@"```!`0``Q`(```$!``#,`@```0$``-@"```!`0``X`(```$!``#L
+M`@```0$``/0"```!`0````,```$!```(`P```0$``!0#```!`0``'`,```$!
+M```H`P```0$``#`#```!`0``/`,```$!``!$`P```0$``%`#```!`0``5`,`
+M``$!``!8`P```0$``&0#```!`0``:`,```$!``!L`P```0$``'@#```!`0``
+M@`,```$!``",`P```0$``)0#```!`0``H`,```$!``"D`P```0$``*@#```!
+M`0``M`,```$!``"X`P```0$``+P#```!`0``R`,```$!``#,`P```0$``-`#
+M```!`0``W`,```$!``#@`P```0$``.0#```!`0``\`,```$!``#T`P```0$`
+M`/@#```!`0``!`0```$!```,!````0$``!@$```!`0``(`0```$!```L!```
+M`0$``#0$```!`0``0`0```$!``!(!````0$``%0$```!`0``7`0```$!``!H
+M!````0$``'`$```!`0``?`0```$!``"$!````0$``)`$```!`0``F`0```$!
+M``"D!````0$``*P$```!`0``N`0```$!``#`!````0$``,P$```!`0``T`0`
+M``$!``#4!````0$``.`$```!`0``Y`0```$!``#H!````0$``/0$```!`0``
+M_`0```$!```(!0```0$``!`%```!`0``'`4```$!```D!0```0$``#`%```!
+M`0``.`4```$!``!$!0```0$``$P%```!`0``6`4```$!``!<!0```0$``&`%
+M```!`0``;`4```$!``!T!0```0$``(`%```!`0``A`4```$!``"(!0```0$`
+M`)0%```!`0``G`4```$!``"H!0```0$``*P%```!`0``L`4```$!``"\!0``
+M`0$``,0%```!`0``T`4```$!``#8!0```0$``.0%```!`0``[`4```$!``#X
+M!0```0$````&```!`0``#`8```$!```0!@```0$``!0&```!`0``(`8```$!
+M```D!@```0$``"@&```!`0``-`8```$!```\!@```0$``$@&```!`0``4`8`
+M``$!``!<!@```0$``&0&```!`0``<`8```$!``!X!@```0$``(0&```!`0``
+MC`8```$!``"8!@```0$``*`&```!`0``K`8```$!``"T!@```0$``,`&```!
+M`0``R`8```$!``#4!@```0$``-P&```!`0``Z`8```$!``#P!@```0$``/P&
+M```!`0````<```$!```$!P```0$``!`'```!`0``&`<```$!```D!P```0$`
+M`"P'```!`0``.`<```$!``!`!P```0$``$P'```!`0``5`<```$!``!@!P``
+L`0$``&0'```!`0``:`<```$!``!T!P```0$``'@'```!`0``?`<```$!````
+`
+end


Property changes on: trunk/sys/dev/hptnr/i386-elf.hptnr_lib.o.uu
___________________________________________________________________
Added: mnbsd:nokeywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: trunk/sys/dev/hptnr/ldm.h
===================================================================
--- trunk/sys/dev/hptnr/ldm.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/ldm.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,536 @@
+/* $MidnightBSD$ */
+/* $Id: ldm.h,v 1.78 2010/05/10 10:08:46 lcn Exp $ */
+/*-
+ * Copyright (C) 2005-2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/ldm.h 314224 2017-02-24 21:22:13Z pfg $
+ */
+#include <dev/hptnr/hptnr_config.h>
+#ifndef _HPT_LDM_H_
+#define _HPT_LDM_H_
+
+#define VERMAGIC_LDM 75
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+#define __hpt_set_ver(x, v1, v2, v3, v4, v5) x ## _R_ ## v1 ## _ ## v2 ## _ ## v3 ## _ ## v4 ## _ ## v5
+#define _hpt_set_ver(x, v1, v2, v3, v4, v5)  __hpt_set_ver(x, v1, v2, v3, v4, v5)
+#define hpt_set_ver(x)               _hpt_set_ver(x, VERMAGIC_OSM, VERMAGIC_HIM, VERMAGIC_LDM, VERMAGIC_ARRAY, MAX_MEMBERS)
+
+#define ldm_register_him        hpt_set_ver(ldm_register_him)
+#define ldm_register_vdev_class hpt_set_ver(ldm_register_vdev_class)
+#define ldm_alloc_cmds          hpt_set_ver(ldm_alloc_cmds)
+
+
+#ifndef HPT_INTERFACE_VERSION
+#define HPT_INTERFACE_VERSION 0x02010000
+#endif
+
+#ifndef MAX_PARTITIONS_PER_DISK
+#define MAX_PARTITIONS_PER_DISK	4
+#endif
+
+#if defined(__MAX_PARTITIONS_PER_DISK) && MAX_PARTITIONS_PER_DISK > __MAX_PARTITIONS_PER_DISK
+#error "Please redefine MAX_PARTITIONS_PER_DISK!!!"
+#endif
+
+
+typedef char check_HPT_TIME_is_unsigned[ (HPT_TIME)(-1) > 0 ? 1 : -1 ];
+
+#define hpt_time_after_eq(a, b) ((int)(a) - (int)(b) >= 0)
+#define hpt_time_after(a, b) ((int)(a) - (int)(b) > 0)
+
+
+
+struct freelist {
+	int dma;
+	HPT_UINT alignment;
+	HPT_UINT count;
+	HPT_UINT size;
+	void * head;
+	struct freelist *next;
+#if DBG
+	char *tag;
+	HPT_UINT reserved_count; 
+	#define freelist_debug_tag(list, _tag) (list)->tag = _tag
+#else 
+	#define freelist_debug_tag(list, _tag)
+#endif
+};
+
+
+void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count);
+
+void *freelist_get(struct freelist *);
+void freelist_put(struct freelist *, void *p);
+
+void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count);
+void *freelist_get_dma(struct freelist *, BUS_ADDRESS *busaddr);
+void freelist_put_dma(struct freelist *, void *p, BUS_ADDRESS busaddr);
+
+
+#define freelist_reserve_with_tag(list, osext, size, count) \
+	do {\
+		freelist_debug_tag(list, #list  " at " __FILE__);\
+		freelist_reserve(list, osext, (HPT_UINT)(size), (HPT_UINT)(count));\
+	}while(0)
+
+#define freelist_reserve_dma_with_tag(list, osext, size, alignment, count) \
+	do {\
+		freelist_debug_tag(list, #list " at " __FILE__);\
+		freelist_reserve_dma(list, osext, (HPT_UINT)(size), (HPT_UINT)(alignment), (HPT_UINT)(count));\
+	}while(0)
+
+struct lock_request {
+	HPT_U64 start, end;
+	struct lock_request *next;
+	struct list_head waiters; /* blocked commands */
+	struct tq_item callback;
+	int lock_cc;
+};
+
+#define INIT_LOCK_REQUEST(req, _start, _end, _cb, _arg, _cc) \
+	do {\
+		(req)->next = 0;\
+		(req)->start = _start;\
+		(req)->end = _end;\
+		INIT_TQ_ITEM(&(req)->callback, _cb, _arg);\
+		INIT_LIST_HEAD(&(req)->waiters);\
+		(req)->lock_cc = _cc;\
+	} while (0)
+
+struct task_queue {
+	struct tq_item *head, *tail;
+};
+
+#define TQ_EMPTY(tq) ((tq)->head==0)
+
+struct dmapool_order {
+	HPT_UINT npages;
+	struct tq_item wakeup_fn;
+	struct dmapool_order *next;
+};
+
+struct dmapool_client {
+	void * handle;
+	HPT_UINT (*shrink)(void *handle, HPT_UINT npages);
+	int (*resume)(void *handle);
+	struct dmapool_client *next;
+};
+
+typedef struct _VBUS * PVBUS;
+typedef struct _VDEV * PVDEV;
+
+
+void dmapool_register_client(PVBUS vbus, struct dmapool_client *client);
+
+
+void dmapool_active(PVBUS vbus);
+
+/* return 0 if the request is immediately satisfied, non-zero otherwise. */
+int dmapool_make_order(PVBUS vbus, struct dmapool_order *order);
+
+
+void *dmapool_get_page(PVBUS vbus, BUS_ADDRESS *busaddr);
+void *dmapool_get_page_at(PVBUS vbus, void *p, BUS_ADDRESS *busaddr);
+void dmapool_put_page(PVBUS vbus, void *p, BUS_ADDRESS busaddr);
+void dmapool_init(PVBUS vbus);
+HPT_UINT dmapool_max_class_pages(PVBUS vbus);
+
+
+struct timer_call {
+	HPT_U32 interval; /*microseconds*/
+	HPT_TIME expire_time; /*microseconds*/
+	void (*proc)(void * arg);
+	void * arg;
+	struct timer_call ** pprev;
+	struct timer_call * next;
+};
+
+#define ldm_init_timer(timer) do { (timer)->next=0; (timer)->pprev=0; } while (0)
+
+#define INIT_TIMER_CALL(timer, _interval, _proc, _arg) \
+	do { \
+		HPT_ASSERT((timer)->next==0 && (timer)->pprev==0);\
+		(timer)->interval = _interval;\
+		(timer)->proc = _proc;\
+		(timer)->arg = _arg;\
+	} while(0)
+
+void ldm_request_timer(PVBUS vbus, struct timer_call * tc);
+void ldm_remove_timer(PVBUS vbus, struct timer_call * tc);
+void ldm_on_timer(PVBUS vbus);
+
+
+typedef struct _LDM_ADAPTER
+{
+	struct _LDM_ADAPTER *next;
+	HIM  *him;
+	void *him_handle;
+	PVBUS vbus;
+	struct freelist freelist_dev;
+	int devid_start;
+	struct freelist freelist_plugged_dpc;
+	HPT_BOOL master;
+}
+LDM_ADAPTER, *PLDM_ADAPTER;
+
+typedef struct _IOCTL_ARG
+{
+	struct list_head link;
+	PVBUS vbus;
+	HPT_U32 dwIoControlCode;
+	HPT_U32 nInBufferSize;
+	HPT_U32 nOutBufferSize;
+	void *  lpInBuffer;
+	void *  lpOutBuffer;
+	HPT_U32 *lpBytesReturned;
+	void *  ioctl_cmnd;
+	void (* done)(struct _IOCTL_ARG *);
+	int     result; /* HPT_IOCTL_RESULT_ */
+	struct tq_item dpc;
+} IOCTL_ARG;
+
+#define HPT_IOCTL_RESULT_OK          0
+#define HPT_IOCTL_RESULT_FAILED     (-1)
+#define HPT_IOCTL_RESULT_INVALID    (-2)
+#define HPT_IOCTL_RESULT_RETRY      (-3)
+#define HPT_IOCTL_RESULT_WRONG_VBUS (-4)
+
+void ldm_ioctl(	PVBUS vbus,	IOCTL_ARG *IAPnt);
+void ldm_set_autorebuild(PVBUS vbus, int enable);
+HPT_U32 ldm_get_device_id(PVDEV vd); /* for ioctl */
+
+#ifndef __HPT_RAW_LBA
+#define __HPT_RAW_LBA HPT_RAW_LBA
+#endif
+
+#include <dev/hptnr/array.h>
+
+typedef struct hpt_raw_disk
+{
+#ifdef SUPPORT_ARRAY
+	PRAW_PARTITION raw_part_list;
+	__HPT_RAW_LBA max_available_capacity; 
+	__HPT_RAW_LBA total_available_capacity;
+#endif
+	__HPT_RAW_LBA real_capacity;
+	__HPT_RAW_LBA head_position;
+	HPT_U32	logical_sector_size;
+	HPT_U8   logicalsectors_per_physicalsector;
+	HPT_U16 lowest_aligned;
+	HPT_U16 max_sectors_per_cmd;
+	HPT_U8  max_queue_depth;
+	HPT_U8  user_select_mode;
+
+	HPT_UINT  uninitialized : 1;
+	HPT_UINT  legacy_disk : 1;
+	HPT_UINT  is_spare : 1;
+	HPT_UINT  v3_format : 1;
+	HPT_UINT  need_sync : 1;
+	HPT_UINT  temp_spare : 1;
+	HPT_UINT  need_check_array : 1;
+	HPT_UINT  df_user_mode_set: 1;
+
+	HPT_UINT  df_read_ahead_set: 1;
+	HPT_UINT  enable_read_ahead : 1;
+	HPT_UINT  df_write_cache_set: 1;
+	HPT_UINT  enable_write_cache : 1;
+	HPT_UINT  df_tcq_set: 1;
+	HPT_UINT  enable_tcq : 1;
+	HPT_UINT  df_ncq_set: 1;
+	HPT_UINT  enable_ncq : 1;
+
+	HPT_UINT  bad_sector : 1;
+	HPT_UINT  df_sas : 1;
+
+	HIM  *				him;
+	int 				index;
+	PLDM_ADAPTER		adapter;
+	void *				phy_dev;
+
+	char    model[40];
+
+	struct tq_item reset_dpc;
+	int reset_pending;
+
+	struct tq_item fail_dpc;
+	int fail_pending;
+}
+HPT_RAW_DISK, *PHPT_RAW_DISK;
+
+struct vdev_class
+{
+	struct vdev_class *next;
+
+	HPT_U8   __type;
+	HPT_U8   stripped;        /* RAID0,3,5,6 */
+	HPT_U8   redundancy;      /* RAID1-1, RAID3/5-1, RAID6-2 */
+	HPT_U8   must_init;       /* RAID3,5,6 */
+	HPT_U8   docache;
+
+	HPT_UINT vbus_ext_size;
+	HPT_UINT vbus_ext_offset; /* used by LDM */
+	HPT_UINT dev_ext_size;
+	HPT_UINT cmd_ext_size;
+
+	
+	void (*get_mem_info)(PVBUS vbus, void *osext, int phydev_count);
+	void (*queue_cmd)(PCOMMAND cmd);
+	void (*member_failed)(struct _VDEV * vd); 
+
+	
+	void (*initialize)(PVBUS vbus);
+	void (*release)(PVBUS vbus); 
+	int  (*add)(PVDEV vd); 
+	void (*remove)(PVDEV vd); 
+	void (*reset)(PVDEV vd); 
+	void (*sync_stamp)(PVDEV vd);
+	int  (*support_type)(int type);
+};
+
+
+#define VDEV_CLASS_CONSTRUCTOR(type, prefix) { \
+	0, \
+	type, \
+	prefix ## _stripped, \
+	prefix ## _redundancy, \
+	prefix ## _must_init, \
+	0, \
+	(HPT_UINT)(prefix ## _vbus_ext_size), \
+	0, \
+	(HPT_UINT)(prefix ## _dev_ext_size), \
+	(HPT_UINT)(prefix ## _cmd_ext_size), \
+	prefix ## _get_mem_info, \
+	prefix ## _queue_cmd, \
+	prefix ## _member_failed, \
+	prefix ## _initialize, \
+	prefix ## _release, \
+	prefix ## _add, \
+	prefix ## _remove, \
+	prefix ## _reset, \
+	prefix ## _sync_stamp, \
+	0 \
+}
+
+#define VD_RAW       1
+#define VD_PARTITION 4
+
+#define mIsArray(vdev_type) ((vdev_type)>VD_PARTITION)
+
+#define VD_RAID0     5
+#define VD_RAID1     6
+#define VD_JBOD      7
+#define VD_RAID5     8
+#define VD_RAID6     9
+#define VD_RAID3     10
+#define VD_RAID4     11
+#define VD_RAID1E    12
+
+#define MAX_VD_TYPE_ID  12
+
+struct vdev_class *ldm_find_vdev_class(HPT_U8 type);
+
+typedef struct _VDEV {
+	PVBUS vbus;
+	struct vdev_class *Class;
+	HPT_U8 type;
+	PVDEV parent;
+	void * ext;
+	HPT_U64 capacity;
+	int     target_id;
+	HPT_UINT cmds_per_request;
+
+	union {
+#ifdef SUPPORT_ARRAY
+		HPT_ARRAY array;
+		HPT_PARTITION partition;
+#endif
+		HPT_RAW_DISK raw;
+	} u;
+
+	HPT_U8 vf_online : 1;
+	HPT_U8 vf_bootmark : 1;
+	HPT_U8 vf_bootable : 1;
+	HPT_U8 vf_resetting: 1;
+	HPT_U8 vf_quiesced: 1;
+	HPT_U8 vf_clslock: 1;
+
+	HPT_U8 cache_policy; /* see CACHE_POLICY_* */
+
+	HPT_UINT cq_len;
+	HPT_UINT cmds_sent;
+
+	struct list_head link;
+	struct list_head cq_wait_send;
+	struct list_head cq_sent;
+
+	HPT_U32  last_active;
+	int cq_priority;
+	struct list_head cq_wait_lock;
+	struct lock_request *locks_granted;
+	struct lock_request *locks_wait;
+	HPT_U32 ioctl_id; 
+	void * cc_ext;
+}
+VDEV;
+
+#define CACHE_POLICY_NONE 0
+#define CACHE_POLICY_WRITE_THROUGH 1
+#define CACHE_POLICY_WRITE_BACK 2
+
+
+extern HIM *him_list;
+
+
+void ldm_register_him(PHIM him);
+
+
+void ldm_register_vdev_class(struct vdev_class *Class);
+
+
+HPT_BOOL ldm_register_adapter(PLDM_ADAPTER adapter);
+
+
+int init_config(void);
+
+HPT_UINT ldm_get_vbus_size(void);
+
+
+void ldm_create_vbus(PVBUS vbus, void *osext);
+
+
+void ldm_get_mem_info(PVBUS vbus, void *osext);
+
+
+void *ldm_get_vbus_ext(PVBUS vbus, struct vdev_class *Class);
+
+
+PVBUS ldm_get_next_vbus(PVBUS vbus, void **posext);
+
+#define ldm_for_each_vbus(vbus, vbus_ext) \
+	for (vbus = ldm_get_next_vbus(0, (void **)(void *)&vbus_ext); vbus; \
+		vbus = ldm_get_next_vbus(vbus, (void **)(void *)&vbus_ext))
+
+
+void ldm_initialize_vbus_async(PVBUS vbus, PLDM_ADAPTER master_adapter, void (*done)(void *osext));
+
+/* ldm_initialize_vbus is deprecated since it will hold the CPU too long. */
+#define ldm_initialize_vbus(vbus, adapter) ldm_initialize_vbus_async(vbus, adapter, 0)
+
+
+void ldm_release_vbus(PVBUS vbus);
+
+PVDEV ldm_create_vdev(PVBUS vbus, HPT_U8 type);
+void ldm_release_vdev(PVDEV vd);
+
+PVDEV ldm_find_target(PVBUS vbus, int id);
+PVDEV ldm_find_stamp(PVBUS vbus, HPT_U32 stamp, int seq);
+
+
+PCOMMAND ldm_alloc_cmds(PVBUS vbus, HPT_UINT cnt);
+void ldm_free_cmds(PCOMMAND cmd);
+
+HPT_UINT ldm_get_cmd_size(void);
+PCOMMAND ldm_alloc_cmds_from_list(PVBUS vbus, struct freelist *list, HPT_UINT cnt);
+void ldm_free_cmds_to_list(struct freelist *list, PCOMMAND cmd);
+
+
+PCOMMAND __ldm_alloc_cmd(struct freelist *list);
+
+#ifdef OS_SUPPORT_TASK
+#define CMD_SET_PRIORITY(cmd, pri) cmd->priority = (pri)
+#else 
+#define CMD_SET_PRIORITY(cmd, pri)
+#endif
+
+
+#define CMD_GROUP_GET(grp, cmd) \
+	do {\
+		grp->grplist->count++;\
+		cmd = __ldm_alloc_cmd(grp->grplist);\
+		cmd->vbus = grp->vbus;\
+		cmd->grplist = grp->grplist;\
+		CMD_SET_PRIORITY(cmd, grp->priority);\
+	} while(0)
+
+#define CMD_GROUP_PUT(grp, cmd) \
+	do {\
+		freelist_put(grp->grplist, cmd);\
+		grp->grplist->count--;\
+	} while (0)
+
+
+
+
+void ldm_queue_cmd(PCOMMAND cmd);
+void vdev_queue_cmd(PCOMMAND cmd);
+void ldm_finish_cmd(PCOMMAND cmd);
+
+
+int  ldm_acquire_lock(PVDEV vd, struct lock_request *req);
+void ldm_release_lock(PVDEV vd, struct lock_request *req);
+
+void ldm_queue_task(struct task_queue *tq, struct tq_item *t);
+void ldm_queue_vbus_dpc(PVBUS vbus, struct tq_item *t);
+
+HPT_BOOL ldm_intr(PVBUS vbus);
+void ldm_run(PVBUS vbus);
+int ldm_idle(PVBUS vbus);
+
+
+int ldm_reset_vbus(PVBUS vbus);
+
+
+void ldm_suspend(PVBUS vbus);
+void ldm_resume(PVBUS vbus);
+LDM_ADAPTER *ldm_resume_adapter(PVBUS vbus, PLDM_ADAPTER ldm_adapter);
+void ldm_shutdown(PVBUS vbus);/*shutdown all the controllers*/
+
+
+#define HIM_EVENT_DEVICE_REMOVED 1
+#define HIM_EVENT_DEVICE_PLUGGED 2
+#define HIM_EVENT_DEVICE_ERROR   3
+#define HIM_EVENT_RESET_REQUIRED 4
+#define HIM_EVENT_QUIESCE_DEVICE 5
+#define HIM_EVENT_UNQUIESCE_DEVICE 6
+#define HIM_EVENT_CONFIG_CHANGED 7
+
+void ldm_event_notify(HPT_U32 event, void *arg1, void *arg2);
+
+void log_sector_repair(PVDEV vd, int success, HPT_LBA lba, HPT_U16 nsectors);
+
+void ldm_register_device(PVDEV vd);
+void ldm_unregister_device(PVDEV vd);
+
+PVBUS him_handle_to_vbus(void * him_handle);
+void ldm_ide_fixstring (HPT_U8 *s, const int bytecount);
+#if defined(__cplusplus)
+}
+#endif
+#endif


Property changes on: trunk/sys/dev/hptnr/ldm.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/list.h
===================================================================
--- trunk/sys/dev/hptnr/list.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/list.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,130 @@
+/* $MidnightBSD$ */
+/* $Id: list.h,v 1.6 2006/10/31 06:25:28 gmm Exp $ */
+/*-
+ * Copyright (C) 2005-2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/list.h 252867 2013-07-06 07:49:41Z delphij $
+ */
+#include <dev/hptnr/hptnr_config.h>
+#ifndef _HPT_LIST_H_
+#define _HPT_LIST_H_
+
+#ifndef _LINUX_LIST_H
+
+#ifndef HPT_INLINE
+#define HPT_INLINE __inline
+#endif
+
+struct list_head {
+	struct list_head *next, *prev;
+};
+
+#define INIT_LIST_HEAD(ptr) do { (ptr)->next = (ptr); (ptr)->prev = (ptr); } while (0)
+
+static HPT_INLINE void __list_add(struct list_head * _new, struct list_head * prev, struct list_head * next)
+{
+	next->prev = _new;
+	_new->next = next;
+	_new->prev = prev;
+	prev->next = _new;
+}
+
+static HPT_INLINE void list_add(struct list_head *_new, struct list_head *head)
+{
+	__list_add(_new, head, head->next);
+}
+
+static HPT_INLINE void list_add_tail(struct list_head *_new, struct list_head *head)
+{
+	__list_add(_new, head->prev, head);
+}
+
+static HPT_INLINE void __list_del(struct list_head * prev, struct list_head * next)
+{
+	next->prev = prev;
+	prev->next = next;
+}
+
+static HPT_INLINE void list_del(struct list_head *entry)
+{
+	__list_del(entry->prev, entry->next);
+}
+
+static HPT_INLINE void list_del_init(struct list_head *entry)
+{
+	__list_del(entry->prev, entry->next);
+	INIT_LIST_HEAD(entry); 
+}
+
+static HPT_INLINE int list_empty(struct list_head *head)
+{
+	HPT_ASSERT(!(head->next==head && head->prev!=head));
+	return head->next == head;
+}
+
+static HPT_INLINE void __list_splice(struct list_head *list,
+				 struct list_head *head)
+{
+	struct list_head *first = list->next;
+	struct list_head *last = list->prev;
+	struct list_head *at = head->next;
+
+	first->prev = head;
+	head->next = first;
+
+	last->next = at;
+	at->prev = last;
+}
+
+static HPT_INLINE void list_splice(struct list_head *list, struct list_head *head)
+{
+	if (!list_empty(list))
+		__list_splice(list, head);
+}
+
+static HPT_INLINE void list_splice_init(struct list_head *list, struct list_head *head)
+{
+	if (!list_empty(list)) {
+		__list_splice(list, head);
+		INIT_LIST_HEAD(list);
+	}
+}
+
+#define list_entry(ptr, type, member) \
+	((type *)((char *)(ptr)-(HPT_UPTR)(&((type *)0)->member)))
+
+#define list_for_each(pos, head) \
+	for (pos = (head)->next; pos != (head); pos = pos->next)
+
+#define list_for_each_safe(pos, n, head) \
+	for (pos = (head)->next, n = pos->next; pos != (head); \
+		pos = n, n = pos->next)
+
+#define get_first_item(attached, type, member) \
+	((type *)((char *)((attached)->next)-(HPT_UPTR)(&((type *)0)->member)))
+
+#endif
+
+#endif


Property changes on: trunk/sys/dev/hptnr/list.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/os_bsd.h
===================================================================
--- trunk/sys/dev/hptnr/os_bsd.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/os_bsd.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,206 @@
+/* $MidnightBSD$ */
+/* $Id: os_bsd.h,v 1.20 2010/05/11 03:12:11 lcn Exp $ */
+/*-
+ * HighPoint RAID Driver for FreeBSD
+ * Copyright (C) 2005-2011 HighPoint Technologies, Inc. All Rights Reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/os_bsd.h 281957 2015-04-25 00:32:47Z delphij $
+ */
+
+#include <dev/hptnr/hptnr_config.h>
+
+#ifndef _OS_BSD_H
+#define _OS_BSD_H
+
+#ifndef DBG
+#define  DBG	0
+#endif
+
+#include <sys/param.h>
+#include <sys/types.h>
+#include <sys/cons.h>
+#include <sys/time.h>
+#include <sys/systm.h> 
+
+#include <sys/stat.h>
+#include <sys/malloc.h>
+#include <sys/conf.h>
+#include <sys/libkern.h>
+#include <sys/kernel.h>
+
+#include <sys/kthread.h>
+#include <sys/mutex.h>
+#include <sys/module.h>
+
+#include <sys/eventhandler.h>
+#include <sys/bus.h>
+#include <sys/taskqueue.h>
+#include <sys/ioccom.h>
+
+#include <machine/resource.h>
+#include <machine/pci_cfgreg.h>
+#include <machine/bus.h>
+#include <machine/stdarg.h>
+#include <sys/rman.h>
+
+#include <vm/vm.h>
+#include <vm/pmap.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+
+#include <cam/cam.h>
+#include <cam/cam_ccb.h>
+#include <cam/cam_sim.h>
+#include <cam/cam_xpt_sim.h>
+#include <cam/cam_debug.h>
+#include <cam/cam_xpt_periph.h>
+#include <cam/cam_periph.h>
+#include <cam/scsi/scsi_all.h>
+#include <cam/scsi/scsi_message.h>
+
+
+typedef struct _INQUIRYDATA {
+	u_char DeviceType : 5;
+	u_char DeviceTypeQualifier : 3;
+	u_char DeviceTypeModifier : 7;
+	u_char RemovableMedia : 1;
+	u_char Versions;
+	u_char ResponseDataFormat;
+	u_char AdditionalLength;
+	u_char Reserved[2];
+	u_char SoftReset : 1;
+	u_char CommandQueue : 1;
+	u_char Reserved2 : 1;
+	u_char LinkedCommands : 1;
+	u_char Synchronous : 1;
+	u_char Wide16Bit : 1;
+	u_char Wide32Bit : 1;
+	u_char RelativeAddressing : 1;
+	u_char VendorId[8];
+	u_char ProductId[16];
+	u_char ProductRevisionLevel[4];
+	u_char VendorSpecific[20];
+	u_char Reserved3[40];
+} 
+__attribute__((packed))
+INQUIRYDATA, *PINQUIRYDATA;
+
+#endif
+
+/* private headers */
+
+#include <dev/hptnr/osm.h>
+#include <dev/hptnr/him.h>
+#include <dev/hptnr/ldm.h>
+
+/* driver parameters */
+extern const char driver_name[];
+extern const char driver_name_long[];
+extern const char driver_ver[];
+extern int  osm_max_targets;
+
+/*
+ * adapter/vbus extensions:
+ * each physical controller has an adapter_ext, passed to him.create_adapter()
+ * each vbus has a vbus_ext passed to ldm_create_vbus().
+ */
+#define EXT_TYPE_HBA  1
+#define EXT_TYPE_VBUS 2
+
+typedef struct _hba {
+	int               ext_type;
+	LDM_ADAPTER       ldm_adapter;
+	device_t          pcidev;
+	PCI_ADDRESS       pciaddr;
+	struct _vbus_ext *vbus_ext;
+	struct _hba      *next;
+	
+	struct {
+		struct resource *res;
+		int type;
+		int rid;
+		void *base;
+	}
+	pcibar[6];
+
+	struct resource  *irq_res;
+	void             *irq_handle;
+}
+HBA, *PHBA;
+
+typedef struct _os_cmdext {
+	struct _vbus_ext  *vbus_ext;
+	struct _os_cmdext *next;
+	union ccb         *ccb;
+	bus_dmamap_t       dma_map;
+	struct callout     timeout;
+	SG                 psg[os_max_sg_descriptors];
+}
+OS_CMDEXT, *POS_CMDEXT;
+
+typedef struct _vbus_ext {
+	int               ext_type;
+	struct _vbus_ext *next;
+	PHBA              hba_list;
+	struct freelist  *freelist_head;
+	struct freelist  *freelist_dma_head;
+	
+	struct cam_sim   *sim;    /* sim for this vbus */
+	struct cam_path  *path;   /* peripheral, path, tgt, lun with this vbus */
+	struct mtx        lock; /* general purpose lock */
+	bus_dma_tag_t     io_dmat; /* I/O buffer DMA tag */
+	
+	POS_CMDEXT        cmdext_list;
+
+	OSM_TASK         *tasks;
+	struct task       worker;
+	
+	struct callout    timer;
+
+	eventhandler_tag  shutdown_eh;
+	
+	/* the LDM vbus instance continues */
+	unsigned long vbus[0] __attribute__((aligned(sizeof(unsigned long))));
+}
+VBUS_EXT, *PVBUS_EXT;
+
+#define hpt_lock_vbus(vbus_ext)   mtx_lock(&(vbus_ext)->lock)
+#define hpt_unlock_vbus(vbus_ext) mtx_unlock(&(vbus_ext)->lock)
+#define	hpt_assert_vbus_locked(vbus_ext)	mtx_assert(&(vbus_ext)->lock, MA_OWNED)
+
+
+#define HPT_OSM_TIMEOUT (120*hz)  /* timeout value for OS commands */
+
+#define HPT_DO_IOCONTROL	_IOW('H', 0, HPT_IOCTL_PARAM)
+
+#define HPT_SCAN_BUS		_IO('H', 1)
+
+#define TASK_ENQUEUE(task)	taskqueue_enqueue(taskqueue_swi,(task));
+
+static	__inline	int hpt_sleep(PVBUS_EXT vbus_ext, void *ident, int priority, const char *wmesg, int timo)
+{
+	return	msleep(ident, &vbus_ext->lock, priority, wmesg, timo);
+}


Property changes on: trunk/sys/dev/hptnr/os_bsd.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/hptnr/osm.h
===================================================================
--- trunk/sys/dev/hptnr/osm.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/osm.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,240 @@
+/* $MidnightBSD$ */
+/* $Id: osm.h,v 1.10 2010/05/11 10:30:33 lcn Exp $ */
+/*-
+ * Copyright (C) 2005-2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/osm.h 284935 2015-06-29 18:34:30Z delphij $
+ */
+#include <dev/hptnr/hptnr_config.h>
+#ifndef _HPT_OSM_H_
+#define _HPT_OSM_H_
+
+#define VERMAGIC_OSM 6
+
+
+#define MAX_MEMBERS 64
+
+#define os_max_queue_comm 32
+#define os_max_sg_descriptors 18
+
+
+extern int os_max_cache_size;
+
+
+#define DMAPOOL_PAGE_SIZE 0x1000 /* PAGE_SIZE (i386/x86_64) */
+#define os_max_cache_pages (os_max_cache_size/DMAPOOL_PAGE_SIZE)
+
+/* data types */
+typedef unsigned int HPT_UINT, HPT_U32;
+typedef unsigned long HPT_UPTR;
+typedef unsigned short HPT_U16;
+typedef unsigned char HPT_U8;
+typedef unsigned long HPT_TIME;
+typedef unsigned long long HPT_U64;
+
+#define CPU_TO_LE64(x) (x)
+#define CPU_TO_LE32(x) (x)
+#define CPU_TO_LE16(x) (x)
+#define LE32_TO_CPU(x) (x)
+#define LE16_TO_CPU(x) (x)
+#define LE64_TO_CPU(x) (x)
+
+static __inline HPT_U64 CPU_TO_BE64(HPT_U64 x)
+{
+	HPT_U8 *p = (HPT_U8 *)&x;
+	return ((HPT_U64)p[0] << 56) |
+		((HPT_U64)p[1] << 48) |
+		((HPT_U64)p[2] << 40) |
+		((HPT_U64)p[3] << 32) |
+		((HPT_U64)p[4] << 24) |
+		((HPT_U64)p[5] << 16) |
+		((HPT_U64)p[6] << 8) |
+		p[7];
+}
+
+static __inline HPT_U32 CPU_TO_BE32(HPT_U32 x)
+{
+	HPT_U8 *p = (HPT_U8 *)&x;
+	return ((HPT_U32)p[0] << 24) |
+		((HPT_U32)p[1] << 16) |
+		((HPT_U32)p[2] << 8) | p[3];
+}
+
+static __inline HPT_U16 CPU_TO_BE16(HPT_U16 x)
+{
+	return ((HPT_U8)x << 8) | (x>>8);
+}
+
+#define BE16_TO_CPU(x) CPU_TO_BE16(x)
+#define BE32_TO_CPU(x) CPU_TO_BE32(x)
+#define BE64_TO_CPU(x) CPU_TO_BE64(x)
+
+#define FAR
+#define EXTERN_C
+
+typedef void * HPT_PTR;
+
+typedef HPT_U64 HPT_LBA;
+typedef HPT_U64 HPT_RAW_LBA;
+#define MAX_LBA_VALUE 0xffffffffffffffffull
+#define MAX_RAW_LBA_VALUE MAX_LBA_VALUE
+#define RAW_LBA(x) (x)
+#define LO_LBA(x) ((HPT_U32)(x))
+#define HI_LBA(x) (sizeof(HPT_LBA)>4? (HPT_U32)((x)>>32) : 0)
+#define LBA_FORMAT_STR "0x%llX"
+
+typedef HPT_U64 BUS_ADDRESS;
+#define LO_BUSADDR(x) ((HPT_U32)(x))
+#define HI_BUSADDR(x) (sizeof(BUS_ADDRESS)>4? (x)>>32 : 0)
+
+typedef unsigned char HPT_BOOL;
+#define HPT_TRUE  1
+#define HPT_FALSE 0
+
+typedef struct _TIME_RECORD {
+   HPT_U32        seconds:6;      /* 0 - 59 */
+   HPT_U32        minutes:6;      /* 0 - 59 */
+   HPT_U32        month:4;        /* 1 - 12 */
+   HPT_U32        hours:6;        /* 0 - 59 */
+   HPT_U32        day:5;          /* 1 - 31 */
+   HPT_U32        year:5;         /* 0=2000, 31=2031 */
+} TIME_RECORD;
+
+/* hardware access */
+HPT_U8   os_inb  (void *port);
+HPT_U16  os_inw  (void *port);
+HPT_U32  os_inl  (void *port);
+void     os_outb (void *port, HPT_U8 value);
+void     os_outw (void *port, HPT_U16 value);
+void     os_outl (void *port, HPT_U32 value);
+void     os_insw (void *port, HPT_U16 *buffer, HPT_U32 count);
+void     os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count);
+
+extern HPT_U32 __dummy_reg; /* to avoid the compiler warning */
+
+#define os_readb(addr) (*(HPT_U8 *)&__dummy_reg = *(volatile HPT_U8 *)(addr))
+#define os_readw(addr) (*(HPT_U16 *)&__dummy_reg = *(volatile HPT_U16 *)(addr))
+#define os_readl(addr) (*(HPT_U32 *)&__dummy_reg = *(volatile HPT_U32 *)(addr))
+
+#define os_writeb(addr, val) *(volatile HPT_U8 *)(addr) = (HPT_U8)(val)
+#define os_writew(addr, val) *(volatile HPT_U16 *)(addr) = (HPT_U16)(val)
+#define os_writel(addr, val) *(volatile HPT_U32 *)(addr) = (HPT_U32)(val)
+
+/* PCI configuration space for specified device*/
+HPT_U8   os_pci_readb (void *osext, HPT_U8 offset);
+HPT_U16  os_pci_readw (void *osext, HPT_U8 offset);
+HPT_U32  os_pci_readl (void *osext, HPT_U8 offset);
+void     os_pci_writeb(void *osext, HPT_U8 offset, HPT_U8 value);
+void     os_pci_writew(void *osext, HPT_U8 offset, HPT_U16 value);
+void     os_pci_writel(void *osext, HPT_U8 offset, HPT_U32 value);
+
+/* obsolute interface */
+#define MAX_PCI_BUS_NUMBER 0xff
+#define MAX_PCI_DEVICE_NUMBER 32
+#define MAX_PCI_FUNC_NUMBER 1
+HPT_U8 pcicfg_read_byte (HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg);
+HPT_U32 pcicfg_read_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg);
+void pcicfg_write_byte (HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg, HPT_U8 v);
+void pcicfg_write_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg, HPT_U32 v);
+
+
+void *os_map_pci_bar(
+	void *osext, 
+	int index,   
+	HPT_U32 offset,
+	HPT_U32 length
+);
+
+
+void os_unmap_pci_bar(void *osext, void *base);
+
+#define os_kmap_sgptr(psg) (psg->addr._logical)
+#define os_kunmap_sgptr(ptr)
+#define os_set_sgptr(psg, ptr) (psg)->addr._logical = (ptr)
+
+/* timer */
+void *os_add_timer(void *osext, HPT_U32 microseconds, void (*proc)(void *), void *arg);
+void  os_del_timer(void *handle);
+void  os_request_timer(void * osext, HPT_U32 interval);
+HPT_TIME os_query_time(void);
+
+/* task */
+#define OS_SUPPORT_TASK
+
+typedef struct _OSM_TASK {
+	struct _OSM_TASK *next;
+	void (*func)(void *vbus, void *data);
+	void *data;
+}
+OSM_TASK;
+
+void os_schedule_task(void *osext, OSM_TASK *task);
+
+/* misc */
+HPT_U32 os_get_stamp(void);
+void os_stallexec(HPT_U32 microseconds);
+
+#ifndef _SYS_LIBKERN_H_
+#define memcpy(dst, src, size) __builtin_memcpy((dst), (src), (size))
+#define memcmp(dst, src, size) __builtin_memcmp((dst), (src), (size))
+#define strcpy(dst, src) __builtin_strcpy((dst), (src))
+static __inline void * memset(void *dst, int c, unsigned long size)
+{
+	char *p;
+	for (p=(char*)dst; size; size--,p++) *p = c;
+	return dst;
+}
+#endif
+
+#define farMemoryCopy(a,b,c) memcpy((char *)(a), (char *)(b), (HPT_U32)c)
+
+
+#define os_register_device(osext, target_id)
+#define os_unregister_device(osext, target_id)
+int os_query_remove_device(void *osext, int target_id);
+int os_revalidate_device(void *osext, int target_id);
+
+HPT_U8 os_get_vbus_seq(void *osext);
+
+/* debug support */
+int  os_printk(char *fmt, ...);
+
+#if DBG
+extern int hpt_dbg_level;
+#define KdPrint(x)  do { if (hpt_dbg_level) os_printk x; } while (0)
+void __os_dbgbreak(const char *file, int line);
+#define os_dbgbreak() __os_dbgbreak(__FILE__, __LINE__)
+#define HPT_ASSERT(x) do { if (!(x)) os_dbgbreak(); } while (0)
+void os_check_stack(const char *location, int size);
+#define HPT_CHECK_STACK(size) os_check_stack(__FUNCTION__, (size))
+#else 
+#define KdPrint(x)
+#define HPT_ASSERT(x)
+#define HPT_CHECK_STACK(size)
+#endif
+
+#define OsPrint(x) do { os_printk x; } while (0)
+
+#endif


Property changes on: trunk/sys/dev/hptnr/osm.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
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Added: svn:mime-type
## -0,0 +1 ##
+text/plain
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Added: trunk/sys/dev/hptnr/wj.h
===================================================================
--- trunk/sys/dev/hptnr/wj.h	                        (rev 0)
+++ trunk/sys/dev/hptnr/wj.h	2018-05-27 23:50:14 UTC (rev 10106)
@@ -0,0 +1,58 @@
+/* $MidnightBSD$ */
+/* $Id: wj.h,v 1.1 2007/11/01 03:05:51 gmm Exp $ */
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/hptnr/wj.h 252867 2013-07-06 07:49:41Z delphij $
+ */
+
+#include <dev/hptnr/hptnr_config.h>
+ *
+ * NVRAM write journaling interface.
+ */
+
+#ifndef _WJ_H_
+#define _WJ_H_
+
+#if defined(SUPPORT_BBU) || defined(SUPPORT_NVRAM)
+
+void wj_init(PVBUS vbus, void *nvram_addr, HPT_U32 nvram_size);
+void *wj_add_entry(PVBUS vbus, PVDEV vd, HPT_LBA lba, HPT_U16 sectors);
+void *wj_get_entry(PVBUS vbus, PVDEV *vd_p, HPT_LBA *lba_p, HPT_U16 *sectors_p);
+void wj_del_entry(PVBUS vbus, void *handle);
+void wj_del_vd(PVBUS vbus, PVDEV vd);
+void wj_sync_stamp(PVBUS vbus, PVDEV vd);
+
+#else 
+
+#define wj_add_entry(vbus, vd, lba, sectors) 0
+#define wj_get_entry(vbus, vd_p, lba_p, sectors_p) 0
+#define wj_del_entry(vbus, handle) 0
+#define wj_del_vd(vbus, vd) 0
+#define wj_sync_stamp(vbus, vd) 0
+
+#endif
+
+#endif


Property changes on: trunk/sys/dev/hptnr/wj.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property


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