[Midnightbsd-cvs] src [10108] trunk/sys/dev: sync with freebsd
laffer1 at midnightbsd.org
laffer1 at midnightbsd.org
Sun May 27 19:51:41 EDT 2018
Revision: 10108
http://svnweb.midnightbsd.org/src/?rev=10108
Author: laffer1
Date: 2018-05-27 19:51:40 -0400 (Sun, 27 May 2018)
Log Message:
-----------
sync with freebsd
Modified Paths:
--------------
trunk/sys/dev/ed/ax88x90reg.h
trunk/sys/dev/ed/dl100xxreg.h
trunk/sys/dev/ed/if_ed.c
trunk/sys/dev/ed/if_ed98.h
trunk/sys/dev/ed/if_ed_3c503.c
trunk/sys/dev/ed/if_ed_cbus.c
trunk/sys/dev/ed/if_ed_hpp.c
trunk/sys/dev/ed/if_ed_isa.c
trunk/sys/dev/ed/if_ed_novell.c
trunk/sys/dev/ed/if_ed_pccard.c
trunk/sys/dev/ed/if_ed_pci.c
trunk/sys/dev/ed/if_ed_rtl80x9.c
trunk/sys/dev/ed/if_ed_sic.c
trunk/sys/dev/ed/if_ed_wd80x3.c
trunk/sys/dev/ed/if_edreg.h
trunk/sys/dev/ed/if_edvar.h
trunk/sys/dev/ed/rtl80x9reg.h
trunk/sys/dev/ed/tc5299jreg.h
trunk/sys/dev/eisa/eisa_if.m
trunk/sys/dev/eisa/eisaconf.c
trunk/sys/dev/eisa/eisaconf.h
trunk/sys/dev/en/if_en_pci.c
trunk/sys/dev/en/midway.c
trunk/sys/dev/en/midwayreg.h
trunk/sys/dev/en/midwayvar.h
trunk/sys/dev/ep/if_ep.c
trunk/sys/dev/ep/if_ep_eisa.c
trunk/sys/dev/ep/if_ep_isa.c
trunk/sys/dev/ep/if_ep_mca.c
trunk/sys/dev/ep/if_ep_pccard.c
trunk/sys/dev/ep/if_epreg.h
trunk/sys/dev/ep/if_epvar.h
trunk/sys/dev/esp/am53c974reg.h
trunk/sys/dev/esp/esp_pci.c
trunk/sys/dev/esp/esp_sbus.c
trunk/sys/dev/esp/ncr53c9x.c
trunk/sys/dev/esp/ncr53c9xreg.h
trunk/sys/dev/esp/ncr53c9xvar.h
trunk/sys/dev/et/if_et.c
trunk/sys/dev/et/if_etreg.h
trunk/sys/dev/et/if_etvar.h
trunk/sys/dev/exca/exca.c
trunk/sys/dev/exca/excareg.h
trunk/sys/dev/exca/excavar.h
trunk/sys/dev/fatm/firmware.h
trunk/sys/dev/fatm/if_fatm.c
trunk/sys/dev/fatm/if_fatm_rate.h
trunk/sys/dev/fatm/if_fatmreg.h
trunk/sys/dev/fatm/if_fatmvar.h
Added Paths:
-----------
trunk/sys/dev/etherswitch/
trunk/sys/dev/etherswitch/arswitch/
trunk/sys/dev/etherswitch/arswitch/arswitch.c
trunk/sys/dev/etherswitch/arswitch/arswitch_7240.c
trunk/sys/dev/etherswitch/arswitch/arswitch_7240.h
trunk/sys/dev/etherswitch/arswitch/arswitch_8216.c
trunk/sys/dev/etherswitch/arswitch/arswitch_8216.h
trunk/sys/dev/etherswitch/arswitch/arswitch_8226.c
trunk/sys/dev/etherswitch/arswitch/arswitch_8226.h
trunk/sys/dev/etherswitch/arswitch/arswitch_8316.c
trunk/sys/dev/etherswitch/arswitch/arswitch_8316.h
trunk/sys/dev/etherswitch/arswitch/arswitch_phy.c
trunk/sys/dev/etherswitch/arswitch/arswitch_phy.h
trunk/sys/dev/etherswitch/arswitch/arswitch_reg.c
trunk/sys/dev/etherswitch/arswitch/arswitch_reg.h
trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.c
trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.h
trunk/sys/dev/etherswitch/arswitch/arswitchreg.h
trunk/sys/dev/etherswitch/arswitch/arswitchvar.h
trunk/sys/dev/etherswitch/etherswitch.c
trunk/sys/dev/etherswitch/etherswitch.h
trunk/sys/dev/etherswitch/etherswitch_if.m
trunk/sys/dev/etherswitch/ip17x/
trunk/sys/dev/etherswitch/ip17x/ip175c.c
trunk/sys/dev/etherswitch/ip17x/ip175c.h
trunk/sys/dev/etherswitch/ip17x/ip175d.c
trunk/sys/dev/etherswitch/ip17x/ip175d.h
trunk/sys/dev/etherswitch/ip17x/ip17x.c
trunk/sys/dev/etherswitch/ip17x/ip17x_phy.c
trunk/sys/dev/etherswitch/ip17x/ip17x_phy.h
trunk/sys/dev/etherswitch/ip17x/ip17x_reg.h
trunk/sys/dev/etherswitch/ip17x/ip17x_var.h
trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.c
trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.h
trunk/sys/dev/etherswitch/mdio.c
trunk/sys/dev/etherswitch/mdio.h
trunk/sys/dev/etherswitch/mdio_if.m
trunk/sys/dev/etherswitch/miiproxy.c
trunk/sys/dev/etherswitch/miiproxy.h
trunk/sys/dev/etherswitch/rtl8366/
trunk/sys/dev/etherswitch/rtl8366/rtl8366rb.c
trunk/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h
trunk/sys/dev/etherswitch/ukswitch/
trunk/sys/dev/etherswitch/ukswitch/ukswitch.c
Property Changed:
----------------
trunk/sys/dev/eisa/eisa_if.m
Modified: trunk/sys/dev/ed/ax88x90reg.h
===================================================================
--- trunk/sys/dev/ed/ax88x90reg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/ax88x90reg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh.
* All rights reserved.
@@ -24,7 +25,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/ax88x90reg.h 190559 2009-03-30 16:15:06Z imp $
*/
/* AX88x90 based miibus defines */
Modified: trunk/sys/dev/ed/dl100xxreg.h
===================================================================
--- trunk/sys/dev/ed/dl100xxreg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/dl100xxreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh.
* All rights reserved.
@@ -24,7 +25,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/dl100xxreg.h 190650 2009-04-02 18:02:00Z imp $
*/
/* Dlink chipset used on some Netgear and Dlink PCMCIA cards */
Modified: trunk/sys/dev/ed/if_ed.c
===================================================================
--- trunk/sys/dev/ed/if_ed.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1995, David Greenman
* All rights reserved.
@@ -26,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed.c 264942 2014-04-25 21:32:34Z marius $");
/*
* Device driver for National Semiconductor DS8390/WD83C690 based ethernet
@@ -419,7 +420,11 @@
/*
* Stop everything on the interface, and select page 0 registers.
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* Wait for interface to enter stopped state, but limit # of checks to
@@ -527,7 +532,11 @@
/*
* Set interface for page 0, Remote DMA complete, Stopped
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
if (sc->isa16bit)
/*
@@ -590,7 +599,11 @@
/*
* Program Command Register for page 1
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* Copy out our station address
@@ -644,7 +657,11 @@
/*
* Set NIC for page 0 register access
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* Set TX buffer start page
@@ -661,7 +678,11 @@
/*
* Set page 0, Remote DMA complete, Transmit Packet, and *Start*
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
sc->xmit_busy = 1;
/*
@@ -800,7 +821,11 @@
/*
* Set NIC to page 1 registers to get 'current' pointer
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* 'sc->next_packet' is the logical beginning of the ring-buffer -
@@ -904,7 +929,11 @@
/*
* Set NIC to page 0 registers to update boundry register
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_BNRY, boundry);
/*
@@ -911,7 +940,11 @@
* Set NIC to page 1 registers before looping to top (prepare
* to get 'CURR' current pointer)
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
}
}
@@ -934,7 +967,11 @@
/*
* Set NIC to page 0 registers
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* loop until there are no more new interrupts. When the card goes
@@ -1152,7 +1189,11 @@
* set in the transmit routine, is *okay* - it is 'edge'
* triggered from low to high)
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* If the Network Talley Counters overflow, read them to reset
@@ -1354,7 +1395,11 @@
{
/* Regular Novell cards */
/* select page 0 registers */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/* round up to a word */
if (amount & 1)
@@ -1387,7 +1432,11 @@
int maxwait = 200; /* about 240us */
/* select page 0 registers */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/* reset remote DMA complete flag */
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
@@ -1444,7 +1493,11 @@
dma_len++;
/* select page 0 registers */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/* reset remote DMA complete flag */
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
@@ -1555,7 +1608,11 @@
reg1 = 0x00;
/* set page 1 registers */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
if (ifp->if_flags & IFF_PROMISC) {
@@ -1570,7 +1627,11 @@
* runts and packets with CRC & alignment errors.
*/
/* Set page 0 registers */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
@@ -1592,7 +1653,11 @@
ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
/* Set page 0 registers */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
} else {
@@ -1605,6 +1670,8 @@
ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
/* Set page 0 registers */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
Modified: trunk/sys/dev/ed/if_ed98.h
===================================================================
--- trunk/sys/dev/ed/if_ed98.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed98.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) KATO Takenori, 1996. All rights reserved.
*
@@ -24,7 +25,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/if_ed98.h 145009 2005-04-13 13:02:58Z nyan $
*/
/*
Modified: trunk/sys/dev/ed/if_ed_3c503.c
===================================================================
--- trunk/sys/dev/ed/if_ed_3c503.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_3c503.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
@@ -28,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed_3c503.c 264942 2014-04-25 21:32:34Z marius $");
#include "opt_ed.h"
@@ -216,7 +217,11 @@
/*
* select page 0 registers
*/
- ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ ed_nic_outb(sc, ED_P0_CR, ED_CR_PAGE_0 | ED_CR_RD2 | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit
@@ -227,7 +232,11 @@
/*
* select page 2 registers
*/
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/*
* The 3c503 forces the WTS bit to a one if this is a 16bit board
Modified: trunk/sys/dev/ed/if_ed_cbus.c
===================================================================
--- trunk/sys/dev/ed/if_ed_cbus.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_cbus.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1995, David Greenman
* All rights reserved.
@@ -24,7 +25,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/if_ed_cbus.c 191299 2009-04-20 01:19:59Z imp $
*/
#include <sys/param.h>
Modified: trunk/sys/dev/ed/if_ed_hpp.c
===================================================================
--- trunk/sys/dev/ed/if_ed_hpp.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_hpp.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
@@ -28,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed_hpp.c 264942 2014-04-25 21:32:34Z marius $");
#include "opt_ed.h"
@@ -564,7 +565,11 @@
int use_32bit_accesses = !(sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS);
/* select page 0 registers */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
/* reset remote DMA complete flag */
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
Modified: trunk/sys/dev/ed/if_ed_isa.c
===================================================================
--- trunk/sys/dev/ed/if_ed_isa.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_isa.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1995, David Greenman
* All rights reserved.
@@ -27,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed_isa.c 211764 2010-08-24 18:17:40Z yongari $");
#include "opt_ed.h"
Modified: trunk/sys/dev/ed/if_ed_novell.c
===================================================================
--- trunk/sys/dev/ed/if_ed_novell.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_novell.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
@@ -29,7 +30,7 @@
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed_novell.c 211793 2010-08-25 02:09:07Z imp $");
#include "opt_ed.h"
Modified: trunk/sys/dev/ed/if_ed_pccard.c
===================================================================
--- trunk/sys/dev/ed/if_ed_pccard.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_pccard.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh
* Copyright (c) 1995, David Greenman
@@ -25,7 +26,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/if_ed_pccard.c 264942 2014-04-25 21:32:34Z marius $
*/
/*
@@ -75,9 +76,6 @@
#include <sys/systm.h>
#include <sys/socket.h>
#include <sys/kernel.h>
-#include <sys/conf.h>
-#include <sys/uio.h>
-
#include <sys/module.h>
#include <sys/bus.h>
#include <machine/bus.h>
@@ -246,6 +244,54 @@
};
/*
+ * MII bit-bang glue
+ */
+static uint32_t ed_pccard_dl100xx_mii_bitbang_read(device_t dev);
+static void ed_pccard_dl100xx_mii_bitbang_write(device_t dev, uint32_t val);
+
+static const struct mii_bitbang_ops ed_pccard_dl100xx_mii_bitbang_ops = {
+ ed_pccard_dl100xx_mii_bitbang_read,
+ ed_pccard_dl100xx_mii_bitbang_write,
+ {
+ ED_DL100XX_MII_DATAOUT, /* MII_BIT_MDO */
+ ED_DL100XX_MII_DATAIN, /* MII_BIT_MDI */
+ ED_DL100XX_MII_CLK, /* MII_BIT_MDC */
+ ED_DL100XX_MII_DIROUT, /* MII_BIT_DIR_HOST_PHY */
+ 0 /* MII_BIT_DIR_PHY_HOST */
+ }
+};
+
+static uint32_t ed_pccard_ax88x90_mii_bitbang_read(device_t dev);
+static void ed_pccard_ax88x90_mii_bitbang_write(device_t dev, uint32_t val);
+
+static const struct mii_bitbang_ops ed_pccard_ax88x90_mii_bitbang_ops = {
+ ed_pccard_ax88x90_mii_bitbang_read,
+ ed_pccard_ax88x90_mii_bitbang_write,
+ {
+ ED_AX88X90_MII_DATAOUT, /* MII_BIT_MDO */
+ ED_AX88X90_MII_DATAIN, /* MII_BIT_MDI */
+ ED_AX88X90_MII_CLK, /* MII_BIT_MDC */
+ 0, /* MII_BIT_DIR_HOST_PHY */
+ ED_AX88X90_MII_DIRIN /* MII_BIT_DIR_PHY_HOST */
+ }
+};
+
+static uint32_t ed_pccard_tc5299j_mii_bitbang_read(device_t dev);
+static void ed_pccard_tc5299j_mii_bitbang_write(device_t dev, uint32_t val);
+
+static const struct mii_bitbang_ops ed_pccard_tc5299j_mii_bitbang_ops = {
+ ed_pccard_tc5299j_mii_bitbang_read,
+ ed_pccard_tc5299j_mii_bitbang_write,
+ {
+ ED_TC5299J_MII_DATAOUT, /* MII_BIT_MDO */
+ ED_TC5299J_MII_DATAIN, /* MII_BIT_MDI */
+ ED_TC5299J_MII_CLK, /* MII_BIT_MDC */
+ 0, /* MII_BIT_DIR_HOST_PHY */
+ ED_AX88X90_MII_DIRIN /* MII_BIT_DIR_PHY_HOST */
+ }
+};
+
+/*
* PC Card (PCMCIA) specific code.
*/
static int ed_pccard_probe(device_t);
@@ -254,14 +300,8 @@
static int ed_pccard_dl100xx(device_t dev, const struct ed_product *);
static void ed_pccard_dl100xx_mii_reset(struct ed_softc *sc);
-static u_int ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits);
-static void ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val,
- int nbits);
static int ed_pccard_ax88x90(device_t dev, const struct ed_product *);
-static u_int ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits);
-static void ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val,
- int nbits);
static int ed_miibus_readreg(device_t dev, int phy, int reg);
static int ed_ifmedia_upd(struct ifnet *);
@@ -268,9 +308,6 @@
static void ed_ifmedia_sts(struct ifnet *, struct ifmediareq *);
static int ed_pccard_tc5299j(device_t dev, const struct ed_product *);
-static u_int ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits);
-static void ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val,
- int nbits);
static void
ed_pccard_print_entry(const struct ed_product *pp)
@@ -501,7 +538,7 @@
error = ed_pccard_tc5299j(dev, pp);
if (error != 0) {
error = ed_probe_Novell_generic(dev, flags);
- printf("Novell probe generic %d\n", error);
+ printf("Novell generic probe failed: %d\n", error);
}
if (error != 0 && (pp->flags & NE2000DVF_TOSHIBA)) {
flags |= ED_FLAGS_TOSH_ETHER;
@@ -626,7 +663,7 @@
if (!(pp->flags & NE2000DVF_DL100XX))
return (ENXIO);
if (bootverbose)
- device_printf(dev, "Trying DL100xx probing\n");
+ device_printf(dev, "Trying DL100xx\n");
error = ed_probe_Novell_generic(dev, device_get_flags(dev));
if (bootverbose && error)
device_printf(dev, "Novell generic probe failed: %d\n", error);
@@ -677,16 +714,11 @@
sc->chip_type = (id & 0x90) == 0x90 ?
ED_CHIP_TYPE_DL10022 : ED_CHIP_TYPE_DL10019;
sc->type_str = ((id & 0x90) == 0x90) ? "DL10022" : "DL10019";
- sc->mii_readbits = ed_pccard_dl100xx_mii_readbits;
- sc->mii_writebits = ed_pccard_dl100xx_mii_writebits;
+ sc->mii_bitbang_ops = &ed_pccard_dl100xx_mii_bitbang_ops;
return (0);
}
/* MII bit-twiddling routines for cards using Dlink chipset */
-#define DL100XX_MIISET(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
- ed_asic_inb(sc, ED_DL100XX_MIIBUS) | (x))
-#define DL100XX_MIICLR(sc, x) ed_asic_outb(sc, ED_DL100XX_MIIBUS, \
- ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ~(x))
static void
ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
@@ -708,36 +740,29 @@
}
static void
-ed_pccard_dl100xx_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
+ed_pccard_dl100xx_mii_bitbang_write(device_t dev, uint32_t val)
{
- int i;
+ struct ed_softc *sc;
- DL100XX_MIISET(sc, ED_DL100XX_MII_DIROUT);
- for (i = nbits - 1; i >= 0; i--) {
- if ((val >> i) & 1)
- DL100XX_MIISET(sc, ED_DL100XX_MII_DATAOUT);
- else
- DL100XX_MIICLR(sc, ED_DL100XX_MII_DATAOUT);
- DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
- DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
- }
+ sc = device_get_softc(dev);
+
+ ed_asic_outb(sc, ED_DL100XX_MIIBUS, val);
+ ed_asic_barrier(sc, ED_DL100XX_MIIBUS, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
}
-static u_int
-ed_pccard_dl100xx_mii_readbits(struct ed_softc *sc, int nbits)
+static uint32_t
+ed_pccard_dl100xx_mii_bitbang_read(device_t dev)
{
- int i;
- u_int val = 0;
+ struct ed_softc *sc;
+ uint32_t val;
- DL100XX_MIICLR(sc, ED_DL100XX_MII_DIROUT);
- for (i = nbits - 1; i >= 0; i--) {
- DL100XX_MIISET(sc, ED_DL100XX_MII_CLK);
- val <<= 1;
- if (ed_asic_inb(sc, ED_DL100XX_MIIBUS) & ED_DL100XX_MII_DATAIN)
- val++;
- DL100XX_MIICLR(sc, ED_DL100XX_MII_CLK);
- }
- return val;
+ sc = device_get_softc(dev);
+
+ val = ed_asic_inb(sc, ED_DL100XX_MIIBUS);
+ ed_asic_barrier(sc, ED_DL100XX_MIIBUS, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ return (val);
}
static void
@@ -746,7 +771,11 @@
int i;
/* Reset Card */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STP | ED_CR_PAGE_0);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_asic_outb(sc, ED_NOVELL_RESET, ed_asic_inb(sc, ED_NOVELL_RESET));
/* Wait for the RST bit to assert, but cap it at 10ms */
@@ -879,7 +908,6 @@
if (i == 32)
return (ENXIO);
return (0);
-
}
/*
@@ -909,18 +937,17 @@
pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE0, iobase & 0xff);
pccard_ccr_write_1(dev, PCCARD_CCR_IOBASE1, (iobase >> 8) & 0xff);
- sc->mii_readbits = ed_pccard_ax88x90_mii_readbits;
- sc->mii_writebits = ed_pccard_ax88x90_mii_writebits;
error = ed_probe_ax88x90_generic(dev, device_get_flags(dev));
if (error) {
if (bootverbose)
device_printf(dev, "probe ax88x90 failed %d\n",
error);
- goto fail;
+ return (error);
}
+ sc->mii_bitbang_ops = &ed_pccard_ax88x90_mii_bitbang_ops;
error = ed_pccard_ax88x90_check_mii(dev, sc);
if (error)
- goto fail;
+ return (error);
sc->vendor = ED_VENDOR_NOVELL;
sc->type = ED_TYPE_NE2000;
if (sc->chip_type == ED_CHIP_TYPE_AX88190)
@@ -928,40 +955,32 @@
else
sc->type_str = "AX88790";
return (0);
-fail:;
- sc->mii_readbits = 0;
- sc->mii_writebits = 0;
- return (error);
}
static void
-ed_pccard_ax88x90_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
+ed_pccard_ax88x90_mii_bitbang_write(device_t dev, uint32_t val)
{
- int i, data;
+ struct ed_softc *sc;
- for (i = nbits - 1; i >= 0; i--) {
- data = (val >> i) & 1 ? ED_AX88X90_MII_DATAOUT : 0;
- ed_asic_outb(sc, ED_AX88X90_MIIBUS, data);
- ed_asic_outb(sc, ED_AX88X90_MIIBUS, data | ED_AX88X90_MII_CLK);
- }
+ sc = device_get_softc(dev);
+
+ ed_asic_outb(sc, ED_AX88X90_MIIBUS, val);
+ ed_asic_barrier(sc, ED_AX88X90_MIIBUS, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
}
-static u_int
-ed_pccard_ax88x90_mii_readbits(struct ed_softc *sc, int nbits)
+static uint32_t
+ed_pccard_ax88x90_mii_bitbang_read(device_t dev)
{
- int i;
- u_int val = 0;
- uint8_t mdio;
+ struct ed_softc *sc;
+ uint32_t val;
- mdio = ED_AX88X90_MII_DIRIN;
- for (i = nbits - 1; i >= 0; i--) {
- ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio);
- val <<= 1;
- if (ed_asic_inb(sc, ED_AX88X90_MIIBUS) & ED_AX88X90_MII_DATAIN)
- val++;
- ed_asic_outb(sc, ED_AX88X90_MIIBUS, mdio | ED_AX88X90_MII_CLK);
- }
- return val;
+ sc = device_get_softc(dev);
+
+ val = ed_asic_inb(sc, ED_AX88X90_MIIBUS);
+ ed_asic_barrier(sc, ED_AX88X90_MIIBUS, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ return (val);
}
/*
@@ -982,7 +1001,7 @@
error = ed_probe_Novell_generic(dev, device_get_flags(dev));
if (bootverbose)
- device_printf(dev, "probe novel returns %d\n", error);
+ device_printf(dev, "Novell generic probe failed: %d\n", error);
if (error != 0)
return (error);
@@ -991,24 +1010,17 @@
* devices have MII and a PHY, so we use this to weed out chips that
* would otherwise make it through the tests we have after this point.
*/
- sc->mii_readbits = ed_pccard_tc5299j_mii_readbits;
- sc->mii_writebits = ed_pccard_tc5299j_mii_writebits;
+ sc->mii_bitbang_ops = &ed_pccard_tc5299j_mii_bitbang_ops;
for (i = 0; i < 32; i++) {
id = ed_miibus_readreg(dev, i, MII_PHYIDR1);
if (id != 0 && id != 0xffff)
break;
}
- if (i == 32) {
- sc->mii_readbits = 0;
- sc->mii_writebits = 0;
+ if (i == 32)
return (ENXIO);
- }
ts = "TC5299J";
- if (ed_pccard_rom_mac(dev, sc->enaddr) == 0) {
- sc->mii_readbits = 0;
- sc->mii_writebits = 0;
+ if (ed_pccard_rom_mac(dev, sc->enaddr) == 0)
return (ENXIO);
- }
sc->vendor = ED_VENDOR_NOVELL;
sc->type = ED_TYPE_NE2000;
sc->chip_type = ED_CHIP_TYPE_TC5299J;
@@ -1017,50 +1029,31 @@
}
static void
-ed_pccard_tc5299j_mii_writebits(struct ed_softc *sc, u_int val, int nbits)
+ed_pccard_tc5299j_mii_bitbang_write(device_t dev, uint32_t val)
{
- int i;
- uint8_t cr, data;
+ struct ed_softc *sc;
- /* Select page 3 */
- cr = ed_nic_inb(sc, ED_P0_CR);
- ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
+ sc = device_get_softc(dev);
- for (i = nbits - 1; i >= 0; i--) {
- data = (val >> i) & 1 ? ED_TC5299J_MII_DATAOUT : 0;
- ed_nic_outb(sc, ED_TC5299J_MIIBUS, data);
- ed_nic_outb(sc, ED_TC5299J_MIIBUS, data | ED_TC5299J_MII_CLK);
- }
- ed_nic_outb(sc, ED_TC5299J_MIIBUS, 0);
-
- /* Restore prior page */
- ed_nic_outb(sc, ED_P0_CR, cr);
+ /* We are already on page 3. */
+ ed_nic_outb(sc, ED_TC5299J_MIIBUS, val);
+ ed_nic_barrier(sc, ED_TC5299J_MIIBUS, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
}
-static u_int
-ed_pccard_tc5299j_mii_readbits(struct ed_softc *sc, int nbits)
+static uint32_t
+ed_pccard_tc5299j_mii_bitbang_read(device_t dev)
{
- int i;
- u_int val = 0;
- uint8_t cr;
+ struct ed_softc *sc;
+ uint32_t val;
- /* Select page 3 */
- cr = ed_nic_inb(sc, ED_P0_CR);
- ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
+ sc = device_get_softc(dev);
- ed_asic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT);
- for (i = nbits - 1; i >= 0; i--) {
- ed_nic_outb(sc, ED_TC5299J_MIIBUS,
- ED_TC5299J_MII_CLK | ED_TC5299J_MII_DIROUT);
- val <<= 1;
- if (ed_nic_inb(sc, ED_TC5299J_MIIBUS) & ED_TC5299J_MII_DATAIN)
- val++;
- ed_nic_outb(sc, ED_TC5299J_MIIBUS, ED_TC5299J_MII_DIROUT);
- }
-
- /* Restore prior page */
- ed_nic_outb(sc, ED_P0_CR, cr);
- return val;
+ /* We are already on page 3. */
+ val = ed_asic_inb(sc, ED_TC5299J_MIIBUS);
+ ed_nic_barrier(sc, ED_TC5299J_MIIBUS, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ return (val);
}
/*
@@ -1070,7 +1063,8 @@
ed_miibus_readreg(device_t dev, int phy, int reg)
{
struct ed_softc *sc;
- int failed, val;
+ int val;
+ uint8_t cr = 0;
sc = device_get_softc(dev);
/*
@@ -1084,10 +1078,6 @@
* Also, PHYs above 16 appear to be phantoms on some cards, but not
* others. Registers read for this are often the same as prior values
* read. Filter all register requests to 17-31.
- *
- * I can't explain it, since I don't have the DL100xx data sheets, but
- * the DL100xx chips do 13-bits before the 'ACK' but, but the AX88x90
- * chips have 14. The linux pcnet and axnet drivers confirm this.
*/
if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
if (phy > 0x10)
@@ -1097,21 +1087,25 @@
ED_AX88X90_GPIO_INT_PHY);
else
ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
+ ed_asic_barrier(sc, ED_AX88X90_GPIO, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
+ /* Select page 3. */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ cr = ed_nic_inb(sc, ED_P0_CR);
+ ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
}
-
- (*sc->mii_writebits)(sc, 0xffffffff, 32);
- (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
- (*sc->mii_writebits)(sc, ED_MII_READOP, ED_MII_OP_BITS);
- (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
- (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
- if (sc->chip_type == ED_CHIP_TYPE_AX88790 ||
- sc->chip_type == ED_CHIP_TYPE_AX88190)
- (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
- failed = (*sc->mii_readbits)(sc, ED_MII_ACK_BITS);
- val = (*sc->mii_readbits)(sc, ED_MII_DATA_BITS);
- (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
-/* printf("Reading phy %d reg %#x returning %#x (valid %d)\n", phy, reg, val, !failed); */
- return (failed ? 0 : val);
+ val = mii_bitbang_readreg(dev, sc->mii_bitbang_ops, phy, reg);
+ if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
+ /* Restore prior page. */
+ ed_nic_outb(sc, ED_P0_CR, cr);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ }
+ return (val);
}
static int
@@ -1118,8 +1112,8 @@
ed_miibus_writereg(device_t dev, int phy, int reg, int data)
{
struct ed_softc *sc;
+ uint8_t cr = 0;
-/* printf("Writing phy %d reg %#x data %#x\n", phy, reg, data); */
sc = device_get_softc(dev);
/* See ed_miibus_readreg for details */
if (sc->chip_type == ED_CHIP_TYPE_AX88790) {
@@ -1130,15 +1124,24 @@
ED_AX88X90_GPIO_INT_PHY);
else
ed_asic_outb(sc, ED_AX88X90_GPIO, 0);
+ ed_asic_barrier(sc, ED_AX88X90_GPIO, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ } else if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
+ /* Select page 3. */
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ cr = ed_nic_inb(sc, ED_P0_CR);
+ ed_nic_outb(sc, ED_P0_CR, cr | ED_CR_PAGE_3);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
}
- (*sc->mii_writebits)(sc, 0xffffffff, 32);
- (*sc->mii_writebits)(sc, ED_MII_STARTDELIM, ED_MII_STARTDELIM_BITS);
- (*sc->mii_writebits)(sc, ED_MII_WRITEOP, ED_MII_OP_BITS);
- (*sc->mii_writebits)(sc, phy, ED_MII_PHY_BITS);
- (*sc->mii_writebits)(sc, reg, ED_MII_REG_BITS);
- (*sc->mii_writebits)(sc, ED_MII_TURNAROUND, ED_MII_TURNAROUND_BITS);
- (*sc->mii_writebits)(sc, data, ED_MII_DATA_BITS);
- (*sc->mii_writebits)(sc, ED_MII_IDLE, ED_MII_IDLE_BITS);
+ mii_bitbang_writereg(dev, sc->mii_bitbang_ops, phy, reg, data);
+ if (sc->chip_type == ED_CHIP_TYPE_TC5299J) {
+ /* Restore prior page. */
+ ed_nic_outb(sc, ED_P0_CR, cr);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
+ }
return (0);
}
@@ -1149,9 +1152,12 @@
int error;
sc = ifp->if_softc;
- if (sc->miibus == NULL)
+ ED_LOCK(sc);
+ if (sc->miibus == NULL) {
+ ED_UNLOCK(sc);
return (ENXIO);
- ED_LOCK(sc);
+ }
+
error = ed_pccard_kick_phy(sc);
ED_UNLOCK(sc);
return (error);
@@ -1164,13 +1170,17 @@
struct mii_data *mii;
sc = ifp->if_softc;
- if (sc->miibus == NULL)
+ ED_LOCK(sc);
+ if (sc->miibus == NULL) {
return;
+ ED_UNLOCK(sc);
+ }
mii = device_get_softc(sc->miibus);
mii_pollstat(mii);
ifmr->ifm_active = mii->mii_media_active;
ifmr->ifm_status = mii->mii_media_status;
+ ED_UNLOCK(sc);
}
static void
@@ -1225,7 +1235,7 @@
DEVMETHOD(miibus_readreg, ed_miibus_readreg),
DEVMETHOD(miibus_writereg, ed_miibus_writereg),
- { 0, 0 }
+ DEVMETHOD_END
};
static driver_t ed_pccard_driver = {
@@ -1234,7 +1244,7 @@
sizeof(struct ed_softc)
};
-DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, 0);
-DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, 0);
+DRIVER_MODULE(ed, pccard, ed_pccard_driver, ed_devclass, 0, NULL);
+DRIVER_MODULE(miibus, ed, miibus_driver, miibus_devclass, 0, NULL);
MODULE_DEPEND(ed, miibus, 1, 1, 1);
MODULE_DEPEND(ed, ether, 1, 1, 1);
Modified: trunk/sys/dev/ed/if_ed_pci.c
===================================================================
--- trunk/sys/dev/ed/if_ed_pci.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_pci.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1996 Stefan Esser <se at freebsd.org>
* All rights reserved.
@@ -18,7 +19,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed_pci.c 211792 2010-08-25 02:03:48Z imp $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/dev/ed/if_ed_rtl80x9.c
===================================================================
--- trunk/sys/dev/ed/if_ed_rtl80x9.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_rtl80x9.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003, David Madole
* All rights reserved.
@@ -31,7 +32,7 @@
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed_rtl80x9.c 264942 2014-04-25 21:32:34Z marius $");
#include "opt_ed.h"
@@ -116,7 +117,11 @@
ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_10_5, 0, 0);
ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_3 | ED_CR_STP);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
switch (ed_nic_inb(sc, ED_RTL80X9_CONFIG2) & ED_RTL80X9_CF2_MEDIA) {
case ED_RTL80X9_CF2_AUTO:
@@ -144,8 +149,12 @@
sc = ifp->if_softc;
ED_LOCK(sc);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_3
| (ed_nic_inb(sc, ED_P0_CR) & (ED_CR_STA | ED_CR_STP)));
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
switch(IFM_SUBTYPE(sc->ifmedia.ifm_cur->ifm_media)) {
case IFM_10_T:
@@ -189,8 +198,12 @@
if (IFM_SUBTYPE(imr->ifm_active) == IFM_AUTO) {
ED_LOCK(sc);
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_3 |
(ed_nic_inb(sc, ED_P0_CR) & (ED_CR_STA | ED_CR_STP)));
+ ed_nic_barrier(sc, ED_P0_CR, 1,
+ BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
switch (ed_nic_inb(sc, ED_RTL80X9_CONFIG0)
& (sc->chip_type == ED_CHIP_TYPE_RTL8029 ? ED_RTL80X9_CF0_BNC
Modified: trunk/sys/dev/ed/if_ed_sic.c
===================================================================
--- trunk/sys/dev/ed/if_ed_sic.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_sic.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
@@ -28,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed_sic.c 154924 2006-01-27 19:10:13Z imp $");
#include "opt_ed.h"
Modified: trunk/sys/dev/ed/if_ed_wd80x3.c
===================================================================
--- trunk/sys/dev/ed/if_ed_wd80x3.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_ed_wd80x3.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh
* All rights reserved.
@@ -28,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ed/if_ed_wd80x3.c 190483 2009-03-28 04:56:56Z imp $");
#include "opt_ed.h"
Modified: trunk/sys/dev/ed/if_edreg.h
===================================================================
--- trunk/sys/dev/ed/if_edreg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_edreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (C) 1993, David Greenman. This software may be used, modified,
* copied, distributed, and sold, in both source and binary form provided
@@ -6,7 +7,7 @@
* of this software, nor does the author assume any responsibility
* for damages incurred with its use.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/if_edreg.h 264942 2014-04-25 21:32:34Z marius $
*/
/*
* National Semiconductor DS8390 NIC register definitions
@@ -1079,22 +1080,3 @@
#define ED_CHIP_TYPE_TC5299J 10
#define ED_CHIP_TYPE_W89C926 11
#define ED_CHIP_TYPE_WD790 12
-
-/*
- * MII bus definitions. These are common to both DL100xx and AX88x90
- * MII definitions, because they are standards based.
- */
-#define ED_MII_STARTDELIM 0x01
-#define ED_MII_WRITEOP 0x01
-#define ED_MII_READOP 0x02
-#define ED_MII_TURNAROUND 0x02
-#define ED_MII_IDLE 0x01
-
-#define ED_MII_STARTDELIM_BITS 2
-#define ED_MII_OP_BITS 2
-#define ED_MII_PHY_BITS 5
-#define ED_MII_REG_BITS 5
-#define ED_MII_TURNAROUND_BITS 2
-#define ED_MII_ACK_BITS 1
-#define ED_MII_DATA_BITS 16
-#define ED_MII_IDLE_BITS 1
Modified: trunk/sys/dev/ed/if_edvar.h
===================================================================
--- trunk/sys/dev/ed/if_edvar.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/if_edvar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1995, David Greenman
* All rights reserved.
@@ -24,11 +25,14 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/if_edvar.h 264942 2014-04-25 21:32:34Z marius $
*/
#ifndef SYS_DEV_ED_IF_EDVAR_H
-#define SYS_DEV_ED_IF_EDVAR_H
+#define SYS_DEV_ED_IF_EDVAR_H
+
+#include <dev/mii/mii_bitbang.h>
+
/*
* ed_softc: per line info and status
*/
@@ -62,8 +66,7 @@
u_long command);
void (*sc_mediachg)(struct ed_softc *);
device_t miibus; /* MII bus for cards with MII. */
- void (*mii_writebits)(struct ed_softc *, u_int, int);
- u_int (*mii_readbits)(struct ed_softc *, int);
+ mii_bitbang_ops_t mii_bitbang_ops;
struct callout tick_ch;
void (*sc_tick)(struct ed_softc *);
void (*readmem)(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
@@ -109,6 +112,10 @@
struct ifmib_iso_8802_3 mibdata; /* stuff for network mgmt */
};
+#define ed_nic_barrier(sc, port, length, flags) \
+ bus_space_barrier(sc->port_bst, sc->port_bsh, \
+ (sc)->nic_offset + (port), (length), (flags))
+
#define ed_nic_inb(sc, port) \
bus_space_read_1(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
@@ -147,6 +154,10 @@
bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
(sc)->nic_offset + (port), (uint32_t *)(addr), (count))
+#define ed_asic_barrier(sc, port, length, flags) \
+ bus_space_barrier(sc->port_bst, sc->port_bsh, \
+ (sc)->asic_offset + (port), (length), (flags))
+
#define ed_asic_inb(sc, port) \
bus_space_read_1(sc->port_bst, sc->port_bsh, \
(sc)->asic_offset + (port))
Modified: trunk/sys/dev/ed/rtl80x9reg.h
===================================================================
--- trunk/sys/dev/ed/rtl80x9reg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/rtl80x9reg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003, David Madole
* All rights reserved.
@@ -28,7 +29,7 @@
*
* Based on patches subitted by: David Madole, edited by M. Warner Losh.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/rtl80x9reg.h 150957 2005-10-05 05:21:07Z imp $
*/
/*
Modified: trunk/sys/dev/ed/tc5299jreg.h
===================================================================
--- trunk/sys/dev/ed/tc5299jreg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ed/tc5299jreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005, M. Warner Losh.
* All rights reserved.
@@ -24,7 +25,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ed/tc5299jreg.h 264942 2014-04-25 21:32:34Z marius $
*/
/* Tamarack TC5299J */
@@ -34,5 +35,5 @@
#define ED_TC5299J_MII_CLK 0x01
#define ED_TC5299J_MII_DATAOUT 0x02
-#define ED_TC5299J_MII_DIROUT 0x04
+#define ED_TC5299J_MII_DIRIN 0x04
#define ED_TC5299J_MII_DATAIN 0x08
Modified: trunk/sys/dev/eisa/eisa_if.m
===================================================================
--- trunk/sys/dev/eisa/eisa_if.m 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/eisa/eisa_if.m 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
#-
# Copyright (c) 2004 M. Warner Losh
# All rights reserved.
@@ -23,7 +24,7 @@
# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
# SUCH DAMAGE.
#
-# $MidnightBSD$
+# $FreeBSD: stable/10/sys/dev/eisa/eisa_if.m 139749 2005-01-06 01:43:34Z imp $
#
#include <sys/bus.h>
Property changes on: trunk/sys/dev/eisa/eisa_if.m
___________________________________________________________________
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Modified: trunk/sys/dev/eisa/eisaconf.c
===================================================================
--- trunk/sys/dev/eisa/eisaconf.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/eisa/eisaconf.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* EISA bus probe and attach routines
*
@@ -31,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/eisa/eisaconf.c 227843 2011-11-22 21:28:20Z marius $");
#include "opt_eisa.h"
Modified: trunk/sys/dev/eisa/eisaconf.h
===================================================================
--- trunk/sys/dev/eisa/eisaconf.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/eisa/eisaconf.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* EISA bus device definitions
*
@@ -28,7 +29,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/eisa/eisaconf.h 139749 2005-01-06 01:43:34Z imp $
*/
#ifndef _DEV_EISA_EISACONF_H_
Modified: trunk/sys/dev/en/if_en_pci.c
===================================================================
--- trunk/sys/dev/en/if_en_pci.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/en/if_en_pci.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/* $NetBSD: if_en_pci.c,v 1.1 1996/06/22 02:00:31 chuck Exp $ */
/*-
* Copyright (c) 1996 Charles D. Cranor and Washington University.
@@ -32,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/en/if_en_pci.c 223624 2011-06-28 08:36:48Z kevlo $");
/*
* i f _ e n _ p c i . c
Modified: trunk/sys/dev/en/midway.c
===================================================================
--- trunk/sys/dev/en/midway.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/en/midway.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/* $NetBSD: midway.c,v 1.30 1997/09/29 17:40:38 chuck Exp $ */
/* (sync'd to midway.c 1.68) */
@@ -32,7 +33,7 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/en/midway.c 260275 2014-01-04 18:48:29Z dim $");
/*
*
@@ -343,6 +344,7 @@
}
#define en_log2(X) en_k2sz(X)
+#if 0
/*
* en_b2sz: convert a DMA burst code to its byte size
*/
@@ -364,6 +366,7 @@
}
return (0);
}
+#endif
/*
* en_sz2b: convert a burst size (bytes) to DMA burst code
Modified: trunk/sys/dev/en/midwayreg.h
===================================================================
--- trunk/sys/dev/en/midwayreg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/en/midwayreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/* $NetBSD: midwayreg.h,v 1.6 1997/03/20 21:34:47 chuck Exp $ */
/*
@@ -6,7 +7,7 @@
* this file contains the description of the ENI ATM midway chip
* data structures. see midway.c for more details.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/en/midwayreg.h 114018 2003-04-25 16:14:03Z harti $
*/
#define MID_SZTOB(X) ((X) * 256 * 4) /* size to bytes */
Modified: trunk/sys/dev/en/midwayvar.h
===================================================================
--- trunk/sys/dev/en/midwayvar.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/en/midwayvar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/* $NetBSD: midwayvar.h,v 1.10 1997/03/20 21:34:46 chuck Exp $ */
/*-
@@ -30,7 +31,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/en/midwayvar.h 147256 2005-06-10 16:49:24Z brooks $
*/
/*
Modified: trunk/sys/dev/ep/if_ep.c
===================================================================
--- trunk/sys/dev/ep/if_ep.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ep/if_ep.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1994 Herb Peyerl <hpeyerl at novatel.ca>
* All rights reserved.
@@ -29,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ep/if_ep.c 243857 2012-12-04 09:32:43Z glebius $");
/*
* Modified from the FreeBSD 1.1.5.1 version by:
@@ -301,7 +302,6 @@
ifp->if_softc = sc;
if_initname(ifp, device_get_name(sc->dev), device_get_unit(sc->dev));
- ifp->if_mtu = ETHERMTU;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_start = epstart;
ifp->if_ioctl = epioctl;
Modified: trunk/sys/dev/ep/if_ep_eisa.c
===================================================================
--- trunk/sys/dev/ep/if_ep_eisa.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ep/if_ep_eisa.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Product specific probe and attach routines for:
* 3COM 3C579 and 3C509(in eisa config mode) ethernet controllers
@@ -21,7 +22,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ep/if_ep_eisa.c 246128 2013-01-30 18:01:20Z sbz $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -238,7 +239,7 @@
DEVMETHOD(device_attach, ep_eisa_attach),
DEVMETHOD(device_detach, ep_detach),
- {0, 0}
+ DEVMETHOD_END
};
static driver_t ep_eisa_driver = {
Modified: trunk/sys/dev/ep/if_ep_isa.c
===================================================================
--- trunk/sys/dev/ep/if_ep_isa.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ep/if_ep_isa.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1994 Herb Peyerl <hpeyerl at novatel.ca>
* All rights reserved.
@@ -29,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ep/if_ep_isa.c 246128 2013-01-30 18:01:20Z sbz $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -391,7 +392,7 @@
DEVMETHOD(device_attach, ep_isa_attach),
DEVMETHOD(device_detach, ep_detach),
- {0, 0}
+ DEVMETHOD_END
};
static driver_t ep_isa_driver = {
Modified: trunk/sys/dev/ep/if_ep_mca.c
===================================================================
--- trunk/sys/dev/ep/if_ep_mca.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ep/if_ep_mca.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1999 Matthew N. Dodd <winter at jurai.net>
* All rights reserved.
@@ -25,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ep/if_ep_mca.c 246128 2013-01-30 18:01:20Z sbz $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -145,7 +146,7 @@
DEVMETHOD(device_attach, ep_mca_attach),
DEVMETHOD(device_detach, ep_detach),
- {0, 0}
+ DEVMETHOD_END
};
static driver_t ep_mca_driver = {
Modified: trunk/sys/dev/ep/if_ep_pccard.c
===================================================================
--- trunk/sys/dev/ep/if_ep_pccard.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ep/if_ep_pccard.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1994 Herb Peyerl <hpeyerl at novatel.ca>
* All rights reserved.
@@ -35,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/ep/if_ep_pccard.c 246128 2013-01-30 18:01:20Z sbz $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -223,7 +224,7 @@
DEVMETHOD(device_attach, ep_pccard_attach),
DEVMETHOD(device_detach, ep_detach),
- {0, 0}
+ DEVMETHOD_END
};
static driver_t ep_pccard_driver = {
Modified: trunk/sys/dev/ep/if_epreg.h
===================================================================
--- trunk/sys/dev/ep/if_epreg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ep/if_epreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1993 Herb Peyerl (hpeyerl at novatel.ca) All rights reserved.
*
@@ -19,7 +20,7 @@
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ep/if_epreg.h 218909 2011-02-21 09:01:34Z brucec $
*/
/*
Modified: trunk/sys/dev/ep/if_epvar.h
===================================================================
--- trunk/sys/dev/ep/if_epvar.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/ep/if_epvar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1993 Herb Peyerl (hpeyerl at novatel.ca) All rights reserved.
*
@@ -19,7 +20,7 @@
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/ep/if_epvar.h 199559 2009-11-19 22:06:40Z jhb $
*/
struct ep_board {
Modified: trunk/sys/dev/esp/am53c974reg.h
===================================================================
--- trunk/sys/dev/esp/am53c974reg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/esp/am53c974reg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/* $NetBSD: pcscpreg.h,v 1.2 2008/04/28 20:23:55 martin Exp $ */
/*-
@@ -29,7 +30,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/esp/am53c974reg.h 227006 2011-11-01 21:26:57Z marius $ */
#ifndef _AM53C974_H_
#define _AM53C974_H_
Modified: trunk/sys/dev/esp/esp_pci.c
===================================================================
--- trunk/sys/dev/esp/esp_pci.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/esp/esp_pci.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2011 Marius Strobl <marius at FreeBSD.org>
* All rights reserved.
@@ -65,7 +66,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/esp/esp_pci.c 227848 2011-11-22 21:55:40Z marius $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/dev/esp/esp_sbus.c
===================================================================
--- trunk/sys/dev/esp/esp_sbus.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/esp/esp_sbus.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2004 Scott Long
* Copyright (c) 2005 Marius Strobl <marius at FreeBSD.org>
@@ -59,7 +60,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/esp/esp_sbus.c 263763 2014-03-26 07:31:57Z dim $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -165,7 +166,7 @@
const struct ncr53c9x_glue *gluep);
static int espdetach(struct esp_softc *esc);
-static const struct ncr53c9x_glue const esp_sbus_glue = {
+static const struct ncr53c9x_glue esp_sbus_glue = {
esp_read_reg,
esp_write_reg,
esp_dma_isintr,
Modified: trunk/sys/dev/esp/ncr53c9x.c
===================================================================
--- trunk/sys/dev/esp/ncr53c9x.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/esp/ncr53c9x.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2004 Scott Long
* Copyright (c) 2005, 2008 Marius Strobl <marius at FreeBSD.org>
@@ -98,7 +99,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/esp/ncr53c9x.c 315813 2017-03-23 06:41:13Z mav $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -316,7 +317,7 @@
* The recommended timeout is 250ms. This register is loaded
* with a value calculated as follows, from the docs:
*
- * (timout period) x (CLK frequency)
+ * (timeout period) x (CLK frequency)
* reg = -------------------------------------
* 8192 x (Clock Conversion Factor)
*
@@ -1013,9 +1014,9 @@
cpi->max_target = sc->sc_ntarg - 1;
cpi->max_lun = 7;
cpi->initiator_id = sc->sc_id;
- strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
- strncpy(cpi->hba_vid, "NCR", HBA_IDLEN);
- strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
+ strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
+ strlcpy(cpi->hba_vid, "NCR", HBA_IDLEN);
+ strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
cpi->unit_number = cam_sim_unit(sim);
cpi->bus_id = 0;
cpi->base_transfer_speed = 3300;
@@ -1502,7 +1503,7 @@
li = TINFO_LUN(ti, lun);
#ifdef DIAGNOSTIC
if (li == NULL || li->lun != lun)
- panic("%s: lun %qx for ecb %p does not exist", __func__,
+ panic("%s: lun %llx for ecb %p does not exist", __func__,
(long long)lun, ecb);
#endif
if (li->untagged == ecb) {
@@ -1513,7 +1514,7 @@
#ifdef DIAGNOSTIC
if (li->queued[ecb->tag[1]] != NULL &&
(li->queued[ecb->tag[1]] != ecb))
- panic("%s: slot %d for lun %qx has %p instead of ecb "
+ panic("%s: slot %d for lun %llx has %p instead of ecb "
"%p", __func__, ecb->tag[1], (long long)lun,
li->queued[ecb->tag[1]], ecb);
#endif
Modified: trunk/sys/dev/esp/ncr53c9xreg.h
===================================================================
--- trunk/sys/dev/esp/ncr53c9xreg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/esp/ncr53c9xreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/* $NetBSD: ncr53c9xreg.h,v 1.16 2009/09/07 13:31:44 tsutsui Exp $ */
/*-
@@ -29,7 +30,7 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/esp/ncr53c9xreg.h 226950 2011-10-30 21:45:36Z marius $ */
#ifndef _NCR53C9XREG_H_
#define _NCR53C9XREG_H_
Modified: trunk/sys/dev/esp/ncr53c9xvar.h
===================================================================
--- trunk/sys/dev/esp/ncr53c9xvar.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/esp/ncr53c9xvar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/* $NetBSD: ncr53c9xvar.h,v 1.55 2011/07/31 18:39:00 jakllsch Exp $ */
/*-
@@ -16,13 +17,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
@@ -66,7 +60,7 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/esp/ncr53c9xvar.h 263687 2014-03-24 13:48:04Z emaste $ */
#ifndef _NCR53C9XVAR_H_
#define _NCR53C9XVAR_H_
Modified: trunk/sys/dev/et/if_et.c
===================================================================
--- trunk/sys/dev/et/if_et.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/et/if_et.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2007 Sepherosa Ziehau. All rights reserved.
*
@@ -35,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/et/if_et.c 243857 2012-12-04 09:32:43Z glebius $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/dev/et/if_etreg.h
===================================================================
--- trunk/sys/dev/et/if_etreg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/et/if_etreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2007 Sepherosa Ziehau. All rights reserved.
*
@@ -32,7 +33,7 @@
* SUCH DAMAGE.
*
* $DragonFly: src/sys/dev/netif/et/if_etreg.h,v 1.3 2007/10/23 14:28:42 sephe Exp $
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/et/if_etreg.h 228369 2011-12-09 19:10:38Z yongari $
*/
#ifndef _IF_ETREG_H
Modified: trunk/sys/dev/et/if_etvar.h
===================================================================
--- trunk/sys/dev/et/if_etvar.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/et/if_etvar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2007 Sepherosa Ziehau. All rights reserved.
*
@@ -32,7 +33,7 @@
* SUCH DAMAGE.
*
* $DragonFly: src/sys/dev/netif/et/if_etvar.h,v 1.4 2007/10/23 14:28:42 sephe Exp $
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/dev/et/if_etvar.h 228381 2011-12-09 23:37:55Z yongari $
*/
#ifndef _IF_ETVAR_H
Added: trunk/sys/dev/etherswitch/arswitch/arswitch.c
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch.c (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,715 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch.c 253572 2013-07-23 14:24:22Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/iicbus/iic.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include <dev/etherswitch/arswitch/arswitchreg.h>
+#include <dev/etherswitch/arswitch/arswitchvar.h>
+#include <dev/etherswitch/arswitch/arswitch_reg.h>
+#include <dev/etherswitch/arswitch/arswitch_phy.h>
+#include <dev/etherswitch/arswitch/arswitch_vlans.h>
+
+#include <dev/etherswitch/arswitch/arswitch_7240.h>
+#include <dev/etherswitch/arswitch/arswitch_8216.h>
+#include <dev/etherswitch/arswitch/arswitch_8226.h>
+#include <dev/etherswitch/arswitch/arswitch_8316.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+#if defined(DEBUG)
+static SYSCTL_NODE(_debug, OID_AUTO, arswitch, CTLFLAG_RD, 0, "arswitch");
+#endif
+
+static inline int arswitch_portforphy(int phy);
+static void arswitch_tick(void *arg);
+static int arswitch_ifmedia_upd(struct ifnet *);
+static void arswitch_ifmedia_sts(struct ifnet *, struct ifmediareq *);
+
+static int
+arswitch_probe(device_t dev)
+{
+ struct arswitch_softc *sc;
+ uint32_t id;
+ char *chipname, desc[256];
+
+ sc = device_get_softc(dev);
+ bzero(sc, sizeof(*sc));
+ sc->page = -1;
+
+ /* AR7240 probe */
+ if (ar7240_probe(dev) == 0) {
+ chipname = "AR7240";
+ sc->sc_switchtype = AR8X16_SWITCH_AR7240;
+ id = 0;
+ goto done;
+ }
+
+ /* AR8xxx probe */
+ id = arswitch_readreg(dev, AR8X16_REG_MASK_CTRL);
+ switch ((id & AR8X16_MASK_CTRL_VER_MASK) >>
+ AR8X16_MASK_CTRL_VER_SHIFT) {
+ case 1:
+ chipname = "AR8216";
+ sc->sc_switchtype = AR8X16_SWITCH_AR8216;
+ break;
+ case 2:
+ chipname = "AR8226";
+ sc->sc_switchtype = AR8X16_SWITCH_AR8226;
+ break;
+ case 16:
+ chipname = "AR8316";
+ sc->sc_switchtype = AR8X16_SWITCH_AR8316;
+ break;
+ default:
+ chipname = NULL;
+ }
+
+done:
+ DPRINTF(dev, "chipname=%s, rev=%02x\n", chipname,
+ id & AR8X16_MASK_CTRL_REV_MASK);
+ if (chipname != NULL) {
+ snprintf(desc, sizeof(desc),
+ "Atheros %s Ethernet Switch",
+ chipname);
+ device_set_desc_copy(dev, desc);
+ return (BUS_PROBE_DEFAULT);
+ }
+ return (ENXIO);
+}
+
+static int
+arswitch_attach_phys(struct arswitch_softc *sc)
+{
+ int phy, err = 0;
+ char name[IFNAMSIZ];
+
+ /* PHYs need an interface, so we generate a dummy one */
+ snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev));
+ for (phy = 0; phy < sc->numphys; phy++) {
+ sc->ifp[phy] = if_alloc(IFT_ETHER);
+ sc->ifp[phy]->if_softc = sc;
+ sc->ifp[phy]->if_flags |= IFF_UP | IFF_BROADCAST |
+ IFF_DRV_RUNNING | IFF_SIMPLEX;
+ sc->ifname[phy] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK);
+ bcopy(name, sc->ifname[phy], strlen(name)+1);
+ if_initname(sc->ifp[phy], sc->ifname[phy],
+ arswitch_portforphy(phy));
+ err = mii_attach(sc->sc_dev, &sc->miibus[phy], sc->ifp[phy],
+ arswitch_ifmedia_upd, arswitch_ifmedia_sts, \
+ BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
+ DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n",
+ device_get_nameunit(sc->miibus[phy]),
+ sc->ifp[phy]->if_xname);
+ if (err != 0) {
+ device_printf(sc->sc_dev,
+ "attaching PHY %d failed\n",
+ phy);
+ }
+ }
+ return (err);
+}
+
+static int
+arswitch_reset(device_t dev)
+{
+
+ arswitch_writereg(dev, AR8X16_REG_MASK_CTRL,
+ AR8X16_MASK_CTRL_SOFT_RESET);
+ DELAY(1000);
+ if (arswitch_readreg(dev, AR8X16_REG_MASK_CTRL) &
+ AR8X16_MASK_CTRL_SOFT_RESET) {
+ device_printf(dev, "unable to reset switch\n");
+ return (-1);
+ }
+ return (0);
+}
+
+static int
+arswitch_set_vlan_mode(struct arswitch_softc *sc, uint32_t mode)
+{
+
+ /* Check for invalid modes. */
+ if ((mode & sc->info.es_vlan_caps) != mode)
+ return (EINVAL);
+
+ switch (mode) {
+ case ETHERSWITCH_VLAN_DOT1Q:
+ sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
+ break;
+ case ETHERSWITCH_VLAN_PORT:
+ sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
+ break;
+ default:
+ sc->vlan_mode = 0;
+ };
+
+ /* Reset VLANs. */
+ arswitch_reset_vlans(sc);
+
+ return (0);
+}
+
+static void
+arswitch_ports_init(struct arswitch_softc *sc)
+{
+ int port;
+
+ /* Port0 - CPU */
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(0),
+ (AR8X16_IS_SWITCH(sc, AR8216) ?
+ AR8X16_PORT_STS_SPEED_100 : AR8X16_PORT_STS_SPEED_1000) |
+ (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_RXFLOW) |
+ (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_TXFLOW) |
+ AR8X16_PORT_STS_RXMAC |
+ AR8X16_PORT_STS_TXMAC |
+ AR8X16_PORT_STS_DUPLEX);
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0),
+ arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0)) &
+ ~AR8X16_PORT_CTRL_HEADER);
+
+ for (port = 1; port <= sc->numphys; port++) {
+ /* Set ports to auto negotiation. */
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(port),
+ AR8X16_PORT_STS_LINK_AUTO);
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port),
+ arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port)) &
+ ~AR8X16_PORT_CTRL_HEADER);
+ }
+}
+
+static int
+arswitch_attach(device_t dev)
+{
+ struct arswitch_softc *sc;
+ int err = 0;
+
+ sc = device_get_softc(dev);
+
+ /* sc->sc_switchtype is already decided in arswitch_probe() */
+ sc->sc_dev = dev;
+ mtx_init(&sc->sc_mtx, "arswitch", NULL, MTX_DEF);
+ sc->page = -1;
+ strlcpy(sc->info.es_name, device_get_desc(dev),
+ sizeof(sc->info.es_name));
+
+ /*
+ * Attach switch related functions
+ */
+ if (AR8X16_IS_SWITCH(sc, AR7240))
+ ar7240_attach(sc);
+ else if (AR8X16_IS_SWITCH(sc, AR8216))
+ ar8216_attach(sc);
+ else if (AR8X16_IS_SWITCH(sc, AR8226))
+ ar8226_attach(sc);
+ else if (AR8X16_IS_SWITCH(sc, AR8316))
+ ar8316_attach(sc);
+ else
+ return (ENXIO);
+
+ /* Common defaults. */
+ sc->info.es_nports = 5; /* XXX technically 6, but 6th not used */
+
+ /* XXX Defaults for externally connected AR8316 */
+ sc->numphys = 4;
+ sc->phy4cpu = 1;
+ sc->is_rgmii = 1;
+ sc->is_gmii = 0;
+
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "numphys", &sc->numphys);
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "phy4cpu", &sc->phy4cpu);
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "is_rgmii", &sc->is_rgmii);
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "is_gmii", &sc->is_gmii);
+
+ if (sc->numphys > AR8X16_NUM_PHYS)
+ sc->numphys = AR8X16_NUM_PHYS;
+
+ /* Reset the switch. */
+ if (arswitch_reset(dev))
+ return (ENXIO);
+
+ err = sc->hal.arswitch_hw_global_setup(sc);
+ if (err != 0)
+ return (err);
+
+ /* Initialize the switch ports. */
+ arswitch_ports_init(sc);
+
+ /*
+ * Attach the PHYs and complete the bus enumeration.
+ */
+ err = arswitch_attach_phys(sc);
+ if (err != 0)
+ return (err);
+
+ /* Default to ingress filters off. */
+ err = arswitch_set_vlan_mode(sc, 0);
+ if (err != 0)
+ return (err);
+
+ err = sc->hal.arswitch_hw_setup(sc);
+ if (err != 0)
+ return (err);
+
+ bus_generic_probe(dev);
+ bus_enumerate_hinted_children(dev);
+ err = bus_generic_attach(dev);
+ if (err != 0)
+ return (err);
+
+ callout_init_mtx(&sc->callout_tick, &sc->sc_mtx, 0);
+
+ ARSWITCH_LOCK(sc);
+ arswitch_tick(sc);
+ ARSWITCH_UNLOCK(sc);
+
+ return (err);
+}
+
+static int
+arswitch_detach(device_t dev)
+{
+ struct arswitch_softc *sc = device_get_softc(dev);
+ int i;
+
+ callout_drain(&sc->callout_tick);
+
+ for (i=0; i < sc->numphys; i++) {
+ if (sc->miibus[i] != NULL)
+ device_delete_child(dev, sc->miibus[i]);
+ if (sc->ifp[i] != NULL)
+ if_free(sc->ifp[i]);
+ free(sc->ifname[i], M_DEVBUF);
+ }
+
+ bus_generic_detach(dev);
+ mtx_destroy(&sc->sc_mtx);
+
+ return (0);
+}
+
+/*
+ * Convert PHY number to port number. PHY0 is connected to port 1, PHY1 to
+ * port 2, etc.
+ */
+static inline int
+arswitch_portforphy(int phy)
+{
+ return (phy+1);
+}
+
+static inline struct mii_data *
+arswitch_miiforport(struct arswitch_softc *sc, int port)
+{
+ int phy = port-1;
+
+ if (phy < 0 || phy >= sc->numphys)
+ return (NULL);
+ return (device_get_softc(sc->miibus[phy]));
+}
+
+static inline struct ifnet *
+arswitch_ifpforport(struct arswitch_softc *sc, int port)
+{
+ int phy = port-1;
+
+ if (phy < 0 || phy >= sc->numphys)
+ return (NULL);
+ return (sc->ifp[phy]);
+}
+
+/*
+ * Convert port status to ifmedia.
+ */
+static void
+arswitch_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active)
+{
+ *media_active = IFM_ETHER;
+ *media_status = IFM_AVALID;
+
+ if ((portstatus & AR8X16_PORT_STS_LINK_UP) != 0)
+ *media_status |= IFM_ACTIVE;
+ else {
+ *media_active |= IFM_NONE;
+ return;
+ }
+ switch (portstatus & AR8X16_PORT_STS_SPEED_MASK) {
+ case AR8X16_PORT_STS_SPEED_10:
+ *media_active |= IFM_10_T;
+ break;
+ case AR8X16_PORT_STS_SPEED_100:
+ *media_active |= IFM_100_TX;
+ break;
+ case AR8X16_PORT_STS_SPEED_1000:
+ *media_active |= IFM_1000_T;
+ break;
+ }
+ if ((portstatus & AR8X16_PORT_STS_DUPLEX) == 0)
+ *media_active |= IFM_FDX;
+ else
+ *media_active |= IFM_HDX;
+ if ((portstatus & AR8X16_PORT_STS_TXFLOW) != 0)
+ *media_active |= IFM_ETH_TXPAUSE;
+ if ((portstatus & AR8X16_PORT_STS_RXFLOW) != 0)
+ *media_active |= IFM_ETH_RXPAUSE;
+}
+
+/*
+ * Poll the status for all PHYs. We're using the switch port status because
+ * thats a lot quicker to read than talking to all the PHYs. Care must be
+ * taken that the resulting ifmedia_active is identical to what the PHY will
+ * compute, or gratuitous link status changes will occur whenever the PHYs
+ * update function is called.
+ */
+static void
+arswitch_miipollstat(struct arswitch_softc *sc)
+{
+ int i;
+ struct mii_data *mii;
+ struct mii_softc *miisc;
+ int portstatus;
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+
+ for (i = 0; i < sc->numphys; i++) {
+ if (sc->miibus[i] == NULL)
+ continue;
+ mii = device_get_softc(sc->miibus[i]);
+ portstatus = arswitch_readreg(sc->sc_dev,
+ AR8X16_REG_PORT_STS(arswitch_portforphy(i)));
+#if 0
+ DPRINTF(sc->sc_dev, "p[%d]=%b\n",
+ arge_portforphy(i),
+ portstatus,
+ "\20\3TXMAC\4RXMAC\5TXFLOW\6RXFLOW\7"
+ "DUPLEX\11LINK_UP\12LINK_AUTO\13LINK_PAUSE");
+#endif
+ arswitch_update_ifmedia(portstatus, &mii->mii_media_status,
+ &mii->mii_media_active);
+ LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
+ if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) !=
+ miisc->mii_inst)
+ continue;
+ mii_phy_update(miisc, MII_POLLSTAT);
+ }
+ }
+}
+
+static void
+arswitch_tick(void *arg)
+{
+ struct arswitch_softc *sc = arg;
+
+ arswitch_miipollstat(sc);
+ callout_reset(&sc->callout_tick, hz, arswitch_tick, sc);
+}
+
+static void
+arswitch_lock(device_t dev)
+{
+ struct arswitch_softc *sc = device_get_softc(dev);
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+ ARSWITCH_LOCK(sc);
+}
+
+static void
+arswitch_unlock(device_t dev)
+{
+ struct arswitch_softc *sc = device_get_softc(dev);
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ ARSWITCH_UNLOCK(sc);
+}
+
+static etherswitch_info_t *
+arswitch_getinfo(device_t dev)
+{
+ struct arswitch_softc *sc = device_get_softc(dev);
+
+ return (&sc->info);
+}
+
+static int
+arswitch_getport(device_t dev, etherswitch_port_t *p)
+{
+ struct arswitch_softc *sc;
+ struct ifmediareq *ifmr;
+ struct mii_data *mii;
+ uint32_t reg;
+ int err;
+
+ sc = device_get_softc(dev);
+ if (p->es_port < 0 || p->es_port > sc->numphys)
+ return (ENXIO);
+
+ ARSWITCH_LOCK(sc);
+
+ /* Retrieve the PVID. */
+ arswitch_get_pvid(sc, p->es_port, &p->es_pvid);
+
+ /* Port flags. */
+ reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(p->es_port));
+ if (reg & AR8X16_PORT_CTRL_DOUBLE_TAG)
+ p->es_flags |= ETHERSWITCH_PORT_DOUBLE_TAG;
+ reg >>= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
+ if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD)
+ p->es_flags |= ETHERSWITCH_PORT_ADDTAG;
+ if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP)
+ p->es_flags |= ETHERSWITCH_PORT_STRIPTAG;
+ ARSWITCH_UNLOCK(sc);
+
+ mii = arswitch_miiforport(sc, p->es_port);
+ if (p->es_port == 0) {
+ /* fill in fixed values for CPU port */
+ p->es_flags |= ETHERSWITCH_PORT_CPU;
+ ifmr = &p->es_ifmr;
+ ifmr->ifm_count = 0;
+ ifmr->ifm_current = ifmr->ifm_active =
+ IFM_ETHER | IFM_1000_T | IFM_FDX;
+ ifmr->ifm_mask = 0;
+ ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
+ } else if (mii != NULL) {
+ err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
+ &mii->mii_media, SIOCGIFMEDIA);
+ if (err)
+ return (err);
+ } else {
+ return (ENXIO);
+ }
+ return (0);
+}
+
+static int
+arswitch_setport(device_t dev, etherswitch_port_t *p)
+{
+ int err;
+ uint32_t reg;
+ struct arswitch_softc *sc;
+ struct ifmedia *ifm;
+ struct mii_data *mii;
+ struct ifnet *ifp;
+
+ sc = device_get_softc(dev);
+ if (p->es_port < 0 || p->es_port > sc->numphys)
+ return (ENXIO);
+
+ /* Port flags. */
+ if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
+
+ ARSWITCH_LOCK(sc);
+ /* Set the PVID. */
+ if (p->es_pvid != 0)
+ arswitch_set_pvid(sc, p->es_port, p->es_pvid);
+
+ /* Mutually exclusive. */
+ if (p->es_flags & ETHERSWITCH_PORT_ADDTAG &&
+ p->es_flags & ETHERSWITCH_PORT_STRIPTAG) {
+ ARSWITCH_UNLOCK(sc);
+ return (EINVAL);
+ }
+
+ reg = 0;
+ if (p->es_flags & ETHERSWITCH_PORT_DOUBLE_TAG)
+ reg |= AR8X16_PORT_CTRL_DOUBLE_TAG;
+ if (p->es_flags & ETHERSWITCH_PORT_ADDTAG)
+ reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD <<
+ AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
+ if (p->es_flags & ETHERSWITCH_PORT_STRIPTAG)
+ reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP <<
+ AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT;
+
+ err = arswitch_modifyreg(sc->sc_dev,
+ AR8X16_REG_PORT_CTRL(p->es_port),
+ 0x3 << AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT |
+ AR8X16_PORT_CTRL_DOUBLE_TAG, reg);
+
+ ARSWITCH_UNLOCK(sc);
+ if (err)
+ return (err);
+ }
+
+ /* Do not allow media changes on CPU port. */
+ if (p->es_port == AR8X16_PORT_CPU)
+ return (0);
+
+ mii = arswitch_miiforport(sc, p->es_port);
+ if (mii == NULL)
+ return (ENXIO);
+
+ ifp = arswitch_ifpforport(sc, p->es_port);
+
+ ifm = &mii->mii_media;
+ return (ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA));
+}
+
+static void
+arswitch_statchg(device_t dev)
+{
+
+ DPRINTF(dev, "%s\n", __func__);
+}
+
+static int
+arswitch_ifmedia_upd(struct ifnet *ifp)
+{
+ struct arswitch_softc *sc = ifp->if_softc;
+ struct mii_data *mii = arswitch_miiforport(sc, ifp->if_dunit);
+
+ if (mii == NULL)
+ return (ENXIO);
+ mii_mediachg(mii);
+ return (0);
+}
+
+static void
+arswitch_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
+{
+ struct arswitch_softc *sc = ifp->if_softc;
+ struct mii_data *mii = arswitch_miiforport(sc, ifp->if_dunit);
+
+ DPRINTF(sc->sc_dev, "%s\n", __func__);
+
+ if (mii == NULL)
+ return;
+ mii_pollstat(mii);
+ ifmr->ifm_active = mii->mii_media_active;
+ ifmr->ifm_status = mii->mii_media_status;
+}
+
+static int
+arswitch_getconf(device_t dev, etherswitch_conf_t *conf)
+{
+ struct arswitch_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ /* Return the VLAN mode. */
+ conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
+ conf->vlan_mode = sc->vlan_mode;
+
+ return (0);
+}
+
+static int
+arswitch_setconf(device_t dev, etherswitch_conf_t *conf)
+{
+ struct arswitch_softc *sc;
+ int err;
+
+ sc = device_get_softc(dev);
+
+ /* Set the VLAN mode. */
+ if (conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) {
+ err = arswitch_set_vlan_mode(sc, conf->vlan_mode);
+ if (err != 0)
+ return (err);
+ }
+
+ return (0);
+}
+
+static device_method_t arswitch_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, arswitch_probe),
+ DEVMETHOD(device_attach, arswitch_attach),
+ DEVMETHOD(device_detach, arswitch_detach),
+
+ /* bus interface */
+ DEVMETHOD(bus_add_child, device_add_child_ordered),
+
+ /* MII interface */
+ DEVMETHOD(miibus_readreg, arswitch_readphy),
+ DEVMETHOD(miibus_writereg, arswitch_writephy),
+ DEVMETHOD(miibus_statchg, arswitch_statchg),
+
+ /* MDIO interface */
+ DEVMETHOD(mdio_readreg, arswitch_readphy),
+ DEVMETHOD(mdio_writereg, arswitch_writephy),
+
+ /* etherswitch interface */
+ DEVMETHOD(etherswitch_lock, arswitch_lock),
+ DEVMETHOD(etherswitch_unlock, arswitch_unlock),
+ DEVMETHOD(etherswitch_getinfo, arswitch_getinfo),
+ DEVMETHOD(etherswitch_readreg, arswitch_readreg),
+ DEVMETHOD(etherswitch_writereg, arswitch_writereg),
+ DEVMETHOD(etherswitch_readphyreg, arswitch_readphy),
+ DEVMETHOD(etherswitch_writephyreg, arswitch_writephy),
+ DEVMETHOD(etherswitch_getport, arswitch_getport),
+ DEVMETHOD(etherswitch_setport, arswitch_setport),
+ DEVMETHOD(etherswitch_getvgroup, arswitch_getvgroup),
+ DEVMETHOD(etherswitch_setvgroup, arswitch_setvgroup),
+ DEVMETHOD(etherswitch_getconf, arswitch_getconf),
+ DEVMETHOD(etherswitch_setconf, arswitch_setconf),
+
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_0(arswitch, arswitch_driver, arswitch_methods,
+ sizeof(struct arswitch_softc));
+static devclass_t arswitch_devclass;
+
+DRIVER_MODULE(arswitch, mdio, arswitch_driver, arswitch_devclass, 0, 0);
+DRIVER_MODULE(miibus, arswitch, miibus_driver, miibus_devclass, 0, 0);
+DRIVER_MODULE(mdio, arswitch, mdio_driver, mdio_devclass, 0, 0);
+DRIVER_MODULE(etherswitch, arswitch, etherswitch_driver, etherswitch_devclass, 0, 0);
+MODULE_VERSION(arswitch, 1);
+MODULE_DEPEND(arswitch, miibus, 1, 1, 1); /* XXX which versions? */
+MODULE_DEPEND(arswitch, etherswitch, 1, 1, 1); /* XXX which versions? */
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_7240.c
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_7240.c (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_7240.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,142 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_7240.c 253572 2013-07-23 14:24:22Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/iicbus/iic.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include <dev/etherswitch/arswitch/arswitchreg.h>
+#include <dev/etherswitch/arswitch/arswitchvar.h>
+#include <dev/etherswitch/arswitch/arswitch_reg.h>
+#include <dev/etherswitch/arswitch/arswitch_phy.h> /* XXX for probe */
+#include <dev/etherswitch/arswitch/arswitch_7240.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+/*
+ * AR7240 specific functions
+ */
+static int
+ar7240_hw_setup(struct arswitch_softc *sc)
+{
+
+ return (0);
+}
+
+/*
+ * Initialise other global values for the AR7240.
+ */
+static int
+ar7240_hw_global_setup(struct arswitch_softc *sc)
+{
+
+ /* Enable CPU port; disable mirror port */
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT,
+ AR8X16_CPU_PORT_EN | AR8X16_CPU_MIRROR_DIS);
+
+ /* Setup TAG priority mapping */
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50);
+
+ /* Enable broadcast frames transmitted to the CPU */
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_FLOOD_MASK,
+ AR8X16_FLOOD_MASK_BCAST_TO_CPU | 0x003f003f);
+
+ /* Setup MTU */
+ arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL,
+ AR7240_GLOBAL_CTRL_MTU_MASK,
+ SM(1536, AR7240_GLOBAL_CTRL_MTU_MASK));
+
+ /* Service Tag */
+ arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG,
+ AR8X16_SERVICE_TAG_MASK, 0);
+
+ return (0);
+}
+
+/*
+ * The AR7240 probes the same as the AR8216.
+ *
+ * However, the support is slightly different.
+ *
+ * So instead of checking the PHY revision or mask register contents,
+ * we simply fall back to a hint check.
+ */
+int
+ar7240_probe(device_t dev)
+{
+ int is_7240 = 0;
+
+ if (resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "is_7240", &is_7240) != 0)
+ return (ENXIO);
+
+ if (is_7240 == 0)
+ return (ENXIO);
+
+ return (0);
+}
+
+void
+ar7240_attach(struct arswitch_softc *sc)
+{
+
+ sc->hal.arswitch_hw_setup = ar7240_hw_setup;
+ sc->hal.arswitch_hw_global_setup = ar7240_hw_global_setup;
+
+ /* Set the switch vlan capabilities. */
+ sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
+ ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG;
+ sc->info.es_nvlangroups = AR8X16_MAX_VLANS;
+}
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_7240.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_7240.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_7240.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_7240.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,36 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_7240.h 235323 2012-05-12 05:26:49Z adrian $
+ */
+#ifndef __ARSWITCH_7240_H__
+#define __ARSWITCH_7240_H__
+
+extern int ar7240_probe(device_t dev);
+extern void ar7240_attach(struct arswitch_softc *sc);
+
+#endif /* __ARSWITCH_7240_H__ */
+
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_7240.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_8216.c
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_8216.c (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_8216.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,95 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_8216.c 253572 2013-07-23 14:24:22Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/iicbus/iic.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include <dev/etherswitch/arswitch/arswitchreg.h>
+#include <dev/etherswitch/arswitch/arswitchvar.h>
+#include <dev/etherswitch/arswitch/arswitch_reg.h>
+#include <dev/etherswitch/arswitch/arswitch_8216.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+/*
+ * AR8216 specific functions
+ */
+static int
+ar8216_hw_setup(struct arswitch_softc *sc)
+{
+
+ return (0);
+}
+
+/*
+ * Initialise other global values, for the AR8216.
+ */
+static int
+ar8216_hw_global_setup(struct arswitch_softc *sc)
+{
+
+ return (0);
+}
+
+void
+ar8216_attach(struct arswitch_softc *sc)
+{
+
+ sc->hal.arswitch_hw_setup = ar8216_hw_setup;
+ sc->hal.arswitch_hw_global_setup = ar8216_hw_global_setup;
+
+ sc->info.es_nvlangroups = 0;
+}
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_8216.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_8216.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_8216.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_8216.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,35 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_8216.h 235288 2012-05-11 20:53:20Z adrian $
+ */
+#ifndef __ARSWITCH_8216_H__
+#define __ARSWITCH_8216_H__
+
+extern void ar8216_attach(struct arswitch_softc *sc);
+
+#endif /* __ARSWITCH_8216_H__ */
+
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_8216.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_8226.c
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_8226.c (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_8226.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,95 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_8226.c 253572 2013-07-23 14:24:22Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/iicbus/iic.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include <dev/etherswitch/arswitch/arswitchreg.h>
+#include <dev/etherswitch/arswitch/arswitchvar.h>
+#include <dev/etherswitch/arswitch/arswitch_phy.h>
+#include <dev/etherswitch/arswitch/arswitch_8226.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+/*
+ * AR8226 specific functions
+ */
+static int
+ar8226_hw_setup(struct arswitch_softc *sc)
+{
+
+ return (0);
+}
+
+/*
+ * Initialise other global values, for the AR8226.
+ */
+static int
+ar8226_hw_global_setup(struct arswitch_softc *sc)
+{
+
+ return (0);
+}
+
+void
+ar8226_attach(struct arswitch_softc *sc)
+{
+
+ sc->hal.arswitch_hw_setup = ar8226_hw_setup;
+ sc->hal.arswitch_hw_global_setup = ar8226_hw_global_setup;
+
+ sc->info.es_nvlangroups = 0;
+}
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_8226.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_8226.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_8226.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_8226.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,35 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_8226.h 235288 2012-05-11 20:53:20Z adrian $
+ */
+#ifndef __ARSWITCH_8226_H__
+#define __ARSWITCH_8226_H__
+
+extern void ar8226_attach(struct arswitch_softc *sc);
+
+#endif /* __ARSWITCH_8226_H__ */
+
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_8226.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_8316.c
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_8316.c (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_8316.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,173 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_8316.c 253572 2013-07-23 14:24:22Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/iicbus/iic.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include <dev/etherswitch/arswitch/arswitchreg.h>
+#include <dev/etherswitch/arswitch/arswitchvar.h>
+#include <dev/etherswitch/arswitch/arswitch_reg.h>
+#include <dev/etherswitch/arswitch/arswitch_8316.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+/*
+ * AR8316 specific functions
+ */
+static int
+ar8316_hw_setup(struct arswitch_softc *sc)
+{
+
+ /*
+ * Configure the switch mode based on whether:
+ *
+ * + The switch port is GMII/RGMII;
+ * + Port 4 is either connected to the CPU or to the internal switch.
+ */
+ if (sc->is_rgmii && sc->phy4cpu) {
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
+ AR8X16_MODE_RGMII_PORT4_ISO);
+ device_printf(sc->sc_dev,
+ "%s: MAC port == RGMII, port 4 = dedicated PHY\n",
+ __func__);
+ } else if (sc->is_rgmii) {
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
+ AR8X16_MODE_RGMII_PORT4_SWITCH);
+ device_printf(sc->sc_dev,
+ "%s: MAC port == RGMII, port 4 = switch port\n",
+ __func__);
+ } else if (sc->is_gmii) {
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
+ AR8X16_MODE_GMII);
+ device_printf(sc->sc_dev, "%s: MAC port == GMII\n", __func__);
+ } else {
+ device_printf(sc->sc_dev, "%s: unknown switch PHY config\n",
+ __func__);
+ return (ENXIO);
+ }
+
+ DELAY(1000); /* 1ms wait for things to settle */
+
+ /*
+ * If port 4 is RGMII, force workaround
+ */
+ if (sc->is_rgmii && sc->phy4cpu) {
+ device_printf(sc->sc_dev,
+ "%s: port 4 RGMII workaround\n",
+ __func__);
+
+ /* work around for phy4 rgmii mode */
+ arswitch_writedbg(sc->sc_dev, 4, 0x12, 0x480c);
+ /* rx delay */
+ arswitch_writedbg(sc->sc_dev, 4, 0x0, 0x824e);
+ /* tx delay */
+ arswitch_writedbg(sc->sc_dev, 4, 0x5, 0x3d47);
+ DELAY(1000); /* 1ms, again to let things settle */
+ }
+
+ return (0);
+}
+
+/*
+ * Initialise other global values, for the AR8316.
+ */
+static int
+ar8316_hw_global_setup(struct arswitch_softc *sc)
+{
+
+ arswitch_writereg(sc->sc_dev, 0x38, AR8X16_MAGIC);
+
+ /* Enable CPU port and disable mirror port. */
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT,
+ AR8X16_CPU_PORT_EN | AR8X16_CPU_MIRROR_DIS);
+
+ /* Setup TAG priority mapping. */
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50);
+
+ /* Enable ARP frame acknowledge. */
+ arswitch_modifyreg(sc->sc_dev, AR8X16_REG_AT_CTRL, 0,
+ AR8X16_AT_CTRL_ARP_EN);
+
+ /*
+ * Flood address table misses to all ports, and enable forwarding of
+ * broadcasts to the cpu port.
+ */
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_FLOOD_MASK,
+ AR8X16_FLOOD_MASK_BCAST_TO_CPU | 0x003f003f);
+
+ /* Enable jumbo frames. */
+ arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL,
+ AR8316_GLOBAL_CTRL_MTU_MASK, 9018 + 8 + 2);
+
+ /* Setup service TAG. */
+ arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG,
+ AR8X16_SERVICE_TAG_MASK, 0);
+
+ return (0);
+}
+
+void
+ar8316_attach(struct arswitch_softc *sc)
+{
+
+ sc->hal.arswitch_hw_setup = ar8316_hw_setup;
+ sc->hal.arswitch_hw_global_setup = ar8316_hw_global_setup;
+
+ /* Set the switch vlan capabilities. */
+ sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
+ ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG;
+ sc->info.es_nvlangroups = AR8X16_MAX_VLANS;
+}
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_8316.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_8316.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_8316.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_8316.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,35 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_8316.h 235288 2012-05-11 20:53:20Z adrian $
+ */
+#ifndef __ARSWITCH_8316_H__
+#define __ARSWITCH_8316_H__
+
+extern void ar8316_attach(struct arswitch_softc *sc);
+
+#endif /* __ARSWITCH_8316_H__ */
+
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_8316.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_phy.c
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_phy.c (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_phy.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,151 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_phy.c 253570 2013-07-23 14:02:38Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/iicbus/iic.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include <dev/etherswitch/arswitch/arswitchreg.h>
+#include <dev/etherswitch/arswitch/arswitchvar.h>
+
+#include <dev/etherswitch/arswitch/arswitch_reg.h>
+#include <dev/etherswitch/arswitch/arswitch_phy.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+#if defined(DEBUG)
+static SYSCTL_NODE(_debug, OID_AUTO, arswitch, CTLFLAG_RD, 0, "arswitch");
+#endif
+
+/*
+ * access PHYs integrated into the switch chip through the switch's MDIO
+ * control register.
+ */
+int
+arswitch_readphy(device_t dev, int phy, int reg)
+{
+ struct arswitch_softc *sc;
+ uint32_t data = 0, ctrl;
+ int err, timeout;
+
+ sc = device_get_softc(dev);
+ ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ if (phy < 0 || phy >= 32)
+ return (ENXIO);
+ if (reg < 0 || reg >= 32)
+ return (ENXIO);
+
+ ARSWITCH_LOCK(sc);
+ err = arswitch_writereg_msb(dev, AR8X16_REG_MDIO_CTRL,
+ AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN |
+ AR8X16_MDIO_CTRL_CMD_READ |
+ (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
+ (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT));
+ DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg);
+ if (err != 0)
+ goto fail;
+ for (timeout = 100; timeout--; ) {
+ ctrl = arswitch_readreg_msb(dev, AR8X16_REG_MDIO_CTRL);
+ if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
+ break;
+ }
+ if (timeout < 0)
+ goto fail;
+ data = arswitch_readreg_lsb(dev, AR8X16_REG_MDIO_CTRL) &
+ AR8X16_MDIO_CTRL_DATA_MASK;
+ ARSWITCH_UNLOCK(sc);
+ return (data);
+
+fail:
+ ARSWITCH_UNLOCK(sc);
+ return (-1);
+}
+
+int
+arswitch_writephy(device_t dev, int phy, int reg, int data)
+{
+ struct arswitch_softc *sc;
+ uint32_t ctrl;
+ int err, timeout;
+
+ sc = device_get_softc(dev);
+ ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ if (reg < 0 || reg >= 32)
+ return (ENXIO);
+
+ ARSWITCH_LOCK(sc);
+ err = arswitch_writereg(dev, AR8X16_REG_MDIO_CTRL,
+ AR8X16_MDIO_CTRL_BUSY |
+ AR8X16_MDIO_CTRL_MASTER_EN |
+ AR8X16_MDIO_CTRL_CMD_WRITE |
+ (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
+ (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT) |
+ (data & AR8X16_MDIO_CTRL_DATA_MASK));
+ if (err != 0)
+ goto out;
+ for (timeout = 100; timeout--; ) {
+ ctrl = arswitch_readreg(dev, AR8X16_REG_MDIO_CTRL);
+ if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
+ break;
+ }
+ if (timeout < 0)
+ err = EIO;
+out:
+ DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg);
+ ARSWITCH_UNLOCK(sc);
+ return (err);
+}
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_phy.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_phy.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_phy.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_phy.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,35 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_phy.h 235288 2012-05-11 20:53:20Z adrian $
+ */
+#ifndef __ARSWITCH_PHY_H__
+#define __ARSWITCH_PHY_H__
+
+extern int arswitch_readphy(device_t dev, int phy, int reg);
+extern int arswitch_writephy(device_t dev, int phy, int reg, int data);
+
+#endif /* __ARSWITCH_PHY_H__ */
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_phy.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_reg.c
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_reg.c (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_reg.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,202 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_reg.c 253572 2013-07-23 14:24:22Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/iicbus/iic.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include <dev/etherswitch/arswitch/arswitchreg.h>
+#include <dev/etherswitch/arswitch/arswitchvar.h>
+#include <dev/etherswitch/arswitch/arswitch_reg.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+static inline void
+arswitch_split_setpage(device_t dev, uint32_t addr, uint16_t *phy,
+ uint16_t *reg)
+{
+ struct arswitch_softc *sc = device_get_softc(dev);
+ uint16_t page;
+
+ page = ((addr) >> 9) & 0xffff;
+ *phy = (((addr) >> 6) & 0x07) | 0x10;
+ *reg = ((addr) >> 1) & 0x1f;
+
+ if (sc->page != page) {
+ MDIO_WRITEREG(device_get_parent(dev), 0x18, 0, page);
+ sc->page = page;
+ }
+}
+
+/*
+ * Read half a register. Some of the registers define control bits, and
+ * the sequence of half-word accesses matters. The register addresses
+ * are word-even (mod 4).
+ */
+static inline int
+arswitch_readreg16(device_t dev, int addr)
+{
+ uint16_t phy, reg;
+
+ arswitch_split_setpage(dev, addr, &phy, ®);
+ return (MDIO_READREG(device_get_parent(dev), phy, reg));
+}
+
+/*
+ * XXX NOTE:
+ *
+ * This may not work for AR7240 series embedded switches -
+ * the per-PHY register space doesn't seem to be exposed.
+ *
+ * In that instance, it may be required to speak via
+ * the internal switch PHY MDIO bus indirection.
+ */
+void
+arswitch_writedbg(device_t dev, int phy, uint16_t dbg_addr,
+ uint16_t dbg_data)
+{
+ (void) MDIO_WRITEREG(device_get_parent(dev), phy,
+ MII_ATH_DBG_ADDR, dbg_addr);
+ (void) MDIO_WRITEREG(device_get_parent(dev), phy,
+ MII_ATH_DBG_DATA, dbg_data);
+}
+
+/*
+ * Write half a register
+ */
+static inline int
+arswitch_writereg16(device_t dev, int addr, int data)
+{
+ uint16_t phy, reg;
+
+ arswitch_split_setpage(dev, addr, &phy, ®);
+ return (MDIO_WRITEREG(device_get_parent(dev), phy, reg, data));
+}
+
+int
+arswitch_readreg_lsb(device_t dev, int addr)
+{
+
+ return (arswitch_readreg16(dev, addr));
+}
+
+int
+arswitch_readreg_msb(device_t dev, int addr)
+{
+
+ return (arswitch_readreg16(dev, addr + 2) << 16);
+}
+
+int
+arswitch_writereg_lsb(device_t dev, int addr, int data)
+{
+
+ return (arswitch_writereg16(dev, addr, data & 0xffff));
+}
+
+int
+arswitch_writereg_msb(device_t dev, int addr, int data)
+{
+
+ return (arswitch_writereg16(dev, addr + 2, (data >> 16) & 0xffff));
+}
+
+int
+arswitch_readreg(device_t dev, int addr)
+{
+
+ return (arswitch_readreg_lsb(dev, addr) |
+ arswitch_readreg_msb(dev, addr));
+}
+
+int
+arswitch_writereg(device_t dev, int addr, int value)
+{
+
+ /* XXX Check the first write too? */
+ arswitch_writereg_msb(dev, addr, value);
+ return (arswitch_writereg_lsb(dev, addr, value));
+}
+
+int
+arswitch_modifyreg(device_t dev, int addr, int mask, int set)
+{
+ int value;
+
+ value = arswitch_readreg(dev, addr);
+ value &= ~mask;
+ value |= set;
+ return (arswitch_writereg(dev, addr, value));
+}
+
+int
+arswitch_waitreg(device_t dev, int addr, int mask, int val, int timeout)
+{
+ int err, v;
+
+ err = -1;
+ while (1) {
+ v = arswitch_readreg(dev, addr);
+ v &= mask;
+ if (v == val) {
+ err = 0;
+ break;
+ }
+ if (!timeout)
+ break;
+ DELAY(1);
+ timeout--;
+ }
+ return (err);
+}
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_reg.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_reg.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_reg.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_reg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,46 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_reg.h 253572 2013-07-23 14:24:22Z loos $
+ */
+#ifndef __ARSWITCH_REG_H__
+#define __ARSWITCH_REG_H__
+
+extern void arswitch_writedbg(device_t dev, int phy, uint16_t dbg_addr,
+ uint16_t dbg_data);
+
+extern int arswitch_readreg(device_t dev, int addr);
+extern int arswitch_writereg(device_t dev, int addr, int value);
+extern int arswitch_modifyreg(device_t dev, int addr, int mask, int set);
+extern int arswitch_waitreg(device_t, int, int, int, int);
+
+extern int arswitch_readreg_lsb(device_t dev, int addr);
+extern int arswitch_readreg_msb(device_t dev, int addr);
+
+extern int arswitch_writereg_lsb(device_t dev, int addr, int data);
+extern int arswitch_writereg_msb(device_t dev, int addr, int data);
+
+#endif /* __ARSWITCH_REG_H__ */
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_reg.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.c
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.c (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,376 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_vlans.c 253572 2013-07-23 14:24:22Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/systm.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+
+#include <dev/mii/mii.h>
+
+#include <dev/etherswitch/etherswitch.h>
+#include <dev/etherswitch/arswitch/arswitchreg.h>
+#include <dev/etherswitch/arswitch/arswitchvar.h>
+#include <dev/etherswitch/arswitch/arswitch_reg.h>
+#include <dev/etherswitch/arswitch/arswitch_vlans.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+static int
+arswitch_vlan_op(struct arswitch_softc *sc, uint32_t op, uint32_t vid,
+ uint32_t data)
+{
+ int err;
+
+ if (arswitch_waitreg(sc->sc_dev, AR8X16_REG_VLAN_CTRL,
+ AR8X16_VLAN_ACTIVE, 0, 5))
+ return (EBUSY);
+
+ /* Load the vlan data if needed. */
+ if (op == AR8X16_VLAN_OP_LOAD) {
+ err = arswitch_writereg(sc->sc_dev, AR8X16_REG_VLAN_DATA,
+ (data & AR8X16_VLAN_MEMBER) | AR8X16_VLAN_VALID);
+ if (err)
+ return (err);
+ }
+
+ if (vid != 0)
+ op |= ((vid & ETHERSWITCH_VID_MASK) << AR8X16_VLAN_VID_SHIFT);
+ op |= AR8X16_VLAN_ACTIVE;
+ arswitch_writereg(sc->sc_dev, AR8X16_REG_VLAN_CTRL, op);
+
+ /* Wait for command processing. */
+ if (arswitch_waitreg(sc->sc_dev, AR8X16_REG_VLAN_CTRL,
+ AR8X16_VLAN_ACTIVE, 0, 5))
+ return (EBUSY);
+
+ return (0);
+}
+
+static int
+arswitch_flush_dot1q_vlan(struct arswitch_softc *sc)
+{
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ return (arswitch_vlan_op(sc, AR8X16_VLAN_OP_FLUSH, 0, 0));
+}
+
+static int
+arswitch_purge_dot1q_vlan(struct arswitch_softc *sc, int vid)
+{
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ return (arswitch_vlan_op(sc, AR8X16_VLAN_OP_PURGE, vid, 0));
+}
+
+static int
+arswitch_get_dot1q_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
+{
+ uint32_t reg;
+ int err;
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ err = arswitch_vlan_op(sc, AR8X16_VLAN_OP_GET, vid, 0);
+ if (err)
+ return (err);
+
+ reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_VLAN_DATA);
+ if ((reg & AR8X16_VLAN_VALID) == 0) {
+ *ports = 0;
+ return (EINVAL);
+ }
+ reg &= ((1 << (sc->numphys + 1)) - 1);
+ *ports = reg;
+ return (0);
+}
+
+static int
+arswitch_set_dot1q_vlan(struct arswitch_softc *sc, uint32_t ports, int vid)
+{
+ int err;
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ err = arswitch_vlan_op(sc, AR8X16_VLAN_OP_LOAD, vid, ports);
+ if (err)
+ return (err);
+ return (0);
+}
+
+static int
+arswitch_get_port_vlan(struct arswitch_softc *sc, uint32_t *ports, int vid)
+{
+ int port;
+ uint32_t reg;
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ /* For port based vlans the vlanid is the same as the port index. */
+ port = vid & ETHERSWITCH_VID_MASK;
+ reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port));
+ *ports = (reg >> AR8X16_PORT_VLAN_DEST_PORTS_SHIFT);
+ *ports &= AR8X16_VLAN_MEMBER;
+ return (0);
+}
+
+static int
+arswitch_set_port_vlan(struct arswitch_softc *sc, uint32_t ports, int vid)
+{
+ int err, port;
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ /* For port based vlans the vlanid is the same as the port index. */
+ port = vid & ETHERSWITCH_VID_MASK;
+ err = arswitch_modifyreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port),
+ AR8X16_VLAN_MEMBER << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT,
+ (ports & AR8X16_VLAN_MEMBER) << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT);
+ if (err)
+ return (err);
+ return (0);
+}
+
+/*
+ * Reset vlans to default state.
+ */
+void
+arswitch_reset_vlans(struct arswitch_softc *sc)
+{
+ uint32_t ports;
+ int i, j;
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ ARSWITCH_LOCK(sc);
+
+ /* Reset all vlan data. */
+ memset(sc->vid, 0, sizeof(sc->vid));
+
+ /* Disable the QinQ and egress filters for all ports. */
+ for (i = 0; i <= sc->numphys; i++) {
+ if (arswitch_modifyreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(i),
+ 0x3 << AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT |
+ AR8X16_PORT_CTRL_DOUBLE_TAG, 0)) {
+ ARSWITCH_UNLOCK(sc);
+ return;
+ }
+ }
+
+ if (arswitch_flush_dot1q_vlan(sc)) {
+ ARSWITCH_UNLOCK(sc);
+ return;
+ }
+
+ if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
+ /*
+ * Reset the port based vlan settings and turn on the
+ * ingress filter for all ports.
+ */
+ ports = 0;
+ for (i = 0; i <= sc->numphys; i++)
+ arswitch_modifyreg(sc->sc_dev,
+ AR8X16_REG_PORT_VLAN(i),
+ AR8X16_PORT_VLAN_MODE_MASK |
+ AR8X16_VLAN_MEMBER <<
+ AR8X16_PORT_VLAN_DEST_PORTS_SHIFT,
+ AR8X16_PORT_VLAN_MODE_SECURE <<
+ AR8X16_PORT_VLAN_MODE_SHIFT);
+
+ /*
+ * Setup vlan 1 as PVID for all switch ports. Add all ports
+ * as members of vlan 1.
+ */
+ sc->vid[0] = 1;
+ /* Set PVID for everyone. */
+ for (i = 0; i <= sc->numphys; i++)
+ arswitch_set_pvid(sc, i, sc->vid[0]);
+ ports = 0;
+ for (i = 0; i <= sc->numphys; i++)
+ ports |= (1 << i);
+ arswitch_set_dot1q_vlan(sc, ports, sc->vid[0]);
+ sc->vid[0] |= ETHERSWITCH_VID_VALID;
+ } else if (sc->vlan_mode == ETHERSWITCH_VLAN_PORT) {
+ /* Initialize the port based vlans. */
+ for (i = 0; i <= sc->numphys; i++) {
+ sc->vid[i] = i | ETHERSWITCH_VID_VALID;
+ ports = 0;
+ for (j = 0; j <= sc->numphys; j++)
+ ports |= (1 << j);
+ arswitch_modifyreg(sc->sc_dev,
+ AR8X16_REG_PORT_VLAN(i),
+ AR8X16_PORT_VLAN_MODE_MASK |
+ AR8X16_VLAN_MEMBER <<
+ AR8X16_PORT_VLAN_DEST_PORTS_SHIFT,
+ ports << AR8X16_PORT_VLAN_DEST_PORTS_SHIFT |
+ AR8X16_PORT_VLAN_MODE_SECURE <<
+ AR8X16_PORT_VLAN_MODE_PORT_ONLY);
+ }
+ } else {
+ /* Disable the ingress filter and get everyone on all vlans. */
+ for (i = 0; i <= sc->numphys; i++)
+ arswitch_modifyreg(sc->sc_dev,
+ AR8X16_REG_PORT_VLAN(i),
+ AR8X16_PORT_VLAN_MODE_MASK |
+ AR8X16_VLAN_MEMBER <<
+ AR8X16_PORT_VLAN_DEST_PORTS_SHIFT,
+ AR8X16_VLAN_MEMBER <<
+ AR8X16_PORT_VLAN_DEST_PORTS_SHIFT |
+ AR8X16_PORT_VLAN_MODE_SECURE <<
+ AR8X16_PORT_VLAN_MODE_PORT_ONLY);
+ }
+ ARSWITCH_UNLOCK(sc);
+}
+
+int
+arswitch_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
+{
+ struct arswitch_softc *sc;
+ int err;
+
+ sc = device_get_softc(dev);
+ ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ if (vg->es_vlangroup > sc->info.es_nvlangroups)
+ return (EINVAL);
+
+ /* Reset the members ports. */
+ vg->es_untagged_ports = 0;
+ vg->es_member_ports = 0;
+
+ /* Not supported. */
+ vg->es_fid = 0;
+
+ /* Vlan ID. */
+ ARSWITCH_LOCK(sc);
+ vg->es_vid = sc->vid[vg->es_vlangroup];
+ if ((vg->es_vid & ETHERSWITCH_VID_VALID) == 0) {
+ ARSWITCH_UNLOCK(sc);
+ return (0);
+ }
+
+ /* Member Ports. */
+ switch (sc->vlan_mode) {
+ case ETHERSWITCH_VLAN_DOT1Q:
+ err = arswitch_get_dot1q_vlan(sc, &vg->es_member_ports,
+ vg->es_vid);
+ break;
+ case ETHERSWITCH_VLAN_PORT:
+ err = arswitch_get_port_vlan(sc, &vg->es_member_ports,
+ vg->es_vid);
+ break;
+ default:
+ vg->es_member_ports = 0;
+ err = -1;
+ }
+ ARSWITCH_UNLOCK(sc);
+ vg->es_untagged_ports = vg->es_member_ports;
+ return (err);
+}
+
+int
+arswitch_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
+{
+ struct arswitch_softc *sc;
+ int err, vid;
+
+ sc = device_get_softc(dev);
+ ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ /* Check VLAN mode. */
+ if (sc->vlan_mode == 0)
+ return (EINVAL);
+
+ /*
+ * Check if we are changing the vlanid for an already used vtu entry.
+ * Then purge the entry first.
+ */
+ ARSWITCH_LOCK(sc);
+ vid = sc->vid[vg->es_vlangroup];
+ if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q &&
+ (vid & ETHERSWITCH_VID_VALID) != 0 &&
+ (vid & ETHERSWITCH_VID_MASK) !=
+ (vg->es_vid & ETHERSWITCH_VID_MASK)) {
+ err = arswitch_purge_dot1q_vlan(sc, vid);
+ if (err) {
+ ARSWITCH_UNLOCK(sc);
+ return (err);
+ }
+ }
+
+ /* Vlan ID. */
+ if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
+ sc->vid[vg->es_vlangroup] = vg->es_vid & ETHERSWITCH_VID_MASK;
+ /* Setting the vlanid to zero disables the vlangroup. */
+ if (sc->vid[vg->es_vlangroup] == 0) {
+ ARSWITCH_UNLOCK(sc);
+ return (0);
+ }
+ sc->vid[vg->es_vlangroup] |= ETHERSWITCH_VID_VALID;
+ vid = sc->vid[vg->es_vlangroup];
+ }
+
+ /* Member Ports. */
+ switch (sc->vlan_mode) {
+ case ETHERSWITCH_VLAN_DOT1Q:
+ err = arswitch_set_dot1q_vlan(sc, vg->es_member_ports, vid);
+ break;
+ case ETHERSWITCH_VLAN_PORT:
+ err = arswitch_set_port_vlan(sc, vg->es_member_ports, vid);
+ break;
+ default:
+ err = -1;
+ }
+ ARSWITCH_UNLOCK(sc);
+ return (err);
+}
+
+int
+arswitch_get_pvid(struct arswitch_softc *sc, int port, int *pvid)
+{
+ uint32_t reg;
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_VLAN(port));
+ *pvid = reg & 0xfff;
+ return (0);
+}
+
+int
+arswitch_set_pvid(struct arswitch_softc *sc, int port, int pvid)
+{
+
+ ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ return (arswitch_modifyreg(sc->sc_dev,
+ AR8X16_REG_PORT_VLAN(port), 0xfff, pvid));
+}
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,39 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitch_vlans.h 253572 2013-07-23 14:24:22Z loos $
+ */
+#ifndef __ARSWITCH_VLANS_H__
+#define __ARSWITCH_VLANS_H__
+
+void arswitch_reset_vlans(struct arswitch_softc *);
+int arswitch_getvgroup(device_t, etherswitch_vlangroup_t *);
+int arswitch_setvgroup(device_t, etherswitch_vlangroup_t *);
+int arswitch_get_pvid(struct arswitch_softc *, int, int *);
+int arswitch_set_pvid(struct arswitch_softc *, int, int);
+
+#endif /* __ARSWITCH_VLANS_H__ */
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitch_vlans.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitchreg.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitchreg.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitchreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,507 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011 Aleksandr Rybalko.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitchreg.h 261455 2014-02-04 03:36:42Z eadler $
+ */
+
+#ifndef __AR8X16_SWITCHREG_H__
+#define __AR8X16_SWITCHREG_H__
+
+/* XXX doesn't belong here; stolen shamelessly from ath_hal/ah_internal.h */
+/*
+ * Register manipulation macros that expect bit field defines
+ * to follow the convention that an _S suffix is appended for
+ * a shift count, while the field mask has no suffix.
+ */
+#define SM(_v, _f) (((_v) << _f##_S) & (_f))
+#define MS(_v, _f) (((_v) & (_f)) >> _f##_S)
+
+/* Atheros specific MII registers */
+#define MII_ATH_DBG_ADDR 0x1d
+#define MII_ATH_DBG_DATA 0x1e
+
+#define AR8X16_REG_MASK_CTRL 0x0000
+#define AR8X16_MASK_CTRL_REV_MASK 0x000000ff
+#define AR8X16_MASK_CTRL_VER_MASK 0x0000ff00
+#define AR8X16_MASK_CTRL_VER_SHIFT 8
+#define AR8X16_MASK_CTRL_SOFT_RESET (1U << 31)
+
+#define AR8X16_REG_MODE 0x0008
+/* DIR-615 E4 U-Boot */
+#define AR8X16_MODE_DIR_615_UBOOT 0x8d1003e0
+/* From Ubiquiti RSPRO */
+#define AR8X16_MODE_RGMII_PORT4_ISO 0x81461bea
+#define AR8X16_MODE_RGMII_PORT4_SWITCH 0x01261be2
+/* AVM Fritz!Box 7390 */
+#define AR8X16_MODE_GMII 0x010e5b71
+/* from avm_cpmac/linux_ar_reg.h */
+#define AR8X16_MODE_RESERVED 0x000e1b20
+#define AR8X16_MODE_MAC0_GMII_EN (1u << 0)
+#define AR8X16_MODE_MAC0_RGMII_EN (1u << 1)
+#define AR8X16_MODE_PHY4_GMII_EN (1u << 2)
+#define AR8X16_MODE_PHY4_RGMII_EN (1u << 3)
+#define AR8X16_MODE_MAC0_MAC_MODE (1u << 4)
+#define AR8X16_MODE_RGMII_RXCLK_DELAY_EN (1u << 6)
+#define AR8X16_MODE_RGMII_TXCLK_DELAY_EN (1u << 7)
+#define AR8X16_MODE_MAC5_MAC_MODE (1u << 14)
+#define AR8X16_MODE_MAC5_PHY_MODE (1u << 15)
+#define AR8X16_MODE_TXDELAY_S0 (1u << 21)
+#define AR8X16_MODE_TXDELAY_S1 (1u << 22)
+#define AR8X16_MODE_RXDELAY_S0 (1u << 23)
+#define AR8X16_MODE_LED_OPEN_EN (1u << 24)
+#define AR8X16_MODE_SPI_EN (1u << 25)
+#define AR8X16_MODE_RXDELAY_S1 (1u << 26)
+#define AR8X16_MODE_POWER_ON_SEL (1u << 31)
+
+#define AR8X16_REG_ISR 0x0010
+#define AR8X16_REG_IMR 0x0014
+
+#define AR8X16_REG_SW_MAC_ADDR0 0x0020
+#define AR8X16_REG_SW_MAC_ADDR1 0x0024
+
+#define AR8X16_REG_FLOOD_MASK 0x002c
+#define AR8X16_FLOOD_MASK_BCAST_TO_CPU (1 << 26)
+
+#define AR8X16_REG_GLOBAL_CTRL 0x0030
+#define AR8216_GLOBAL_CTRL_MTU_MASK 0x00000fff
+#define AR8216_GLOBAL_CTRL_MTU_MASK_S 0
+#define AR8316_GLOBAL_CTRL_MTU_MASK 0x00007fff
+#define AR8316_GLOBAL_CTRL_MTU_MASK_S 0
+#define AR8236_GLOBAL_CTRL_MTU_MASK 0x00007fff
+#define AR8236_GLOBAL_CTRL_MTU_MASK_S 0
+#define AR7240_GLOBAL_CTRL_MTU_MASK 0x00003fff
+#define AR7240_GLOBAL_CTRL_MTU_MASK_S 0
+
+#define AR8X16_REG_VLAN_CTRL 0x0040
+#define AR8X16_VLAN_OP 0x00000007
+#define AR8X16_VLAN_OP_NOOP 0x0
+#define AR8X16_VLAN_OP_FLUSH 0x1
+#define AR8X16_VLAN_OP_LOAD 0x2
+#define AR8X16_VLAN_OP_PURGE 0x3
+#define AR8X16_VLAN_OP_REMOVE_PORT 0x4
+#define AR8X16_VLAN_OP_GET_NEXT 0x5
+#define AR8X16_VLAN_OP_GET 0x6
+#define AR8X16_VLAN_ACTIVE (1 << 3)
+#define AR8X16_VLAN_FULL (1 << 4)
+#define AR8X16_VLAN_PORT 0x00000f00
+#define AR8X16_VLAN_PORT_SHIFT 8
+#define AR8X16_VLAN_VID 0x0fff0000
+#define AR8X16_VLAN_VID_SHIFT 16
+#define AR8X16_VLAN_PRIO 0x70000000
+#define AR8X16_VLAN_PRIO_SHIFT 28
+#define AR8X16_VLAN_PRIO_EN (1U << 31)
+
+#define AR8X16_REG_VLAN_DATA 0x0044
+#define AR8X16_VLAN_MEMBER 0x0000003f
+#define AR8X16_VLAN_VALID (1 << 11)
+
+#define AR8X16_REG_ARL_CTRL0 0x0050
+#define AR8X16_REG_ARL_CTRL1 0x0054
+#define AR8X16_REG_ARL_CTRL2 0x0058
+
+#define AR8X16_REG_AT_CTRL 0x005c
+#define AR8X16_AT_CTRL_ARP_EN (1 << 20)
+
+#define AR8X16_REG_IP_PRIORITY_1 0x0060
+#define AR8X16_REG_IP_PRIORITY_2 0x0064
+#define AR8X16_REG_IP_PRIORITY_3 0x0068
+#define AR8X16_REG_IP_PRIORITY_4 0x006C
+
+#define AR8X16_REG_TAG_PRIO 0x0070
+
+#define AR8X16_REG_SERVICE_TAG 0x0074
+#define AR8X16_SERVICE_TAG_MASK 0x0000ffff
+
+#define AR8X16_REG_CPU_PORT 0x0078
+#define AR8X16_MIRROR_PORT_SHIFT 4
+#define AR8X16_MIRROR_PORT_MASK (0xf << AR8X16_MIRROR_PORT_SHIFT)
+#define AR8X16_CPU_MIRROR_PORT(_p) ((_p) << AR8X16_MIRROR_PORT_SHIFT)
+#define AR8X16_CPU_MIRROR_DIS AR8X16_CPU_MIRROR_PORT(0xf)
+#define AR8X16_CPU_PORT_EN (1 << 8)
+
+#define AR8X16_REG_MIB_FUNC0 0x0080
+#define AR8X16_MIB_TIMER_MASK 0x0000ffff
+#define AR8X16_MIB_AT_HALF_EN (1 << 16)
+#define AR8X16_MIB_BUSY (1 << 17)
+#define AR8X16_MIB_FUNC_SHIFT 24
+#define AR8X16_MIB_FUNC_NO_OP 0x0
+#define AR8X16_MIB_FUNC_FLUSH 0x1
+#define AR8X16_MIB_FUNC_CAPTURE 0x3
+#define AR8X16_MIB_FUNC_XXX (1 << 30) /* 0x40000000 */
+
+#define AR934X_MIB_ENABLE (1 << 30)
+
+#define AR8X16_REG_MDIO_HIGH_ADDR 0x0094
+
+#define AR8X16_REG_MDIO_CTRL 0x0098
+#define AR8X16_MDIO_CTRL_DATA_MASK 0x0000ffff
+#define AR8X16_MDIO_CTRL_REG_ADDR_SHIFT 16
+#define AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT 21
+#define AR8X16_MDIO_CTRL_CMD_WRITE 0
+#define AR8X16_MDIO_CTRL_CMD_READ (1 << 27)
+#define AR8X16_MDIO_CTRL_MASTER_EN (1 << 30)
+#define AR8X16_MDIO_CTRL_BUSY (1U << 31)
+
+#define AR8X16_REG_PORT_BASE(_p) (0x0100 + (_p) * 0x0100)
+
+#define AR8X16_REG_PORT_STS(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x0000)
+#define AR8X16_PORT_STS_SPEED_MASK 0x00000003
+#define AR8X16_PORT_STS_SPEED_10 0
+#define AR8X16_PORT_STS_SPEED_100 1
+#define AR8X16_PORT_STS_SPEED_1000 2
+#define AR8X16_PORT_STS_TXMAC (1 << 2)
+#define AR8X16_PORT_STS_RXMAC (1 << 3)
+#define AR8X16_PORT_STS_TXFLOW (1 << 4)
+#define AR8X16_PORT_STS_RXFLOW (1 << 5)
+#define AR8X16_PORT_STS_DUPLEX (1 << 6)
+#define AR8X16_PORT_STS_LINK_UP (1 << 8)
+#define AR8X16_PORT_STS_LINK_AUTO (1 << 9)
+#define AR8X16_PORT_STS_LINK_PAUSE (1 << 10)
+
+#define AR8X16_REG_PORT_CTRL(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x0004)
+#define AR8X16_PORT_CTRL_STATE_MASK 0x00000007
+#define AR8X16_PORT_CTRL_STATE_DISABLED 0
+#define AR8X16_PORT_CTRL_STATE_BLOCK 1
+#define AR8X16_PORT_CTRL_STATE_LISTEN 2
+#define AR8X16_PORT_CTRL_STATE_LEARN 3
+#define AR8X16_PORT_CTRL_STATE_FORWARD 4
+#define AR8X16_PORT_CTRL_LEARN_LOCK (1 << 7)
+#define AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT 8
+#define AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_KEEP 0
+#define AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP 1
+#define AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD 2
+#define AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_DOUBLE_TAG 3
+#define AR8X16_PORT_CTRL_IGMP_SNOOP (1 << 10)
+#define AR8X16_PORT_CTRL_HEADER (1 << 11)
+#define AR8X16_PORT_CTRL_MAC_LOOP (1 << 12)
+#define AR8X16_PORT_CTRL_SINGLE_VLAN (1 << 13)
+#define AR8X16_PORT_CTRL_LEARN (1 << 14)
+#define AR8X16_PORT_CTRL_DOUBLE_TAG (1 << 15)
+#define AR8X16_PORT_CTRL_MIRROR_TX (1 << 16)
+#define AR8X16_PORT_CTRL_MIRROR_RX (1 << 17)
+
+#define AR8X16_REG_PORT_VLAN(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x0008)
+
+#define AR8X16_PORT_VLAN_DEFAULT_ID_SHIFT 0
+#define AR8X16_PORT_VLAN_DEST_PORTS_SHIFT 16
+#define AR8X16_PORT_VLAN_MODE_MASK 0xc0000000
+#define AR8X16_PORT_VLAN_MODE_SHIFT 30
+#define AR8X16_PORT_VLAN_MODE_PORT_ONLY 0
+#define AR8X16_PORT_VLAN_MODE_PORT_FALLBACK 1
+#define AR8X16_PORT_VLAN_MODE_VLAN_ONLY 2
+#define AR8X16_PORT_VLAN_MODE_SECURE 3
+
+#define AR8X16_REG_PORT_RATE_LIM(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x000c)
+#define AR8X16_PORT_RATE_LIM_128KB 0
+#define AR8X16_PORT_RATE_LIM_256KB 1
+#define AR8X16_PORT_RATE_LIM_512KB 2
+#define AR8X16_PORT_RATE_LIM_1MB 3
+#define AR8X16_PORT_RATE_LIM_2MB 4
+#define AR8X16_PORT_RATE_LIM_4MB 5
+#define AR8X16_PORT_RATE_LIM_8MB 6
+#define AR8X16_PORT_RATE_LIM_16MB 7
+#define AR8X16_PORT_RATE_LIM_32MB 8
+#define AR8X16_PORT_RATE_LIM_64MB 9
+#define AR8X16_PORT_RATE_LIM_IN_EN (1 << 24)
+#define AR8X16_PORT_RATE_LIM_OUT_EN (1 << 23)
+#define AR8X16_PORT_RATE_LIM_IN_MASK 0x000f0000
+#define AR8X16_PORT_RATE_LIM_IN_SHIFT 16
+#define AR8X16_PORT_RATE_LIM_OUT_MASK 0x0000000f
+#define AR8X16_PORT_RATE_LIM_OUT_SHIFT 0
+
+#define AR8X16_REG_PORT_PRIORITY(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x0010)
+
+#define AR8X16_REG_STATS_BASE(_p) (0x20000 + (_p) * 0x100)
+
+#define AR8X16_STATS_RXBROAD 0x0000
+#define AR8X16_STATS_RXPAUSE 0x0004
+#define AR8X16_STATS_RXMULTI 0x0008
+#define AR8X16_STATS_RXFCSERR 0x000c
+#define AR8X16_STATS_RXALIGNERR 0x0010
+#define AR8X16_STATS_RXRUNT 0x0014
+#define AR8X16_STATS_RXFRAGMENT 0x0018
+#define AR8X16_STATS_RX64BYTE 0x001c
+#define AR8X16_STATS_RX128BYTE 0x0020
+#define AR8X16_STATS_RX256BYTE 0x0024
+#define AR8X16_STATS_RX512BYTE 0x0028
+#define AR8X16_STATS_RX1024BYTE 0x002c
+#define AR8X16_STATS_RX1518BYTE 0x0030
+#define AR8X16_STATS_RXMAXBYTE 0x0034
+#define AR8X16_STATS_RXTOOLONG 0x0038
+#define AR8X16_STATS_RXGOODBYTE 0x003c
+#define AR8X16_STATS_RXBADBYTE 0x0044
+#define AR8X16_STATS_RXOVERFLOW 0x004c
+#define AR8X16_STATS_FILTERED 0x0050
+#define AR8X16_STATS_TXBROAD 0x0054
+#define AR8X16_STATS_TXPAUSE 0x0058
+#define AR8X16_STATS_TXMULTI 0x005c
+#define AR8X16_STATS_TXUNDERRUN 0x0060
+#define AR8X16_STATS_TX64BYTE 0x0064
+#define AR8X16_STATS_TX128BYTE 0x0068
+#define AR8X16_STATS_TX256BYTE 0x006c
+#define AR8X16_STATS_TX512BYTE 0x0070
+#define AR8X16_STATS_TX1024BYTE 0x0074
+#define AR8X16_STATS_TX1518BYTE 0x0078
+#define AR8X16_STATS_TXMAXBYTE 0x007c
+#define AR8X16_STATS_TXOVERSIZE 0x0080
+#define AR8X16_STATS_TXBYTE 0x0084
+#define AR8X16_STATS_TXCOLLISION 0x008c
+#define AR8X16_STATS_TXABORTCOL 0x0090
+#define AR8X16_STATS_TXMULTICOL 0x0094
+#define AR8X16_STATS_TXSINGLECOL 0x0098
+#define AR8X16_STATS_TXEXCDEFER 0x009c
+#define AR8X16_STATS_TXDEFER 0x00a0
+#define AR8X16_STATS_TXLATECOL 0x00a4
+
+#define AR8X16_PORT_CPU 0
+#define AR8X16_NUM_PORTS 6
+#define AR8X16_NUM_PHYS 5
+#define AR8X16_MAGIC 0xc000050e
+
+#define AR8X16_PHY_ID1 0x004d
+#define AR8X16_PHY_ID2 0xd041
+
+#define AR8X16_PORT_MASK(_port) (1 << (_port))
+#define AR8X16_PORT_MASK_ALL ((1<<AR8X16_NUM_PORTS)-1)
+#define AR8X16_PORT_MASK_BUT(_port) (AR8X16_PORT_MASK_ALL & ~(1 << (_port)))
+
+#define AR8X16_MAX_VLANS 16
+
+/*
+ * AR9340 switch specific definitions.
+ */
+
+/* XXX Linux define compatibility stuff */
+#define BITM(_count) ((1 << _count) - 1)
+#define BITS(_shift, _count) (BITM(_count) << _shift)
+
+#define AR934X_REG_OPER_MODE0 0x04
+#define AR934X_OPER_MODE0_MAC_GMII_EN (1 << 6)
+#define AR934X_OPER_MODE0_PHY_MII_EN (1 << 10)
+
+#define AR934X_REG_OPER_MODE1 0x08
+#define AR934X_REG_OPER_MODE1_PHY4_MII_EN (1 << 28)
+
+#define AR934X_REG_FLOOD_MASK 0x2c
+#define AR934X_FLOOD_MASK_MC_DP(_p) (1 << (16 + (_p)))
+#define AR934X_FLOOD_MASK_BC_DP(_p) (1 << (25 + (_p)))
+
+#define AR934X_REG_QM_CTRL 0x3c
+#define AR934X_QM_CTRL_ARP_EN (1 << 15)
+
+#define AR934X_REG_AT_CTRL 0x5c
+#define AR934X_AT_CTRL_AGE_TIME BITS(0, 15)
+#define AR934X_AT_CTRL_AGE_EN (1 << 17)
+#define AR934X_AT_CTRL_LEARN_CHANGE (1 << 18)
+
+#define AR934X_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100)
+
+#define AR934X_REG_PORT_VLAN1(_port) (AR934X_REG_PORT_BASE((_port)) + 0x08)
+#define AR934X_PORT_VLAN1_DEFAULT_SVID_S 0
+#define AR934X_PORT_VLAN1_FORCE_DEFAULT_VID_EN (1 << 12)
+#define AR934X_PORT_VLAN1_PORT_TLS_MODE (1 << 13)
+#define AR934X_PORT_VLAN1_PORT_VLAN_PROP_EN (1 << 14)
+#define AR934X_PORT_VLAN1_PORT_CLONE_EN (1 << 15)
+#define AR934X_PORT_VLAN1_DEFAULT_CVID_S 16
+#define AR934X_PORT_VLAN1_FORCE_PORT_VLAN_EN (1 << 28)
+#define AR934X_PORT_VLAN1_ING_PORT_PRI_S 29
+
+#define AR934X_REG_PORT_VLAN2(_port) (AR934X_REG_PORT_BASE((_port)) + 0x0c)
+#define AR934X_PORT_VLAN2_PORT_VID_MEM_S 16
+#define AR934X_PORT_VLAN2_8021Q_MODE_S 30
+#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_ONLY 0
+#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_FALLBACK 1
+#define AR934X_PORT_VLAN2_8021Q_MODE_VLAN_ONLY 2
+#define AR934X_PORT_VLAN2_8021Q_MODE_SECURE 3
+
+/*
+ * AR8327 specific registers
+ */
+#define AR8327_NUM_PORTS 7
+#define AR8327_NUM_PHYS 5
+#define AR8327_PORTS_ALL 0x7f
+
+#define AR8327_REG_MASK 0x000
+
+#define AR8327_REG_PAD0_MODE 0x004
+#define AR8327_REG_PAD5_MODE 0x008
+#define AR8327_REG_PAD6_MODE 0x00c
+
+#define AR8327_PAD_MAC_MII_RXCLK_SEL (1 << 0)
+#define AR8327_PAD_MAC_MII_TXCLK_SEL (1 << 1)
+#define AR8327_PAD_MAC_MII_EN (1 << 2)
+#define AR8327_PAD_MAC_GMII_RXCLK_SEL (1 << 4)
+#define AR8327_PAD_MAC_GMII_TXCLK_SEL (1 << 5)
+#define AR8327_PAD_MAC_GMII_EN (1 << 6)
+#define AR8327_PAD_SGMII_EN (1 << 7)
+#define AR8327_PAD_PHY_MII_RXCLK_SEL (1 << 8)
+#define AR8327_PAD_PHY_MII_TXCLK_SEL (1 << 9)
+#define AR8327_PAD_PHY_MII_EN (1 << 10)
+#define AR8327_PAD_PHY_GMII_PIPE_RXCLK_SEL (1 << 11)
+#define AR8327_PAD_PHY_GMII_RXCLK_SEL (1 << 12)
+#define AR8327_PAD_PHY_GMII_TXCLK_SEL (1 << 13)
+#define AR8327_PAD_PHY_GMII_EN (1 << 14)
+#define AR8327_PAD_PHYX_GMII_EN (1 << 16)
+#define AR8327_PAD_PHYX_RGMII_EN (1 << 17)
+#define AR8327_PAD_PHYX_MII_EN (1 << 18)
+#define AR8327_PAD_SGMII_DELAY_EN (1 << 19)
+#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL BITS(20, 2)
+#define AR8327_PAD_RGMII_RXCLK_DELAY_SEL_S 20
+#define AR8327_PAD_RGMII_TXCLK_DELAY_SEL BITS(22, 2)
+#define AR8327_PAD_RGMII_TXCLK_DELAY_SEL_S 22
+#define AR8327_PAD_RGMII_RXCLK_DELAY_EN (1 << 24)
+#define AR8327_PAD_RGMII_TXCLK_DELAY_EN (1 << 25)
+#define AR8327_PAD_RGMII_EN (1 << 26)
+
+#define AR8327_REG_POWER_ON_STRIP 0x010
+#define AR8327_POWER_ON_STRIP_POWER_ON_SEL (1U << 31)
+#define AR8327_POWER_ON_STRIP_LED_OPEN_EN (1 << 24)
+#define AR8327_POWER_ON_STRIP_SERDES_AEN (1 << 7)
+
+#define AR8327_REG_INT_STATUS0 0x020
+#define AR8327_INT0_VT_DONE (1 << 20)
+
+#define AR8327_REG_INT_STATUS1 0x024
+#define AR8327_REG_INT_MASK0 0x028
+#define AR8327_REG_INT_MASK1 0x02c
+
+#define AR8327_REG_MODULE_EN 0x030
+#define AR8327_MODULE_EN_MIB (1 << 0)
+
+#define AR8327_REG_MIB_FUNC 0x034
+#define AR8327_MIB_CPU_KEEP (1 << 20)
+
+#define AR8327_REG_SERVICE_TAG 0x048
+#define AR8327_REG_LED_CTRL0 0x050
+#define AR8327_REG_LED_CTRL1 0x054
+#define AR8327_REG_LED_CTRL2 0x058
+#define AR8327_REG_LED_CTRL3 0x05c
+#define AR8327_REG_MAC_ADDR0 0x060
+#define AR8327_REG_MAC_ADDR1 0x064
+
+#define AR8327_REG_MAX_FRAME_SIZE 0x078
+#define AR8327_MAX_FRAME_SIZE_MTU BITS(0, 14)
+
+#define AR8327_REG_PORT_STATUS(_i) (0x07c + (_i) * 4)
+
+#define AR8327_REG_HEADER_CTRL 0x098
+#define AR8327_REG_PORT_HEADER(_i) (0x09c + (_i) * 4)
+
+#define AR8327_REG_SGMII_CTRL 0x0e0
+#define AR8327_SGMII_CTRL_EN_PLL (1 << 1)
+#define AR8327_SGMII_CTRL_EN_RX (1 << 2)
+#define AR8327_SGMII_CTRL_EN_TX (1 << 3)
+
+#define AR8327_REG_PORT_VLAN0(_i) (0x420 + (_i) * 0x8)
+#define AR8327_PORT_VLAN0_DEF_SVID BITS(0, 12)
+#define AR8327_PORT_VLAN0_DEF_SVID_S 0
+#define AR8327_PORT_VLAN0_DEF_CVID BITS(16, 12)
+#define AR8327_PORT_VLAN0_DEF_CVID_S 16
+
+#define AR8327_REG_PORT_VLAN1(_i) (0x424 + (_i) * 0x8)
+#define AR8327_PORT_VLAN1_PORT_VLAN_PROP (1 << 6)
+#define AR8327_PORT_VLAN1_OUT_MODE BITS(12, 2)
+#define AR8327_PORT_VLAN1_OUT_MODE_S 12
+#define AR8327_PORT_VLAN1_OUT_MODE_UNMOD 0
+#define AR8327_PORT_VLAN1_OUT_MODE_UNTAG 1
+#define AR8327_PORT_VLAN1_OUT_MODE_TAG 2
+#define AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH 3
+
+#define AR8327_REG_ATU_DATA0 0x600
+#define AR8327_REG_ATU_DATA1 0x604
+#define AR8327_REG_ATU_DATA2 0x608
+
+#define AR8327_REG_ATU_FUNC 0x60c
+#define AR8327_ATU_FUNC_OP BITS(0, 4)
+#define AR8327_ATU_FUNC_OP_NOOP 0x0
+#define AR8327_ATU_FUNC_OP_FLUSH 0x1
+#define AR8327_ATU_FUNC_OP_LOAD 0x2
+#define AR8327_ATU_FUNC_OP_PURGE 0x3
+#define AR8327_ATU_FUNC_OP_FLUSH_LOCKED 0x4
+#define AR8327_ATU_FUNC_OP_FLUSH_UNICAST 0x5
+#define AR8327_ATU_FUNC_OP_GET_NEXT 0x6
+#define AR8327_ATU_FUNC_OP_SEARCH_MAC 0x7
+#define AR8327_ATU_FUNC_OP_CHANGE_TRUNK 0x8
+#define AR8327_ATU_FUNC_BUSY (1U << 31)
+
+#define AR8327_REG_VTU_FUNC0 0x0610
+#define AR8327_VTU_FUNC0_EG_MODE BITS(4, 14)
+#define AR8327_VTU_FUNC0_EG_MODE_S(_i) (4 + (_i) * 2)
+#define AR8327_VTU_FUNC0_EG_MODE_KEEP 0
+#define AR8327_VTU_FUNC0_EG_MODE_UNTAG 1
+#define AR8327_VTU_FUNC0_EG_MODE_TAG 2
+#define AR8327_VTU_FUNC0_EG_MODE_NOT 3
+#define AR8327_VTU_FUNC0_IVL (1 << 19)
+#define AR8327_VTU_FUNC0_VALID (1 << 20)
+
+#define AR8327_REG_VTU_FUNC1 0x0614
+#define AR8327_VTU_FUNC1_OP BITS(0, 3)
+#define AR8327_VTU_FUNC1_OP_NOOP 0
+#define AR8327_VTU_FUNC1_OP_FLUSH 1
+#define AR8327_VTU_FUNC1_OP_LOAD 2
+#define AR8327_VTU_FUNC1_OP_PURGE 3
+#define AR8327_VTU_FUNC1_OP_REMOVE_PORT 4
+#define AR8327_VTU_FUNC1_OP_GET_NEXT 5
+#define AR8327_VTU_FUNC1_OP_GET_ONE 6
+#define AR8327_VTU_FUNC1_FULL (1 << 4)
+#define AR8327_VTU_FUNC1_PORT (1 << 8, 4)
+#define AR8327_VTU_FUNC1_PORT_S 8
+#define AR8327_VTU_FUNC1_VID (1 << 16, 12)
+#define AR8327_VTU_FUNC1_VID_S 16
+#define AR8327_VTU_FUNC1_BUSY (1U << 31)
+
+#define AR8327_REG_FWD_CTRL0 0x620
+#define AR8327_FWD_CTRL0_CPU_PORT_EN (1 << 10)
+#define AR8327_FWD_CTRL0_MIRROR_PORT BITS(4, 4)
+#define AR8327_FWD_CTRL0_MIRROR_PORT_S 4
+
+#define AR8327_REG_FWD_CTRL1 0x624
+#define AR8327_FWD_CTRL1_UC_FLOOD BITS(0, 7)
+#define AR8327_FWD_CTRL1_UC_FLOOD_S 0
+#define AR8327_FWD_CTRL1_MC_FLOOD BITS(8, 7)
+#define AR8327_FWD_CTRL1_MC_FLOOD_S 8
+#define AR8327_FWD_CTRL1_BC_FLOOD BITS(16, 7)
+#define AR8327_FWD_CTRL1_BC_FLOOD_S 16
+#define AR8327_FWD_CTRL1_IGMP BITS(24, 7)
+#define AR8327_FWD_CTRL1_IGMP_S 24
+
+#define AR8327_REG_PORT_LOOKUP(_i) (0x660 + (_i) * 0xc)
+#define AR8327_PORT_LOOKUP_MEMBER BITS(0, 7)
+#define AR8327_PORT_LOOKUP_IN_MODE BITS(8, 2)
+#define AR8327_PORT_LOOKUP_IN_MODE_S 8
+#define AR8327_PORT_LOOKUP_STATE BITS(16, 3)
+#define AR8327_PORT_LOOKUP_STATE_S 16
+#define AR8327_PORT_LOOKUP_LEARN (1 << 20)
+#define AR8327_PORT_LOOKUP_ING_MIRROR_EN (1 << 25)
+
+#define AR8327_REG_PORT_PRIO(_i) (0x664 + (_i) * 0xc)
+
+#define AR8327_REG_PORT_HOL_CTRL1(_i) (0x974 + (_i) * 0x8)
+#define AR8327_PORT_HOL_CTRL1_EG_MIRROR_EN (1 << 16)
+
+#define AR8327_REG_PORT_STATS_BASE(_i) (0x1000 + (_i) * 0x100)
+
+#endif /* __AR8X16_SWITCHREG_H__ */
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitchreg.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/arswitch/arswitchvar.h
===================================================================
--- trunk/sys/dev/etherswitch/arswitch/arswitchvar.h (rev 0)
+++ trunk/sys/dev/etherswitch/arswitch/arswitchvar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,95 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/arswitch/arswitchvar.h 253572 2013-07-23 14:24:22Z loos $
+ */
+#ifndef __ARSWITCHVAR_H__
+#define __ARSWITCHVAR_H__
+
+typedef enum {
+ AR8X16_SWITCH_NONE,
+ AR8X16_SWITCH_AR7240,
+ AR8X16_SWITCH_AR8216,
+ AR8X16_SWITCH_AR8226,
+ AR8X16_SWITCH_AR8316,
+} ar8x16_switch_type;
+
+/*
+ * XXX TODO: start using this where required
+ */
+#define AR8X16_IS_SWITCH(_sc, _type) \
+ (!!((_sc)->sc_switchtype == AR8X16_SWITCH_ ## _type))
+
+struct arswitch_softc {
+ struct mtx sc_mtx; /* serialize access to softc */
+ device_t sc_dev;
+ int phy4cpu; /* PHY4 is connected to the CPU */
+ int numphys; /* PHYs we manage */
+ int is_rgmii; /* PHY mode is RGMII (XXX which PHY?) */
+ int is_gmii; /* PHY mode is GMII (XXX which PHY?) */
+ int page;
+ ar8x16_switch_type sc_switchtype;
+ char *ifname[AR8X16_NUM_PHYS];
+ device_t miibus[AR8X16_NUM_PHYS];
+ struct ifnet *ifp[AR8X16_NUM_PHYS];
+ struct callout callout_tick;
+ etherswitch_info_t info;
+
+ /* VLANs support */
+ int vid[AR8X16_MAX_VLANS];
+ uint32_t vlan_mode;
+
+ struct {
+ int (* arswitch_hw_setup) (struct arswitch_softc *);
+ int (* arswitch_hw_global_setup) (struct arswitch_softc *);
+ } hal;
+};
+
+#define ARSWITCH_LOCK(_sc) \
+ mtx_lock(&(_sc)->sc_mtx)
+#define ARSWITCH_UNLOCK(_sc) \
+ mtx_unlock(&(_sc)->sc_mtx)
+#define ARSWITCH_LOCK_ASSERT(_sc, _what) \
+ mtx_assert(&(_sc)->sc_mtx, (_what))
+#define ARSWITCH_TRYLOCK(_sc) \
+ mtx_trylock(&(_sc)->sc_mtx)
+
+#if defined(DEBUG)
+#define DPRINTF(dev, args...) device_printf(dev, args)
+#define DEVERR(dev, err, fmt, args...) do { \
+ if (err != 0) device_printf(dev, fmt, err, args); \
+ } while (0)
+#define DEBUG_INCRVAR(var) do { \
+ var++; \
+ } while (0)
+#else
+#define DPRINTF(dev, args...)
+#define DEVERR(dev, err, fmt, args...)
+#define DEBUG_INCRVAR(var)
+#endif
+
+#endif /* __ARSWITCHVAR_H__ */
+
Property changes on: trunk/sys/dev/etherswitch/arswitch/arswitchvar.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/etherswitch.c
===================================================================
--- trunk/sys/dev/etherswitch/etherswitch.c (rev 0)
+++ trunk/sys/dev/etherswitch/etherswitch.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,273 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/etherswitch.c 250381 2013-05-08 20:46:54Z adrian $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/conf.h>
+#include <sys/fcntl.h>
+#include <sys/lock.h>
+#include <sys/kernel.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sx.h>
+#include <sys/systm.h>
+#include <sys/uio.h>
+
+#include <net/if.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include "etherswitch_if.h"
+
+#define BUFSIZE 1024
+
+struct etherswitch_softc {
+ device_t sc_dev;
+ int sc_count;
+
+ struct cdev *sc_devnode;
+ struct sx sc_lock;
+};
+
+#define SWITCH_LOCK(sc) sx_xlock(&(sc)->sc_lock)
+#define SWITCH_UNLOCK(sc) sx_xunlock(&(sc)->sc_lock)
+
+static int etherswitch_probe(device_t);
+static int etherswitch_attach(device_t);
+static int etherswitch_detach(device_t);
+static void etherswitch_identify(driver_t *driver, device_t parent);
+
+devclass_t etherswitch_devclass;
+
+static device_method_t etherswitch_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_identify, etherswitch_identify),
+ DEVMETHOD(device_probe, etherswitch_probe),
+ DEVMETHOD(device_attach, etherswitch_attach),
+ DEVMETHOD(device_detach, etherswitch_detach),
+
+ { 0, 0 }
+};
+
+driver_t etherswitch_driver = {
+ "etherswitch",
+ etherswitch_methods,
+ sizeof(struct etherswitch_softc),
+};
+
+static d_open_t etherswitchopen;
+static d_close_t etherswitchclose;
+static d_write_t etherswitchwrite;
+static d_read_t etherswitchread;
+static d_ioctl_t etherswitchioctl;
+
+static struct cdevsw etherswitch_cdevsw = {
+ .d_version = D_VERSION,
+ .d_flags = D_TRACKCLOSE,
+ .d_open = etherswitchopen,
+ .d_close = etherswitchclose,
+ .d_read = etherswitchread,
+ .d_write = etherswitchwrite,
+ .d_ioctl = etherswitchioctl,
+ .d_name = "etherswitch",
+};
+
+static void
+etherswitch_identify(driver_t *driver, device_t parent)
+{
+ if (device_find_child(parent, "etherswitch", -1) == NULL)
+ BUS_ADD_CHILD(parent, 0, "etherswitch", -1);
+}
+
+static int
+etherswitch_probe(device_t dev)
+{
+ device_set_desc(dev, "Switch controller");
+
+ return (0);
+}
+
+static int
+etherswitch_attach(device_t dev)
+{
+ struct etherswitch_softc *sc = (struct etherswitch_softc *)device_get_softc(dev);
+
+ sc->sc_dev = dev;
+ sx_init(&sc->sc_lock, "etherswitch");
+ sc->sc_devnode = make_dev(ðerswitch_cdevsw, device_get_unit(dev),
+ UID_ROOT, GID_WHEEL,
+ 0600, "etherswitch%d", device_get_unit(dev));
+ if (sc->sc_devnode == NULL) {
+ device_printf(dev, "failed to create character device\n");
+ sx_destroy(&sc->sc_lock);
+ return (ENXIO);
+ }
+ sc->sc_devnode->si_drv1 = sc;
+
+ return (0);
+}
+
+static int
+etherswitch_detach(device_t dev)
+{
+ struct etherswitch_softc *sc = (struct etherswitch_softc *)device_get_softc(dev);
+
+ if (sc->sc_devnode)
+ destroy_dev(sc->sc_devnode);
+ sx_destroy(&sc->sc_lock);
+
+ return (0);
+}
+
+static int
+etherswitchopen(struct cdev *dev, int flags, int fmt, struct thread *td)
+{
+ struct etherswitch_softc *sc = dev->si_drv1;
+
+ SWITCH_LOCK(sc);
+ if (sc->sc_count > 0) {
+ SWITCH_UNLOCK(sc);
+ return (EBUSY);
+ }
+
+ sc->sc_count++;
+ SWITCH_UNLOCK(sc);
+
+ return (0);
+}
+
+static int
+etherswitchclose(struct cdev *dev, int flags, int fmt, struct thread *td)
+{
+ struct etherswitch_softc *sc = dev->si_drv1;
+
+ SWITCH_LOCK(sc);
+ if (sc->sc_count == 0) {
+ SWITCH_UNLOCK(sc);
+ return (EINVAL);
+ }
+
+ sc->sc_count--;
+
+ if (sc->sc_count < 0)
+ panic("%s: etherswitch_count < 0!", __func__);
+ SWITCH_UNLOCK(sc);
+
+ return (0);
+}
+
+static int
+etherswitchwrite(struct cdev *dev, struct uio * uio, int ioflag)
+{
+ return (EINVAL);
+}
+
+static int
+etherswitchread(struct cdev *dev, struct uio * uio, int ioflag)
+{
+ return (EINVAL);
+}
+
+static int
+etherswitchioctl(struct cdev *cdev, u_long cmd, caddr_t data, int flags, struct thread *td)
+{
+ struct etherswitch_softc *sc = cdev->si_drv1;
+ device_t dev = sc->sc_dev;
+ device_t etherswitch = device_get_parent(dev);
+ etherswitch_conf_t conf;
+ etherswitch_info_t *info;
+ etherswitch_reg_t *reg;
+ etherswitch_phyreg_t *phyreg;
+ int error = 0;
+
+ switch (cmd) {
+ case IOETHERSWITCHGETINFO:
+ info = ETHERSWITCH_GETINFO(etherswitch);
+ bcopy(info, data, sizeof(etherswitch_info_t));
+ break;
+
+ case IOETHERSWITCHGETREG:
+ reg = (etherswitch_reg_t *)data;
+ ETHERSWITCH_LOCK(etherswitch);
+ reg->val = ETHERSWITCH_READREG(etherswitch, reg->reg);
+ ETHERSWITCH_UNLOCK(etherswitch);
+ break;
+
+ case IOETHERSWITCHSETREG:
+ reg = (etherswitch_reg_t *)data;
+ ETHERSWITCH_LOCK(etherswitch);
+ error = ETHERSWITCH_WRITEREG(etherswitch, reg->reg, reg->val);
+ ETHERSWITCH_UNLOCK(etherswitch);
+ break;
+
+ case IOETHERSWITCHGETPORT:
+ error = ETHERSWITCH_GETPORT(etherswitch, (etherswitch_port_t *)data);
+ break;
+
+ case IOETHERSWITCHSETPORT:
+ error = ETHERSWITCH_SETPORT(etherswitch, (etherswitch_port_t *)data);
+ break;
+
+ case IOETHERSWITCHGETVLANGROUP:
+ error = ETHERSWITCH_GETVGROUP(etherswitch, (etherswitch_vlangroup_t *)data);
+ break;
+
+ case IOETHERSWITCHSETVLANGROUP:
+ error = ETHERSWITCH_SETVGROUP(etherswitch, (etherswitch_vlangroup_t *)data);
+ break;
+
+ case IOETHERSWITCHGETPHYREG:
+ phyreg = (etherswitch_phyreg_t *)data;
+ phyreg->val = ETHERSWITCH_READPHYREG(etherswitch, phyreg->phy, phyreg->reg);
+ break;
+
+ case IOETHERSWITCHSETPHYREG:
+ phyreg = (etherswitch_phyreg_t *)data;
+ error = ETHERSWITCH_WRITEPHYREG(etherswitch, phyreg->phy, phyreg->reg, phyreg->val);
+ break;
+
+ case IOETHERSWITCHGETCONF:
+ bzero(&conf, sizeof(etherswitch_conf_t));
+ error = ETHERSWITCH_GETCONF(etherswitch, &conf);
+ bcopy(&conf, data, sizeof(etherswitch_conf_t));
+ break;
+
+ case IOETHERSWITCHSETCONF:
+ error = ETHERSWITCH_SETCONF(etherswitch, (etherswitch_conf_t *)data);
+ break;
+
+ default:
+ error = ENOTTY;
+ }
+
+ return (error);
+}
+
+MODULE_VERSION(etherswitch, 1);
Property changes on: trunk/sys/dev/etherswitch/etherswitch.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/etherswitch.h
===================================================================
--- trunk/sys/dev/etherswitch/etherswitch.h (rev 0)
+++ trunk/sys/dev/etherswitch/etherswitch.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,104 @@
+/* $MidnightBSD$ */
+/*
+ * $FreeBSD: stable/10/sys/dev/etherswitch/etherswitch.h 253569 2013-07-23 13:56:38Z loos $
+ */
+
+#ifndef __SYS_DEV_ETHERSWITCH_ETHERSWITCH_H
+#define __SYS_DEV_ETHERSWITCH_ETHERSWITCH_H
+
+#include <sys/ioccom.h>
+
+#ifdef _KERNEL
+extern devclass_t etherswitch_devclass;
+extern driver_t etherswitch_driver;
+#endif /* _KERNEL */
+
+struct etherswitch_reg {
+ uint16_t reg;
+ uint16_t val;
+};
+typedef struct etherswitch_reg etherswitch_reg_t;
+
+struct etherswitch_phyreg {
+ uint16_t phy;
+ uint16_t reg;
+ uint16_t val;
+};
+typedef struct etherswitch_phyreg etherswitch_phyreg_t;
+
+#define ETHERSWITCH_NAMEMAX 64
+#define ETHERSWITCH_VID_MASK 0xfff
+#define ETHERSWITCH_VID_VALID (1 << 12)
+#define ETHERSWITCH_VLAN_ISL (1 << 0) /* ISL */
+#define ETHERSWITCH_VLAN_PORT (1 << 1) /* Port based vlan */
+#define ETHERSWITCH_VLAN_DOT1Q (1 << 2) /* 802.1q */
+#define ETHERSWITCH_VLAN_DOT1Q_4K (1 << 3) /* 4k support on 802.1q */
+#define ETHERSWITCH_VLAN_DOUBLE_TAG (1 << 4) /* Q-in-Q */
+#define ETHERSWITCH_VLAN_CAPS_BITS \
+"\020\1ISL\2PORT\3DOT1Q\4DOT1Q4K\5QinQ"
+
+struct etherswitch_info {
+ int es_nports;
+ int es_nvlangroups;
+ char es_name[ETHERSWITCH_NAMEMAX];
+ uint32_t es_vlan_caps;
+};
+typedef struct etherswitch_info etherswitch_info_t;
+
+#define ETHERSWITCH_CONF_FLAGS (1 << 0)
+#define ETHERSWITCH_CONF_MIRROR (1 << 1)
+#define ETHERSWITCH_CONF_VLAN_MODE (1 << 2)
+
+struct etherswitch_conf {
+ uint32_t cmd; /* What to configure */
+ uint32_t vlan_mode; /* Switch VLAN mode */
+};
+typedef struct etherswitch_conf etherswitch_conf_t;
+
+#define ETHERSWITCH_PORT_CPU (1 << 0)
+#define ETHERSWITCH_PORT_STRIPTAG (1 << 1)
+#define ETHERSWITCH_PORT_ADDTAG (1 << 2)
+#define ETHERSWITCH_PORT_FIRSTLOCK (1 << 3)
+#define ETHERSWITCH_PORT_DROPUNTAGGED (1 << 4)
+#define ETHERSWITCH_PORT_DOUBLE_TAG (1 << 5)
+#define ETHERSWITCH_PORT_INGRESS (1 << 6)
+#define ETHERSWITCH_PORT_FLAGS_BITS \
+"\020\1CPUPORT\2STRIPTAG\3ADDTAG\4FIRSTLOCK\5DROPUNTAGGED\6QinQ\7INGRESS"
+
+struct etherswitch_port {
+ int es_port;
+ int es_pvid;
+ uint32_t es_flags;
+ union {
+ struct ifreq es_uifr;
+ struct ifmediareq es_uifmr;
+ } es_ifu;
+#define es_ifr es_ifu.es_uifr
+#define es_ifmr es_ifu.es_uifmr
+};
+typedef struct etherswitch_port etherswitch_port_t;
+
+struct etherswitch_vlangroup {
+ int es_vlangroup;
+ int es_vid;
+ int es_member_ports;
+ int es_untagged_ports;
+ int es_fid;
+};
+typedef struct etherswitch_vlangroup etherswitch_vlangroup_t;
+
+#define ETHERSWITCH_PORTMASK(_port) (1 << (_port))
+
+#define IOETHERSWITCHGETINFO _IOR('i', 1, etherswitch_info_t)
+#define IOETHERSWITCHGETREG _IOWR('i', 2, etherswitch_reg_t)
+#define IOETHERSWITCHSETREG _IOW('i', 3, etherswitch_reg_t)
+#define IOETHERSWITCHGETPORT _IOWR('i', 4, etherswitch_port_t)
+#define IOETHERSWITCHSETPORT _IOW('i', 5, etherswitch_port_t)
+#define IOETHERSWITCHGETVLANGROUP _IOWR('i', 6, etherswitch_vlangroup_t)
+#define IOETHERSWITCHSETVLANGROUP _IOW('i', 7, etherswitch_vlangroup_t)
+#define IOETHERSWITCHGETPHYREG _IOWR('i', 8, etherswitch_phyreg_t)
+#define IOETHERSWITCHSETPHYREG _IOW('i', 9, etherswitch_phyreg_t)
+#define IOETHERSWITCHGETCONF _IOR('i', 10, etherswitch_conf_t)
+#define IOETHERSWITCHSETCONF _IOW('i', 11, etherswitch_conf_t)
+
+#endif
Property changes on: trunk/sys/dev/etherswitch/etherswitch.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/etherswitch_if.m
===================================================================
--- trunk/sys/dev/etherswitch/etherswitch_if.m (rev 0)
+++ trunk/sys/dev/etherswitch/etherswitch_if.m 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,144 @@
+/* $MidnightBSD$ */
+# $FreeBSD: stable/10/sys/dev/etherswitch/etherswitch_if.m 250381 2013-05-08 20:46:54Z adrian $
+
+#include <sys/bus.h>
+
+# Needed for ifreq/ifmediareq
+#include <sys/socket.h>
+#include <net/if.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+INTERFACE etherswitch;
+
+#
+# Default implementation
+#
+CODE {
+ static void
+ null_etherswitch_lock(device_t dev)
+ {
+ }
+
+ static void
+ null_etherswitch_unlock(device_t dev)
+ {
+ }
+
+ static int
+ null_etherswitch_getconf(device_t dev, etherswitch_conf_t *conf)
+ {
+ return (0);
+ }
+
+ static int
+ null_etherswitch_setconf(device_t dev, etherswitch_conf_t *conf)
+ {
+ return (0);
+ }
+};
+
+#
+# Return device info
+#
+METHOD etherswitch_info_t* getinfo {
+ device_t dev;
+}
+
+#
+# Lock access to switch registers
+#
+METHOD void lock {
+ device_t dev;
+} DEFAULT null_etherswitch_lock;
+
+#
+# Unlock access to switch registers
+#
+METHOD void unlock {
+ device_t dev;
+} DEFAULT null_etherswitch_unlock;
+
+#
+# Read switch register
+#
+METHOD int readreg {
+ device_t dev;
+ int reg;
+};
+
+#
+# Write switch register
+#
+METHOD int writereg {
+ device_t dev;
+ int reg;
+ int value;
+};
+
+#
+# Read PHY register
+#
+METHOD int readphyreg {
+ device_t dev;
+ int phy;
+ int reg;
+};
+
+#
+# Write PHY register
+#
+METHOD int writephyreg {
+ device_t dev;
+ int phy;
+ int reg;
+ int value;
+};
+
+#
+# Get port configuration
+#
+METHOD int getport {
+ device_t dev;
+ etherswitch_port_t *vg;
+}
+
+#
+# Set port configuration
+#
+METHOD int setport {
+ device_t dev;
+ etherswitch_port_t *vg;
+}
+
+#
+# Get VLAN group configuration
+#
+METHOD int getvgroup {
+ device_t dev;
+ etherswitch_vlangroup_t *vg;
+}
+
+#
+# Set VLAN group configuration
+#
+METHOD int setvgroup {
+ device_t dev;
+ etherswitch_vlangroup_t *vg;
+}
+
+#
+# Get the Switch configuration
+#
+METHOD int getconf {
+ device_t dev;
+ etherswitch_conf_t *conf;
+} DEFAULT null_etherswitch_getconf;
+
+#
+# Set the Switch configuration
+#
+METHOD int setconf {
+ device_t dev;
+ etherswitch_conf_t *conf;
+} DEFAULT null_etherswitch_setconf;
Property changes on: trunk/sys/dev/etherswitch/etherswitch_if.m
___________________________________________________________________
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip175c.c
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip175c.c (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip175c.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,250 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip175c.c 253569 2013-07-23 13:56:38Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/systm.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+
+#include <dev/mii/mii.h>
+
+#include <dev/etherswitch/etherswitch.h>
+#include <dev/etherswitch/ip17x/ip17x_phy.h>
+#include <dev/etherswitch/ip17x/ip17x_reg.h>
+#include <dev/etherswitch/ip17x/ip17x_var.h>
+#include <dev/etherswitch/ip17x/ip17x_vlans.h>
+#include <dev/etherswitch/ip17x/ip175c.h>
+
+/*
+ * IP175C specific functions.
+ */
+
+/*
+ * Reset the switch.
+ */
+static int
+ip175c_reset(struct ip17x_softc *sc)
+{
+ uint32_t data;
+
+ /* Reset all the switch settings. */
+ if (ip17x_writephy(sc->sc_dev, IP175C_RESET_PHY, IP175C_RESET_REG,
+ 0x175c))
+ return (-1);
+ DELAY(2);
+
+ /* Force IP175C mode. */
+ data = ip17x_readphy(sc->sc_dev, IP175C_MODE_PHY, IP175C_MODE_REG);
+ if (data == 0x175a) {
+ if (ip17x_writephy(sc->sc_dev, IP175C_MODE_PHY, IP175C_MODE_REG,
+ 0x175c))
+ return (-1);
+ }
+
+ return (0);
+}
+
+static int
+ip175c_port_vlan_setup(struct ip17x_softc *sc)
+{
+ struct ip17x_vlan *v;
+ uint32_t ports[IP175X_NUM_PORTS], reg[IP175X_NUM_PORTS/2];
+ int i, err, phy;
+
+ KASSERT(sc->cpuport == 5, ("cpuport != 5 not supported for IP175C"));
+ KASSERT(sc->numports == 6, ("numports != 6 not supported for IP175C"));
+
+ /* Build the port access masks. */
+ memset(ports, 0, sizeof(ports));
+ for (i = 0; i < sc->info.es_nports; i++) {
+ phy = sc->portphy[i];
+ v = &sc->vlan[i];
+ ports[phy] = v->ports;
+ }
+
+ /* Move the cpuport bit to its correct place. */
+ for (i = 0; i < sc->numports; i++) {
+ if (ports[i] & (1 << sc->cpuport)) {
+ ports[i] |= (1 << 7);
+ ports[i] &= ~(1 << sc->cpuport);
+ }
+ }
+
+ /* And now build the switch register data. */
+ memset(reg, 0, sizeof(reg));
+ for (i = 0; i < (sc->numports / 2); i++)
+ reg[i] = ports[i * 2] << 8 | ports[i * 2 + 1];
+
+ /* Update the switch resgisters. */
+ err = ip17x_writephy(sc->sc_dev, 29, 19, reg[0]);
+ if (err == 0)
+ err = ip17x_writephy(sc->sc_dev, 29, 20, reg[1]);
+ if (err == 0)
+ err = ip17x_updatephy(sc->sc_dev, 29, 21, 0xff00, reg[2]);
+ if (err == 0)
+ err = ip17x_updatephy(sc->sc_dev, 30, 18, 0x00ff, reg[2]);
+ return (err);
+}
+
+static int
+ip175c_dot1q_vlan_setup(struct ip17x_softc *sc)
+{
+ struct ip17x_vlan *v;
+ uint32_t data;
+ uint32_t vlans[IP17X_MAX_VLANS];
+ int i, j;
+
+ KASSERT(sc->cpuport == 5, ("cpuport != 5 not supported for IP175C"));
+ KASSERT(sc->numports == 6, ("numports != 6 not supported for IP175C"));
+
+ /* Add and strip VLAN tags. */
+ data = (sc->addtag & ~(1 << IP175X_CPU_PORT)) << 11;
+ data |= (sc->striptag & ~(1 << IP175X_CPU_PORT)) << 6;
+ if (sc->addtag & (1 << IP175X_CPU_PORT))
+ data |= (1 << 1);
+ if (sc->striptag & (1 << IP175X_CPU_PORT))
+ data |= (1 << 0);
+ if (ip17x_writephy(sc->sc_dev, 29, 23, data))
+ return (-1);
+
+ /* Set the VID_IDX_SEL to 0. */
+ if (ip17x_updatephy(sc->sc_dev, 30, 9, 0x70, 0))
+ return (-1);
+
+ /* Calculate the port masks. */
+ memset(vlans, 0, sizeof(vlans));
+ for (i = 0; i < IP17X_MAX_VLANS; i++) {
+ v = &sc->vlan[i];
+ if ((v->vlanid & ETHERSWITCH_VID_VALID) == 0)
+ continue;
+ vlans[v->vlanid & ETHERSWITCH_VID_MASK] = v->ports;
+ }
+
+ for (j = 0, i = 1; i <= IP17X_MAX_VLANS / 2; i++) {
+ data = vlans[j++] & 0x3f;
+ data |= (vlans[j++] & 0x3f) << 8;
+ if (ip17x_writephy(sc->sc_dev, 30, i, data))
+ return (-1);
+ }
+
+ /* Port default VLAN ID. */
+ for (i = 0; i < sc->numports; i++) {
+ if (i == IP175X_CPU_PORT) {
+ if (ip17x_writephy(sc->sc_dev, 29, 30, sc->pvid[i]))
+ return (-1);
+ } else {
+ if (ip17x_writephy(sc->sc_dev, 29, 24 + i, sc->pvid[i]))
+ return (-1);
+ }
+ }
+
+ return (0);
+}
+
+/*
+ * Set the Switch configuration.
+ */
+static int
+ip175c_hw_setup(struct ip17x_softc *sc)
+{
+
+ switch (sc->vlan_mode) {
+ case ETHERSWITCH_VLAN_PORT:
+ return (ip175c_port_vlan_setup(sc));
+ break;
+ case ETHERSWITCH_VLAN_DOT1Q:
+ return (ip175c_dot1q_vlan_setup(sc));
+ break;
+ }
+ return (-1);
+}
+
+/*
+ * Set the switch VLAN mode.
+ */
+static int
+ip175c_set_vlan_mode(struct ip17x_softc *sc, uint32_t mode)
+{
+
+ switch (mode) {
+ case ETHERSWITCH_VLAN_DOT1Q:
+ /* Enable VLAN tag processing. */
+ ip17x_updatephy(sc->sc_dev, 30, 9, 0x80, 0x80);
+ sc->vlan_mode = mode;
+ break;
+ case ETHERSWITCH_VLAN_PORT:
+ default:
+ /* Disable VLAN tag processing. */
+ ip17x_updatephy(sc->sc_dev, 30, 9, 0x80, 0);
+ sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
+ break;
+ };
+
+ /* Reset vlans. */
+ ip17x_reset_vlans(sc, sc->vlan_mode);
+
+ /* Update switch configuration. */
+ ip175c_hw_setup(sc);
+
+ return (0);
+}
+
+/*
+ * Get the switch VLAN mode.
+ */
+static int
+ip175c_get_vlan_mode(struct ip17x_softc *sc)
+{
+
+ return (sc->vlan_mode);
+}
+
+void
+ip175c_attach(struct ip17x_softc *sc)
+{
+
+ sc->hal.ip17x_reset = ip175c_reset;
+ sc->hal.ip17x_hw_setup = ip175c_hw_setup;
+ sc->hal.ip17x_get_vlan_mode = ip175c_get_vlan_mode;
+ sc->hal.ip17x_set_vlan_mode = ip175c_set_vlan_mode;
+
+ /* Defaults for IP175C. */
+ sc->cpuport = IP175X_CPU_PORT;
+ sc->numports = IP175X_NUM_PORTS;
+ sc->info.es_vlan_caps = ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOT1Q;
+
+ device_printf(sc->sc_dev, "type: IP175C\n");
+}
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip175c.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip175c.h
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip175c.h (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip175c.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,44 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip175c.h 250386 2013-05-08 20:58:41Z adrian $
+ */
+
+#ifndef __IP175C_H__
+#define __IP175C_H__
+
+#define IP175C_MODE_PHY 29
+#define IP175C_MODE_REG 31
+#define IP175C_RESET_PHY 30
+#define IP175C_RESET_REG 0
+
+#define IP175C_LAST_VLAN 15
+
+void ip175c_attach(struct ip17x_softc *sc);
+
+#endif /* __IP175C_H__ */
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip175c.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip175d.c
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip175d.c (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip175d.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,222 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * Copyright (C) 2008 Patrick Horn.
+ * Copyright (C) 2008, 2010 Martin Mares.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip175d.c 253569 2013-07-23 13:56:38Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/systm.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+
+#include <dev/mii/mii.h>
+
+#include <dev/etherswitch/etherswitch.h>
+#include <dev/etherswitch/ip17x/ip17x_phy.h>
+#include <dev/etherswitch/ip17x/ip17x_reg.h>
+#include <dev/etherswitch/ip17x/ip17x_var.h>
+#include <dev/etherswitch/ip17x/ip17x_vlans.h>
+#include <dev/etherswitch/ip17x/ip175d.h>
+
+/*
+ * IP175D specific functions.
+ */
+
+/*
+ * Reset the switch to default state.
+ */
+static int
+ip175d_reset(struct ip17x_softc *sc)
+{
+
+ /* Reset all the switch settings. */
+ ip17x_writephy(sc->sc_dev, IP175D_RESET_PHY, IP175D_RESET_REG, 0x175d);
+ DELAY(2);
+
+ /* Disable the special tagging mode. */
+ ip17x_updatephy(sc->sc_dev, 21, 22, 0x3, 0x0);
+
+ /* Set 802.1q protocol type. */
+ ip17x_writephy(sc->sc_dev, 22, 3, 0x8100);
+
+ return (0);
+}
+
+/*
+ * Set the Switch configuration.
+ */
+static int
+ip175d_hw_setup(struct ip17x_softc *sc)
+{
+ struct ip17x_vlan *v;
+ uint32_t ports[IP17X_MAX_VLANS];
+ uint32_t addtag[IP17X_MAX_VLANS];
+ uint32_t striptag[IP17X_MAX_VLANS];
+ uint32_t vlan_mask;
+ int i, j;
+
+ vlan_mask = 0;
+ for (i = 0; i < IP17X_MAX_VLANS; i++) {
+
+ ports[i] = 0;
+ addtag[i] = 0;
+ striptag[i] = 0;
+
+ v = &sc->vlan[i];
+ if ((v->vlanid & ETHERSWITCH_VID_VALID) == 0 ||
+ sc->vlan_mode == 0) {
+ /* Vlangroup disabled. Reset the filter. */
+ ip17x_writephy(sc->sc_dev, 22, 14 + i, i + 1);
+ ports[i] = 0x3f;
+ continue;
+ }
+
+ vlan_mask |= (1 << i);
+ ports[i] = v->ports;
+
+ /* Setup the filter, write the VLAN id. */
+ ip17x_writephy(sc->sc_dev, 22, 14 + i,
+ v->vlanid & ETHERSWITCH_VID_MASK);
+
+ for (j = 0; j < MII_NPHY; j++) {
+ if ((ports[i] & (1 << j)) == 0)
+ continue;
+ if (sc->addtag & (1 << j))
+ addtag[i] |= (1 << j);
+ if (sc->striptag & (1 << j))
+ striptag[i] |= (1 << j);
+ }
+ }
+
+ /* Write the port masks, tag adds and removals. */
+ for (i = 0; i < IP17X_MAX_VLANS / 2; i++) {
+ ip17x_writephy(sc->sc_dev, 23, i,
+ ports[2 * i] | (ports[2 * i + 1] << 8));
+ ip17x_writephy(sc->sc_dev, 23, i + 8,
+ addtag[2 * i] | (addtag[2 * i + 1] << 8));
+ ip17x_writephy(sc->sc_dev, 23, i + 16,
+ striptag[2 * i] | (striptag[2 * i + 1] << 8));
+ }
+
+ /* Write the in use vlan mask. */
+ ip17x_writephy(sc->sc_dev, 22, 10, vlan_mask);
+
+ /* Write the PVID of each port. */
+ for (i = 0; i < sc->numports; i++)
+ ip17x_writephy(sc->sc_dev, 22, 4 + i, sc->pvid[i]);
+
+ return (0);
+}
+
+/*
+ * Set the switch VLAN mode.
+ */
+static int
+ip175d_set_vlan_mode(struct ip17x_softc *sc, uint32_t mode)
+{
+
+ switch (mode) {
+ case ETHERSWITCH_VLAN_DOT1Q:
+ /*
+ * VLAN classification rules: tag-based VLANs,
+ * use VID to classify, drop packets that cannot
+ * be classified.
+ */
+ ip17x_updatephy(sc->sc_dev, 22, 0, 0x3fff, 0x003f);
+ sc->vlan_mode = mode;
+ break;
+ case ETHERSWITCH_VLAN_PORT:
+ sc->vlan_mode = mode;
+ /* fallthrough */
+ default:
+ /*
+ * VLAN classification rules: everything off &
+ * clear table.
+ */
+ ip17x_updatephy(sc->sc_dev, 22, 0, 0xbfff, 0x8000);
+ sc->vlan_mode = 0;
+ break;
+ };
+
+ if (sc->vlan_mode != 0) {
+ /*
+ * Ingress rules: CFI=1 dropped, null VID is untagged, VID=1 passed,
+ * VID=0xfff discarded, admin both tagged and untagged, ingress
+ * filters enabled.
+ */
+ ip17x_updatephy(sc->sc_dev, 22, 1, 0x0fff, 0x0c3f);
+
+ /* Egress rules: IGMP processing off, keep VLAN header off. */
+ ip17x_updatephy(sc->sc_dev, 22, 2, 0x0fff, 0x0000);
+ } else {
+ ip17x_updatephy(sc->sc_dev, 22, 1, 0x0fff, 0x043f);
+ ip17x_updatephy(sc->sc_dev, 22, 2, 0x0fff, 0x0020);
+ }
+
+ /* Reset vlans. */
+ ip17x_reset_vlans(sc, sc->vlan_mode);
+
+ /* Update switch configuration. */
+ ip175d_hw_setup(sc);
+
+ return (0);
+}
+
+/*
+ * Get the switch VLAN mode.
+ */
+static int
+ip175d_get_vlan_mode(struct ip17x_softc *sc)
+{
+
+ return (sc->vlan_mode);
+}
+
+void
+ip175d_attach(struct ip17x_softc *sc)
+{
+
+ sc->hal.ip17x_reset = ip175d_reset;
+ sc->hal.ip17x_hw_setup = ip175d_hw_setup;
+ sc->hal.ip17x_get_vlan_mode = ip175d_get_vlan_mode;
+ sc->hal.ip17x_set_vlan_mode = ip175d_set_vlan_mode;
+
+ /* Defaults for IP175C. */
+ sc->cpuport = IP175X_CPU_PORT;
+ sc->numports = IP175X_NUM_PORTS;
+ sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q;
+
+ device_printf(sc->sc_dev, "type: IP175D\n");
+}
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip175d.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip175d.h
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip175d.h (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip175d.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,44 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * Copyright (C) 2008 Patrick Horn.
+ * Copyright (C) 2008, 2010 Martin Mares.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip175d.h 250386 2013-05-08 20:58:41Z adrian $
+ */
+
+#ifndef __IP175D_H__
+#define __IP175D_H__
+
+#define IP175D_ID_PHY 20
+#define IP175D_ID_REG 0
+#define IP175D_RESET_PHY 20
+#define IP175D_RESET_REG 2
+
+void ip175d_attach(struct ip17x_softc *sc);
+
+#endif /* __IP175D_H__ */
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip175d.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip17x.c
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip17x.c (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip17x.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,618 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip17x.c 305615 2016-09-08 15:06:28Z pfg $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/mutex.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+#include <sys/types.h>
+
+#include <net/if.h>
+#include <net/ethernet.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+#include <net/if_var.h>
+
+#include <machine/bus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+#include <dev/etherswitch/ip17x/ip17x_phy.h>
+#include <dev/etherswitch/ip17x/ip17x_reg.h>
+#include <dev/etherswitch/ip17x/ip17x_var.h>
+#include <dev/etherswitch/ip17x/ip17x_vlans.h>
+#include <dev/etherswitch/ip17x/ip175c.h>
+#include <dev/etherswitch/ip17x/ip175d.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+MALLOC_DECLARE(M_IP17X);
+MALLOC_DEFINE(M_IP17X, "ip17x", "ip17x data structures");
+
+static void ip17x_tick(void *);
+static int ip17x_ifmedia_upd(struct ifnet *);
+static void ip17x_ifmedia_sts(struct ifnet *, struct ifmediareq *);
+
+static int
+ip17x_probe(device_t dev)
+{
+ struct ip17x_softc *sc;
+ uint32_t oui, model, phy_id1, phy_id2;
+
+ sc = device_get_softc(dev);
+
+ /* Read ID from PHY 0. */
+ phy_id1 = MDIO_READREG(device_get_parent(dev), 0, MII_PHYIDR1);
+ phy_id2 = MDIO_READREG(device_get_parent(dev), 0, MII_PHYIDR2);
+
+ oui = MII_OUI(phy_id1, phy_id2);
+ model = MII_MODEL(phy_id2);
+ /* We only care about IC+ devices. */
+ if (oui != IP17X_OUI) {
+ device_printf(dev,
+ "Unsupported IC+ switch. Unknown OUI: %#x\n", oui);
+ return (ENXIO);
+ }
+
+ switch (model) {
+ case IP17X_IP175A:
+ sc->sc_switchtype = IP17X_SWITCH_IP175A;
+ break;
+ case IP17X_IP175C:
+ sc->sc_switchtype = IP17X_SWITCH_IP175C;
+ break;
+ default:
+ device_printf(dev, "Unsupported IC+ switch model: %#x\n",
+ model);
+ return (ENXIO);
+ }
+
+ /* IP175D has a specific ID register. */
+ model = MDIO_READREG(device_get_parent(dev), IP175D_ID_PHY,
+ IP175D_ID_REG);
+ if (model == 0x175d)
+ sc->sc_switchtype = IP17X_SWITCH_IP175D;
+ else {
+ /* IP178 has more PHYs. Try it. */
+ model = MDIO_READREG(device_get_parent(dev), 5, MII_PHYIDR1);
+ if (phy_id1 == model)
+ sc->sc_switchtype = IP17X_SWITCH_IP178C;
+ }
+
+ device_set_desc_copy(dev, "IC+ IP17x switch driver");
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+ip17x_attach_phys(struct ip17x_softc *sc)
+{
+ int err, phy, port;
+ char name[IFNAMSIZ];
+
+ port = err = 0;
+
+ /* PHYs need an interface, so we generate a dummy one */
+ snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev));
+ for (phy = 0; phy < MII_NPHY; phy++) {
+ if (((1 << phy) & sc->phymask) == 0)
+ continue;
+ sc->phyport[phy] = port;
+ sc->portphy[port] = phy;
+ sc->ifp[port] = if_alloc(IFT_ETHER);
+ sc->ifp[port]->if_softc = sc;
+ sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
+ IFF_DRV_RUNNING | IFF_SIMPLEX;
+ sc->ifname[port] = malloc(strlen(name)+1, M_IP17X, M_WAITOK);
+ bcopy(name, sc->ifname[port], strlen(name)+1);
+ if_initname(sc->ifp[port], sc->ifname[port], port);
+ sc->miibus[port] = malloc(sizeof(device_t), M_IP17X,
+ M_WAITOK | M_ZERO);
+ err = mii_attach(sc->sc_dev, sc->miibus[port], sc->ifp[port],
+ ip17x_ifmedia_upd, ip17x_ifmedia_sts, \
+ BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
+ DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n",
+ device_get_nameunit(*sc->miibus[port]),
+ sc->ifp[port]->if_xname);
+ if (err != 0) {
+ device_printf(sc->sc_dev,
+ "attaching PHY %d failed\n",
+ phy);
+ break;
+ }
+ sc->info.es_nports = port + 1;
+ if (++port >= sc->numports)
+ break;
+ }
+ return (err);
+}
+
+static int
+ip17x_attach(device_t dev)
+{
+ struct ip17x_softc *sc;
+ int err;
+
+ sc = device_get_softc(dev);
+
+ sc->sc_dev = dev;
+ mtx_init(&sc->sc_mtx, "ip17x", NULL, MTX_DEF);
+ strlcpy(sc->info.es_name, device_get_desc(dev),
+ sizeof(sc->info.es_name));
+
+ /* XXX Defaults */
+ sc->phymask = 0x0f;
+ sc->media = 100;
+
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "phymask", &sc->phymask);
+
+ /* Number of vlans supported by the switch. */
+ sc->info.es_nvlangroups = IP17X_MAX_VLANS;
+
+ /* Attach the switch related functions. */
+ if (IP17X_IS_SWITCH(sc, IP175C))
+ ip175c_attach(sc);
+ else if (IP17X_IS_SWITCH(sc, IP175D))
+ ip175d_attach(sc);
+ else
+ /* We don't have support to all the models yet :-/ */
+ return (ENXIO);
+
+ /* Always attach the cpu port. */
+ sc->phymask |= (1 << sc->cpuport);
+
+ sc->ifp = malloc(sizeof(struct ifnet *) * sc->numports, M_IP17X,
+ M_WAITOK | M_ZERO);
+ sc->pvid = malloc(sizeof(uint32_t) * sc->numports, M_IP17X,
+ M_WAITOK | M_ZERO);
+ sc->ifname = malloc(sizeof(char *) * sc->numports, M_IP17X,
+ M_WAITOK | M_ZERO);
+ sc->miibus = malloc(sizeof(device_t *) * sc->numports, M_IP17X,
+ M_WAITOK | M_ZERO);
+ sc->portphy = malloc(sizeof(int) * sc->numports, M_IP17X,
+ M_WAITOK | M_ZERO);
+
+ /* Initialize the switch. */
+ sc->hal.ip17x_reset(sc);
+
+ /*
+ * Attach the PHYs and complete the bus enumeration.
+ */
+ err = ip17x_attach_phys(sc);
+ if (err != 0)
+ return (err);
+
+ /*
+ * Set the switch to port based vlans or disabled (if not supported
+ * on this model).
+ */
+ sc->hal.ip17x_set_vlan_mode(sc, ETHERSWITCH_VLAN_PORT);
+
+ bus_generic_probe(dev);
+ bus_enumerate_hinted_children(dev);
+ err = bus_generic_attach(dev);
+ if (err != 0)
+ return (err);
+
+ callout_init(&sc->callout_tick, 0);
+
+ ip17x_tick(sc);
+
+ return (0);
+}
+
+static int
+ip17x_detach(device_t dev)
+{
+ struct ip17x_softc *sc;
+ int i, port;
+
+ sc = device_get_softc(dev);
+ callout_drain(&sc->callout_tick);
+
+ for (i=0; i < MII_NPHY; i++) {
+ if (((1 << i) & sc->phymask) == 0)
+ continue;
+ port = sc->phyport[i];
+ if (sc->miibus[port] != NULL)
+ device_delete_child(dev, (*sc->miibus[port]));
+ if (sc->ifp[port] != NULL)
+ if_free(sc->ifp[port]);
+ free(sc->ifname[port], M_IP17X);
+ free(sc->miibus[port], M_IP17X);
+ }
+
+ free(sc->portphy, M_IP17X);
+ free(sc->miibus, M_IP17X);
+ free(sc->ifname, M_IP17X);
+ free(sc->pvid, M_IP17X);
+ free(sc->ifp, M_IP17X);
+
+ /* Reset the switch. */
+ sc->hal.ip17x_reset(sc);
+
+ bus_generic_detach(dev);
+ mtx_destroy(&sc->sc_mtx);
+
+ return (0);
+}
+
+static inline struct mii_data *
+ip17x_miiforport(struct ip17x_softc *sc, int port)
+{
+
+ if (port < 0 || port > sc->numports)
+ return (NULL);
+ return (device_get_softc(*sc->miibus[port]));
+}
+
+static inline struct ifnet *
+ip17x_ifpforport(struct ip17x_softc *sc, int port)
+{
+
+ if (port < 0 || port > sc->numports)
+ return (NULL);
+ return (sc->ifp[port]);
+}
+
+/*
+ * Poll the status for all PHYs.
+ */
+static void
+ip17x_miipollstat(struct ip17x_softc *sc)
+{
+ struct mii_softc *miisc;
+ struct mii_data *mii;
+ int i, port;
+
+ IP17X_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ for (i = 0; i < MII_NPHY; i++) {
+ if (((1 << i) & sc->phymask) == 0)
+ continue;
+ port = sc->phyport[i];
+ if ((*sc->miibus[port]) == NULL)
+ continue;
+ mii = device_get_softc(*sc->miibus[port]);
+ LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
+ if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) !=
+ miisc->mii_inst)
+ continue;
+ ukphy_status(miisc);
+ mii_phy_update(miisc, MII_POLLSTAT);
+ }
+ }
+}
+
+static void
+ip17x_tick(void *arg)
+{
+ struct ip17x_softc *sc;
+
+ sc = arg;
+ ip17x_miipollstat(sc);
+ callout_reset(&sc->callout_tick, hz, ip17x_tick, sc);
+}
+
+static void
+ip17x_lock(device_t dev)
+{
+ struct ip17x_softc *sc;
+
+ sc = device_get_softc(dev);
+ IP17X_LOCK_ASSERT(sc, MA_NOTOWNED);
+ IP17X_LOCK(sc);
+}
+
+static void
+ip17x_unlock(device_t dev)
+{
+ struct ip17x_softc *sc;
+
+ sc = device_get_softc(dev);
+ IP17X_LOCK_ASSERT(sc, MA_OWNED);
+ IP17X_UNLOCK(sc);
+}
+
+static etherswitch_info_t *
+ip17x_getinfo(device_t dev)
+{
+ struct ip17x_softc *sc;
+
+ sc = device_get_softc(dev);
+ return (&sc->info);
+}
+
+static int
+ip17x_getport(device_t dev, etherswitch_port_t *p)
+{
+ struct ip17x_softc *sc;
+ struct ifmediareq *ifmr;
+ struct mii_data *mii;
+ int err, phy;
+
+ sc = device_get_softc(dev);
+ if (p->es_port < 0 || p->es_port >= sc->numports)
+ return (ENXIO);
+
+ phy = sc->portphy[p->es_port];
+
+ /* Retrieve the PVID. */
+ p->es_pvid = sc->pvid[phy];
+
+ /* Port flags. */
+ if (sc->addtag & (1 << phy))
+ p->es_flags |= ETHERSWITCH_PORT_ADDTAG;
+ if (sc->striptag & (1 << phy))
+ p->es_flags |= ETHERSWITCH_PORT_STRIPTAG;
+
+ ifmr = &p->es_ifmr;
+
+ /* No media settings ? */
+ if (p->es_ifmr.ifm_count == 0)
+ return (0);
+
+ mii = ip17x_miiforport(sc, p->es_port);
+ if (mii == NULL)
+ return (ENXIO);
+ if (phy == sc->cpuport) {
+ /* fill in fixed values for CPU port */
+ p->es_flags |= ETHERSWITCH_PORT_CPU;
+ ifmr->ifm_count = 0;
+ if (sc->media == 100)
+ ifmr->ifm_current = ifmr->ifm_active =
+ IFM_ETHER | IFM_100_TX | IFM_FDX;
+ else
+ ifmr->ifm_current = ifmr->ifm_active =
+ IFM_ETHER | IFM_1000_T | IFM_FDX;
+ ifmr->ifm_mask = 0;
+ ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
+ } else {
+ err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
+ &mii->mii_media, SIOCGIFMEDIA);
+ if (err)
+ return (err);
+ }
+ return (0);
+}
+
+static int
+ip17x_setport(device_t dev, etherswitch_port_t *p)
+{
+ struct ip17x_softc *sc;
+ struct ifmedia *ifm;
+ struct ifnet *ifp;
+ struct mii_data *mii;
+ int phy;
+
+ sc = device_get_softc(dev);
+ if (p->es_port < 0 || p->es_port >= sc->numports)
+ return (ENXIO);
+
+ phy = sc->portphy[p->es_port];
+ ifp = ip17x_ifpforport(sc, p->es_port);
+ mii = ip17x_miiforport(sc, p->es_port);
+ if (ifp == NULL || mii == NULL)
+ return (ENXIO);
+
+ /* Port flags. */
+ if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
+
+ /* Set the PVID. */
+ if (p->es_pvid != 0) {
+ if (IP17X_IS_SWITCH(sc, IP175C) &&
+ p->es_pvid > IP175C_LAST_VLAN)
+ return (ENXIO);
+ sc->pvid[phy] = p->es_pvid;
+ }
+
+ /* Mutually exclusive. */
+ if (p->es_flags & ETHERSWITCH_PORT_ADDTAG &&
+ p->es_flags & ETHERSWITCH_PORT_STRIPTAG)
+ return (EINVAL);
+
+ /* Reset the settings for this port. */
+ sc->addtag &= ~(1 << phy);
+ sc->striptag &= ~(1 << phy);
+
+ /* And then set it to the new value. */
+ if (p->es_flags & ETHERSWITCH_PORT_ADDTAG)
+ sc->addtag |= (1 << phy);
+ if (p->es_flags & ETHERSWITCH_PORT_STRIPTAG)
+ sc->striptag |= (1 << phy);
+ }
+
+ /* Update the switch configuration. */
+ if (sc->hal.ip17x_hw_setup(sc))
+ return (ENXIO);
+
+ /* Do not allow media changes on CPU port. */
+ if (phy == sc->cpuport)
+ return (0);
+
+ /* No media settings ? */
+ if (p->es_ifmr.ifm_count == 0)
+ return (0);
+
+ ifm = &mii->mii_media;
+ return (ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA));
+}
+
+static void
+ip17x_statchg(device_t dev)
+{
+
+ DPRINTF(dev, "%s\n", __func__);
+}
+
+static int
+ip17x_ifmedia_upd(struct ifnet *ifp)
+{
+ struct ip17x_softc *sc;
+ struct mii_data *mii;
+
+ DPRINTF(sc->sc_dev, "%s\n", __func__);
+ sc = ifp->if_softc;
+ mii = ip17x_miiforport(sc, ifp->if_dunit);
+ if (mii == NULL)
+ return (ENXIO);
+ mii_mediachg(mii);
+ return (0);
+}
+
+static void
+ip17x_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
+{
+ struct ip17x_softc *sc;
+ struct mii_data *mii;
+
+ DPRINTF(sc->sc_dev, "%s\n", __func__);
+
+ sc = ifp->if_softc;
+ mii = ip17x_miiforport(sc, ifp->if_dunit);
+ if (mii == NULL)
+ return;
+ mii_pollstat(mii);
+ ifmr->ifm_active = mii->mii_media_active;
+ ifmr->ifm_status = mii->mii_media_status;
+}
+
+static int
+ip17x_readreg(device_t dev, int addr)
+{
+ struct ip17x_softc *sc;
+
+ sc = device_get_softc(dev);
+ IP17X_LOCK_ASSERT(sc, MA_OWNED);
+
+ /* Not supported. */
+ return (0);
+}
+
+static int
+ip17x_writereg(device_t dev, int addr, int value)
+{
+ struct ip17x_softc *sc;
+
+ sc = device_get_softc(dev);
+ IP17X_LOCK_ASSERT(sc, MA_OWNED);
+
+ /* Not supported. */
+ return (0);
+}
+
+static int
+ip17x_getconf(device_t dev, etherswitch_conf_t *conf)
+{
+ struct ip17x_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ /* Return the VLAN mode. */
+ conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
+ conf->vlan_mode = sc->hal.ip17x_get_vlan_mode(sc);
+
+ return (0);
+}
+
+static int
+ip17x_setconf(device_t dev, etherswitch_conf_t *conf)
+{
+ struct ip17x_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ /* Set the VLAN mode. */
+ if (conf->cmd & ETHERSWITCH_CONF_VLAN_MODE)
+ sc->hal.ip17x_set_vlan_mode(sc, conf->vlan_mode);
+
+ return (0);
+}
+
+static device_method_t ip17x_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, ip17x_probe),
+ DEVMETHOD(device_attach, ip17x_attach),
+ DEVMETHOD(device_detach, ip17x_detach),
+
+ /* bus interface */
+ DEVMETHOD(bus_add_child, device_add_child_ordered),
+
+ /* MII interface */
+ DEVMETHOD(miibus_readreg, ip17x_readphy),
+ DEVMETHOD(miibus_writereg, ip17x_writephy),
+ DEVMETHOD(miibus_statchg, ip17x_statchg),
+
+ /* MDIO interface */
+ DEVMETHOD(mdio_readreg, ip17x_readphy),
+ DEVMETHOD(mdio_writereg, ip17x_writephy),
+
+ /* etherswitch interface */
+ DEVMETHOD(etherswitch_lock, ip17x_lock),
+ DEVMETHOD(etherswitch_unlock, ip17x_unlock),
+ DEVMETHOD(etherswitch_getinfo, ip17x_getinfo),
+ DEVMETHOD(etherswitch_readreg, ip17x_readreg),
+ DEVMETHOD(etherswitch_writereg, ip17x_writereg),
+ DEVMETHOD(etherswitch_readphyreg, ip17x_readphy),
+ DEVMETHOD(etherswitch_writephyreg, ip17x_writephy),
+ DEVMETHOD(etherswitch_getport, ip17x_getport),
+ DEVMETHOD(etherswitch_setport, ip17x_setport),
+ DEVMETHOD(etherswitch_getvgroup, ip17x_getvgroup),
+ DEVMETHOD(etherswitch_setvgroup, ip17x_setvgroup),
+ DEVMETHOD(etherswitch_getconf, ip17x_getconf),
+ DEVMETHOD(etherswitch_setconf, ip17x_setconf),
+
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_0(ip17x, ip17x_driver, ip17x_methods,
+ sizeof(struct ip17x_softc));
+static devclass_t ip17x_devclass;
+
+DRIVER_MODULE(ip17x, mdio, ip17x_driver, ip17x_devclass, 0, 0);
+DRIVER_MODULE(miibus, ip17x, miibus_driver, miibus_devclass, 0, 0);
+DRIVER_MODULE(mdio, ip17x, mdio_driver, mdio_devclass, 0, 0);
+DRIVER_MODULE(etherswitch, ip17x, etherswitch_driver, etherswitch_devclass, 0, 0);
+MODULE_VERSION(ip17x, 1);
+MODULE_DEPEND(ip17x, miibus, 1, 1, 1); /* XXX which versions? */
+MODULE_DEPEND(ip17x, etherswitch, 1, 1, 1); /* XXX which versions? */
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip17x.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip17x_phy.c
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip17x_phy.c (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip17x_phy.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,105 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip17x_phy.c 262848 2014-03-06 13:15:53Z brueffer $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/systm.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+
+#include <dev/mii/mii.h>
+
+#include <dev/etherswitch/etherswitch.h>
+#include <dev/etherswitch/ip17x/ip17x_phy.h>
+#include <dev/etherswitch/ip17x/ip17x_reg.h>
+#include <dev/etherswitch/ip17x/ip17x_var.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+int
+ip17x_readphy(device_t dev, int phy, int reg)
+{
+ struct ip17x_softc *sc;
+ int data;
+
+ sc = device_get_softc(dev);
+ IP17X_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ if (phy < 0 || phy >= 32)
+ return (ENXIO);
+ if (reg < 0 || reg >= 32)
+ return (ENXIO);
+
+ IP17X_LOCK(sc);
+ data = MDIO_READREG(device_get_parent(dev), phy, reg);
+ IP17X_UNLOCK(sc);
+
+ return (data);
+}
+
+int
+ip17x_writephy(device_t dev, int phy, int reg, int data)
+{
+ struct ip17x_softc *sc;
+ int err;
+
+ sc = device_get_softc(dev);
+ IP17X_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ if (phy < 0 || phy >= 32)
+ return (ENXIO);
+ if (reg < 0 || reg >= 32)
+ return (ENXIO);
+
+ IP17X_LOCK(sc);
+ err = MDIO_WRITEREG(device_get_parent(dev), phy, reg, data);
+ IP17X_UNLOCK(sc);
+
+ return (err);
+}
+
+int
+ip17x_updatephy(device_t dev, int phy, int reg, int mask, int value)
+{
+ int val;
+
+ val = ip17x_readphy(dev, phy, reg);
+ val &= ~mask;
+ val |= value;
+ return (ip17x_writephy(dev, phy, reg, val));
+}
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip17x_phy.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip17x_phy.h
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip17x_phy.h (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip17x_phy.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,39 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip17x_phy.h 250386 2013-05-08 20:58:41Z adrian $
+ */
+
+#ifndef __IP17X_PHY_H__
+#define __IP17X_PHY_H__
+
+int ip17x_readphy(device_t, int, int);
+int ip17x_writephy(device_t, int, int, int);
+int ip17x_updatephy(device_t, int, int, int, int);
+
+#endif /* __IP17X_PHY_H__ */
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip17x_phy.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip17x_reg.h
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip17x_reg.h (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip17x_reg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,45 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip17x_reg.h 250386 2013-05-08 20:58:41Z adrian $
+ */
+
+#ifndef __IP17X_REG_H__
+#define __IP17X_REG_H__
+
+/* IP175X */
+#define IP17X_OUI 0x9c3
+#define IP17X_IP175A 0x05
+#define IP17X_IP175C 0x18
+
+#define IP17X_MAX_VLANS 16
+
+#define IP175X_CPU_PORT 5
+#define IP175X_NUM_PORTS 6
+
+#endif /* __IP17X_REG_H__ */
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip17x_reg.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip17x_var.h
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip17x_var.h (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip17x_var.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,96 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip17x_var.h 250386 2013-05-08 20:58:41Z adrian $
+ */
+
+#ifndef __IP17X_VAR_H__
+#define __IP17X_VAR_H__
+
+typedef enum {
+ IP17X_SWITCH_NONE,
+ IP17X_SWITCH_IP175A,
+ IP17X_SWITCH_IP175C,
+ IP17X_SWITCH_IP175D,
+ IP17X_SWITCH_IP178C,
+} ip17x_switch_type;
+
+struct ip17x_vlan {
+ uint32_t ports;
+ int vlanid;
+};
+
+struct ip17x_softc {
+ device_t sc_dev;
+ int media; /* cpu port media */
+ int cpuport; /* which PHY is connected to the CPU */
+ int phymask; /* PHYs we manage */
+ int phyport[MII_NPHY];
+ int numports; /* number of ports */
+ int *portphy;
+ char **ifname;
+ device_t **miibus;
+ etherswitch_info_t info;
+ ip17x_switch_type sc_switchtype;
+ struct callout callout_tick;
+ struct ifnet **ifp;
+ struct mtx sc_mtx; /* serialize access to softc */
+
+ struct ip17x_vlan vlan[IP17X_MAX_VLANS];
+ uint32_t *pvid; /* PVID */
+ uint32_t addtag; /* per port add tag flag */
+ uint32_t striptag; /* per port strip tag flag */
+ uint32_t vlan_mode; /* VLAN mode */
+
+ struct {
+ int (* ip17x_reset) (struct ip17x_softc *);
+ int (* ip17x_hw_setup) (struct ip17x_softc *);
+ int (* ip17x_get_vlan_mode) (struct ip17x_softc *);
+ int (* ip17x_set_vlan_mode) (struct ip17x_softc *, uint32_t);
+ } hal;
+};
+
+#define IP17X_IS_SWITCH(_sc, _type) \
+ (!!((_sc)->sc_switchtype == IP17X_SWITCH_ ## _type))
+
+#define IP17X_LOCK(_sc) \
+ mtx_lock(&(_sc)->sc_mtx)
+#define IP17X_UNLOCK(_sc) \
+ mtx_unlock(&(_sc)->sc_mtx)
+#define IP17X_LOCK_ASSERT(_sc, _what) \
+ mtx_assert(&(_sc)->sc_mtx, (_what))
+#define IP17X_TRYLOCK(_sc) \
+ mtx_trylock(&(_sc)->sc_mtx)
+
+#if defined(DEBUG)
+#define DPRINTF(dev, args...) device_printf(dev, args)
+#else
+#define DPRINTF(dev, args...)
+#endif
+
+#endif /* __IP17X_VAR_H__ */
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip17x_var.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.c
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.c (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,188 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip17x_vlans.c 262848 2014-03-06 13:15:53Z brueffer $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/mutex.h>
+#include <sys/systm.h>
+#include <sys/socket.h>
+
+#include <net/if.h>
+
+#include <dev/mii/mii.h>
+
+#include <dev/etherswitch/etherswitch.h>
+#include <dev/etherswitch/ip17x/ip17x_phy.h>
+#include <dev/etherswitch/ip17x/ip17x_reg.h>
+#include <dev/etherswitch/ip17x/ip17x_var.h>
+#include <dev/etherswitch/ip17x/ip17x_vlans.h>
+#include <dev/etherswitch/ip17x/ip175c.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+/*
+ * Reset vlans to default state.
+ */
+int
+ip17x_reset_vlans(struct ip17x_softc *sc, uint32_t vlan_mode)
+{
+ struct ip17x_vlan *v;
+ int i, j, phy;
+
+ /* Do not add or strip vlan tags on any port. */
+ sc->addtag = 0;
+ sc->striptag = 0;
+
+ /* Reset all vlan data. */
+ memset(sc->vlan, 0, sizeof(sc->vlan));
+ memset(sc->pvid, 0, sizeof(uint32_t) * sc->numports);
+
+ if (vlan_mode == ETHERSWITCH_VLAN_PORT) {
+
+ /* Initialize port based vlans. */
+ for (i = 0, phy = 0; phy < MII_NPHY; phy++) {
+ if (((1 << phy) & sc->phymask) == 0)
+ continue;
+ v = &sc->vlan[i];
+ v->vlanid = i++ | ETHERSWITCH_VID_VALID;
+ v->ports = (1 << sc->cpuport);
+ for (j = 0; j < MII_NPHY; j++) {
+ if (((1 << j) & sc->phymask) == 0)
+ continue;
+ v->ports |= (1 << j);
+ }
+ }
+
+ } else if (vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
+
+ /*
+ * Setup vlan 1 as PVID for all switch ports. Add all ports as
+ * members of vlan 1.
+ */
+ v = &sc->vlan[0];
+ v->vlanid = 1 | ETHERSWITCH_VID_VALID;
+ /* Set PVID to 1 for everyone. */
+ for (i = 0; i < sc->numports; i++)
+ sc->pvid[i] = 1;
+ for (i = 0; i < MII_NPHY; i++) {
+ if ((sc->phymask & (1 << i)) == 0)
+ continue;
+ v->ports |= (1 << i);
+ }
+ }
+
+ return (0);
+}
+
+int
+ip17x_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
+{
+ struct ip17x_softc *sc;
+ uint32_t port;
+ int i;
+
+ sc = device_get_softc(dev);
+
+ /* Vlan ID. */
+ vg->es_vid = sc->vlan[vg->es_vlangroup].vlanid;
+
+ /* Member Ports. */
+ vg->es_member_ports = 0;
+ for (i = 0; i < MII_NPHY; i++) {
+ if ((sc->phymask & (1 << i)) == 0)
+ continue;
+ if ((sc->vlan[vg->es_vlangroup].ports & (1 << i)) == 0)
+ continue;
+ port = sc->phyport[i];
+ vg->es_member_ports |= (1 << port);
+ }
+
+ /* Not supported. */
+ vg->es_untagged_ports = vg->es_member_ports;
+ vg->es_fid = 0;
+
+ return (0);
+}
+
+int
+ip17x_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
+{
+ struct ip17x_softc *sc;
+ uint32_t phy;
+ int i;
+
+ sc = device_get_softc(dev);
+
+ /* Check VLAN mode. */
+ if (sc->vlan_mode == 0)
+ return (EINVAL);
+
+ /* IP175C don't support VLAN IDs > 15. */
+ if (IP17X_IS_SWITCH(sc, IP175C) &&
+ (vg->es_vid & ETHERSWITCH_VID_MASK) > IP175C_LAST_VLAN)
+ return (EINVAL);
+
+ /* Vlan ID. */
+ if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) {
+ for (i = 0; i < sc->info.es_nvlangroups; i++) {
+ /* Is this Vlan ID already set in another vlangroup ? */
+ if (i != vg->es_vlangroup &&
+ sc->vlan[i].vlanid & ETHERSWITCH_VID_VALID &&
+ (sc->vlan[i].vlanid & ETHERSWITCH_VID_MASK) ==
+ (vg->es_vid & ETHERSWITCH_VID_MASK))
+ return (EINVAL);
+ }
+ sc->vlan[vg->es_vlangroup].vlanid = vg->es_vid &
+ ETHERSWITCH_VID_MASK;
+ /* Setting the vlanid to zero disables the vlangroup. */
+ if (sc->vlan[vg->es_vlangroup].vlanid == 0) {
+ sc->vlan[vg->es_vlangroup].ports = 0;
+ return (sc->hal.ip17x_hw_setup(sc));
+ }
+ sc->vlan[vg->es_vlangroup].vlanid |= ETHERSWITCH_VID_VALID;
+ }
+
+ /* Member Ports. */
+ sc->vlan[vg->es_vlangroup].ports = 0;
+ for (i = 0; i < sc->numports; i++) {
+ if ((vg->es_member_ports & (1 << i)) == 0)
+ continue;
+ phy = sc->portphy[i];
+ sc->vlan[vg->es_vlangroup].ports |= (1 << phy);
+ }
+
+ return (sc->hal.ip17x_hw_setup(sc));
+}
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.h
===================================================================
--- trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.h (rev 0)
+++ trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,37 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ip17x/ip17x_vlans.h 250386 2013-05-08 20:58:41Z adrian $
+ */
+
+#ifndef __IP17X_VLANS_H__
+#define __IP17X_VLANS_H__
+
+int ip17x_reset_vlans(struct ip17x_softc *, uint32_t);
+int ip17x_getvgroup(device_t, etherswitch_vlangroup_t *);
+int ip17x_setvgroup(device_t, etherswitch_vlangroup_t *);
+
+#endif /* __IP17X_VLANS_H__ */
Property changes on: trunk/sys/dev/etherswitch/ip17x/ip17x_vlans.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/mdio.c
===================================================================
--- trunk/sys/dev/etherswitch/mdio.c (rev 0)
+++ trunk/sys/dev/etherswitch/mdio.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,118 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/mdio.c 234861 2012-05-01 06:11:38Z adrian $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/systm.h>
+
+#include <dev/etherswitch/mdio.h>
+
+#include "mdio_if.h"
+
+static void
+mdio_identify(driver_t *driver, device_t parent)
+{
+
+ if (device_find_child(parent, mdio_driver.name, -1) == NULL)
+ BUS_ADD_CHILD(parent, 0, mdio_driver.name, -1);
+}
+
+static int
+mdio_probe(device_t dev)
+{
+
+ device_set_desc(dev, "MDIO");
+
+ return (BUS_PROBE_SPECIFIC);
+}
+
+static int
+mdio_attach(device_t dev)
+{
+
+ bus_generic_probe(dev);
+ bus_enumerate_hinted_children(dev);
+ return (bus_generic_attach(dev));
+}
+
+static int
+mdio_detach(device_t dev)
+{
+
+ bus_generic_detach(dev);
+ return (0);
+}
+
+static int
+mdio_readreg(device_t dev, int phy, int reg)
+{
+
+ return (MDIO_READREG(device_get_parent(dev), phy, reg));
+}
+
+static int
+mdio_writereg(device_t dev, int phy, int reg, int val)
+{
+
+ return (MDIO_WRITEREG(device_get_parent(dev), phy, reg, val));
+}
+
+static void
+mdio_hinted_child(device_t dev, const char *name, int unit)
+{
+
+ device_add_child(dev, name, unit);
+}
+
+static device_method_t mdio_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_identify, mdio_identify),
+ DEVMETHOD(device_probe, mdio_probe),
+ DEVMETHOD(device_attach, mdio_attach),
+ DEVMETHOD(device_detach, mdio_detach),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ /* bus interface */
+ DEVMETHOD(bus_add_child, device_add_child_ordered),
+ DEVMETHOD(bus_hinted_child, mdio_hinted_child),
+
+ /* MDIO access */
+ DEVMETHOD(mdio_readreg, mdio_readreg),
+ DEVMETHOD(mdio_writereg, mdio_writereg),
+
+ DEVMETHOD_END
+};
+
+driver_t mdio_driver = {
+ "mdio",
+ mdio_methods,
+ 0
+};
+
+devclass_t mdio_devclass;
Property changes on: trunk/sys/dev/etherswitch/mdio.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/mdio.h
===================================================================
--- trunk/sys/dev/etherswitch/mdio.h (rev 0)
+++ trunk/sys/dev/etherswitch/mdio.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,36 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/mdio.h 234861 2012-05-01 06:11:38Z adrian $
+ */
+
+#ifndef __DEV_ETHERSWITCH_MDIO_H__
+#define __DEV_ETHERSWITCH_MDIO_H__
+
+extern driver_t mdio_driver;
+extern devclass_t mdio_devclass;
+
+#endif /* __DEV_ETHERSWITCH_MDIO_H__ */
Property changes on: trunk/sys/dev/etherswitch/mdio.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/mdio_if.m
===================================================================
--- trunk/sys/dev/etherswitch/mdio_if.m (rev 0)
+++ trunk/sys/dev/etherswitch/mdio_if.m 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,25 @@
+/* $MidnightBSD$ */
+# $FreeBSD: stable/10/sys/dev/etherswitch/mdio_if.m 234861 2012-05-01 06:11:38Z adrian $
+
+#include <sys/bus.h>
+
+INTERFACE mdio;
+
+#
+# Read register from device on MDIO bus
+#
+METHOD int readreg {
+ device_t dev;
+ int phy;
+ int reg;
+};
+
+#
+# Write register to device on MDIO bus
+#
+METHOD int writereg {
+ device_t dev;
+ int phy;
+ int reg;
+ int val;
+};
Property changes on: trunk/sys/dev/etherswitch/mdio_if.m
___________________________________________________________________
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/miiproxy.c
===================================================================
--- trunk/sys/dev/etherswitch/miiproxy.c (rev 0)
+++ trunk/sys/dev/etherswitch/miiproxy.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,445 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/miiproxy.c 234861 2012-05-01 06:11:38Z adrian $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <dev/etherswitch/miiproxy.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+
+
+MALLOC_DECLARE(M_MIIPROXY);
+MALLOC_DEFINE(M_MIIPROXY, "miiproxy", "miiproxy data structures");
+
+driver_t miiproxy_driver;
+driver_t mdioproxy_driver;
+
+struct miiproxy_softc {
+ device_t parent;
+ device_t proxy;
+ device_t mdio;
+};
+
+struct mdioproxy_softc {
+};
+
+/*
+ * The rendevous data structures and functions allow two device endpoints to
+ * match up, so that the proxy endpoint can be associated with a target
+ * endpoint. The proxy has to know the device name of the target that it
+ * wants to associate with, for example through a hint. The rendevous code
+ * makes no assumptions about the devices that want to meet.
+ */
+struct rendevous_entry;
+
+enum rendevous_op {
+ RENDEVOUS_ATTACH,
+ RENDEVOUS_DETACH
+};
+
+typedef int (*rendevous_callback_t)(enum rendevous_op,
+ struct rendevous_entry *);
+
+static SLIST_HEAD(rendevoushead, rendevous_entry) rendevoushead =
+ SLIST_HEAD_INITIALIZER(rendevoushead);
+
+struct rendevous_endpoint {
+ device_t device;
+ const char *name;
+ rendevous_callback_t callback;
+};
+
+struct rendevous_entry {
+ SLIST_ENTRY(rendevous_entry) entries;
+ struct rendevous_endpoint proxy;
+ struct rendevous_endpoint target;
+};
+
+/*
+ * Call the callback routines for both the proxy and the target. If either
+ * returns an error, undo the attachment.
+ */
+static int
+rendevous_attach(struct rendevous_entry *e, struct rendevous_endpoint *ep)
+{
+ int error;
+
+ error = e->proxy.callback(RENDEVOUS_ATTACH, e);
+ if (error == 0) {
+ error = e->target.callback(RENDEVOUS_ATTACH, e);
+ if (error != 0) {
+ e->proxy.callback(RENDEVOUS_DETACH, e);
+ ep->device = NULL;
+ ep->callback = NULL;
+ }
+ }
+ return (error);
+}
+
+/*
+ * Create an entry for the proxy in the rendevous list. The name parameter
+ * indicates the name of the device that is the target endpoint for this
+ * rendevous. The callback will be invoked as soon as the target is
+ * registered: either immediately if the target registered itself earlier,
+ * or once the target registers. Returns ENXIO if the target has not yet
+ * registered.
+ */
+static int
+rendevous_register_proxy(device_t dev, const char *name,
+ rendevous_callback_t callback)
+{
+ struct rendevous_entry *e;
+
+ KASSERT(callback != NULL, ("callback must be set"));
+ SLIST_FOREACH(e, &rendevoushead, entries) {
+ if (strcmp(name, e->target.name) == 0) {
+ /* the target is already attached */
+ e->proxy.name = device_get_nameunit(dev);
+ e->proxy.device = dev;
+ e->proxy.callback = callback;
+ return (rendevous_attach(e, &e->proxy));
+ }
+ }
+ e = malloc(sizeof(*e), M_MIIPROXY, M_WAITOK | M_ZERO);
+ e->proxy.name = device_get_nameunit(dev);
+ e->proxy.device = dev;
+ e->proxy.callback = callback;
+ e->target.name = name;
+ SLIST_INSERT_HEAD(&rendevoushead, e, entries);
+ return (ENXIO);
+}
+
+/*
+ * Create an entry in the rendevous list for the target.
+ * Returns ENXIO if the proxy has not yet registered.
+ */
+static int
+rendevous_register_target(device_t dev, rendevous_callback_t callback)
+{
+ struct rendevous_entry *e;
+ const char *name;
+
+ KASSERT(callback != NULL, ("callback must be set"));
+ name = device_get_nameunit(dev);
+ SLIST_FOREACH(e, &rendevoushead, entries) {
+ if (strcmp(name, e->target.name) == 0) {
+ e->target.device = dev;
+ e->target.callback = callback;
+ return (rendevous_attach(e, &e->target));
+ }
+ }
+ e = malloc(sizeof(*e), M_MIIPROXY, M_WAITOK | M_ZERO);
+ e->target.name = name;
+ e->target.device = dev;
+ e->target.callback = callback;
+ SLIST_INSERT_HEAD(&rendevoushead, e, entries);
+ return (ENXIO);
+}
+
+/*
+ * Remove the registration for the proxy.
+ */
+static int
+rendevous_unregister_proxy(device_t dev)
+{
+ struct rendevous_entry *e;
+ int error = 0;
+
+ SLIST_FOREACH(e, &rendevoushead, entries) {
+ if (e->proxy.device == dev) {
+ if (e->target.device == NULL) {
+ SLIST_REMOVE(&rendevoushead, e, rendevous_entry, entries);
+ free(e, M_MIIPROXY);
+ return (0);
+ } else {
+ e->proxy.callback(RENDEVOUS_DETACH, e);
+ e->target.callback(RENDEVOUS_DETACH, e);
+ }
+ e->proxy.device = NULL;
+ e->proxy.callback = NULL;
+ return (error);
+ }
+ }
+ return (ENOENT);
+}
+
+/*
+ * Remove the registration for the target.
+ */
+static int
+rendevous_unregister_target(device_t dev)
+{
+ struct rendevous_entry *e;
+ int error = 0;
+
+ SLIST_FOREACH(e, &rendevoushead, entries) {
+ if (e->target.device == dev) {
+ if (e->proxy.device == NULL) {
+ SLIST_REMOVE(&rendevoushead, e, rendevous_entry, entries);
+ free(e, M_MIIPROXY);
+ return (0);
+ } else {
+ e->proxy.callback(RENDEVOUS_DETACH, e);
+ e->target.callback(RENDEVOUS_DETACH, e);
+ }
+ e->target.device = NULL;
+ e->target.callback = NULL;
+ return (error);
+ }
+ }
+ return (ENOENT);
+}
+
+/*
+ * Functions of the proxy that is interposed between the ethernet interface
+ * driver and the miibus device.
+ */
+
+static int
+miiproxy_rendevous_callback(enum rendevous_op op, struct rendevous_entry *rendevous)
+{
+ struct miiproxy_softc *sc = device_get_softc(rendevous->proxy.device);
+
+ switch (op) {
+ case RENDEVOUS_ATTACH:
+ sc->mdio = device_get_parent(rendevous->target.device);
+ break;
+ case RENDEVOUS_DETACH:
+ sc->mdio = NULL;
+ break;
+ }
+ return (0);
+}
+
+static int
+miiproxy_probe(device_t dev)
+{
+ device_set_desc(dev, "MII/MDIO proxy, MII side");
+
+ return (BUS_PROBE_SPECIFIC);
+}
+
+static int
+miiproxy_attach(device_t dev)
+{
+
+ /*
+ * The ethernet interface needs to call mii_attach_proxy() to pass
+ * the relevant parameters for rendevous with the MDIO target.
+ */
+ return (bus_generic_attach(dev));
+}
+
+static int
+miiproxy_detach(device_t dev)
+{
+
+ rendevous_unregister_proxy(dev);
+ bus_generic_detach(dev);
+ return (0);
+}
+
+static int
+miiproxy_readreg(device_t dev, int phy, int reg)
+{
+ struct miiproxy_softc *sc = device_get_softc(dev);
+
+ if (sc->mdio != NULL)
+ return (MDIO_READREG(sc->mdio, phy, reg));
+ return (-1);
+}
+
+static int
+miiproxy_writereg(device_t dev, int phy, int reg, int val)
+{
+ struct miiproxy_softc *sc = device_get_softc(dev);
+
+ if (sc->mdio != NULL)
+ return (MDIO_WRITEREG(sc->mdio, phy, reg, val));
+ return (-1);
+}
+
+static void
+miiproxy_statchg(device_t dev)
+{
+
+ MIIBUS_STATCHG(device_get_parent(dev));
+}
+
+static void
+miiproxy_linkchg(device_t dev)
+{
+
+ MIIBUS_LINKCHG(device_get_parent(dev));
+}
+
+static void
+miiproxy_mediainit(device_t dev)
+{
+
+ MIIBUS_MEDIAINIT(device_get_parent(dev));
+}
+
+/*
+ * Functions for the MDIO target device driver.
+ */
+static int
+mdioproxy_rendevous_callback(enum rendevous_op op, struct rendevous_entry *rendevous)
+{
+ return (0);
+}
+
+static void
+mdioproxy_identify(driver_t *driver, device_t parent)
+{
+ device_t child;
+
+ if (device_find_child(parent, driver->name, -1) == NULL) {
+ child = BUS_ADD_CHILD(parent, 0, driver->name, -1);
+ }
+}
+
+static int
+mdioproxy_probe(device_t dev)
+{
+ device_set_desc(dev, "MII/MDIO proxy, MDIO side");
+
+ return (BUS_PROBE_SPECIFIC);
+}
+
+static int
+mdioproxy_attach(device_t dev)
+{
+
+ rendevous_register_target(dev, mdioproxy_rendevous_callback);
+ return (bus_generic_attach(dev));
+}
+
+static int
+mdioproxy_detach(device_t dev)
+{
+
+ rendevous_unregister_target(dev);
+ bus_generic_detach(dev);
+ return (0);
+}
+
+/*
+ * Attach this proxy in place of miibus. The target MDIO must be attached
+ * already. Returns NULL on error.
+ */
+device_t
+mii_attach_proxy(device_t dev)
+{
+ struct miiproxy_softc *sc;
+ int error;
+ const char *name;
+ device_t miiproxy;
+
+ if (resource_string_value(device_get_name(dev),
+ device_get_unit(dev), "mdio", &name) != 0) {
+ if (bootverbose)
+ printf("mii_attach_proxy: not attaching, no mdio"
+ " device hint for %s\n", device_get_nameunit(dev));
+ return (NULL);
+ }
+
+ miiproxy = device_add_child(dev, miiproxy_driver.name, -1);
+ error = bus_generic_attach(dev);
+ if (error != 0) {
+ device_printf(dev, "can't attach miiproxy\n");
+ return (NULL);
+ }
+ sc = device_get_softc(miiproxy);
+ sc->parent = dev;
+ sc->proxy = miiproxy;
+ if (rendevous_register_proxy(miiproxy, name, miiproxy_rendevous_callback) != 0) {
+ device_printf(dev, "can't attach proxy\n");
+ return (NULL);
+ }
+ device_printf(miiproxy, "attached to target %s\n", device_get_nameunit(sc->mdio));
+ return (miiproxy);
+}
+
+static device_method_t miiproxy_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_probe, miiproxy_probe),
+ DEVMETHOD(device_attach, miiproxy_attach),
+ DEVMETHOD(device_detach, miiproxy_detach),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ /* MII interface */
+ DEVMETHOD(miibus_readreg, miiproxy_readreg),
+ DEVMETHOD(miibus_writereg, miiproxy_writereg),
+ DEVMETHOD(miibus_statchg, miiproxy_statchg),
+ DEVMETHOD(miibus_linkchg, miiproxy_linkchg),
+ DEVMETHOD(miibus_mediainit, miiproxy_mediainit),
+
+ DEVMETHOD_END
+};
+
+static device_method_t mdioproxy_methods[] = {
+ /* device interface */
+ DEVMETHOD(device_identify, mdioproxy_identify),
+ DEVMETHOD(device_probe, mdioproxy_probe),
+ DEVMETHOD(device_attach, mdioproxy_attach),
+ DEVMETHOD(device_detach, mdioproxy_detach),
+ DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_0(miiproxy, miiproxy_driver, miiproxy_methods,
+ sizeof(struct miiproxy_softc));
+DEFINE_CLASS_0(mdioproxy, mdioproxy_driver, mdioproxy_methods,
+ sizeof(struct mdioproxy_softc));
+
+devclass_t miiproxy_devclass;
+static devclass_t mdioproxy_devclass;
+
+DRIVER_MODULE(mdioproxy, mdio, mdioproxy_driver, mdioproxy_devclass, 0, 0);
+DRIVER_MODULE(miibus, miiproxy, miibus_driver, miibus_devclass, 0, 0);
+MODULE_VERSION(miiproxy, 1);
+MODULE_DEPEND(miiproxy, miibus, 1, 1, 1);
Property changes on: trunk/sys/dev/etherswitch/miiproxy.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/miiproxy.h
===================================================================
--- trunk/sys/dev/etherswitch/miiproxy.h (rev 0)
+++ trunk/sys/dev/etherswitch/miiproxy.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,38 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/miiproxy.h 234861 2012-05-01 06:11:38Z adrian $
+ */
+
+#ifndef __DEV_ETHERSWITCH_MIIPROXY_H__
+#define __DEV_ETHERSWITCH_MIIPROXY_H__
+
+extern devclass_t miiproxy_devclass;
+extern driver_t miiproxy_driver;
+
+device_t mii_attach_proxy(device_t dev);
+
+#endif /* __DEV_ETHERSWITCH_MIIPROXY_H__ */
Property changes on: trunk/sys/dev/etherswitch/miiproxy.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/rtl8366/rtl8366rb.c
===================================================================
--- trunk/sys/dev/etherswitch/rtl8366/rtl8366rb.c (rev 0)
+++ trunk/sys/dev/etherswitch/rtl8366/rtl8366rb.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,770 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/rtl8366/rtl8366rb.c 253569 2013-07-23 13:56:38Z loos $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/iicbus/iic.h>
+#include <dev/iicbus/iiconf.h>
+#include <dev/iicbus/iicbus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+
+#include <dev/etherswitch/etherswitch.h>
+#include <dev/etherswitch/rtl8366/rtl8366rbvar.h>
+
+#include "iicbus_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+
+struct rtl8366rb_softc {
+ struct mtx sc_mtx; /* serialize access to softc */
+ int smi_acquired; /* serialize access to SMI/I2C bus */
+ struct mtx callout_mtx; /* serialize callout */
+ device_t dev;
+ int vid[RTL8366RB_NUM_VLANS];
+ char *ifname[RTL8366RB_NUM_PHYS];
+ device_t miibus[RTL8366RB_NUM_PHYS];
+ struct ifnet *ifp[RTL8366RB_NUM_PHYS];
+ struct callout callout_tick;
+};
+
+static etherswitch_info_t etherswitch_info = {
+ .es_nports = RTL8366RB_NUM_PORTS,
+ .es_nvlangroups = RTL8366RB_NUM_VLANS,
+ .es_name = "Realtek RTL8366RB"
+};
+
+#define RTL_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
+#define RTL_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
+#define RTL_LOCK_ASSERT(_sc, _what) mtx_assert(&(_s)c->sc_mtx, (_what))
+#define RTL_TRYLOCK(_sc) mtx_trylock(&(_sc)->sc_mtx)
+
+#define RTL_WAITOK 0
+#define RTL_NOWAIT 1
+
+#define RTL_SMI_ACQUIRED 1
+#define RTL_SMI_ACQUIRED_ASSERT(_sc) \
+ KASSERT((_sc)->smi_acquired == RTL_SMI_ACQUIRED, ("smi must be acquired @%s", __FUNCTION__))
+
+#if defined(DEBUG)
+#define DPRINTF(dev, args...) device_printf(dev, args)
+#define DEVERR(dev, err, fmt, args...) do { \
+ if (err != 0) device_printf(dev, fmt, err, args); \
+ } while (0)
+#define DEBUG_INCRVAR(var) do { \
+ var++; \
+ } while (0)
+
+static int callout_blocked = 0;
+static int iic_select_retries = 0;
+static int phy_access_retries = 0;
+static SYSCTL_NODE(_debug, OID_AUTO, rtl8366rb, CTLFLAG_RD, 0, "rtl8366rb");
+SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, callout_blocked, CTLFLAG_RW, &callout_blocked, 0,
+ "number of times the callout couldn't acquire the bus");
+SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, iic_select_retries, CTLFLAG_RW, &iic_select_retries, 0,
+ "number of times the I2C bus selection had to be retried");
+SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, phy_access_retries, CTLFLAG_RW, &phy_access_retries, 0,
+ "number of times PHY register access had to be retried");
+#else
+#define DPRINTF(dev, args...)
+#define DEVERR(dev, err, fmt, args...)
+#define DEBUG_INCRVAR(var)
+#endif
+
+static int smi_probe(device_t dev);
+static int smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep);
+static int smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep);
+static int smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep);
+static void rtl8366rb_tick(void *arg);
+static int rtl8366rb_ifmedia_upd(struct ifnet *);
+static void rtl8366rb_ifmedia_sts(struct ifnet *, struct ifmediareq *);
+
+static void
+rtl8366rb_identify(driver_t *driver, device_t parent)
+{
+ device_t child;
+ struct iicbus_ivar *devi;
+
+ if (device_find_child(parent, "rtl8366rb", -1) == NULL) {
+ child = BUS_ADD_CHILD(parent, 0, "rtl8366rb", -1);
+ devi = IICBUS_IVAR(child);
+ devi->addr = RTL8366RB_IIC_ADDR;
+ }
+}
+
+static int
+rtl8366rb_probe(device_t dev)
+{
+ if (smi_probe(dev) != 0)
+ return (ENXIO);
+ device_set_desc(dev, "RTL8366RB Ethernet Switch Controller");
+ return (BUS_PROBE_DEFAULT);
+}
+
+static void
+rtl8366rb_init(device_t dev)
+{
+ /* Initialisation for TL-WR1043ND */
+ smi_rmw(dev, RTL8366RB_RCR,
+ RTL8366RB_RCR_HARD_RESET,
+ RTL8366RB_RCR_HARD_RESET, RTL_WAITOK);
+ DELAY(100000);
+ /* Enable 16 VLAN mode */
+ smi_rmw(dev, RTL8366RB_SGCR,
+ RTL8366RB_SGCR_EN_VLAN | RTL8366RB_SGCR_EN_VLAN_4KTB,
+ RTL8366RB_SGCR_EN_VLAN, RTL_WAITOK);
+ /* remove port 0 form VLAN 0 */
+ smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 0),
+ (1 << 0), 0, RTL_WAITOK);
+ /* add port 0 untagged and port 5 tagged to VLAN 1 */
+ smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 1),
+ ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT)
+ | ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT),
+ ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT
+ | ((1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT)),
+ RTL_WAITOK);
+ /* set PVLAN 1 for port 0 */
+ smi_rmw(dev, RTL8366RB_PVCR_REG(0),
+ RTL8366RB_PVCR_VAL(0, RTL8366RB_PVCR_PORT_MASK),
+ RTL8366RB_PVCR_VAL(0, 1), RTL_WAITOK);
+}
+
+static int
+rtl8366rb_attach(device_t dev)
+{
+ uint16_t rev = 0;
+ struct rtl8366rb_softc *sc;
+ char name[IFNAMSIZ];
+ int err = 0;
+ int i;
+
+ sc = device_get_softc(dev);
+ bzero(sc, sizeof(*sc));
+ sc->dev = dev;
+ mtx_init(&sc->sc_mtx, "rtl8366rb", NULL, MTX_DEF);
+ sc->smi_acquired = 0;
+ mtx_init(&sc->callout_mtx, "rtl8366rbcallout", NULL, MTX_DEF);
+
+ rtl8366rb_init(dev);
+ smi_read(dev, RTL8366RB_CVCR, &rev, RTL_WAITOK);
+ device_printf(dev, "rev. %d\n", rev & 0x000f);
+
+ /* attach miibus and phys */
+ /* PHYs need an interface, so we generate a dummy one */
+ for (i = 0; i < RTL8366RB_NUM_PHYS; i++) {
+ sc->ifp[i] = if_alloc(IFT_ETHER);
+ sc->ifp[i]->if_softc = sc;
+ sc->ifp[i]->if_flags |= IFF_UP | IFF_BROADCAST | IFF_DRV_RUNNING
+ | IFF_SIMPLEX;
+ snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(dev));
+ sc->ifname[i] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK);
+ bcopy(name, sc->ifname[i], strlen(name)+1);
+ if_initname(sc->ifp[i], sc->ifname[i], i);
+ err = mii_attach(dev, &sc->miibus[i], sc->ifp[i], rtl8366rb_ifmedia_upd, \
+ rtl8366rb_ifmedia_sts, BMSR_DEFCAPMASK, \
+ i, MII_OFFSET_ANY, 0);
+ if (err != 0) {
+ device_printf(dev, "attaching PHY %d failed\n", i);
+ return (err);
+ }
+ }
+
+ bus_generic_probe(dev);
+ bus_enumerate_hinted_children(dev);
+ err = bus_generic_attach(dev);
+ if (err != 0)
+ return (err);
+
+ callout_init_mtx(&sc->callout_tick, &sc->callout_mtx, 0);
+ rtl8366rb_tick(sc);
+
+ return (err);
+}
+
+static int
+rtl8366rb_detach(device_t dev)
+{
+ struct rtl8366rb_softc *sc = device_get_softc(dev);
+ int i;
+
+ for (i=0; i < RTL8366RB_NUM_PHYS; i++) {
+ if (sc->miibus[i])
+ device_delete_child(dev, sc->miibus[i]);
+ if (sc->ifp[i] != NULL)
+ if_free(sc->ifp[i]);
+ free(sc->ifname[i], M_DEVBUF);
+ }
+ bus_generic_detach(dev);
+ callout_drain(&sc->callout_tick);
+ mtx_destroy(&sc->callout_mtx);
+ mtx_destroy(&sc->sc_mtx);
+
+ return (0);
+}
+
+static void
+rtl8366rb_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active)
+{
+ *media_active = IFM_ETHER;
+ *media_status = IFM_AVALID;
+ if ((portstatus & RTL8366RB_PLSR_LINK) != 0)
+ *media_status |= IFM_ACTIVE;
+ else {
+ *media_active |= IFM_NONE;
+ return;
+ }
+ switch (portstatus & RTL8366RB_PLSR_SPEED_MASK) {
+ case RTL8366RB_PLSR_SPEED_10:
+ *media_active |= IFM_10_T;
+ break;
+ case RTL8366RB_PLSR_SPEED_100:
+ *media_active |= IFM_100_TX;
+ break;
+ case RTL8366RB_PLSR_SPEED_1000:
+ *media_active |= IFM_1000_T;
+ break;
+ }
+ if ((portstatus & RTL8366RB_PLSR_FULLDUPLEX) == 0)
+ *media_active |= IFM_FDX;
+ else
+ *media_active |= IFM_HDX;
+ if ((portstatus & RTL8366RB_PLSR_TXPAUSE) != 0)
+ *media_active |= IFM_ETH_TXPAUSE;
+ if ((portstatus & RTL8366RB_PLSR_RXPAUSE) != 0)
+ *media_active |= IFM_ETH_RXPAUSE;
+}
+
+static void
+rtl833rb_miipollstat(struct rtl8366rb_softc *sc)
+{
+ int i;
+ struct mii_data *mii;
+ struct mii_softc *miisc;
+ uint16_t value;
+ int portstatus;
+
+ for (i = 0; i < RTL8366RB_NUM_PHYS; i++) {
+ mii = device_get_softc(sc->miibus[i]);
+ if ((i % 2) == 0) {
+ if (smi_read(sc->dev, RTL8366RB_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) {
+ DEBUG_INCRVAR(callout_blocked);
+ return;
+ }
+ portstatus = value & 0xff;
+ } else {
+ portstatus = (value >> 8) & 0xff;
+ }
+ rtl8366rb_update_ifmedia(portstatus, &mii->mii_media_status, &mii->mii_media_active);
+ LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
+ if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != miisc->mii_inst)
+ continue;
+ mii_phy_update(miisc, MII_POLLSTAT);
+ }
+ }
+}
+
+static void
+rtl8366rb_tick(void *arg)
+{
+ struct rtl8366rb_softc *sc = arg;
+
+ rtl833rb_miipollstat(sc);
+ callout_reset(&sc->callout_tick, hz, rtl8366rb_tick, sc);
+}
+
+static int
+smi_probe(device_t dev)
+{
+ device_t iicbus, iicha;
+ int err, i;
+ uint16_t chipid;
+ char bytes[2];
+ int xferd;
+
+ bytes[0] = RTL8366RB_CIR & 0xff;
+ bytes[1] = (RTL8366RB_CIR >> 8) & 0xff;
+ iicbus = device_get_parent(dev);
+ iicha = device_get_parent(iicbus);
+ iicbus_reset(iicbus, IIC_FASTEST, RTL8366RB_IIC_ADDR, NULL);
+ for (i=3; i--; ) {
+ IICBUS_STOP(iicha);
+ /*
+ * we go directly to the host adapter because iicbus.c
+ * only issues a stop on a bus that was successfully started.
+ */
+ }
+ err = iicbus_request_bus(iicbus, dev, IIC_WAIT);
+ if (err != 0)
+ goto out;
+ err = iicbus_start(iicbus, RTL8366RB_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT);
+ if (err != 0)
+ goto out;
+ err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
+ if (err != 0)
+ goto out;
+ err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
+ if (err != 0)
+ goto out;
+ chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
+ DPRINTF(dev, "chip id 0x%04x\n", chipid);
+ if (chipid != RTL8366RB_CIR_ID8366RB)
+ err = ENXIO;
+out:
+ iicbus_stop(iicbus);
+ iicbus_release_bus(iicbus, dev);
+ return (err == 0 ? 0 : ENXIO);
+}
+
+static int
+smi_acquire(struct rtl8366rb_softc *sc, int sleep)
+{
+ int r = 0;
+ if (sleep == RTL_WAITOK)
+ RTL_LOCK(sc);
+ else
+ if (RTL_TRYLOCK(sc) == 0)
+ return (EWOULDBLOCK);
+ if (sc->smi_acquired == RTL_SMI_ACQUIRED)
+ r = EBUSY;
+ else {
+ r = iicbus_request_bus(device_get_parent(sc->dev), sc->dev, \
+ sleep == RTL_WAITOK ? IIC_WAIT : IIC_DONTWAIT);
+ if (r == 0)
+ sc->smi_acquired = RTL_SMI_ACQUIRED;
+ }
+ RTL_UNLOCK(sc);
+ return (r);
+}
+
+static int
+smi_release(struct rtl8366rb_softc *sc, int sleep)
+{
+ if (sleep == RTL_WAITOK)
+ RTL_LOCK(sc);
+ else
+ if (RTL_TRYLOCK(sc) == 0)
+ return (EWOULDBLOCK);
+ RTL_SMI_ACQUIRED_ASSERT(sc);
+ iicbus_release_bus(device_get_parent(sc->dev), sc->dev);
+ sc->smi_acquired = 0;
+ RTL_UNLOCK(sc);
+ return (0);
+}
+
+static int
+smi_select(device_t dev, int op, int sleep)
+{
+ int err, i;
+ device_t iicbus = device_get_parent(dev);
+ struct iicbus_ivar *devi = IICBUS_IVAR(dev);
+ int slave = devi->addr;
+
+ RTL_SMI_ACQUIRED_ASSERT((struct rtl8366rb_softc *)device_get_softc(dev));
+ /*
+ * The chip does not use clock stretching when it is busy,
+ * instead ignoring the command. Retry a few times.
+ */
+ for (i = RTL_IICBUS_RETRIES; i--; ) {
+ err = iicbus_start(iicbus, slave | op, RTL_IICBUS_TIMEOUT);
+ if (err != IIC_ENOACK)
+ break;
+ if (sleep == RTL_WAITOK) {
+ DEBUG_INCRVAR(iic_select_retries);
+ pause("smi_select", RTL_IICBUS_RETRY_SLEEP);
+ } else
+ break;
+ }
+ return (err);
+}
+
+static int
+smi_read_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t *data, int sleep)
+{
+ int err;
+ device_t iicbus = device_get_parent(sc->dev);
+ char bytes[2];
+ int xferd;
+
+ RTL_SMI_ACQUIRED_ASSERT(sc);
+ bytes[0] = addr & 0xff;
+ bytes[1] = (addr >> 8) & 0xff;
+ err = smi_select(sc->dev, RTL_IICBUS_READ, sleep);
+ if (err != 0)
+ goto out;
+ err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
+ if (err != 0)
+ goto out;
+ err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
+ if (err != 0)
+ goto out;
+ *data = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
+
+out:
+ iicbus_stop(iicbus);
+ return (err);
+}
+
+static int
+smi_write_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t data, int sleep)
+{
+ int err;
+ device_t iicbus = device_get_parent(sc->dev);
+ char bytes[4];
+ int xferd;
+
+ RTL_SMI_ACQUIRED_ASSERT(sc);
+ bytes[0] = addr & 0xff;
+ bytes[1] = (addr >> 8) & 0xff;
+ bytes[2] = data & 0xff;
+ bytes[3] = (data >> 8) & 0xff;
+
+ err = smi_select(sc->dev, RTL_IICBUS_WRITE, sleep);
+ if (err == 0)
+ err = iicbus_write(iicbus, bytes, 4, &xferd, RTL_IICBUS_TIMEOUT);
+ iicbus_stop(iicbus);
+
+ return (err);
+}
+
+static int
+smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep)
+{
+ struct rtl8366rb_softc *sc = device_get_softc(dev);
+ int err;
+
+ err = smi_acquire(sc, sleep);
+ if (err != 0)
+ return (EBUSY);
+ err = smi_read_locked(sc, addr, data, sleep);
+ smi_release(sc, sleep);
+ DEVERR(dev, err, "smi_read()=%d: addr=%04x\n", addr);
+ return (err == 0 ? 0 : EIO);
+}
+
+static int
+smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep)
+{
+ struct rtl8366rb_softc *sc = device_get_softc(dev);
+ int err;
+
+ err = smi_acquire(sc, sleep);
+ if (err != 0)
+ return (EBUSY);
+ err = smi_write_locked(sc, addr, data, sleep);
+ smi_release(sc, sleep);
+ DEVERR(dev, err, "smi_write()=%d: addr=%04x\n", addr);
+ return (err == 0 ? 0 : EIO);
+}
+
+static int
+smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep)
+{
+ struct rtl8366rb_softc *sc = device_get_softc(dev);
+ int err;
+ uint16_t oldv, newv;
+
+ err = smi_acquire(sc, sleep);
+ if (err != 0)
+ return (EBUSY);
+ if (err == 0) {
+ err = smi_read_locked(sc, addr, &oldv, sleep);
+ if (err == 0) {
+ newv = oldv & ~mask;
+ newv |= data & mask;
+ if (newv != oldv)
+ err = smi_write_locked(sc, addr, newv, sleep);
+ }
+ }
+ smi_release(sc, sleep);
+ DEVERR(dev, err, "smi_rmw()=%d: addr=%04x\n", addr);
+ return (err == 0 ? 0 : EIO);
+}
+
+static etherswitch_info_t *
+rtl_getinfo(device_t dev)
+{
+ return (ðerswitch_info);
+}
+
+static int
+rtl_readreg(device_t dev, int reg)
+{
+ uint16_t data = 0;
+
+ smi_read(dev, reg, &data, RTL_WAITOK);
+ return (data);
+}
+
+static int
+rtl_writereg(device_t dev, int reg, int value)
+{
+ return (smi_write(dev, reg, value, RTL_WAITOK));
+}
+
+static int
+rtl_getport(device_t dev, etherswitch_port_t *p)
+{
+ struct rtl8366rb_softc *sc;
+ struct ifmedia *ifm;
+ struct mii_data *mii;
+ struct ifmediareq *ifmr = &p->es_ifmr;
+ uint16_t v;
+ int err, vlangroup;
+
+ if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS)
+ return (ENXIO);
+ sc = device_get_softc(dev);
+ vlangroup = RTL8366RB_PVCR_GET(p->es_port,
+ rtl_readreg(dev, RTL8366RB_PVCR_REG(p->es_port)));
+ p->es_pvid = sc->vid[vlangroup];
+
+ if (p->es_port < RTL8366RB_NUM_PHYS) {
+ mii = device_get_softc(sc->miibus[p->es_port]);
+ ifm = &mii->mii_media;
+ err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCGIFMEDIA);
+ if (err)
+ return (err);
+ } else {
+ /* fill in fixed values for CPU port */
+ ifmr->ifm_count = 0;
+ smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PHYS)/2, &v, RTL_WAITOK);
+ v = v >> (8 * ((RTL8366RB_NUM_PHYS) % 2));
+ rtl8366rb_update_ifmedia(v, &ifmr->ifm_status, &ifmr->ifm_active);
+ ifmr->ifm_current = ifmr->ifm_active;
+ ifmr->ifm_mask = 0;
+ ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
+ }
+ return (0);
+}
+
+static int
+rtl_setport(device_t dev, etherswitch_port_t *p)
+{
+ int i, err, vlangroup;
+ struct rtl8366rb_softc *sc;
+ struct ifmedia *ifm;
+ struct mii_data *mii;
+
+ if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PHYS)
+ return (ENXIO);
+ sc = device_get_softc(dev);
+ vlangroup = -1;
+ for (i = 0; i < RTL8366RB_NUM_VLANS; i++) {
+ if (sc->vid[i] == p->es_pvid) {
+ vlangroup = i;
+ break;
+ }
+ }
+ if (vlangroup == -1)
+ return (ENXIO);
+ err = smi_rmw(dev, RTL8366RB_PVCR_REG(p->es_port),
+ RTL8366RB_PVCR_VAL(p->es_port, RTL8366RB_PVCR_PORT_MASK),
+ RTL8366RB_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK);
+ if (err)
+ return (err);
+ mii = device_get_softc(sc->miibus[p->es_port]);
+ ifm = &mii->mii_media;
+ err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCSIFMEDIA);
+ return (err);
+}
+
+static int
+rtl_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
+{
+ uint16_t vmcr[3];
+ int i;
+
+ for (i=0; i<3; i++)
+ vmcr[i] = rtl_readreg(dev, RTL8366RB_VMCR(i, vg->es_vlangroup));
+
+ vg->es_vid = RTL8366RB_VMCR_VID(vmcr) | ETHERSWITCH_VID_VALID;
+ vg->es_member_ports = RTL8366RB_VMCR_MEMBER(vmcr);
+ vg->es_untagged_ports = RTL8366RB_VMCR_UNTAG(vmcr);
+ vg->es_fid = RTL8366RB_VMCR_FID(vmcr);
+ return (0);
+}
+
+static int
+rtl_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
+{
+ struct rtl8366rb_softc *sc;
+ int g = vg->es_vlangroup;
+
+ sc = device_get_softc(dev);
+ sc->vid[g] = vg->es_vid;
+ rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_DOT1Q_REG, g),
+ (vg->es_vid << RTL8366RB_VMCR_DOT1Q_VID_SHIFT) & RTL8366RB_VMCR_DOT1Q_VID_MASK);
+ rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, g),
+ ((vg->es_member_ports << RTL8366RB_VMCR_MU_MEMBER_SHIFT) & RTL8366RB_VMCR_MU_MEMBER_MASK) |
+ ((vg->es_untagged_ports << RTL8366RB_VMCR_MU_UNTAG_SHIFT) & RTL8366RB_VMCR_MU_UNTAG_MASK));
+ rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_FID_REG, g),
+ vg->es_fid);
+ return (0);
+}
+
+static int
+rtl_readphy(device_t dev, int phy, int reg)
+{
+ struct rtl8366rb_softc *sc = device_get_softc(dev);
+ uint16_t data = 0;
+ int err, i, sleep;
+
+ if (phy < 0 || phy >= RTL8366RB_NUM_PHYS)
+ return (ENXIO);
+ if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG)
+ return (ENXIO);
+ sleep = RTL_WAITOK;
+ err = smi_acquire(sc, sleep);
+ if (err != 0)
+ return (EBUSY);
+ for (i = RTL_IICBUS_RETRIES; i--; ) {
+ err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_READ, sleep);
+ if (err == 0)
+ err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), 0, sleep);
+ if (err == 0) {
+ err = smi_read_locked(sc, RTL8366RB_PADR, &data, sleep);
+ break;
+ }
+ DEBUG_INCRVAR(phy_access_retries);
+ DPRINTF(dev, "rtl_readphy(): chip not responsive, retrying %d more times\n", i);
+ pause("rtl_readphy", RTL_IICBUS_RETRY_SLEEP);
+ }
+ smi_release(sc, sleep);
+ DEVERR(dev, err, "rtl_readphy()=%d: phy=%d.%02x\n", phy, reg);
+ return (data);
+}
+
+static int
+rtl_writephy(device_t dev, int phy, int reg, int data)
+{
+ struct rtl8366rb_softc *sc = device_get_softc(dev);
+ int err, i, sleep;
+
+ if (phy < 0 || phy >= RTL8366RB_NUM_PHYS)
+ return (ENXIO);
+ if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG)
+ return (ENXIO);
+ sleep = RTL_WAITOK;
+ err = smi_acquire(sc, sleep);
+ if (err != 0)
+ return (EBUSY);
+ for (i = RTL_IICBUS_RETRIES; i--; ) {
+ err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_WRITE, sleep);
+ if (err == 0)
+ err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), data, sleep);
+ if (err == 0) {
+ break;
+ }
+ DEBUG_INCRVAR(phy_access_retries);
+ DPRINTF(dev, "rtl_writephy(): chip not responsive, retrying %d more tiems\n", i);
+ pause("rtl_writephy", RTL_IICBUS_RETRY_SLEEP);
+ }
+ smi_release(sc, sleep);
+ DEVERR(dev, err, "rtl_writephy()=%d: phy=%d.%02x\n", phy, reg);
+ return (err == 0 ? 0 : EIO);
+}
+
+static int
+rtl8366rb_ifmedia_upd(struct ifnet *ifp)
+{
+ struct rtl8366rb_softc *sc = ifp->if_softc;
+ struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]);
+
+ mii_mediachg(mii);
+ return (0);
+}
+
+static void
+rtl8366rb_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
+{
+ struct rtl8366rb_softc *sc = ifp->if_softc;
+ struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]);
+
+ mii_pollstat(mii);
+ ifmr->ifm_active = mii->mii_media_active;
+ ifmr->ifm_status = mii->mii_media_status;
+}
+
+
+static device_method_t rtl8366rb_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_identify, rtl8366rb_identify),
+ DEVMETHOD(device_probe, rtl8366rb_probe),
+ DEVMETHOD(device_attach, rtl8366rb_attach),
+ DEVMETHOD(device_detach, rtl8366rb_detach),
+
+ /* bus interface */
+ DEVMETHOD(bus_add_child, device_add_child_ordered),
+
+ /* MII interface */
+ DEVMETHOD(miibus_readreg, rtl_readphy),
+ DEVMETHOD(miibus_writereg, rtl_writephy),
+
+ /* etherswitch interface */
+ DEVMETHOD(etherswitch_getinfo, rtl_getinfo),
+ DEVMETHOD(etherswitch_readreg, rtl_readreg),
+ DEVMETHOD(etherswitch_writereg, rtl_writereg),
+ DEVMETHOD(etherswitch_readphyreg, rtl_readphy),
+ DEVMETHOD(etherswitch_writephyreg, rtl_writephy),
+ DEVMETHOD(etherswitch_getport, rtl_getport),
+ DEVMETHOD(etherswitch_setport, rtl_setport),
+ DEVMETHOD(etherswitch_getvgroup, rtl_getvgroup),
+ DEVMETHOD(etherswitch_setvgroup, rtl_setvgroup),
+
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_0(rtl8366rb, rtl8366rb_driver, rtl8366rb_methods,
+ sizeof(struct rtl8366rb_softc));
+static devclass_t rtl8366rb_devclass;
+
+DRIVER_MODULE(rtl8366rb, iicbus, rtl8366rb_driver, rtl8366rb_devclass, 0, 0);
+DRIVER_MODULE(miibus, rtl8366rb, miibus_driver, miibus_devclass, 0, 0);
+DRIVER_MODULE(etherswitch, rtl8366rb, etherswitch_driver, etherswitch_devclass, 0, 0);
+MODULE_VERSION(rtl8366rb, 1);
+MODULE_DEPEND(rtl8366rb, iicbus, 1, 1, 1); /* XXX which versions? */
+MODULE_DEPEND(rtl8366rb, miibus, 1, 1, 1); /* XXX which versions? */
+MODULE_DEPEND(rtl8366rb, etherswitch, 1, 1, 1); /* XXX which versions? */
Property changes on: trunk/sys/dev/etherswitch/rtl8366/rtl8366rb.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h
===================================================================
--- trunk/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h (rev 0)
+++ trunk/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,177 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h 235288 2012-05-11 20:53:20Z adrian $
+ */
+
+#ifndef _DEV_ETHERSWITCH_RTL8366RBVAR_H_
+#define _DEV_ETHERSWITCH_RTL8366RBVAR_H_
+
+#define RTL8366RB_IIC_ADDR 0xa8
+#define RTL_IICBUS_TIMEOUT 100 /* us */
+#define RTL_IICBUS_READ 1
+#define RTL_IICBUS_WRITE 0
+/* number of times to try and select the chip on the I2C bus */
+#define RTL_IICBUS_RETRIES 3
+#define RTL_IICBUS_RETRY_SLEEP (hz/1000)
+
+/* Register definitions */
+
+/* Switch Global Configuration */
+#define RTL8366RB_SGCR 0x0000
+#define RTL8366RB_SGCR_EN_BC_STORM_CTRL 0x0001
+#define RTL8366RB_SGCR_MAX_LENGTH_MASK 0x0030
+#define RTL8366RB_SGCR_MAX_LENGTH_1522 0x0000
+#define RTL8366RB_SGCR_MAX_LENGTH_1536 0x0010
+#define RTL8366RB_SGCR_MAX_LENGTH_1552 0x0020
+#define RTL8366RB_SGCR_MAX_LENGTH_9216 0x0030
+#define RTL8366RB_SGCR_EN_VLAN 0x2000
+#define RTL8366RB_SGCR_EN_VLAN_4KTB 0x4000
+#define RTL8366RB_SGCR_EN_QOS 0x8000
+
+/* Port Enable Control: DISABLE_PORT[5:0] */
+#define RTL8366RB_PECR 0x0001
+
+/* Switch Security Control 0: DIS_LEARN[5:0] */
+#define RTL8366RB_SSCR0 0x0002
+
+/* Switch Security Control 1: DIS_AGE[5:0] */
+#define RTL8366RB_SSCR1 0x0003
+
+/* Switch Security Control 2 */
+#define RTL8366RB_SSCR2 0x0004
+#define RTL8366RB_SSCR2_DROP_UNKNOWN_DA 0x0001
+
+/* Port Link Status: two ports per register */
+#define RTL8366RB_PLSR_BASE 0x0014
+#define RTL8366RB_PLSR_SPEED_MASK 0x03
+#define RTL8366RB_PLSR_SPEED_10 0x00
+#define RTL8366RB_PLSR_SPEED_100 0x01
+#define RTL8366RB_PLSR_SPEED_1000 0x02
+#define RTL8366RB_PLSR_FULLDUPLEX 0x08
+#define RTL8366RB_PLSR_LINK 0x10
+#define RTL8366RB_PLSR_TXPAUSE 0x20
+#define RTL8366RB_PLSR_RXPAUSE 0x40
+#define RTL8366RB_PLSR_NO_AUTO 0x80
+
+/* VLAN Member Configuration, 3 registers per VLAN */
+#define RTL8366RB_VMCR_BASE 0x0020
+#define RTL8366RB_VMCR_MULT 3
+#define RTL8366RB_VMCR_DOT1Q_REG 0
+#define RTL8366RB_VMCR_DOT1Q_VID_SHIFT 0
+#define RTL8366RB_VMCR_DOT1Q_VID_MASK 0x0fff
+#define RTL8366RB_VMCR_DOT1Q_PCP_SHIFT 12
+#define RTL8366RB_VMCR_DOT1Q_PCP_MASK 0x7000
+#define RTL8366RB_VMCR_MU_REG 1
+#define RTL8366RB_VMCR_MU_MEMBER_SHIFT 0
+#define RTL8366RB_VMCR_MU_MEMBER_MASK 0x00ff
+#define RTL8366RB_VMCR_MU_UNTAG_SHIFT 8
+#define RTL8366RB_VMCR_MU_UNTAG_MASK 0xff00
+#define RTL8366RB_VMCR_FID_REG 2
+#define RTL8366RB_VMCR_FID_FID_SHIFT 0
+#define RTL8366RB_VMCR_FID_FID_MASK 0x0007
+#define RTL8366RB_VMCR(_reg, _vlan) \
+ (RTL8366RB_VMCR_BASE + _reg + _vlan * RTL8366RB_VMCR_MULT)
+/* VLAN Identifier */
+#define RTL8366RB_VMCR_VID(_r) \
+ (_r[RTL8366RB_VMCR_DOT1Q_REG] & RTL8366RB_VMCR_DOT1Q_VID_MASK)
+/* Priority Code Point */
+#define RTL8366RB_VMCR_PCP(_r) \
+ ((_r[RTL8366RB_VMCR_DOT1Q_REG] & RTL8366RB_VMCR_DOT1Q_PCP_MASK) \
+ >> RTL8366RB_VMCR_DOT1Q_PCP_SHIFT)
+/* Member ports */
+#define RTL8366RB_VMCR_MEMBER(_r) \
+ (_r[RTL8366RB_VMCR_MU_REG] & RTL8366RB_VMCR_MU_MEMBER_MASK)
+/* Untagged ports */
+#define RTL8366RB_VMCR_UNTAG(_r) \
+ ((_r[RTL8366RB_VMCR_MU_REG] & RTL8366RB_VMCR_MU_UNTAG_MASK) \
+ >> RTL8366RB_VMCR_MU_UNTAG_SHIFT)
+/* Forwarding ID */
+#define RTL8366RB_VMCR_FID(_r) \
+ (_r[RTL8366RB_VMCR_FID_REG] & RTL8366RB_VMCR_FID_FID_MASK)
+
+/*
+ * Port VLAN Control, 4 ports per register
+ * Determines the VID for untagged ingress frames through
+ * index into VMC.
+ */
+#define RTL8366RB_PVCR_BASE 0x0063
+#define RTL8366RB_PVCR_PORT_SHIFT 4
+#define RTL8366RB_PVCR_PORT_PERREG (16 / RTL8366RB_PVCR_PORT_SHIFT)
+#define RTL8366RB_PVCR_PORT_MASK 0x000f
+#define RTL8366RB_PVCR_REG(_port) \
+ (RTL8366RB_PVCR_BASE + _port / (RTL8366RB_PVCR_PORT_PERREG))
+#define RTL8366RB_PVCR_VAL(_port, _pvlan) \
+ ((_pvlan & RTL8366RB_PVCR_PORT_MASK) << \
+ ((_port % RTL8366RB_PVCR_PORT_PERREG) * RTL8366RB_PVCR_PORT_SHIFT))
+#define RTL8366RB_PVCR_GET(_port, _val) \
+ (((_val) >> ((_port % RTL8366RB_PVCR_PORT_PERREG) * RTL8366RB_PVCR_PORT_SHIFT)) & RTL8366RB_PVCR_PORT_MASK)
+
+/* Reset Control */
+#define RTL8366RB_RCR 0x0100
+#define RTL8366RB_RCR_HARD_RESET 0x0001
+#define RTL8366RB_RCR_SOFT_RESET 0x0002
+
+/* Chip Version Control: CHIP_VER[3:0] */
+#define RTL8366RB_CVCR 0x050A
+/* Chip Identifier */
+#define RTL8366RB_CIR 0x0509
+#define RTL8366RB_CIR_ID8366RB 0x5937
+
+/* VLAN Ingress Control 2: [5:0] */
+#define RTL8366RB_VIC2R 0x037f
+
+/* MIB registers */
+#define RTL8366RB_MCNT_BASE 0x1000
+#define RTL8366RB_MCTLR 0x13f0
+#define RTL8366RB_MCTLR_BUSY 0x0001
+#define RTL8366RB_MCTLR_RESET 0x0002
+#define RTL8366RB_MCTLR_RESET_PORT_MASK 0x00fc
+#define RTL8366RB_MCTLR_RESET_ALL 0x0800
+
+#define RTL8366RB_MCNT(_port, _r) \
+ (RTL8366RB_MCNT_BASE + 0x50 * (_port) + (_r))
+#define RTL8366RB_MCTLR_RESET_PORT(_p) \
+ (1 << ((_p) + 2))
+
+/* PHY Access Control */
+#define RTL8366RB_PACR 0x8000
+#define RTL8366RB_PACR_WRITE 0x0000
+#define RTL8366RB_PACR_READ 0x0001
+
+/* PHY Access Data */
+#define RTL8366RB_PADR 0x8002
+
+#define RTL8366RB_PHYREG(phy, page, reg) \
+ (RTL8366RB_PACR | (1 << (((phy) & 0x1f) + 9)) | (((page) & 0xf) << 5) | ((reg) & 0x1f))
+
+/* general characteristics of the chip */
+#define RTL8366RB_NUM_PORTS 6
+#define RTL8366RB_NUM_PHYS (RTL8366RB_NUM_PORTS-1)
+#define RTL8366RB_NUM_VLANS 16
+#define RTL8366RB_NUM_PHY_REG 32
+
+#endif
Property changes on: trunk/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/dev/etherswitch/ukswitch/ukswitch.c
===================================================================
--- trunk/sys/dev/etherswitch/ukswitch/ukswitch.c (rev 0)
+++ trunk/sys/dev/etherswitch/ukswitch/ukswitch.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -0,0 +1,571 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2013 Luiz Otavio O Souza.
+ * Copyright (c) 2011-2012 Stefan Bethke.
+ * Copyright (c) 2012 Adrian Chadd.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/dev/etherswitch/ukswitch/ukswitch.c 250384 2013-05-08 20:56:43Z adrian $
+ */
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/errno.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/socket.h>
+#include <sys/sockio.h>
+#include <sys/sysctl.h>
+#include <sys/systm.h>
+
+#include <net/if.h>
+#include <net/if_arp.h>
+#include <net/ethernet.h>
+#include <net/if_dl.h>
+#include <net/if_media.h>
+#include <net/if_types.h>
+
+#include <machine/bus.h>
+#include <dev/mii/mii.h>
+#include <dev/mii/miivar.h>
+#include <dev/etherswitch/mdio.h>
+
+#include <dev/etherswitch/etherswitch.h>
+
+#include "mdio_if.h"
+#include "miibus_if.h"
+#include "etherswitch_if.h"
+
+MALLOC_DECLARE(M_UKSWITCH);
+MALLOC_DEFINE(M_UKSWITCH, "ukswitch", "ukswitch data structures");
+
+struct ukswitch_softc {
+ struct mtx sc_mtx; /* serialize access to softc */
+ device_t sc_dev;
+ int media; /* cpu port media */
+ int cpuport; /* which PHY is connected to the CPU */
+ int phymask; /* PHYs we manage */
+ int numports; /* number of ports */
+ int ifpport[MII_NPHY];
+ int *portphy;
+ char **ifname;
+ device_t **miibus;
+ struct ifnet **ifp;
+ struct callout callout_tick;
+ etherswitch_info_t info;
+};
+
+#define UKSWITCH_LOCK(_sc) \
+ mtx_lock(&(_sc)->sc_mtx)
+#define UKSWITCH_UNLOCK(_sc) \
+ mtx_unlock(&(_sc)->sc_mtx)
+#define UKSWITCH_LOCK_ASSERT(_sc, _what) \
+ mtx_assert(&(_sc)->sc_mtx, (_what))
+#define UKSWITCH_TRYLOCK(_sc) \
+ mtx_trylock(&(_sc)->sc_mtx)
+
+#if defined(DEBUG)
+#define DPRINTF(dev, args...) device_printf(dev, args)
+#else
+#define DPRINTF(dev, args...)
+#endif
+
+static inline int ukswitch_portforphy(struct ukswitch_softc *, int);
+static void ukswitch_tick(void *);
+static int ukswitch_ifmedia_upd(struct ifnet *);
+static void ukswitch_ifmedia_sts(struct ifnet *, struct ifmediareq *);
+
+static int
+ukswitch_probe(device_t dev)
+{
+ struct ukswitch_softc *sc;
+
+ sc = device_get_softc(dev);
+ bzero(sc, sizeof(*sc));
+
+ device_set_desc_copy(dev, "Generic MDIO switch driver");
+ return (BUS_PROBE_DEFAULT);
+}
+
+static int
+ukswitch_attach_phys(struct ukswitch_softc *sc)
+{
+ int phy, port = 0, err = 0;
+ char name[IFNAMSIZ];
+
+ /* PHYs need an interface, so we generate a dummy one */
+ snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev));
+ for (phy = 0; phy < MII_NPHY; phy++) {
+ if (((1 << phy) & sc->phymask) == 0)
+ continue;
+ sc->ifpport[phy] = port;
+ sc->portphy[port] = phy;
+ sc->ifp[port] = if_alloc(IFT_ETHER);
+ sc->ifp[port]->if_softc = sc;
+ sc->ifp[port]->if_flags |= IFF_UP | IFF_BROADCAST |
+ IFF_DRV_RUNNING | IFF_SIMPLEX;
+ sc->ifname[port] = malloc(strlen(name)+1, M_UKSWITCH, M_WAITOK);
+ bcopy(name, sc->ifname[port], strlen(name)+1);
+ if_initname(sc->ifp[port], sc->ifname[port], port);
+ sc->miibus[port] = malloc(sizeof(device_t), M_UKSWITCH,
+ M_WAITOK | M_ZERO);
+ err = mii_attach(sc->sc_dev, sc->miibus[port], sc->ifp[port],
+ ukswitch_ifmedia_upd, ukswitch_ifmedia_sts, \
+ BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0);
+ DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n",
+ device_get_nameunit(*sc->miibus[port]),
+ sc->ifp[port]->if_xname);
+ if (err != 0) {
+ device_printf(sc->sc_dev,
+ "attaching PHY %d failed\n",
+ phy);
+ break;
+ }
+ sc->info.es_nports = port + 1;
+ if (++port >= sc->numports)
+ break;
+ }
+ return (err);
+}
+
+static int
+ukswitch_attach(device_t dev)
+{
+ struct ukswitch_softc *sc;
+ int err = 0;
+
+ sc = device_get_softc(dev);
+
+ sc->sc_dev = dev;
+ mtx_init(&sc->sc_mtx, "ukswitch", NULL, MTX_DEF);
+ strlcpy(sc->info.es_name, device_get_desc(dev),
+ sizeof(sc->info.es_name));
+
+ /* XXX Defaults */
+ sc->numports = 6;
+ sc->phymask = 0x0f;
+ sc->cpuport = -1;
+ sc->media = 100;
+
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "numports", &sc->numports);
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "phymask", &sc->phymask);
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "cpuport", &sc->cpuport);
+ (void) resource_int_value(device_get_name(dev), device_get_unit(dev),
+ "media", &sc->media);
+
+ /* Support only fast and giga ethernet. */
+ if (sc->media != 100 && sc->media != 1000)
+ sc->media = 100;
+
+ if (sc->cpuport != -1)
+ /* Always attach the cpu port. */
+ sc->phymask |= (1 << sc->cpuport);
+
+ /* We do not support any vlan groups. */
+ sc->info.es_nvlangroups = 0;
+
+ sc->ifp = malloc(sizeof(struct ifnet *) * sc->numports, M_UKSWITCH,
+ M_WAITOK | M_ZERO);
+ sc->ifname = malloc(sizeof(char *) * sc->numports, M_UKSWITCH,
+ M_WAITOK | M_ZERO);
+ sc->miibus = malloc(sizeof(device_t *) * sc->numports, M_UKSWITCH,
+ M_WAITOK | M_ZERO);
+ sc->portphy = malloc(sizeof(int) * sc->numports, M_UKSWITCH,
+ M_WAITOK | M_ZERO);
+
+ /*
+ * Attach the PHYs and complete the bus enumeration.
+ */
+ err = ukswitch_attach_phys(sc);
+ if (err != 0)
+ return (err);
+
+ bus_generic_probe(dev);
+ bus_enumerate_hinted_children(dev);
+ err = bus_generic_attach(dev);
+ if (err != 0)
+ return (err);
+
+ callout_init(&sc->callout_tick, 0);
+
+ ukswitch_tick(sc);
+
+ return (err);
+}
+
+static int
+ukswitch_detach(device_t dev)
+{
+ struct ukswitch_softc *sc = device_get_softc(dev);
+ int i, port;
+
+ callout_drain(&sc->callout_tick);
+
+ for (i=0; i < MII_NPHY; i++) {
+ if (((1 << i) & sc->phymask) == 0)
+ continue;
+ port = ukswitch_portforphy(sc, i);
+ if (sc->miibus[port] != NULL)
+ device_delete_child(dev, (*sc->miibus[port]));
+ if (sc->ifp[port] != NULL)
+ if_free(sc->ifp[port]);
+ free(sc->ifname[port], M_UKSWITCH);
+ free(sc->miibus[port], M_UKSWITCH);
+ }
+
+ free(sc->portphy, M_UKSWITCH);
+ free(sc->miibus, M_UKSWITCH);
+ free(sc->ifname, M_UKSWITCH);
+ free(sc->ifp, M_UKSWITCH);
+
+ bus_generic_detach(dev);
+ mtx_destroy(&sc->sc_mtx);
+
+ return (0);
+}
+
+/*
+ * Convert PHY number to port number.
+ */
+static inline int
+ukswitch_portforphy(struct ukswitch_softc *sc, int phy)
+{
+
+ return (sc->ifpport[phy]);
+}
+
+static inline struct mii_data *
+ukswitch_miiforport(struct ukswitch_softc *sc, int port)
+{
+
+ if (port < 0 || port > sc->numports)
+ return (NULL);
+ return (device_get_softc(*sc->miibus[port]));
+}
+
+static inline struct ifnet *
+ukswitch_ifpforport(struct ukswitch_softc *sc, int port)
+{
+
+ if (port < 0 || port > sc->numports)
+ return (NULL);
+ return (sc->ifp[port]);
+}
+
+/*
+ * Poll the status for all PHYs.
+ */
+static void
+ukswitch_miipollstat(struct ukswitch_softc *sc)
+{
+ int i, port;
+ struct mii_data *mii;
+ struct mii_softc *miisc;
+
+ UKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ for (i = 0; i < MII_NPHY; i++) {
+ if (((1 << i) & sc->phymask) == 0)
+ continue;
+ port = ukswitch_portforphy(sc, i);
+ if ((*sc->miibus[port]) == NULL)
+ continue;
+ mii = device_get_softc(*sc->miibus[port]);
+ LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
+ if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) !=
+ miisc->mii_inst)
+ continue;
+ ukphy_status(miisc);
+ mii_phy_update(miisc, MII_POLLSTAT);
+ }
+ }
+}
+
+static void
+ukswitch_tick(void *arg)
+{
+ struct ukswitch_softc *sc = arg;
+
+ ukswitch_miipollstat(sc);
+ callout_reset(&sc->callout_tick, hz, ukswitch_tick, sc);
+}
+
+static void
+ukswitch_lock(device_t dev)
+{
+ struct ukswitch_softc *sc = device_get_softc(dev);
+
+ UKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+ UKSWITCH_LOCK(sc);
+}
+
+static void
+ukswitch_unlock(device_t dev)
+{
+ struct ukswitch_softc *sc = device_get_softc(dev);
+
+ UKSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+ UKSWITCH_UNLOCK(sc);
+}
+
+static etherswitch_info_t *
+ukswitch_getinfo(device_t dev)
+{
+ struct ukswitch_softc *sc = device_get_softc(dev);
+
+ return (&sc->info);
+}
+
+static int
+ukswitch_getport(device_t dev, etherswitch_port_t *p)
+{
+ struct ukswitch_softc *sc = device_get_softc(dev);
+ struct mii_data *mii;
+ struct ifmediareq *ifmr = &p->es_ifmr;
+ int err, phy;
+
+ if (p->es_port < 0 || p->es_port >= sc->numports)
+ return (ENXIO);
+ p->es_pvid = 0;
+
+ phy = sc->portphy[p->es_port];
+ mii = ukswitch_miiforport(sc, p->es_port);
+ if (sc->cpuport != -1 && phy == sc->cpuport) {
+ /* fill in fixed values for CPU port */
+ p->es_flags |= ETHERSWITCH_PORT_CPU;
+ ifmr->ifm_count = 0;
+ if (sc->media == 100)
+ ifmr->ifm_current = ifmr->ifm_active =
+ IFM_ETHER | IFM_100_TX | IFM_FDX;
+ else
+ ifmr->ifm_current = ifmr->ifm_active =
+ IFM_ETHER | IFM_1000_T | IFM_FDX;
+ ifmr->ifm_mask = 0;
+ ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
+ } else if (mii != NULL) {
+ err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr,
+ &mii->mii_media, SIOCGIFMEDIA);
+ if (err)
+ return (err);
+ } else {
+ return (ENXIO);
+ }
+ return (0);
+}
+
+static int
+ukswitch_setport(device_t dev, etherswitch_port_t *p)
+{
+ struct ukswitch_softc *sc = device_get_softc(dev);
+ struct ifmedia *ifm;
+ struct mii_data *mii;
+ struct ifnet *ifp;
+ int err;
+
+ if (p->es_port < 0 || p->es_port >= sc->numports)
+ return (ENXIO);
+
+ if (sc->portphy[p->es_port] == sc->cpuport)
+ return (ENXIO);
+
+ mii = ukswitch_miiforport(sc, p->es_port);
+ if (mii == NULL)
+ return (ENXIO);
+
+ ifp = ukswitch_ifpforport(sc, p->es_port);
+
+ ifm = &mii->mii_media;
+ err = ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA);
+ return (err);
+}
+
+static int
+ukswitch_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
+{
+
+ /* Not supported. */
+ vg->es_vid = 0;
+ vg->es_member_ports = 0;
+ vg->es_untagged_ports = 0;
+ vg->es_fid = 0;
+ return (0);
+}
+
+static int
+ukswitch_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
+{
+
+ /* Not supported. */
+ return (0);
+}
+
+static void
+ukswitch_statchg(device_t dev)
+{
+
+ DPRINTF(dev, "%s\n", __func__);
+}
+
+static int
+ukswitch_ifmedia_upd(struct ifnet *ifp)
+{
+ struct ukswitch_softc *sc = ifp->if_softc;
+ struct mii_data *mii = ukswitch_miiforport(sc, ifp->if_dunit);
+
+ DPRINTF(sc->sc_dev, "%s\n", __func__);
+ if (mii == NULL)
+ return (ENXIO);
+ mii_mediachg(mii);
+ return (0);
+}
+
+static void
+ukswitch_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
+{
+ struct ukswitch_softc *sc = ifp->if_softc;
+ struct mii_data *mii = ukswitch_miiforport(sc, ifp->if_dunit);
+
+ DPRINTF(sc->sc_dev, "%s\n", __func__);
+
+ if (mii == NULL)
+ return;
+ mii_pollstat(mii);
+ ifmr->ifm_active = mii->mii_media_active;
+ ifmr->ifm_status = mii->mii_media_status;
+}
+
+static int
+ukswitch_readphy(device_t dev, int phy, int reg)
+{
+ struct ukswitch_softc *sc;
+ int data;
+
+ sc = device_get_softc(dev);
+ UKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ if (phy < 0 || phy >= 32)
+ return (ENXIO);
+ if (reg < 0 || reg >= 32)
+ return (ENXIO);
+
+ UKSWITCH_LOCK(sc);
+ data = MDIO_READREG(device_get_parent(dev), phy, reg);
+ UKSWITCH_UNLOCK(sc);
+
+ return (data);
+}
+
+static int
+ukswitch_writephy(device_t dev, int phy, int reg, int data)
+{
+ struct ukswitch_softc *sc;
+ int err;
+
+ sc = device_get_softc(dev);
+ UKSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
+
+ if (phy < 0 || phy >= 32)
+ return (ENXIO);
+ if (reg < 0 || reg >= 32)
+ return (ENXIO);
+
+ UKSWITCH_LOCK(sc);
+ err = MDIO_WRITEREG(device_get_parent(dev), phy, reg, data);
+ UKSWITCH_UNLOCK(sc);
+
+ return (err);
+}
+
+static int
+ukswitch_readreg(device_t dev, int addr)
+{
+ struct ukswitch_softc *sc;
+
+ sc = device_get_softc(dev);
+ UKSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+
+ /* Not supported. */
+ return (0);
+}
+
+static int
+ukswitch_writereg(device_t dev, int addr, int value)
+{
+ struct ukswitch_softc *sc;
+
+ sc = device_get_softc(dev);
+ UKSWITCH_LOCK_ASSERT(sc, MA_OWNED);
+
+ /* Not supported. */
+ return (0);
+}
+
+static device_method_t ukswitch_methods[] = {
+ /* Device interface */
+ DEVMETHOD(device_probe, ukswitch_probe),
+ DEVMETHOD(device_attach, ukswitch_attach),
+ DEVMETHOD(device_detach, ukswitch_detach),
+
+ /* bus interface */
+ DEVMETHOD(bus_add_child, device_add_child_ordered),
+
+ /* MII interface */
+ DEVMETHOD(miibus_readreg, ukswitch_readphy),
+ DEVMETHOD(miibus_writereg, ukswitch_writephy),
+ DEVMETHOD(miibus_statchg, ukswitch_statchg),
+
+ /* MDIO interface */
+ DEVMETHOD(mdio_readreg, ukswitch_readphy),
+ DEVMETHOD(mdio_writereg, ukswitch_writephy),
+
+ /* etherswitch interface */
+ DEVMETHOD(etherswitch_lock, ukswitch_lock),
+ DEVMETHOD(etherswitch_unlock, ukswitch_unlock),
+ DEVMETHOD(etherswitch_getinfo, ukswitch_getinfo),
+ DEVMETHOD(etherswitch_readreg, ukswitch_readreg),
+ DEVMETHOD(etherswitch_writereg, ukswitch_writereg),
+ DEVMETHOD(etherswitch_readphyreg, ukswitch_readphy),
+ DEVMETHOD(etherswitch_writephyreg, ukswitch_writephy),
+ DEVMETHOD(etherswitch_getport, ukswitch_getport),
+ DEVMETHOD(etherswitch_setport, ukswitch_setport),
+ DEVMETHOD(etherswitch_getvgroup, ukswitch_getvgroup),
+ DEVMETHOD(etherswitch_setvgroup, ukswitch_setvgroup),
+
+ DEVMETHOD_END
+};
+
+DEFINE_CLASS_0(ukswitch, ukswitch_driver, ukswitch_methods,
+ sizeof(struct ukswitch_softc));
+static devclass_t ukswitch_devclass;
+
+DRIVER_MODULE(ukswitch, mdio, ukswitch_driver, ukswitch_devclass, 0, 0);
+DRIVER_MODULE(miibus, ukswitch, miibus_driver, miibus_devclass, 0, 0);
+DRIVER_MODULE(mdio, ukswitch, mdio_driver, mdio_devclass, 0, 0);
+DRIVER_MODULE(etherswitch, ukswitch, etherswitch_driver, etherswitch_devclass, 0, 0);
+MODULE_VERSION(ukswitch, 1);
+MODULE_DEPEND(ukswitch, miibus, 1, 1, 1); /* XXX which versions? */
+MODULE_DEPEND(ukswitch, etherswitch, 1, 1, 1); /* XXX which versions? */
Property changes on: trunk/sys/dev/etherswitch/ukswitch/ukswitch.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/dev/exca/exca.c
===================================================================
--- trunk/sys/dev/exca/exca.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/exca/exca.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2002-2005 M Warner Losh. All rights reserved.
*
@@ -53,7 +54,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/sys/dev/exca/exca.c 189579 2009-03-09 13:29:13Z imp $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/dev/exca/excareg.h
===================================================================
--- trunk/sys/dev/exca/excareg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/exca/excareg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/* $NetBSD: i82365reg.h,v 1.3 1998/12/20 17:53:28 nathanw Exp $ */
-/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/exca/excareg.h 201450 2010-01-03 23:26:29Z imp $ */
/*-
* Copyright (c) 2002 M Warner Losh. All rights reserved.
Modified: trunk/sys/dev/exca/excavar.h
===================================================================
--- trunk/sys/dev/exca/excavar.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/exca/excavar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,4 +1,5 @@
/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/dev/exca/excavar.h 139749 2005-01-06 01:43:34Z imp $ */
/*-
* Copyright (c) 2002 M Warner Losh. All rights reserved.
Modified: trunk/sys/dev/fatm/firmware.h
===================================================================
--- trunk/sys/dev/fatm/firmware.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/fatm/firmware.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* (Copyright Notice)
*
@@ -37,6 +38,7 @@
*
* phk got permission from Fore to put firmware images into our tree.
*
+ * $FreeBSD: stable/10/sys/dev/fatm/firmware.h 139749 2005-01-06 01:43:34Z imp $
*/
static uint32_t firmware[] = {
Modified: trunk/sys/dev/fatm/if_fatm.c
===================================================================
--- trunk/sys/dev/fatm/if_fatm.c 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/fatm/if_fatm.c 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2001-2003
* Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -30,6 +31,7 @@
*/
#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/10/sys/dev/fatm/if_fatm.c 254263 2013-08-12 23:30:01Z scottl $");
#include "opt_inet.h"
#include "opt_natm.h"
@@ -2828,21 +2830,13 @@
ifp->if_linkmiblen = sizeof(IFP2IFATM(sc->ifp)->mib);
/*
- * Enable memory and bustmaster
+ * Enable busmaster
*/
- cfg = pci_read_config(dev, PCIR_COMMAND, 2);
- cfg |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN;
- pci_write_config(dev, PCIR_COMMAND, cfg, 2);
+ pci_enable_busmaster(dev);
/*
* Map memory
*/
- cfg = pci_read_config(dev, PCIR_COMMAND, 2);
- if (!(cfg & PCIM_CMD_MEMEN)) {
- if_printf(ifp, "failed to enable memory mapping\n");
- error = ENXIO;
- goto fail;
- }
sc->memid = 0x10;
sc->memres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->memid,
RF_ACTIVE);
Modified: trunk/sys/dev/fatm/if_fatm_rate.h
===================================================================
--- trunk/sys/dev/fatm/if_fatm_rate.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/fatm/if_fatm_rate.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2001-2003
* Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -35,6 +36,7 @@
* for(i=period-1; i>0; i--) printf "{ 0x%08x, %u },\n", \
* (i * 65536) + (period - i), i * linerate/period; }'
*
+ * $FreeBSD: stable/10/sys/dev/fatm/if_fatm_rate.h 139749 2005-01-06 01:43:34Z imp $
*/
{ 0x00000000, 353053 },
{ 0x00fe0001, 351668 },
Modified: trunk/sys/dev/fatm/if_fatmreg.h
===================================================================
--- trunk/sys/dev/fatm/if_fatmreg.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/fatm/if_fatmreg.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2001-2003
* Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -26,6 +27,7 @@
*
* Author: Hartmut Brandt <harti at freebsd.org>
*
+ * $FreeBSD: stable/10/sys/dev/fatm/if_fatmreg.h 139749 2005-01-06 01:43:34Z imp $
*
* Fore PCA200E hardware definitions.
*/
Modified: trunk/sys/dev/fatm/if_fatmvar.h
===================================================================
--- trunk/sys/dev/fatm/if_fatmvar.h 2018-05-27 23:50:56 UTC (rev 10107)
+++ trunk/sys/dev/fatm/if_fatmvar.h 2018-05-27 23:51:40 UTC (rev 10108)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2001-2003
* Fraunhofer Institute for Open Communication Systems (FhG Fokus).
@@ -26,6 +27,7 @@
*
* Author: Hartmut Brandt <harti at freebsd.org>
*
+ * $FreeBSD: stable/10/sys/dev/fatm/if_fatmvar.h 199559 2009-11-19 22:06:40Z jhb $
*
* Fore PCA200E driver definitions.
*/
More information about the Midnightbsd-cvs
mailing list