[Midnightbsd-cvs] src [10175] trunk/sys/amd64/include: sync with freebsd
laffer1 at midnightbsd.org
laffer1 at midnightbsd.org
Fri Jun 1 18:59:07 EDT 2018
Revision: 10175
http://svnweb.midnightbsd.org/src/?rev=10175
Author: laffer1
Date: 2018-06-01 18:59:06 -0400 (Fri, 01 Jun 2018)
Log Message:
-----------
sync with freebsd
Modified Paths:
--------------
trunk/sys/amd64/include/_limits.h
trunk/sys/amd64/include/_stdint.h
trunk/sys/amd64/include/_types.h
trunk/sys/amd64/include/acpica_machdep.h
trunk/sys/amd64/include/apicvar.h
trunk/sys/amd64/include/apm_bios.h
trunk/sys/amd64/include/asm.h
trunk/sys/amd64/include/asmacros.h
trunk/sys/amd64/include/atomic.h
trunk/sys/amd64/include/bus.h
trunk/sys/amd64/include/bus_dma.h
trunk/sys/amd64/include/clock.h
trunk/sys/amd64/include/cpu.h
trunk/sys/amd64/include/cpufunc.h
trunk/sys/amd64/include/cputypes.h
trunk/sys/amd64/include/db_machdep.h
trunk/sys/amd64/include/elf.h
trunk/sys/amd64/include/endian.h
trunk/sys/amd64/include/exec.h
trunk/sys/amd64/include/float.h
trunk/sys/amd64/include/floatingpoint.h
trunk/sys/amd64/include/fpu.h
trunk/sys/amd64/include/frame.h
trunk/sys/amd64/include/gdb_machdep.h
trunk/sys/amd64/include/ieeefp.h
trunk/sys/amd64/include/in_cksum.h
trunk/sys/amd64/include/intr_machdep.h
trunk/sys/amd64/include/iodev.h
trunk/sys/amd64/include/kdb.h
trunk/sys/amd64/include/limits.h
trunk/sys/amd64/include/md_var.h
trunk/sys/amd64/include/memdev.h
trunk/sys/amd64/include/metadata.h
trunk/sys/amd64/include/minidump.h
trunk/sys/amd64/include/mp_watchdog.h
trunk/sys/amd64/include/nexusvar.h
trunk/sys/amd64/include/param.h
trunk/sys/amd64/include/pc/bios.h
trunk/sys/amd64/include/pc/display.h
trunk/sys/amd64/include/pcb.h
trunk/sys/amd64/include/pci_cfgreg.h
trunk/sys/amd64/include/pcpu.h
trunk/sys/amd64/include/pmap.h
trunk/sys/amd64/include/pmc_mdep.h
trunk/sys/amd64/include/ppireg.h
trunk/sys/amd64/include/proc.h
trunk/sys/amd64/include/profile.h
trunk/sys/amd64/include/psl.h
trunk/sys/amd64/include/ptrace.h
trunk/sys/amd64/include/reg.h
trunk/sys/amd64/include/reloc.h
trunk/sys/amd64/include/resource.h
trunk/sys/amd64/include/runq.h
trunk/sys/amd64/include/segments.h
trunk/sys/amd64/include/setjmp.h
trunk/sys/amd64/include/sf_buf.h
trunk/sys/amd64/include/sigframe.h
trunk/sys/amd64/include/signal.h
trunk/sys/amd64/include/smp.h
trunk/sys/amd64/include/specialreg.h
trunk/sys/amd64/include/stack.h
trunk/sys/amd64/include/stdarg.h
trunk/sys/amd64/include/sysarch.h
trunk/sys/amd64/include/timerreg.h
trunk/sys/amd64/include/trap.h
trunk/sys/amd64/include/tss.h
trunk/sys/amd64/include/ucontext.h
trunk/sys/amd64/include/varargs.h
trunk/sys/amd64/include/vdso.h
trunk/sys/amd64/include/vm.h
trunk/sys/amd64/include/vmparam.h
trunk/sys/amd64/include/xen/hypercall.h
trunk/sys/amd64/include/xen/synch_bitops.h
trunk/sys/amd64/include/xen/xen-os.h
trunk/sys/amd64/include/xen/xenfunc.h
trunk/sys/amd64/include/xen/xenpmap.h
trunk/sys/amd64/include/xen/xenvar.h
Added Paths:
-----------
trunk/sys/amd64/include/counter.h
trunk/sys/amd64/include/fdt.h
trunk/sys/amd64/include/npx.h
trunk/sys/amd64/include/ofw_machdep.h
trunk/sys/amd64/include/vmm.h
trunk/sys/amd64/include/vmm_dev.h
trunk/sys/amd64/include/vmm_instruction_emul.h
Modified: trunk/sys/amd64/include/_limits.h
===================================================================
--- trunk/sys/amd64/include/_limits.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/_limits.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,87 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1988, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)limits.h 8.3 (Berkeley) 1/4/94
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/_limits.h 232262 2012-02-28 18:24:28Z tijl $ */
-#ifndef _MACHINE__LIMITS_H_
-#define _MACHINE__LIMITS_H_
-
-/*
- * According to ANSI (section 2.2.4.2), the values below must be usable by
- * #if preprocessing directives. Additionally, the expression must have the
- * same type as would an expression that is an object of the corresponding
- * type converted according to the integral promotions. The subtraction for
- * INT_MIN, etc., is so the value is not unsigned; e.g., 0x80000000 is an
- * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2).
- */
-
-#define __CHAR_BIT 8 /* number of bits in a char */
-
-#define __SCHAR_MAX 0x7f /* max value for a signed char */
-#define __SCHAR_MIN (-0x7f - 1) /* min value for a signed char */
-
-#define __UCHAR_MAX 0xff /* max value for an unsigned char */
-
-#define __USHRT_MAX 0xffff /* max value for an unsigned short */
-#define __SHRT_MAX 0x7fff /* max value for a short */
-#define __SHRT_MIN (-0x7fff - 1) /* min value for a short */
-
-#define __UINT_MAX 0xffffffff /* max value for an unsigned int */
-#define __INT_MAX 0x7fffffff /* max value for an int */
-#define __INT_MIN (-0x7fffffff - 1) /* min value for an int */
-
-#define __ULONG_MAX 0xffffffffffffffff /* max for an unsigned long */
-#define __LONG_MAX 0x7fffffffffffffff /* max for a long */
-#define __LONG_MIN (-0x7fffffffffffffff - 1) /* min for a long */
-
- /* max value for an unsigned long long */
-#define __ULLONG_MAX 0xffffffffffffffffULL
-#define __LLONG_MAX 0x7fffffffffffffffLL /* max value for a long long */
-#define __LLONG_MIN (-0x7fffffffffffffffLL - 1) /* min for a long long */
-
-#define __SSIZE_MAX __LONG_MAX /* max value for a ssize_t */
-
-#define __SIZE_T_MAX __ULONG_MAX /* max value for a size_t */
-
-#define __OFF_MAX __LONG_MAX /* max value for an off_t */
-#define __OFF_MIN __LONG_MIN /* min value for an off_t */
-
-/* Quads and longs are the same on the amd64. Ensure they stay in sync. */
-#define __UQUAD_MAX __ULONG_MAX /* max value for a uquad_t */
-#define __QUAD_MAX __LONG_MAX /* max value for a quad_t */
-#define __QUAD_MIN __LONG_MIN /* min value for a quad_t */
-
-#define __LONG_BIT 64
-#define __WORD_BIT 32
-
-/* Minimum signal stack size. */
-#define __MINSIGSTKSZ (512 * 4)
-
-#endif /* !_MACHINE__LIMITS_H_ */
+#include <x86/_limits.h>
Modified: trunk/sys/amd64/include/_stdint.h
===================================================================
--- trunk/sys/amd64/include/_stdint.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/_stdint.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,171 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2001, 2002 Mike Barcroft <mike at FreeBSD.org>
- * Copyright (c) 2001 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Klaus Klein.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/_stdint.h 232264 2012-02-28 18:38:33Z tijl $ */
-#ifndef _MACHINE__STDINT_H_
-#define _MACHINE__STDINT_H_
-
-#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS)
-
-#define INT8_C(c) (c)
-#define INT16_C(c) (c)
-#define INT32_C(c) (c)
-#define INT64_C(c) (c ## L)
-
-#define UINT8_C(c) (c)
-#define UINT16_C(c) (c)
-#define UINT32_C(c) (c ## U)
-#define UINT64_C(c) (c ## UL)
-
-#define INTMAX_C(c) INT64_C(c)
-#define UINTMAX_C(c) UINT64_C(c)
-
-#endif /* !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) */
-
-#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS)
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.1 Limits of exact-width integer types
- */
-/* Minimum values of exact-width signed integer types. */
-#define INT8_MIN (-0x7f-1)
-#define INT16_MIN (-0x7fff-1)
-#define INT32_MIN (-0x7fffffff-1)
-#define INT64_MIN (-0x7fffffffffffffffL-1)
-
-/* Maximum values of exact-width signed integer types. */
-#define INT8_MAX 0x7f
-#define INT16_MAX 0x7fff
-#define INT32_MAX 0x7fffffff
-#define INT64_MAX 0x7fffffffffffffffL
-
-/* Maximum values of exact-width unsigned integer types. */
-#define UINT8_MAX 0xff
-#define UINT16_MAX 0xffff
-#define UINT32_MAX 0xffffffffU
-#define UINT64_MAX 0xffffffffffffffffUL
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.2 Limits of minimum-width integer types
- */
-/* Minimum values of minimum-width signed integer types. */
-#define INT_LEAST8_MIN INT8_MIN
-#define INT_LEAST16_MIN INT16_MIN
-#define INT_LEAST32_MIN INT32_MIN
-#define INT_LEAST64_MIN INT64_MIN
-
-/* Maximum values of minimum-width signed integer types. */
-#define INT_LEAST8_MAX INT8_MAX
-#define INT_LEAST16_MAX INT16_MAX
-#define INT_LEAST32_MAX INT32_MAX
-#define INT_LEAST64_MAX INT64_MAX
-
-/* Maximum values of minimum-width unsigned integer types. */
-#define UINT_LEAST8_MAX UINT8_MAX
-#define UINT_LEAST16_MAX UINT16_MAX
-#define UINT_LEAST32_MAX UINT32_MAX
-#define UINT_LEAST64_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.3 Limits of fastest minimum-width integer types
- */
-/* Minimum values of fastest minimum-width signed integer types. */
-#define INT_FAST8_MIN INT32_MIN
-#define INT_FAST16_MIN INT32_MIN
-#define INT_FAST32_MIN INT32_MIN
-#define INT_FAST64_MIN INT64_MIN
-
-/* Maximum values of fastest minimum-width signed integer types. */
-#define INT_FAST8_MAX INT32_MAX
-#define INT_FAST16_MAX INT32_MAX
-#define INT_FAST32_MAX INT32_MAX
-#define INT_FAST64_MAX INT64_MAX
-
-/* Maximum values of fastest minimum-width unsigned integer types. */
-#define UINT_FAST8_MAX UINT32_MAX
-#define UINT_FAST16_MAX UINT32_MAX
-#define UINT_FAST32_MAX UINT32_MAX
-#define UINT_FAST64_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.4 Limits of integer types capable of holding object pointers
- */
-#define INTPTR_MIN INT64_MIN
-#define INTPTR_MAX INT64_MAX
-#define UINTPTR_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.2.5 Limits of greatest-width integer types
- */
-#define INTMAX_MIN INT64_MIN
-#define INTMAX_MAX INT64_MAX
-#define UINTMAX_MAX UINT64_MAX
-
-/*
- * ISO/IEC 9899:1999
- * 7.18.3 Limits of other integer types
- */
-/* Limits of ptrdiff_t. */
-#define PTRDIFF_MIN INT64_MIN
-#define PTRDIFF_MAX INT64_MAX
-
-/* Limits of sig_atomic_t. */
-#define SIG_ATOMIC_MIN INT32_MIN
-#define SIG_ATOMIC_MAX INT32_MAX
-
-/* Limit of size_t. */
-#define SIZE_MAX UINT64_MAX
-
-#ifndef WCHAR_MIN /* Also possibly defined in <wchar.h> */
-/* Limits of wchar_t. */
-#define WCHAR_MIN INT32_MIN
-#define WCHAR_MAX INT32_MAX
-#endif
-
-/* Limits of wint_t. */
-#define WINT_MIN INT32_MIN
-#define WINT_MAX INT32_MAX
-
-#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */
-
-#endif /* !_MACHINE__STDINT_H_ */
+#include <x86/_stdint.h>
Modified: trunk/sys/amd64/include/_types.h
===================================================================
--- trunk/sys/amd64/include/_types.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/_types.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,116 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2002 Mike Barcroft <mike at FreeBSD.org>
- * Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * From: @(#)ansi.h 8.2 (Berkeley) 1/4/94
- * From: @(#)types.h 8.3 (Berkeley) 1/5/94
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/_types.h 232261 2012-02-28 18:15:28Z tijl $ */
-#ifndef _MACHINE__TYPES_H_
-#define _MACHINE__TYPES_H_
-
-#ifndef _SYS_CDEFS_H_
-#error this file needs sys/cdefs.h as a prerequisite
-#endif
-
-#define __NO_STRICT_ALIGNMENT
-
-/*
- * Basic types upon which most other types are built.
- */
-typedef __signed char __int8_t;
-typedef unsigned char __uint8_t;
-typedef short __int16_t;
-typedef unsigned short __uint16_t;
-typedef int __int32_t;
-typedef unsigned int __uint32_t;
-typedef long __int64_t;
-typedef unsigned long __uint64_t;
-
-/*
- * Standard type definitions.
- */
-typedef __int32_t __clock_t; /* clock()... */
-typedef __int64_t __critical_t;
-typedef double __double_t;
-typedef float __float_t;
-typedef __int64_t __intfptr_t;
-typedef __int64_t __intmax_t;
-typedef __int64_t __intptr_t;
-typedef __int32_t __int_fast8_t;
-typedef __int32_t __int_fast16_t;
-typedef __int32_t __int_fast32_t;
-typedef __int64_t __int_fast64_t;
-typedef __int8_t __int_least8_t;
-typedef __int16_t __int_least16_t;
-typedef __int32_t __int_least32_t;
-typedef __int64_t __int_least64_t;
-typedef __int64_t __ptrdiff_t; /* ptr1 - ptr2 */
-typedef __int64_t __register_t;
-typedef __int64_t __segsz_t; /* segment size (in pages) */
-typedef __uint64_t __size_t; /* sizeof() */
-typedef __int64_t __ssize_t; /* byte count or error */
-typedef __int64_t __time_t; /* time()... */
-typedef __uint64_t __uintfptr_t;
-typedef __uint64_t __uintmax_t;
-typedef __uint64_t __uintptr_t;
-typedef __uint32_t __uint_fast8_t;
-typedef __uint32_t __uint_fast16_t;
-typedef __uint32_t __uint_fast32_t;
-typedef __uint64_t __uint_fast64_t;
-typedef __uint8_t __uint_least8_t;
-typedef __uint16_t __uint_least16_t;
-typedef __uint32_t __uint_least32_t;
-typedef __uint64_t __uint_least64_t;
-typedef __uint64_t __u_register_t;
-typedef __uint64_t __vm_offset_t;
-typedef __int64_t __vm_ooffset_t;
-typedef __uint64_t __vm_paddr_t;
-typedef __uint64_t __vm_pindex_t;
-typedef __uint64_t __vm_size_t;
-
-/*
- * Unusual type definitions.
- */
-#ifdef __GNUCLIKE_BUILTIN_VARARGS
-typedef __builtin_va_list __va_list; /* internally known to gcc */
-#elif defined(lint)
-typedef char * __va_list; /* pretend */
-#endif
-#if defined(__GNUC_VA_LIST_COMPATIBILITY) && !defined(__GNUC_VA_LIST) \
- && !defined(__NO_GNUC_VA_LIST)
-#define __GNUC_VA_LIST
-typedef __va_list __gnuc_va_list; /* compatibility w/GNU headers*/
-#endif
-
-#endif /* !_MACHINE__TYPES_H_ */
+#include <x86/_types.h>
Modified: trunk/sys/amd64/include/acpica_machdep.h
===================================================================
--- trunk/sys/amd64/include/acpica_machdep.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/acpica_machdep.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,84 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2002 Mitsuru IWASAKI
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/acpica_machdep.h 254305 2013-08-13 22:05:10Z jkim $ */
-/******************************************************************************
- *
- * Name: acpica_machdep.h - arch-specific defines, etc.
- * $Revision: 1.5 $
- *
- *****************************************************************************/
-
-#ifndef __ACPICA_MACHDEP_H__
-#define __ACPICA_MACHDEP_H__
-
-#ifdef _KERNEL
-/*
- * Calling conventions:
- *
- * ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
- * ACPI_EXTERNAL_XFACE - External ACPI interfaces
- * ACPI_INTERNAL_XFACE - Internal ACPI interfaces
- * ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
- */
-#define ACPI_SYSTEM_XFACE
-#define ACPI_EXTERNAL_XFACE
-#define ACPI_INTERNAL_XFACE
-#define ACPI_INTERNAL_VAR_XFACE
-
-/* Asm macros */
-
-#define ACPI_ASM_MACROS
-#define BREAKPOINT3
-#define ACPI_DISABLE_IRQS() disable_intr()
-#define ACPI_ENABLE_IRQS() enable_intr()
-
-#define ACPI_FLUSH_CPU_CACHE() wbinvd()
-
-/* Section 5.2.9.1: global lock acquire/release functions */
-extern int acpi_acquire_global_lock(uint32_t *lock);
-extern int acpi_release_global_lock(uint32_t *lock);
-#define ACPI_ACQUIRE_GLOBAL_LOCK(GLptr, Acq) do { \
- (Acq) = acpi_acquire_global_lock(&((GLptr)->GlobalLock)); \
-} while (0)
-#define ACPI_RELEASE_GLOBAL_LOCK(GLptr, Acq) do { \
- (Acq) = acpi_release_global_lock(&((GLptr)->GlobalLock)); \
-} while (0)
-
-#endif /* _KERNEL */
-
-#define ACPI_MACHINE_WIDTH 64
-#define COMPILER_DEPENDENT_INT64 long
-#define COMPILER_DEPENDENT_UINT64 unsigned long
-
-void acpi_SetDefaultIntrModel(int model);
-void acpi_cpu_c1(void);
-void *acpi_map_table(vm_paddr_t pa, const char *sig);
-void acpi_unmap_table(void *table);
-vm_paddr_t acpi_find_table(const char *sig);
-
-#endif /* __ACPICA_MACHDEP_H__ */
+#include <x86/acpica_machdep.h>
Modified: trunk/sys/amd64/include/apicvar.h
===================================================================
--- trunk/sys/amd64/include/apicvar.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/apicvar.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003 John Baldwin <jhb at FreeBSD.org>
* All rights reserved.
@@ -10,9 +11,6 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the author nor the names of any co-contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
@@ -26,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/apicvar.h 302165 2016-06-24 01:20:33Z sephe $
*/
#ifndef _MACHINE_APICVAR_H_
@@ -136,15 +134,6 @@
*/
#define APIC_SPURIOUS_INT 255
-#define LVT_LINT0 0
-#define LVT_LINT1 1
-#define LVT_TIMER 2
-#define LVT_ERROR 3
-#define LVT_PMC 4
-#define LVT_THERMAL 5
-#define LVT_CMCI 6
-#define LVT_MAX LVT_CMCI
-
#ifndef LOCORE
#define APIC_IPI_DEST_SELF -1
@@ -227,6 +216,7 @@
enum intr_trigger trigger);
void lapic_set_tpr(u_int vector);
void lapic_setup(int boot);
+void xen_intr_handle_upcall(struct trapframe *frame);
#endif /* !LOCORE */
#endif /* _MACHINE_APICVAR_H_ */
Modified: trunk/sys/amd64/include/apm_bios.h
===================================================================
--- trunk/sys/amd64/include/apm_bios.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/apm_bios.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,6 +1,7 @@
+/* $MidnightBSD$ */
/*-
* This file is in the public domain.
*/
-/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/amd64/include/apm_bios.h 215140 2010-11-11 19:36:21Z jkim $ */
#include <x86/apm_bios.h>
Modified: trunk/sys/amd64/include/asm.h
===================================================================
--- trunk/sys/amd64/include/asm.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/asm.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
@@ -30,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)DEFS.h 5.1 (Berkeley) 4/23/90
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/asm.h 254463 2013-08-17 19:24:58Z jilles $
*/
#ifndef _MACHINE_ASM_H_
@@ -43,7 +44,6 @@
#define PIC_GOT(x) x at GOTPCREL(%rip)
#else
#define PIC_PLT(x) x
-#define PIC_GOT(x) x
#endif
/*
@@ -81,11 +81,11 @@
#define RCSID(x) .text; .asciz x
-#undef __MBSDID
+#undef __FBSDID
#if !defined(lint) && !defined(STRIP_FBSDID)
-#define __MBSDID(s) .ident s
+#define __FBSDID(s) .ident s
#else
-#define __MBSDID(s) /* nothing */
+#define __FBSDID(s) /* nothing */
#endif /* not lint and not STRIP_FBSDID */
#endif /* !_MACHINE_ASM_H_ */
Modified: trunk/sys/amd64/include/asmacros.h
===================================================================
--- trunk/sys/amd64/include/asmacros.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/asmacros.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1993 The Regents of the University of California.
* All rights reserved.
@@ -26,7 +27,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/asmacros.h 274833 2014-11-22 00:01:14Z scottl $
*/
#ifndef _MACHINE_ASMACROS_H_
@@ -132,6 +133,16 @@
#define MEXITCOUNT
#endif /* GPROF */
+/*
+ * Convenience for adding frame pointers to hand-coded ASM. Useful for
+ * DTrace, HWPMC, and KDB.
+ */
+#define PUSH_FRAME_POINTER \
+ pushq %rbp ; \
+ movq %rsp, %rbp ;
+#define POP_FRAME_POINTER \
+ popq %rbp
+
#ifdef LOCORE
/*
* Convenience macro for declaring interrupt entry points.
Modified: trunk/sys/amd64/include/atomic.h
===================================================================
--- trunk/sys/amd64/include/atomic.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/atomic.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1998 Doug Rabson
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/atomic.h 302108 2016-06-23 02:21:37Z sephe $
*/
#ifndef _MACHINE_ATOMIC_H_
#define _MACHINE_ATOMIC_H_
@@ -54,6 +55,7 @@
* atomic_clear_int(P, V) (*(u_int *)(P) &= ~(V))
* atomic_add_int(P, V) (*(u_int *)(P) += (V))
* atomic_subtract_int(P, V) (*(u_int *)(P) -= (V))
+ * atomic_swap_int(P, V) (return (*(u_int *)(P)); *(u_int *)(P) = (V);)
* atomic_readandclear_int(P) (return (*(u_int *)(P)); *(u_int *)(P) = 0;)
*
* atomic_set_long(P, V) (*(u_long *)(P) |= (V))
@@ -60,6 +62,7 @@
* atomic_clear_long(P, V) (*(u_long *)(P) &= ~(V))
* atomic_add_long(P, V) (*(u_long *)(P) += (V))
* atomic_subtract_long(P, V) (*(u_long *)(P) -= (V))
+ * atomic_swap_long(P, V) (return (*(u_long *)(P)); *(u_long *)(P) = (V);)
* atomic_readandclear_long(P) (return (*(u_long *)(P)); *(u_long *)(P) = 0;)
*/
@@ -80,6 +83,10 @@
int atomic_cmpset_long(volatile u_long *dst, u_long expect, u_long src);
u_int atomic_fetchadd_int(volatile u_int *p, u_int v);
u_long atomic_fetchadd_long(volatile u_long *p, u_long v);
+int atomic_testandset_int(volatile u_int *p, u_int v);
+int atomic_testandset_long(volatile u_long *p, u_int v);
+int atomic_testandclear_int(volatile u_int *p, u_int v);
+int atomic_testandclear_long(volatile u_long *p, u_int v);
#define ATOMIC_LOAD(TYPE, LOP) \
u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p)
@@ -108,8 +115,8 @@
atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
{ \
__asm __volatile(MPLOCKED OP \
- : "=m" (*p) \
- : CONS (V), "m" (*p) \
+ : "+m" (*p) \
+ : CONS (V) \
: "cc"); \
} \
\
@@ -117,8 +124,8 @@
atomic_##NAME##_barr_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
{ \
__asm __volatile(MPLOCKED OP \
- : "=m" (*p) \
- : CONS (V), "m" (*p) \
+ : "+m" (*p) \
+ : CONS (V) \
: "memory", "cc"); \
} \
struct __hack
@@ -138,17 +145,14 @@
__asm __volatile(
" " MPLOCKED " "
- " cmpxchgl %2,%1 ; "
+ " cmpxchgl %3,%1 ; "
" sete %0 ; "
- "1: "
"# atomic_cmpset_int"
- : "=a" (res), /* 0 */
- "=m" (*dst) /* 1 */
- : "r" (src), /* 2 */
- "a" (expect), /* 3 */
- "m" (*dst) /* 4 */
+ : "=q" (res), /* 0 */
+ "+m" (*dst), /* 1 */
+ "+a" (expect) /* 2 */
+ : "r" (src) /* 3 */
: "memory", "cc");
-
return (res);
}
@@ -159,17 +163,14 @@
__asm __volatile(
" " MPLOCKED " "
- " cmpxchgq %2,%1 ; "
+ " cmpxchgq %3,%1 ; "
" sete %0 ; "
- "1: "
"# atomic_cmpset_long"
- : "=a" (res), /* 0 */
- "=m" (*dst) /* 1 */
- : "r" (src), /* 2 */
- "a" (expect), /* 3 */
- "m" (*dst) /* 4 */
+ : "=q" (res), /* 0 */
+ "+m" (*dst), /* 1 */
+ "+a" (expect) /* 2 */
+ : "r" (src) /* 3 */
: "memory", "cc");
-
return (res);
}
@@ -183,12 +184,11 @@
__asm __volatile(
" " MPLOCKED " "
- " xaddl %0, %1 ; "
+ " xaddl %0,%1 ; "
"# atomic_fetchadd_int"
- : "+r" (v), /* 0 (result) */
- "=m" (*p) /* 1 */
- : "m" (*p) /* 2 */
- : "cc");
+ : "+r" (v), /* 0 */
+ "+m" (*p) /* 1 */
+ : : "cc");
return (v);
}
@@ -202,15 +202,82 @@
__asm __volatile(
" " MPLOCKED " "
- " xaddq %0, %1 ; "
+ " xaddq %0,%1 ; "
"# atomic_fetchadd_long"
- : "+r" (v), /* 0 (result) */
- "=m" (*p) /* 1 */
- : "m" (*p) /* 2 */
- : "cc");
+ : "+r" (v), /* 0 */
+ "+m" (*p) /* 1 */
+ : : "cc");
return (v);
}
+static __inline int
+atomic_testandset_int(volatile u_int *p, u_int v)
+{
+ u_char res;
+
+ __asm __volatile(
+ " " MPLOCKED " "
+ " btsl %2,%1 ; "
+ " setc %0 ; "
+ "# atomic_testandset_int"
+ : "=q" (res), /* 0 */
+ "+m" (*p) /* 1 */
+ : "Ir" (v & 0x1f) /* 2 */
+ : "cc");
+ return (res);
+}
+
+static __inline int
+atomic_testandset_long(volatile u_long *p, u_int v)
+{
+ u_char res;
+
+ __asm __volatile(
+ " " MPLOCKED " "
+ " btsq %2,%1 ; "
+ " setc %0 ; "
+ "# atomic_testandset_long"
+ : "=q" (res), /* 0 */
+ "+m" (*p) /* 1 */
+ : "Jr" ((u_long)(v & 0x3f)) /* 2 */
+ : "cc");
+ return (res);
+}
+
+static __inline int
+atomic_testandclear_int(volatile u_int *p, u_int v)
+{
+ u_char res;
+
+ __asm __volatile(
+ " " MPLOCKED " "
+ " btrl %2,%1 ; "
+ " setc %0 ; "
+ "# atomic_testandclear_int"
+ : "=q" (res), /* 0 */
+ "+m" (*p) /* 1 */
+ : "Ir" (v & 0x1f) /* 2 */
+ : "cc");
+ return (res);
+}
+
+static __inline int
+atomic_testandclear_long(volatile u_long *p, u_int v)
+{
+ u_char res;
+
+ __asm __volatile(
+ " " MPLOCKED " "
+ " btrq %2,%1 ; "
+ " setc %0 ; "
+ "# atomic_testandclear_long"
+ : "=q" (res), /* 0 */
+ "+m" (*p) /* 1 */
+ : "Jr" ((u_long)(v & 0x3f)) /* 2 */
+ : "cc");
+ return (res);
+}
+
/*
* We assume that a = b will do atomic loads and stores. Due to the
* IA32 memory model, a simple store guarantees release semantics.
@@ -226,7 +293,7 @@
static __inline void \
atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
{ \
- __asm __volatile("" : : : "memory"); \
+ __compiler_membar(); \
*p = v; \
} \
struct __hack
@@ -240,7 +307,7 @@
u_##TYPE tmp; \
\
tmp = *p; \
- __asm __volatile("" : : : "memory"); \
+ __compiler_membar(); \
return (tmp); \
} \
struct __hack
@@ -255,10 +322,8 @@
\
__asm __volatile(MPLOCKED LOP \
: "=a" (res), /* 0 */ \
- "=m" (*p) /* 1 */ \
- : "m" (*p) /* 2 */ \
- : "memory", "cc"); \
- \
+ "+m" (*p) /* 1 */ \
+ : : "memory", "cc"); \
return (res); \
} \
struct __hack
@@ -303,45 +368,37 @@
#ifndef WANT_FUNCTIONS
-/* Read the current value and store a zero in the destination. */
+/* Read the current value and store a new value in the destination. */
#ifdef __GNUCLIKE_ASM
static __inline u_int
-atomic_readandclear_int(volatile u_int *addr)
+atomic_swap_int(volatile u_int *p, u_int v)
{
- u_int res;
- res = 0;
__asm __volatile(
" xchgl %1,%0 ; "
- "# atomic_readandclear_int"
- : "+r" (res), /* 0 */
- "=m" (*addr) /* 1 */
- : "m" (*addr));
-
- return (res);
+ "# atomic_swap_int"
+ : "+r" (v), /* 0 */
+ "+m" (*p)); /* 1 */
+ return (v);
}
static __inline u_long
-atomic_readandclear_long(volatile u_long *addr)
+atomic_swap_long(volatile u_long *p, u_long v)
{
- u_long res;
- res = 0;
__asm __volatile(
" xchgq %1,%0 ; "
- "# atomic_readandclear_long"
- : "+r" (res), /* 0 */
- "=m" (*addr) /* 1 */
- : "m" (*addr));
-
- return (res);
+ "# atomic_swap_long"
+ : "+r" (v), /* 0 */
+ "+m" (*p)); /* 1 */
+ return (v);
}
#else /* !__GNUCLIKE_ASM */
-u_int atomic_readandclear_int(volatile u_int *addr);
-u_long atomic_readandclear_long(volatile u_long *addr);
+u_int atomic_swap_int(volatile u_int *p, u_int v);
+u_long atomic_swap_long(volatile u_long *p, u_long v);
#endif /* __GNUCLIKE_ASM */
@@ -385,6 +442,9 @@
#define atomic_cmpset_acq_long atomic_cmpset_long
#define atomic_cmpset_rel_long atomic_cmpset_long
+#define atomic_readandclear_int(p) atomic_swap_int(p, 0)
+#define atomic_readandclear_long(p) atomic_swap_long(p, 0)
+
/* Operations on 8-bit bytes. */
#define atomic_set_8 atomic_set_char
#define atomic_set_acq_8 atomic_set_acq_char
@@ -435,8 +495,11 @@
#define atomic_cmpset_32 atomic_cmpset_int
#define atomic_cmpset_acq_32 atomic_cmpset_acq_int
#define atomic_cmpset_rel_32 atomic_cmpset_rel_int
+#define atomic_swap_32 atomic_swap_int
#define atomic_readandclear_32 atomic_readandclear_int
#define atomic_fetchadd_32 atomic_fetchadd_int
+#define atomic_testandset_32 atomic_testandset_int
+#define atomic_testandclear_32 atomic_testandclear_int
/* Operations on 64-bit quad words. */
#define atomic_set_64 atomic_set_long
@@ -456,7 +519,11 @@
#define atomic_cmpset_64 atomic_cmpset_long
#define atomic_cmpset_acq_64 atomic_cmpset_acq_long
#define atomic_cmpset_rel_64 atomic_cmpset_rel_long
+#define atomic_swap_64 atomic_swap_long
#define atomic_readandclear_64 atomic_readandclear_long
+#define atomic_fetchadd_64 atomic_fetchadd_long
+#define atomic_testandset_64 atomic_testandset_long
+#define atomic_testandclear_64 atomic_testandclear_long
/* Operations on pointers. */
#define atomic_set_ptr atomic_set_long
@@ -476,6 +543,7 @@
#define atomic_cmpset_ptr atomic_cmpset_long
#define atomic_cmpset_acq_ptr atomic_cmpset_acq_long
#define atomic_cmpset_rel_ptr atomic_cmpset_rel_long
+#define atomic_swap_ptr atomic_swap_long
#define atomic_readandclear_ptr atomic_readandclear_long
#endif /* !WANT_FUNCTIONS */
Modified: trunk/sys/amd64/include/bus.h
===================================================================
--- trunk/sys/amd64/include/bus.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/bus.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,6 +1,7 @@
+/* $MidnightBSD$ */
/*-
* This file is in the public domain.
*/
-/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/amd64/include/bus.h 244191 2012-12-13 21:27:20Z jimharris $ */
#include <x86/bus.h>
Modified: trunk/sys/amd64/include/bus_dma.h
===================================================================
--- trunk/sys/amd64/include/bus_dma.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/bus_dma.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2005 Scott Long
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/bus_dma.h 148275 2005-07-22 04:03:25Z obrien $
*/
#ifndef _AMD64_BUS_DMA_H_
Modified: trunk/sys/amd64/include/clock.h
===================================================================
--- trunk/sys/amd64/include/clock.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/clock.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,9 +1,10 @@
+/* $MidnightBSD$ */
/*-
* Kernel interface to machine-dependent clock driver.
* Garrett Wollman, September 1994.
* This file is in the public domain.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/clock.h 249324 2013-04-10 05:59:07Z neel $
*/
#ifndef _MACHINE_CLOCK_H_
@@ -20,6 +21,9 @@
extern uint64_t tsc_freq;
extern int tsc_is_invariant;
extern int tsc_perf_stat;
+#ifdef SMP
+extern int smp_tsc;
+#endif
void i8254_init(void);
Added: trunk/sys/amd64/include/counter.h
===================================================================
--- trunk/sys/amd64/include/counter.h (rev 0)
+++ trunk/sys/amd64/include/counter.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -0,0 +1,90 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2012 Konstantin Belousov <kib at FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/amd64/include/counter.h 252434 2013-07-01 02:48:27Z kib $
+ */
+
+#ifndef __MACHINE_COUNTER_H__
+#define __MACHINE_COUNTER_H__
+
+#include <sys/pcpu.h>
+
+extern struct pcpu __pcpu[1];
+
+#define counter_enter() do {} while (0)
+#define counter_exit() do {} while (0)
+
+#ifdef IN_SUBR_COUNTER_C
+static inline uint64_t
+counter_u64_read_one(uint64_t *p, int cpu)
+{
+
+ return (*(uint64_t *)((char *)p + sizeof(struct pcpu) * cpu));
+}
+
+static inline uint64_t
+counter_u64_fetch_inline(uint64_t *p)
+{
+ uint64_t r;
+ int i;
+
+ r = 0;
+ for (i = 0; i < mp_ncpus; i++)
+ r += counter_u64_read_one((uint64_t *)p, i);
+
+ return (r);
+}
+
+static void
+counter_u64_zero_one_cpu(void *arg)
+{
+
+ *((uint64_t *)((char *)arg + sizeof(struct pcpu) *
+ PCPU_GET(cpuid))) = 0;
+}
+
+static inline void
+counter_u64_zero_inline(counter_u64_t c)
+{
+
+ smp_rendezvous(smp_no_rendevous_barrier, counter_u64_zero_one_cpu,
+ smp_no_rendevous_barrier, c);
+}
+#endif
+
+#define counter_u64_add_protected(c, i) counter_u64_add(c, i)
+
+static inline void
+counter_u64_add(counter_u64_t c, int64_t inc)
+{
+
+ __asm __volatile("addq\t%1,%%gs:(%0)"
+ :
+ : "r" ((char *)c - (char *)&__pcpu[0]), "ri" (inc)
+ : "memory", "cc");
+}
+
+#endif /* ! __MACHINE_COUNTER_H__ */
Property changes on: trunk/sys/amd64/include/counter.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/amd64/include/cpu.h
===================================================================
--- trunk/sys/amd64/include/cpu.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/cpu.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
@@ -30,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)cpu.h 5.4 (Berkeley) 5/9/91
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/cpu.h 261275 2014-01-29 21:23:37Z jhb $
*/
#ifndef _MACHINE_CPU_H_
@@ -54,9 +55,25 @@
#define TRAPF_PC(framep) ((framep)->tf_rip)
#ifdef _KERNEL
+/*
+ * Struct containing pointers to CPU management functions whose
+ * implementation is run time selectable. Selection can be made,
+ * for example, based on detection of a particular CPU variant or
+ * hypervisor environment.
+ */
+struct cpu_ops {
+ void (*cpu_init)(void);
+ void (*cpu_resume)(void);
+ void (*ipi_vectored)(u_int, int);
+};
+
+extern struct cpu_ops cpu_ops;
extern char btext[];
extern char etext[];
+/* Resume hook for VMM. */
+extern void (*vmm_resume_p)(void);
+
void cpu_halt(void);
void cpu_reset(void);
void fork_trampoline(void);
Modified: trunk/sys/amd64/include/cpufunc.h
===================================================================
--- trunk/sys/amd64/include/cpufunc.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/cpufunc.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003 Peter Wemm.
* Copyright (c) 1993 The Regents of the University of California.
@@ -27,7 +28,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/cpufunc.h 313150 2017-02-03 12:20:44Z kib $
*/
/*
@@ -107,6 +108,13 @@
}
static __inline void
+clflushopt(u_long addr)
+{
+
+ __asm __volatile(".byte 0x66;clflush %0" : : "m" (*(char *)addr));
+}
+
+static __inline void
clts(void)
{
@@ -154,6 +162,14 @@
return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1);
}
+#define HAVE_INLINE_FFSLL
+
+static __inline int
+ffsll(long long mask)
+{
+ return (ffsl((long)mask));
+}
+
#define HAVE_INLINE_FLS
static __inline int
@@ -170,6 +186,14 @@
return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1);
}
+#define HAVE_INLINE_FLSLL
+
+static __inline int
+flsll(long long mask)
+{
+ return (flsl((long)mask));
+}
+
#endif /* _KERNEL */
static __inline void
@@ -304,6 +328,13 @@
}
static __inline void
+sfence(void)
+{
+
+ __asm __volatile("sfence" : : : "memory");
+}
+
+static __inline void
ia32_pause(void)
{
__asm __volatile("pause");
@@ -461,7 +492,35 @@
load_cr3(rcr3());
}
+#ifndef CR4_PGE
+#define CR4_PGE 0x00000080 /* Page global enable */
+#endif
+
/*
+ * Perform the guaranteed invalidation of all TLB entries. This
+ * includes the global entries, and entries in all PCIDs, not only the
+ * current context. The function works both on non-PCID CPUs and CPUs
+ * with the PCID turned off or on. See IA-32 SDM Vol. 3a 4.10.4.1
+ * Operations that Invalidate TLBs and Paging-Structure Caches.
+ */
+static __inline void
+invltlb_globpcid(void)
+{
+ uint64_t cr4;
+
+ cr4 = rcr4();
+ load_cr4(cr4 & ~CR4_PGE);
+ /*
+ * Although preemption at this point could be detrimental to
+ * performance, it would not lead to an error. PG_G is simply
+ * ignored if CR4.PGE is clear. Moreover, in case this block
+ * is re-entered, the load_cr4() either above or below will
+ * modify CR4.PGE flushing the TLB.
+ */
+ load_cr4(cr4 | CR4_PGE);
+}
+
+/*
* TLB flush for an individual page (even if it has PG_G).
* Only works on 486+ CPUs (i386 does not have PG_G).
*/
@@ -472,6 +531,26 @@
__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
}
+#define INVPCID_ADDR 0
+#define INVPCID_CTX 1
+#define INVPCID_CTXGLOB 2
+#define INVPCID_ALLCTX 3
+
+struct invpcid_descr {
+ uint64_t pcid:12 __packed;
+ uint64_t pad:52 __packed;
+ uint64_t addr;
+} __packed;
+
+static __inline void
+invpcid(struct invpcid_descr *d, int type)
+{
+
+ /* invpcid (%rdx),%rax */
+ __asm __volatile(".byte 0x66,0x0f,0x38,0x82,0x02"
+ : : "d" (d), "a" ((u_long)type) : "memory");
+}
+
static __inline u_short
rfs(void)
{
@@ -772,7 +851,7 @@
uint64_t rdr6(void);
uint64_t rdr7(void);
uint64_t rdtsc(void);
-u_int read_rflags(void);
+u_long read_rflags(void);
u_int rfs(void);
u_int rgs(void);
void wbinvd(void);
Modified: trunk/sys/amd64/include/cputypes.h
===================================================================
--- trunk/sys/amd64/include/cputypes.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/cputypes.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1993 Christopher G. Demetriou
* All rights reserved.
@@ -24,7 +25,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/cputypes.h 186797 2009-01-05 21:51:49Z jkim $
*/
#ifndef _MACHINE_CPUTYPES_H_
Modified: trunk/sys/amd64/include/db_machdep.h
===================================================================
--- trunk/sys/amd64/include/db_machdep.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/db_machdep.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Mach Operating System
* Copyright (c) 1991,1990 Carnegie Mellon University
@@ -23,7 +24,7 @@
* any improvements or extensions that they make and grant Carnegie Mellon
* the rights to redistribute these changes.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/db_machdep.h 139731 2005-01-05 20:17:21Z imp $
*/
#ifndef _MACHINE_DB_MACHDEP_H_
Modified: trunk/sys/amd64/include/elf.h
===================================================================
--- trunk/sys/amd64/include/elf.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/elf.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,124 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1996-1997 John D. Polstra.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/elf.h 247047 2013-02-20 17:39:52Z kib $ */
-#ifndef _MACHINE_ELF_H_
-#define _MACHINE_ELF_H_ 1
-
-/*
- * ELF definitions for the AMD64 architecture.
- */
-
-
-#ifndef __ELF_WORD_SIZE
-#define __ELF_WORD_SIZE 64 /* Used by <sys/elf_generic.h> */
-#endif
-#include <sys/elf32.h> /* Definitions common to all 32 bit architectures. */
-#include <sys/elf64.h> /* Definitions common to all 64 bit architectures. */
-#include <sys/elf_generic.h>
-
-#define ELF_ARCH EM_X86_64
-#define ELF_ARCH32 EM_386
-
-#define ELF_MACHINE_OK(x) ((x) == EM_X86_64)
-
-/*
- * Auxiliary vector entries for passing information to the interpreter.
- *
- * The i386 supplement to the SVR4 ABI specification names this "auxv_t",
- * but POSIX lays claim to all symbols ending with "_t".
- */
-typedef struct { /* Auxiliary vector entry on initial stack */
- int a_type; /* Entry type. */
- union {
- int a_val; /* Integer value. */
- } a_un;
-} Elf32_Auxinfo;
-
-
-typedef struct { /* Auxiliary vector entry on initial stack */
- long a_type; /* Entry type. */
- union {
- long a_val; /* Integer value. */
- void *a_ptr; /* Address. */
- void (*a_fcn)(void); /* Function pointer (not used). */
- } a_un;
-} Elf64_Auxinfo;
-
-__ElfType(Auxinfo);
-
-/* Values for a_type. */
-#define AT_NULL 0 /* Terminates the vector. */
-#define AT_IGNORE 1 /* Ignored entry. */
-#define AT_EXECFD 2 /* File descriptor of program to load. */
-#define AT_PHDR 3 /* Program header of program already loaded. */
-#define AT_PHENT 4 /* Size of each program header entry. */
-#define AT_PHNUM 5 /* Number of program header entries. */
-#define AT_PAGESZ 6 /* Page size in bytes. */
-#define AT_BASE 7 /* Interpreter's base address. */
-#define AT_FLAGS 8 /* Flags (unused for i386). */
-#define AT_ENTRY 9 /* Where interpreter should transfer control. */
-#define AT_NOTELF 10 /* Program is not ELF ?? */
-#define AT_UID 11 /* Real uid. */
-#define AT_EUID 12 /* Effective uid. */
-#define AT_GID 13 /* Real gid. */
-#define AT_EGID 14 /* Effective gid. */
-#define AT_EXECPATH 15 /* Path to the executable. */
-#define AT_CANARY 16 /* Canary for SSP */
-#define AT_CANARYLEN 17 /* Length of the canary. */
-#define AT_OSRELDATE 18 /* OSRELDATE. */
-#define AT_NCPUS 19 /* Number of CPUs. */
-#define AT_PAGESIZES 20 /* Pagesizes. */
-#define AT_PAGESIZESLEN 21 /* Number of pagesizes. */
-#define AT_TIMEKEEP 22 /* Pointer to timehands. */
-#define AT_STACKPROT 23 /* Initial stack protection. */
-
-#define AT_COUNT 24 /* Count of defined aux entry types. */
-
-/*
- * Relocation types.
- */
-
-#define R_X86_64_COUNT 24 /* Count of defined relocation types. */
-
-/* Define "machine" characteristics */
-#if __ELF_WORD_SIZE == 32
-#define ELF_TARG_CLASS ELFCLASS32
-#else
-#define ELF_TARG_CLASS ELFCLASS64
-#endif
-#define ELF_TARG_DATA ELFDATA2LSB
-#define ELF_TARG_MACH EM_X86_64
-#define ELF_TARG_VER 1
-
-#if __ELF_WORD_SIZE == 32
-#define ET_DYN_LOAD_ADDR 0x01001000
-#else
-#define ET_DYN_LOAD_ADDR 0x01021000
-#endif
-
-#endif /* !_MACHINE_ELF_H_ */
+#include <x86/elf.h>
Modified: trunk/sys/amd64/include/endian.h
===================================================================
--- trunk/sys/amd64/include/endian.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/endian.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,145 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1987, 1991 Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)endian.h 7.8 (Berkeley) 4/3/91
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/endian.h 232266 2012-02-28 19:39:54Z tijl $ */
-#ifndef _MACHINE_ENDIAN_H_
-#define _MACHINE_ENDIAN_H_
-
-#include <sys/cdefs.h>
-#include <sys/_types.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*
- * Define the order of 32-bit words in 64-bit words.
- */
-#define _QUAD_HIGHWORD 1
-#define _QUAD_LOWWORD 0
-
-/*
- * Definitions for byte order, according to byte significance from low
- * address to high.
- */
-#define _LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
-#define _BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */
-#define _PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-
-/*
- * Deprecated variants that don't have enough underscores to be useful in more
- * strict namespaces.
- */
-#if __BSD_VISIBLE
-#define LITTLE_ENDIAN _LITTLE_ENDIAN
-#define BIG_ENDIAN _BIG_ENDIAN
-#define PDP_ENDIAN _PDP_ENDIAN
-#define BYTE_ORDER _BYTE_ORDER
-#endif
-
-#if defined(__GNUCLIKE_ASM) && defined(__GNUCLIKE_BUILTIN_CONSTANT_P)
-
-#define __bswap64_const(_x) \
- (((_x) >> 56) | \
- (((_x) >> 40) & (0xffUL << 8)) | \
- (((_x) >> 24) & (0xffUL << 16)) | \
- (((_x) >> 8) & (0xffUL << 24)) | \
- (((_x) << 8) & (0xffUL << 32)) | \
- (((_x) << 24) & (0xffUL << 40)) | \
- (((_x) << 40) & (0xffUL << 48)) | \
- ((_x) << 56))
-
-#define __bswap32_const(_x) \
- (((_x) >> 24) | \
- (((_x) & (0xff << 16)) >> 8) | \
- (((_x) & (0xff << 8)) << 8) | \
- ((_x) << 24))
-
-#define __bswap16_const(_x) (__uint16_t)((_x) << 8 | (_x) >> 8)
-
-static __inline __uint64_t
-__bswap64_var(__uint64_t _x)
-{
-
- __asm ("bswap %0" : "+r" (_x));
- return (_x);
-}
-
-static __inline __uint32_t
-__bswap32_var(__uint32_t _x)
-{
-
- __asm ("bswap %0" : "+r" (_x));
- return (_x);
-}
-
-static __inline __uint16_t
-__bswap16_var(__uint16_t _x)
-{
-
- return (__bswap16_const(_x));
-}
-
-#define __bswap64(_x) \
- (__builtin_constant_p(_x) ? \
- __bswap64_const((__uint64_t)(_x)) : __bswap64_var(_x))
-
-#define __bswap32(_x) \
- (__builtin_constant_p(_x) ? \
- __bswap32_const((__uint32_t)(_x)) : __bswap32_var(_x))
-
-#define __bswap16(_x) \
- ((__uint16_t)(__builtin_constant_p(_x) ? \
- __bswap16_const((__uint16_t)(_x)) : __bswap16_var(_x)))
-
-#define __htonl(x) __bswap32(x)
-#define __htons(x) __bswap16(x)
-#define __ntohl(x) __bswap32(x)
-#define __ntohs(x) __bswap16(x)
-
-#else /* !(__GNUCLIKE_ASM && __GNUCLIKE_BUILTIN_CONSTANT_P) */
-
-/*
- * No optimizations are available for this compiler. Fall back to
- * non-optimized functions by defining the constant usually used to prevent
- * redefinition.
- */
-#define _BYTEORDER_FUNC_DEFINED
-
-#endif /* __GNUCLIKE_ASM && __GNUCLIKE_BUILTIN_CONSTANT_P */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !_MACHINE_ENDIAN_H_ */
+#include <x86/endian.h>
Modified: trunk/sys/amd64/include/exec.h
===================================================================
--- trunk/sys/amd64/include/exec.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/exec.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
@@ -27,7 +28,7 @@
* SUCH DAMAGE.
*
* @(#)exec.h 8.1 (Berkeley) 6/11/93
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/exec.h 142107 2005-02-19 21:16:48Z ru $
*/
#ifndef _MACHINE_EXEC_H_
Added: trunk/sys/amd64/include/fdt.h
===================================================================
--- trunk/sys/amd64/include/fdt.h (rev 0)
+++ trunk/sys/amd64/include/fdt.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -0,0 +1,7 @@
+/* $MidnightBSD$ */
+/*-
+ * This file is in the public domain.
+ */
+/* $FreeBSD: stable/10/sys/amd64/include/fdt.h 250840 2013-05-21 03:05:49Z marcel $ */
+
+#include <x86/fdt.h>
Property changes on: trunk/sys/amd64/include/fdt.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/amd64/include/float.h
===================================================================
--- trunk/sys/amd64/include/float.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/float.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,78 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1989 Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)float.h 7.1 (Berkeley) 5/8/90
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/float.h 232491 2012-03-04 14:00:32Z tijl $ */
-#ifndef _MACHINE_FLOAT_H_
-#define _MACHINE_FLOAT_H_ 1
-
-#include <sys/cdefs.h>
-
-__BEGIN_DECLS
-extern int __flt_rounds(void);
-__END_DECLS
-
-#define FLT_RADIX 2 /* b */
-#define FLT_ROUNDS __flt_rounds()
-#if __ISO_C_VISIBLE >= 1999
-#define FLT_EVAL_METHOD 0 /* no promotions */
-#define DECIMAL_DIG 21 /* max precision in decimal digits */
-#endif
-
-#define FLT_MANT_DIG 24 /* p */
-#define FLT_EPSILON 1.19209290E-07F /* b**(1-p) */
-#define FLT_DIG 6 /* floor((p-1)*log10(b))+(b == 10) */
-#define FLT_MIN_EXP (-125) /* emin */
-#define FLT_MIN 1.17549435E-38F /* b**(emin-1) */
-#define FLT_MIN_10_EXP (-37) /* ceil(log10(b**(emin-1))) */
-#define FLT_MAX_EXP 128 /* emax */
-#define FLT_MAX 3.40282347E+38F /* (1-b**(-p))*b**emax */
-#define FLT_MAX_10_EXP 38 /* floor(log10((1-b**(-p))*b**emax)) */
-
-#define DBL_MANT_DIG 53
-#define DBL_EPSILON 2.2204460492503131E-16
-#define DBL_DIG 15
-#define DBL_MIN_EXP (-1021)
-#define DBL_MIN 2.2250738585072014E-308
-#define DBL_MIN_10_EXP (-307)
-#define DBL_MAX_EXP 1024
-#define DBL_MAX 1.7976931348623157E+308
-#define DBL_MAX_10_EXP 308
-
-#define LDBL_MANT_DIG 64
-#define LDBL_EPSILON 1.0842021724855044340E-19L
-#define LDBL_DIG 18
-#define LDBL_MIN_EXP (-16381)
-#define LDBL_MIN 3.3621031431120935063E-4932L
-#define LDBL_MIN_10_EXP (-4931)
-#define LDBL_MAX_EXP 16384
-#define LDBL_MAX 1.1897314953572317650E+4932L
-#define LDBL_MAX_10_EXP 4932
-#endif /* _MACHINE_FLOAT_H_ */
+#include <x86/float.h>
Modified: trunk/sys/amd64/include/floatingpoint.h
===================================================================
--- trunk/sys/amd64/include/floatingpoint.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/floatingpoint.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1993 Andrew Moore, Talke Studio
* All rights reserved.
@@ -31,7 +32,7 @@
* SUCH DAMAGE.
*
* from: @(#) floatingpoint.h 1.0 (Berkeley) 9/23/93
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/floatingpoint.h 144544 2005-04-02 17:31:42Z netchild $
*/
#ifndef _FLOATINGPOINT_H_
Modified: trunk/sys/amd64/include/fpu.h
===================================================================
--- trunk/sys/amd64/include/fpu.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/fpu.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
@@ -30,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)npx.h 5.3 (Berkeley) 1/18/91
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/fpu.h 271999 2014-09-22 20:34:36Z jhb $
*/
/*
@@ -41,65 +42,8 @@
#ifndef _MACHINE_FPU_H_
#define _MACHINE_FPU_H_
-/* Contents of each x87 floating point accumulator */
-struct fpacc87 {
- uint8_t fp_bytes[10];
-};
+#include <x86/fpu.h>
-/* Contents of each SSE extended accumulator */
-struct xmmacc {
- uint8_t xmm_bytes[16];
-};
-
-/* Contents of the upper 16 bytes of each AVX extended accumulator */
-struct ymmacc {
- uint8_t ymm_bytes[16];
-};
-
-struct envxmm {
- uint16_t en_cw; /* control word (16bits) */
- uint16_t en_sw; /* status word (16bits) */
- uint8_t en_tw; /* tag word (8bits) */
- uint8_t en_zero;
- uint16_t en_opcode; /* opcode last executed (11 bits ) */
- uint64_t en_rip; /* floating point instruction pointer */
- uint64_t en_rdp; /* floating operand pointer */
- uint32_t en_mxcsr; /* SSE sontorol/status register */
- uint32_t en_mxcsr_mask; /* valid bits in mxcsr */
-};
-
-struct savefpu {
- struct envxmm sv_env;
- struct {
- struct fpacc87 fp_acc;
- uint8_t fp_pad[6]; /* padding */
- } sv_fp[8];
- struct xmmacc sv_xmm[16];
- uint8_t sv_pad[96];
-} __aligned(16);
-
-struct xstate_hdr {
- uint64_t xstate_bv;
- uint8_t xstate_rsrv0[16];
- uint8_t xstate_rsrv[40];
-};
-
-struct savefpu_xstate {
- struct xstate_hdr sx_hd;
- struct ymmacc sx_ymm[16];
-};
-
-struct savefpu_ymm {
- struct envxmm sv_env;
- struct {
- struct fpacc87 fp_acc;
- int8_t fp_pad[6]; /* padding */
- } sv_fp[8];
- struct xmmacc sv_xmm[16];
- uint8_t sv_pad[96];
- struct savefpu_xstate sv_xstate;
-} __aligned(64);
-
#ifdef _KERNEL
struct fpu_kern_ctx;
@@ -108,32 +52,6 @@
#define XSAVE_AREA_ALIGN 64
-#endif
-
-/*
- * The hardware default control word for i387's and later coprocessors is
- * 0x37F, giving:
- *
- * round to nearest
- * 64-bit precision
- * all exceptions masked.
- *
- * FreeBSD/i386 uses 53 bit precision for things like fadd/fsub/fsqrt etc
- * because of the difference between memory and fpu register stack arguments.
- * If its using an intermediate fpu register, it has 80/64 bits to work
- * with. If it uses memory, it has 64/53 bits to work with. However,
- * gcc is aware of this and goes to a fair bit of trouble to make the
- * best use of it.
- *
- * This is mostly academic for AMD64, because the ABI prefers the use
- * SSE2 based math. For FreeBSD/amd64, we go with the default settings.
- */
-#define __INITIAL_FPUCW__ 0x037F
-#define __INITIAL_FPUCW_I386__ 0x127F
-#define __INITIAL_MXCSR__ 0x1F80
-#define __INITIAL_MXCSR_MASK__ 0xFFBF
-
-#ifdef _KERNEL
void fpudna(void);
void fpudrop(void);
void fpuexit(struct thread *td);
@@ -141,11 +59,13 @@
int fpugetregs(struct thread *td);
void fpuinit(void);
void fpurestore(void *addr);
+void fpuresume(void *addr);
void fpusave(void *addr);
int fpusetregs(struct thread *td, struct savefpu *addr,
char *xfpustate, size_t xfpustate_size);
int fpusetxstate(struct thread *td, char *xfpustate,
size_t xfpustate_size);
+void fpususpend(void *addr);
int fputrap_sse(void);
int fputrap_x87(void);
void fpuuserinited(struct thread *td);
@@ -166,6 +86,7 @@
*/
#define FPU_KERN_NORMAL 0x0000
#define FPU_KERN_NOWAIT 0x0001
+#define FPU_KERN_KTHR 0x0002
#endif
Modified: trunk/sys/amd64/include/frame.h
===================================================================
--- trunk/sys/amd64/include/frame.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/frame.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,87 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2003 Peter Wemm.
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)frame.h 5.2 (Berkeley) 1/18/91
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/frame.h 247047 2013-02-20 17:39:52Z kib $ */
-#ifndef _MACHINE_FRAME_H_
-#define _MACHINE_FRAME_H_ 1
-
-/*
- * System stack frames.
- */
-
-/*
- * Exception/Trap Stack Frame
- *
- * The ordering of this is specifically so that we can take first 6
- * the syscall arguments directly from the beginning of the frame.
- */
-
-struct trapframe {
- register_t tf_rdi;
- register_t tf_rsi;
- register_t tf_rdx;
- register_t tf_rcx;
- register_t tf_r8;
- register_t tf_r9;
- register_t tf_rax;
- register_t tf_rbx;
- register_t tf_rbp;
- register_t tf_r10;
- register_t tf_r11;
- register_t tf_r12;
- register_t tf_r13;
- register_t tf_r14;
- register_t tf_r15;
- uint32_t tf_trapno;
- uint16_t tf_fs;
- uint16_t tf_gs;
- register_t tf_addr;
- uint32_t tf_flags;
- uint16_t tf_es;
- uint16_t tf_ds;
- /* below portion defined in hardware */
- register_t tf_err;
- register_t tf_rip;
- register_t tf_cs;
- register_t tf_rflags;
- register_t tf_rsp;
- register_t tf_ss;
-};
-
-#define TF_HASSEGS 0x1
-#define TF_HASBASES 0x2
-#define TF_HASFPXSTATE 0x4
-
-#endif /* _MACHINE_FRAME_H_ */
+#include <x86/frame.h>
Modified: trunk/sys/amd64/include/gdb_machdep.h
===================================================================
--- trunk/sys/amd64/include/gdb_machdep.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/gdb_machdep.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2004 Marcel Moolenaar
* All rights reserved.
@@ -23,7 +24,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/gdb_machdep.h 166520 2007-02-05 21:48:32Z jhb $
*/
#ifndef _MACHINE_GDB_MACHDEP_H_
Modified: trunk/sys/amd64/include/ieeefp.h
===================================================================
--- trunk/sys/amd64/include/ieeefp.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/ieeefp.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003 Peter Wemm.
* Copyright (c) 1990 Andrew Moore, Talke Studio
@@ -32,7 +33,7 @@
* SUCH DAMAGE.
*
* from: @(#) ieeefp.h 1.0 (Berkeley) 9/23/93
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/ieeefp.h 226607 2011-10-21 06:41:46Z das $
*/
#ifndef _MACHINE_IEEEFP_H_
@@ -39,6 +40,8 @@
#define _MACHINE_IEEEFP_H_
/*
+ * Deprecated historical FPU control interface
+ *
* IEEE floating point type, constant and function definitions.
* XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution.
*/
@@ -287,13 +290,16 @@
#define fpsetprec(m) __fpsetprec(m)
#define fpsetround(m) __fpsetround(m)
-/* Suppress prototypes in the MI header. */
-#define _IEEEFP_INLINED_ 1
-
#else /* !(!__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM) */
/* Augment the userland declarations. */
__BEGIN_DECLS
+extern fp_rnd_t fpgetround(void);
+extern fp_rnd_t fpsetround(fp_rnd_t);
+extern fp_except_t fpgetmask(void);
+extern fp_except_t fpsetmask(fp_except_t);
+extern fp_except_t fpgetsticky(void);
+extern fp_except_t fpsetsticky(fp_except_t);
fp_prec_t fpgetprec(void);
fp_prec_t fpsetprec(fp_prec_t);
__END_DECLS
Modified: trunk/sys/amd64/include/in_cksum.h
===================================================================
--- trunk/sys/amd64/include/in_cksum.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/in_cksum.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
@@ -29,7 +30,7 @@
* from tahoe: in_cksum.c 1.2 86/01/05
* from: @(#)in_cksum.c 1.3 (Berkeley) 1/19/91
* from: Id: in_cksum.c,v 1.8 1995/12/03 18:35:19 bde Exp
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/in_cksum.h 235941 2012-05-24 22:00:48Z bz $
*/
#ifndef _MACHINE_IN_CKSUM_H_
Modified: trunk/sys/amd64/include/intr_machdep.h
===================================================================
--- trunk/sys/amd64/include/intr_machdep.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/intr_machdep.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003 John Baldwin <jhb at FreeBSD.org>
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/intr_machdep.h 305672 2016-09-09 19:57:32Z jhb $
*/
#ifndef __MACHINE_INTR_MACHDEP_H__
@@ -44,12 +45,24 @@
* allocate IDT vectors.
*
* The first 255 IRQs (0 - 254) are reserved for ISA IRQs and PCI intline IRQs.
- * IRQ values beyond 256 are used by MSI. We leave 255 unused to avoid
- * confusion since 255 is used in PCI to indicate an invalid IRQ.
+ * IRQ values from 256 to 767 are used by MSI. When running under the Xen
+ * Hypervisor, IRQ values from 768 to 4863 are available for binding to
+ * event channel events. We leave 255 unused to avoid confusion since 255 is
+ * used in PCI to indicate an invalid IRQ.
*/
#define NUM_MSI_INTS 512
#define FIRST_MSI_INT 256
-#define NUM_IO_INTS (FIRST_MSI_INT + NUM_MSI_INTS)
+#ifdef XENHVM
+#include <xen/xen-os.h>
+#define NUM_EVTCHN_INTS NR_EVENT_CHANNELS
+#define FIRST_EVTCHN_INT \
+ (FIRST_MSI_INT + NUM_MSI_INTS)
+#define LAST_EVTCHN_INT \
+ (FIRST_EVTCHN_INT + NUM_EVTCHN_INTS - 1)
+#else
+#define NUM_EVTCHN_INTS 0
+#endif
+#define NUM_IO_INTS (FIRST_MSI_INT + NUM_MSI_INTS + NUM_EVTCHN_INTS)
/*
* Default base address for MSI messages on x86 platforms.
@@ -90,7 +103,7 @@
int (*pic_vector)(struct intsrc *);
int (*pic_source_pending)(struct intsrc *);
void (*pic_suspend)(struct pic *);
- void (*pic_resume)(struct pic *);
+ void (*pic_resume)(struct pic *, bool suspend_cancelled);
int (*pic_config_intr)(struct intsrc *, enum intr_trigger,
enum intr_polarity);
int (*pic_assign_cpu)(struct intsrc *, u_int apic_id);
@@ -131,6 +144,9 @@
extern struct mtx icu_lock;
extern int elcr_found;
+#ifdef SMP
+extern int msix_disable_migration;
+#endif
#ifndef DEV_ATPIC
void atpic_reset(void);
@@ -140,7 +156,9 @@
enum intr_trigger elcr_read_trigger(u_int irq);
void elcr_resume(void);
void elcr_write_trigger(u_int irq, enum intr_trigger trigger);
+#ifdef SMP
void intr_add_cpu(u_int cpu);
+#endif
int intr_add_handler(const char *name, int vector, driver_filter_t filter,
driver_intr_t handler, void *arg, enum intr_type flags,
void **cookiep);
@@ -156,7 +174,7 @@
int intr_register_pic(struct pic *pic);
int intr_register_source(struct intsrc *isrc);
int intr_remove_handler(void *cookie);
-void intr_resume(void);
+void intr_resume(bool suspend_cancelled);
void intr_suspend(void);
void intrcnt_add(const char *name, u_long **countp);
void nexus_add_irq(u_long irq);
Modified: trunk/sys/amd64/include/iodev.h
===================================================================
--- trunk/sys/amd64/include/iodev.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/iodev.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2004 Mark R V Murray
* All rights reserved.
@@ -23,7 +24,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/iodev.h 207329 2010-04-28 15:38:01Z attilio $
*/
#ifndef _MACHINE_IODEV_H_
#define _MACHINE_IODEV_H_
Modified: trunk/sys/amd64/include/kdb.h
===================================================================
--- trunk/sys/amd64/include/kdb.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/kdb.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2004 Marcel Moolenaar
* All rights reserved.
@@ -23,7 +24,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/kdb.h 170473 2007-06-09 21:55:17Z marcel $
*/
#ifndef _MACHINE_KDB_H_
Modified: trunk/sys/amd64/include/limits.h
===================================================================
--- trunk/sys/amd64/include/limits.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/limits.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1988, 1993
* The Regents of the University of California. All rights reserved.
@@ -27,7 +28,7 @@
* SUCH DAMAGE.
*
* @(#)limits.h 8.3 (Berkeley) 1/4/94
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/limits.h 143063 2005-03-02 21:33:29Z joerg $
*/
#ifndef _MACHINE_LIMITS_H_
Modified: trunk/sys/amd64/include/md_var.h
===================================================================
--- trunk/sys/amd64/include/md_var.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/md_var.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1995 Bruce D. Evans.
* All rights reserved.
@@ -26,7 +27,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/md_var.h 322523 2017-08-14 23:46:10Z jkim $
*/
#ifndef _MACHINE_MD_VAR_H_
@@ -49,6 +50,7 @@
extern u_int via_feature_xcrypt;
extern u_int cpu_clflush_line_size;
extern u_int cpu_stdext_feature;
+extern u_int cpu_stdext_feature2;
extern u_int cpu_fxsr;
extern u_int cpu_high;
extern u_int cpu_id;
@@ -58,12 +60,17 @@
extern u_int cpu_procinfo2;
extern char cpu_vendor[];
extern u_int cpu_vendor_id;
+extern u_int cpu_mon_mwait_flags;
+extern u_int cpu_mon_min_size;
+extern u_int cpu_mon_max_size;
+extern u_int cpu_maxphyaddr;
extern char ctx_switch_xsave[];
+extern u_int hv_high;
+extern char hv_vendor[];
extern char kstack[];
extern char sigcode[];
extern int szsigcode;
extern uint64_t *vm_page_dump;
-extern int hw_lower_amd64_sharedpage;
extern int vm_page_dump_size;
extern int workaround_erratum383;
extern int _udatasel;
@@ -77,7 +84,6 @@
typedef void alias_for_inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
struct pcb;
struct savefpu;
-struct sysentvec;
struct thread;
struct reg;
struct fpreg;
@@ -84,11 +90,20 @@
struct dbreg;
struct dumperinfo;
+/*
+ * Returns the maximum physical address that can be used with the
+ * current system.
+ */
+static __inline vm_paddr_t
+cpu_getmaxphyaddr(void)
+{
+ return ((1ULL << cpu_maxphyaddr) - 1);
+}
+
void *alloc_fpusave(int flags);
void amd64_syscall(struct thread *td, int traced);
void busdma_swi(void);
void cpu_setregs(void);
-void ctx_fpusave(void *);
void doreti_iret(void) __asm(__STRING(doreti_iret));
void doreti_iret_fault(void) __asm(__STRING(doreti_iret_fault));
void ld_ds(void) __asm(__STRING(ld_ds));
@@ -105,14 +120,20 @@
void gsbase_load_fault(void) __asm(__STRING(gsbase_load_fault));
void dump_add_page(vm_paddr_t);
void dump_drop_page(vm_paddr_t);
+void finishidentcpu(void);
+void identify_cpu(void);
+void identify_hypervisor(void);
void initializecpu(void);
void initializecpucache(void);
+bool fix_cpuid(void);
void fillw(int /*u_short*/ pat, void *base, size_t cnt);
void fpstate_drop(struct thread *td);
int is_physical_memory(vm_paddr_t addr);
int isa_nmi(int cd);
+void panicifcpuunsupported(void);
void pagecopy(void *from, void *to);
void pagezero(void *addr);
+void printcpuinfo(void);
void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int ist);
int user_dbreg_trap(void);
void minidumpsys(struct dumperinfo *);
@@ -120,6 +141,5 @@
struct savefpu *get_pcb_user_save_pcb(struct pcb *pcb);
struct pcb *get_pcb_td(struct thread *td);
void amd64_db_resume_dbreg(void);
-void amd64_lower_shared_page(struct sysentvec *);
#endif /* !_MACHINE_MD_VAR_H_ */
Modified: trunk/sys/amd64/include/memdev.h
===================================================================
--- trunk/sys/amd64/include/memdev.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/memdev.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2004 Mark R V Murray
* All rights reserved.
@@ -23,7 +24,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/memdev.h 217515 2011-01-17 22:58:28Z jkim $
*/
#ifndef _MACHINE_MEMDEV_H_
Modified: trunk/sys/amd64/include/metadata.h
===================================================================
--- trunk/sys/amd64/include/metadata.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/metadata.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,35 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2003 Peter Wemm <peter at FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/metadata.h 294274 2016-01-18 15:52:07Z emaste $ */
-#ifndef _MACHINE_METADATA_H_
-#define _MACHINE_METADATA_H_
-
-#define MODINFOMD_SMAP 0x1001
-#define MODINFOMD_SMAP_XATTR 0x1002
-
-#endif /* !_MACHINE_METADATA_H_ */
+#include <x86/metadata.h>
Modified: trunk/sys/amd64/include/minidump.h
===================================================================
--- trunk/sys/amd64/include/minidump.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/minidump.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2006 Peter Wemm
* All rights reserved.
@@ -23,7 +24,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/minidump.h 215133 2010-11-11 18:35:28Z avg $
*/
#ifndef _MACHINE_MINIDUMP_H_
Modified: trunk/sys/amd64/include/mp_watchdog.h
===================================================================
--- trunk/sys/amd64/include/mp_watchdog.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/mp_watchdog.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2004 Robert N. M. Watson
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/mp_watchdog.h 133759 2004-08-15 18:02:09Z rwatson $
*/
#ifndef _MACHINE_MP_WATCHDOG_H_
Modified: trunk/sys/amd64/include/nexusvar.h
===================================================================
--- trunk/sys/amd64/include/nexusvar.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/nexusvar.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright 1998 Massachusetts Institute of Technology
*
@@ -26,7 +27,7 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/nexusvar.h 177157 2008-03-13 20:39:04Z jhb $
*/
#ifndef _MACHINE_NEXUSVAR_H_
Added: trunk/sys/amd64/include/npx.h
===================================================================
--- trunk/sys/amd64/include/npx.h (rev 0)
+++ trunk/sys/amd64/include/npx.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -0,0 +1,7 @@
+/* $MidnightBSD$ */
+/*-
+ * This file is in the public domain.
+ */
+/* $FreeBSD: stable/10/sys/amd64/include/npx.h 233044 2012-03-16 20:24:30Z tijl $ */
+
+#include <x86/fpu.h>
Property changes on: trunk/sys/amd64/include/npx.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/amd64/include/ofw_machdep.h
===================================================================
--- trunk/sys/amd64/include/ofw_machdep.h (rev 0)
+++ trunk/sys/amd64/include/ofw_machdep.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -0,0 +1,7 @@
+/* $MidnightBSD$ */
+/*-
+ * This file is in the public domain.
+ */
+/* $FreeBSD: stable/10/sys/amd64/include/ofw_machdep.h 250840 2013-05-21 03:05:49Z marcel $ */
+
+#include <x86/ofw_machdep.h>
Property changes on: trunk/sys/amd64/include/ofw_machdep.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/amd64/include/param.h
===================================================================
--- trunk/sys/amd64/include/param.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/param.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2002 David E. O'Brien. All rights reserved.
* Copyright (c) 1992, 1993
@@ -36,7 +37,7 @@
* SUCH DAMAGE.
*
* @(#)param.h 8.1 (Berkeley) 6/10/93
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/param.h 286305 2015-08-05 07:21:44Z kib $
*/
@@ -71,6 +72,10 @@
#define MAXCPU 1
#endif
+#ifndef MAXMEMDOM
+#define MAXMEMDOM 1
+#endif
+
#define ALIGNBYTES _ALIGNBYTES
#define ALIGN(p) _ALIGN(p)
/*
@@ -139,4 +144,7 @@
#define pgtok(x) ((unsigned long)(x) * (PAGE_SIZE / 1024))
+#define INKERNEL(va) (((va) >= DMAP_MIN_ADDRESS && (va) < DMAP_MAX_ADDRESS) \
+ || ((va) >= VM_MIN_KERNEL_ADDRESS && (va) < VM_MAX_KERNEL_ADDRESS))
+
#endif /* !_AMD64_INCLUDE_PARAM_H_ */
Modified: trunk/sys/amd64/include/pc/bios.h
===================================================================
--- trunk/sys/amd64/include/pc/bios.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/pc/bios.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1997 Michael Smith
* Copyright (c) 1998 Jonathan Lemon
@@ -24,8 +25,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
- * $FreeBSD: src/sys/amd64/include/pc/bios.h,v 1.19.2.1.2.1 2008/11/25 02:59:29 kensmith Exp $
+ * $FreeBSD: stable/10/sys/amd64/include/pc/bios.h 272913 2014-10-10 20:47:23Z jhb $
*/
#ifndef _MACHINE_PC_BIOS_H_
@@ -52,6 +52,14 @@
u_int32_t type;
} __packed;
+/* Structure extended to include extended attribute field in ACPI 3.0. */
+struct bios_smap_xattr {
+ u_int64_t base;
+ u_int64_t length;
+ u_int32_t type;
+ u_int32_t xattr;
+} __packed;
+
/*
* System Management BIOS
*/
Modified: trunk/sys/amd64/include/pc/display.h
===================================================================
--- trunk/sys/amd64/include/pc/display.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/pc/display.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,8 +1,8 @@
+/* $MidnightBSD$ */
/*
* IBM PC display definitions
*
- * $MidnightBSD$
- * $FreeBSD: src/sys/amd64/include/pc/display.h,v 1.7 2005/01/05 20:11:13 imp Exp $
+ * $FreeBSD: stable/10/sys/amd64/include/pc/display.h 139730 2005-01-05 20:11:13Z imp $
*/
/* Color attributes for foreground text */
Modified: trunk/sys/amd64/include/pcb.h
===================================================================
--- trunk/sys/amd64/include/pcb.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/pcb.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003 Peter Wemm.
* Copyright (c) 1990 The Regents of the University of California.
@@ -31,7 +32,7 @@
* SUCH DAMAGE.
*
* from: @(#)pcb.h 5.10 (Berkeley) 5/12/91
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/pcb.h 294283 2016-01-18 18:27:21Z jhb $
*/
#ifndef _AMD64_PCB_H_
@@ -43,15 +44,20 @@
#include <machine/fpu.h>
#include <machine/segments.h>
+#ifdef __amd64__
+/*
+ * NB: The fields marked with (*) are used by kernel debuggers. Their
+ * ABI should be preserved.
+ */
struct pcb {
- register_t pcb_r15;
- register_t pcb_r14;
- register_t pcb_r13;
- register_t pcb_r12;
- register_t pcb_rbp;
- register_t pcb_rsp;
- register_t pcb_rbx;
- register_t pcb_rip;
+ register_t pcb_r15; /* (*) */
+ register_t pcb_r14; /* (*) */
+ register_t pcb_r13; /* (*) */
+ register_t pcb_r12; /* (*) */
+ register_t pcb_rbp; /* (*) */
+ register_t pcb_rsp; /* (*) */
+ register_t pcb_rbx; /* (*) */
+ register_t pcb_rip; /* (*) */
register_t pcb_fsbase;
register_t pcb_gsbase;
register_t pcb_kgsbase;
@@ -84,17 +90,32 @@
/* copyin/out fault recovery */
caddr_t pcb_onfault;
- /* 32-bit segment descriptor */
- struct user_segment_descriptor pcb_gs32sd;
+ uint64_t pcb_pad0;
/* local tss, with i/o bitmap; NULL for common */
struct amd64tss *pcb_tssp;
+ /* model specific registers */
+ register_t pcb_efer;
+ register_t pcb_star;
+ register_t pcb_lstar;
+ register_t pcb_cstar;
+ register_t pcb_sfmask;
+
struct savefpu *pcb_save;
- uint64_t pcb_pad[2];
+ uint64_t pcb_pad[5];
};
+/* Per-CPU state saved during suspend and resume. */
+struct susppcb {
+ struct pcb sp_pcb;
+
+ /* fpu context for suspend/resume */
+ void *sp_fpususpend;
+};
+#endif
+
#ifdef _KERNEL
struct trapframe;
@@ -130,6 +151,7 @@
void makectx(struct trapframe *, struct pcb *);
int savectx(struct pcb *) __returns_twice;
+void resumectx(struct pcb *);
#endif
Modified: trunk/sys/amd64/include/pci_cfgreg.h
===================================================================
--- trunk/sys/amd64/include/pci_cfgreg.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/pci_cfgreg.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,6 +1,7 @@
+/* $MidnightBSD$ */
/*-
* This file is in the public domain.
*/
-/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/amd64/include/pci_cfgreg.h 223440 2011-06-22 21:04:13Z jhb $ */
#include <x86/pci_cfgreg.h>
Modified: trunk/sys/amd64/include/pcpu.h
===================================================================
--- trunk/sys/amd64/include/pcpu.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/pcpu.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) Peter Wemm <peter at netplex.com.au>
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/pcpu.h 256073 2013-10-05 23:11:01Z gibbs $
*/
#ifndef _MACHINE_PCPU_H_
@@ -33,24 +34,6 @@
#error "sys/cdefs.h is a prerequisite for this file"
#endif
-#if defined(XEN) || defined(XENHVM)
-#ifndef NR_VIRQS
-#define NR_VIRQS 24
-#endif
-#ifndef NR_IPIS
-#define NR_IPIS 2
-#endif
-#endif
-
-#ifdef XENHVM
-#define PCPU_XEN_FIELDS \
- ; \
- unsigned int pc_last_processed_l1i; \
- unsigned int pc_last_processed_l2i
-#else
-#define PCPU_XEN_FIELDS
-#endif
-
/*
* The SMP parts are setup in pmap.c and locore.s for the BSP, and
* mp_machdep.c sets up the data for the AP's to "see" when they awake.
@@ -76,10 +59,13 @@
struct system_segment_descriptor *pc_ldt; \
/* Pointer to the CPU TSS descriptor */ \
struct system_segment_descriptor *pc_tss; \
- u_int pc_cmci_mask /* MCx banks for CMCI */ \
- PCPU_XEN_FIELDS; \
+ uint64_t pc_pm_save_cnt; \
+ u_int pc_cmci_mask; /* MCx banks for CMCI */ \
uint64_t pc_dbreg[16]; /* ddb debugging regs */ \
int pc_dbreg_cmd; /* ddb debugging reg cmd */ \
+ u_int pc_vcpu_id; /* Xen vCPU ID */ \
+ char __pad[157] /* be divisor of PAGE_SIZE \
+ after cache alignment */
#define PC_DBREG_CMD_NONE 0
#define PC_DBREG_CMD_LOAD 1
Modified: trunk/sys/amd64/include/pmap.h
===================================================================
--- trunk/sys/amd64/include/pmap.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/pmap.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003 Peter Wemm.
* Copyright (c) 1991 Regents of the University of California.
@@ -39,7 +40,7 @@
*
* from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/pmap.h 320432 2017-06-28 04:23:20Z alc $
*/
#ifndef _MACHINE_PMAP_H_
@@ -50,41 +51,75 @@
* of the fields not present here and there, depending on a lot of things.
*/
/* ---- Intel Nomenclature ---- */
-#define PG_V 0x001 /* P Valid */
-#define PG_RW 0x002 /* R/W Read/Write */
-#define PG_U 0x004 /* U/S User/Supervisor */
-#define PG_NC_PWT 0x008 /* PWT Write through */
-#define PG_NC_PCD 0x010 /* PCD Cache disable */
-#define PG_A 0x020 /* A Accessed */
-#define PG_M 0x040 /* D Dirty */
-#define PG_PS 0x080 /* PS Page size (0=4k,1=2M) */
-#define PG_PTE_PAT 0x080 /* PAT PAT index */
-#define PG_G 0x100 /* G Global */
-#define PG_AVAIL1 0x200 /* / Available for system */
-#define PG_AVAIL2 0x400 /* < programmers use */
-#define PG_AVAIL3 0x800 /* \ */
-#define PG_PDE_PAT 0x1000 /* PAT PAT index */
-#define PG_NX (1ul<<63) /* No-execute */
+#define X86_PG_V 0x001 /* P Valid */
+#define X86_PG_RW 0x002 /* R/W Read/Write */
+#define X86_PG_U 0x004 /* U/S User/Supervisor */
+#define X86_PG_NC_PWT 0x008 /* PWT Write through */
+#define X86_PG_NC_PCD 0x010 /* PCD Cache disable */
+#define X86_PG_A 0x020 /* A Accessed */
+#define X86_PG_M 0x040 /* D Dirty */
+#define X86_PG_PS 0x080 /* PS Page size (0=4k,1=2M) */
+#define X86_PG_PTE_PAT 0x080 /* PAT PAT index */
+#define X86_PG_G 0x100 /* G Global */
+#define X86_PG_AVAIL1 0x200 /* / Available for system */
+#define X86_PG_AVAIL2 0x400 /* < programmers use */
+#define X86_PG_AVAIL3 0x800 /* \ */
+#define X86_PG_PDE_PAT 0x1000 /* PAT PAT index */
+#define X86_PG_NX (1ul<<63) /* No-execute */
+#define X86_PG_AVAIL(x) (1ul << (x))
+/* Page level cache control fields used to determine the PAT type */
+#define X86_PG_PDE_CACHE (X86_PG_PDE_PAT | X86_PG_NC_PWT | X86_PG_NC_PCD)
+#define X86_PG_PTE_CACHE (X86_PG_PTE_PAT | X86_PG_NC_PWT | X86_PG_NC_PCD)
+/*
+ * Intel extended page table (EPT) bit definitions.
+ */
+#define EPT_PG_READ 0x001 /* R Read */
+#define EPT_PG_WRITE 0x002 /* W Write */
+#define EPT_PG_EXECUTE 0x004 /* X Execute */
+#define EPT_PG_IGNORE_PAT 0x040 /* IPAT Ignore PAT */
+#define EPT_PG_PS 0x080 /* PS Page size */
+#define EPT_PG_A 0x100 /* A Accessed */
+#define EPT_PG_M 0x200 /* D Dirty */
+#define EPT_PG_MEMORY_TYPE(x) ((x) << 3) /* MT Memory Type */
+
+/*
+ * Define the PG_xx macros in terms of the bits on x86 PTEs.
+ */
+#define PG_V X86_PG_V
+#define PG_RW X86_PG_RW
+#define PG_U X86_PG_U
+#define PG_NC_PWT X86_PG_NC_PWT
+#define PG_NC_PCD X86_PG_NC_PCD
+#define PG_A X86_PG_A
+#define PG_M X86_PG_M
+#define PG_PS X86_PG_PS
+#define PG_PTE_PAT X86_PG_PTE_PAT
+#define PG_G X86_PG_G
+#define PG_AVAIL1 X86_PG_AVAIL1
+#define PG_AVAIL2 X86_PG_AVAIL2
+#define PG_AVAIL3 X86_PG_AVAIL3
+#define PG_PDE_PAT X86_PG_PDE_PAT
+#define PG_NX X86_PG_NX
+#define PG_PDE_CACHE X86_PG_PDE_CACHE
+#define PG_PTE_CACHE X86_PG_PTE_CACHE
+
/* Our various interpretations of the above */
-#define PG_W PG_AVAIL1 /* "Wired" pseudoflag */
-#define PG_MANAGED PG_AVAIL2
+#define PG_W X86_PG_AVAIL3 /* "Wired" pseudoflag */
+#define PG_MANAGED X86_PG_AVAIL2
+#define EPT_PG_EMUL_V X86_PG_AVAIL(52)
+#define EPT_PG_EMUL_RW X86_PG_AVAIL(53)
+#define PG_PROMOTED X86_PG_AVAIL(54) /* PDE only */
#define PG_FRAME (0x000ffffffffff000ul)
#define PG_PS_FRAME (0x000fffffffe00000ul)
-#define PG_PROT (PG_RW|PG_U) /* all protection bits . */
-#define PG_N (PG_NC_PWT|PG_NC_PCD) /* Non-cacheable */
-/* Page level cache control fields used to determine the PAT type */
-#define PG_PDE_CACHE (PG_PDE_PAT | PG_NC_PWT | PG_NC_PCD)
-#define PG_PTE_CACHE (PG_PTE_PAT | PG_NC_PWT | PG_NC_PCD)
-
/*
* Promotion to a 2MB (PDE) page mapping requires that the corresponding 4KB
* (PTE) page mappings have identical settings for the following fields:
*/
-#define PG_PTE_PROMOTE (PG_NX | PG_MANAGED | PG_W | PG_G | PG_PTE_PAT | \
- PG_M | PG_A | PG_NC_PCD | PG_NC_PWT | PG_U | PG_RW | PG_V)
+#define PG_PTE_PROMOTE (PG_NX | PG_MANAGED | PG_W | PG_G | PG_PTE_CACHE | \
+ PG_M | PG_A | PG_U | PG_RW | PG_V)
/*
* Page Protection Exception bits
@@ -96,6 +131,28 @@
#define PGEX_RSV 0x08 /* reserved PTE field is non-zero */
#define PGEX_I 0x10 /* during an instruction fetch */
+/*
+ * undef the PG_xx macros that define bits in the regular x86 PTEs that
+ * have a different position in nested PTEs. This is done when compiling
+ * code that needs to be aware of the differences between regular x86 and
+ * nested PTEs.
+ *
+ * The appropriate bitmask will be calculated at runtime based on the pmap
+ * type.
+ */
+#ifdef AMD64_NPT_AWARE
+#undef PG_AVAIL1 /* X86_PG_AVAIL1 aliases with EPT_PG_M */
+#undef PG_G
+#undef PG_A
+#undef PG_M
+#undef PG_PDE_PAT
+#undef PG_PDE_CACHE
+#undef PG_PTE_PAT
+#undef PG_PTE_CACHE
+#undef PG_RW
+#undef PG_V
+#endif
+
/*
* Pte related macros. This is complicated by having to deal with
* the sign extension of the 48th bit.
@@ -113,34 +170,49 @@
((unsigned long)(l2) << PDRSHIFT) | \
((unsigned long)(l1) << PAGE_SHIFT))
-/* Initial number of kernel page tables. */
-#ifndef NKPT
-#define NKPT 32
-#endif
+/*
+ * Number of kernel PML4 slots. Can be anywhere from 1 to 64 or so,
+ * but setting it larger than NDMPML4E makes no sense.
+ *
+ * Each slot provides .5 TB of kernel virtual space.
+ */
+#define NKPML4E 4
-#define NKPML4E 1 /* number of kernel PML4 slots */
-#define NKPDPE howmany(NKPT, NPDEPG)/* number of kernel PDP slots */
-
#define NUPML4E (NPML4EPG/2) /* number of userland PML4 pages */
#define NUPDPE (NUPML4E*NPDPEPG)/* number of userland PDP pages */
#define NUPDE (NUPDPE*NPDEPG) /* number of userland PD entries */
/*
- * NDMPML4E is the number of PML4 entries that are used to implement the
- * direct map. It must be a power of two.
+ * NDMPML4E is the maximum number of PML4 entries that will be
+ * used to implement the direct map. It must be a power of two,
+ * and should generally exceed NKPML4E. The maximum possible
+ * value is 64; using 128 will make the direct map intrude into
+ * the recursive page table map.
*/
-#define NDMPML4E 2
+#define NDMPML4E 8
/*
- * The *PDI values control the layout of virtual memory. The starting address
+ * These values control the layout of virtual memory. The starting address
* of the direct map, which is controlled by DMPML4I, must be a multiple of
* its size. (See the PHYS_TO_DMAP() and DMAP_TO_PHYS() macros.)
+ *
+ * Note: KPML4I is the index of the (single) level 4 page that maps
+ * the KVA that holds KERNBASE, while KPML4BASE is the index of the
+ * first level 4 page that maps VM_MIN_KERNEL_ADDRESS. If NKPML4E
+ * is 1, these are the same, otherwise KPML4BASE < KPML4I and extra
+ * level 4 PDEs are needed to map from VM_MIN_KERNEL_ADDRESS up to
+ * KERNBASE.
+ *
+ * (KPML4I combines with KPDPI to choose where KERNBASE starts.
+ * Or, in other words, KPML4I provides bits 39..47 of KERNBASE,
+ * and KPDPI provides bits 30..38.)
*/
#define PML4PML4I (NPML4EPG/2) /* Index of recursive pml4 mapping */
-#define KPML4I (NPML4EPG-1) /* Top 512GB for KVM */
-#define DMPML4I rounddown(KPML4I - NDMPML4E, NDMPML4E) /* Below KVM */
+#define KPML4BASE (NPML4EPG-NKPML4E) /* KVM at highest addresses */
+#define DMPML4I rounddown(KPML4BASE-NDMPML4E, NDMPML4E) /* Below KVM */
+#define KPML4I (NPML4EPG-1)
#define KPDPI (NPDPEPG-2) /* kernbase at -2GB */
/*
@@ -156,16 +228,13 @@
#include <sys/_lock.h>
#include <sys/_mutex.h>
+#include <vm/_vm_radix.h>
+
typedef u_int64_t pd_entry_t;
typedef u_int64_t pt_entry_t;
typedef u_int64_t pdp_entry_t;
typedef u_int64_t pml4_entry_t;
-#define PML4ESHIFT (3)
-#define PDPESHIFT (3)
-#define PTESHIFT (3)
-#define PDESHIFT (3)
-
/*
* Address of current address space page table maps and directories.
*/
@@ -181,6 +250,7 @@
#define PML4map ((pd_entry_t *)(addr_PML4map))
#define PML4pml4e ((pd_entry_t *)(addr_PML4pml4e))
+extern int nkpt; /* Initial number of kernel page tables */
extern u_int64_t KPDPphys; /* physical address of kernel level 3 */
extern u_int64_t KPML4phys; /* physical address of kernel level 4 */
@@ -193,42 +263,15 @@
pt_entry_t *vtopte(vm_offset_t);
#define vtophys(va) pmap_kextract(((vm_offset_t) (va)))
-static __inline pt_entry_t
-pte_load(pt_entry_t *ptep)
-{
- pt_entry_t r;
+#define pte_load_store(ptep, pte) atomic_swap_long(ptep, pte)
+#define pte_load_clear(ptep) atomic_swap_long(ptep, 0)
+#define pte_store(ptep, pte) do { \
+ *(u_long *)(ptep) = (u_long)(pte); \
+} while (0)
+#define pte_clear(ptep) pte_store(ptep, 0)
- r = *ptep;
- return (r);
-}
+#define pde_store(pdep, pde) pte_store(pdep, pde)
-static __inline pt_entry_t
-pte_load_store(pt_entry_t *ptep, pt_entry_t pte)
-{
- pt_entry_t r;
-
- __asm __volatile(
- "xchgq %0,%1"
- : "=m" (*ptep),
- "=r" (r)
- : "1" (pte),
- "m" (*ptep));
- return (r);
-}
-
-#define pte_load_clear(pte) atomic_readandclear_long(pte)
-
-static __inline void
-pte_store(pt_entry_t *ptep, pt_entry_t pte)
-{
-
- *ptep = pte;
-}
-
-#define pte_clear(ptep) pte_store((ptep), (pt_entry_t)0ULL)
-
-#define pde_store(pdep, pde) pte_store((pdep), (pde))
-
extern pt_entry_t pg_nx;
#endif /* _KERNEL */
@@ -239,11 +282,22 @@
struct pv_entry;
struct pv_chunk;
+/*
+ * Locks
+ * (p) PV list lock
+ */
struct md_page {
- TAILQ_HEAD(,pv_entry) pv_list;
+ TAILQ_HEAD(, pv_entry) pv_list; /* (p) */
+ int pv_gen; /* (p) */
int pat_mode;
};
+enum pmap_type {
+ PT_X86, /* regular x86 page tables */
+ PT_EPT, /* Intel's nested page tables */
+ PT_RVI, /* AMD's nested page tables */
+};
+
/*
* The kernel virtual address (KVA) of the level 4 page table page is always
* within the direct map (DMAP) region.
@@ -251,13 +305,24 @@
struct pmap {
struct mtx pm_mtx;
pml4_entry_t *pm_pml4; /* KVA of level 4 page table */
+ uint64_t pm_cr3;
TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */
cpuset_t pm_active; /* active on cpus */
- /* spare u_int here due to padding */
+ cpuset_t pm_save; /* Context valid on cpus mask */
+ int pm_pcid; /* context id */
+ enum pmap_type pm_type; /* regular or nested tables */
struct pmap_statistics pm_stats; /* pmap statistics */
- vm_page_t pm_root; /* spare page table pages */
+ struct vm_radix pm_root; /* spare page table pages */
+ long pm_eptgen; /* EPT pmap generation id */
+ int pm_flags;
};
+/* flags */
+#define PMAP_NESTED_IPIMASK 0xff
+#define PMAP_PDE_SUPERPAGE (1 << 8) /* supports 2MB superpages */
+#define PMAP_EMULATE_AD_BITS (1 << 9) /* needs A/D bits emulation */
+#define PMAP_SUPPORTS_EXEC_ONLY (1 << 10) /* execute only mappings ok */
+
typedef struct pmap *pmap_t;
#ifdef _KERNEL
@@ -274,6 +339,9 @@
#define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
#define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
#define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
+
+int pmap_pinit_type(pmap_t pmap, enum pmap_type pm_type, int flags);
+int pmap_emulate_accessed_dirty(pmap_t pmap, vm_offset_t va, int ftype);
#endif
/*
@@ -282,7 +350,7 @@
*/
typedef struct pv_entry {
vm_offset_t pv_va; /* virtual address for mapping */
- TAILQ_ENTRY(pv_entry) pv_list;
+ TAILQ_ENTRY(pv_entry) pv_next;
} *pv_entry_t;
/*
@@ -307,6 +375,7 @@
extern vm_paddr_t dump_avail[];
extern vm_offset_t virtual_avail;
extern vm_offset_t virtual_end;
+extern vm_paddr_t dmaplimit;
#define pmap_page_get_memattr(m) ((vm_memattr_t)(m)->md.pat_mode)
#define pmap_page_is_write_mapped(m) (((m)->aflags & PGA_WRITEABLE) != 0)
@@ -331,8 +400,9 @@
void pmap_invalidate_all(pmap_t);
void pmap_invalidate_cache(void);
void pmap_invalidate_cache_pages(vm_page_t *pages, int count);
-void pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva);
-
+void pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva,
+ boolean_t force);
+void pmap_get_mapping(pmap_t pmap, vm_offset_t va, uint64_t *ptr, int *num);
#endif /* _KERNEL */
#endif /* !LOCORE */
Modified: trunk/sys/amd64/include/pmc_mdep.h
===================================================================
--- trunk/sys/amd64/include/pmc_mdep.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/pmc_mdep.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003-2008 Joseph Koshy
* Copyright (c) 2007 The FreeBSD Foundation
@@ -27,7 +28,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/pmc_mdep.h 286305 2015-08-05 07:21:44Z kib $
*/
/* Machine dependent interfaces */
@@ -113,9 +114,7 @@
#define PMC_IN_KERNEL_STACK(S,START,END) \
((S) >= (START) && (S) < (END))
-#define PMC_IN_KERNEL(va) (((va) >= DMAP_MIN_ADDRESS && \
- (va) < DMAP_MAX_ADDRESS) || ((va) >= VM_MIN_KERNEL_ADDRESS && \
- (va) < VM_MAX_KERNEL_ADDRESS))
+#define PMC_IN_KERNEL(va) INKERNEL(va)
#define PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS)
Modified: trunk/sys/amd64/include/ppireg.h
===================================================================
--- trunk/sys/amd64/include/ppireg.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/ppireg.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved.
*
@@ -22,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/ppireg.h 146211 2005-05-14 09:10:02Z nyan $
*/
#ifndef _MACHINE_PPIREG_H_
Modified: trunk/sys/amd64/include/proc.h
===================================================================
--- trunk/sys/amd64/include/proc.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/proc.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1991 Regents of the University of California.
* All rights reserved.
@@ -27,7 +28,7 @@
* SUCH DAMAGE.
*
* from: @(#)proc.h 7.1 (Berkeley) 5/15/91
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/proc.h 233291 2012-03-22 04:52:51Z alc $
*/
#ifndef _MACHINE_PROC_H_
Modified: trunk/sys/amd64/include/profile.h
===================================================================
--- trunk/sys/amd64/include/profile.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/profile.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
@@ -27,7 +28,7 @@
* SUCH DAMAGE.
*
* @(#)profile.h 8.1 (Berkeley) 6/11/93
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/profile.h 214346 2010-10-25 15:28:03Z jhb $
*/
#ifndef _MACHINE_PROFILE_H_
Modified: trunk/sys/amd64/include/psl.h
===================================================================
--- trunk/sys/amd64/include/psl.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/psl.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,84 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)psl.h 5.2 (Berkeley) 1/18/91
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/psl.h 233204 2012-03-19 21:29:57Z tijl $ */
-#ifndef _MACHINE_PSL_H_
-#define _MACHINE_PSL_H_
-
-/*
- * 386 processor status longword.
- */
-#define PSL_C 0x00000001 /* carry bit */
-#define PSL_PF 0x00000004 /* parity bit */
-#define PSL_AF 0x00000010 /* bcd carry bit */
-#define PSL_Z 0x00000040 /* zero bit */
-#define PSL_N 0x00000080 /* negative bit */
-#define PSL_T 0x00000100 /* trace enable bit */
-#define PSL_I 0x00000200 /* interrupt enable bit */
-#define PSL_D 0x00000400 /* string instruction direction bit */
-#define PSL_V 0x00000800 /* overflow bit */
-#define PSL_IOPL 0x00003000 /* i/o privilege level */
-#define PSL_NT 0x00004000 /* nested task bit */
-#define PSL_RF 0x00010000 /* resume flag bit */
-/* #define PSL_VM 0x00020000 */ /* virtual 8086 mode bit */
-#define PSL_AC 0x00040000 /* alignment checking */
-/* #define PSL_VIF 0x00080000 */ /* virtual interrupt enable */
-/* #define PSL_VIP 0x00100000 */ /* virtual interrupt pending */
-#define PSL_ID 0x00200000 /* identification bit */
-
-/*
- * The i486 manual says that we are not supposed to change reserved flags,
- * but this is too much trouble since the reserved flags depend on the cpu
- * and setting them to their historical values works in practice.
- */
-#define PSL_RESERVED_DEFAULT 0x00000002
-
-/*
- * Initial flags for kernel and user mode. The kernel later inherits
- * PSL_I and some other flags from user mode.
- */
-#define PSL_KERNEL PSL_RESERVED_DEFAULT
-#define PSL_USER (PSL_RESERVED_DEFAULT | PSL_I)
-
-/*
- * Bits that can be changed in user mode on 486's. We allow these bits
- * to be changed using ptrace(), sigreturn() and procfs. Setting PS_NT
- * is undesirable but it may as well be allowed since users can inflict
- * it on the kernel directly. Changes to PSL_AC are silently ignored on
- * 386's.
- */
-#define PSL_USERCHANGE (PSL_C | PSL_PF | PSL_AF | PSL_Z | PSL_N | PSL_T \
- | PSL_D | PSL_V | PSL_NT | PSL_AC | PSL_ID)
-
-#endif /* !_MACHINE_PSL_H_ */
+#include <x86/psl.h>
Modified: trunk/sys/amd64/include/ptrace.h
===================================================================
--- trunk/sys/amd64/include/ptrace.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/ptrace.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,46 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)ptrace.h 8.1 (Berkeley) 6/11/93
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/ptrace.h 232520 2012-03-04 20:24:28Z tijl $ */
-#ifndef _MACHINE_PTRACE_H_
-#define _MACHINE_PTRACE_H_
-
-#define __HAVE_PTRACE_MACHDEP
-
-/*
- * On amd64 (PT_FIRSTMACH + 0) and (PT_FIRSTMACH + 1) are old values for
- * PT_GETXSTATE and PT_SETXSTATE. They should not be (re)used.
- */
-
-#define PT_GETXSTATE (PT_FIRSTMACH + 2)
-#define PT_SETXSTATE (PT_FIRSTMACH + 3)
-
-#endif
+#include <x86/ptrace.h>
Modified: trunk/sys/amd64/include/reg.h
===================================================================
--- trunk/sys/amd64/include/reg.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/reg.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,141 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2003 Peter Wemm.
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)reg.h 5.5 (Berkeley) 1/18/91
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/reg.h 233124 2012-03-18 19:06:38Z tijl $ */
-#ifndef _MACHINE_REG_H_
-#define _MACHINE_REG_H_
-
-#if defined(_KERNEL) && !defined(_STANDALONE)
-#include "opt_compat.h"
-#endif
-
-/*
- * Register set accessible via /proc/$pid/regs and PT_{SET,GET}REGS.
- */
-struct reg {
- register_t r_r15;
- register_t r_r14;
- register_t r_r13;
- register_t r_r12;
- register_t r_r11;
- register_t r_r10;
- register_t r_r9;
- register_t r_r8;
- register_t r_rdi;
- register_t r_rsi;
- register_t r_rbp;
- register_t r_rbx;
- register_t r_rdx;
- register_t r_rcx;
- register_t r_rax;
- uint32_t r_trapno;
- uint16_t r_fs;
- uint16_t r_gs;
- uint32_t r_err;
- uint16_t r_es;
- uint16_t r_ds;
- register_t r_rip;
- register_t r_cs;
- register_t r_rflags;
- register_t r_rsp;
- register_t r_ss;
-};
-
-/*
- * Register set accessible via /proc/$pid/fpregs.
- */
-struct fpreg {
- /*
- * XXX should get struct from fpu.h. Here we give a slightly
- * simplified struct. This may be too much detail. Perhaps
- * an array of unsigned longs is best.
- */
- unsigned long fpr_env[4];
- unsigned char fpr_acc[8][16];
- unsigned char fpr_xacc[16][16];
- unsigned long fpr_spare[12];
-};
-
-/*
- * Register set accessible via /proc/$pid/dbregs.
- */
-struct dbreg {
- unsigned long dr[16]; /* debug registers */
- /* Index 0-3: debug address registers */
- /* Index 4-5: reserved */
- /* Index 6: debug status */
- /* Index 7: debug control */
- /* Index 8-15: reserved */
-};
-
-#define DBREG_DR7_LOCAL_ENABLE 0x01
-#define DBREG_DR7_GLOBAL_ENABLE 0x02
-#define DBREG_DR7_LEN_1 0x00 /* 1 byte length */
-#define DBREG_DR7_LEN_2 0x01
-#define DBREG_DR7_LEN_4 0x03
-#define DBREG_DR7_LEN_8 0x02
-#define DBREG_DR7_EXEC 0x00 /* break on execute */
-#define DBREG_DR7_WRONLY 0x01 /* break on write */
-#define DBREG_DR7_RDWR 0x03 /* break on read or write */
-#define DBREG_DR7_MASK(i) (0xful << ((i) * 4 + 16) | 0x3 << (i) * 2)
-#define DBREG_DR7_SET(i, len, access, enable) \
- ((u_long)((len) << 2 | (access)) << ((i) * 4 + 16) | (enable) << (i) * 2)
-#define DBREG_DR7_GD 0x2000
-#define DBREG_DR7_ENABLED(d, i) (((d) & 0x3 << (i) * 2) != 0)
-#define DBREG_DR7_ACCESS(d, i) ((d) >> ((i) * 4 + 16) & 0x3)
-#define DBREG_DR7_LEN(d, i) ((d) >> ((i) * 4 + 18) & 0x3)
-
-#define DBREG_DRX(d,x) ((d)->dr[(x)]) /* reference dr0 - dr15 by
- register number */
-
-#ifdef COMPAT_FREEBSD32
-#include <machine/fpu.h>
-#include <compat/ia32/ia32_reg.h>
-#endif
-
-#ifdef _KERNEL
-/*
- * XXX these interfaces are MI, so they should be declared in a MI place.
- */
-int fill_regs(struct thread *, struct reg *);
-int fill_frame_regs(struct trapframe *, struct reg *);
-int set_regs(struct thread *, struct reg *);
-int fill_fpregs(struct thread *, struct fpreg *);
-int set_fpregs(struct thread *, struct fpreg *);
-int fill_dbregs(struct thread *, struct dbreg *);
-int set_dbregs(struct thread *, struct dbreg *);
-#endif
-
-#endif /* !_MACHINE_REG_H_ */
+#include <x86/reg.h>
Modified: trunk/sys/amd64/include/reloc.h
===================================================================
--- trunk/sys/amd64/include/reloc.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/reloc.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
@@ -27,7 +28,7 @@
* SUCH DAMAGE.
*
* @(#)reloc.h 8.1 (Berkeley) 6/10/93
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/reloc.h 127914 2004-04-05 21:29:41Z imp $
*/
#ifndef _I386_MACHINE_RELOC_H_
Modified: trunk/sys/amd64/include/resource.h
===================================================================
--- trunk/sys/amd64/include/resource.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/resource.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,4 +1,5 @@
/* $MidnightBSD$ */
+/* $FreeBSD: stable/10/sys/amd64/include/resource.h 280970 2015-04-01 21:48:54Z jhb $ */
/*-
* Copyright 1998 Massachusetts Institute of Technology
*
@@ -40,5 +41,8 @@
#define SYS_RES_DRQ 2 /* isa dma lines */
#define SYS_RES_MEMORY 3 /* i/o memory */
#define SYS_RES_IOPORT 4 /* i/o ports */
+#ifdef NEW_PCIB
+#define PCI_RES_BUS 5 /* PCI bus numbers */
+#endif
#endif /* !_MACHINE_RESOURCE_H_ */
Modified: trunk/sys/amd64/include/runq.h
===================================================================
--- trunk/sys/amd64/include/runq.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/runq.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2001 Jake Burkholder <jake at FreeBSD.org>
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/runq.h 139731 2005-01-05 20:17:21Z imp $
*/
#ifndef _MACHINE_RUNQ_H_
Modified: trunk/sys/amd64/include/segments.h
===================================================================
--- trunk/sys/amd64/include/segments.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/segments.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1989, 1990 William F. Jolitz
* Copyright (c) 1990 The Regents of the University of California.
@@ -31,7 +32,7 @@
* SUCH DAMAGE.
*
* from: @(#)segments.h 7.1 (Berkeley) 5/9/91
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/segments.h 258886 2013-12-03 19:41:48Z kib $
*/
#ifndef _MACHINE_SEGMENTS_H_
@@ -41,47 +42,9 @@
* AMD64 Segmentation Data Structures and definitions
*/
-/*
- * Selectors
- */
+#include <x86/segments.h>
-#define SEL_RPL_MASK 3 /* requester priv level */
-#define ISPL(s) ((s)&3) /* what is the priority level of a selector */
-#define SEL_KPL 0 /* kernel priority level */
-#define SEL_UPL 3 /* user priority level */
-#define ISLDT(s) ((s)&SEL_LDT) /* is it local or global */
-#define SEL_LDT 4 /* local descriptor table */
-#define IDXSEL(s) (((s)>>3) & 0x1fff) /* index of selector */
-#define LSEL(s,r) (((s)<<3) | SEL_LDT | r) /* a local selector */
-#define GSEL(s,r) (((s)<<3) | r) /* a global selector */
-
/*
- * User segment descriptors (%cs, %ds etc for compatability apps. 64 bit wide)
- * For long-mode apps, %cs only has the conforming bit in sd_type, the sd_dpl,
- * sd_p, sd_l and sd_def32 which must be zero). %ds only has sd_p.
- */
-struct user_segment_descriptor {
- u_int64_t sd_lolimit:16; /* segment extent (lsb) */
- u_int64_t sd_lobase:24; /* segment base address (lsb) */
- u_int64_t sd_type:5; /* segment type */
- u_int64_t sd_dpl:2; /* segment descriptor priority level */
- u_int64_t sd_p:1; /* segment descriptor present */
- u_int64_t sd_hilimit:4; /* segment extent (msb) */
- u_int64_t sd_xx:1; /* unused */
- u_int64_t sd_long:1; /* long mode (cs only) */
- u_int64_t sd_def32:1; /* default 32 vs 16 bit size */
- u_int64_t sd_gran:1; /* limit granularity (byte/page units)*/
- u_int64_t sd_hibase:8; /* segment base address (msb) */
-} __packed;
-
-#define USD_GETBASE(sd) (((sd)->sd_lobase) | (sd)->sd_hibase << 24)
-#define USD_SETBASE(sd, b) (sd)->sd_lobase = (b); \
- (sd)->sd_hibase = ((b) >> 24);
-#define USD_GETLIMIT(sd) (((sd)->sd_lolimit) | (sd)->sd_hilimit << 16)
-#define USD_SETLIMIT(sd, l) (sd)->sd_lolimit = (l); \
- (sd)->sd_hilimit = ((l) >> 16);
-
-/*
* System segment descriptors (128 bit wide)
*/
struct system_segment_descriptor {
@@ -100,66 +63,6 @@
} __packed;
/*
- * Gate descriptors (e.g. indirect descriptors, trap, interrupt etc. 128 bit)
- * Only interrupt and trap gates have gd_ist.
- */
-struct gate_descriptor {
- u_int64_t gd_looffset:16; /* gate offset (lsb) */
- u_int64_t gd_selector:16; /* gate segment selector */
- u_int64_t gd_ist:3; /* IST table index */
- u_int64_t gd_xx:5; /* unused */
- u_int64_t gd_type:5; /* segment type */
- u_int64_t gd_dpl:2; /* segment descriptor priority level */
- u_int64_t gd_p:1; /* segment descriptor present */
- u_int64_t gd_hioffset:48 __packed; /* gate offset (msb) */
- u_int64_t sd_xx1:32;
-} __packed;
-
-/*
- * Generic descriptor
- */
-union descriptor {
- struct user_segment_descriptor sd;
- struct gate_descriptor gd;
-};
-
- /* system segments and gate types */
-#define SDT_SYSNULL 0 /* system null */
-#define SDT_SYS286TSS 1 /* system 286 TSS available */
-#define SDT_SYSLDT 2 /* system 64 bit local descriptor table */
-#define SDT_SYS286BSY 3 /* system 286 TSS busy */
-#define SDT_SYS286CGT 4 /* system 286 call gate */
-#define SDT_SYSTASKGT 5 /* system task gate */
-#define SDT_SYS286IGT 6 /* system 286 interrupt gate */
-#define SDT_SYS286TGT 7 /* system 286 trap gate */
-#define SDT_SYSNULL2 8 /* system null again */
-#define SDT_SYSTSS 9 /* system available 64 bit TSS */
-#define SDT_SYSNULL3 10 /* system null again */
-#define SDT_SYSBSY 11 /* system busy 64 bit TSS */
-#define SDT_SYSCGT 12 /* system 64 bit call gate */
-#define SDT_SYSNULL4 13 /* system null again */
-#define SDT_SYSIGT 14 /* system 64 bit interrupt gate */
-#define SDT_SYSTGT 15 /* system 64 bit trap gate */
-
- /* memory segment types */
-#define SDT_MEMRO 16 /* memory read only */
-#define SDT_MEMROA 17 /* memory read only accessed */
-#define SDT_MEMRW 18 /* memory read write */
-#define SDT_MEMRWA 19 /* memory read write accessed */
-#define SDT_MEMROD 20 /* memory read only expand dwn limit */
-#define SDT_MEMRODA 21 /* memory read only expand dwn limit accessed */
-#define SDT_MEMRWD 22 /* memory read write expand dwn limit */
-#define SDT_MEMRWDA 23 /* memory read write expand dwn limit accessed */
-#define SDT_MEME 24 /* memory execute only */
-#define SDT_MEMEA 25 /* memory execute only accessed */
-#define SDT_MEMER 26 /* memory execute read */
-#define SDT_MEMERA 27 /* memory execute read accessed */
-#define SDT_MEMEC 28 /* memory execute only conforming */
-#define SDT_MEMEAC 29 /* memory execute only accessed conforming */
-#define SDT_MEMERC 30 /* memory execute read conforming */
-#define SDT_MEMERAC 31 /* memory execute read accessed conforming */
-
-/*
* Software definitions are in this convenient format,
* which are translated into inconvenient segment descriptors
* when needed to be used by the 386 hardware
@@ -180,60 +83,10 @@
* region descriptors, used to load gdt/idt tables before segments yet exist.
*/
struct region_descriptor {
- unsigned long rd_limit:16; /* segment extent */
- unsigned long rd_base:64 __packed; /* base address */
+ uint64_t rd_limit:16; /* segment extent */
+ uint64_t rd_base:64 __packed; /* base address */
} __packed;
-/*
- * Size of IDT table
- */
-#define NIDT 256 /* 32 reserved, 16 h/w, 0 s/w, linux's 0x80 */
-#define NRSVIDT 32 /* reserved entries for cpu exceptions */
-
-/*
- * Entries in the Interrupt Descriptor Table (IDT)
- */
-#define IDT_DE 0 /* #DE: Divide Error */
-#define IDT_DB 1 /* #DB: Debug */
-#define IDT_NMI 2 /* Nonmaskable External Interrupt */
-#define IDT_BP 3 /* #BP: Breakpoint */
-#define IDT_OF 4 /* #OF: Overflow */
-#define IDT_BR 5 /* #BR: Bound Range Exceeded */
-#define IDT_UD 6 /* #UD: Undefined/Invalid Opcode */
-#define IDT_NM 7 /* #NM: No Math Coprocessor */
-#define IDT_DF 8 /* #DF: Double Fault */
-#define IDT_FPUGP 9 /* Coprocessor Segment Overrun */
-#define IDT_TS 10 /* #TS: Invalid TSS */
-#define IDT_NP 11 /* #NP: Segment Not Present */
-#define IDT_SS 12 /* #SS: Stack Segment Fault */
-#define IDT_GP 13 /* #GP: General Protection Fault */
-#define IDT_PF 14 /* #PF: Page Fault */
-#define IDT_MF 16 /* #MF: FPU Floating-Point Error */
-#define IDT_AC 17 /* #AC: Alignment Check */
-#define IDT_MC 18 /* #MC: Machine Check */
-#define IDT_XF 19 /* #XF: SIMD Floating-Point Exception */
-#define IDT_IO_INTS NRSVIDT /* Base of IDT entries for I/O interrupts. */
-#define IDT_SYSCALL 0x80 /* System Call Interrupt Vector */
-#define IDT_DTRACE_RET 0x92 /* DTrace pid provider Interrupt Vector */
-
-/*
- * Entries in the Global Descriptor Table (GDT)
- */
-#define GNULL_SEL 0 /* Null Descriptor */
-#define GNULL2_SEL 1 /* Null Descriptor */
-#define GUFS32_SEL 2 /* User 32 bit %fs Descriptor */
-#define GUGS32_SEL 3 /* User 32 bit %gs Descriptor */
-#define GCODE_SEL 4 /* Kernel Code Descriptor */
-#define GDATA_SEL 5 /* Kernel Data Descriptor */
-#define GUCODE32_SEL 6 /* User 32 bit code Descriptor */
-#define GUDATA_SEL 7 /* User 32/64 bit Data Descriptor */
-#define GUCODE_SEL 8 /* User 64 bit Code Descriptor */
-#define GPROC0_SEL 9 /* TSS for entering kernel etc */
-/* slot 10 is second half of GPROC0_SEL */
-#define GUSERLDT_SEL 11 /* LDT */
-/* slot 11 is second half of GUSERLDT_SEL */
-#define NGDT 13
-
#ifdef _KERNEL
extern struct user_segment_descriptor gdt[];
extern struct soft_segment_descriptor gdt_segs[];
@@ -249,7 +102,6 @@
struct system_segment_descriptor *sdp);
void update_gdt_gsbase(struct thread *td, uint32_t base);
void update_gdt_fsbase(struct thread *td, uint32_t base);
-
#endif /* _KERNEL */
#endif /* !_MACHINE_SEGMENTS_H_ */
Modified: trunk/sys/amd64/include/setjmp.h
===================================================================
--- trunk/sys/amd64/include/setjmp.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/setjmp.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,50 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1998 John Birrell <jb at cimlogic.com.au>.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the author nor the names of any co-contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/setjmp.h 232275 2012-02-28 22:17:52Z tijl $ */
-#ifndef _MACHINE_SETJMP_H_
-#define _MACHINE_SETJMP_H_
-
-#include <sys/cdefs.h>
-
-#define _JBLEN 12 /* Size of the jmp_buf on AMD64. */
-
-/*
- * jmp_buf and sigjmp_buf are encapsulated in different structs to force
- * compile-time diagnostics for mismatches. The structs are the same
- * internally to avoid some run-time errors for mismatches.
- */
-#if __BSD_VISIBLE || __POSIX_VISIBLE || __XSI_VISIBLE
-typedef struct _sigjmp_buf { long _sjb[_JBLEN]; } sigjmp_buf[1];
-#endif
-
-typedef struct _jmp_buf { long _jb[_JBLEN]; } jmp_buf[1];
-
-#endif /* !_MACHINE_SETJMP_H_ */
+#include <x86/setjmp.h>
Modified: trunk/sys/amd64/include/sf_buf.h
===================================================================
--- trunk/sys/amd64/include/sf_buf.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/sf_buf.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2003, 2005 Alan L. Cox <alc at cs.rice.edu>
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/sf_buf.h 255289 2013-09-06 05:37:49Z glebius $
*/
#ifndef _MACHINE_SF_BUF_H_
@@ -41,6 +42,18 @@
*/
struct sf_buf;
+static inline struct sf_buf *
+sf_buf_alloc(struct vm_page *m, int pri)
+{
+
+ return ((struct sf_buf *)m);
+}
+
+static inline void
+sf_buf_free(struct sf_buf *sf)
+{
+}
+
static __inline vm_offset_t
sf_buf_kva(struct sf_buf *sf)
{
Modified: trunk/sys/amd64/include/sigframe.h
===================================================================
--- trunk/sys/amd64/include/sigframe.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/sigframe.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,46 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1999 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer
- * in this position and unchanged.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/sigframe.h 247047 2013-02-20 17:39:52Z kib $ */
-#ifndef _MACHINE_SIGFRAME_H_
-#define _MACHINE_SIGFRAME_H_
-
-/*
- * Signal frames, arguments passed to application signal handlers.
- */
-struct sigframe {
- union {
- __siginfohandler_t *sf_action;
- __sighandler_t *sf_handler;
- } sf_ahu;
- ucontext_t sf_uc; /* = *sf_ucontext */
- siginfo_t sf_si; /* = *sf_siginfo (SA_SIGINFO case) */
-};
-
-#endif /* !_MACHINE_SIGFRAME_H_ */
+#include <x86/sigframe.h>
Modified: trunk/sys/amd64/include/signal.h
===================================================================
--- trunk/sys/amd64/include/signal.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/signal.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,109 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2003 Peter Wemm.
- * Copyright (c) 1986, 1989, 1991, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)signal.h 8.1 (Berkeley) 6/11/93
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/signal.h 247047 2013-02-20 17:39:52Z kib $ */
-#ifndef _MACHINE_SIGNAL_H_
-#define _MACHINE_SIGNAL_H_
-
-#include <sys/cdefs.h>
-#include <sys/_sigset.h>
-
-/*
- * Machine-dependent signal definitions
- */
-
-typedef long sig_atomic_t;
-
-#if __BSD_VISIBLE
-#include <machine/trap.h> /* codes for SIGILL, SIGFPE */
-
-/*
- * Information pushed on stack when a signal is delivered.
- * This is used by the kernel to restore state following
- * execution of the signal handler. It is also made available
- * to the handler to allow it to restore state properly if
- * a non-standard exit is performed.
- *
- * The sequence of the fields/registers after sc_mask in struct
- * sigcontext must match those in mcontext_t and struct trapframe.
- */
-struct sigcontext {
- struct __sigset sc_mask; /* signal mask to restore */
- long sc_onstack; /* sigstack state to restore */
- long sc_rdi; /* machine state (struct trapframe) */
- long sc_rsi;
- long sc_rdx;
- long sc_rcx;
- long sc_r8;
- long sc_r9;
- long sc_rax;
- long sc_rbx;
- long sc_rbp;
- long sc_r10;
- long sc_r11;
- long sc_r12;
- long sc_r13;
- long sc_r14;
- long sc_r15;
- int sc_trapno;
- short sc_fs;
- short sc_gs;
- long sc_addr;
- int sc_flags;
- short sc_es;
- short sc_ds;
- long sc_err;
- long sc_rip;
- long sc_cs;
- long sc_rflags;
- long sc_rsp;
- long sc_ss;
- long sc_len; /* sizeof(mcontext_t) */
- /*
- * See <machine/ucontext.h> and <machine/fpu.h> for the following
- * fields.
- */
- long sc_fpformat;
- long sc_ownedfp;
- long sc_fpstate[64] __aligned(16);
-
- long sc_fsbase;
- long sc_gsbase;
-
- long sc_xfpustate;
- long sc_xfpustate_len;
-
- long sc_spare[4];
-};
-#endif /* __BSD_VISIBLE */
-
-#endif /* !_MACHINE_SIGNAL_H_ */
+#include <x86/signal.h>
Modified: trunk/sys/amd64/include/smp.h
===================================================================
--- trunk/sys/amd64/include/smp.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/smp.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* ----------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
@@ -6,7 +7,7 @@
* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
* ----------------------------------------------------------------------------
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/smp.h 264118 2014-04-04 14:54:54Z royger $
*
*/
@@ -45,7 +46,9 @@
/* IPI handlers */
inthand_t
+ IDTVEC(invltlb_pcid), /* TLB shootdowns - global, pcid enabled */
IDTVEC(invltlb), /* TLB shootdowns - global */
+ IDTVEC(invlpg_pcid), /* TLB shootdowns - 1 page, pcid enabled */
IDTVEC(invlpg), /* TLB shootdowns - 1 page */
IDTVEC(invlrng), /* TLB shootdowns - page range */
IDTVEC(invlcache), /* Write back and invalidate cache */
@@ -54,11 +57,20 @@
IDTVEC(cpususpend), /* CPU suspends & waits to be resumed */
IDTVEC(rendezvous); /* handle CPU rendezvous */
+struct pmap;
+
/* functions in mp_machdep.c */
void cpu_add(u_int apic_id, char boot_cpu);
void cpustop_handler(void);
void cpususpend_handler(void);
+void invltlb_handler(void);
+void invltlb_pcid_handler(void);
+void invlpg_handler(void);
+void invlpg_pcid_handler(void);
+void invlrng_handler(void);
+void invlcache_handler(void);
void init_secondary(void);
+void ipi_startup(int apic_id, int vector);
void ipi_all_but_self(u_int ipi);
void ipi_bitmap_handler(struct trapframe frame);
void ipi_cpu(int cpu, u_int ipi);
@@ -66,13 +78,14 @@
void ipi_selected(cpuset_t cpus, u_int ipi);
u_int mp_bootaddress(u_int);
void smp_cache_flush(void);
-void smp_invlpg(vm_offset_t addr);
-void smp_masked_invlpg(cpuset_t mask, vm_offset_t addr);
-void smp_invlpg_range(vm_offset_t startva, vm_offset_t endva);
-void smp_masked_invlpg_range(cpuset_t mask, vm_offset_t startva,
+void smp_invlpg(struct pmap *pmap, vm_offset_t addr);
+void smp_masked_invlpg(cpuset_t mask, struct pmap *pmap, vm_offset_t addr);
+void smp_invlpg_range(struct pmap *pmap, vm_offset_t startva,
vm_offset_t endva);
-void smp_invltlb(void);
-void smp_masked_invltlb(cpuset_t mask);
+void smp_masked_invlpg_range(cpuset_t mask, struct pmap *pmap,
+ vm_offset_t startva, vm_offset_t endva);
+void smp_invltlb(struct pmap *pmap);
+void smp_masked_invltlb(cpuset_t mask, struct pmap *pmap);
#endif /* !LOCORE */
#endif /* SMP */
Modified: trunk/sys/amd64/include/specialreg.h
===================================================================
--- trunk/sys/amd64/include/specialreg.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/specialreg.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,614 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1991 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/specialreg.h 233207 2012-03-19 21:34:11Z tijl $ */
-#ifndef _MACHINE_SPECIALREG_H_
-#define _MACHINE_SPECIALREG_H_
-
-/*
- * Bits in 386 special registers:
- */
-#define CR0_PE 0x00000001 /* Protected mode Enable */
-#define CR0_MP 0x00000002 /* "Math" (fpu) Present */
-#define CR0_EM 0x00000004 /* EMulate FPU instructions. (trap ESC only) */
-#define CR0_TS 0x00000008 /* Task Switched (if MP, trap ESC and WAIT) */
-#define CR0_PG 0x80000000 /* PaGing enable */
-
-/*
- * Bits in 486 special registers:
- */
-#define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */
-#define CR0_WP 0x00010000 /* Write Protect (honor page protect in
- all modes) */
-#define CR0_AM 0x00040000 /* Alignment Mask (set to enable AC flag) */
-#define CR0_NW 0x20000000 /* Not Write-through */
-#define CR0_CD 0x40000000 /* Cache Disable */
-
-#define CR3_PCID_SAVE 0x8000000000000000
-
-/*
- * Bits in PPro special registers
- */
-#define CR4_VME 0x00000001 /* Virtual 8086 mode extensions */
-#define CR4_PVI 0x00000002 /* Protected-mode virtual interrupts */
-#define CR4_TSD 0x00000004 /* Time stamp disable */
-#define CR4_DE 0x00000008 /* Debugging extensions */
-#define CR4_PSE 0x00000010 /* Page size extensions */
-#define CR4_PAE 0x00000020 /* Physical address extension */
-#define CR4_MCE 0x00000040 /* Machine check enable */
-#define CR4_PGE 0x00000080 /* Page global enable */
-#define CR4_PCE 0x00000100 /* Performance monitoring counter enable */
-#define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */
-#define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */
-#define CR4_FSGSBASE 0x00010000 /* Enable FS/GS BASE accessing instructions */
-#define CR4_PCIDE 0x00020000 /* Enable Context ID */
-#define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */
-#define CR4_SMEP 0x00100000 /* Supervisor-Mode Execution Prevention */
-
-/*
- * Bits in AMD64 special registers. EFER is 64 bits wide.
- */
-#define EFER_SCE 0x000000001 /* System Call Extensions (R/W) */
-#define EFER_LME 0x000000100 /* Long mode enable (R/W) */
-#define EFER_LMA 0x000000400 /* Long mode active (R) */
-#define EFER_NXE 0x000000800 /* PTE No-Execute bit enable (R/W) */
-
-/*
- * Intel Extended Features registers
- */
-#define XCR0 0 /* XFEATURE_ENABLED_MASK register */
-
-#define XFEATURE_ENABLED_X87 0x00000001
-#define XFEATURE_ENABLED_SSE 0x00000002
-#define XFEATURE_ENABLED_AVX 0x00000004
-
-#define XFEATURE_AVX \
- (XFEATURE_ENABLED_X87 | XFEATURE_ENABLED_SSE | XFEATURE_ENABLED_AVX)
-
-/*
- * CPUID instruction features register
- */
-#define CPUID_FPU 0x00000001
-#define CPUID_VME 0x00000002
-#define CPUID_DE 0x00000004
-#define CPUID_PSE 0x00000008
-#define CPUID_TSC 0x00000010
-#define CPUID_MSR 0x00000020
-#define CPUID_PAE 0x00000040
-#define CPUID_MCE 0x00000080
-#define CPUID_CX8 0x00000100
-#define CPUID_APIC 0x00000200
-#define CPUID_B10 0x00000400
-#define CPUID_SEP 0x00000800
-#define CPUID_MTRR 0x00001000
-#define CPUID_PGE 0x00002000
-#define CPUID_MCA 0x00004000
-#define CPUID_CMOV 0x00008000
-#define CPUID_PAT 0x00010000
-#define CPUID_PSE36 0x00020000
-#define CPUID_PSN 0x00040000
-#define CPUID_CLFSH 0x00080000
-#define CPUID_B20 0x00100000
-#define CPUID_DS 0x00200000
-#define CPUID_ACPI 0x00400000
-#define CPUID_MMX 0x00800000
-#define CPUID_FXSR 0x01000000
-#define CPUID_SSE 0x02000000
-#define CPUID_XMM 0x02000000
-#define CPUID_SSE2 0x04000000
-#define CPUID_SS 0x08000000
-#define CPUID_HTT 0x10000000
-#define CPUID_TM 0x20000000
-#define CPUID_IA64 0x40000000
-#define CPUID_PBE 0x80000000
-
-#define CPUID2_SSE3 0x00000001
-#define CPUID2_PCLMULQDQ 0x00000002
-#define CPUID2_DTES64 0x00000004
-#define CPUID2_MON 0x00000008
-#define CPUID2_DS_CPL 0x00000010
-#define CPUID2_VMX 0x00000020
-#define CPUID2_SMX 0x00000040
-#define CPUID2_EST 0x00000080
-#define CPUID2_TM2 0x00000100
-#define CPUID2_SSSE3 0x00000200
-#define CPUID2_CNXTID 0x00000400
-#define CPUID2_FMA 0x00001000
-#define CPUID2_CX16 0x00002000
-#define CPUID2_XTPR 0x00004000
-#define CPUID2_PDCM 0x00008000
-#define CPUID2_PCID 0x00020000
-#define CPUID2_DCA 0x00040000
-#define CPUID2_SSE41 0x00080000
-#define CPUID2_SSE42 0x00100000
-#define CPUID2_X2APIC 0x00200000
-#define CPUID2_MOVBE 0x00400000
-#define CPUID2_POPCNT 0x00800000
-#define CPUID2_TSCDLT 0x01000000
-#define CPUID2_AESNI 0x02000000
-#define CPUID2_XSAVE 0x04000000
-#define CPUID2_OSXSAVE 0x08000000
-#define CPUID2_AVX 0x10000000
-#define CPUID2_F16C 0x20000000
-#define CPUID2_RDRAND 0x40000000
-#define CPUID2_HV 0x80000000
-
-/*
- * Important bits in the Thermal and Power Management flags
- * CPUID.6 EAX and ECX.
- */
-#define CPUTPM1_SENSOR 0x00000001
-#define CPUTPM1_TURBO 0x00000002
-#define CPUTPM1_ARAT 0x00000004
-#define CPUTPM2_EFFREQ 0x00000001
-
-/*
- * Important bits in the AMD extended cpuid flags
- */
-#define AMDID_SYSCALL 0x00000800
-#define AMDID_MP 0x00080000
-#define AMDID_NX 0x00100000
-#define AMDID_EXT_MMX 0x00400000
-#define AMDID_FFXSR 0x01000000
-#define AMDID_PAGE1GB 0x04000000
-#define AMDID_RDTSCP 0x08000000
-#define AMDID_LM 0x20000000
-#define AMDID_EXT_3DNOW 0x40000000
-#define AMDID_3DNOW 0x80000000
-
-#define AMDID2_LAHF 0x00000001
-#define AMDID2_CMP 0x00000002
-#define AMDID2_SVM 0x00000004
-#define AMDID2_EXT_APIC 0x00000008
-#define AMDID2_CR8 0x00000010
-#define AMDID2_ABM 0x00000020
-#define AMDID2_SSE4A 0x00000040
-#define AMDID2_MAS 0x00000080
-#define AMDID2_PREFETCH 0x00000100
-#define AMDID2_OSVW 0x00000200
-#define AMDID2_IBS 0x00000400
-#define AMDID2_XOP 0x00000800
-#define AMDID2_SKINIT 0x00001000
-#define AMDID2_WDT 0x00002000
-#define AMDID2_LWP 0x00008000
-#define AMDID2_FMA4 0x00010000
-#define AMDID2_NODE_ID 0x00080000
-#define AMDID2_TBM 0x00200000
-#define AMDID2_TOPOLOGY 0x00400000
-
-/*
- * CPUID instruction 1 eax info
- */
-#define CPUID_STEPPING 0x0000000f
-#define CPUID_MODEL 0x000000f0
-#define CPUID_FAMILY 0x00000f00
-#define CPUID_EXT_MODEL 0x000f0000
-#define CPUID_EXT_FAMILY 0x0ff00000
-#define CPUID_TO_MODEL(id) \
- ((((id) & CPUID_MODEL) >> 4) | \
- (((id) & CPUID_EXT_MODEL) >> 12))
-#define CPUID_TO_FAMILY(id) \
- ((((id) & CPUID_FAMILY) >> 8) + \
- (((id) & CPUID_EXT_FAMILY) >> 20))
-
-/*
- * CPUID instruction 1 ebx info
- */
-#define CPUID_BRAND_INDEX 0x000000ff
-#define CPUID_CLFUSH_SIZE 0x0000ff00
-#define CPUID_HTT_CORES 0x00ff0000
-#define CPUID_LOCAL_APIC_ID 0xff000000
-
-/*
- * CPUID instruction 6 ecx info
- */
-#define CPUID_PERF_STAT 0x00000001
-#define CPUID_PERF_BIAS 0x00000008
-
-/*
- * CPUID instruction 0xb ebx info.
- */
-#define CPUID_TYPE_INVAL 0
-#define CPUID_TYPE_SMT 1
-#define CPUID_TYPE_CORE 2
-
-/*
- * CPUID instruction 0xd Processor Extended State Enumeration Sub-leaf 1
- */
-#define CPUID_EXTSTATE_XSAVEOPT 0x00000001
-
-/*
- * AMD extended function 8000_0007h edx info
- */
-#define AMDPM_TS 0x00000001
-#define AMDPM_FID 0x00000002
-#define AMDPM_VID 0x00000004
-#define AMDPM_TTP 0x00000008
-#define AMDPM_TM 0x00000010
-#define AMDPM_STC 0x00000020
-#define AMDPM_100MHZ_STEPS 0x00000040
-#define AMDPM_HW_PSTATE 0x00000080
-#define AMDPM_TSC_INVARIANT 0x00000100
-#define AMDPM_CPB 0x00000200
-
-/*
- * AMD extended function 8000_0008h ecx info
- */
-#define AMDID_CMP_CORES 0x000000ff
-#define AMDID_COREID_SIZE 0x0000f000
-#define AMDID_COREID_SIZE_SHIFT 12
-
-#define CPUID_STDEXT_FSGSBASE 0x00000001
-#define CPUID_STDEXT_TSC_ADJUST 0x00000002
-#define CPUID_STDEXT_SMEP 0x00000080
-#define CPUID_STDEXT_ENH_MOVSB 0x00000200
-#define CPUID_STDEXT_INVPCID 0x00000400
-
-/*
- * CPUID manufacturers identifiers
- */
-#define AMD_VENDOR_ID "AuthenticAMD"
-#define CENTAUR_VENDOR_ID "CentaurHauls"
-#define INTEL_VENDOR_ID "GenuineIntel"
-
-/*
- * Model-specific registers for the i386 family
- */
-#define MSR_P5_MC_ADDR 0x000
-#define MSR_P5_MC_TYPE 0x001
-#define MSR_TSC 0x010
-#define MSR_P5_CESR 0x011
-#define MSR_P5_CTR0 0x012
-#define MSR_P5_CTR1 0x013
-#define MSR_IA32_PLATFORM_ID 0x017
-#define MSR_APICBASE 0x01b
-#define MSR_EBL_CR_POWERON 0x02a
-#define MSR_TEST_CTL 0x033
-#define MSR_BIOS_UPDT_TRIG 0x079
-#define MSR_BBL_CR_D0 0x088
-#define MSR_BBL_CR_D1 0x089
-#define MSR_BBL_CR_D2 0x08a
-#define MSR_BIOS_SIGN 0x08b
-#define MSR_PERFCTR0 0x0c1
-#define MSR_PERFCTR1 0x0c2
-#define MSR_MPERF 0x0e7
-#define MSR_APERF 0x0e8
-#define MSR_IA32_EXT_CONFIG 0x0ee /* Undocumented. Core Solo/Duo only */
-#define MSR_MTRRcap 0x0fe
-#define MSR_BBL_CR_ADDR 0x116
-#define MSR_BBL_CR_DECC 0x118
-#define MSR_BBL_CR_CTL 0x119
-#define MSR_BBL_CR_TRIG 0x11a
-#define MSR_BBL_CR_BUSY 0x11b
-#define MSR_BBL_CR_CTL3 0x11e
-#define MSR_SYSENTER_CS_MSR 0x174
-#define MSR_SYSENTER_ESP_MSR 0x175
-#define MSR_SYSENTER_EIP_MSR 0x176
-#define MSR_MCG_CAP 0x179
-#define MSR_MCG_STATUS 0x17a
-#define MSR_MCG_CTL 0x17b
-#define MSR_EVNTSEL0 0x186
-#define MSR_EVNTSEL1 0x187
-#define MSR_THERM_CONTROL 0x19a
-#define MSR_THERM_INTERRUPT 0x19b
-#define MSR_THERM_STATUS 0x19c
-#define MSR_IA32_MISC_ENABLE 0x1a0
-#define MSR_IA32_TEMPERATURE_TARGET 0x1a2
-#define MSR_DEBUGCTLMSR 0x1d9
-#define MSR_LASTBRANCHFROMIP 0x1db
-#define MSR_LASTBRANCHTOIP 0x1dc
-#define MSR_LASTINTFROMIP 0x1dd
-#define MSR_LASTINTTOIP 0x1de
-#define MSR_ROB_CR_BKUPTMPDR6 0x1e0
-#define MSR_MTRRVarBase 0x200
-#define MSR_MTRR64kBase 0x250
-#define MSR_MTRR16kBase 0x258
-#define MSR_MTRR4kBase 0x268
-#define MSR_PAT 0x277
-#define MSR_MC0_CTL2 0x280
-#define MSR_MTRRdefType 0x2ff
-#define MSR_MC0_CTL 0x400
-#define MSR_MC0_STATUS 0x401
-#define MSR_MC0_ADDR 0x402
-#define MSR_MC0_MISC 0x403
-#define MSR_MC1_CTL 0x404
-#define MSR_MC1_STATUS 0x405
-#define MSR_MC1_ADDR 0x406
-#define MSR_MC1_MISC 0x407
-#define MSR_MC2_CTL 0x408
-#define MSR_MC2_STATUS 0x409
-#define MSR_MC2_ADDR 0x40a
-#define MSR_MC2_MISC 0x40b
-#define MSR_MC3_CTL 0x40c
-#define MSR_MC3_STATUS 0x40d
-#define MSR_MC3_ADDR 0x40e
-#define MSR_MC3_MISC 0x40f
-#define MSR_MC4_CTL 0x410
-#define MSR_MC4_STATUS 0x411
-#define MSR_MC4_ADDR 0x412
-#define MSR_MC4_MISC 0x413
-
-/*
- * Constants related to MSR's.
- */
-#define APICBASE_RESERVED 0x000006ff
-#define APICBASE_BSP 0x00000100
-#define APICBASE_ENABLED 0x00000800
-#define APICBASE_ADDRESS 0xfffff000
-
-/*
- * PAT modes.
- */
-#define PAT_UNCACHEABLE 0x00
-#define PAT_WRITE_COMBINING 0x01
-#define PAT_WRITE_THROUGH 0x04
-#define PAT_WRITE_PROTECTED 0x05
-#define PAT_WRITE_BACK 0x06
-#define PAT_UNCACHED 0x07
-#define PAT_VALUE(i, m) ((long)(m) << (8 * (i)))
-#define PAT_MASK(i) PAT_VALUE(i, 0xff)
-
-/*
- * Constants related to MTRRs
- */
-#define MTRR_UNCACHEABLE 0x00
-#define MTRR_WRITE_COMBINING 0x01
-#define MTRR_WRITE_THROUGH 0x04
-#define MTRR_WRITE_PROTECTED 0x05
-#define MTRR_WRITE_BACK 0x06
-#define MTRR_N64K 8 /* numbers of fixed-size entries */
-#define MTRR_N16K 16
-#define MTRR_N4K 64
-#define MTRR_CAP_WC 0x0000000000000400
-#define MTRR_CAP_FIXED 0x0000000000000100
-#define MTRR_CAP_VCNT 0x00000000000000ff
-#define MTRR_DEF_ENABLE 0x0000000000000800
-#define MTRR_DEF_FIXED_ENABLE 0x0000000000000400
-#define MTRR_DEF_TYPE 0x00000000000000ff
-#define MTRR_PHYSBASE_PHYSBASE 0x000ffffffffff000
-#define MTRR_PHYSBASE_TYPE 0x00000000000000ff
-#define MTRR_PHYSMASK_PHYSMASK 0x000ffffffffff000
-#define MTRR_PHYSMASK_VALID 0x0000000000000800
-
-/* Performance Control Register (5x86 only). */
-#define PCR0 0x20
-#define PCR0_RSTK 0x01 /* Enables return stack */
-#define PCR0_BTB 0x02 /* Enables branch target buffer */
-#define PCR0_LOOP 0x04 /* Enables loop */
-#define PCR0_AIS 0x08 /* Enables all instrcutions stalled to
- serialize pipe. */
-#define PCR0_MLR 0x10 /* Enables reordering of misaligned loads */
-#define PCR0_BTBRT 0x40 /* Enables BTB test register. */
-#define PCR0_LSSER 0x80 /* Disable reorder */
-
-/* Device Identification Registers */
-#define DIR0 0xfe
-#define DIR1 0xff
-
-/*
- * Machine Check register constants.
- */
-#define MCG_CAP_COUNT 0x000000ff
-#define MCG_CAP_CTL_P 0x00000100
-#define MCG_CAP_EXT_P 0x00000200
-#define MCG_CAP_CMCI_P 0x00000400
-#define MCG_CAP_TES_P 0x00000800
-#define MCG_CAP_EXT_CNT 0x00ff0000
-#define MCG_CAP_SER_P 0x01000000
-#define MCG_STATUS_RIPV 0x00000001
-#define MCG_STATUS_EIPV 0x00000002
-#define MCG_STATUS_MCIP 0x00000004
-#define MCG_CTL_ENABLE 0xffffffffffffffff
-#define MCG_CTL_DISABLE 0x0000000000000000
-#define MSR_MC_CTL(x) (MSR_MC0_CTL + (x) * 4)
-#define MSR_MC_STATUS(x) (MSR_MC0_STATUS + (x) * 4)
-#define MSR_MC_ADDR(x) (MSR_MC0_ADDR + (x) * 4)
-#define MSR_MC_MISC(x) (MSR_MC0_MISC + (x) * 4)
-#define MSR_MC_CTL2(x) (MSR_MC0_CTL2 + (x)) /* If MCG_CAP_CMCI_P */
-#define MC_STATUS_MCA_ERROR 0x000000000000ffff
-#define MC_STATUS_MODEL_ERROR 0x00000000ffff0000
-#define MC_STATUS_OTHER_INFO 0x01ffffff00000000
-#define MC_STATUS_COR_COUNT 0x001fffc000000000 /* If MCG_CAP_CMCI_P */
-#define MC_STATUS_TES_STATUS 0x0060000000000000 /* If MCG_CAP_TES_P */
-#define MC_STATUS_AR 0x0080000000000000 /* If MCG_CAP_TES_P */
-#define MC_STATUS_S 0x0100000000000000 /* If MCG_CAP_TES_P */
-#define MC_STATUS_PCC 0x0200000000000000
-#define MC_STATUS_ADDRV 0x0400000000000000
-#define MC_STATUS_MISCV 0x0800000000000000
-#define MC_STATUS_EN 0x1000000000000000
-#define MC_STATUS_UC 0x2000000000000000
-#define MC_STATUS_OVER 0x4000000000000000
-#define MC_STATUS_VAL 0x8000000000000000
-#define MC_MISC_RA_LSB 0x000000000000003f /* If MCG_CAP_SER_P */
-#define MC_MISC_ADDRESS_MODE 0x00000000000001c0 /* If MCG_CAP_SER_P */
-#define MC_CTL2_THRESHOLD 0x0000000000007fff
-#define MC_CTL2_CMCI_EN 0x0000000040000000
-
-/*
- * The following four 3-byte registers control the non-cacheable regions.
- * These registers must be written as three separate bytes.
- *
- * NCRx+0: A31-A24 of starting address
- * NCRx+1: A23-A16 of starting address
- * NCRx+2: A15-A12 of starting address | NCR_SIZE_xx.
- *
- * The non-cacheable region's starting address must be aligned to the
- * size indicated by the NCR_SIZE_xx field.
- */
-#define NCR1 0xc4
-#define NCR2 0xc7
-#define NCR3 0xca
-#define NCR4 0xcd
-
-#define NCR_SIZE_0K 0
-#define NCR_SIZE_4K 1
-#define NCR_SIZE_8K 2
-#define NCR_SIZE_16K 3
-#define NCR_SIZE_32K 4
-#define NCR_SIZE_64K 5
-#define NCR_SIZE_128K 6
-#define NCR_SIZE_256K 7
-#define NCR_SIZE_512K 8
-#define NCR_SIZE_1M 9
-#define NCR_SIZE_2M 10
-#define NCR_SIZE_4M 11
-#define NCR_SIZE_8M 12
-#define NCR_SIZE_16M 13
-#define NCR_SIZE_32M 14
-#define NCR_SIZE_4G 15
-
-/*
- * The address region registers are used to specify the location and
- * size for the eight address regions.
- *
- * ARRx + 0: A31-A24 of start address
- * ARRx + 1: A23-A16 of start address
- * ARRx + 2: A15-A12 of start address | ARR_SIZE_xx
- */
-#define ARR0 0xc4
-#define ARR1 0xc7
-#define ARR2 0xca
-#define ARR3 0xcd
-#define ARR4 0xd0
-#define ARR5 0xd3
-#define ARR6 0xd6
-#define ARR7 0xd9
-
-#define ARR_SIZE_0K 0
-#define ARR_SIZE_4K 1
-#define ARR_SIZE_8K 2
-#define ARR_SIZE_16K 3
-#define ARR_SIZE_32K 4
-#define ARR_SIZE_64K 5
-#define ARR_SIZE_128K 6
-#define ARR_SIZE_256K 7
-#define ARR_SIZE_512K 8
-#define ARR_SIZE_1M 9
-#define ARR_SIZE_2M 10
-#define ARR_SIZE_4M 11
-#define ARR_SIZE_8M 12
-#define ARR_SIZE_16M 13
-#define ARR_SIZE_32M 14
-#define ARR_SIZE_4G 15
-
-/*
- * The region control registers specify the attributes associated with
- * the ARRx addres regions.
- */
-#define RCR0 0xdc
-#define RCR1 0xdd
-#define RCR2 0xde
-#define RCR3 0xdf
-#define RCR4 0xe0
-#define RCR5 0xe1
-#define RCR6 0xe2
-#define RCR7 0xe3
-
-#define RCR_RCD 0x01 /* Disables caching for ARRx (x = 0-6). */
-#define RCR_RCE 0x01 /* Enables caching for ARR7. */
-#define RCR_WWO 0x02 /* Weak write ordering. */
-#define RCR_WL 0x04 /* Weak locking. */
-#define RCR_WG 0x08 /* Write gathering. */
-#define RCR_WT 0x10 /* Write-through. */
-#define RCR_NLB 0x20 /* LBA# pin is not asserted. */
-
-/* AMD Write Allocate Top-Of-Memory and Control Register */
-#define AMD_WT_ALLOC_TME 0x40000 /* top-of-memory enable */
-#define AMD_WT_ALLOC_PRE 0x20000 /* programmable range enable */
-#define AMD_WT_ALLOC_FRE 0x10000 /* fixed (A0000-FFFFF) range enable */
-
-/* AMD64 MSR's */
-#define MSR_EFER 0xc0000080 /* extended features */
-#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target/cs/ss */
-#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target rip */
-#define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target rip */
-#define MSR_SF_MASK 0xc0000084 /* syscall flags mask */
-#define MSR_FSBASE 0xc0000100 /* base address of the %fs "segment" */
-#define MSR_GSBASE 0xc0000101 /* base address of the %gs "segment" */
-#define MSR_KGSBASE 0xc0000102 /* base address of the kernel %gs */
-#define MSR_PERFEVSEL0 0xc0010000
-#define MSR_PERFEVSEL1 0xc0010001
-#define MSR_PERFEVSEL2 0xc0010002
-#define MSR_PERFEVSEL3 0xc0010003
-#undef MSR_PERFCTR0
-#undef MSR_PERFCTR1
-#define MSR_PERFCTR0 0xc0010004
-#define MSR_PERFCTR1 0xc0010005
-#define MSR_PERFCTR2 0xc0010006
-#define MSR_PERFCTR3 0xc0010007
-#define MSR_SYSCFG 0xc0010010
-#define MSR_HWCR 0xc0010015
-#define MSR_IORRBASE0 0xc0010016
-#define MSR_IORRMASK0 0xc0010017
-#define MSR_IORRBASE1 0xc0010018
-#define MSR_IORRMASK1 0xc0010019
-#define MSR_TOP_MEM 0xc001001a /* boundary for ram below 4G */
-#define MSR_TOP_MEM2 0xc001001d /* boundary for ram above 4G */
-#define MSR_K8_UCODE_UPDATE 0xc0010020 /* update microcode */
-#define MSR_MC0_CTL_MASK 0xc0010044
-
-/* VIA ACE crypto featureset: for via_feature_rng */
-#define VIA_HAS_RNG 1 /* cpu has RNG */
-
-/* VIA ACE crypto featureset: for via_feature_xcrypt */
-#define VIA_HAS_AES 1 /* cpu has AES */
-#define VIA_HAS_SHA 2 /* cpu has SHA1 & SHA256 */
-#define VIA_HAS_MM 4 /* cpu has RSA instructions */
-#define VIA_HAS_AESCTR 8 /* cpu has AES-CTR instructions */
-
-/* Centaur Extended Feature flags */
-#define VIA_CPUID_HAS_RNG 0x000004
-#define VIA_CPUID_DO_RNG 0x000008
-#define VIA_CPUID_HAS_ACE 0x000040
-#define VIA_CPUID_DO_ACE 0x000080
-#define VIA_CPUID_HAS_ACE2 0x000100
-#define VIA_CPUID_DO_ACE2 0x000200
-#define VIA_CPUID_HAS_PHE 0x000400
-#define VIA_CPUID_DO_PHE 0x000800
-#define VIA_CPUID_HAS_PMM 0x001000
-#define VIA_CPUID_DO_PMM 0x002000
-
-/* VIA ACE xcrypt-* instruction context control options */
-#define VIA_CRYPT_CWLO_ROUND_M 0x0000000f
-#define VIA_CRYPT_CWLO_ALG_M 0x00000070
-#define VIA_CRYPT_CWLO_ALG_AES 0x00000000
-#define VIA_CRYPT_CWLO_KEYGEN_M 0x00000080
-#define VIA_CRYPT_CWLO_KEYGEN_HW 0x00000000
-#define VIA_CRYPT_CWLO_KEYGEN_SW 0x00000080
-#define VIA_CRYPT_CWLO_NORMAL 0x00000000
-#define VIA_CRYPT_CWLO_INTERMEDIATE 0x00000100
-#define VIA_CRYPT_CWLO_ENCRYPT 0x00000000
-#define VIA_CRYPT_CWLO_DECRYPT 0x00000200
-#define VIA_CRYPT_CWLO_KEY128 0x0000000a /* 128bit, 10 rds */
-#define VIA_CRYPT_CWLO_KEY192 0x0000040c /* 192bit, 12 rds */
-#define VIA_CRYPT_CWLO_KEY256 0x0000080e /* 256bit, 15 rds */
-
-#endif /* !_MACHINE_SPECIALREG_H_ */
+#include <x86/specialreg.h>
Modified: trunk/sys/amd64/include/stack.h
===================================================================
--- trunk/sys/amd64/include/stack.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/stack.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Mach Operating System
* Copyright (c) 1991,1990 Carnegie Mellon University
@@ -23,7 +24,7 @@
* any improvements or extensions that they make and grant Carnegie the
* rights to redistribute these changes.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/stack.h 286305 2015-08-05 07:21:44Z kib $
*/
#ifndef _MACHINE_STACK_H_
@@ -32,8 +33,6 @@
/*
* Stack trace.
*/
-#define INKERNEL(va) (((va) >= DMAP_MIN_ADDRESS && (va) < DMAP_MAX_ADDRESS) \
- || ((va) >= VM_MIN_KERNEL_ADDRESS && (va) < VM_MAX_KERNEL_ADDRESS))
struct amd64_frame {
struct amd64_frame *f_frame;
Modified: trunk/sys/amd64/include/stdarg.h
===================================================================
--- trunk/sys/amd64/include/stdarg.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/stdarg.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,75 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2002 David E. O'Brien. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/stdarg.h 232276 2012-02-28 22:30:58Z tijl $ */
-#ifndef _MACHINE_STDARG_H_
-#define _MACHINE_STDARG_H_
-
-#include <sys/cdefs.h>
-#include <sys/_types.h>
-
-#ifndef _VA_LIST_DECLARED
-#define _VA_LIST_DECLARED
-typedef __va_list va_list;
-#endif
-
-#ifdef __GNUCLIKE_BUILTIN_STDARG
-
-#define va_start(ap, last) \
- __builtin_va_start((ap), (last))
-
-#define va_arg(ap, type) \
- __builtin_va_arg((ap), type)
-
-#define __va_copy(dest, src) \
- __builtin_va_copy((dest), (src))
-
-#if __ISO_C_VISIBLE >= 1999
-#define va_copy(dest, src) \
- __va_copy(dest, src)
-#endif
-
-#define va_end(ap) \
- __builtin_va_end(ap)
-
-#elif defined(lint)
-/* Provide a fake implementation for lint's benefit */
-#define __va_size(type) \
- (((sizeof(type) + sizeof(long) - 1) / sizeof(long)) * sizeof(long))
-#define va_start(ap, last) \
- ((ap) = (va_list)&(last) + __va_size(last))
-#define va_arg(ap, type) \
- (*(type *)((ap) += __va_size(type), (ap) - __va_size(type)))
-#define va_end(ap)
-
-#else
-#error this file needs to be ported to your compiler
-#endif
-
-#endif /* !_MACHINE_STDARG_H_ */
+#include <x86/stdarg.h>
Modified: trunk/sys/amd64/include/sysarch.h
===================================================================
--- trunk/sys/amd64/include/sysarch.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/sysarch.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,103 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1993 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/sysarch.h 233209 2012-03-19 21:57:31Z tijl $ */
-/*
- * Architecture specific syscalls (AMD64)
- */
-#ifndef _MACHINE_SYSARCH_H_
-#define _MACHINE_SYSARCH_H_
-
-#include <sys/cdefs.h>
-
-#define I386_GET_LDT 0
-#define I386_SET_LDT 1
-#define LDT_AUTO_ALLOC 0xffffffff
- /* I386_IOPL */
-#define I386_GET_IOPERM 3
-#define I386_SET_IOPERM 4
-
-/* XXX Not implementable #define I386_VM86 6 */
-
-#define I386_GET_FSBASE 7
-#define I386_SET_FSBASE 8
-#define I386_GET_GSBASE 9
-#define I386_SET_GSBASE 10
-#define I386_GET_XFPUSTATE 11
-
-/* Leave space for 0-127 for to avoid translating syscalls */
-#define AMD64_GET_FSBASE 128
-#define AMD64_SET_FSBASE 129
-#define AMD64_GET_GSBASE 130
-#define AMD64_SET_GSBASE 131
-#define AMD64_GET_XFPUSTATE 132
-
-struct i386_ldt_args {
- unsigned int start;
- struct user_segment_descriptor *descs __packed;
- unsigned int num;
-};
-
-struct i386_ioperm_args {
- unsigned int start;
- unsigned int length;
- int enable;
-};
-
-struct i386_get_xfpustate {
- unsigned int addr;
- int len;
-};
-
-struct amd64_get_xfpustate {
- void *addr;
- int len;
-};
-
-#ifndef _KERNEL
-__BEGIN_DECLS
-int amd64_get_fsbase(void **);
-int amd64_get_gsbase(void **);
-int amd64_set_fsbase(void *);
-int amd64_set_gsbase(void *);
-int sysarch(int, void *);
-__END_DECLS
-#else
-struct thread;
-union descriptor;
-
-int amd64_get_ldt(struct thread *, struct i386_ldt_args *);
-int amd64_set_ldt(struct thread *, struct i386_ldt_args *,
- struct user_segment_descriptor *);
-int amd64_get_ioperm(struct thread *, struct i386_ioperm_args *);
-int amd64_set_ioperm(struct thread *, struct i386_ioperm_args *);
-#endif
-
-#endif /* !_MACHINE_SYSARCH_H_ */
+#include <x86/sysarch.h>
Modified: trunk/sys/amd64/include/timerreg.h
===================================================================
--- trunk/sys/amd64/include/timerreg.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/timerreg.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved.
*
@@ -22,7 +23,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/timerreg.h 177642 2008-03-26 20:09:21Z phk $
*/
/*
Modified: trunk/sys/amd64/include/trap.h
===================================================================
--- trunk/sys/amd64/include/trap.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/trap.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,95 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: @(#)trap.h 5.4 (Berkeley) 5/9/91
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/trap.h 232492 2012-03-04 14:12:57Z tijl $ */
-#ifndef _MACHINE_TRAP_H_
-#define _MACHINE_TRAP_H_
-
-/*
- * Trap type values
- * also known in trap.c for name strings
- */
-
-#define T_PRIVINFLT 1 /* privileged instruction */
-#define T_BPTFLT 3 /* breakpoint instruction */
-#define T_ARITHTRAP 6 /* arithmetic trap */
-#define T_PROTFLT 9 /* protection fault */
-#define T_TRCTRAP 10 /* debug exception (sic) */
-#define T_PAGEFLT 12 /* page fault */
-#define T_ALIGNFLT 14 /* alignment fault */
-
-#define T_DIVIDE 18 /* integer divide fault */
-#define T_NMI 19 /* non-maskable trap */
-#define T_OFLOW 20 /* overflow trap */
-#define T_BOUND 21 /* bound instruction fault */
-#define T_DNA 22 /* device not available fault */
-#define T_DOUBLEFLT 23 /* double fault */
-#define T_FPOPFLT 24 /* fp coprocessor operand fetch fault */
-#define T_TSSFLT 25 /* invalid tss fault */
-#define T_SEGNPFLT 26 /* segment not present fault */
-#define T_STKFLT 27 /* stack fault */
-#define T_MCHK 28 /* machine check trap */
-#define T_XMMFLT 29 /* SIMD floating-point exception */
-#define T_RESERVED 30 /* reserved (unknown) */
-#define T_DTRACE_RET 32 /* DTrace pid return */
-#define T_DTRACE_PROBE 33 /* DTrace fasttrap probe */
-
-/* XXX most of the following codes aren't used, but could be. */
-
-/* definitions for <sys/signal.h> */
-#define ILL_RESAD_FAULT T_RESADFLT
-#define ILL_PRIVIN_FAULT T_PRIVINFLT
-#define ILL_RESOP_FAULT T_RESOPFLT
-#define ILL_ALIGN_FAULT T_ALIGNFLT
-#define ILL_FPOP_FAULT T_FPOPFLT /* coprocessor operand fault */
-
-/* old FreeBSD macros, deprecated */
-#define FPE_INTOVF_TRAP 0x1 /* integer overflow */
-#define FPE_INTDIV_TRAP 0x2 /* integer divide by zero */
-#define FPE_FLTDIV_TRAP 0x3 /* floating/decimal divide by zero */
-#define FPE_FLTOVF_TRAP 0x4 /* floating overflow */
-#define FPE_FLTUND_TRAP 0x5 /* floating underflow */
-#define FPE_FPU_NP_TRAP 0x6 /* floating point unit not present */
-#define FPE_SUBRNG_TRAP 0x7 /* subrange out of bounds */
-
-/* codes for SIGBUS */
-#define BUS_PAGE_FAULT T_PAGEFLT /* page fault protection base */
-#define BUS_SEGNP_FAULT T_SEGNPFLT /* segment not present */
-#define BUS_STK_FAULT T_STKFLT /* stack segment */
-#define BUS_SEGM_FAULT T_RESERVED /* segment protection base */
-
-/* Trap's coming from user mode */
-#define T_USER 0x100
-
-#endif /* !_MACHINE_TRAP_H_ */
+#include <x86/trap.h>
Modified: trunk/sys/amd64/include/tss.h
===================================================================
--- trunk/sys/amd64/include/tss.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/tss.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
@@ -30,7 +31,7 @@
* SUCH DAMAGE.
*
* from: @(#)tss.h 5.4 (Berkeley) 1/18/91
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/tss.h 145120 2005-04-15 18:39:31Z peter $
*/
#ifndef _MACHINE_TSS_H_
Modified: trunk/sys/amd64/include/ucontext.h
===================================================================
--- trunk/sys/amd64/include/ucontext.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/ucontext.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,103 +1,7 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2003 Peter Wemm
- * Copyright (c) 1999 Marcel Moolenaar
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer
- * in this position and unchanged.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $MidnightBSD$
+ * This file is in the public domain.
*/
+/* $FreeBSD: stable/10/sys/amd64/include/ucontext.h 247047 2013-02-20 17:39:52Z kib $ */
-#ifndef _MACHINE_UCONTEXT_H_
-#define _MACHINE_UCONTEXT_H_
-
-/*
- * mc_trapno bits. Shall be in sync with TF_XXX.
- */
-#define _MC_HASSEGS 0x1
-#define _MC_HASBASES 0x2
-#define _MC_HASFPXSTATE 0x4
-#define _MC_FLAG_MASK (_MC_HASSEGS | _MC_HASBASES | _MC_HASFPXSTATE)
-
-typedef struct __mcontext {
- /*
- * The definition of mcontext_t must match the layout of
- * struct sigcontext after the sc_mask member. This is so
- * that we can support sigcontext and ucontext_t at the same
- * time.
- */
- __register_t mc_onstack; /* XXX - sigcontext compat. */
- __register_t mc_rdi; /* machine state (struct trapframe) */
- __register_t mc_rsi;
- __register_t mc_rdx;
- __register_t mc_rcx;
- __register_t mc_r8;
- __register_t mc_r9;
- __register_t mc_rax;
- __register_t mc_rbx;
- __register_t mc_rbp;
- __register_t mc_r10;
- __register_t mc_r11;
- __register_t mc_r12;
- __register_t mc_r13;
- __register_t mc_r14;
- __register_t mc_r15;
- __uint32_t mc_trapno;
- __uint16_t mc_fs;
- __uint16_t mc_gs;
- __register_t mc_addr;
- __uint32_t mc_flags;
- __uint16_t mc_es;
- __uint16_t mc_ds;
- __register_t mc_err;
- __register_t mc_rip;
- __register_t mc_cs;
- __register_t mc_rflags;
- __register_t mc_rsp;
- __register_t mc_ss;
-
- long mc_len; /* sizeof(mcontext_t) */
-
-#define _MC_FPFMT_NODEV 0x10000 /* device not present or configured */
-#define _MC_FPFMT_XMM 0x10002
- long mc_fpformat;
-#define _MC_FPOWNED_NONE 0x20000 /* FP state not used */
-#define _MC_FPOWNED_FPU 0x20001 /* FP state came from FPU */
-#define _MC_FPOWNED_PCB 0x20002 /* FP state came from PCB */
- long mc_ownedfp;
- /*
- * See <machine/fpu.h> for the internals of mc_fpstate[].
- */
- long mc_fpstate[64] __aligned(16);
-
- __register_t mc_fsbase;
- __register_t mc_gsbase;
-
- __register_t mc_xfpustate;
- __register_t mc_xfpustate_len;
-
- long mc_spare[4];
-} mcontext_t;
-
-#endif /* !_MACHINE_UCONTEXT_H_ */
+#include <x86/ucontext.h>
Modified: trunk/sys/amd64/include/varargs.h
===================================================================
--- trunk/sys/amd64/include/varargs.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/varargs.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2002 David E. O'Brien. All rights reserved.
* Copyright (c) 1990, 1993
@@ -37,7 +38,7 @@
* SUCH DAMAGE.
*
* @(#)varargs.h 8.2 (Berkeley) 3/22/94
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/varargs.h 143434 2005-03-11 22:16:09Z peter $
*/
#ifndef _MACHINE_VARARGS_H_
Modified: trunk/sys/amd64/include/vdso.h
===================================================================
--- trunk/sys/amd64/include/vdso.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/vdso.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,6 +1,7 @@
+/* $MidnightBSD$ */
/*-
* This file is in the public domain.
*/
-/* $FreeBSD$ */
+/* $FreeBSD: stable/10/sys/amd64/include/vdso.h 237433 2012-06-22 07:06:40Z kib $ */
#include <x86/vdso.h>
Modified: trunk/sys/amd64/include/vm.h
===================================================================
--- trunk/sys/amd64/include/vm.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/vm.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,5 +1,6 @@
+/* $MidnightBSD$ */
/*-
- * Copyright (c) 2009 Advanced Computing Technologies LLC
+ * Copyright (c) 2009 Hudson River Trading LLC
* Written by: John H. Baldwin <jhb at FreeBSD.org>
* All rights reserved.
*
@@ -24,7 +25,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/vm.h 283927 2015-06-02 19:20:39Z jhb $
*/
#ifndef _MACHINE_VM_H_
@@ -39,7 +40,6 @@
#define VM_MEMATTR_WRITE_PROTECTED ((vm_memattr_t)PAT_WRITE_PROTECTED)
#define VM_MEMATTR_WRITE_BACK ((vm_memattr_t)PAT_WRITE_BACK)
#define VM_MEMATTR_WEAK_UNCACHEABLE ((vm_memattr_t)PAT_UNCACHED)
-#define VM_MEMATTR_UNCACHED VM_MEMATTR_WEAK_UNCACHEABLE
#define VM_MEMATTR_DEFAULT VM_MEMATTR_WRITE_BACK
Added: trunk/sys/amd64/include/vmm.h
===================================================================
--- trunk/sys/amd64/include/vmm.h (rev 0)
+++ trunk/sys/amd64/include/vmm.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -0,0 +1,676 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011 NetApp, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/amd64/include/vmm.h 295124 2016-02-01 14:56:11Z grehan $
+ */
+
+#ifndef _VMM_H_
+#define _VMM_H_
+
+#include <x86/segments.h>
+
+enum vm_suspend_how {
+ VM_SUSPEND_NONE,
+ VM_SUSPEND_RESET,
+ VM_SUSPEND_POWEROFF,
+ VM_SUSPEND_HALT,
+ VM_SUSPEND_TRIPLEFAULT,
+ VM_SUSPEND_LAST
+};
+
+/*
+ * Identifiers for architecturally defined registers.
+ */
+enum vm_reg_name {
+ VM_REG_GUEST_RAX,
+ VM_REG_GUEST_RBX,
+ VM_REG_GUEST_RCX,
+ VM_REG_GUEST_RDX,
+ VM_REG_GUEST_RSI,
+ VM_REG_GUEST_RDI,
+ VM_REG_GUEST_RBP,
+ VM_REG_GUEST_R8,
+ VM_REG_GUEST_R9,
+ VM_REG_GUEST_R10,
+ VM_REG_GUEST_R11,
+ VM_REG_GUEST_R12,
+ VM_REG_GUEST_R13,
+ VM_REG_GUEST_R14,
+ VM_REG_GUEST_R15,
+ VM_REG_GUEST_CR0,
+ VM_REG_GUEST_CR3,
+ VM_REG_GUEST_CR4,
+ VM_REG_GUEST_DR7,
+ VM_REG_GUEST_RSP,
+ VM_REG_GUEST_RIP,
+ VM_REG_GUEST_RFLAGS,
+ VM_REG_GUEST_ES,
+ VM_REG_GUEST_CS,
+ VM_REG_GUEST_SS,
+ VM_REG_GUEST_DS,
+ VM_REG_GUEST_FS,
+ VM_REG_GUEST_GS,
+ VM_REG_GUEST_LDTR,
+ VM_REG_GUEST_TR,
+ VM_REG_GUEST_IDTR,
+ VM_REG_GUEST_GDTR,
+ VM_REG_GUEST_EFER,
+ VM_REG_GUEST_CR2,
+ VM_REG_GUEST_PDPTE0,
+ VM_REG_GUEST_PDPTE1,
+ VM_REG_GUEST_PDPTE2,
+ VM_REG_GUEST_PDPTE3,
+ VM_REG_GUEST_INTR_SHADOW,
+ VM_REG_LAST
+};
+
+enum x2apic_state {
+ X2APIC_DISABLED,
+ X2APIC_ENABLED,
+ X2APIC_STATE_LAST
+};
+
+#define VM_INTINFO_VECTOR(info) ((info) & 0xff)
+#define VM_INTINFO_DEL_ERRCODE 0x800
+#define VM_INTINFO_RSVD 0x7ffff000
+#define VM_INTINFO_VALID 0x80000000
+#define VM_INTINFO_TYPE 0x700
+#define VM_INTINFO_HWINTR (0 << 8)
+#define VM_INTINFO_NMI (2 << 8)
+#define VM_INTINFO_HWEXCEPTION (3 << 8)
+#define VM_INTINFO_SWINTR (4 << 8)
+
+#ifdef _KERNEL
+
+#define VM_MAX_NAMELEN 32
+
+struct vm;
+struct vm_exception;
+struct seg_desc;
+struct vm_exit;
+struct vm_run;
+struct vhpet;
+struct vioapic;
+struct vlapic;
+struct vmspace;
+struct vm_object;
+struct vm_guest_paging;
+struct pmap;
+
+struct vm_eventinfo {
+ void *rptr; /* rendezvous cookie */
+ int *sptr; /* suspend cookie */
+ int *iptr; /* reqidle cookie */
+};
+
+typedef int (*vmm_init_func_t)(int ipinum);
+typedef int (*vmm_cleanup_func_t)(void);
+typedef void (*vmm_resume_func_t)(void);
+typedef void * (*vmi_init_func_t)(struct vm *vm, struct pmap *pmap);
+typedef int (*vmi_run_func_t)(void *vmi, int vcpu, register_t rip,
+ struct pmap *pmap, struct vm_eventinfo *info);
+typedef void (*vmi_cleanup_func_t)(void *vmi);
+typedef int (*vmi_get_register_t)(void *vmi, int vcpu, int num,
+ uint64_t *retval);
+typedef int (*vmi_set_register_t)(void *vmi, int vcpu, int num,
+ uint64_t val);
+typedef int (*vmi_get_desc_t)(void *vmi, int vcpu, int num,
+ struct seg_desc *desc);
+typedef int (*vmi_set_desc_t)(void *vmi, int vcpu, int num,
+ struct seg_desc *desc);
+typedef int (*vmi_get_cap_t)(void *vmi, int vcpu, int num, int *retval);
+typedef int (*vmi_set_cap_t)(void *vmi, int vcpu, int num, int val);
+typedef struct vmspace * (*vmi_vmspace_alloc)(vm_offset_t min, vm_offset_t max);
+typedef void (*vmi_vmspace_free)(struct vmspace *vmspace);
+typedef struct vlapic * (*vmi_vlapic_init)(void *vmi, int vcpu);
+typedef void (*vmi_vlapic_cleanup)(void *vmi, struct vlapic *vlapic);
+
+struct vmm_ops {
+ vmm_init_func_t init; /* module wide initialization */
+ vmm_cleanup_func_t cleanup;
+ vmm_resume_func_t resume;
+
+ vmi_init_func_t vminit; /* vm-specific initialization */
+ vmi_run_func_t vmrun;
+ vmi_cleanup_func_t vmcleanup;
+ vmi_get_register_t vmgetreg;
+ vmi_set_register_t vmsetreg;
+ vmi_get_desc_t vmgetdesc;
+ vmi_set_desc_t vmsetdesc;
+ vmi_get_cap_t vmgetcap;
+ vmi_set_cap_t vmsetcap;
+ vmi_vmspace_alloc vmspace_alloc;
+ vmi_vmspace_free vmspace_free;
+ vmi_vlapic_init vlapic_init;
+ vmi_vlapic_cleanup vlapic_cleanup;
+};
+
+extern struct vmm_ops vmm_ops_intel;
+extern struct vmm_ops vmm_ops_amd;
+
+int vm_create(const char *name, struct vm **retvm);
+void vm_destroy(struct vm *vm);
+int vm_reinit(struct vm *vm);
+const char *vm_name(struct vm *vm);
+
+/*
+ * APIs that modify the guest memory map require all vcpus to be frozen.
+ */
+int vm_mmap_memseg(struct vm *vm, vm_paddr_t gpa, int segid, vm_ooffset_t off,
+ size_t len, int prot, int flags);
+int vm_alloc_memseg(struct vm *vm, int ident, size_t len, bool sysmem);
+void vm_free_memseg(struct vm *vm, int ident);
+int vm_map_mmio(struct vm *vm, vm_paddr_t gpa, size_t len, vm_paddr_t hpa);
+int vm_unmap_mmio(struct vm *vm, vm_paddr_t gpa, size_t len);
+int vm_assign_pptdev(struct vm *vm, int bus, int slot, int func);
+int vm_unassign_pptdev(struct vm *vm, int bus, int slot, int func);
+
+/*
+ * APIs that inspect the guest memory map require only a *single* vcpu to
+ * be frozen. This acts like a read lock on the guest memory map since any
+ * modification requires *all* vcpus to be frozen.
+ */
+int vm_mmap_getnext(struct vm *vm, vm_paddr_t *gpa, int *segid,
+ vm_ooffset_t *segoff, size_t *len, int *prot, int *flags);
+int vm_get_memseg(struct vm *vm, int ident, size_t *len, bool *sysmem,
+ struct vm_object **objptr);
+void *vm_gpa_hold(struct vm *, int vcpuid, vm_paddr_t gpa, size_t len,
+ int prot, void **cookie);
+void vm_gpa_release(void *cookie);
+bool vm_mem_allocated(struct vm *vm, int vcpuid, vm_paddr_t gpa);
+
+int vm_get_register(struct vm *vm, int vcpu, int reg, uint64_t *retval);
+int vm_set_register(struct vm *vm, int vcpu, int reg, uint64_t val);
+int vm_get_seg_desc(struct vm *vm, int vcpu, int reg,
+ struct seg_desc *ret_desc);
+int vm_set_seg_desc(struct vm *vm, int vcpu, int reg,
+ struct seg_desc *desc);
+int vm_run(struct vm *vm, struct vm_run *vmrun);
+int vm_suspend(struct vm *vm, enum vm_suspend_how how);
+int vm_inject_nmi(struct vm *vm, int vcpu);
+int vm_nmi_pending(struct vm *vm, int vcpuid);
+void vm_nmi_clear(struct vm *vm, int vcpuid);
+int vm_inject_extint(struct vm *vm, int vcpu);
+int vm_extint_pending(struct vm *vm, int vcpuid);
+void vm_extint_clear(struct vm *vm, int vcpuid);
+struct vlapic *vm_lapic(struct vm *vm, int cpu);
+struct vioapic *vm_ioapic(struct vm *vm);
+struct vhpet *vm_hpet(struct vm *vm);
+int vm_get_capability(struct vm *vm, int vcpu, int type, int *val);
+int vm_set_capability(struct vm *vm, int vcpu, int type, int val);
+int vm_get_x2apic_state(struct vm *vm, int vcpu, enum x2apic_state *state);
+int vm_set_x2apic_state(struct vm *vm, int vcpu, enum x2apic_state state);
+int vm_apicid2vcpuid(struct vm *vm, int apicid);
+int vm_activate_cpu(struct vm *vm, int vcpu);
+struct vm_exit *vm_exitinfo(struct vm *vm, int vcpuid);
+void vm_exit_suspended(struct vm *vm, int vcpuid, uint64_t rip);
+void vm_exit_rendezvous(struct vm *vm, int vcpuid, uint64_t rip);
+void vm_exit_astpending(struct vm *vm, int vcpuid, uint64_t rip);
+void vm_exit_reqidle(struct vm *vm, int vcpuid, uint64_t rip);
+
+#ifdef _SYS__CPUSET_H_
+/*
+ * Rendezvous all vcpus specified in 'dest' and execute 'func(arg)'.
+ * The rendezvous 'func(arg)' is not allowed to do anything that will
+ * cause the thread to be put to sleep.
+ *
+ * If the rendezvous is being initiated from a vcpu context then the
+ * 'vcpuid' must refer to that vcpu, otherwise it should be set to -1.
+ *
+ * The caller cannot hold any locks when initiating the rendezvous.
+ *
+ * The implementation of this API may cause vcpus other than those specified
+ * by 'dest' to be stalled. The caller should not rely on any vcpus making
+ * forward progress when the rendezvous is in progress.
+ */
+typedef void (*vm_rendezvous_func_t)(struct vm *vm, int vcpuid, void *arg);
+void vm_smp_rendezvous(struct vm *vm, int vcpuid, cpuset_t dest,
+ vm_rendezvous_func_t func, void *arg);
+cpuset_t vm_active_cpus(struct vm *vm);
+cpuset_t vm_suspended_cpus(struct vm *vm);
+#endif /* _SYS__CPUSET_H_ */
+
+static __inline int
+vcpu_rendezvous_pending(struct vm_eventinfo *info)
+{
+
+ return (*((uintptr_t *)(info->rptr)) != 0);
+}
+
+static __inline int
+vcpu_suspended(struct vm_eventinfo *info)
+{
+
+ return (*info->sptr);
+}
+
+static __inline int
+vcpu_reqidle(struct vm_eventinfo *info)
+{
+
+ return (*info->iptr);
+}
+
+/*
+ * Return 1 if device indicated by bus/slot/func is supposed to be a
+ * pci passthrough device.
+ *
+ * Return 0 otherwise.
+ */
+int vmm_is_pptdev(int bus, int slot, int func);
+
+void *vm_iommu_domain(struct vm *vm);
+
+enum vcpu_state {
+ VCPU_IDLE,
+ VCPU_FROZEN,
+ VCPU_RUNNING,
+ VCPU_SLEEPING,
+};
+
+int vcpu_set_state(struct vm *vm, int vcpu, enum vcpu_state state,
+ bool from_idle);
+enum vcpu_state vcpu_get_state(struct vm *vm, int vcpu, int *hostcpu);
+
+static int __inline
+vcpu_is_running(struct vm *vm, int vcpu, int *hostcpu)
+{
+ return (vcpu_get_state(vm, vcpu, hostcpu) == VCPU_RUNNING);
+}
+
+#ifdef _SYS_PROC_H_
+static int __inline
+vcpu_should_yield(struct vm *vm, int vcpu)
+{
+
+ if (curthread->td_flags & (TDF_ASTPENDING | TDF_NEEDRESCHED))
+ return (1);
+ else if (curthread->td_owepreempt)
+ return (1);
+ else
+ return (0);
+}
+#endif
+
+void *vcpu_stats(struct vm *vm, int vcpu);
+void vcpu_notify_event(struct vm *vm, int vcpuid, bool lapic_intr);
+struct vmspace *vm_get_vmspace(struct vm *vm);
+struct vatpic *vm_atpic(struct vm *vm);
+struct vatpit *vm_atpit(struct vm *vm);
+struct vpmtmr *vm_pmtmr(struct vm *vm);
+struct vrtc *vm_rtc(struct vm *vm);
+
+/*
+ * Inject exception 'vector' into the guest vcpu. This function returns 0 on
+ * success and non-zero on failure.
+ *
+ * Wrapper functions like 'vm_inject_gp()' should be preferred to calling
+ * this function directly because they enforce the trap-like or fault-like
+ * behavior of an exception.
+ *
+ * This function should only be called in the context of the thread that is
+ * executing this vcpu.
+ */
+int vm_inject_exception(struct vm *vm, int vcpuid, int vector, int err_valid,
+ uint32_t errcode, int restart_instruction);
+
+/*
+ * This function is called after a VM-exit that occurred during exception or
+ * interrupt delivery through the IDT. The format of 'intinfo' is described
+ * in Figure 15-1, "EXITINTINFO for All Intercepts", APM, Vol 2.
+ *
+ * If a VM-exit handler completes the event delivery successfully then it
+ * should call vm_exit_intinfo() to extinguish the pending event. For e.g.,
+ * if the task switch emulation is triggered via a task gate then it should
+ * call this function with 'intinfo=0' to indicate that the external event
+ * is not pending anymore.
+ *
+ * Return value is 0 on success and non-zero on failure.
+ */
+int vm_exit_intinfo(struct vm *vm, int vcpuid, uint64_t intinfo);
+
+/*
+ * This function is called before every VM-entry to retrieve a pending
+ * event that should be injected into the guest. This function combines
+ * nested events into a double or triple fault.
+ *
+ * Returns 0 if there are no events that need to be injected into the guest
+ * and non-zero otherwise.
+ */
+int vm_entry_intinfo(struct vm *vm, int vcpuid, uint64_t *info);
+
+int vm_get_intinfo(struct vm *vm, int vcpuid, uint64_t *info1, uint64_t *info2);
+
+enum vm_reg_name vm_segment_name(int seg_encoding);
+
+struct vm_copyinfo {
+ uint64_t gpa;
+ size_t len;
+ void *hva;
+ void *cookie;
+};
+
+/*
+ * Set up 'copyinfo[]' to copy to/from guest linear address space starting
+ * at 'gla' and 'len' bytes long. The 'prot' should be set to PROT_READ for
+ * a copyin or PROT_WRITE for a copyout.
+ *
+ * retval is_fault Intepretation
+ * 0 0 Success
+ * 0 1 An exception was injected into the guest
+ * EFAULT N/A Unrecoverable error
+ *
+ * The 'copyinfo[]' can be passed to 'vm_copyin()' or 'vm_copyout()' only if
+ * the return value is 0. The 'copyinfo[]' resources should be freed by calling
+ * 'vm_copy_teardown()' after the copy is done.
+ */
+int vm_copy_setup(struct vm *vm, int vcpuid, struct vm_guest_paging *paging,
+ uint64_t gla, size_t len, int prot, struct vm_copyinfo *copyinfo,
+ int num_copyinfo, int *is_fault);
+void vm_copy_teardown(struct vm *vm, int vcpuid, struct vm_copyinfo *copyinfo,
+ int num_copyinfo);
+void vm_copyin(struct vm *vm, int vcpuid, struct vm_copyinfo *copyinfo,
+ void *kaddr, size_t len);
+void vm_copyout(struct vm *vm, int vcpuid, const void *kaddr,
+ struct vm_copyinfo *copyinfo, size_t len);
+
+int vcpu_trace_exceptions(struct vm *vm, int vcpuid);
+#endif /* KERNEL */
+
+#define VM_MAXCPU 16 /* maximum virtual cpus */
+
+/*
+ * Identifiers for optional vmm capabilities
+ */
+enum vm_cap_type {
+ VM_CAP_HALT_EXIT,
+ VM_CAP_MTRAP_EXIT,
+ VM_CAP_PAUSE_EXIT,
+ VM_CAP_UNRESTRICTED_GUEST,
+ VM_CAP_ENABLE_INVPCID,
+ VM_CAP_MAX
+};
+
+enum vm_intr_trigger {
+ EDGE_TRIGGER,
+ LEVEL_TRIGGER
+};
+
+/*
+ * The 'access' field has the format specified in Table 21-2 of the Intel
+ * Architecture Manual vol 3b.
+ *
+ * XXX The contents of the 'access' field are architecturally defined except
+ * bit 16 - Segment Unusable.
+ */
+struct seg_desc {
+ uint64_t base;
+ uint32_t limit;
+ uint32_t access;
+};
+#define SEG_DESC_TYPE(access) ((access) & 0x001f)
+#define SEG_DESC_DPL(access) (((access) >> 5) & 0x3)
+#define SEG_DESC_PRESENT(access) (((access) & 0x0080) ? 1 : 0)
+#define SEG_DESC_DEF32(access) (((access) & 0x4000) ? 1 : 0)
+#define SEG_DESC_GRANULARITY(access) (((access) & 0x8000) ? 1 : 0)
+#define SEG_DESC_UNUSABLE(access) (((access) & 0x10000) ? 1 : 0)
+
+enum vm_cpu_mode {
+ CPU_MODE_REAL,
+ CPU_MODE_PROTECTED,
+ CPU_MODE_COMPATIBILITY, /* IA-32E mode (CS.L = 0) */
+ CPU_MODE_64BIT, /* IA-32E mode (CS.L = 1) */
+};
+
+enum vm_paging_mode {
+ PAGING_MODE_FLAT,
+ PAGING_MODE_32,
+ PAGING_MODE_PAE,
+ PAGING_MODE_64,
+};
+
+struct vm_guest_paging {
+ uint64_t cr3;
+ int cpl;
+ enum vm_cpu_mode cpu_mode;
+ enum vm_paging_mode paging_mode;
+};
+
+/*
+ * The data structures 'vie' and 'vie_op' are meant to be opaque to the
+ * consumers of instruction decoding. The only reason why their contents
+ * need to be exposed is because they are part of the 'vm_exit' structure.
+ */
+struct vie_op {
+ uint8_t op_byte; /* actual opcode byte */
+ uint8_t op_type; /* type of operation (e.g. MOV) */
+ uint16_t op_flags;
+};
+
+#define VIE_INST_SIZE 15
+struct vie {
+ uint8_t inst[VIE_INST_SIZE]; /* instruction bytes */
+ uint8_t num_valid; /* size of the instruction */
+ uint8_t num_processed;
+
+ uint8_t addrsize:4, opsize:4; /* address and operand sizes */
+ uint8_t rex_w:1, /* REX prefix */
+ rex_r:1,
+ rex_x:1,
+ rex_b:1,
+ rex_present:1,
+ repz_present:1, /* REP/REPE/REPZ prefix */
+ repnz_present:1, /* REPNE/REPNZ prefix */
+ opsize_override:1, /* Operand size override */
+ addrsize_override:1, /* Address size override */
+ segment_override:1; /* Segment override */
+
+ uint8_t mod:2, /* ModRM byte */
+ reg:4,
+ rm:4;
+
+ uint8_t ss:2, /* SIB byte */
+ index:4,
+ base:4;
+
+ uint8_t disp_bytes;
+ uint8_t imm_bytes;
+
+ uint8_t scale;
+ int base_register; /* VM_REG_GUEST_xyz */
+ int index_register; /* VM_REG_GUEST_xyz */
+ int segment_register; /* VM_REG_GUEST_xyz */
+
+ int64_t displacement; /* optional addr displacement */
+ int64_t immediate; /* optional immediate operand */
+
+ uint8_t decoded; /* set to 1 if successfully decoded */
+
+ struct vie_op op; /* opcode description */
+};
+
+enum vm_exitcode {
+ VM_EXITCODE_INOUT,
+ VM_EXITCODE_VMX,
+ VM_EXITCODE_BOGUS,
+ VM_EXITCODE_RDMSR,
+ VM_EXITCODE_WRMSR,
+ VM_EXITCODE_HLT,
+ VM_EXITCODE_MTRAP,
+ VM_EXITCODE_PAUSE,
+ VM_EXITCODE_PAGING,
+ VM_EXITCODE_INST_EMUL,
+ VM_EXITCODE_SPINUP_AP,
+ VM_EXITCODE_DEPRECATED1, /* used to be SPINDOWN_CPU */
+ VM_EXITCODE_RENDEZVOUS,
+ VM_EXITCODE_IOAPIC_EOI,
+ VM_EXITCODE_SUSPENDED,
+ VM_EXITCODE_INOUT_STR,
+ VM_EXITCODE_TASK_SWITCH,
+ VM_EXITCODE_MONITOR,
+ VM_EXITCODE_MWAIT,
+ VM_EXITCODE_SVM,
+ VM_EXITCODE_REQIDLE,
+ VM_EXITCODE_MAX
+};
+
+struct vm_inout {
+ uint16_t bytes:3; /* 1 or 2 or 4 */
+ uint16_t in:1;
+ uint16_t string:1;
+ uint16_t rep:1;
+ uint16_t port;
+ uint32_t eax; /* valid for out */
+};
+
+struct vm_inout_str {
+ struct vm_inout inout; /* must be the first element */
+ struct vm_guest_paging paging;
+ uint64_t rflags;
+ uint64_t cr0;
+ uint64_t index;
+ uint64_t count; /* rep=1 (%rcx), rep=0 (1) */
+ int addrsize;
+ enum vm_reg_name seg_name;
+ struct seg_desc seg_desc;
+};
+
+enum task_switch_reason {
+ TSR_CALL,
+ TSR_IRET,
+ TSR_JMP,
+ TSR_IDT_GATE, /* task gate in IDT */
+};
+
+struct vm_task_switch {
+ uint16_t tsssel; /* new TSS selector */
+ int ext; /* task switch due to external event */
+ uint32_t errcode;
+ int errcode_valid; /* push 'errcode' on the new stack */
+ enum task_switch_reason reason;
+ struct vm_guest_paging paging;
+};
+
+struct vm_exit {
+ enum vm_exitcode exitcode;
+ int inst_length; /* 0 means unknown */
+ uint64_t rip;
+ union {
+ struct vm_inout inout;
+ struct vm_inout_str inout_str;
+ struct {
+ uint64_t gpa;
+ int fault_type;
+ } paging;
+ struct {
+ uint64_t gpa;
+ uint64_t gla;
+ uint64_t cs_base;
+ int cs_d; /* CS.D */
+ struct vm_guest_paging paging;
+ struct vie vie;
+ } inst_emul;
+ /*
+ * VMX specific payload. Used when there is no "better"
+ * exitcode to represent the VM-exit.
+ */
+ struct {
+ int status; /* vmx inst status */
+ /*
+ * 'exit_reason' and 'exit_qualification' are valid
+ * only if 'status' is zero.
+ */
+ uint32_t exit_reason;
+ uint64_t exit_qualification;
+ /*
+ * 'inst_error' and 'inst_type' are valid
+ * only if 'status' is non-zero.
+ */
+ int inst_type;
+ int inst_error;
+ } vmx;
+ /*
+ * SVM specific payload.
+ */
+ struct {
+ uint64_t exitcode;
+ uint64_t exitinfo1;
+ uint64_t exitinfo2;
+ } svm;
+ struct {
+ uint32_t code; /* ecx value */
+ uint64_t wval;
+ } msr;
+ struct {
+ int vcpu;
+ uint64_t rip;
+ } spinup_ap;
+ struct {
+ uint64_t rflags;
+ } hlt;
+ struct {
+ int vector;
+ } ioapic_eoi;
+ struct {
+ enum vm_suspend_how how;
+ } suspended;
+ struct vm_task_switch task_switch;
+ } u;
+};
+
+/* APIs to inject faults into the guest */
+void vm_inject_fault(void *vm, int vcpuid, int vector, int errcode_valid,
+ int errcode);
+
+static __inline void
+vm_inject_ud(void *vm, int vcpuid)
+{
+ vm_inject_fault(vm, vcpuid, IDT_UD, 0, 0);
+}
+
+static __inline void
+vm_inject_gp(void *vm, int vcpuid)
+{
+ vm_inject_fault(vm, vcpuid, IDT_GP, 1, 0);
+}
+
+static __inline void
+vm_inject_ac(void *vm, int vcpuid, int errcode)
+{
+ vm_inject_fault(vm, vcpuid, IDT_AC, 1, errcode);
+}
+
+static __inline void
+vm_inject_ss(void *vm, int vcpuid, int errcode)
+{
+ vm_inject_fault(vm, vcpuid, IDT_SS, 1, errcode);
+}
+
+void vm_inject_pf(void *vm, int vcpuid, int error_code, uint64_t cr2);
+
+int vm_restart_instruction(void *vm, int vcpuid);
+
+#endif /* _VMM_H_ */
Property changes on: trunk/sys/amd64/include/vmm.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/amd64/include/vmm_dev.h
===================================================================
--- trunk/sys/amd64/include/vmm_dev.h (rev 0)
+++ trunk/sys/amd64/include/vmm_dev.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -0,0 +1,386 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2011 NetApp, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/amd64/include/vmm_dev.h 295124 2016-02-01 14:56:11Z grehan $
+ */
+
+#ifndef _VMM_DEV_H_
+#define _VMM_DEV_H_
+
+#ifdef _KERNEL
+void vmmdev_init(void);
+int vmmdev_cleanup(void);
+#endif
+
+struct vm_memmap {
+ vm_paddr_t gpa;
+ int segid; /* memory segment */
+ vm_ooffset_t segoff; /* offset into memory segment */
+ size_t len; /* mmap length */
+ int prot; /* RWX */
+ int flags;
+};
+#define VM_MEMMAP_F_WIRED 0x01
+#define VM_MEMMAP_F_IOMMU 0x02
+
+#define VM_MEMSEG_NAME(m) ((m)->name[0] != '\0' ? (m)->name : NULL)
+struct vm_memseg {
+ int segid;
+ size_t len;
+ char name[SPECNAMELEN + 1];
+};
+
+struct vm_register {
+ int cpuid;
+ int regnum; /* enum vm_reg_name */
+ uint64_t regval;
+};
+
+struct vm_seg_desc { /* data or code segment */
+ int cpuid;
+ int regnum; /* enum vm_reg_name */
+ struct seg_desc desc;
+};
+
+struct vm_run {
+ int cpuid;
+ struct vm_exit vm_exit;
+};
+
+struct vm_exception {
+ int cpuid;
+ int vector;
+ uint32_t error_code;
+ int error_code_valid;
+ int restart_instruction;
+};
+
+struct vm_lapic_msi {
+ uint64_t msg;
+ uint64_t addr;
+};
+
+struct vm_lapic_irq {
+ int cpuid;
+ int vector;
+};
+
+struct vm_ioapic_irq {
+ int irq;
+};
+
+struct vm_isa_irq {
+ int atpic_irq;
+ int ioapic_irq;
+};
+
+struct vm_isa_irq_trigger {
+ int atpic_irq;
+ enum vm_intr_trigger trigger;
+};
+
+struct vm_capability {
+ int cpuid;
+ enum vm_cap_type captype;
+ int capval;
+ int allcpus;
+};
+
+struct vm_pptdev {
+ int bus;
+ int slot;
+ int func;
+};
+
+struct vm_pptdev_mmio {
+ int bus;
+ int slot;
+ int func;
+ vm_paddr_t gpa;
+ vm_paddr_t hpa;
+ size_t len;
+};
+
+struct vm_pptdev_msi {
+ int vcpu;
+ int bus;
+ int slot;
+ int func;
+ int numvec; /* 0 means disabled */
+ uint64_t msg;
+ uint64_t addr;
+};
+
+struct vm_pptdev_msix {
+ int vcpu;
+ int bus;
+ int slot;
+ int func;
+ int idx;
+ uint64_t msg;
+ uint32_t vector_control;
+ uint64_t addr;
+};
+
+struct vm_nmi {
+ int cpuid;
+};
+
+#define MAX_VM_STATS 64
+struct vm_stats {
+ int cpuid; /* in */
+ int num_entries; /* out */
+ struct timeval tv;
+ uint64_t statbuf[MAX_VM_STATS];
+};
+
+struct vm_stat_desc {
+ int index; /* in */
+ char desc[128]; /* out */
+};
+
+struct vm_x2apic {
+ int cpuid;
+ enum x2apic_state state;
+};
+
+struct vm_gpa_pte {
+ uint64_t gpa; /* in */
+ uint64_t pte[4]; /* out */
+ int ptenum;
+};
+
+struct vm_hpet_cap {
+ uint32_t capabilities; /* lower 32 bits of HPET capabilities */
+};
+
+struct vm_suspend {
+ enum vm_suspend_how how;
+};
+
+struct vm_gla2gpa {
+ int vcpuid; /* inputs */
+ int prot; /* PROT_READ or PROT_WRITE */
+ uint64_t gla;
+ struct vm_guest_paging paging;
+ int fault; /* outputs */
+ uint64_t gpa;
+};
+
+struct vm_activate_cpu {
+ int vcpuid;
+};
+
+struct vm_cpuset {
+ int which;
+ int cpusetsize;
+ cpuset_t *cpus;
+};
+#define VM_ACTIVE_CPUS 0
+#define VM_SUSPENDED_CPUS 1
+
+struct vm_intinfo {
+ int vcpuid;
+ uint64_t info1;
+ uint64_t info2;
+};
+
+struct vm_rtc_time {
+ time_t secs;
+};
+
+struct vm_rtc_data {
+ int offset;
+ uint8_t value;
+};
+
+enum {
+ /* general routines */
+ IOCNUM_ABIVERS = 0,
+ IOCNUM_RUN = 1,
+ IOCNUM_SET_CAPABILITY = 2,
+ IOCNUM_GET_CAPABILITY = 3,
+ IOCNUM_SUSPEND = 4,
+ IOCNUM_REINIT = 5,
+
+ /* memory apis */
+ IOCNUM_MAP_MEMORY = 10, /* deprecated */
+ IOCNUM_GET_MEMORY_SEG = 11, /* deprecated */
+ IOCNUM_GET_GPA_PMAP = 12,
+ IOCNUM_GLA2GPA = 13,
+ IOCNUM_ALLOC_MEMSEG = 14,
+ IOCNUM_GET_MEMSEG = 15,
+ IOCNUM_MMAP_MEMSEG = 16,
+ IOCNUM_MMAP_GETNEXT = 17,
+
+ /* register/state accessors */
+ IOCNUM_SET_REGISTER = 20,
+ IOCNUM_GET_REGISTER = 21,
+ IOCNUM_SET_SEGMENT_DESCRIPTOR = 22,
+ IOCNUM_GET_SEGMENT_DESCRIPTOR = 23,
+
+ /* interrupt injection */
+ IOCNUM_GET_INTINFO = 28,
+ IOCNUM_SET_INTINFO = 29,
+ IOCNUM_INJECT_EXCEPTION = 30,
+ IOCNUM_LAPIC_IRQ = 31,
+ IOCNUM_INJECT_NMI = 32,
+ IOCNUM_IOAPIC_ASSERT_IRQ = 33,
+ IOCNUM_IOAPIC_DEASSERT_IRQ = 34,
+ IOCNUM_IOAPIC_PULSE_IRQ = 35,
+ IOCNUM_LAPIC_MSI = 36,
+ IOCNUM_LAPIC_LOCAL_IRQ = 37,
+ IOCNUM_IOAPIC_PINCOUNT = 38,
+ IOCNUM_RESTART_INSTRUCTION = 39,
+
+ /* PCI pass-thru */
+ IOCNUM_BIND_PPTDEV = 40,
+ IOCNUM_UNBIND_PPTDEV = 41,
+ IOCNUM_MAP_PPTDEV_MMIO = 42,
+ IOCNUM_PPTDEV_MSI = 43,
+ IOCNUM_PPTDEV_MSIX = 44,
+
+ /* statistics */
+ IOCNUM_VM_STATS = 50,
+ IOCNUM_VM_STAT_DESC = 51,
+
+ /* kernel device state */
+ IOCNUM_SET_X2APIC_STATE = 60,
+ IOCNUM_GET_X2APIC_STATE = 61,
+ IOCNUM_GET_HPET_CAPABILITIES = 62,
+
+ /* legacy interrupt injection */
+ IOCNUM_ISA_ASSERT_IRQ = 80,
+ IOCNUM_ISA_DEASSERT_IRQ = 81,
+ IOCNUM_ISA_PULSE_IRQ = 82,
+ IOCNUM_ISA_SET_IRQ_TRIGGER = 83,
+
+ /* vm_cpuset */
+ IOCNUM_ACTIVATE_CPU = 90,
+ IOCNUM_GET_CPUSET = 91,
+
+ /* RTC */
+ IOCNUM_RTC_READ = 100,
+ IOCNUM_RTC_WRITE = 101,
+ IOCNUM_RTC_SETTIME = 102,
+ IOCNUM_RTC_GETTIME = 103,
+};
+
+#define VM_RUN \
+ _IOWR('v', IOCNUM_RUN, struct vm_run)
+#define VM_SUSPEND \
+ _IOW('v', IOCNUM_SUSPEND, struct vm_suspend)
+#define VM_REINIT \
+ _IO('v', IOCNUM_REINIT)
+#define VM_ALLOC_MEMSEG \
+ _IOW('v', IOCNUM_ALLOC_MEMSEG, struct vm_memseg)
+#define VM_GET_MEMSEG \
+ _IOWR('v', IOCNUM_GET_MEMSEG, struct vm_memseg)
+#define VM_MMAP_MEMSEG \
+ _IOW('v', IOCNUM_MMAP_MEMSEG, struct vm_memmap)
+#define VM_MMAP_GETNEXT \
+ _IOWR('v', IOCNUM_MMAP_GETNEXT, struct vm_memmap)
+#define VM_SET_REGISTER \
+ _IOW('v', IOCNUM_SET_REGISTER, struct vm_register)
+#define VM_GET_REGISTER \
+ _IOWR('v', IOCNUM_GET_REGISTER, struct vm_register)
+#define VM_SET_SEGMENT_DESCRIPTOR \
+ _IOW('v', IOCNUM_SET_SEGMENT_DESCRIPTOR, struct vm_seg_desc)
+#define VM_GET_SEGMENT_DESCRIPTOR \
+ _IOWR('v', IOCNUM_GET_SEGMENT_DESCRIPTOR, struct vm_seg_desc)
+#define VM_INJECT_EXCEPTION \
+ _IOW('v', IOCNUM_INJECT_EXCEPTION, struct vm_exception)
+#define VM_LAPIC_IRQ \
+ _IOW('v', IOCNUM_LAPIC_IRQ, struct vm_lapic_irq)
+#define VM_LAPIC_LOCAL_IRQ \
+ _IOW('v', IOCNUM_LAPIC_LOCAL_IRQ, struct vm_lapic_irq)
+#define VM_LAPIC_MSI \
+ _IOW('v', IOCNUM_LAPIC_MSI, struct vm_lapic_msi)
+#define VM_IOAPIC_ASSERT_IRQ \
+ _IOW('v', IOCNUM_IOAPIC_ASSERT_IRQ, struct vm_ioapic_irq)
+#define VM_IOAPIC_DEASSERT_IRQ \
+ _IOW('v', IOCNUM_IOAPIC_DEASSERT_IRQ, struct vm_ioapic_irq)
+#define VM_IOAPIC_PULSE_IRQ \
+ _IOW('v', IOCNUM_IOAPIC_PULSE_IRQ, struct vm_ioapic_irq)
+#define VM_IOAPIC_PINCOUNT \
+ _IOR('v', IOCNUM_IOAPIC_PINCOUNT, int)
+#define VM_ISA_ASSERT_IRQ \
+ _IOW('v', IOCNUM_ISA_ASSERT_IRQ, struct vm_isa_irq)
+#define VM_ISA_DEASSERT_IRQ \
+ _IOW('v', IOCNUM_ISA_DEASSERT_IRQ, struct vm_isa_irq)
+#define VM_ISA_PULSE_IRQ \
+ _IOW('v', IOCNUM_ISA_PULSE_IRQ, struct vm_isa_irq)
+#define VM_ISA_SET_IRQ_TRIGGER \
+ _IOW('v', IOCNUM_ISA_SET_IRQ_TRIGGER, struct vm_isa_irq_trigger)
+#define VM_SET_CAPABILITY \
+ _IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability)
+#define VM_GET_CAPABILITY \
+ _IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability)
+#define VM_BIND_PPTDEV \
+ _IOW('v', IOCNUM_BIND_PPTDEV, struct vm_pptdev)
+#define VM_UNBIND_PPTDEV \
+ _IOW('v', IOCNUM_UNBIND_PPTDEV, struct vm_pptdev)
+#define VM_MAP_PPTDEV_MMIO \
+ _IOW('v', IOCNUM_MAP_PPTDEV_MMIO, struct vm_pptdev_mmio)
+#define VM_PPTDEV_MSI \
+ _IOW('v', IOCNUM_PPTDEV_MSI, struct vm_pptdev_msi)
+#define VM_PPTDEV_MSIX \
+ _IOW('v', IOCNUM_PPTDEV_MSIX, struct vm_pptdev_msix)
+#define VM_INJECT_NMI \
+ _IOW('v', IOCNUM_INJECT_NMI, struct vm_nmi)
+#define VM_STATS \
+ _IOWR('v', IOCNUM_VM_STATS, struct vm_stats)
+#define VM_STAT_DESC \
+ _IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc)
+#define VM_SET_X2APIC_STATE \
+ _IOW('v', IOCNUM_SET_X2APIC_STATE, struct vm_x2apic)
+#define VM_GET_X2APIC_STATE \
+ _IOWR('v', IOCNUM_GET_X2APIC_STATE, struct vm_x2apic)
+#define VM_GET_HPET_CAPABILITIES \
+ _IOR('v', IOCNUM_GET_HPET_CAPABILITIES, struct vm_hpet_cap)
+#define VM_GET_GPA_PMAP \
+ _IOWR('v', IOCNUM_GET_GPA_PMAP, struct vm_gpa_pte)
+#define VM_GLA2GPA \
+ _IOWR('v', IOCNUM_GLA2GPA, struct vm_gla2gpa)
+#define VM_ACTIVATE_CPU \
+ _IOW('v', IOCNUM_ACTIVATE_CPU, struct vm_activate_cpu)
+#define VM_GET_CPUS \
+ _IOW('v', IOCNUM_GET_CPUSET, struct vm_cpuset)
+#define VM_SET_INTINFO \
+ _IOW('v', IOCNUM_SET_INTINFO, struct vm_intinfo)
+#define VM_GET_INTINFO \
+ _IOWR('v', IOCNUM_GET_INTINFO, struct vm_intinfo)
+#define VM_RTC_WRITE \
+ _IOW('v', IOCNUM_RTC_WRITE, struct vm_rtc_data)
+#define VM_RTC_READ \
+ _IOWR('v', IOCNUM_RTC_READ, struct vm_rtc_data)
+#define VM_RTC_SETTIME \
+ _IOW('v', IOCNUM_RTC_SETTIME, struct vm_rtc_time)
+#define VM_RTC_GETTIME \
+ _IOR('v', IOCNUM_RTC_GETTIME, struct vm_rtc_time)
+#define VM_RESTART_INSTRUCTION \
+ _IOW('v', IOCNUM_RESTART_INSTRUCTION, int)
+#endif
Property changes on: trunk/sys/amd64/include/vmm_dev.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/amd64/include/vmm_instruction_emul.h
===================================================================
--- trunk/sys/amd64/include/vmm_instruction_emul.h (rev 0)
+++ trunk/sys/amd64/include/vmm_instruction_emul.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -0,0 +1,117 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2012 NetApp, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/10/sys/amd64/include/vmm_instruction_emul.h 284900 2015-06-28 03:22:26Z neel $
+ */
+
+#ifndef _VMM_INSTRUCTION_EMUL_H_
+#define _VMM_INSTRUCTION_EMUL_H_
+
+#include <sys/mman.h>
+
+/*
+ * Callback functions to read and write memory regions.
+ */
+typedef int (*mem_region_read_t)(void *vm, int cpuid, uint64_t gpa,
+ uint64_t *rval, int rsize, void *arg);
+
+typedef int (*mem_region_write_t)(void *vm, int cpuid, uint64_t gpa,
+ uint64_t wval, int wsize, void *arg);
+
+/*
+ * Emulate the decoded 'vie' instruction.
+ *
+ * The callbacks 'mrr' and 'mrw' emulate reads and writes to the memory region
+ * containing 'gpa'. 'mrarg' is an opaque argument that is passed into the
+ * callback functions.
+ *
+ * 'void *vm' should be 'struct vm *' when called from kernel context and
+ * 'struct vmctx *' when called from user context.
+ * s
+ */
+int vmm_emulate_instruction(void *vm, int cpuid, uint64_t gpa, struct vie *vie,
+ struct vm_guest_paging *paging, mem_region_read_t mrr,
+ mem_region_write_t mrw, void *mrarg);
+
+int vie_update_register(void *vm, int vcpuid, enum vm_reg_name reg,
+ uint64_t val, int size);
+
+/*
+ * Returns 1 if an alignment check exception should be injected and 0 otherwise.
+ */
+int vie_alignment_check(int cpl, int operand_size, uint64_t cr0,
+ uint64_t rflags, uint64_t gla);
+
+/* Returns 1 if the 'gla' is not canonical and 0 otherwise. */
+int vie_canonical_check(enum vm_cpu_mode cpu_mode, uint64_t gla);
+
+uint64_t vie_size2mask(int size);
+
+int vie_calculate_gla(enum vm_cpu_mode cpu_mode, enum vm_reg_name seg,
+ struct seg_desc *desc, uint64_t off, int length, int addrsize, int prot,
+ uint64_t *gla);
+
+#ifdef _KERNEL
+/*
+ * APIs to fetch and decode the instruction from nested page fault handler.
+ *
+ * 'vie' must be initialized before calling 'vmm_fetch_instruction()'
+ */
+int vmm_fetch_instruction(struct vm *vm, int cpuid,
+ struct vm_guest_paging *guest_paging,
+ uint64_t rip, int inst_length, struct vie *vie,
+ int *is_fault);
+
+/*
+ * Translate the guest linear address 'gla' to a guest physical address.
+ *
+ * retval is_fault Interpretation
+ * 0 0 'gpa' contains result of the translation
+ * 0 1 An exception was injected into the guest
+ * EFAULT N/A An unrecoverable hypervisor error occurred
+ */
+int vm_gla2gpa(struct vm *vm, int vcpuid, struct vm_guest_paging *paging,
+ uint64_t gla, int prot, uint64_t *gpa, int *is_fault);
+
+void vie_init(struct vie *vie, const char *inst_bytes, int inst_length);
+
+/*
+ * Decode the instruction fetched into 'vie' so it can be emulated.
+ *
+ * 'gla' is the guest linear address provided by the hardware assist
+ * that caused the nested page table fault. It is used to verify that
+ * the software instruction decoding is in agreement with the hardware.
+ *
+ * Some hardware assists do not provide the 'gla' to the hypervisor.
+ * To skip the 'gla' verification for this or any other reason pass
+ * in VIE_INVALID_GLA instead.
+ */
+#define VIE_INVALID_GLA (1UL << 63) /* a non-canonical address */
+int vmm_decode_instruction(struct vm *vm, int cpuid, uint64_t gla,
+ enum vm_cpu_mode cpu_mode, int csd, struct vie *vie);
+#endif /* _KERNEL */
+
+#endif /* _VMM_INSTRUCTION_EMUL_H_ */
Property changes on: trunk/sys/amd64/include/vmm_instruction_emul.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/amd64/include/vmparam.h
===================================================================
--- trunk/sys/amd64/include/vmparam.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/vmparam.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
@@ -38,7 +39,7 @@
* SUCH DAMAGE.
*
* from: @(#)vmparam.h 5.9 (Berkeley) 5/12/91
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/vmparam.h 285634 2015-07-16 14:41:58Z kib $
*/
@@ -54,7 +55,7 @@
*/
#define MAXTSIZ (128UL*1024*1024) /* max text size */
#ifndef DFLDSIZ
-#define DFLDSIZ (128UL*1024*1024) /* initial data size limit */
+#define DFLDSIZ (32768UL*1024*1024) /* initial data size limit */
#endif
#ifndef MAXDSIZ
#define MAXDSIZ (32768UL*1024*1024) /* max data size */
@@ -87,7 +88,7 @@
* largest physical address that is accessible by ISA DMA is split
* into two PHYSSEG entries.
*/
-#define VM_PHYSSEG_MAX 31
+#define VM_PHYSSEG_MAX 63
/*
* Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool
@@ -101,16 +102,24 @@
#define VM_FREEPOOL_DIRECT 1
/*
- * Create two free page lists: VM_FREELIST_DEFAULT is for physical
- * pages that are above the largest physical address that is
- * accessible by ISA DMA and VM_FREELIST_ISADMA is for physical pages
- * that are below that address.
+ * Create up to three free page lists: VM_FREELIST_DMA32 is for physical pages
+ * that have physical addresses below 4G but are not accessible by ISA DMA,
+ * and VM_FREELIST_ISADMA is for physical pages that are accessible by ISA
+ * DMA.
*/
-#define VM_NFREELIST 2
+#define VM_NFREELIST 3
#define VM_FREELIST_DEFAULT 0
-#define VM_FREELIST_ISADMA 1
+#define VM_FREELIST_DMA32 1
+#define VM_FREELIST_ISADMA 2
/*
+ * Create the DMA32 free list only if the number of physical pages above
+ * physical address 4G is at least 16M, which amounts to 64GB of physical
+ * memory.
+ */
+#define VM_DMA32_NPAGES_THRESHOLD 16777216
+
+/*
* An allocation size of 16MB is supported in order to optimize the
* use of the direct map by UMA. Specifically, a cache line contains
* at most 8 PDEs, collectively mapping 16MB of physical memory. By
@@ -121,13 +130,6 @@
#define VM_NFREEORDER 13
/*
- * Only one memory domain.
- */
-#ifndef VM_NDOMAIN
-#define VM_NDOMAIN 1
-#endif
-
-/*
* Enable superpage reservations: 1 level.
*/
#ifndef VM_NRESERVLEVEL
@@ -152,10 +154,10 @@
* 0x0000000000000000 - 0x00007fffffffffff user map
* 0x0000800000000000 - 0xffff7fffffffffff does not exist (hole)
* 0xffff800000000000 - 0xffff804020100fff recursive page table (512GB slot)
- * 0xffff804020101000 - 0xfffffdffffffffff unused
- * 0xfffffe0000000000 - 0xfffffeffffffffff 1TB direct map
- * 0xffffff0000000000 - 0xffffff7fffffffff unused
- * 0xffffff8000000000 - 0xffffffffffffffff 512GB kernel map
+ * 0xffff804020101000 - 0xfffff7ffffffffff unused
+ * 0xfffff80000000000 - 0xfffffbffffffffff 4TB direct map
+ * 0xfffffc0000000000 - 0xfffffdffffffffff unused
+ * 0xfffffe0000000000 - 0xffffffffffffffff 2TB kernel map
*
* Within the kernel map:
*
@@ -162,8 +164,9 @@
* 0xffffffff80000000 KERNBASE
*/
-#define VM_MAX_KERNEL_ADDRESS KVADDR(KPML4I, NPDPEPG-1, NPDEPG-1, NPTEPG-1)
-#define VM_MIN_KERNEL_ADDRESS KVADDR(KPML4I, NPDPEPG-512, 0, 0)
+#define VM_MIN_KERNEL_ADDRESS KVADDR(KPML4BASE, 0, 0, 0)
+#define VM_MAX_KERNEL_ADDRESS KVADDR(KPML4BASE + NKPML4E - 1, \
+ NPDPEPG-1, NPDEPG-1, NPTEPG-1)
#define DMAP_MIN_ADDRESS KVADDR(DMPML4I, 0, 0, 0)
#define DMAP_MAX_ADDRESS KVADDR(DMPML4I + NDMPML4E, 0, 0, 0)
@@ -184,16 +187,8 @@
#define PHYS_TO_DMAP(x) ((x) | DMAP_MIN_ADDRESS)
#define DMAP_TO_PHYS(x) ((x) & ~DMAP_MIN_ADDRESS)
-/* virtual sizes (bytes) for various kernel submaps */
-#ifndef VM_KMEM_SIZE
-#define VM_KMEM_SIZE (12 * 1024 * 1024)
-#endif
-
/*
- * How many physical pages per KVA page allocated.
- * min(max(max(VM_KMEM_SIZE, Physical memory/VM_KMEM_SIZE_SCALE),
- * VM_KMEM_SIZE_MIN), VM_KMEM_SIZE_MAX)
- * is the total KVA space allocated for kmem_map.
+ * How many physical pages per kmem arena virtual page.
*/
#ifndef VM_KMEM_SIZE_SCALE
#define VM_KMEM_SIZE_SCALE (1)
@@ -200,7 +195,8 @@
#endif
/*
- * Ceiling on amount of kmem_map kva space.
+ * Optional ceiling (in bytes) on the size of the kmem arena: 60% of the
+ * kernel map.
*/
#ifndef VM_KMEM_SIZE_MAX
#define VM_KMEM_SIZE_MAX ((VM_MAX_KERNEL_ADDRESS - \
Modified: trunk/sys/amd64/include/xen/hypercall.h
===================================================================
--- trunk/sys/amd64/include/xen/hypercall.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/xen/hypercall.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,7 +1,8 @@
+/* $MidnightBSD$ */
/******************************************************************************
* hypercall.h
*
- * Linux-specific hypervisor handling.
+ * FreeBSD-specific hypervisor handling.
*
* Copyright (c) 2002-2004, K A Fraser
*
@@ -32,6 +33,8 @@
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
+ *
+ * $FreeBSD: stable/10/sys/amd64/include/xen/hypercall.h 255040 2013-08-29 19:52:18Z gibbs $
*/
#ifndef __MACHINE_XEN_HYPERCALL_H__
@@ -270,7 +273,7 @@
int rc = _hypercall2(int, event_channel_op, cmd, arg);
#if CONFIG_XEN_COMPAT <= 0x030002
- if (unlikely(rc == -ENOXENSYS)) {
+ if (__predict_false(rc == -ENOXENSYS)) {
struct evtchn_op op;
op.cmd = cmd;
memcpy(&op.u, arg, sizeof(op.u));
@@ -303,7 +306,7 @@
int rc = _hypercall2(int, physdev_op, cmd, arg);
#if CONFIG_XEN_COMPAT <= 0x030002
- if (unlikely(rc == -ENOXENSYS)) {
+ if (__predict_false(rc == -ENOXENSYS)) {
struct physdev_op op;
op.cmd = cmd;
memcpy(&op.u, arg, sizeof(op.u));
Modified: trunk/sys/amd64/include/xen/synch_bitops.h
===================================================================
--- trunk/sys/amd64/include/xen/synch_bitops.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/xen/synch_bitops.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
#ifndef __XEN_SYNCH_BITOPS_H__
#define __XEN_SYNCH_BITOPS_H__
Modified: trunk/sys/amd64/include/xen/xen-os.h
===================================================================
--- trunk/sys/amd64/include/xen/xen-os.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/xen/xen-os.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,33 +1,43 @@
+/* $MidnightBSD$ */
/******************************************************************************
- * os.h
+ * amd64/xen/xen-os.h
*
- * random collection of macros and definition
+ * Random collection of macros and definition
+ *
+ * Copyright (c) 2003, 2004 Keir Fraser (on behalf of the Xen team)
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD: stable/10/sys/amd64/include/xen/xen-os.h 255040 2013-08-29 19:52:18Z gibbs $
*/
-#ifndef _XEN_OS_H_
-#define _XEN_OS_H_
+#ifndef _MACHINE_XEN_XEN_OS_H_
+#define _MACHINE_XEN_XEN_OS_H_
#ifdef PAE
#define CONFIG_X86_PAE
#endif
-#if !defined(__XEN_INTERFACE_VERSION__)
-/*
- * Can update to a more recent version when we implement
- * the hypercall page
- */
-#define __XEN_INTERFACE_VERSION__ 0x00030204
-#endif
+/* Everything below this point is not included by assembler (.S) files. */
+#ifndef __ASSEMBLY__
-#include <xen/interface/xen.h>
-
-/* Force a proper event-channel callback from Xen. */
-void force_evtchn_callback(void);
-
-extern int gdtset;
-
-extern shared_info_t *HYPERVISOR_shared_info;
-
/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
static inline void rep_nop(void)
{
@@ -35,121 +45,6 @@
}
#define cpu_relax() rep_nop()
-/* crude memory allocator for memory allocation early in
- * boot
- */
-void *bootmem_alloc(unsigned int size);
-void bootmem_free(void *ptr, unsigned int size);
-
-
-/* Everything below this point is not included by assembler (.S) files. */
-#ifndef __ASSEMBLY__
-
-void printk(const char *fmt, ...);
-
-/* some function prototypes */
-void trap_init(void);
-
-#define likely(x) __builtin_expect((x),1)
-#define unlikely(x) __builtin_expect((x),0)
-
-#ifndef XENHVM
-
-/*
- * STI/CLI equivalents. These basically set and clear the virtual
- * event_enable flag in teh shared_info structure. Note that when
- * the enable bit is set, there may be pending events to be handled.
- * We may therefore call into do_hypervisor_callback() directly.
- */
-
-#define __cli() \
-do { \
- vcpu_info_t *_vcpu; \
- _vcpu = &HYPERVISOR_shared_info->vcpu_info[PCPU_GET(cpuid)]; \
- _vcpu->evtchn_upcall_mask = 1; \
- barrier(); \
-} while (0)
-
-#define __sti() \
-do { \
- vcpu_info_t *_vcpu; \
- barrier(); \
- _vcpu = &HYPERVISOR_shared_info->vcpu_info[PCPU_GET(cpuid)]; \
- _vcpu->evtchn_upcall_mask = 0; \
- barrier(); /* unmask then check (avoid races) */ \
- if ( unlikely(_vcpu->evtchn_upcall_pending) ) \
- force_evtchn_callback(); \
-} while (0)
-
-#define __restore_flags(x) \
-do { \
- vcpu_info_t *_vcpu; \
- barrier(); \
- _vcpu = &HYPERVISOR_shared_info->vcpu_info[PCPU_GET(cpuid)]; \
- if ((_vcpu->evtchn_upcall_mask = (x)) == 0) { \
- barrier(); /* unmask then check (avoid races) */ \
- if ( unlikely(_vcpu->evtchn_upcall_pending) ) \
- force_evtchn_callback(); \
- } \
-} while (0)
-
-/*
- * Add critical_{enter, exit}?
- *
- */
-#define __save_and_cli(x) \
-do { \
- vcpu_info_t *_vcpu; \
- _vcpu = &HYPERVISOR_shared_info->vcpu_info[PCPU_GET(cpuid)]; \
- (x) = _vcpu->evtchn_upcall_mask; \
- _vcpu->evtchn_upcall_mask = 1; \
- barrier(); \
-} while (0)
-
-
-#define cli() __cli()
-#define sti() __sti()
-#define save_flags(x) __save_flags(x)
-#define restore_flags(x) __restore_flags(x)
-#define save_and_cli(x) __save_and_cli(x)
-
-#define local_irq_save(x) __save_and_cli(x)
-#define local_irq_restore(x) __restore_flags(x)
-#define local_irq_disable() __cli()
-#define local_irq_enable() __sti()
-
-#define mtx_lock_irqsave(lock, x) {local_irq_save((x)); mtx_lock_spin((lock));}
-#define mtx_unlock_irqrestore(lock, x) {mtx_unlock_spin((lock)); local_irq_restore((x)); }
-#define spin_lock_irqsave mtx_lock_irqsave
-#define spin_unlock_irqrestore mtx_unlock_irqrestore
-
-#else
-#endif
-
-#ifndef mb
-#define mb() __asm__ __volatile__("mfence":::"memory")
-#endif
-#ifndef rmb
-#define rmb() __asm__ __volatile__("lfence":::"memory");
-#endif
-#ifndef wmb
-#define wmb() barrier()
-#endif
-#ifdef SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-#define smp_read_barrier_depends() read_barrier_depends()
-#define set_mb(var, value) do { xchg(&var, value); } while (0)
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
-#define set_mb(var, value) do { var = value; barrier(); } while (0)
-#endif
-
-
/* This is a barrier for the compiler only, NOT the processor! */
#define barrier() __asm__ __volatile__("": : :"memory")
@@ -156,45 +51,7 @@
#define LOCK_PREFIX ""
#define LOCK ""
#define ADDR (*(volatile long *) addr)
-/*
- * Make sure gcc doesn't try to be clever and move things around
- * on us. We need to use _exactly_ the address the user gave us,
- * not some alias that contains the same information.
- */
-typedef struct { volatile int counter; } atomic_t;
-
-
-#define xen_xchg(ptr,v) \
- ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
-struct __xchg_dummy { unsigned long a[100]; };
-#define __xg(x) ((volatile struct __xchg_dummy *)(x))
-static __inline unsigned long __xchg(unsigned long x, volatile void * ptr,
- int size)
-{
- switch (size) {
- case 1:
- __asm__ __volatile__("xchgb %b0,%1"
- :"=q" (x)
- :"m" (*__xg(ptr)), "0" (x)
- :"memory");
- break;
- case 2:
- __asm__ __volatile__("xchgw %w0,%1"
- :"=r" (x)
- :"m" (*__xg(ptr)), "0" (x)
- :"memory");
- break;
- case 4:
- __asm__ __volatile__("xchgl %0,%1"
- :"=r" (x)
- :"m" (*__xg(ptr)), "0" (x)
- :"memory");
- break;
- }
- return x;
-}
-
/**
* test_and_clear_bit - Clear a bit and return its old value
* @nr: Bit to set
@@ -235,7 +92,6 @@
constant_test_bit((nr),(addr)) : \
variable_test_bit((nr),(addr)))
-
/**
* set_bit - Atomically set a bit in memory
* @nr: the bit to set
@@ -272,25 +128,6 @@
:"Ir" (nr));
}
-/**
- * atomic_inc - increment atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1. Note that the guaranteed
- * useful range of an atomic_t is only 24 bits.
- */
-static __inline__ void atomic_inc(atomic_t *v)
-{
- __asm__ __volatile__(
- LOCK "incl %0"
- :"=m" (v->counter)
- :"m" (v->counter));
-}
-
-
-#define rdtscll(val) \
- __asm__ __volatile__("rdtsc" : "=A" (val))
-
#endif /* !__ASSEMBLY__ */
-#endif /* _OS_H_ */
+#endif /* _MACHINE_XEN_XEN_OS_H_ */
Modified: trunk/sys/amd64/include/xen/xenfunc.h
===================================================================
--- trunk/sys/amd64/include/xen/xenfunc.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/xen/xenfunc.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2004, 2005 Kip Macy
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/xen/xenfunc.h 207673 2010-05-05 20:39:02Z joel $
*/
#ifndef _XEN_XENFUNC_H_
Modified: trunk/sys/amd64/include/xen/xenpmap.h
===================================================================
--- trunk/sys/amd64/include/xen/xenpmap.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/xen/xenpmap.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*
*
* Copyright (c) 2004 Christian Limpach.
Modified: trunk/sys/amd64/include/xen/xenvar.h
===================================================================
--- trunk/sys/amd64/include/xen/xenvar.h 2018-06-01 22:57:17 UTC (rev 10174)
+++ trunk/sys/amd64/include/xen/xenvar.h 2018-06-01 22:59:06 UTC (rev 10175)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2008 Kip Macy
* All rights reserved.
@@ -23,7 +24,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/sys/amd64/include/xen/xenvar.h 207673 2010-05-05 20:39:02Z joel $
*/
#ifndef XENVAR_H_
#define XENVAR_H_
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