[Midnightbsd-cvs] src [10826] trunk/usr.sbin/cpucontrol: update cpucontrol
laffer1 at midnightbsd.org
laffer1 at midnightbsd.org
Sun Jun 10 16:29:29 EDT 2018
Revision: 10826
http://svnweb.midnightbsd.org/src/?rev=10826
Author: laffer1
Date: 2018-06-10 16:29:28 -0400 (Sun, 10 Jun 2018)
Log Message:
-----------
update cpucontrol
Modified Paths:
--------------
trunk/usr.sbin/cpucontrol/Makefile
trunk/usr.sbin/cpucontrol/amd.c
trunk/usr.sbin/cpucontrol/amd.h
trunk/usr.sbin/cpucontrol/cpucontrol.8
trunk/usr.sbin/cpucontrol/cpucontrol.c
trunk/usr.sbin/cpucontrol/cpucontrol.h
trunk/usr.sbin/cpucontrol/intel.c
trunk/usr.sbin/cpucontrol/intel.h
trunk/usr.sbin/cpucontrol/via.c
trunk/usr.sbin/cpucontrol/via.h
Added Paths:
-----------
trunk/usr.sbin/cpucontrol/amd10h.c
Modified: trunk/usr.sbin/cpucontrol/Makefile
===================================================================
--- trunk/usr.sbin/cpucontrol/Makefile 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/Makefile 2018-06-10 20:29:28 UTC (rev 10826)
@@ -1,8 +1,9 @@
# $MidnightBSD$
+# $FreeBSD: stable/10/usr.sbin/cpucontrol/Makefile 308761 2016-11-17 15:17:01Z avg $
PROG= cpucontrol
MAN= cpucontrol.8
-SRCS= cpucontrol.c intel.c amd.c via.c
+SRCS= cpucontrol.c intel.c amd.c amd10h.c via.c
NO_WCAST_ALIGN=
Modified: trunk/usr.sbin/cpucontrol/amd.c
===================================================================
--- trunk/usr.sbin/cpucontrol/amd.c 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/amd.c 2018-06-10 20:29:28 UTC (rev 10826)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2006, 2008 Stanislav Sedov <stas at FreeBSD.org>.
* All rights reserved.
@@ -24,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/usr.sbin/cpucontrol/amd.c 236504 2012-06-03 08:30:00Z avg $");
#include <assert.h>
#include <stdio.h>
Modified: trunk/usr.sbin/cpucontrol/amd.h
===================================================================
--- trunk/usr.sbin/cpucontrol/amd.h 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/amd.h 2018-06-10 20:29:28 UTC (rev 10826)
@@ -23,7 +23,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: release/9.2.0/usr.sbin/cpucontrol/amd.h 181430 2008-08-08 16:26:53Z stas $
+ * $FreeBSD: stable/10/usr.sbin/cpucontrol/amd.h 308761 2016-11-17 15:17:01Z avg $
*/
#ifndef AMD_H
@@ -34,6 +34,8 @@
*/
ucode_probe_t amd_probe;
ucode_update_t amd_update;
+ucode_probe_t amd10h_probe;
+ucode_update_t amd10h_update;
typedef struct amd_fw_header {
uint32_t date; /* Update creation date. */
@@ -47,4 +49,45 @@
#define AMD_MAGIC 0xaaaaaa
+/*
+ * AMD family 10h and later.
+ */
+typedef struct amd_10h_fw_header {
+ uint32_t data_code;
+ uint32_t patch_id;
+ uint16_t mc_patch_data_id;
+ uint8_t mc_patch_data_len;
+ uint8_t init_flag;
+ uint32_t mc_patch_data_checksum;
+ uint32_t nb_dev_id;
+ uint32_t sb_dev_id;
+ uint16_t processor_rev_id;
+ uint8_t nb_rev_id;
+ uint8_t sb_rev_id;
+ uint8_t bios_api_rev;
+ uint8_t reserved1[3];
+ uint32_t match_reg[8];
+} amd_10h_fw_header_t;
+
+typedef struct equiv_cpu_entry {
+ uint32_t installed_cpu;
+ uint32_t fixed_errata_mask;
+ uint32_t fixed_errata_compare;
+ uint16_t equiv_cpu;
+ uint16_t res;
+} equiv_cpu_entry_t;
+
+typedef struct section_header {
+ uint32_t type;
+ uint32_t size;
+} section_header_t;
+
+typedef struct container_header {
+ uint32_t magic;
+} container_header_t;
+
+#define AMD_10H_MAGIC 0x414d44
+#define AMD_10H_EQUIV_TABLE_TYPE 0
+#define AMD_10H_uCODE_TYPE 1
+
#endif /* !AMD_H */
Added: trunk/usr.sbin/cpucontrol/amd10h.c
===================================================================
--- trunk/usr.sbin/cpucontrol/amd10h.c (rev 0)
+++ trunk/usr.sbin/cpucontrol/amd10h.c 2018-06-10 20:29:28 UTC (rev 10826)
@@ -0,0 +1,308 @@
+/* $MidnightBSD$ */
+/*-
+ * Copyright (c) 2012 Andriy Gapon <avg at FreeBSD.org>.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/10/usr.sbin/cpucontrol/amd10h.c 308761 2016-11-17 15:17:01Z avg $");
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/mman.h>
+#include <sys/ioctl.h>
+#include <sys/ioccom.h>
+#include <sys/cpuctl.h>
+
+#include <machine/cpufunc.h>
+#include <machine/specialreg.h>
+
+#include <assert.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <err.h>
+
+#include "cpucontrol.h"
+#include "amd.h"
+
+int
+amd10h_probe(int fd)
+{
+ char vendor[13];
+ cpuctl_cpuid_args_t idargs;
+ uint32_t family;
+ uint32_t signature;
+ int error;
+
+ idargs.level = 0;
+ error = ioctl(fd, CPUCTL_CPUID, &idargs);
+ if (error < 0) {
+ WARN(0, "ioctl()");
+ return (1);
+ }
+ ((uint32_t *)vendor)[0] = idargs.data[1];
+ ((uint32_t *)vendor)[1] = idargs.data[3];
+ ((uint32_t *)vendor)[2] = idargs.data[2];
+ vendor[12] = '\0';
+ if (strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) != 0)
+ return (1);
+
+ idargs.level = 1;
+ error = ioctl(fd, CPUCTL_CPUID, &idargs);
+ if (error < 0) {
+ WARN(0, "ioctl()");
+ return (1);
+ }
+ signature = idargs.data[0];
+ family = ((signature >> 8) & 0x0f) + ((signature >> 20) & 0xff);
+ if (family < 0x10)
+ return (1);
+ return (0);
+}
+
+/*
+ * NB: the format of microcode update files is not documented by AMD.
+ * It has been reverse engineered from studying Coreboot, illumos and Linux
+ * source code.
+ */
+void
+amd10h_update(const char *dev, const char *path)
+{
+ struct stat st;
+ cpuctl_cpuid_args_t idargs;
+ cpuctl_msr_args_t msrargs;
+ cpuctl_update_args_t args;
+ const amd_10h_fw_header_t *fw_header;
+ const amd_10h_fw_header_t *selected_fw;
+ const equiv_cpu_entry_t *equiv_cpu_table;
+ const section_header_t *section_header;
+ const container_header_t *container_header;
+ const uint8_t *fw_data;
+ uint8_t *fw_image;
+ size_t fw_size;
+ size_t selected_size;
+ uint32_t revision;
+ uint32_t new_rev;
+ uint32_t signature;
+ uint16_t equiv_id;
+ int fd, devfd;
+ unsigned int i;
+ int error;
+
+ assert(path);
+ assert(dev);
+
+ fd = -1;
+ fw_image = MAP_FAILED;
+ devfd = open(dev, O_RDWR);
+ if (devfd < 0) {
+ WARN(0, "could not open %s for writing", dev);
+ return;
+ }
+ idargs.level = 1;
+ error = ioctl(devfd, CPUCTL_CPUID, &idargs);
+ if (error < 0) {
+ WARN(0, "ioctl()");
+ goto done;
+ }
+ signature = idargs.data[0];
+
+ msrargs.msr = 0x0000008b;
+ error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
+ if (error < 0) {
+ WARN(0, "ioctl(%s)", dev);
+ goto done;
+ }
+ revision = (uint32_t)msrargs.data;
+
+ WARNX(1, "found cpu family %#x model %#x "
+ "stepping %#x extfamily %#x extmodel %#x.",
+ (signature >> 8) & 0x0f, (signature >> 4) & 0x0f,
+ (signature >> 0) & 0x0f, (signature >> 20) & 0xff,
+ (signature >> 16) & 0x0f);
+ WARNX(1, "microcode revision %#x", revision);
+
+ /*
+ * Open the firmware file.
+ */
+ fd = open(path, O_RDONLY, 0);
+ if (fd < 0) {
+ WARN(0, "open(%s)", path);
+ goto done;
+ }
+ error = fstat(fd, &st);
+ if (error != 0) {
+ WARN(0, "fstat(%s)", path);
+ goto done;
+ }
+ if (st.st_size < 0 || (size_t)st.st_size <
+ (sizeof(*container_header) + sizeof(*section_header))) {
+ WARNX(2, "file too short: %s", path);
+ goto done;
+ }
+ fw_size = st.st_size;
+
+ /*
+ * mmap the whole image.
+ */
+ fw_image = (uint8_t *)mmap(NULL, st.st_size, PROT_READ,
+ MAP_PRIVATE, fd, 0);
+ if (fw_image == MAP_FAILED) {
+ WARN(0, "mmap(%s)", path);
+ goto done;
+ }
+
+ fw_data = fw_image;
+ container_header = (const container_header_t *)fw_data;
+ if (container_header->magic != AMD_10H_MAGIC) {
+ WARNX(2, "%s is not a valid amd firmware: bad magic", path);
+ goto done;
+ }
+ fw_data += sizeof(*container_header);
+ fw_size -= sizeof(*container_header);
+
+ section_header = (const section_header_t *)fw_data;
+ if (section_header->type != AMD_10H_EQUIV_TABLE_TYPE) {
+ WARNX(2, "%s is not a valid amd firmware: "
+ "first section is not CPU equivalence table", path);
+ goto done;
+ }
+ if (section_header->size == 0) {
+ WARNX(2, "%s is not a valid amd firmware: "
+ "first section is empty", path);
+ goto done;
+ }
+ fw_data += sizeof(*section_header);
+ fw_size -= sizeof(*section_header);
+
+ if (section_header->size > fw_size) {
+ WARNX(2, "%s is not a valid amd firmware: "
+ "file is truncated", path);
+ goto done;
+ }
+ if (section_header->size < sizeof(*equiv_cpu_table)) {
+ WARNX(2, "%s is not a valid amd firmware: "
+ "first section is too short", path);
+ goto done;
+ }
+ equiv_cpu_table = (const equiv_cpu_entry_t *)fw_data;
+ fw_data += section_header->size;
+ fw_size -= section_header->size;
+
+ equiv_id = 0;
+ for (i = 0; equiv_cpu_table[i].installed_cpu != 0; i++) {
+ if (signature == equiv_cpu_table[i].installed_cpu) {
+ equiv_id = equiv_cpu_table[i].equiv_cpu;
+ WARNX(3, "equiv_id: %x", equiv_id);
+ break;
+ }
+ }
+ if (equiv_id == 0) {
+ WARNX(2, "CPU is not found in the equivalence table");
+ goto done;
+ }
+
+ selected_fw = NULL;
+ selected_size = 0;
+ while (fw_size >= sizeof(*section_header)) {
+ section_header = (const section_header_t *)fw_data;
+ fw_data += sizeof(*section_header);
+ fw_size -= sizeof(*section_header);
+ if (section_header->type != AMD_10H_uCODE_TYPE) {
+ WARNX(2, "%s is not a valid amd firmware: "
+ "section has incorret type", path);
+ goto done;
+ }
+ if (section_header->size > fw_size) {
+ WARNX(2, "%s is not a valid amd firmware: "
+ "file is truncated", path);
+ goto done;
+ }
+ if (section_header->size < sizeof(*fw_header)) {
+ WARNX(2, "%s is not a valid amd firmware: "
+ "section is too short", path);
+ goto done;
+ }
+ fw_header = (const amd_10h_fw_header_t *)fw_data;
+ fw_data += section_header->size;
+ fw_size -= section_header->size;
+
+ if (fw_header->processor_rev_id != equiv_id)
+ continue; /* different cpu */
+ if (fw_header->patch_id <= revision)
+ continue; /* not newer revision */
+ if (fw_header->nb_dev_id != 0 || fw_header->sb_dev_id != 0) {
+ WARNX(2, "Chipset-specific microcode is not supported");
+ }
+
+ WARNX(3, "selecting revision: %x", fw_header->patch_id);
+ revision = fw_header->patch_id;
+ selected_fw = fw_header;
+ selected_size = section_header->size;
+ }
+
+ if (fw_size != 0) {
+ WARNX(2, "%s is not a valid amd firmware: "
+ "file is truncated", path);
+ goto done;
+ }
+
+ if (selected_fw != NULL) {
+ WARNX(1, "selected ucode size is %zu", selected_size);
+ fprintf(stderr, "%s: updating cpu %s to revision %#x... ",
+ path, dev, revision);
+
+ args.data = __DECONST(void *, selected_fw);
+ args.size = selected_size;
+ error = ioctl(devfd, CPUCTL_UPDATE, &args);
+ if (error < 0) {
+ fprintf(stderr, "failed.\n");
+ warn("ioctl()");
+ goto done;
+ }
+ fprintf(stderr, "done.\n");
+ }
+
+ msrargs.msr = 0x0000008b;
+ error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
+ if (error < 0) {
+ WARN(0, "ioctl(%s)", dev);
+ goto done;
+ }
+ new_rev = (uint32_t)msrargs.data;
+ if (new_rev != revision)
+ WARNX(0, "revision after update %#x", new_rev);
+
+done:
+ if (fd >= 0)
+ close(fd);
+ if (devfd >= 0)
+ close(devfd);
+ if (fw_image != MAP_FAILED)
+ if (munmap(fw_image, st.st_size) != 0)
+ warn("munmap(%s)", path);
+ return;
+}
Property changes on: trunk/usr.sbin/cpucontrol/amd10h.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/usr.sbin/cpucontrol/cpucontrol.8
===================================================================
--- trunk/usr.sbin/cpucontrol/cpucontrol.8 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/cpucontrol.8 2018-06-10 20:29:28 UTC (rev 10826)
@@ -1,3 +1,4 @@
+.\" $MidnightBSD$
.\" Copyright (c) 2006, 2008 Stanislav Sedov <stas at FreeBSD.org>.
.\" All rights reserved.
.\"
@@ -22,7 +23,7 @@
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
-.\" $MidnightBSD$
+.\" $FreeBSD: stable/10/usr.sbin/cpucontrol/cpucontrol.8 322617 2017-08-17 11:36:39Z kib $
.\"
.Dd June 30, 2009
.Dt CPUCONTROL 8
@@ -65,6 +66,12 @@
.Ek
.Nm
.Op Fl vh
+.Fl i Ar level,level_type
+.Bk
+.Ar device
+.Ek
+.Nm
+.Op Fl vh
.Op Fl d Ar datadir
.Fl u
.Bk
@@ -84,9 +91,10 @@
.It Fl d Ar datadir
Where to look for microcode images.
The option can be specified multiple times.
-.It Fl m Ar msr Ns Op = Ns Ar value
+.It Fl m Ar msr
Show value of the specified MSR.
MSR register number should be given as a hexadecimal number.
+The high word is printed first, then the low word is printed second.
.It Fl m Ar msr Ns = Ns Ar value
Store the
.Ar value
@@ -114,6 +122,9 @@
.It Fl i Ar level
Retrieve CPUID info.
Level should be given as a hex number.
+.It Fl i Ar level,level_type
+Retrieve CPUID info.
+Level and level_type should be given as hex numbers.
.It Fl u
Apply CPU firmware updates.
The
Modified: trunk/usr.sbin/cpucontrol/cpucontrol.c
===================================================================
--- trunk/usr.sbin/cpucontrol/cpucontrol.c 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/cpucontrol.c 2018-06-10 20:29:28 UTC (rev 10826)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2008-2011 Stanislav Sedov <stas at FreeBSD.org>.
* All rights reserved.
@@ -29,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/usr.sbin/cpucontrol/cpucontrol.c 308761 2016-11-17 15:17:01Z avg $");
#include <assert.h>
#include <stdio.h>
@@ -86,11 +87,12 @@
};
static SLIST_HEAD(, datadir) datadirs = SLIST_HEAD_INITIALIZER(datadirs);
-struct ucode_handler {
+static struct ucode_handler {
ucode_probe_t *probe;
ucode_update_t *update;
} handlers[] = {
{ intel_probe, intel_update },
+ { amd10h_probe, amd10h_update },
{ amd_probe, amd_update },
{ via_probe, via_update },
};
@@ -99,6 +101,7 @@
static void usage(void);
static int isdir(const char *path);
static int do_cpuid(const char *cmdarg, const char *dev);
+static int do_cpuid_count(const char *cmdarg, const char *dev);
static int do_msr(const char *cmdarg, const char *dev);
static int do_update(const char *dev);
static void datadir_add(const char *path);
@@ -112,7 +115,7 @@
if (name == NULL)
name = "cpuctl";
fprintf(stderr, "Usage: %s [-vh] [-d datadir] [-m msr[=value] | "
- "-i level | -u] device\n", name);
+ "-i level | -i level,level_type | -u] device\n", name);
exit(EX_USAGE);
}
@@ -170,6 +173,57 @@
}
static int
+do_cpuid_count(const char *cmdarg, const char *dev)
+{
+ char *cmdarg1, *endptr, *endptr1;
+ unsigned int level, level_type;
+ cpuctl_cpuid_count_args_t args;
+ int fd, error;
+
+ assert(cmdarg != NULL);
+ assert(dev != NULL);
+
+ level = strtoul(cmdarg, &endptr, 16);
+ if (*cmdarg == '\0' || *endptr == '\0') {
+ WARNX(0, "incorrect or missing operand: %s", cmdarg);
+ usage();
+ /* NOTREACHED */
+ }
+ /* Locate the comma... */
+ cmdarg1 = strstr(endptr, ",");
+ /* ... and skip past it */
+ cmdarg1 += 1;
+ level_type = strtoul(cmdarg1, &endptr1, 16);
+ if (*cmdarg1 == '\0' || *endptr1 != '\0') {
+ WARNX(0, "incorrect or missing operand: %s", cmdarg);
+ usage();
+ /* NOTREACHED */
+ }
+
+ /*
+ * Fill ioctl argument structure.
+ */
+ args.level = level;
+ args.level_type = level_type;
+ fd = open(dev, O_RDONLY);
+ if (fd < 0) {
+ WARN(0, "error opening %s for reading", dev);
+ return (1);
+ }
+ error = ioctl(fd, CPUCTL_CPUID_COUNT, &args);
+ if (error < 0) {
+ WARN(0, "ioctl(%s, CPUCTL_CPUID_COUNT)", dev);
+ close(fd);
+ return (error);
+ }
+ fprintf(stdout, "cpuid level 0x%x, level_type 0x%x: 0x%.8x 0x%.8x "
+ "0x%.8x 0x%.8x\n", level, level_type, args.data[0], args.data[1],
+ args.data[2], args.data[3]);
+ close(fd);
+ return (0);
+}
+
+static int
do_msr(const char *cmdarg, const char *dev)
{
unsigned int msr;
@@ -292,7 +346,7 @@
int error;
struct ucode_handler *handler;
struct datadir *dir;
- DIR *dirfd;
+ DIR *dirp;
struct dirent *direntry;
char buf[MAXPATHLEN];
@@ -321,12 +375,12 @@
* Process every image in specified data directories.
*/
SLIST_FOREACH(dir, &datadirs, next) {
- dirfd = opendir(dir->path);
- if (dirfd == NULL) {
+ dirp = opendir(dir->path);
+ if (dirp == NULL) {
WARNX(1, "skipping directory %s: not accessible", dir->path);
continue;
}
- while ((direntry = readdir(dirfd)) != NULL) {
+ while ((direntry = readdir(dirp)) != NULL) {
if (direntry->d_namlen == 0)
continue;
error = snprintf(buf, sizeof(buf), "%s/%s", dir->path,
@@ -340,7 +394,7 @@
}
handler->update(dev, buf);
}
- error = closedir(dirfd);
+ error = closedir(dirp);
if (error != 0)
WARN(0, "closedir(%s)", dir->path);
}
@@ -414,7 +468,10 @@
c = flags & (FLAG_I | FLAG_M | FLAG_U);
switch (c) {
case FLAG_I:
- error = do_cpuid(cmdarg, dev);
+ if (strstr(cmdarg, ",") != NULL)
+ error = do_cpuid_count(cmdarg, dev);
+ else
+ error = do_cpuid(cmdarg, dev);
break;
case FLAG_M:
error = do_msr(cmdarg, dev);
@@ -426,5 +483,5 @@
usage(); /* Only one command can be selected. */
}
SLIST_FREE(&datadirs, next, free);
- return (error);
+ return (error == 0 ? 0 : 1);
}
Modified: trunk/usr.sbin/cpucontrol/cpucontrol.h
===================================================================
--- trunk/usr.sbin/cpucontrol/cpucontrol.h 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/cpucontrol.h 2018-06-10 20:29:28 UTC (rev 10826)
@@ -23,7 +23,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: release/9.2.0/usr.sbin/cpucontrol/cpucontrol.h 181430 2008-08-08 16:26:53Z stas $
+ * $FreeBSD: stable/10/usr.sbin/cpucontrol/cpucontrol.h 181430 2008-08-08 16:26:53Z stas $
*/
#ifndef CPUCONTROL_H
Modified: trunk/usr.sbin/cpucontrol/intel.c
===================================================================
--- trunk/usr.sbin/cpucontrol/intel.c 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/intel.c 2018-06-10 20:29:28 UTC (rev 10826)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2006, 2008 Stanislav Sedov <stas at FreeBSD.org>.
* All rights reserved.
@@ -24,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/usr.sbin/cpucontrol/intel.c 245491 2013-01-16 05:00:51Z eadler $");
#include <assert.h>
#include <stdio.h>
Modified: trunk/usr.sbin/cpucontrol/intel.h
===================================================================
--- trunk/usr.sbin/cpucontrol/intel.h 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/intel.h 2018-06-10 20:29:28 UTC (rev 10826)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2006, 2008 Stanislav Sedov <stas at FreeBSD.org>.
* All rights reserved.
@@ -22,7 +23,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $MidnightBSD$
+ * $FreeBSD: stable/10/usr.sbin/cpucontrol/intel.h 181430 2008-08-08 16:26:53Z stas $
*/
#ifndef INTEL_H
Modified: trunk/usr.sbin/cpucontrol/via.c
===================================================================
--- trunk/usr.sbin/cpucontrol/via.c 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/via.c 2018-06-10 20:29:28 UTC (rev 10826)
@@ -1,3 +1,4 @@
+/* $MidnightBSD$ */
/*-
* Copyright (c) 2011 Fabien Thomas <fabient at FreeBSD.org>.
* All rights reserved.
@@ -24,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__MBSDID("$MidnightBSD$");
+__FBSDID("$FreeBSD: stable/10/usr.sbin/cpucontrol/via.c 245491 2013-01-16 05:00:51Z eadler $");
#include <assert.h>
#include <stdio.h>
@@ -83,7 +84,7 @@
unsigned int i;
size_t payload_size;
via_fw_header_t *fw_header;
- uint32_t signature, flags;
+ uint32_t signature;
int32_t revision;
void *fw_data;
size_t data_size, total_size;
@@ -122,7 +123,6 @@
/*
* MSR_IA32_PLATFORM_ID contains flag in BCD in bits 52-50.
*/
- flags = 1 << ((msrargs.data >> 50) & 7);
msrargs.msr = MSR_BIOS_SIGN;
error = ioctl(devfd, CPUCTL_RDMSR, &msrargs);
if (error < 0) {
Modified: trunk/usr.sbin/cpucontrol/via.h
===================================================================
--- trunk/usr.sbin/cpucontrol/via.h 2018-06-10 20:25:20 UTC (rev 10825)
+++ trunk/usr.sbin/cpucontrol/via.h 2018-06-10 20:29:28 UTC (rev 10826)
@@ -23,7 +23,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: release/9.2.0/usr.sbin/cpucontrol/via.h 229471 2012-01-04 08:14:05Z fabient $
+ * $FreeBSD: stable/10/usr.sbin/cpucontrol/via.h 228436 2011-12-12 12:30:44Z fabient $
*/
#ifndef VIA_H
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