[Midnightbsd-cvs] src [12394] trunk/sys/arm/xscale: sync with freebsd 11
laffer1 at midnightbsd.org
laffer1 at midnightbsd.org
Fri Mar 6 11:44:57 EST 2020
Revision: 12394
http://svnweb.midnightbsd.org/src/?rev=12394
Author: laffer1
Date: 2020-03-06 11:44:57 -0500 (Fri, 06 Mar 2020)
Log Message:
-----------
sync with freebsd 11
Modified Paths:
--------------
trunk/sys/arm/xscale/i8134x/crb_machdep.c
trunk/sys/arm/xscale/i8134x/files.crb
trunk/sys/arm/xscale/i8134x/files.i81342
trunk/sys/arm/xscale/i8134x/i81342.c
trunk/sys/arm/xscale/i8134x/i81342_mcu.c
trunk/sys/arm/xscale/i8134x/i81342_pci.c
trunk/sys/arm/xscale/i8134x/i81342_space.c
trunk/sys/arm/xscale/i8134x/i81342reg.h
trunk/sys/arm/xscale/i8134x/i81342var.h
trunk/sys/arm/xscale/i8134x/iq81342_7seg.c
trunk/sys/arm/xscale/i8134x/iq81342reg.h
trunk/sys/arm/xscale/i8134x/iq81342var.h
trunk/sys/arm/xscale/i8134x/obio.c
trunk/sys/arm/xscale/i8134x/obiovar.h
trunk/sys/arm/xscale/i8134x/std.crb
trunk/sys/arm/xscale/i8134x/std.i81342
trunk/sys/arm/xscale/i8134x/uart_bus_i81342.c
trunk/sys/arm/xscale/i8134x/uart_cpu_i81342.c
trunk/sys/arm/xscale/ixp425/avila_ata.c
trunk/sys/arm/xscale/ixp425/avila_gpio.c
trunk/sys/arm/xscale/ixp425/avila_led.c
trunk/sys/arm/xscale/ixp425/avila_machdep.c
trunk/sys/arm/xscale/ixp425/cambria_exp_space.c
trunk/sys/arm/xscale/ixp425/cambria_fled.c
trunk/sys/arm/xscale/ixp425/cambria_gpio.c
trunk/sys/arm/xscale/ixp425/cambria_led.c
trunk/sys/arm/xscale/ixp425/files.avila
trunk/sys/arm/xscale/ixp425/files.ixp425
trunk/sys/arm/xscale/ixp425/if_npe.c
trunk/sys/arm/xscale/ixp425/if_npereg.h
trunk/sys/arm/xscale/ixp425/ixdp425_pci.c
trunk/sys/arm/xscale/ixp425/ixdp425reg.h
trunk/sys/arm/xscale/ixp425/ixp425.c
trunk/sys/arm/xscale/ixp425/ixp425_a4x_io.S
trunk/sys/arm/xscale/ixp425/ixp425_a4x_space.c
trunk/sys/arm/xscale/ixp425/ixp425_iic.c
trunk/sys/arm/xscale/ixp425/ixp425_intr.h
trunk/sys/arm/xscale/ixp425/ixp425_mem.c
trunk/sys/arm/xscale/ixp425/ixp425_npe.c
trunk/sys/arm/xscale/ixp425/ixp425_npereg.h
trunk/sys/arm/xscale/ixp425/ixp425_npevar.h
trunk/sys/arm/xscale/ixp425/ixp425_pci.c
trunk/sys/arm/xscale/ixp425/ixp425_pci_asm.S
trunk/sys/arm/xscale/ixp425/ixp425_pci_space.c
trunk/sys/arm/xscale/ixp425/ixp425_qmgr.c
trunk/sys/arm/xscale/ixp425/ixp425_qmgr.h
trunk/sys/arm/xscale/ixp425/ixp425_space.c
trunk/sys/arm/xscale/ixp425/ixp425_timer.c
trunk/sys/arm/xscale/ixp425/ixp425_wdog.c
trunk/sys/arm/xscale/ixp425/ixp425reg.h
trunk/sys/arm/xscale/ixp425/ixp425var.h
trunk/sys/arm/xscale/ixp425/std.avila
trunk/sys/arm/xscale/ixp425/std.ixp425
trunk/sys/arm/xscale/ixp425/std.ixp435
trunk/sys/arm/xscale/ixp425/uart_bus_ixp425.c
trunk/sys/arm/xscale/ixp425/uart_cpu_ixp425.c
trunk/sys/arm/xscale/pxa/files.pxa
trunk/sys/arm/xscale/pxa/if_smc_smi.c
trunk/sys/arm/xscale/pxa/pxa_gpio.c
trunk/sys/arm/xscale/pxa/pxa_icu.c
trunk/sys/arm/xscale/pxa/pxa_machdep.c
trunk/sys/arm/xscale/pxa/pxa_obio.c
trunk/sys/arm/xscale/pxa/pxa_smi.c
trunk/sys/arm/xscale/pxa/pxa_space.c
trunk/sys/arm/xscale/pxa/pxa_timer.c
trunk/sys/arm/xscale/pxa/pxareg.h
trunk/sys/arm/xscale/pxa/pxavar.h
trunk/sys/arm/xscale/pxa/std.pxa
trunk/sys/arm/xscale/pxa/uart_bus_pxa.c
trunk/sys/arm/xscale/pxa/uart_cpu_pxa.c
trunk/sys/arm/xscale/std.xscale
trunk/sys/arm/xscale/std.xscale-be
Added Paths:
-----------
trunk/sys/arm/xscale/i8134x/i80321_timer.c
trunk/sys/arm/xscale/i8134x/i80321_wdog.c
trunk/sys/arm/xscale/i8134x/i80321reg.h
trunk/sys/arm/xscale/i8134x/i80321var.h
Modified: trunk/sys/arm/xscale/i8134x/crb_machdep.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/crb_machdep.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/crb_machdep.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -39,7 +39,7 @@
*
* machdep.c
*
- * Machine dependant functions for kernel setup
+ * Machine dependent functions for kernel setup
*
* This file needs a lot of work.
*
@@ -47,8 +47,10 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/crb_machdep.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/crb_machdep.c 331890 2018-04-02 22:02:49Z gonzo $");
+#include "opt_kstack_pages.h"
+
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
#include <sys/systm.h>
@@ -71,6 +73,7 @@
#include <sys/exec.h>
#include <sys/kdb.h>
#include <sys/msgbuf.h>
+#include <sys/devmap.h>
#include <machine/reg.h>
#include <machine/cpu.h>
@@ -79,7 +82,6 @@
#include <vm/vm_object.h>
#include <vm/vm_page.h>
#include <vm/vm_map.h>
-#include <machine/devmap.h>
#include <machine/vmparam.h>
#include <machine/pcb.h>
#include <machine/undefined.h>
@@ -91,7 +93,7 @@
#include <sys/reboot.h>
-#include <arm/xscale/i80321/i80321var.h> /* For i80321_calibrate_delay() */
+#include <arm/xscale/i8134x/i80321var.h> /* For i80321_calibrate_delay() */
#include <arm/xscale/i8134x/i81342reg.h>
#include <arm/xscale/i8134x/i81342var.h>
@@ -119,13 +121,11 @@
struct pv_addr kernelstack;
/* Static device mappings. */
-static const struct arm_devmap_entry iq81342_devmap[] = {
+static const struct devmap_entry iq81342_devmap[] = {
{
IOP34X_VADDR,
IOP34X_HWADDR,
IOP34X_SIZE,
- VM_PROT_READ|VM_PROT_WRITE,
- PTE_DEVICE,
},
{
/*
@@ -132,25 +132,19 @@
* Cheat and map a whole section, this will bring
* both PCI-X and PCI-E outbound I/O
*/
- IOP34X_PCIX_OIOBAR_VADDR &~ (0x100000 - 1),
- IOP34X_PCIX_OIOBAR &~ (0x100000 - 1),
+ rounddown2(IOP34X_PCIX_OIOBAR_VADDR, 0x100000),
+ rounddown2(IOP34X_PCIX_OIOBAR, 0x100000),
0x100000,
- VM_PROT_READ|VM_PROT_WRITE,
- PTE_DEVICE,
},
{
IOP34X_PCE1_VADDR,
IOP34X_PCE1,
IOP34X_PCE1_SIZE,
- VM_PROT_READ|VM_PROT_WRITE,
- PTE_DEVICE,
},
{
0,
0,
0,
- 0,
- 0,
}
};
@@ -224,7 +218,7 @@
valloc_pages(irqstack, IRQ_STACK_SIZE);
valloc_pages(abtstack, ABT_STACK_SIZE);
valloc_pages(undstack, UND_STACK_SIZE);
- valloc_pages(kernelstack, KSTACK_PAGES);
+ valloc_pages(kernelstack, kstack_pages);
valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
/*
* Now we start construction of the L1 page table
@@ -234,8 +228,8 @@
l1pagetable = kernel_l1pt.pv_va;
/* Map the L2 pages tables in the L1 page table */
- pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
- &kernel_pt_table[KERNEL_PT_SYS]);
+ pmap_link_l2pt(l1pagetable, rounddown2(ARM_VECTORS_HIGH, 0x00100000),
+ &kernel_pt_table[KERNEL_PT_SYS]);
pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
@@ -243,11 +237,10 @@
0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
- (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
- afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
- - 1));
+ rounddown2(((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE, L1_S_SIZE),
+ VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+ freemem_after = rounddown2((int)lastaddr + PAGE_SIZE, PAGE_SIZE);
+ afterkern = round_page(rounddown2((vm_offset_t)lastaddr + L1_S_SIZE, L1_S_SIZE));
for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
&kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
@@ -257,7 +250,7 @@
/* Map the vector page. */
pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- arm_devmap_bootstrap(l1pagetable, iq81342_devmap);
+ devmap_bootstrap(l1pagetable, iq81342_devmap);
/*
* Give the XScale global cache clean code an appropriately
* sized chunk of unmapped VA space starting at 0xff000000
@@ -266,7 +259,7 @@
xscale_cache_clean_addr = 0xff000000U;
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
- setttb(kernel_l1pt.pv_pa);
+ cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
/*
@@ -283,7 +276,7 @@
/*
* We must now clean the cache again....
* Cleaning may be done by reading new data to displace any
- * dirty data in the cache. This will have happened in setttb()
+ * dirty data in the cache. This will have happened in cpu_setttb()
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
@@ -291,10 +284,10 @@
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
- cpu_setup("");
+ cpu_setup();
i80321_calibrate_delay();
- i81342_sdram_bounds(obio_bs_tag, IOP34X_VADDR, &memstart, &memsize);
+ i81342_sdram_bounds(arm_base_bs_tag, IOP34X_VADDR, &memstart, &memsize);
physmem = memsize / PAGE_SIZE;
cninit();
/* Set stack for exception handlers */
@@ -307,7 +300,7 @@
pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
- vm_max_kernel_address = 0xd0000000;
+ vm_max_kernel_address = 0xe0000000;
pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
msgbufp = (void*)msgbufpv.pv_va;
msgbufinit(msgbufp, msgbufsize);
@@ -324,6 +317,10 @@
* Prepare the list of physical memory available to the vm subsystem.
*/
arm_physmem_hardware_region(SDRAM_START, memsize);
+ arm_physmem_exclude_region(freemem_pt, abp->abp_physaddr -
+ freemem_pt, EXFLAG_NOALLOC);
+ arm_physmem_exclude_region(freemempos, abp->abp_physaddr - 0x100000 -
+ freemempos, EXFLAG_NOALLOC);
arm_physmem_exclude_region(abp->abp_physaddr,
virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
arm_physmem_init_kernel_globals();
Modified: trunk/sys/arm/xscale/i8134x/files.crb
===================================================================
--- trunk/sys/arm/xscale/i8134x/files.crb 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/files.crb 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,3 +1,3 @@
-# $FreeBSD: stable/10/sys/arm/xscale/i8134x/files.crb 172297 2007-09-22 16:25:43Z cognet $
+# $FreeBSD: stable/11/sys/arm/xscale/i8134x/files.crb 172297 2007-09-22 16:25:43Z cognet $
arm/xscale/i8134x/crb_machdep.c standard
arm/xscale/i8134x/iq81342_7seg.c optional 7seg
Modified: trunk/sys/arm/xscale/i8134x/files.i81342
===================================================================
--- trunk/sys/arm/xscale/i8134x/files.i81342 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/files.i81342 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,10 +1,7 @@
-# $FreeBSD: stable/10/sys/arm/xscale/i8134x/files.i81342 278727 2015-02-13 22:32:02Z ian $
+# $FreeBSD: stable/11/sys/arm/xscale/i8134x/files.i81342 295199 2016-02-03 08:59:12Z mmel $
arm/arm/bus_space_base.c standard
-arm/arm/bus_space_generic.c standard
-arm/arm/cpufunc_asm_xscale.S standard
-arm/arm/cpufunc_asm_xscale_c3.S standard
-arm/xscale/i80321/i80321_timer.c standard
-arm/xscale/i80321/i80321_wdog.c optional iopwdog
+arm/xscale/i8134x/i80321_timer.c standard
+arm/xscale/i8134x/i80321_wdog.c optional iopwdog
arm/xscale/i8134x/i81342.c standard
arm/xscale/i8134x/i81342_mcu.c standard
arm/xscale/i8134x/i81342_pci.c optional pci
Added: trunk/sys/arm/xscale/i8134x/i80321_timer.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/i80321_timer.c (rev 0)
+++ trunk/sys/arm/xscale/i8134x/i80321_timer.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -0,0 +1,485 @@
+/* $MidnightBSD$ */
+/* $NetBSD: i80321_timer.c,v 1.7 2003/07/27 04:52:28 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Timer/clock support for the Intel i80321 I/O processor.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/i80321_timer.c 308325 2016-11-05 04:30:44Z mmel $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/time.h>
+#include <sys/bus.h>
+#include <sys/resource.h>
+#include <sys/rman.h>
+#include <sys/timetc.h>
+
+#include <machine/armreg.h>
+#include <machine/bus.h>
+#include <machine/cpu.h>
+#include <machine/frame.h>
+#include <machine/resource.h>
+#include <machine/intr.h>
+#include <arm/xscale/i8134x/i80321reg.h>
+#include <arm/xscale/i8134x/i80321var.h>
+
+#ifdef CPU_XSCALE_81342
+#define ICU_INT_TIMER0 (8) /* XXX: Can't include i81342reg.h because
+ definitions overrides the ones from i80321reg.h
+ */
+#endif
+#include "opt_timer.h"
+
+void (*i80321_hardclock_hook)(void) = NULL;
+struct i80321_timer_softc {
+ device_t dev;
+} timer_softc;
+
+
+static unsigned i80321_timer_get_timecount(struct timecounter *tc);
+
+
+static uint32_t counts_per_hz;
+
+#if defined(XSCALE_DISABLE_CCNT) || defined(CPU_XSCALE_81342)
+static uint32_t offset;
+static uint32_t last = -1;
+#endif
+
+static int ticked = 0;
+
+#ifndef COUNTS_PER_SEC
+#define COUNTS_PER_SEC 200000000 /* 200MHz */
+#endif
+
+#define COUNTS_PER_USEC (COUNTS_PER_SEC / 1000000)
+
+static struct timecounter i80321_timer_timecounter = {
+ i80321_timer_get_timecount, /* get_timecount */
+ NULL, /* no poll_pps */
+ ~0u, /* counter_mask */
+#if defined(XSCALE_DISABLE_CCNT) || defined(CPU_XSCALE_81342)
+ COUNTS_PER_SEC,
+#else
+ COUNTS_PER_SEC * 3, /* frequency */
+#endif
+ "i80321 timer", /* name */
+ 1000 /* quality */
+};
+
+static int
+i80321_timer_probe(device_t dev)
+{
+
+ device_set_desc(dev, "i80321 timer");
+ return (0);
+}
+
+static int
+i80321_timer_attach(device_t dev)
+{
+ timer_softc.dev = dev;
+
+ return (0);
+}
+
+static device_method_t i80321_timer_methods[] = {
+ DEVMETHOD(device_probe, i80321_timer_probe),
+ DEVMETHOD(device_attach, i80321_timer_attach),
+ {0, 0},
+};
+
+static driver_t i80321_timer_driver = {
+ "itimer",
+ i80321_timer_methods,
+ sizeof(struct i80321_timer_softc),
+};
+static devclass_t i80321_timer_devclass;
+
+DRIVER_MODULE(itimer, iq, i80321_timer_driver, i80321_timer_devclass, 0, 0);
+
+int clockhandler(void *);
+
+
+static __inline uint32_t
+tmr1_read(void)
+{
+ uint32_t rv;
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mrc p6, 0, %0, c1, c9, 0"
+#else
+ __asm __volatile("mrc p6, 0, %0, c1, c1, 0"
+#endif
+ : "=r" (rv));
+ return (rv);
+}
+
+static __inline void
+tmr1_write(uint32_t val)
+{
+
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mcr p6, 0, %0, c1, c9, 0"
+#else
+ __asm __volatile("mcr p6, 0, %0, c1, c1, 0"
+#endif
+ :
+ : "r" (val));
+}
+
+static __inline uint32_t
+tcr1_read(void)
+{
+ uint32_t rv;
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mrc p6, 0, %0, c3, c9, 0"
+#else
+ __asm __volatile("mrc p6, 0, %0, c3, c1, 0"
+#endif
+ : "=r" (rv));
+ return (rv);
+}
+static __inline void
+tcr1_write(uint32_t val)
+{
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mcr p6, 0, %0, c3, c9, 0"
+#else
+ __asm __volatile("mcr p6, 0, %0, c3, c1, 0"
+#endif
+ :
+ : "r" (val));
+}
+
+static __inline void
+trr1_write(uint32_t val)
+{
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mcr p6, 0, %0, c5, c9, 0"
+#else
+ __asm __volatile("mcr p6, 0, %0, c5, c1, 0"
+#endif
+ :
+ : "r" (val));
+}
+
+static __inline uint32_t
+tmr0_read(void)
+{
+ uint32_t rv;
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mrc p6, 0, %0, c0, c9, 0"
+#else
+ __asm __volatile("mrc p6, 0, %0, c0, c1, 0"
+#endif
+ : "=r" (rv));
+ return (rv);
+}
+
+static __inline void
+tmr0_write(uint32_t val)
+{
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mcr p6, 0, %0, c0, c9, 0"
+#else
+ __asm __volatile("mcr p6, 0, %0, c0, c1, 0"
+#endif
+ :
+ : "r" (val));
+}
+
+static __inline uint32_t
+tcr0_read(void)
+{
+ uint32_t rv;
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mrc p6, 0, %0, c2, c9, 0"
+#else
+ __asm __volatile("mrc p6, 0, %0, c2, c1, 0"
+#endif
+ : "=r" (rv));
+ return (rv);
+}
+static __inline void
+tcr0_write(uint32_t val)
+{
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mcr p6, 0, %0, c2, c9, 0"
+#else
+ __asm __volatile("mcr p6, 0, %0, c2, c1, 0"
+#endif
+ :
+ : "r" (val));
+}
+
+static __inline void
+trr0_write(uint32_t val)
+{
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mcr p6, 0, %0, c4, c9, 0"
+#else
+ __asm __volatile("mcr p6, 0, %0, c4, c1, 0"
+#endif
+ :
+ : "r" (val));
+}
+
+static __inline void
+tisr_write(uint32_t val)
+{
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mcr p6, 0, %0, c6, c9, 0"
+#else
+ __asm __volatile("mcr p6, 0, %0, c6, c1, 0"
+#endif
+ :
+ : "r" (val));
+}
+
+static __inline uint32_t
+tisr_read(void)
+{
+ int ret;
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mrc p6, 0, %0, c6, c9, 0" : "=r" (ret));
+#else
+ __asm __volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (ret));
+#endif
+ return (ret);
+}
+
+static unsigned
+i80321_timer_get_timecount(struct timecounter *tc)
+{
+#if defined(XSCALE_DISABLE_CCNT) || defined(CPU_XSCALE_81342)
+ uint32_t cur = tcr0_read();
+
+ if (cur > last && last != -1) {
+ offset += counts_per_hz;
+ if (ticked > 0)
+ ticked--;
+ }
+ if (ticked) {
+ offset += ticked * counts_per_hz;
+ ticked = 0;
+ }
+ return (counts_per_hz - cur + offset);
+#else
+ uint32_t ret;
+
+ __asm __volatile("mrc p14, 0, %0, c1, c0, 0\n"
+ : "=r" (ret));
+ return (ret);
+#endif
+}
+
+/*
+ * i80321_calibrate_delay:
+ *
+ * Calibrate the delay loop.
+ */
+void
+i80321_calibrate_delay(void)
+{
+
+ /*
+ * Just use hz=100 for now -- we'll adjust it, if necessary,
+ * in cpu_initclocks().
+ */
+ counts_per_hz = COUNTS_PER_SEC / 100;
+
+ tmr0_write(0); /* stop timer */
+ tisr_write(TISR_TMR0); /* clear interrupt */
+ trr0_write(counts_per_hz); /* reload value */
+ tcr0_write(counts_per_hz); /* current value */
+
+ tmr0_write(TMRx_ENABLE|TMRx_RELOAD|TMRx_CSEL_CORE);
+}
+
+/*
+ * cpu_initclocks:
+ *
+ * Initialize the clock and get them going.
+ */
+void
+cpu_initclocks(void)
+{
+ u_int oldirqstate;
+ struct resource *irq;
+ int rid = 0;
+ void *ihl;
+ device_t dev = timer_softc.dev;
+
+ if (hz < 50 || COUNTS_PER_SEC % hz) {
+ printf("Cannot get %d Hz clock; using 100 Hz\n", hz);
+ hz = 100;
+ }
+ tick = 1000000 / hz; /* number of microseconds between interrupts */
+
+ /*
+ * We only have one timer available; stathz and profhz are
+ * always left as 0 (the upper-layer clock code deals with
+ * this situation).
+ */
+ if (stathz != 0)
+ printf("Cannot get %d Hz statclock\n", stathz);
+ stathz = 0;
+
+ if (profhz != 0)
+ printf("Cannot get %d Hz profclock\n", profhz);
+ profhz = 0;
+
+ /* Report the clock frequency. */
+
+ oldirqstate = disable_interrupts(PSR_I);
+
+ irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
+#ifdef CPU_XSCALE_81342
+ ICU_INT_TIMER0, ICU_INT_TIMER0,
+#else
+ ICU_INT_TMR0, ICU_INT_TMR0,
+#endif
+ 1, RF_ACTIVE);
+ if (!irq)
+ panic("Unable to setup the clock irq handler.\n");
+ else
+ bus_setup_intr(dev, irq, INTR_TYPE_CLK, clockhandler, NULL,
+ NULL, &ihl);
+ tmr0_write(0); /* stop timer */
+ tisr_write(TISR_TMR0); /* clear interrupt */
+
+ counts_per_hz = COUNTS_PER_SEC / hz;
+
+ trr0_write(counts_per_hz); /* reload value */
+ tcr0_write(counts_per_hz); /* current value */
+ tmr0_write(TMRx_ENABLE|TMRx_RELOAD|TMRx_CSEL_CORE);
+
+ tc_init(&i80321_timer_timecounter);
+ restore_interrupts(oldirqstate);
+ rid = 0;
+#if !defined(XSCALE_DISABLE_CCNT) && !defined(CPU_XSCALE_81342)
+ /* Enable the clock count register. */
+ __asm __volatile("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (rid));
+ rid &= ~(1 << 3);
+ rid |= (1 << 2) | 1;
+ __asm __volatile("mcr p14, 0, %0, c0, c0, 0\n"
+ : : "r" (rid));
+#endif
+}
+
+
+/*
+ * DELAY:
+ *
+ * Delay for at least N microseconds.
+ */
+void
+DELAY(int n)
+{
+ uint32_t cur, last, delta, usecs;
+
+ /*
+ * This works by polling the timer and counting the
+ * number of microseconds that go by.
+ */
+ last = tcr0_read();
+ delta = usecs = 0;
+
+ while (n > usecs) {
+ cur = tcr0_read();
+
+ /* Check to see if the timer has wrapped around. */
+ if (last < cur)
+ delta += (last + (counts_per_hz - cur));
+ else
+ delta += (last - cur);
+
+ last = cur;
+
+ if (delta >= COUNTS_PER_USEC) {
+ usecs += delta / COUNTS_PER_USEC;
+ delta %= COUNTS_PER_USEC;
+ }
+ }
+}
+
+/*
+ * clockhandler:
+ *
+ * Handle the hardclock interrupt.
+ */
+int
+clockhandler(void *arg)
+{
+ struct trapframe *frame = arg;
+
+ ticked++;
+ tisr_write(TISR_TMR0);
+ hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame));
+
+ if (i80321_hardclock_hook != NULL)
+ (*i80321_hardclock_hook)();
+ return (FILTER_HANDLED);
+}
+
+void
+cpu_startprofclock(void)
+{
+}
+
+void
+cpu_stopprofclock(void)
+{
+
+}
Property changes on: trunk/sys/arm/xscale/i8134x/i80321_timer.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
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## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/arm/xscale/i8134x/i80321_wdog.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/i80321_wdog.c (rev 0)
+++ trunk/sys/arm/xscale/i8134x/i80321_wdog.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -0,0 +1,154 @@
+/* $MidnightBSD$ */
+/* $NetBSD: i80321_wdog.c,v 1.6 2003/07/15 00:24:54 lukem Exp $ */
+
+/*-
+ * Copyright (c) 2005 Olivier Houchard
+ * Copyright (c) 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Watchdog timer support for the Intel i80321 I/O processor.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/i80321_wdog.c 308325 2016-11-05 04:30:44Z mmel $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/watchdog.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+
+#include <machine/bus.h>
+#include <machine/machdep.h>
+
+#include <arm/xscale/i8134x/i80321reg.h>
+#include <arm/xscale/i8134x/i80321var.h>
+
+
+struct iopwdog_softc {
+ device_t dev;
+ int armed;
+ int wdog_period;
+};
+
+static __inline void
+wdtcr_write(uint32_t val)
+{
+
+#ifdef CPU_XSCALE_81342
+ __asm __volatile("mcr p6, 0, %0, c7, c9, 0"
+#else
+ __asm __volatile("mcr p6, 0, %0, c7, c1, 0"
+#endif
+ :
+ : "r" (val));
+}
+
+static void
+iopwdog_tickle(void *arg)
+{
+ struct iopwdog_softc *sc = arg;
+
+ if (!sc->armed)
+ return;
+ wdtcr_write(WDTCR_ENABLE1);
+ wdtcr_write(WDTCR_ENABLE2);
+}
+
+static int
+iopwdog_probe(device_t dev)
+{
+ struct iopwdog_softc *sc = device_get_softc(dev);
+ char buf[128];
+
+ /*
+ * XXX Should compute the period based on processor speed.
+ * For a 600MHz XScale core, the wdog must be tickled approx.
+ * every 7 seconds.
+ */
+
+ sc->wdog_period = 7;
+ sprintf(buf, "i80321 Watchdog, must be tickled every %d seconds",
+ sc->wdog_period);
+ device_set_desc_copy(dev, buf);
+
+ return (0);
+}
+
+static void
+iopwdog_watchdog_fn(void *private, u_int cmd, int *error)
+{
+ struct iopwdog_softc *sc = private;
+
+ cmd &= WD_INTERVAL;
+ if (cmd > 0 && cmd <= 63
+ && (uint64_t)1<<cmd <= (uint64_t)sc->wdog_period * 1000000000) {
+ /* Valid value -> Enable watchdog */
+ iopwdog_tickle(sc);
+ sc->armed = 1;
+ *error = 0;
+ } else {
+ /* Can't disable this watchdog! */
+ if (sc->armed)
+ *error = EOPNOTSUPP;
+ }
+}
+
+static int
+iopwdog_attach(device_t dev)
+{
+ struct iopwdog_softc *sc = device_get_softc(dev);
+
+ sc->dev = dev;
+ sc->armed = 0;
+ EVENTHANDLER_REGISTER(watchdog_list, iopwdog_watchdog_fn, sc, 0);
+ return (0);
+}
+
+static device_method_t iopwdog_methods[] = {
+ DEVMETHOD(device_probe, iopwdog_probe),
+ DEVMETHOD(device_attach, iopwdog_attach),
+ {0, 0},
+};
+
+static driver_t iopwdog_driver = {
+ "iopwdog",
+ iopwdog_methods,
+ sizeof(struct iopwdog_softc),
+};
+static devclass_t iopwdog_devclass;
+
+DRIVER_MODULE(iopwdog, iq, iopwdog_driver, iopwdog_devclass, 0, 0);
Property changes on: trunk/sys/arm/xscale/i8134x/i80321_wdog.c
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/arm/xscale/i8134x/i80321reg.h
===================================================================
--- trunk/sys/arm/xscale/i8134x/i80321reg.h (rev 0)
+++ trunk/sys/arm/xscale/i8134x/i80321reg.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -0,0 +1,456 @@
+/* $MidnightBSD$ */
+/* $NetBSD: i80321reg.h,v 1.14 2003/12/19 10:08:11 gavan Exp $ */
+
+/*-
+ * Copyright (c) 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/11/sys/arm/xscale/i8134x/i80321reg.h 295201 2016-02-03 10:39:29Z mmel $
+ *
+ */
+
+#ifndef _ARM_XSCALE_I80321REG_H_
+#define _ARM_XSCALE_I80321REG_H_
+
+/*
+ * Register definitions for the Intel 80321 (``Verde'') I/O processor,
+ * based on the XScale core.
+ */
+
+/*
+ * Base i80321 memory map:
+ *
+ * 0x0000.0000 - 0x7fff.ffff ATU Outbound Direct Addressing Window
+ * 0x8000.0000 - 0x9001.ffff ATU Outbound Translation Windows
+ * 0x9002.0000 - 0xffff.dfff External Memory
+ * 0xffff.e000 - 0xffff.e8ff Peripheral Memory Mapped Registers
+ * 0xffff.e900 - 0xffff.ffff Reserved
+ */
+
+#define VERDE_OUT_DIRECT_WIN_BASE 0x00000000UL
+#define VERDE_OUT_DIRECT_WIN_SIZE 0x80000000UL
+
+#define VERDE_OUT_XLATE_MEM_WIN_SIZE 0x04000000UL
+#define VERDE_OUT_XLATE_IO_WIN_SIZE 0x00010000UL
+
+#define VERDE_OUT_XLATE_MEM_WIN0_BASE 0x80000000UL
+#define VERDE_OUT_XLATE_MEM_WIN1_BASE 0x84000000UL
+
+#define VERDE_OUT_XLATE_IO_WIN0_BASE 0x90000000UL
+
+#define VERDE_EXTMEM_BASE 0x90020000UL
+
+#define VERDE_PMMR_BASE 0xffffe000UL
+#define VERDE_PMMR_SIZE 0x00001700UL
+
+/*
+ * Peripheral Memory Mapped Registers. Defined as offsets
+ * from the VERDE_PMMR_BASE.
+ */
+#define VERDE_ATU_BASE 0x0100
+#define VERDE_ATU_SIZE 0x0100
+
+#define VERDE_MU_BASE 0x0300
+#define VERDE_MU_SIZE 0x0100
+
+#define VERDE_DMA_BASE 0x0400
+#define VERDE_DMA_BASE0 (VERDE_DMA_BASE + 0x00)
+#define VERDE_DMA_BASE1 (VERDE_DMA_BASE + 0x40)
+#define VERDE_DMA_SIZE 0x0100
+#define VERDE_DMA_CHSIZE 0x0040
+
+#define VERDE_MCU_BASE 0x0500
+#define VERDE_MCU_SIZE 0x0100
+
+#define VERDE_PBIU_BASE 0x0680
+#define VERDE_PBIU_SIZE 0x0080
+
+#define VERDE_I2C_BASE 0x1680
+#define VERDE_I2C_BASE0 (VERDE_I2C_BASE + 0x00)
+#define VERDE_I2C_BASE1 (VERDE_I2C_BASE + 0x20)
+#define VERDE_I2C_SIZE 0x0080
+#define VERDE_I2C_CHSIZE 0x0020
+
+/*
+ * Address Translation Unit
+ */
+ /* 0x00 - 0x38 -- PCI configuration space header */
+#define ATU_IALR0 0x40 /* Inbound ATU Limit 0 */
+#define ATU_IATVR0 0x44 /* Inbound ATU Xlate Value 0 */
+#define ATU_ERLR 0x48 /* Expansion ROM Limit */
+#define ATU_ERTVR 0x4c /* Expansion ROM Xlate Value */
+#define ATU_IALR1 0x50 /* Inbound ATU Limit 1 */
+#define ATU_IALR2 0x54 /* Inbound ATU Limit 2 */
+#define ATU_IATVR2 0x58 /* Inbound ATU Xlate Value 2 */
+#define ATU_OIOWTVR 0x5c /* Outbound I/O Window Xlate Value */
+#define ATU_OMWTVR0 0x60 /* Outbound Mem Window Xlate Value 0 */
+#define ATU_OUMWTVR0 0x64 /* Outbound Mem Window Xlate Value 0 Upper */
+#define ATU_OMWTVR1 0x68 /* Outbound Mem Window Xlate Value 1 */
+#define ATU_OUMWTVR1 0x6c /* Outbound Mem Window Xlate Value 1 Upper */
+#define ATU_OUDWTVR 0x78 /* Outbound Mem Direct Xlate Value Upper */
+#define ATU_ATUCR 0x80 /* ATU Configuration */
+#define ATU_PCSR 0x84 /* PCI Configuration and Status */
+#define ATU_ATUISR 0x88 /* ATU Interrupt Status */
+#define ATU_ATUIMR 0x8c /* ATU Interrupt Mask */
+#define ATU_IABAR3 0x90 /* Inbound ATU Base Address 3 */
+#define ATU_IAUBAR3 0x94 /* Inbound ATU Base Address 3 Upper */
+#define ATU_IALR3 0x98 /* Inbound ATU Limit 3 */
+#define ATU_IATVR3 0x9c /* Inbound ATU Xlate Value 3 */
+#define ATU_OCCAR 0xa4 /* Outbound Configuration Cycle Address */
+#define ATU_OCCDR 0xac /* Outbound Configuration Cycle Data */
+#define ATU_MSI_PORT 0xb4 /* MSI port */
+#define ATU_PDSCR 0xbc /* PCI Bus Drive Strength Control */
+#define ATU_PCI_X_CAP_ID 0xe0 /* (1) */
+#define ATU_PCI_X_NEXT 0xe1 /* (1) */
+#define ATU_PCIXCMD 0xe2 /* PCI-X Command Register (2) */
+#define ATU_PCIXSR 0xe4 /* PCI-X Status Register */
+
+#define ATUCR_DRC_ALIAS (1U << 19)
+#define ATUCR_DAU2GXEN (1U << 18)
+#define ATUCR_P_SERR_MA (1U << 16)
+#define ATUCR_DTS (1U << 15)
+#define ATUCR_P_SERR_DIE (1U << 9)
+#define ATUCR_DAE (1U << 8)
+#define ATUCR_BIST_IE (1U << 3)
+#define ATUCR_OUT_EN (1U << 1)
+
+#define PCSR_DAAAPE (1U << 18)
+#define PCSR_PCI_X_CAP (3U << 16)
+#define PCSR_PCI_X_CAP_BORING (0 << 16)
+#define PCSR_PCI_X_CAP_66 (1U << 16)
+#define PCSR_PCI_X_CAP_100 (2U << 16)
+#define PCSR_PCI_X_CAP_133 (3U << 16)
+#define PCSR_OTQB (1U << 15)
+#define PCSR_IRTQB (1U << 14)
+#define PCSR_DTV (1U << 12)
+#define PCSR_BUS66 (1U << 10)
+#define PCSR_BUS64 (1U << 8)
+#define PCSR_RIB (1U << 5)
+#define PCSR_RPB (1U << 4)
+#define PCSR_CCR (1U << 2)
+#define PCSR_CPR (1U << 1)
+
+#define ATUISR_IMW1BU (1U << 14)
+#define ATUISR_ISCEM (1U << 13)
+#define ATUISR_RSCEM (1U << 12)
+#define ATUISR_PST (1U << 11)
+#define ATUISR_P_SERR_ASRT (1U << 10)
+#define ATUISR_DPE (1U << 9)
+#define ATUISR_BIST (1U << 8)
+#define ATUISR_IBMA (1U << 7)
+#define ATUISR_P_SERR_DET (1U << 4)
+#define ATUISR_PMA (1U << 3)
+#define ATUISR_PTAM (1U << 2)
+#define ATUISR_PTAT (1U << 1)
+#define ATUISR_PMPE (1U << 0)
+
+#define ATUIMR_IMW1BU (1U << 11)
+#define ATUIMR_ISCEM (1U << 10)
+#define ATUIMR_RSCEM (1U << 9)
+#define ATUIMR_PST (1U << 8)
+#define ATUIMR_DPE (1U << 7)
+#define ATUIMR_P_SERR_ASRT (1U << 6)
+#define ATUIMR_PMA (1U << 5)
+#define ATUIMR_PTAM (1U << 4)
+#define ATUIMR_PTAT (1U << 3)
+#define ATUIMR_PMPE (1U << 2)
+#define ATUIMR_IE_SERR_EN (1U << 1)
+#define ATUIMR_ECC_TAE (1U << 0)
+
+#define PCIXCMD_MOST_1 (0 << 4)
+#define PCIXCMD_MOST_2 (1 << 4)
+#define PCIXCMD_MOST_3 (2 << 4)
+#define PCIXCMD_MOST_4 (3 << 4)
+#define PCIXCMD_MOST_8 (4 << 4)
+#define PCIXCMD_MOST_12 (5 << 4)
+#define PCIXCMD_MOST_16 (6 << 4)
+#define PCIXCMD_MOST_32 (7 << 4)
+#define PCIXCMD_MOST_MASK (7 << 4)
+#define PCIXCMD_MMRBC_512 (0 << 2)
+#define PCIXCMD_MMRBC_1024 (1 << 2)
+#define PCIXCMD_MMRBC_2048 (2 << 2)
+#define PCIXCMD_MMRBC_4096 (3 << 2)
+#define PCIXCMD_MMRBC_MASK (3 << 2)
+#define PCIXCMD_ERO (1U << 1)
+#define PCIXCMD_DPERE (1U << 0)
+
+#define PCIXSR_RSCEM (1U << 29)
+#define PCIXSR_DMCRS_MASK (7 << 26)
+#define PCIXSR_DMOST_MASK (7 << 23)
+#define PCIXSR_COMPLEX (1U << 20)
+#define PCIXSR_USC (1U << 19)
+#define PCIXSR_SCD (1U << 18)
+#define PCIXSR_133_CAP (1U << 17)
+#define PCIXSR_32PCI (1U << 16) /* 0 = 32, 1 = 64 */
+#define PCIXSR_BUSNO(x) (((x) & 0xff00) >> 8)
+#define PCIXSR_DEVNO(x) (((x) & 0xf8) >> 3)
+#define PCIXSR_FUNCNO(x) ((x) & 0x7)
+
+/*
+ * Memory Controller Unit
+ */
+#define MCU_SDIR 0x00 /* DDR SDRAM Init. Register */
+#define MCU_SDCR 0x04 /* DDR SDRAM Control Register */
+#define MCU_SDBR 0x08 /* SDRAM Base Register */
+#define MCU_SBR0 0x0c /* SDRAM Boundary 0 */
+#define MCU_SBR1 0x10 /* SDRAM Boundary 1 */
+#define MCU_ECCR 0x34 /* ECC Control Register */
+#define MCU_ELOG0 0x38 /* ECC Log 0 */
+#define MCU_ELOG1 0x3c /* ECC Log 1 */
+#define MCU_ECAR0 0x40 /* ECC address 0 */
+#define MCU_ECAR1 0x44 /* ECC address 1 */
+#define MCU_ECTST 0x48 /* ECC test register */
+#define MCU_MCISR 0x4c /* MCU Interrupt Status Register */
+#define MCU_RFR 0x50 /* Refresh Frequency Register */
+#define MCU_DBUDSR 0x54 /* Data Bus Pull-up Drive Strength */
+#define MCU_DBDDSR 0x58 /* Data Bus Pull-down Drive Strength */
+#define MCU_CUDSR 0x5c /* Clock Pull-up Drive Strength */
+#define MCU_CDDSR 0x60 /* Clock Pull-down Drive Strength */
+#define MCU_CEUDSR 0x64 /* Clock En Pull-up Drive Strength */
+#define MCU_CEDDSR 0x68 /* Clock En Pull-down Drive Strength */
+#define MCU_CSUDSR 0x6c /* Chip Sel Pull-up Drive Strength */
+#define MCU_CSDDSR 0x70 /* Chip Sel Pull-down Drive Strength */
+#define MCU_REUDSR 0x74 /* Rx En Pull-up Drive Strength */
+#define MCU_REDDSR 0x78 /* Rx En Pull-down Drive Strength */
+#define MCU_ABUDSR 0x7c /* Addr Bus Pull-up Drive Strength */
+#define MCU_ABDDSR 0x80 /* Addr Bus Pull-down Drive Strength */
+#define MCU_DSDR 0x84 /* Data Strobe Delay Register */
+#define MCU_REDR 0x88 /* Rx Enable Delay Register */
+
+#define SDCR_DIMMTYPE (1U << 1) /* 0 = unbuf, 1 = reg */
+#define SDCR_BUSWIDTH (1U << 2) /* 0 = 64, 1 = 32 */
+
+#define SBRx_TECH (1U << 31)
+#define SBRx_BOUND 0x0000003f
+
+#define ECCR_SBERE (1U << 0)
+#define ECCR_MBERE (1U << 1)
+#define ECCR_SBECE (1U << 2)
+#define ECCR_ECCEN (1U << 3)
+
+#define ELOGx_SYNDROME 0x000000ff
+#define ELOGx_ERRTYPE (1U << 8) /* 1 = multi-bit */
+#define ELOGx_RW (1U << 12) /* 1 = write error */
+ /*
+ * Dev ID Func Requester
+ * 2 0 XScale core
+ * 2 1 ATU
+ * 13 0 DMA channel 0
+ * 13 1 DMA channel 1
+ * 26 0 ATU
+ */
+#define ELOGx_REQ_DEV(x) (((x) >> 19) & 0x1f)
+#define ELOGx_REQ_FUNC(x) (((x) >> 16) & 0x3)
+
+#define MCISR_ECC_ERR0 (1U << 0)
+#define MCISR_ECC_ERR1 (1U << 1)
+#define MCISR_ECC_ERRN (1U << 2)
+
+/*
+ * Timers
+ *
+ * The i80321 timer registers are available in both memory-mapped
+ * and coprocessor spaces. Most of the registers are read-only
+ * if memory-mapped, so we access them via coprocessor space.
+ *
+ * TMR0 cp6 c0,1 0xffffe7e0
+ * TMR1 cp6 c1,1 0xffffe7e4
+ * TCR0 cp6 c2,1 0xffffe7e8
+ * TCR1 cp6 c3,1 0xffffe7ec
+ * TRR0 cp6 c4,1 0xffffe7f0
+ * TRR1 cp6 c5,1 0xffffe7f4
+ * TISR cp6 c6,1 0xffffe7f8
+ * WDTCR cp6 c7,1 0xffffe7fc
+ */
+
+#define TMRx_TC (1U << 0)
+#define TMRx_ENABLE (1U << 1)
+#define TMRx_RELOAD (1U << 2)
+#define TMRx_CSEL_CORE (0 << 4)
+#define TMRx_CSEL_CORE_div4 (1 << 4)
+#define TMRx_CSEL_CORE_div8 (2 << 4)
+#define TMRx_CSEL_CORE_div16 (3 << 4)
+
+#define TISR_TMR0 (1U << 0)
+#define TISR_TMR1 (1U << 1)
+
+#define WDTCR_ENABLE1 0x1e1e1e1e
+#define WDTCR_ENABLE2 0xe1e1e1e1
+
+/*
+ * Interrupt Controller Unit.
+ *
+ * INTCTL cp6 c0,0 0xffffe7d0
+ * INTSTR cp6 c4,0 0xffffe7d4
+ * IINTSRC cp6 c8,0 0xffffe7d8
+ * FINTSRC cp6 c9,0 0xffffe7dc
+ * PIRSR 0xffffe1ec
+ */
+
+#define ICU_PIRSR 0x01ec
+#define ICU_GPOE 0x07c4
+#define ICU_GPID 0x07c8
+#define ICU_GPOD 0x07cc
+
+/*
+ * NOTE: WE USE THE `bitXX' BITS TO INDICATE PENDING SOFTWARE
+ * INTERRUPTS. See i80321_icu.c
+ */
+#define ICU_INT_HPI 31 /* high priority interrupt */
+#define ICU_INT_XINT0 27 /* external interrupts */
+#define ICU_INT_XINT(x) ((x) + ICU_INT_XINT0)
+#define ICU_INT_bit26 26
+
+/* CPU_XSCALE_80321 */
+#define ICU_INT_SSP 25 /* SSP serial port */
+
+#define ICU_INT_MUE 24 /* msg unit error */
+
+/* CPU_XSCALE_80321 */
+#define ICU_INT_AAUE 23 /* AAU error */
+
+#define ICU_INT_bit22 22
+#define ICU_INT_DMA1E 21 /* DMA Ch 1 error */
+#define ICU_INT_DMA0E 20 /* DMA Ch 0 error */
+#define ICU_INT_MCUE 19 /* memory controller error */
+#define ICU_INT_ATUE 18 /* ATU error */
+#define ICU_INT_BIUE 17 /* bus interface unit error */
+#define ICU_INT_PMU 16 /* XScale PMU */
+#define ICU_INT_PPM 15 /* peripheral PMU */
+#define ICU_INT_BIST 14 /* ATU Start BIST */
+#define ICU_INT_MU 13 /* messaging unit */
+#define ICU_INT_I2C1 12 /* i2c unit 1 */
+#define ICU_INT_I2C0 11 /* i2c unit 0 */
+#define ICU_INT_TMR1 10 /* timer 1 */
+#define ICU_INT_TMR0 9 /* timer 0 */
+#define ICU_INT_CPPM 8 /* core processor PMU */
+
+/* CPU_XSCALE_80321 */
+#define ICU_INT_AAU_EOC 7 /* AAU end-of-chain */
+#define ICU_INT_AAU_EOT 6 /* AAU end-of-transfer */
+
+#define ICU_INT_bit5 5
+#define ICU_INT_bit4 4
+#define ICU_INT_DMA1_EOC 3 /* DMA1 end-of-chain */
+#define ICU_INT_DMA1_EOT 2 /* DMA1 end-of-transfer */
+#define ICU_INT_DMA0_EOC 1 /* DMA0 end-of-chain */
+#define ICU_INT_DMA0_EOT 0 /* DMA0 end-of-transfer */
+
+/* CPU_XSCALE_80321 */
+#define ICU_INT_HWMASK (0xffffffff & \
+ ~((1 << ICU_INT_bit26) | \
+ (1 << ICU_INT_bit22) | \
+ (1 << ICU_INT_bit5) | \
+ (1 << ICU_INT_bit4)))
+
+/*
+ * Peripheral Bus Interface Unit
+ */
+
+#define PBIU_PBCR 0x00 /* PBIU Control Register */
+#define PBIU_PBBAR0 0x08 /* PBIU Base Address Register 0 */
+#define PBIU_PBLR0 0x0c /* PBIU Limit Register 0 */
+#define PBIU_PBBAR1 0x10 /* PBIU Base Address Register 1 */
+#define PBIU_PBLR1 0x14 /* PBIU Limit Register 1 */
+#define PBIU_PBBAR2 0x18 /* PBIU Base Address Register 2 */
+#define PBIU_PBLR2 0x1c /* PBIU Limit Register 2 */
+#define PBIU_PBBAR3 0x20 /* PBIU Base Address Register 3 */
+#define PBIU_PBLR3 0x24 /* PBIU Limit Register 3 */
+#define PBIU_PBBAR4 0x28 /* PBIU Base Address Register 4 */
+#define PBIU_PBLR4 0x2c /* PBIU Limit Register 4 */
+#define PBIU_PBBAR5 0x30 /* PBIU Base Address Register 5 */
+#define PBIU_PBLR5 0x34 /* PBIU Limit Register 5 */
+#define PBIU_DSCR 0x38 /* PBIU Drive Strength Control Reg. */
+#define PBIU_MBR0 0x40 /* PBIU Memory-less Boot Reg. 0 */
+#define PBIU_MBR1 0x60 /* PBIU Memory-less Boot Reg. 1 */
+#define PBIU_MBR2 0x64 /* PBIU Memory-less Boot Reg. 2 */
+
+#define PBIU_PBCR_PBIEN (1 << 0)
+#define PBIU_PBCR_PBI100 (1 << 1)
+#define PBIU_PBCR_PBI66 (2 << 1)
+#define PBIU_PBCR_PBI33 (3 << 1)
+#define PBIU_PBCR_PBBEN (1 << 3)
+
+#define PBIU_PBARx_WIDTH8 (0 << 0)
+#define PBIU_PBARx_WIDTH16 (1 << 0)
+#define PBIU_PBARx_WIDTH32 (2 << 0)
+#define PBIU_PBARx_ADWAIT4 (0 << 2)
+#define PBIU_PBARx_ADWAIT8 (1 << 2)
+#define PBIU_PBARx_ADWAIT12 (2 << 2)
+#define PBIU_PBARx_ADWAIT16 (3 << 2)
+#define PBIU_PBARx_ADWAIT20 (4 << 2)
+#define PBIU_PBARx_RCWAIT1 (0 << 6)
+#define PBIU_PBARx_RCWAIT4 (1 << 6)
+#define PBIU_PBARx_RCWAIT8 (2 << 6)
+#define PBIU_PBARx_RCWAIT12 (3 << 6)
+#define PBIU_PBARx_RCWAIT16 (4 << 6)
+#define PBIU_PBARx_RCWAIT20 (5 << 6)
+#define PBIU_PBARx_FWE (1 << 9)
+#define PBIU_BASE_MASK 0xfffff000U
+
+#define PBIU_PBLRx_SIZE(x) (~((x) - 1))
+
+/*
+ * Messaging Unit
+ */
+#define MU_IMR0 0x0010 /* MU Inbound Message Register 0 */
+#define MU_IMR1 0x0014 /* MU Inbound Message Register 1 */
+#define MU_OMR0 0x0018 /* MU Outbound Message Register 0 */
+#define MU_OMR1 0x001c /* MU Outbound Message Register 1 */
+#define MU_IDR 0x0020 /* MU Inbound Doorbell Register */
+#define MU_IISR 0x0024 /* MU Inbound Interrupt Status Reg */
+#define MU_IIMR 0x0028 /* MU Inbound Interrupt Mask Reg */
+#define MU_ODR 0x002c /* MU Outbound Doorbell Register */
+#define MU_OISR 0x0030 /* MU Outbound Interrupt Status Reg */
+#define MU_OIMR 0x0034 /* MU Outbound Interrupt Mask Reg */
+#define MU_MUCR 0x0050 /* MU Configuration Register */
+#define MU_QBAR 0x0054 /* MU Queue Base Address Register */
+#define MU_IFHPR 0x0060 /* MU Inbound Free Head Pointer Reg */
+#define MU_IFTPR 0x0064 /* MU Inbound Free Tail Pointer Reg */
+#define MU_IPHPR 0x0068 /* MU Inbound Post Head Pointer Reg */
+#define MU_IPTPR 0x006c /* MU Inbound Post Tail Pointer Reg */
+#define MU_OFHPR 0x0070 /* MU Outbound Free Head Pointer Reg */
+#define MU_OFTPR 0x0074 /* MU Outbound Free Tail Pointer Reg */
+#define MU_OPHPR 0x0078 /* MU Outbound Post Head Pointer Reg */
+#define MU_OPTPR 0x007c /* MU Outbound Post Tail Pointer Reg */
+#define MU_IAR 0x0080 /* MU Index Address Register */
+
+#define MU_IIMR_IRI (1 << 6) /* Index Register Interrupt */
+#define MU_IIMR_OFQFI (1 << 5) /* Outbound Free Queue Full Int. */
+#define MU_IIMR_IPQI (1 << 4) /* Inbound Post Queue Interrupt */
+#define MU_IIMR_EDI (1 << 3) /* Error Doorbell Interrupt */
+#define MU_IIMR_IDI (1 << 2) /* Inbound Doorbell Interrupt */
+#define MU_IIMR_IM1I (1 << 1) /* Inbound Message 1 Interrupt */
+#define MU_IIMR_IM0I (1 << 0) /* Inbound Message 0 Interrupt */
+
+#endif /* _ARM_XSCALE_I80321REG_H_ */
Property changes on: trunk/sys/arm/xscale/i8134x/i80321reg.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Added: trunk/sys/arm/xscale/i8134x/i80321var.h
===================================================================
--- trunk/sys/arm/xscale/i8134x/i80321var.h (rev 0)
+++ trunk/sys/arm/xscale/i8134x/i80321var.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -0,0 +1,138 @@
+/* $MidnightBSD$ */
+/* $NetBSD: i80321var.h,v 1.8 2003/10/06 16:06:06 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD: stable/11/sys/arm/xscale/i8134x/i80321var.h 295199 2016-02-03 08:59:12Z mmel $
+ *
+ */
+
+#ifndef _ARM_XSCALE_I80321VAR_H_
+#define _ARM_XSCALE_I80321VAR_H_
+
+#include <sys/queue.h>
+#include <dev/pci/pcivar.h>
+#include <sys/rman.h>
+
+extern struct bus_space i80321_bs_tag;
+
+struct i80321_softc {
+ device_t dev;
+ bus_space_tag_t sc_st;
+ bus_space_handle_t sc_sh;
+ /* Handles for the various subregions. */
+ bus_space_handle_t sc_atu_sh;
+ bus_space_handle_t sc_mcu_sh;
+ int sc_is_host;
+
+ /*
+ * We expect the board-specific front-end to have already mapped
+ * the PCI I/O space .. it is only 64K, and I/O mappings tend to
+ * be smaller than a page size, so it's generally more efficient
+ * to map them all into virtual space in one fell swoop.
+ */
+ vm_offset_t sc_iow_vaddr; /* I/O window vaddr */
+
+ /*
+ * Variables that define the Inbound windows. The base address of
+ * 0-2 are configured by a host via BARs. The xlate variable
+ * defines the start of the local address space that it maps to.
+ * The size variable defines the byte size.
+ *
+ * The first 3 windows are for incoming PCI memory read/write
+ * cycles from a host. The 4th window, not configured by the
+ * host (as it outside the normal BAR range) is the inbound
+ * window for PCI devices controlled by the i80321.
+ */
+ struct {
+ uint32_t iwin_base_hi;
+ uint32_t iwin_base_lo;
+ uint32_t iwin_xlate;
+ uint32_t iwin_size;
+ } sc_iwin[4];
+
+ /*
+ * Variables that define the Outbound windows.
+ */
+ struct {
+ uint32_t owin_xlate_lo;
+ uint32_t owin_xlate_hi;
+ } sc_owin[2];
+
+ /*
+ * This is the PCI address that the Outbound I/O
+ * window maps to.
+ */
+ uint32_t sc_ioout_xlate;
+
+ /* Bus space, DMA, and PCI tags for the PCI bus (private devices). */
+ struct bus_space sc_pci_iot;
+ struct bus_space sc_pci_memt;
+
+ /* GPIO state */
+ uint8_t sc_gpio_dir; /* GPIO pin direction (1 == output) */
+ uint8_t sc_gpio_val; /* GPIO output pin value */
+ struct rman sc_irq_rman;
+
+};
+
+
+struct i80321_pci_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_st;
+ bus_space_handle_t sc_atu_sh;
+ bus_space_tag_t sc_pciio;
+ bus_space_tag_t sc_pcimem;
+ int sc_busno;
+ struct rman sc_mem_rman;
+ struct rman sc_io_rman;
+ struct rman sc_irq_rman;
+ uint32_t sc_mem;
+ uint32_t sc_io;
+};
+
+void i80321_sdram_bounds(bus_space_tag_t, bus_space_handle_t,
+ vm_paddr_t *, vm_size_t *);
+
+void i80321_attach(struct i80321_softc *);
+void i80321_calibrate_delay(void);
+
+void i80321_bs_init(bus_space_tag_t, void *);
+void i80321_io_bs_init(bus_space_tag_t, void *);
+void i80321_mem_bs_init(bus_space_tag_t, void *);
+extern int machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin);
+
+
+#endif /* _ARM_XSCALE_I80321VAR_H_ */
Property changes on: trunk/sys/arm/xscale/i8134x/i80321var.h
___________________________________________________________________
Added: svn:eol-style
## -0,0 +1 ##
+native
\ No newline at end of property
Added: svn:keywords
## -0,0 +1 ##
+MidnightBSD=%H
\ No newline at end of property
Added: svn:mime-type
## -0,0 +1 ##
+text/plain
\ No newline at end of property
Modified: trunk/sys/arm/xscale/i8134x/i81342.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/i81342.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/i81342.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/i81342.c 278613 2015-02-12 03:50:33Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/i81342.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -410,7 +410,7 @@
static struct resource *
i81342_alloc_resource(device_t dev, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct i81342_softc *sc = device_get_softc(dev);
struct resource *rv;
Modified: trunk/sys/arm/xscale/i8134x/i81342_mcu.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/i81342_mcu.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/i81342_mcu.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/i81342_mcu.c 236987 2012-06-13 04:38:09Z imp $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/i81342_mcu.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/i8134x/i81342_pci.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/i81342_pci.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/i81342_pci.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/i81342_pci.c 259329 2013-12-13 20:43:11Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/i81342_pci.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -122,8 +122,8 @@
memstart | PCI_MAPREG_MEM_PREFETCHABLE_MASK |
PCI_MAPREG_MEM_TYPE_64BIT);
bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IAUBAR1, 0);
- bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IALR1, ~(memsize - 1)
- &~(0xfff));
+ bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IALR1,
+ rounddown2(~(0xfff), memsize));
bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IATVR1, memstart);
bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_IAUTVR1, 0);
@@ -210,7 +210,7 @@
}
bus_space_write_4(sc->sc_st, sc->sc_atu_sh, ATU_ISR,
bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_ISR) & ATUX_ISR_ERRMSK);
- device_add_child(dev, "pci", busno);
+ device_add_child(dev, "pci", -1);
return (bus_generic_attach(dev));
}
@@ -329,7 +329,7 @@
static struct resource *
i81342_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct i81342_pci_softc *sc = device_get_softc(bus);
struct resource *rv;
@@ -384,7 +384,7 @@
i81342_pci_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *r)
{
- u_long p;
+ bus_space_handle_t p;
int error;
if (type == SYS_RES_MEMORY) {
Modified: trunk/sys/arm/xscale/i8134x/i81342_space.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/i81342_space.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/i81342_space.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/i81342_space.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/i81342_space.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -179,13 +179,13 @@
tmp = tmp->next;
}
addr = allocable;
- endaddr = ((addr + size) &~ (0x1000000 - 1)) + 0x1000000;
+ endaddr = rounddown2(addr + size, 0x1000000) + 0x1000000;
if (endaddr >= IOP34X_VADDR)
panic("PCI virtual memory exhausted");
allocable = endaddr;
tmp = malloc(sizeof(*tmp), M_DEVBUF, M_WAITOK);
tmp->next = NULL;
- paddr = bpa &~ (0x100000 - 1);
+ paddr = rounddown2(bpa, 0x100000);
tmp->paddr = paddr;
tmp->vaddr = addr;
tmp->size = 0;
Modified: trunk/sys/arm/xscale/i8134x/i81342reg.h
===================================================================
--- trunk/sys/arm/xscale/i8134x/i81342reg.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/i81342reg.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -25,7 +25,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-/* $FreeBSD: stable/10/sys/arm/xscale/i8134x/i81342reg.h 261455 2014-02-04 03:36:42Z eadler $ */
+/* $FreeBSD: stable/11/sys/arm/xscale/i8134x/i81342reg.h 331722 2018-03-29 02:50:57Z eadler $ */
#ifndef I83142_REG_H_
#define I83142_REG_H_
@@ -185,7 +185,7 @@
#define ATU_IATVR2 0x005c /* Inbound ATU Translate Value Register 2 */
#define ATU_IAUTVR2 0x0060 /* Inbound ATU Upper Translate Value Register 2*/
#define ATU_ERLR 0x0064 /* Expansion ROM Limit Register */
-#define ATU_ERTVR 0x0068 /* Expansion ROM Translater Value Register */
+#define ATU_ERTVR 0x0068 /* Expansion ROM Translator Value Register */
#define ATU_ERUTVR 0x006c /* Expansion ROM Upper Translate Value Register*/
#define ATU_CR 0x0070 /* ATU Configuration Register */
#define ATU_CR_OUT_EN (1 << 1)
Modified: trunk/sys/arm/xscale/i8134x/i81342var.h
===================================================================
--- trunk/sys/arm/xscale/i8134x/i81342var.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/i81342var.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -25,7 +25,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-/* $FreeBSD: stable/10/sys/arm/xscale/i8134x/i81342var.h 171626 2007-07-27 14:50:57Z cognet $ */
+/* $FreeBSD: stable/11/sys/arm/xscale/i8134x/i81342var.h 331722 2018-03-29 02:50:57Z eadler $ */
#ifndef I81342VAR_H_
#define I81342VAR_H_
Modified: trunk/sys/arm/xscale/i8134x/iq81342_7seg.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/iq81342_7seg.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/iq81342_7seg.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/iq81342_7seg.c 236987 2012-06-13 04:38:09Z imp $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/iq81342_7seg.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/i8134x/iq81342reg.h
===================================================================
--- trunk/sys/arm/xscale/i8134x/iq81342reg.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/iq81342reg.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -25,7 +25,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-/* $FreeBSD: stable/10/sys/arm/xscale/i8134x/iq81342reg.h 172297 2007-09-22 16:25:43Z cognet $ */
+/* $FreeBSD: stable/11/sys/arm/xscale/i8134x/iq81342reg.h 331722 2018-03-29 02:50:57Z eadler $ */
#ifndef _IQ81342REG_H_
#define _IQ81342REG_H_
Modified: trunk/sys/arm/xscale/i8134x/iq81342var.h
===================================================================
--- trunk/sys/arm/xscale/i8134x/iq81342var.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/iq81342var.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -25,7 +25,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-/* $FreeBSD: stable/10/sys/arm/xscale/i8134x/iq81342var.h 172297 2007-09-22 16:25:43Z cognet $ */
+/* $FreeBSD: stable/11/sys/arm/xscale/i8134x/iq81342var.h 331722 2018-03-29 02:50:57Z eadler $ */
#ifndef _IQ81342VAR_H_
#define _IQ81342VAR_H_
Modified: trunk/sys/arm/xscale/i8134x/obio.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/obio.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/obio.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -42,7 +42,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/obio.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/obio.c 331890 2018-04-02 22:02:49Z gonzo $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -57,8 +57,6 @@
#include <arm/xscale/i8134x/i81342reg.h>
#include <arm/xscale/i8134x/obiovar.h>
-bus_space_tag_t obio_bs_tag;
-
static int
obio_probe(device_t dev)
{
@@ -70,8 +68,7 @@
{
struct obio_softc *sc = device_get_softc(dev);
- obio_bs_tag = arm_base_bs_tag;
- sc->oba_st = obio_bs_tag;
+ sc->oba_st = arm_base_bs_tag;
sc->oba_rman.rm_type = RMAN_ARRAY;
sc->oba_rman.rm_descr = "OBIO I/O";
if (rman_init(&sc->oba_rman) != 0 ||
@@ -92,7 +89,7 @@
static struct resource *
obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct resource *rv;
struct rman *rm;
Modified: trunk/sys/arm/xscale/i8134x/obiovar.h
===================================================================
--- trunk/sys/arm/xscale/i8134x/obiovar.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/obiovar.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: stable/10/sys/arm/xscale/i8134x/obiovar.h 278727 2015-02-13 22:32:02Z ian $
+ * $FreeBSD: stable/11/sys/arm/xscale/i8134x/obiovar.h 331890 2018-04-02 22:02:49Z gonzo $
*
*/
@@ -51,6 +51,5 @@
struct rman oba_irq_rman;
};
-extern bus_space_tag_t obio_bs_tag;
#endif /* _IQ80321_OBIOVAR_H_ */
Modified: trunk/sys/arm/xscale/i8134x/std.crb
===================================================================
--- trunk/sys/arm/xscale/i8134x/std.crb 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/std.crb 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,5 +1,5 @@
#CRB board configuration
-#$FreeBSD: stable/10/sys/arm/xscale/i8134x/std.crb 171626 2007-07-27 14:50:57Z cognet $
+#$FreeBSD: stable/11/sys/arm/xscale/i8134x/std.crb 171626 2007-07-27 14:50:57Z cognet $
include "../xscale/i8134x/std.i81342"
files "../xscale/i8134x/files.crb"
makeoptions KERNPHYSADDR=0x00200000
Modified: trunk/sys/arm/xscale/i8134x/std.i81342
===================================================================
--- trunk/sys/arm/xscale/i8134x/std.i81342 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/std.i81342 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,5 +1,5 @@
#XScale i81342 generic configuration
-#$FreeBSD: stable/10/sys/arm/xscale/i8134x/std.i81342 239362 2012-08-18 05:48:19Z andrew $
+#$FreeBSD: stable/11/sys/arm/xscale/i8134x/std.i81342 239362 2012-08-18 05:48:19Z andrew $
files "../xscale/i8134x/files.i81342"
include "../xscale/std.xscale-be"
cpu CPU_XSCALE_81342
Modified: trunk/sys/arm/xscale/i8134x/uart_bus_i81342.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/uart_bus_i81342.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/uart_bus_i81342.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/uart_bus_i81342.c 171626 2007-07-27 14:50:57Z cognet $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/uart_bus_i81342.c 340145 2018-11-04 23:28:56Z mmacy $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -75,8 +75,8 @@
sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
}
- sc->sc_rres = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->sc_rrid,
- 0, ~0, uart_getrange(sc->sc_class), RF_ACTIVE);
+ sc->sc_rres = bus_alloc_resource_anywhere(dev, SYS_RES_IOPORT,
+ &sc->sc_rrid, uart_getrange(sc->sc_class), RF_ACTIVE);
sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
@@ -84,7 +84,7 @@
0x40 | 0x10);
bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
- err = uart_bus_probe(dev, 2, 33334000, 0, device_get_unit(dev));
+ err = uart_bus_probe(dev, 2, 0, 33334000, 0, device_get_unit(dev), 0);
sc->sc_rxfifosz = sc->sc_txfifosz = 1;
return (err);
}
Modified: trunk/sys/arm/xscale/i8134x/uart_cpu_i81342.c
===================================================================
--- trunk/sys/arm/xscale/i8134x/uart_cpu_i81342.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/i8134x/uart_cpu_i81342.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/i8134x/uart_cpu_i81342.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/i8134x/uart_cpu_i81342.c 331890 2018-04-02 22:02:49Z gonzo $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -55,7 +55,7 @@
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
- di->bas.bst = obio_bs_tag;
+ di->bas.bst = arm_base_bs_tag;
di->bas.regshft = 2;
di->bas.rclk = 33334000;
di->baudrate = 115200;
@@ -62,7 +62,7 @@
di->databits = 8;
di->stopbits = 1;
di->parity = UART_PARITY_NONE;
- uart_bus_space_io = obio_bs_tag;
+ uart_bus_space_io = arm_base_bs_tag;
uart_bus_space_mem = NULL;
di->bas.bsh = IOP34X_UART0_VADDR;
return (0);
Modified: trunk/sys/arm/xscale/ixp425/avila_ata.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/avila_ata.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/avila_ata.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/avila_ata.c 305615 2016-09-08 15:06:28Z pfg $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/avila_ata.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* Compact Flash Support for the Avila Gateworks XScale boards.
@@ -54,8 +54,6 @@
#include <sys/endian.h>
#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
#include <machine/resource.h>
#include <machine/intr.h>
#include <arm/xscale/ixp425/ixp425reg.h>
@@ -283,12 +281,12 @@
static struct resource *
ata_avila_alloc_resource(device_t dev, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct ata_avila_softc *sc = device_get_softc(dev);
KASSERT(type == SYS_RES_IRQ && *rid == ATA_IRQ_RID,
- ("type %u rid %u start %lu end %lu count %lu flags %u",
+ ("type %u rid %u start %ju end %ju count %ju flags %u",
type, *rid, start, end, count, flags));
/* doesn't matter what we return so reuse the real thing */
Modified: trunk/sys/arm/xscale/ixp425/avila_gpio.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/avila_gpio.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/avila_gpio.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/avila_gpio.c 278786 2015-02-14 21:16:19Z loos $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/avila_gpio.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -50,6 +50,7 @@
#include <machine/resource.h>
#include <arm/xscale/ixp425/ixp425reg.h>
#include <arm/xscale/ixp425/ixp425var.h>
+#include <dev/gpio/gpiobusvar.h>
#include "gpio_if.h"
@@ -61,6 +62,7 @@
struct avila_gpio_softc {
device_t sc_dev;
+ device_t sc_busdev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_gpio_ioh;
uint32_t sc_valid;
@@ -117,6 +119,7 @@
/*
* GPIO interface
*/
+static device_t avila_gpio_get_bus(device_t);
static int avila_gpio_pin_max(device_t dev, int *maxpin);
static int avila_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
static int avila_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
@@ -163,6 +166,16 @@
}
}
+static device_t
+avila_gpio_get_bus(device_t dev)
+{
+ struct avila_gpio_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ return (sc->sc_busdev);
+}
+
static int
avila_gpio_pin_max(device_t dev, int *maxpin)
{
@@ -311,10 +324,11 @@
sc->sc_valid |= 1 << p->pin;
}
- device_add_child(dev, "gpioc", -1);
- device_add_child(dev, "gpiobus", -1);
+ sc->sc_busdev = gpiobus_attach_bus(dev);
+ if (sc->sc_busdev == NULL)
+ return (ENXIO);
- return (bus_generic_attach(dev));
+ return (0);
#undef N
}
@@ -322,7 +336,7 @@
avila_gpio_detach(device_t dev)
{
- bus_generic_detach(dev);
+ gpiobus_detach_bus(dev);
return(0);
}
@@ -333,6 +347,7 @@
DEVMETHOD(device_detach, avila_gpio_detach),
/* GPIO protocol */
+ DEVMETHOD(gpio_get_bus, avila_gpio_get_bus),
DEVMETHOD(gpio_pin_max, avila_gpio_pin_max),
DEVMETHOD(gpio_pin_getname, avila_gpio_pin_getname),
DEVMETHOD(gpio_pin_getflags, avila_gpio_pin_getflags),
@@ -345,15 +360,11 @@
};
static driver_t gpio_avila_driver = {
- "gpio_avila",
+ "gpio",
gpio_avila_methods,
sizeof(struct avila_gpio_softc),
};
static devclass_t gpio_avila_devclass;
-extern devclass_t gpiobus_devclass, gpioc_devclass;
-extern driver_t gpiobus_driver, gpioc_driver;
DRIVER_MODULE(gpio_avila, ixp, gpio_avila_driver, gpio_avila_devclass, 0, 0);
-DRIVER_MODULE(gpiobus, gpio_avila, gpiobus_driver, gpiobus_devclass, 0, 0);
-DRIVER_MODULE(gpioc, gpio_avila, gpioc_driver, gpioc_devclass, 0, 0);
MODULE_VERSION(gpio_avila, 1);
Modified: trunk/sys/arm/xscale/ixp425/avila_led.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/avila_led.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/avila_led.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/avila_led.c 215319 2010-11-14 20:41:22Z thompsa $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/avila_led.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/ixp425/avila_machdep.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/avila_machdep.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/avila_machdep.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -39,7 +39,7 @@
*
* machdep.c
*
- * Machine dependant functions for kernel setup
+ * Machine dependent functions for kernel setup
*
* This file needs a lot of work.
*
@@ -47,8 +47,10 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/avila_machdep.c 294683 2016-01-24 21:04:06Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/avila_machdep.c 331722 2018-03-29 02:50:57Z eadler $");
+#include "opt_kstack_pages.h"
+
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
#include <sys/systm.h>
@@ -71,6 +73,7 @@
#include <sys/exec.h>
#include <sys/kdb.h>
#include <sys/msgbuf.h>
+#include <sys/devmap.h>
#include <machine/physmem.h>
#include <machine/reg.h>
#include <machine/cpu.h>
@@ -80,7 +83,6 @@
#include <vm/vm_object.h>
#include <vm/vm_page.h>
#include <vm/vm_map.h>
-#include <machine/devmap.h>
#include <machine/vmparam.h>
#include <machine/pcb.h>
#include <machine/undefined.h>
@@ -116,81 +118,65 @@
struct pv_addr minidataclean;
/* Static device mappings. */
-static const struct arm_devmap_entry ixp425_devmap[] = {
+static const struct devmap_entry ixp425_devmap[] = {
/* Physical/Virtual address for I/O space */
- { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, },
/* Expansion Bus */
- { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, },
/* CFI Flash on the Expansion Bus */
{ IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
- IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ IXP425_EXP_BUS_CS0_SIZE, },
/* IXP425 PCI Configuration */
- { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, },
/* SDRAM Controller */
- { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE, },
/* PCI Memory Space */
- { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, },
/* Q-Mgr Memory Space */
- { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, },
{ 0 },
};
/* Static device mappings. */
-static const struct arm_devmap_entry ixp435_devmap[] = {
+static const struct devmap_entry ixp435_devmap[] = {
/* Physical/Virtual address for I/O space */
- { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE, },
- { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, },
/* IXP425 PCI Configuration */
- { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, },
/* DDRII Controller NB: mapped same place as IXP425 */
- { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE, },
/* PCI Memory Space */
- { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE, },
/* Q-Mgr Memory Space */
- { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE, },
/* CFI Flash on the Expansion Bus */
{ IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
- IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ IXP425_EXP_BUS_CS0_SIZE, },
/* USB1 Memory Space */
- { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE, },
/* USB2 Memory Space */
- { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE, },
/* GPS Memory Space */
- { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE, },
/* RS485 Memory Space */
- { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE,
- VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
+ { CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE, },
{ 0 }
};
@@ -294,7 +280,7 @@
valloc_pages(irqstack, IRQ_STACK_SIZE);
valloc_pages(abtstack, ABT_STACK_SIZE);
valloc_pages(undstack, UND_STACK_SIZE);
- valloc_pages(kernelstack, KSTACK_PAGES);
+ valloc_pages(kernelstack, kstack_pages);
alloc_pages(minidataclean.pv_pa, 1);
valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
@@ -306,7 +292,7 @@
l1pagetable = kernel_l1pt.pv_va;
/* Map the L2 pages tables in the L1 page table */
- pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
+ pmap_link_l2pt(l1pagetable, rounddown2(ARM_VECTORS_HIGH, 0x00100000),
&kernel_pt_table[KERNEL_PT_SYS]);
pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
&kernel_pt_table[KERNEL_PT_IO]);
@@ -341,9 +327,9 @@
pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
if (cpu_is_ixp43x())
- arm_devmap_bootstrap(l1pagetable, ixp435_devmap);
+ devmap_bootstrap(l1pagetable, ixp435_devmap);
else
- arm_devmap_bootstrap(l1pagetable, ixp425_devmap);
+ devmap_bootstrap(l1pagetable, ixp425_devmap);
/*
* Give the XScale global cache clean code an appropriately
* sized chunk of unmapped VA space starting at 0xff000000
@@ -352,7 +338,7 @@
xscale_cache_clean_addr = 0xff000000U;
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
- setttb(kernel_l1pt.pv_pa);
+ cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
@@ -369,7 +355,7 @@
/*
* We must now clean the cache again....
* Cleaning may be done by reading new data to displace any
- * dirty data in the cache. This will have happened in setttb()
+ * dirty data in the cache. This will have happened in cpu_setttb()
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
@@ -377,7 +363,7 @@
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
- cpu_setup("");
+ cpu_setup();
/* ready to setup the console (XXX move earlier if possible) */
cninit();
@@ -397,7 +383,7 @@
arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
- vm_max_kernel_address = 0xd0000000;
+ vm_max_kernel_address = 0xe0000000;
pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
msgbufp = (void*)msgbufpv.pv_va;
msgbufinit(msgbufp, msgbufsize);
@@ -414,6 +400,10 @@
* Prepare the list of physical memory available to the vm subsystem.
*/
arm_physmem_hardware_region(PHYSADDR, memsize);
+ arm_physmem_exclude_region(freemem_pt, abp->abp_physaddr -
+ freemem_pt, EXFLAG_NOALLOC);
+ arm_physmem_exclude_region(freemempos, abp->abp_physaddr - 0x100000 -
+ freemempos, EXFLAG_NOALLOC);
arm_physmem_exclude_region(abp->abp_physaddr,
virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
arm_physmem_init_kernel_globals();
Modified: trunk/sys/arm/xscale/ixp425/cambria_exp_space.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/cambria_exp_space.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/cambria_exp_space.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -37,7 +37,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/cambria_exp_space.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/cambria_exp_space.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/ixp425/cambria_fled.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/cambria_fled.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/cambria_fled.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/cambria_fled.c 205705 2010-03-26 18:49:43Z rpaulo $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/cambria_fled.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* Cambria Front Panel LED sitting on the I2C bus.
*/
Modified: trunk/sys/arm/xscale/ixp425/cambria_gpio.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/cambria_gpio.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/cambria_gpio.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -33,7 +33,7 @@
* The Cambria PLD does not set the i2c ack bit after each write, if we used the
* regular iicbus interface it would abort the xfer after the address byte
* times out and not write our latch. To get around this we grab the iicbus and
- * then do our own bit banging. This is a comprimise to changing all the iicbb
+ * then do our own bit banging. This is a compromise to changing all the iicbb
* device methods to allow a flag to be passed down and is similir to how Linux
* does it.
*
@@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/cambria_gpio.c 278786 2015-02-14 21:16:19Z loos $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/cambria_gpio.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -57,6 +57,7 @@
#include <arm/xscale/ixp425/ixp425var.h>
#include <arm/xscale/ixp425/ixdp425reg.h>
+#include <dev/gpio/gpiobusvar.h>
#include <dev/iicbus/iiconf.h>
#include <dev/iicbus/iicbus.h>
@@ -80,6 +81,7 @@
#define GPIO_PINS 5
struct cambria_gpio_softc {
device_t sc_dev;
+ device_t sc_busdev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_gpio_ioh;
struct mtx sc_mtx;
@@ -120,6 +122,7 @@
/*
* GPIO interface
*/
+static device_t cambria_gpio_get_bus(device_t);
static int cambria_gpio_pin_max(device_t dev, int *maxpin);
static int cambria_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
static int cambria_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
@@ -262,6 +265,16 @@
return (0);
}
+static device_t
+cambria_gpio_get_bus(device_t dev)
+{
+ struct cambria_gpio_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ return (sc->sc_busdev);
+}
+
static int
cambria_gpio_pin_max(device_t dev, int *maxpin)
{
@@ -439,10 +452,13 @@
cambria_gpio_pin_setflags(dev, pin, p->flags);
}
- device_add_child(dev, "gpioc", -1);
- device_add_child(dev, "gpiobus", -1);
+ sc->sc_busdev = gpiobus_attach_bus(dev);
+ if (sc->sc_busdev == NULL) {
+ mtx_destroy(&sc->sc_mtx);
+ return (ENXIO);
+ }
- return (bus_generic_attach(dev));
+ return (0);
}
static int
@@ -452,8 +468,7 @@
KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized"));
- bus_generic_detach(dev);
-
+ gpiobus_detach_bus(dev);
mtx_destroy(&sc->sc_mtx);
return(0);
@@ -465,6 +480,7 @@
DEVMETHOD(device_detach, cambria_gpio_detach),
/* GPIO protocol */
+ DEVMETHOD(gpio_get_bus, cambria_gpio_get_bus),
DEVMETHOD(gpio_pin_max, cambria_gpio_pin_max),
DEVMETHOD(gpio_pin_getname, cambria_gpio_pin_getname),
DEVMETHOD(gpio_pin_getflags, cambria_gpio_pin_getflags),
@@ -477,16 +493,12 @@
};
static driver_t cambria_gpio_driver = {
- "gpio_cambria",
+ "gpio",
cambria_gpio_methods,
sizeof(struct cambria_gpio_softc),
};
static devclass_t cambria_gpio_devclass;
-extern devclass_t gpiobus_devclass, gpioc_devclass;
-extern driver_t gpiobus_driver, gpioc_driver;
DRIVER_MODULE(gpio_cambria, iicbus, cambria_gpio_driver, cambria_gpio_devclass, 0, 0);
-DRIVER_MODULE(gpiobus, gpio_cambria, gpiobus_driver, gpiobus_devclass, 0, 0);
-DRIVER_MODULE(gpioc, gpio_cambria, gpioc_driver, gpioc_devclass, 0, 0);
MODULE_VERSION(gpio_cambria, 1);
MODULE_DEPEND(gpio_cambria, iicbus, 1, 1, 1);
Modified: trunk/sys/arm/xscale/ixp425/cambria_led.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/cambria_led.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/cambria_led.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/cambria_led.c 194015 2009-06-11 17:05:13Z avg $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/cambria_led.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* Gateworks Cambria Octal LED Latch driver.
Modified: trunk/sys/arm/xscale/ixp425/files.avila
===================================================================
--- trunk/sys/arm/xscale/ixp425/files.avila 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/files.avila 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,4 +1,4 @@
-#$FreeBSD: stable/10/sys/arm/xscale/ixp425/files.avila 215142 2010-11-11 20:18:33Z thompsa $
+#$FreeBSD: stable/11/sys/arm/xscale/ixp425/files.avila 215142 2010-11-11 20:18:33Z thompsa $
arm/xscale/ixp425/avila_machdep.c standard
arm/xscale/ixp425/avila_ata.c optional avila_ata
arm/xscale/ixp425/avila_led.c optional avila_led
Modified: trunk/sys/arm/xscale/ixp425/files.ixp425
===================================================================
--- trunk/sys/arm/xscale/ixp425/files.ixp425 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/files.ixp425 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,6 +1,4 @@
-#$FreeBSD: stable/10/sys/arm/xscale/ixp425/files.ixp425 266311 2014-05-17 13:53:38Z ian $
-arm/arm/bus_space_generic.c standard
-arm/arm/cpufunc_asm_xscale.S standard
+#$FreeBSD: stable/11/sys/arm/xscale/ixp425/files.ixp425 291133 2015-11-21 15:30:08Z andrew $
arm/xscale/ixp425/ixp425.c standard
arm/xscale/ixp425/ixp425_mem.c standard
arm/xscale/ixp425/ixp425_space.c standard
Modified: trunk/sys/arm/xscale/ixp425/if_npe.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/if_npe.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/if_npe.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/if_npe.c 266406 2014-05-18 16:07:35Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/if_npe.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* Intel XScale NPE Ethernet driver.
@@ -256,9 +256,8 @@
"IXP4XX NPE driver parameters");
static int npe_debug = 0;
-SYSCTL_INT(_hw_npe, OID_AUTO, debug, CTLFLAG_RW, &npe_debug,
+SYSCTL_INT(_hw_npe, OID_AUTO, debug, CTLFLAG_RWTUN, &npe_debug,
0, "IXP4XX NPE network interface debug msgs");
-TUNABLE_INT("hw.npe.debug", &npe_debug);
#define DPRINTF(sc, fmt, ...) do { \
if (sc->sc_debug) device_printf(sc->sc_dev, fmt, __VA_ARGS__); \
} while (0)
@@ -266,18 +265,15 @@
if (sc->sc_debug >= n) device_printf(sc->sc_dev, fmt, __VA_ARGS__);\
} while (0)
static int npe_tickinterval = 3; /* npe_tick frequency (secs) */
-SYSCTL_INT(_hw_npe, OID_AUTO, tickinterval, CTLFLAG_RD, &npe_tickinterval,
+SYSCTL_INT(_hw_npe, OID_AUTO, tickinterval, CTLFLAG_RDTUN, &npe_tickinterval,
0, "periodic work interval (secs)");
-TUNABLE_INT("hw.npe.tickinterval", &npe_tickinterval);
static int npe_rxbuf = 64; /* # rx buffers to allocate */
-SYSCTL_INT(_hw_npe, OID_AUTO, rxbuf, CTLFLAG_RD, &npe_rxbuf,
+SYSCTL_INT(_hw_npe, OID_AUTO, rxbuf, CTLFLAG_RDTUN, &npe_rxbuf,
0, "rx buffers allocated");
-TUNABLE_INT("hw.npe.rxbuf", &npe_rxbuf);
static int npe_txbuf = 128; /* # tx buffers to allocate */
-SYSCTL_INT(_hw_npe, OID_AUTO, txbuf, CTLFLAG_RD, &npe_txbuf,
+SYSCTL_INT(_hw_npe, OID_AUTO, txbuf, CTLFLAG_RDTUN, &npe_txbuf,
0, "tx buffers allocated");
-TUNABLE_INT("hw.npe.txbuf", &npe_txbuf);
static int
unit2npeid(int unit)
@@ -290,7 +286,7 @@
};
/* XXX check feature register instead */
return (unit < 3 ? npeidmap[
- (cpu_id() & CPU_ID_CPU_MASK) == CPU_ID_IXP435][unit] : -1);
+ (cpu_ident() & CPU_ID_CPU_MASK) == CPU_ID_IXP435][unit] : -1);
}
static int
@@ -686,7 +682,8 @@
/* MAC */
if (!override_addr(dev, "mac", &macbase))
macbase = npeconfig[sc->sc_npeid].macbase;
- device_printf(sc->sc_dev, "MAC at 0x%x\n", macbase);
+ if (bootverbose)
+ device_printf(sc->sc_dev, "MAC at 0x%x\n", macbase);
if (bus_space_map(sc->sc_iot, macbase, IXP425_REG_SIZE, 0, &sc->sc_ioh)) {
device_printf(dev, "cannot map mac registers 0x%x:0x%x\n",
macbase, IXP425_REG_SIZE);
@@ -698,7 +695,8 @@
phy = npeconfig[sc->sc_npeid].phy;
if (!override_addr(dev, "mii", &miibase))
miibase = npeconfig[sc->sc_npeid].miibase;
- device_printf(sc->sc_dev, "MII at 0x%x\n", miibase);
+ if (bootverbose)
+ device_printf(sc->sc_dev, "MII at 0x%x\n", miibase);
if (miibase != macbase) {
/*
* PHY is mapped through a different MAC, setup an
@@ -909,20 +907,18 @@
be32toh(ns->RxOverrunDiscards)
+ be32toh(ns->RxUnderflowEntryDiscards);
- ifp->if_oerrors +=
- be32toh(ns->dot3StatsInternalMacTransmitErrors)
- + be32toh(ns->dot3StatsCarrierSenseErrors)
- + be32toh(ns->TxVLANIdFilterDiscards)
- ;
- ifp->if_ierrors += be32toh(ns->dot3StatsFCSErrors)
- + be32toh(ns->dot3StatsInternalMacReceiveErrors)
- + be32toh(ns->RxOverrunDiscards)
- + be32toh(ns->RxUnderflowEntryDiscards)
- ;
- ifp->if_collisions +=
- be32toh(ns->dot3StatsSingleCollisionFrames)
- + be32toh(ns->dot3StatsMultipleCollisionFrames)
- ;
+ if_inc_counter(ifp, IFCOUNTER_OERRORS,
+ be32toh(ns->dot3StatsInternalMacTransmitErrors) +
+ be32toh(ns->dot3StatsCarrierSenseErrors) +
+ be32toh(ns->TxVLANIdFilterDiscards));
+ if_inc_counter(ifp, IFCOUNTER_IERRORS,
+ be32toh(ns->dot3StatsFCSErrors) +
+ be32toh(ns->dot3StatsInternalMacReceiveErrors) +
+ be32toh(ns->RxOverrunDiscards) +
+ be32toh(ns->RxUnderflowEntryDiscards));
+ if_inc_counter(ifp, IFCOUNTER_COLLISIONS,
+ be32toh(ns->dot3StatsSingleCollisionFrames) +
+ be32toh(ns->dot3StatsMultipleCollisionFrames));
#undef NPEADD
#undef MIBADD
}
@@ -1002,7 +998,7 @@
* We're no longer busy, so clear the busy flag and call the
* start routine to xmit more packets.
*/
- ifp->if_opackets += td->count;
+ if_inc_counter(ifp, IFCOUNTER_OPACKETS, td->count);
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
sc->npe_watchdog_timer = 0;
npestart_locked(ifp);
@@ -1141,7 +1137,7 @@
mrx->m_pkthdr.len = mrx->m_len;
mrx->m_pkthdr.rcvif = ifp;
- ifp->if_ipackets++;
+ if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
ifp->if_input(ifp, mrx);
rx_npkts++;
} else {
@@ -1470,7 +1466,7 @@
return;
device_printf(sc->sc_dev, "watchdog timeout\n");
- sc->sc_ifp->if_oerrors++;
+ if_inc_counter(sc->sc_ifp, IFCOUNTER_OERRORS, 1);
npeinit_locked(sc);
}
Modified: trunk/sys/arm/xscale/ixp425/if_npereg.h
===================================================================
--- trunk/sys/arm/xscale/ixp425/if_npereg.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/if_npereg.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -27,7 +27,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: stable/10/sys/arm/xscale/ixp425/if_npereg.h 236987 2012-06-13 04:38:09Z imp $
+ * $FreeBSD: stable/11/sys/arm/xscale/ixp425/if_npereg.h 331722 2018-03-29 02:50:57Z eadler $
*/
/*
Modified: trunk/sys/arm/xscale/ixp425/ixdp425_pci.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixdp425_pci.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixdp425_pci.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixdp425_pci.c 229125 2011-12-31 15:53:34Z marius $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixdp425_pci.c 331722 2018-03-29 02:50:57Z eadler $");
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
Modified: trunk/sys/arm/xscale/ixp425/ixdp425reg.h
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixdp425reg.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixdp425reg.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -33,7 +33,7 @@
* SUCH DAMAGE.
*/
-/* $FreeBSD: stable/10/sys/arm/xscale/ixp425/ixdp425reg.h 164763 2006-11-30 06:30:01Z kevlo $ */
+/* $FreeBSD: stable/11/sys/arm/xscale/ixp425/ixdp425reg.h 331722 2018-03-29 02:50:57Z eadler $ */
#ifndef _IXDP425REG_H_
#define _IXDP425REG_H_
/* GPIOs */
Modified: trunk/sys/arm/xscale/ixp425/ixp425.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425.c 278613 2015-02-12 03:50:33Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425.c 331722 2018-03-29 02:50:57Z eadler $");
#include "opt_ddb.h"
@@ -474,7 +474,7 @@
};
int i;
- for (i = 0; i < sizeof hwvtrans / sizeof *hwvtrans; i++) {
+ for (i = 0; i < nitems(hwvtrans); i++) {
if (hwbase >= hwvtrans[i].hwbase &&
hwbase + size <= hwvtrans[i].hwbase + hwvtrans[i].size)
return &hwvtrans[i];
@@ -497,7 +497,7 @@
static struct resource *
ixp425_alloc_resource(device_t dev, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct ixp425_softc *sc = device_get_softc(dev);
const struct hwvtrans *vtrans;
@@ -534,7 +534,7 @@
(start - vtrans->hwbase);
if (bootverbose)
device_printf(child,
- "%s: assign 0x%lx:0x%lx%s\n",
+ "%s: assign 0x%jx:0x%jx%s\n",
__func__, start, end - start,
vtrans->isa4x ? " A4X" :
vtrans->isslow ? " SLOW" : "");
@@ -543,7 +543,7 @@
vtrans = gethwvtrans(start, end - start);
if (vtrans == NULL) {
/* likely means above table needs to be updated */
- device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n",
+ device_printf(child, "%s: no mapping for 0x%jx:0x%jx\n",
__func__, start, end - start);
return NULL;
}
@@ -550,7 +550,7 @@
rv = rman_reserve_resource(&sc->sc_mem_rman, start, end,
end - start, flags, child);
if (rv == NULL) {
- device_printf(child, "%s: cannot reserve 0x%lx:0x%lx\n",
+ device_printf(child, "%s: cannot reserve 0x%jx:0x%jx\n",
__func__, start, end - start);
return NULL;
}
@@ -587,7 +587,7 @@
if (type == SYS_RES_MEMORY) {
vtrans = gethwvtrans(rman_get_start(r), rman_get_size(r));
if (vtrans == NULL) { /* NB: should not happen */
- device_printf(child, "%s: no mapping for 0x%lx:0x%lx\n",
+ device_printf(child, "%s: no mapping for 0x%jx:0x%jx\n",
__func__, rman_get_start(r), rman_get_size(r));
return (ENOENT);
}
Modified: trunk/sys/arm/xscale/ixp425/ixp425_a4x_io.S
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_a4x_io.S 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_a4x_io.S 2020-03-06 16:44:57 UTC (rev 12394)
@@ -44,7 +44,7 @@
*/
#include <machine/asm.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_a4x_io.S 275767 2014-12-14 16:28:53Z andrew $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_a4x_io.S 275519 2014-12-05 19:04:08Z andrew $");
/*
* bus_space I/O functions with offset*4
Modified: trunk/sys/arm/xscale/ixp425/ixp425_a4x_space.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_a4x_space.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_a4x_space.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -44,7 +44,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_a4x_space.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_a4x_space.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/ixp425/ixp425_iic.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_iic.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_iic.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_iic.c 236987 2012-06-13 04:38:09Z imp $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_iic.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/ixp425/ixp425_intr.h
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_intr.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_intr.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_intr.h 186352 2008-12-20 03:26:09Z sam $
+ * $FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_intr.h 331722 2018-03-29 02:50:57Z eadler $
*
*/
@@ -47,7 +47,6 @@
#ifndef _LOCORE
#include <machine/armreg.h>
-#include <machine/cpufunc.h>
#include <arm/xscale/ixp425/ixp425reg.h>
Modified: trunk/sys/arm/xscale/ixp425/ixp425_mem.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_mem.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_mem.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -37,7 +37,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_mem.c 266406 2014-05-18 16:07:35Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_mem.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/ixp425/ixp425_npe.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_npe.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_npe.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -58,7 +58,7 @@
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_npe.c 249582 2013-04-17 11:40:10Z gabor $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_npe.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* Intel XScale Network Processing Engine (NPE) support.
@@ -93,8 +93,6 @@
#include <sys/firmware.h>
#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
#include <machine/resource.h>
#include <machine/intr.h>
#include <arm/xscale/ixp425/ixp425reg.h>
@@ -182,9 +180,8 @@
} IxNpeDlNpeMgrStateInfoBlock;
static int npe_debug = 0;
-SYSCTL_INT(_debug, OID_AUTO, ixp425npe, CTLFLAG_RW, &npe_debug,
+SYSCTL_INT(_debug, OID_AUTO, ixp425npe, CTLFLAG_RWTUN, &npe_debug,
0, "IXP4XX NPE debug msgs");
-TUNABLE_INT("debug.ixp425npe", &npe_debug);
#define DPRINTF(dev, fmt, ...) do { \
if (npe_debug) device_printf(dev, fmt, __VA_ARGS__); \
} while (0)
@@ -509,7 +506,7 @@
/*
* If download was successful, store image Id in list of
- * currently loaded images. If a critical error occured
+ * currently loaded images. If a critical error occurred
* during download, record that the NPE has an invalid image
*/
mtx_lock(&sc->sc_mtx);
@@ -866,7 +863,7 @@
while (npe_checkbits(sc,
IX_NPEDL_REG_OFFSET_STAT, IX_NPEDL_MASK_STAT_IFNE)) {
/*
- * Step execution of the NPE intruction to read inFIFO using
+ * Step execution of the NPE instruction to read inFIFO using
* the Debug Executing Context stack.
*/
error = npe_cpu_step(sc, IX_NPEDL_INSTR_RD_FIFO, 0, 0);
@@ -1309,7 +1306,7 @@
((regVal & IX_NPEDL_MASK_IMMED_INSTR_COPROC_DATA) <<
IX_NPEDL_DISPLACE_IMMED_INSTR_COPROC_DATA);
- /* step execution of NPE intruction using Debug ECS */
+ /* step execution of NPE instruction using Debug ECS */
error = npe_cpu_step(sc, npeInstruction,
ctxtNum, IX_NPEDL_WR_INSTR_LDUR);
}
Modified: trunk/sys/arm/xscale/ixp425/ixp425_npereg.h
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_npereg.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_npereg.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -27,7 +27,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_npereg.h 236987 2012-06-13 04:38:09Z imp $
+ * $FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_npereg.h 331722 2018-03-29 02:50:57Z eadler $
*/
/*-
@@ -126,7 +126,7 @@
/*
* Reset value for Mailbox (MBST) register
- * NOTE that if used, it should be complemented with an NPE intruction
+ * NOTE that if used, it should be complemented with an NPE instruction
* to clear the Mailbox at the NPE side as well
*/
#define IX_NPEDL_REG_RESET_MBST 0x0000F0F0
Modified: trunk/sys/arm/xscale/ixp425/ixp425_npevar.h
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_npevar.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_npevar.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -22,7 +22,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_npevar.h 186420 2008-12-23 04:51:46Z sam $
+ * $FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_npevar.h 331722 2018-03-29 02:50:57Z eadler $
*/
#ifndef _IXP425_NPEVAR_H_
Modified: trunk/sys/arm/xscale/ixp425/ixp425_pci.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_pci.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_pci.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_pci.c 278613 2015-02-12 03:50:33Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_pci.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -137,14 +137,6 @@
NULL, NULL, &sc->sc_dmat))
panic("couldn't create the PCI dma tag !");
/*
- * The PCI bus can only address 64MB. However, due to the way our
- * implementation of busdma works, busdma can't tell if a device
- * is a PCI device or not. So defaults to the PCI dma tag, which
- * restrict the DMA'able memory to the first 64MB, and explicitely
- * create less restrictive tags for non-PCI devices.
- */
- arm_root_dma_tag = sc->sc_dmat;
- /*
* Initialize the bus space tags.
*/
ixp425_io_bs_init(&sc->sc_pci_iot, sc);
@@ -278,7 +270,7 @@
static struct resource *
ixppcib_alloc_resource(device_t bus, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct ixppcib_softc *sc = device_get_softc(bus);
struct rman *rmanp;
@@ -321,9 +313,12 @@
ixppcib_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *r)
{
-
struct ixppcib_softc *sc = device_get_softc(bus);
+ int error;
+ error = rman_activate_resource(r);
+ if (error)
+ return (error);
switch (type) {
case SYS_RES_IOPORT:
rman_set_bustag(r, &sc->sc_pci_iot);
@@ -336,7 +331,7 @@
break;
}
- return (rman_activate_resource(r));
+ return (0);
}
static int
@@ -359,6 +354,14 @@
return (ENXIO);
}
+static bus_dma_tag_t
+ixppcib_get_dma_tag(device_t bus, device_t child)
+{
+ struct ixppcib_softc *sc = device_get_softc(bus);
+
+ return (sc->sc_dmat);
+}
+
static void
ixppcib_conf_setup(struct ixppcib_softc *sc, int bus, int slot, int func,
int reg)
@@ -457,7 +460,7 @@
DEVMETHOD(bus_activate_resource, ixppcib_activate_resource),
DEVMETHOD(bus_deactivate_resource, ixppcib_deactivate_resource),
DEVMETHOD(bus_release_resource, ixppcib_release_resource),
- /* DEVMETHOD(bus_get_dma_tag, ixppcib_get_dma_tag), */
+ DEVMETHOD(bus_get_dma_tag, ixppcib_get_dma_tag),
/* pcib interface */
DEVMETHOD(pcib_maxslots, ixppcib_maxslots),
Modified: trunk/sys/arm/xscale/ixp425/ixp425_pci_asm.S
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_pci_asm.S 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_pci_asm.S 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_pci_asm.S 275767 2014-12-14 16:28:53Z andrew $
+ * $FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_pci_asm.S 275519 2014-12-05 19:04:08Z andrew $
*
*/
Modified: trunk/sys/arm/xscale/ixp425/ixp425_pci_space.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_pci_space.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_pci_space.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_pci_space.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_pci_space.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* bus_space PCI functions for ixp425
Modified: trunk/sys/arm/xscale/ixp425/ixp425_qmgr.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_qmgr.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_qmgr.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -58,7 +58,7 @@
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_qmgr.c 236987 2012-06-13 04:38:09Z imp $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_qmgr.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* Intel XScale Queue Manager support.
@@ -85,8 +85,6 @@
#include <sys/sysctl.h>
#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
#include <machine/resource.h>
#include <machine/intr.h>
#include <arm/xscale/ixp425/ixp425reg.h>
@@ -160,10 +158,9 @@
uint32_t aqmFreeSramAddress; /* SRAM free space */
};
-static int qmgr_debug = 0;
-SYSCTL_INT(_debug, OID_AUTO, qmgr, CTLFLAG_RW, &qmgr_debug,
+static int qmgr_debug;
+SYSCTL_INT(_debug, OID_AUTO, qmgr, CTLFLAG_RWTUN, &qmgr_debug,
0, "IXP4XX Q-Manager debug msgs");
-TUNABLE_INT("debug.qmgr", &qmgr_debug);
#define DPRINTF(dev, fmt, ...) do { \
if (qmgr_debug) printf(fmt, __VA_ARGS__); \
} while (0)
@@ -357,7 +354,7 @@
if (cb == NULL) {
/* Reset to dummy callback */
qi->cb = dummyCallback;
- qi->cbarg = 0;
+ qi->cbarg = NULL;
} else {
qi->cb = cb;
qi->cbarg = cbarg;
@@ -423,7 +420,7 @@
return ENOSPC;
}
/*
- * No overflow occured : someone is draining the queue
+ * No overflow occurred : someone is draining the queue
* and the current counter needs to be
* updated from the current number of entries in the queue
*/
Modified: trunk/sys/arm/xscale/ixp425/ixp425_qmgr.h
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_qmgr.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_qmgr.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -27,7 +27,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
- * $FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_qmgr.h 236987 2012-06-13 04:38:09Z imp $
+ * $FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_qmgr.h 331722 2018-03-29 02:50:57Z eadler $
*/
/*-
Modified: trunk/sys/arm/xscale/ixp425/ixp425_space.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_space.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_space.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_space.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_space.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* bus_space I/O functions for ixp425
Modified: trunk/sys/arm/xscale/ixp425/ixp425_timer.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_timer.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_timer.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_timer.c 278613 2015-02-12 03:50:33Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_timer.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -50,7 +50,6 @@
#include <machine/armreg.h>
#include <machine/bus.h>
#include <machine/cpu.h>
-#include <machine/cpufunc.h>
#include <machine/frame.h>
#include <machine/resource.h>
#include <machine/intr.h>
Modified: trunk/sys/arm/xscale/ixp425/ixp425_wdog.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425_wdog.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425_wdog.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -23,7 +23,7 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425_wdog.c 259329 2013-12-13 20:43:11Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425_wdog.c 331722 2018-03-29 02:50:57Z eadler $");
/*
* IXP4XX Watchdog Timer Support.
@@ -39,8 +39,6 @@
#include <sys/watchdog.h>
#include <machine/bus.h>
-#include <machine/cpu.h>
-#include <machine/cpufunc.h>
#include <machine/resource.h>
#include <machine/intr.h>
Modified: trunk/sys/arm/xscale/ixp425/ixp425reg.h
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425reg.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425reg.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -32,7 +32,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425reg.h 261455 2014-02-04 03:36:42Z eadler $
+ * $FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425reg.h 331722 2018-03-29 02:50:57Z eadler $
*
*/
Modified: trunk/sys/arm/xscale/ixp425/ixp425var.h
===================================================================
--- trunk/sys/arm/xscale/ixp425/ixp425var.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/ixp425var.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -33,7 +33,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * $FreeBSD: stable/10/sys/arm/xscale/ixp425/ixp425var.h 229125 2011-12-31 15:53:34Z marius $
+ * $FreeBSD: stable/11/sys/arm/xscale/ixp425/ixp425var.h 331722 2018-03-29 02:50:57Z eadler $
*
*/
Modified: trunk/sys/arm/xscale/ixp425/std.avila
===================================================================
--- trunk/sys/arm/xscale/ixp425/std.avila 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/std.avila 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,4 +1,4 @@
-#$FreeBSD: stable/10/sys/arm/xscale/ixp425/std.avila 266110 2014-05-15 02:41:23Z ian $
+#$FreeBSD: stable/11/sys/arm/xscale/ixp425/std.avila 292591 2015-12-22 09:08:21Z andrew $
#
# Gateworks GW23XX board configuration
@@ -13,7 +13,6 @@
# be remapped away from 0.
#
options PHYSADDR=0x00000000
-options KERNPHYSADDR=0x00200000
makeoptions KERNPHYSADDR=0x00200000
options KERNVIRTADDR=0xc0200000 # Used in ldscript.arm
makeoptions KERNVIRTADDR=0xc0200000
Modified: trunk/sys/arm/xscale/ixp425/std.ixp425
===================================================================
--- trunk/sys/arm/xscale/ixp425/std.ixp425 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/std.ixp425 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,5 +1,5 @@
#XScale IXP425 generic configuration
-#$FreeBSD: stable/10/sys/arm/xscale/ixp425/std.ixp425 239362 2012-08-18 05:48:19Z andrew $
+#$FreeBSD: stable/11/sys/arm/xscale/ixp425/std.ixp425 239362 2012-08-18 05:48:19Z andrew $
files "../xscale/ixp425/files.ixp425"
include "../xscale/std.xscale-be"
cpu CPU_XSCALE_IXP425
Modified: trunk/sys/arm/xscale/ixp425/std.ixp435
===================================================================
--- trunk/sys/arm/xscale/ixp425/std.ixp435 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/std.ixp435 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,5 +1,5 @@
#XScale IXP435 generic configuration
-#$FreeBSD: stable/10/sys/arm/xscale/ixp425/std.ixp435 239362 2012-08-18 05:48:19Z andrew $
+#$FreeBSD: stable/11/sys/arm/xscale/ixp425/std.ixp435 239362 2012-08-18 05:48:19Z andrew $
files "../xscale/ixp425/files.ixp425"
include "../xscale/std.xscale-be"
Modified: trunk/sys/arm/xscale/ixp425/uart_bus_ixp425.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/uart_bus_ixp425.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/uart_bus_ixp425.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/uart_bus_ixp425.c 194668 2009-06-22 22:46:37Z sam $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/uart_bus_ixp425.c 340145 2018-11-04 23:28:56Z mmacy $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -79,5 +79,5 @@
if (bootverbose)
device_printf(dev, "rclk %u\n", rclk);
- return uart_bus_probe(dev, 0, rclk, 0, 0);
+ return uart_bus_probe(dev, 0, 0, rclk, 0, 0, 0);
}
Modified: trunk/sys/arm/xscale/ixp425/uart_cpu_ixp425.c
===================================================================
--- trunk/sys/arm/xscale/ixp425/uart_cpu_ixp425.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/ixp425/uart_cpu_ixp425.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/ixp425/uart_cpu_ixp425.c 170109 2007-05-29 18:10:42Z jhay $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/ixp425/uart_cpu_ixp425.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/pxa/files.pxa
===================================================================
--- trunk/sys/arm/xscale/pxa/files.pxa 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/files.pxa 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,8 +1,5 @@
-# $FreeBSD: stable/10/sys/arm/xscale/pxa/files.pxa 266311 2014-05-17 13:53:38Z ian $
+# $FreeBSD: stable/11/sys/arm/xscale/pxa/files.pxa 291133 2015-11-21 15:30:08Z andrew $
-arm/arm/bus_space_generic.c standard
-arm/arm/cpufunc_asm_xscale.S standard
-
arm/xscale/pxa/pxa_gpio.c standard
arm/xscale/pxa/pxa_icu.c standard
arm/xscale/pxa/pxa_machdep.c standard
Modified: trunk/sys/arm/xscale/pxa/if_smc_smi.c
===================================================================
--- trunk/sys/arm/xscale/pxa/if_smc_smi.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/if_smc_smi.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/if_smc_smi.c 259342 2013-12-13 22:08:31Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/if_smc_smi.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/bus.h>
Modified: trunk/sys/arm/xscale/pxa/pxa_gpio.c
===================================================================
--- trunk/sys/arm/xscale/pxa/pxa_gpio.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxa_gpio.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/pxa_gpio.c 179595 2008-06-06 05:08:09Z benno $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/pxa_gpio.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -332,7 +332,7 @@
}
int
-pxa_gpio_get_next_irq()
+pxa_gpio_get_next_irq(void)
{
struct pxa_gpio_softc *sc;
int gpio;
Modified: trunk/sys/arm/xscale/pxa/pxa_icu.c
===================================================================
--- trunk/sys/arm/xscale/pxa/pxa_icu.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxa_icu.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/pxa_icu.c 278613 2015-02-12 03:50:33Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/pxa_icu.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -172,7 +172,7 @@
}
uint32_t
-pxa_icu_get_icip()
+pxa_icu_get_icip(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
@@ -188,7 +188,7 @@
}
uint32_t
-pxa_icu_get_icfp()
+pxa_icu_get_icfp(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
@@ -204,7 +204,7 @@
}
uint32_t
-pxa_icu_get_icmr()
+pxa_icu_get_icmr(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
@@ -220,7 +220,7 @@
}
uint32_t
-pxa_icu_get_iclr()
+pxa_icu_get_iclr(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
@@ -236,7 +236,7 @@
}
uint32_t
-pxa_icu_get_icpr()
+pxa_icu_get_icpr(void)
{
return (bus_space_read_4(pxa_icu_softc->pi_bst,
@@ -244,7 +244,7 @@
}
void
-pxa_icu_idle_enable()
+pxa_icu_idle_enable(void)
{
bus_space_write_4(pxa_icu_softc->pi_bst,
@@ -252,7 +252,7 @@
}
void
-pxa_icu_idle_disable()
+pxa_icu_idle_disable(void)
{
bus_space_write_4(pxa_icu_softc->pi_bst,
Modified: trunk/sys/arm/xscale/pxa/pxa_machdep.c
===================================================================
--- trunk/sys/arm/xscale/pxa/pxa_machdep.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxa_machdep.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -39,7 +39,7 @@
*
* machdep.c
*
- * Machine dependant functions for kernel setup
+ * Machine dependent functions for kernel setup
*
* This file needs a lot of work.
*
@@ -47,9 +47,10 @@
*/
#include "opt_ddb.h"
+#include "opt_kstack_pages.h"
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/pxa_machdep.c 266386 2014-05-18 00:32:35Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/pxa_machdep.c 331722 2018-03-29 02:50:57Z eadler $");
#define _ARM32_BUS_DMA_PRIVATE
#include <sys/param.h>
@@ -73,6 +74,7 @@
#include <sys/exec.h>
#include <sys/kdb.h>
#include <sys/msgbuf.h>
+#include <sys/devmap.h>
#include <machine/reg.h>
#include <machine/cpu.h>
@@ -81,7 +83,6 @@
#include <vm/vm_object.h>
#include <vm/vm_page.h>
#include <vm/vm_map.h>
-#include <machine/devmap.h>
#include <machine/vmparam.h>
#include <machine/pcb.h>
#include <machine/undefined.h>
@@ -120,7 +121,7 @@
uint32_t *, uint32_t *);
/* Static device mappings. */
-static const struct arm_devmap_entry pxa_devmap[] = {
+static const struct devmap_entry pxa_devmap[] = {
/*
* Map the on-board devices up into the KVA region so we don't muck
* up user-space.
@@ -129,10 +130,8 @@
PXA2X0_PERIPH_START + PXA2X0_PERIPH_OFFSET,
PXA2X0_PERIPH_START,
PXA250_PERIPH_END - PXA2X0_PERIPH_START,
- VM_PROT_READ|VM_PROT_WRITE,
- PTE_DEVICE,
},
- { 0, 0, 0, 0, 0, }
+ { 0, 0, 0, }
};
#define SDRAM_START 0xa0000000
@@ -206,7 +205,7 @@
valloc_pages(irqstack, IRQ_STACK_SIZE);
valloc_pages(abtstack, ABT_STACK_SIZE);
valloc_pages(undstack, UND_STACK_SIZE);
- valloc_pages(kernelstack, KSTACK_PAGES);
+ valloc_pages(kernelstack, kstack_pages);
alloc_pages(minidataclean.pv_pa, 1);
valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
/*
@@ -224,8 +223,8 @@
l1pagetable = kernel_l1pt.pv_va;
/* Map the L2 pages tables in the L1 page table */
- pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
- &kernel_pt_table[KERNEL_PT_SYS]);
+ pmap_link_l2pt(l1pagetable, rounddown2(ARM_VECTORS_HIGH, 0x00100000),
+ &kernel_pt_table[KERNEL_PT_SYS]);
#if 0 /* XXXBJR: What is this? Don't know if there's an analogue. */
pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
&kernel_pt_table[KERNEL_PT_IOPXS]);
@@ -237,11 +236,10 @@
pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
- (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
- VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
- afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) &
- ~(L1_S_SIZE - 1));
+ rounddown2(((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE, L1_S_SIZE),
+ VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
+ freemem_after = rounddown2((int)lastaddr + PAGE_SIZE, PAGE_SIZE);
+ afterkern = round_page(rounddown2((vm_offset_t)lastaddr + L1_S_SIZE, L1_S_SIZE));
for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
&kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
@@ -257,7 +255,7 @@
/* Map the vector page. */
pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
- arm_devmap_bootstrap(l1pagetable, pxa_devmap);
+ devmap_bootstrap(l1pagetable, pxa_devmap);
/*
* Give the XScale global cache clean code an appropriately
@@ -267,7 +265,7 @@
xscale_cache_clean_addr = 0xff000000U;
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
- setttb(kernel_l1pt.pv_pa);
+ cpu_setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
@@ -284,7 +282,7 @@
/*
* We must now clean the cache again....
* Cleaning may be done by reading new data to displace any
- * dirty data in the cache. This will have happened in setttb()
+ * dirty data in the cache. This will have happened in cpu_setttb()
* but since we are boot strapping the addresses used for the read
* may have just been remapped and thus the cache could be out
* of sync. A re-clean after the switch will cure this.
@@ -292,7 +290,7 @@
* this problem will not occur after initarm().
*/
cpu_idcache_wbinv_all();
- cpu_setup("");
+ cpu_setup();
/*
* Sort out bus_space for on-board devices.
@@ -316,7 +314,7 @@
arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
- vm_max_kernel_address = 0xd0000000;
+ vm_max_kernel_address = 0xe0000000;
pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
msgbufp = (void*)msgbufpv.pv_va;
msgbufinit(msgbufp, msgbufsize);
@@ -336,6 +334,10 @@
if (memsize[j] > 0)
arm_physmem_hardware_region(memstart[j], memsize[j]);
}
+ arm_physmem_exclude_region(freemem_pt, abp->abp_physaddr -
+ freemem_pt, EXFLAG_NOALLOC);
+ arm_physmem_exclude_region(freemempos, abp->abp_physaddr - 0x100000 -
+ freemempos, EXFLAG_NOALLOC);
arm_physmem_exclude_region(abp->abp_physaddr,
virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
arm_physmem_init_kernel_globals();
Modified: trunk/sys/arm/xscale/pxa/pxa_obio.c
===================================================================
--- trunk/sys/arm/xscale/pxa/pxa_obio.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxa_obio.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/pxa_obio.c 265999 2014-05-14 01:35:43Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/pxa_obio.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -51,7 +51,7 @@
static struct resource_list * pxa_get_resource_list(device_t, device_t);
static struct resource * pxa_alloc_resource(device_t, device_t, int,
- int *, u_long, u_long, u_long, u_int);
+ int *, rman_res_t, rman_res_t, rman_res_t, u_int);
static int pxa_release_resource(device_t, device_t, int,
int, struct resource *);
static int pxa_activate_resource(device_t, device_t,
@@ -58,7 +58,7 @@
int, int, struct resource *);
static struct resource * pxa_alloc_gpio_irq(device_t, device_t, int,
- int *, u_long, u_long, u_long, u_int);
+ int *, rman_res_t, rman_res_t, rman_res_t, u_int);
struct obio_device {
const char *od_name;
@@ -160,9 +160,9 @@
retval += bus_print_child_header(dev, child);
retval += resource_list_print_type(&od->od_resources, "at mem",
- SYS_RES_MEMORY, "0x%08lx");
+ SYS_RES_MEMORY, "0x%08jx");
retval += resource_list_print_type(&od->od_resources, "irq",
- SYS_RES_IRQ, "%ld");
+ SYS_RES_IRQ, "%jd");
retval += bus_print_child_footer(dev, child);
@@ -225,7 +225,7 @@
static struct resource *
pxa_alloc_resource(device_t dev, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct obio_softc *sc;
struct obio_device *od;
@@ -352,7 +352,7 @@
static struct resource *
pxa_alloc_gpio_irq(device_t dev, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct obio_softc *sc;
struct obio_device *od;
@@ -391,7 +391,7 @@
}
if (bootverbose)
- device_printf(dev, "lazy allocation of irq %ld for %s\n",
+ device_printf(dev, "lazy allocation of irq %jd for %s\n",
start, device_get_nameunit(child));
return (rv);
Modified: trunk/sys/arm/xscale/pxa/pxa_smi.c
===================================================================
--- trunk/sys/arm/xscale/pxa/pxa_smi.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxa_smi.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/pxa_smi.c 241885 2012-10-22 13:06:09Z eadler $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/pxa_smi.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -71,7 +71,7 @@
static int pxa_smi_read_ivar(device_t, device_t, int, uintptr_t *);
static struct resource * pxa_smi_alloc_resource(device_t, device_t,
- int, int *, u_long, u_long, u_long, u_int);
+ int, int *, rman_res_t, rman_res_t, rman_res_t, u_int);
static int pxa_smi_release_resource(device_t, device_t,
int, int, struct resource *);
static int pxa_smi_activate_resource(device_t, device_t,
@@ -145,9 +145,9 @@
retval += bus_print_child_header(dev, child);
retval += resource_list_print_type(&smid->smid_resources, "at mem",
- SYS_RES_MEMORY, "%#lx");
+ SYS_RES_MEMORY, "%#jx");
retval += resource_list_print_type(&smid->smid_resources, "irq",
- SYS_RES_IRQ, "%ld");
+ SYS_RES_IRQ, "%jd");
retval += bus_print_child_footer(dev, child);
@@ -177,7 +177,7 @@
static struct resource *
pxa_smi_alloc_resource(device_t dev, device_t child, int type, int *rid,
- u_long start, u_long end, u_long count, u_int flags)
+ rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct pxa_smi_softc *sc;
struct smi_ivars *smid;
Modified: trunk/sys/arm/xscale/pxa/pxa_space.c
===================================================================
--- trunk/sys/arm/xscale/pxa/pxa_space.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxa_space.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -41,7 +41,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/pxa_space.c 278727 2015-02-13 22:32:02Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/pxa_space.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -177,7 +177,7 @@
bus_space_tag_t obio_tag = NULL;
void
-pxa_obio_tag_init()
+pxa_obio_tag_init(void)
{
bcopy(&_base_tag, &_obio_tag, sizeof(struct bus_space));
Modified: trunk/sys/arm/xscale/pxa/pxa_timer.c
===================================================================
--- trunk/sys/arm/xscale/pxa/pxa_timer.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxa_timer.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/pxa_timer.c 278613 2015-02-12 03:50:33Z ian $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/pxa_timer.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -236,7 +236,7 @@
}
uint32_t
-pxa_timer_get_oscr()
+pxa_timer_get_oscr(void)
{
return (bus_space_read_4(timer_softc->pt_bst,
@@ -252,7 +252,7 @@
}
uint32_t
-pxa_timer_get_ossr()
+pxa_timer_get_ossr(void)
{
return (bus_space_read_4(timer_softc->pt_bst,
@@ -268,7 +268,7 @@
}
void
-pxa_timer_watchdog_enable()
+pxa_timer_watchdog_enable(void)
{
bus_space_write_4(timer_softc->pt_bst,
@@ -276,7 +276,7 @@
}
void
-pxa_timer_watchdog_disable()
+pxa_timer_watchdog_disable(void)
{
bus_space_write_4(timer_softc->pt_bst,
Modified: trunk/sys/arm/xscale/pxa/pxareg.h
===================================================================
--- trunk/sys/arm/xscale/pxa/pxareg.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxareg.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -33,7 +33,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: stable/10/sys/arm/xscale/pxa/pxareg.h 266311 2014-05-17 13:53:38Z ian $
+ * $FreeBSD: stable/11/sys/arm/xscale/pxa/pxareg.h 331722 2018-03-29 02:50:57Z eadler $
*/
Modified: trunk/sys/arm/xscale/pxa/pxavar.h
===================================================================
--- trunk/sys/arm/xscale/pxa/pxavar.h 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/pxavar.h 2020-03-06 16:44:57 UTC (rev 12394)
@@ -35,7 +35,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- * $FreeBSD: stable/10/sys/arm/xscale/pxa/pxavar.h 179595 2008-06-06 05:08:09Z benno $
+ * $FreeBSD: stable/11/sys/arm/xscale/pxa/pxavar.h 331722 2018-03-29 02:50:57Z eadler $
*
*/
Modified: trunk/sys/arm/xscale/pxa/std.pxa
===================================================================
--- trunk/sys/arm/xscale/pxa/std.pxa 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/std.pxa 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,5 +1,5 @@
# XScale PXA generic configuration
-# $FreeBSD: stable/10/sys/arm/xscale/pxa/std.pxa 266175 2014-05-15 19:09:31Z ian $
+# $FreeBSD: stable/11/sys/arm/xscale/pxa/std.pxa 261642 2014-02-08 22:21:38Z ian $
files "../xscale/pxa/files.pxa"
include "../xscale/std.xscale"
makeoptions KERNPHYSADDR=0xa0200000
Modified: trunk/sys/arm/xscale/pxa/uart_bus_pxa.c
===================================================================
--- trunk/sys/arm/xscale/pxa/uart_bus_pxa.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/uart_bus_pxa.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/uart_bus_pxa.c 234004 2012-04-07 23:47:08Z stas $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/uart_bus_pxa.c 340145 2018-11-04 23:28:56Z mmacy $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -98,7 +98,7 @@
sc = device_get_softc(dev);
sc->sc_class = &uart_ns8250_class;
- return(uart_bus_probe(dev, 2, PXA2X0_COM_FREQ, 0, 0));
+ return(uart_bus_probe(dev, 2, 0, PXA2X0_COM_FREQ, 0, 0, 0));
}
DRIVER_MODULE(uart, pxa, uart_pxa_driver, uart_devclass, 0, 0);
Modified: trunk/sys/arm/xscale/pxa/uart_cpu_pxa.c
===================================================================
--- trunk/sys/arm/xscale/pxa/uart_cpu_pxa.c 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/pxa/uart_cpu_pxa.c 2020-03-06 16:44:57 UTC (rev 12394)
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__FBSDID("$FreeBSD: stable/10/sys/arm/xscale/pxa/uart_cpu_pxa.c 179595 2008-06-06 05:08:09Z benno $");
+__FBSDID("$FreeBSD: stable/11/sys/arm/xscale/pxa/uart_cpu_pxa.c 331722 2018-03-29 02:50:57Z eadler $");
#include <sys/param.h>
#include <sys/systm.h>
Modified: trunk/sys/arm/xscale/std.xscale
===================================================================
--- trunk/sys/arm/xscale/std.xscale 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/std.xscale 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,3 +1,3 @@
-# $FreeBSD: stable/10/sys/arm/xscale/std.xscale 239362 2012-08-18 05:48:19Z andrew $
+# $FreeBSD: stable/11/sys/arm/xscale/std.xscale 239362 2012-08-18 05:48:19Z andrew $
options ARM_CACHE_LOCK_ENABLE
options NO_EVENTTIMERS
Modified: trunk/sys/arm/xscale/std.xscale-be
===================================================================
--- trunk/sys/arm/xscale/std.xscale-be 2020-02-16 22:48:41 UTC (rev 12393)
+++ trunk/sys/arm/xscale/std.xscale-be 2020-03-06 16:44:57 UTC (rev 12394)
@@ -1,5 +1,5 @@
#Big-Endian XScale generic configuration
-#$FreeBSD: stable/10/sys/arm/xscale/std.xscale-be 239362 2012-08-18 05:48:19Z andrew $
+#$FreeBSD: stable/11/sys/arm/xscale/std.xscale-be 239362 2012-08-18 05:48:19Z andrew $
include "../xscale/std.xscale"
machine arm armeb
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