[Midnightbsd-cvs] [MidnightBSD/src] f6b6d3: fix ptr

[Lucas Holt]

  Branch: refs/heads/master
  Home:   https://github.com/MidnightBSD/src
  Commit: f6b6d3c33c661b1c2c72e6a74d16b372074744d7
      https://github.com/MidnightBSD/src/commit/f6b6d3c33c661b1c2c72e6a74d16b372074744d7
  Author: Lucas Holt <luke at foolishgames.com>
  Date:   2020-11-22 (Sun, 22 Nov 2020)

  Changed paths:
    M sys/dev/ocs_fc/ocs_device.c
    M sys/net80211/ieee80211_output.c

  Log Message:
  -----------
  fix ptr


  Commit: 94ebd711e35f9ed1d0f159229ec93ad256bec6be
      https://github.com/MidnightBSD/src/commit/94ebd711e35f9ed1d0f159229ec93ad256bec6be
  Author: Lucas Holt <luke at foolishgames.com>
  Date:   2020-11-22 (Sun, 22 Nov 2020)

  Changed paths:
    M sys/amd64/vmm/intel/vmx.c
    M sys/amd64/vmm/io/vlapic.c
    M sys/amd64/vmm/io/vlapic.h

  Log Message:
  -----------
  Untangle TPR shadowing and APIC virtualization.

This speeds up Windows guests tremendously.

The patch does:
  Add a new tuneable 'hw.vmm.vmx.use_tpr_shadowing' to disable TLP shadowing.
  Also add 'hw.vmm.vmx.cap.tpr_shadowing' to be able to query if TPR shadowing is used.

  Detach the initialization of TPR shadowing from the initialization of APIC virtualization.
  APIC virtualization still needs TPR shadowing, but not vice versa.
  Any CPU that supports APIC virtualization should also support TPR shadowing.

  When TPR shadowing is used, the APIC page of each vCPU is written to the VMCS_VIRTUAL_APIC field of the VMCS
  so that the CPU can write directly to the page without intercept.

  On vm exit, vlapic_update_ppr() is called to update the PPR.

Obtained from: FreeBSD


Compare: https://github.com/MidnightBSD/src/compare/874d84f08684...94ebd711e35f