Revision
9469 -
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[select for diffs]
Modified
Sun Mar 5 19:45:14 2017 UTC
(7 years, 2 months ago)
by
laffer1
Diff to
previous 9443
When handling an exception from the attempt from loading the faulting
context on return from the trap handler, re-enable the interrupts on
i386 and amd64.
Revision
9364 -
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[select for diffs]
Modified
Sat Mar 4 19:50:21 2017 UTC
(7 years, 2 months ago)
by
laffer1
Diff to
previous 9363
Correct the type for the literal used on the left side of the shift up
to 63 bit positions.
Do not fill the save area and do not set the saved bit in the xstate
bit vector for the state which is not marked as enabled in xsave_mask.
Revision
9340 -
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Modified
Sat Mar 4 16:11:07 2017 UTC
(7 years, 2 months ago)
by
laffer1
Diff to
previous 9339
Partially saved extended state must be handled always, i.e. for both
fpu-owned context, and for pcb-saved one. More, the XSAVE could do
partial save, same as XSAVEOPT, so qualifier for the handler should be
use_xsave and not use_xsaveopt.
Since xsave_area_desc is now needed regardless of the XSAVEOPT use,
remove the write-only use_xsaveopt variable.
Revision
9339 -
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[select for diffs]
Modified
Sat Mar 4 16:10:30 2017 UTC
(7 years, 2 months ago)
by
laffer1
Diff to
previous 9257
The check to ensure that xstate_bv always has XFEATURE_ENABLED_X87 and
XFEATURE_ENABLED_SSE bits set is not needed. CPU correctly handles
any bitmask which is subset of the enabled bits in %XCR0.
More, CPU instructions XSAVE and XSAVEOPT could write the mask without
e.g. XFEATURE_ENABLED_SSE, after the VZEROALL. The check prevents the
restoration of the otherwise valid FPU save area.
Obtained from: FreeBSD
Revision
8872 -
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Modified
Mon Sep 26 13:19:28 2016 UTC
(7 years, 7 months ago)
by
laffer1
Diff to
previous 8857
dont attempt to use clflush on the local APIC register window. Various CPUs exhibit bad behavior if this is done (Intel errata AAJ3
Revision
8091 -
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Modified
Thu Sep 15 22:47:28 2016 UTC
(7 years, 8 months ago)
by
laffer1
Diff to
previous 8088
page flag PGA_WRITEABLE is set and cleared exclusively by the pmap layer, but it is read directly by the MI VM layer.
Revision
8015 -
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Modified
Thu Sep 15 09:03:57 2016 UTC
(7 years, 8 months ago)
by
laffer1
Diff to
previous 7967
add fine grained pv chunk and list locking to the amd64 pmap, enabling concurrent execution of several functions.
Revision
7953 -
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Modified
Wed Sep 14 22:23:25 2016 UTC
(7 years, 8 months ago)
by
laffer1
Diff to
previous 7952
Add a clts() wrapper around the 'clts' instruction to <machine/cpufunc.h>
on x86 and use that to implement stop_emulating() in the fpu/npx code.
Reimplement start_emulating() in the non-XEN case by using load_cr0() and
rcr0() instead of the 'lmsw' and 'smsw' instructions. Intel explicitly
discourages the use of 'lmsw' and 'smsw' on 80386 and later processors in
the description of these instructions in Volume 2 of the ADM.
Obtained from: FreeBSD svn rev 239914
Revision
7943 -
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Modified
Wed Sep 14 21:53:46 2016 UTC
(7 years, 8 months ago)
by
laffer1
Diff to
previous 7942
Partially revert r217515 so that the mem_range_softc variable is always
present on x86 kernels. This fixes the build of kernels that include
'device acpi' but do not include 'device mem'.
Obtained from: FreeBSD
Revision
7942 -
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Modified
Wed Sep 14 21:49:46 2016 UTC
(7 years, 8 months ago)
by
laffer1
Diff to
previous 7910
Several fixes to the amd64 disassembler:
- Decode the 'xsave', 'xrstor', 'xsaveopt', 'xgetbv', 'xsetbv', and
'rdtscp' instructions.
- Add generic support for opcodes that are escape bytes used for
multi-byte opcodes (such as the 0x0f prefix). Use this to replace
the hard-coded 0x0f special case and add support for three-byte
opcodes that use the 0x0f38 prefix.
- Decode all Intel VMX instructions. invept and invvpid in particular are
three-byte opcodes that use the 0x0f38 escape prefix.
- Rework how the special 'SDEP' size flag works such that the default
instruction name (i_name) is the instruction when the data size
prefix (0x66) is not specified, and the alternate name in i_extra is
used when the prefix is included.
- Add a new 'ADEP' size flag similar to 'SDEP' except that it chooses
between i_name and i_extra based on the address size prefix (0x67).
Use this to fix the decoding for jrcxz vs jecxz which is determined
by the address size prefix, not the operand size prefix. Also, jcxz
is not possible in 64-bit mode, but jrcxz is the default instruction
for that opcode.
- Add support for handling instructions that have a mandatory 'rep'
prefix (this means not outputting the 'repe ' prefix until determining
if it is used as part of an opcode). Make 'pause' less of a special
case this way.
- Decode 'cmpxchg16b' and 'cdqe' which are variants of other instructions
but with a REX.W prefix.
Obtained from: FreeBSD
Revision
7896 -
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Modified
Wed Sep 14 18:53:28 2016 UTC
(7 years, 8 months ago)
by
laffer1
Diff to
previous 7895
Add a hackish debugging facility to provide a bit of information about
reason for generated trap. The dump of basic signal information and 8
bytes of the faulting instruction are printed on the controlling
terminal of the process, if the machdep.uprintf_signal syscal is
enabled.
Revision
7895 -
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[select for diffs]
Modified
Wed Sep 14 18:52:10 2016 UTC
(7 years, 8 months ago)
by
laffer1
Diff to
previous 7797
Real hardware, as opposed to QEMU, does not allow to have a call gate
in long mode which transfers control to 32bit code segment. Unbreak
the lcall $7,$0 implementation on amd64 by putting the 64bit user code
segment' selector into call gate, and execute the 64bit trampoline
which converts the return frame into 32bit format and switches back to
32bit mode for executing int $0x80 trampoline.
Revision
7469 -
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[select for diffs]
Modified
Thu Mar 17 12:46:04 2016 UTC
(8 years, 2 months ago)
by
laffer1
Diff to
previous 7447
Incorrect argument validation in sysarch(2)
A special combination of sysarch(2) arguments, specify a request to
uninstall a set of descriptors from the LDT. The start descriptor
is cleared and the number of descriptors are provided. Due to invalid
use of a signed intermediate value in the bounds checking during argument
validity verification, unbound zero'ing of the process LDT and adjacent
memory can be initiated from usermode.
Obtained from: FreeBSD.
Revision
7447 -
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Modified
Mon Feb 22 13:05:11 2016 UTC
(8 years, 2 months ago)
by
laffer1
Diff to
previous 7441
Introduce pipe2 to linux emulation layer.
Based on an earlier FreeBSD patch by Jung-uk Kim. (jkim@freebsd.org)
We don't have the dtrace changes in this code like freebsd 9.2 has.
Revision
7441 -
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Modified
Wed Feb 3 05:38:00 2016 UTC
(8 years, 3 months ago)
by
laffer1
Diff to
previous 7425
A programming error in the Linux compatibility layer could cause the
issetugid(2) system call to return incorrect information.
Revision
7271 -
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Modified
Tue Aug 25 21:48:04 2015 UTC
(8 years, 8 months ago)
by
laffer1
Diff to
previous 7243
fix a security issue on amd64 where the GS segment CPU register can be changed via userland value in kernel mode by using an IRET with #SS or #NP exceptions.
Revision
7008 -
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[select for diffs]
Modified
Fri May 22 22:50:06 2015 UTC
(8 years, 11 months ago)
by
laffer1
Diff to
previous 6835
Disable ACPI and P4TCC throttling by default. Power consumption is not the intended purpose of P4TCC and it is rarely good at doing so.
Revision
5076 -
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Modified
Sat Jul 21 15:17:36 2012 UTC
(11 years, 9 months ago)
by
laffer1
Diff to
previous 4916
This commit was generated by cvs2svn to compensate for changes in r5075,
which included commits to RCS files with non-trunk default branches.
Revision
4776 -
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[select for diffs]
Modified
Sat Mar 31 17:05:11 2012 UTC
(12 years, 1 month ago)
by
laffer1
Diff to
previous 4750
Bring in several improvements from OpenSolaris for dtrace, zfs, etc.
Add kernel code for kernel lock manager for nfs, vfs and vm improvements and general compatibility with the recent network stack changes.
Bring in several improvements and bugfixes from FreeBSD 7.1
Tag $MidnightBSD$
Revision
4641 -
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Modified
Thu Feb 16 21:19:00 2012 UTC
(12 years, 3 months ago)
by
laffer1
Diff to
previous 4639
revert previous change and make 4BSD the default sechuler on amd64. This is temporary while we investigate some stability issues
Revision
4543 -
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Modified
Sat Jan 7 18:37:57 2012 UTC
(12 years, 4 months ago)
by
laffer1
Diff to
previous 4509
From now on, CURRENT will have witness and invariants enabled by default. This slows down performance, but it makes it much easier to catch kernel problems.
Upon creating a release branch, these options should be removed.
Revision
4508 -
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Modified
Sat Dec 31 16:59:05 2011 UTC
(12 years, 4 months ago)
by
laffer1
Diff to
previous 4488
Modify kernel elf routines to support ELF NOTES. Specificaly, handle 'MidnightBSD' and 'FreeBSD' notes for now.
This prepares us for binutils changes.
I have not yet modified the linuxolator elf note handling logic. This would be very useful to do.
Revision
4488 -
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Modified
Thu Dec 29 02:33:28 2011 UTC
(12 years, 4 months ago)
by
laffer1
Diff to
previous 4386
Regenerate syscall table.
Add flag MPSAFE to sysctl leaf nodes so they don't require GIANT lock. More work is necesary to make things MPSAFE but this could allow for some serious performance benefits.
move some of the legacy bsdi/4.4bsd lite 2 stuff into kern_xxx.c and port some freebsd 7 centric things over for sbuf.
Revision
4385 -
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Modified
Sun Nov 27 03:42:50 2011 UTC
(12 years, 5 months ago)
by
laffer1
Diff to
previous 4251
add memmove and initcpu hacks related to vm_guest/virutalization detection.
turn on the new mii stuff in the base kernel
Revision
4234 -
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Modified
Wed Oct 19 13:56:07 2011 UTC
(12 years, 6 months ago)
by
laffer1
Diff to
previous 4233
Introduce sysctls for exposing kernel features like PAE, AIO or freebsd 4,5,6 compatibility.
Fix a definition that I missed on a previous commit that was breaking sparc.
Revision
4233 -
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Modified
Tue Oct 18 21:17:06 2011 UTC
(12 years, 7 months ago)
by
laffer1
Diff to
previous 4231
Add BUS_BIND_INTR() method to the bus interface to bind an IRQ resource to a CPU.
bus_bind_intr is a wrapper routine for drivers to use. It is supported on all MidnightBSD architectures.
Obtained from: FreeBSD 7.1
Revision
4215 -
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Modified
Sat Oct 15 20:18:31 2011 UTC
(12 years, 7 months ago)
by
laffer1
Diff to
previous 4171
Introduce CPU Affinity in MidnightBSD.
The ULE scheduler is now default on i386 and amd64 architectures.
cpuset(1) allows the user to limit a process to a group of CPU cores to run on using new system calls.
32bit versions of the system calls were also added to support 32bit binaries running on amd64 boxes. libc's
symbol map was modified to include the cpuset* system calls to expose them to userland.
This is based on work by Jeff Roberson from FreeBSD 7.1.
Revision
4171 -
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Modified
Thu Sep 29 12:58:14 2011 UTC
(12 years, 7 months ago)
by
laffer1
Diff to
previous 4014
Modify generic kernel config to add stack(9) and prepare for ath(4) update.
Fix some formatting problems while here.
Revision
3623 -
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Modified
Sat Jan 22 19:55:16 2011 UTC
(13 years, 3 months ago)
by
laffer1
Diff to
previous 3611
Import it(4) and lm(4) for common Super I/O hardware sensors.
This is based on the 2007 Google Summer of Code project by Constantine A. Murenin and code from OpenBSD.
Revision
3598 -
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Modified
Tue Jan 4 14:23:53 2011 UTC
(13 years, 4 months ago)
by
laffer1
Diff to
previous 3524
Opteron rev E family of processor expose a bug where, in very rare
ocassions, memory barriers semantic is not honoured by the hardware
itself. As a result, some random breakage can happen in uninvestigable
ways (for further explanation see at the content of the commit itself).
As long as just a specific familly is bugged of an entire architecture
is broken, a complete fix-up is impratical without harming to some
extents the other correct cases.
Considering that (and considering the frequency of the bug exposure)
just print out a warning message if the affected machine is identified.
Pointed out by: Samy Al Bahra <sbahra at repnop dot org>
Obtained from: FreeBSD (revision 198868)
Revision
3524 -
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Modified
Mon Sep 27 22:20:09 2010 UTC
(13 years, 7 months ago)
by
laffer1
Diff to
previous 3426
Conditionally define MAXCPU the same for all kernels regardless of SMP or !SMP.
On i386 and amd64 define MAXCPU to 32 since they exist now. Most kernel structures are resized based on this value.
Revision
3426 -
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Modified
Sat Jul 3 16:43:27 2010 UTC
(13 years, 10 months ago)
by
laffer1
Diff to
previous 3423
Refactor the linux_mmap_common function to take individual arguments similar to FreeBSD. This is easier to read and similar to other kernel interfaces. This also makes it easier to fix the mmap offsets greater than 32 bits. We can deal with a 64 bit file offset now. This is based on a patch to FreeBSD by Christian Zander @ NVIDIA
Revision
3423 -
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Modified
Sat Jun 19 14:56:05 2010 UTC
(13 years, 11 months ago)
by
laffer1
Diff to
previous 3389
Do not require pos parameter to be zero in MAP_ANONYMOUS mmap requests
in Linux emulation layer. Linux seems to only require that pos is
page-aligned, but otherwise ignores it. Default FreeBSD mmap parameter
checking is too strict to allow some Linux binaries to run. tsMuxeR is
one example of such a binary.
Obtained from: kan@FreeBSD
Revision
3364 -
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Modified
Sat Mar 13 19:15:51 2010 UTC
(14 years, 2 months ago)
by
laffer1
Diff to
previous 3324
Update our cpu types and include a list of vendors of CPUs. This will be used with identcpu and kernel modules later to "detect" cpu vendors to enable/disable features.
Revision
3239 -
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[select for diffs]
Modified
Sun Jan 10 21:55:09 2010 UTC
(14 years, 4 months ago)
by
laffer1
Diff to
previous 2886
Enable options P1003_1B_SEMAPHORES # POSIX-style semaphores
This option is required by many modern applications including Firefox 3.5. We also need this to support libdispatch!
Enable on all three architectures.
Revision
2886 -
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Modified
Sat May 16 18:38:51 2009 UTC
(15 years ago)
by
laffer1
Diff to
previous 2465
add CPUID bits to ident phenom processor
There are several new CPUIDs to recognize AMD Extended Features, ECX 07FFh for Phenom processor.
According to [1], they are:
Bit 0: LAHF/SAHF
Bit 1: CMP
Bit 2: SVM (Secure Virtual Mode)
Bit 3: APIC
Bit 4: MOV CR8
*Bit 5: Advanced Bit Manipulation (LZCNT)
*Bit 6: SSE4A (EXTRQ, INSERTQ, MOVNTSS, MOVNTSD)
*Bit 7: Misalign SSE
Bit 8: 3DNow! (PREFETCH и PREFTECHW)
*Bit 9: OS Visible Workaround
*Bit 10: Instruction Based Sampling
* - missing bits in amd64/identcpu.c
[1]http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116.pdf
Based on patch by pluknet for FreeBSD
Revision
1675 -
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Modified
Fri Jun 27 16:28:38 2008 UTC
(15 years, 10 months ago)
by
laffer1
Diff to
previous 1662
Move AHC and AHD options so they are near the drivers.
Enable firmware(9).
Enable WEP and WPA in kernel.
Fix whitespace problem. For options entries use space and tab not double tab.
Revision
1662 -
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Modified
Wed Jun 25 20:17:31 2008 UTC
(15 years, 10 months ago)
by
laffer1
Diff to
previous 1607
Add cpufreq(4) and GEOM_LABEL aka GLABEL to GENERIC on i386 and amd64.
cpufreq works with powerd which is already enabled on systems without ACPI support for CPU frequency using several chipsets (intel). This may cause problems for some people which might require an install option for powerd. This needs testing.
glabel allows one to name disks and reference them in dev by that name instead of their normal designation like acd0 or ad0s2d. By adding this to generic, we can easily make a live cd that works on more types of CDROMs. FreeBSD is also moving in this direction for other reasons.
Until the latter can be tested on sparc64, I'll keep it out of generic. We don't support sun style labels right now anyway.
Revision
1606 -
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Modified
Sat May 17 05:36:05 2008 UTC
(16 years ago)
by
laffer1
Diff to
previous 1576
Syncronize the cpu detection code on i386 and amd64 with FreeBSD 6.2.
Add better SMP detection including multicore cpus. Detect features on newer processors and initialize them properly. Add support for some newer via c7 cpus.
Also make a subtle adjustment to tcp_syncache.c (unrelated)
Revision
583 -
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Modified
Fri Jan 12 23:33:32 2007 UTC
(17 years, 4 months ago)
by
laffer1
Diff to
previous 552
Throw out all the logical APIC ID stuff and just wire up the interrupts to individual CPUs using physical addressing and fixed delivery mode.
Revision
552 -
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Modified
Sun Jan 7 19:04:00 2007 UTC
(17 years, 4 months ago)
by
laffer1
Diff to
previous 543
Megacommit :)
This is a change in the way interrupt handling is done similar to the FreeBSD commit to RELENG_6_1 on March 10.
Revision
534 -
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[select for diffs]
Modified
Sun Jan 7 03:50:23 2007 UTC
(17 years, 4 months ago)
by
laffer1
Diff to
previous 176
Apply some patches from FreeBSD 6.1 Release for cpu detection, ioctl fixes, etc.
Change i386 GENERIC kernel to include VESA and raster support so that end users can easily switch to 800x600 and other video modes in the console. While the kernel size is larger, it makes more sense on a desktop.
Revision
46 -
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Modified
Fri Aug 4 17:10:41 2006 UTC
(17 years, 9 months ago)
by
laffer1
Diff to
previous 15
FreeBSD-SA6:13 and 14 were patched. The nis software and amd athlon fpu handling fixed. Changes to echo and pfctl are needed to fix compile bugs with changes related to cvs tags and macros.
Revision
6 -
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[select for diffs]
Modified
Sat Feb 25 02:38:42 2006 UTC
(18 years, 2 months ago)
by
laffer1
Diff to
previous 3
This commit was generated by cvs2svn to compensate for changes in r5, which
included commits to RCS files with non-trunk default branches.
Revision
3 -
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[select for diffs]
Added
Sat Feb 25 02:29:52 2006 UTC
(18 years, 2 months ago)
by
laffer1
This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.